From a1f738bb60d2b4eb9e1bb129f49a1917d4f4c4bd Mon Sep 17 00:00:00 2001
From: Philippe Langlais <philippe.langlais@stericsson.com>
Date: Wed, 19 Oct 2011 14:19:20 +0200
Subject: Porting architecture portion of av8100 driver from .35 to .38

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
---
 arch/arm/mach-ux500/board-mop500-mcde.c       | 671 ++++++++++++++++++++++++++
 arch/arm/mach-ux500/mcde.c                    | 102 ++++
 include/video/av8100.h                        | 561 +++++++++++++++++++++
 include/video/hdmi.h                          | 176 +++++++
 include/video/mcde.h                          | 434 +++++++++++++++++
 include/video/mcde_display-ab8500.h           |  23 +
 include/video/mcde_display-av8100.h           |  38 ++
 include/video/mcde_display-generic_dsi.h      |  35 ++
 include/video/mcde_display-sony_sy35560_dsi.h |  45 ++
 include/video/mcde_display-vuib500-dpi.h      |  31 ++
 include/video/mcde_display.h                  | 139 ++++++
 include/video/mcde_dss.h                      |  79 +++
 include/video/mcde_fb.h                       |  65 +++
 13 files changed, 2399 insertions(+)
 create mode 100644 arch/arm/mach-ux500/board-mop500-mcde.c
 create mode 100644 arch/arm/mach-ux500/mcde.c
 create mode 100644 include/video/av8100.h
 create mode 100644 include/video/hdmi.h
 create mode 100644 include/video/mcde.h
 create mode 100644 include/video/mcde_display-ab8500.h
 create mode 100644 include/video/mcde_display-av8100.h
 create mode 100644 include/video/mcde_display-generic_dsi.h
 create mode 100644 include/video/mcde_display-sony_sy35560_dsi.h
 create mode 100644 include/video/mcde_display-vuib500-dpi.h
 create mode 100644 include/video/mcde_display.h
 create mode 100644 include/video/mcde_dss.h
 create mode 100644 include/video/mcde_fb.h

diff --git a/arch/arm/mach-ux500/board-mop500-mcde.c b/arch/arm/mach-ux500/board-mop500-mcde.c
new file mode 100644
index 00000000000..59bc22c01d1
--- /dev/null
+++ b/arch/arm/mach-ux500/board-mop500-mcde.c
@@ -0,0 +1,671 @@
+/*
+ * Copyright (C) ST-Ericsson AB 2010
+ *
+ * Author: Marcus Lorentzon <marcus.xm.lorentzon@stericsson.com>
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+#include <linux/platform_device.h>
+#include <linux/kernel.h>
+#include <linux/gpio.h>
+#include <linux/mfd/ab8500/denc.h>
+#include <linux/workqueue.h>
+#include <video/av8100.h>
+#include <video/mcde_display.h>
+#include <video/mcde_display-generic_dsi.h>
+#include <video/mcde_display-vuib500-dpi.h>
+#include <video/mcde_display-av8100.h>
+#include <video/mcde_display-ab8500.h>
+#include <video/mcde_fb.h>
+#include <video/mcde_dss.h>
+#include <plat/pincfg.h>
+#include "pins-db8500.h"
+#include "pins.h"
+#include "board-mop500.h"
+
+
+#define DSI_UNIT_INTERVAL_0	0x9
+#define DSI_UNIT_INTERVAL_1	0x9
+#define DSI_UNIT_INTERVAL_2	0x5
+
+#define PRIMARY_DISPLAY_ID	0
+#define SECONDARY_DISPLAY_ID	1
+#define TERTIARY_DISPLAY_ID	2
+
+#ifdef CONFIG_FB_MCDE
+
+/* The initialization of hdmi disp driver must be delayed in order to
+ * ensure that inputclk will be available (needed by hdmi hw) */
+#ifdef CONFIG_DISPLAY_AV8100_TERTIARY
+static struct delayed_work work_dispreg_hdmi;
+#define DISPREG_HDMI_DELAY 6000
+#endif
+
+static struct fb_info *fbs[3] = { NULL, NULL, NULL };
+static struct mcde_display_device *displays[3] = { NULL, NULL, NULL };
+static int display_initialized_during_boot;
+
+static int __init startup_graphics_setup(char *str)
+{
+
+	if (get_option(&str, &display_initialized_during_boot) != 1)
+		display_initialized_during_boot = 0;
+
+	switch (display_initialized_during_boot) {
+	case 1:
+		pr_info("Startup graphics support\n");
+		break;
+	case 0:
+	default:
+		pr_info("No startup graphics supported\n");
+		break;
+	};
+
+	return 1;
+}
+__setup("startup_graphics=", startup_graphics_setup);
+
+#ifdef CONFIG_DISPLAY_GENERIC_DSI_PRIMARY
+static struct mcde_port port0 = {
+	.type = MCDE_PORTTYPE_DSI,
+	.mode = MCDE_PORTMODE_CMD,
+	.pixel_format = MCDE_PORTPIXFMT_DSI_24BPP,
+	.ifc = 1,
+	.link = 0,
+#ifdef CONFIG_DISPLAY_GENERIC_DSI_PRIMARY_AUTO_SYNC
+	.sync_src = MCDE_SYNCSRC_OFF,
+	.update_auto_trig = true,
+#else
+	.sync_src = MCDE_SYNCSRC_BTA,
+	.update_auto_trig = false,
+#endif
+	.phy = {
+		.dsi = {
+			.virt_id = 0,
+			.num_data_lanes = 2,
+			.ui = DSI_UNIT_INTERVAL_0,
+			.clk_cont = false,
+			.data_lanes_swap = false,
+		},
+	},
+};
+
+struct mcde_display_generic_platform_data generic_display0_pdata = {
+	.reset_delay = 1,
+#ifdef CONFIG_REGULATOR
+	.regulator_id = "v-display",
+	.min_supply_voltage = 2500000, /* 2.5V */
+	.max_supply_voltage = 2700000 /* 2.7V */
+#endif
+};
+
+struct mcde_display_device generic_display0 = {
+	.name = "mcde_disp_generic",
+	.id = PRIMARY_DISPLAY_ID,
+	.port = &port0,
+	.chnl_id = MCDE_CHNL_A,
+	.fifo = MCDE_FIFO_C0,
+#ifdef CONFIG_MCDE_DISPLAY_PRIMARY_16BPP
+	.default_pixel_format = MCDE_OVLYPIXFMT_RGB565,
+#else
+	.default_pixel_format = MCDE_OVLYPIXFMT_RGBA8888,
+#endif
+	.native_x_res = 864,
+	.native_y_res = 480,
+	.synchronized_update = false,
+	/* TODO: Remove rotation buffers once ESRAM driver is completed */
+	.rotbuf1 = U8500_ESRAM_BASE + 0x20000 * 4,
+	.rotbuf2 = U8500_ESRAM_BASE + 0x20000 * 4 + 0x10000,
+	.dev = {
+		.platform_data = &generic_display0_pdata,
+	},
+};
+#endif /* CONFIG_DISPLAY_GENERIC_DSI_PRIMARY */
+
+#ifdef CONFIG_DISPLAY_GENERIC_DSI_SECONDARY
+static struct mcde_port subdisplay_port = {
+	.type = MCDE_PORTTYPE_DSI,
+	.mode = MCDE_PORTMODE_CMD,
+	.pixel_format = MCDE_PORTPIXFMT_DSI_24BPP,
+	.ifc = 1,
+	.link = 1,
+#ifdef CONFIG_DISPLAY_GENERIC_DSI_SECONDARY_AUTO_SYNC
+	.sync_src = MCDE_SYNCSRC_OFF,
+	.update_auto_trig = true,
+#else
+	.sync_src = MCDE_SYNCSRC_BTA,
+	.update_auto_trig = false,
+#endif
+	.phy = {
+		.dsi = {
+			.virt_id = 0,
+			.num_data_lanes = 2,
+			.ui = DSI_UNIT_INTERVAL_1,
+			.clk_cont = false,
+			.data_lanes_swap = false,
+		},
+	},
+
+};
+
+static struct mcde_display_generic_platform_data generic_subdisplay_pdata = {
+	.reset_delay = 1,
+#ifdef CONFIG_REGULATOR
+	.regulator_id = "v-display",
+	.min_supply_voltage = 2500000, /* 2.5V */
+	.max_supply_voltage = 2700000 /* 2.7V */
+#endif
+};
+
+static struct mcde_display_device generic_subdisplay = {
+	.name = "mcde_disp_generic_subdisplay",
+	.id = SECONDARY_DISPLAY_ID,
+	.port = &subdisplay_port,
+	.chnl_id = MCDE_CHNL_C1,
+	.fifo = MCDE_FIFO_C1,
+	.default_pixel_format = MCDE_OVLYPIXFMT_RGB565,
+	.native_x_res = 864,
+	.native_y_res = 480,
+#ifdef CONFIG_DISPLAY_GENERIC_DSI_SECONDARY_VSYNC
+	.synchronized_update = true,
+#else
+	.synchronized_update = false,
+#endif
+	.dev = {
+		.platform_data = &generic_subdisplay_pdata,
+	},
+};
+#endif /* CONFIG_DISPLAY_GENERIC_DSI_SECONDARY */
+
+#ifdef CONFIG_MCDE_DISPLAY_DPI_PRIMARY
+static struct mcde_port port0 = {
+	.type = MCDE_PORTTYPE_DPI,
+	.pixel_format = MCDE_PORTPIXFMT_DPI_24BPP,
+	.ifc = 0,
+	.link = 1,		/* DPI channel B can only be on link 1 */
+	.sync_src = MCDE_SYNCSRC_OFF,   /* sync from output formatter  */
+	.update_auto_trig = true,
+	.phy = {
+		.dpi = {
+			.tv_mode = false,
+			.clock_div = 2,
+			.polarity = DPI_ACT_LOW_VSYNC | DPI_ACT_LOW_HSYNC,
+		},
+	},
+};
+
+struct mcde_display_dpi_platform_data generic_display0_pdata = {0};
+static struct ux500_pins *dpi_pins;
+
+static int dpi_display_platform_enable(struct mcde_display_device *ddev)
+{
+	int res;
+
+	if (!dpi_pins) {
+		dpi_pins = ux500_pins_get("mcde-dpi");
+		if (!dpi_pins)
+			return -EINVAL;
+	}
+
+	dev_info(&ddev->dev, "%s\n", __func__);
+	res = ux500_pins_enable(dpi_pins);
+	if (res)
+		dev_warn(&ddev->dev, "Failure during %s\n", __func__);
+
+	return res;
+}
+
+static int dpi_display_platform_disable(struct mcde_display_device *ddev)
+{
+	int res;
+
+	dev_info(&ddev->dev, "%s\n", __func__);
+
+	res = ux500_pins_disable(dpi_pins);
+	if (res)
+		dev_warn(&ddev->dev, "Failure during %s\n", __func__);
+
+	return res;
+
+}
+
+struct mcde_display_device generic_display0 = {
+	.name = "mcde_display_dpi",
+	.id = 0,
+	.port = &port0,
+	.chnl_id = MCDE_CHNL_B,
+	.fifo = MCDE_FIFO_B,
+#ifdef CONFIG_MCDE_DISPLAY_PRIMARY_16BPP
+	.default_pixel_format = MCDE_OVLYPIXFMT_RGB565,
+#else
+	.default_pixel_format = MCDE_OVLYPIXFMT_RGBA8888,
+#endif
+	.native_x_res = 640,
+	.native_y_res = 480,
+	/* .synchronized_update: Don't care: port is set to update_auto_trig */
+	.dev = {
+		.platform_data = &generic_display0_pdata,
+	},
+	.platform_enable = dpi_display_platform_enable,
+	.platform_disable = dpi_display_platform_disable,
+};
+#endif /* CONFIG_MCDE_DISPLAY_DPI_PRIMARY */
+
+#ifdef CONFIG_DISPLAY_AB8500_TERTIARY
+static struct mcde_port port_tvout1 = {
+	.type = MCDE_PORTTYPE_DPI,
+	.pixel_format = MCDE_PORTPIXFMT_DPI_24BPP,
+	.ifc = 0,
+	.link = 1,			/* channel B */
+	.sync_src = MCDE_SYNCSRC_OFF,
+	.update_auto_trig = true,
+	.phy = {
+		.dpi = {
+			.bus_width = 4, /* DDR mode */
+			.tv_mode = true,
+			.clock_div = MCDE_PORT_DPI_NO_CLOCK_DIV,
+		},
+	},
+};
+
+static struct ab8500_display_platform_data ab8500_display_pdata = {
+	.denc_regulator_id = "v-tvout",
+	.rgb_2_yCbCr_transform = {
+		.matrix = {
+			{0x42, 0x81, 0x19},
+			{0xffda, 0xffb6, 0x70},
+			{0x70, 0xffa2, 0xffee},
+		},
+		.offset = {0x80, 0x10, 0x80},
+	}
+};
+
+static struct ux500_pins *tvout_pins;
+
+static int ab8500_platform_enable(struct mcde_display_device *ddev)
+{
+	int res = 0;
+
+	if (!tvout_pins) {
+		tvout_pins = ux500_pins_get("mcde-tvout");
+		if (!tvout_pins)
+			return -EINVAL;
+	}
+
+	dev_info(&ddev->dev, "%s\n", __func__);
+	res = ux500_pins_enable(tvout_pins);
+	if (res != 0)
+		goto failed;
+
+	return res;
+
+failed:
+	dev_warn(&ddev->dev, "Failure during %s\n", __func__);
+	return res;
+}
+
+static int ab8500_platform_disable(struct mcde_display_device *ddev)
+{
+	int res;
+
+	dev_info(&ddev->dev, "%s\n", __func__);
+
+	res = ux500_pins_disable(tvout_pins);
+	if (res != 0)
+		goto failed;
+	return res;
+
+failed:
+	dev_warn(&ddev->dev, "Failure during %s\n", __func__);
+	return res;
+}
+
+static struct mcde_display_device tvout_ab8500_display = {
+	.name = "mcde_tv_ab8500",
+	.id = TERTIARY_DISPLAY_ID,
+	.port = &port_tvout1,
+	.chnl_id = MCDE_CHNL_B,
+	.fifo = MCDE_FIFO_B,
+	.default_pixel_format = MCDE_OVLYPIXFMT_RGB565,
+	.native_x_res = 720,
+	.native_y_res = 576,
+	/* .synchronized_update: Don't care: port is set to update_auto_trig */
+	.dev = {
+		.platform_data = &ab8500_display_pdata,
+	},
+
+	/*
+	* We might need to describe the std here:
+	* - there are different PAL / NTSC formats (do they require MCDE
+	*   settings?)
+	*/
+	.platform_enable = ab8500_platform_enable,
+	.platform_disable = ab8500_platform_disable,
+};
+#endif /* CONFIG_DISPLAY_AB8500_TERTIARY */
+
+#ifdef CONFIG_DISPLAY_AV8100_TERTIARY
+static struct mcde_port port2 = {
+	.type = MCDE_PORTTYPE_DSI,
+	.mode = MCDE_PORTMODE_CMD,
+	.pixel_format = MCDE_PORTPIXFMT_DSI_24BPP,
+	.ifc = 1,
+	.link = 2,
+#ifdef CONFIG_AV8100_HWTRIG_INT
+	.sync_src = MCDE_SYNCSRC_TE0,
+#endif
+#ifdef CONFIG_AV8100_HWTRIG_I2SDAT3
+	.sync_src = MCDE_SYNCSRC_TE1,
+#endif
+#ifdef CONFIG_AV8100_HWTRIG_DSI_TE
+	.sync_src = MCDE_SYNCSRC_TE_POLLING,
+#endif
+#ifdef CONFIG_AV8100_HWTRIG_NONE
+	.sync_src = MCDE_SYNCSRC_OFF,
+#endif
+	.update_auto_trig = true,
+	.phy = {
+		.dsi = {
+			.virt_id = 0,
+			.num_data_lanes = 2,
+			.ui = DSI_UNIT_INTERVAL_2,
+			.clk_cont = false,
+			.data_lanes_swap = false,
+		},
+	},
+	.hdmi_sdtv_switch = HDMI_SWITCH,
+};
+
+struct mcde_display_hdmi_platform_data av8100_hdmi_pdata = {
+	.reset_gpio = 0,
+	.reset_delay = 1,
+	.regulator_id = NULL, /* TODO: "display_main" */
+	.ddb_id = 1,
+	.rgb_2_yCbCr_transform = {
+		.matrix = {
+			{0x42, 0x81, 0x19},
+			{0xffda, 0xffb6, 0x70},
+			{0x70, 0xffa2, 0xffee},
+		},
+		.offset = {0x80, 0x10, 0x80},
+	}
+};
+
+static struct mcde_display_device av8100_hdmi = {
+	.name = "av8100_hdmi",
+	.id = TERTIARY_DISPLAY_ID,
+	.port = &port2,
+	.chnl_id = MCDE_CHNL_B,
+	.fifo = MCDE_FIFO_B,
+	.default_pixel_format = MCDE_OVLYPIXFMT_RGB565,
+	.native_x_res = 1280,
+	.native_y_res = 720,
+	.synchronized_update = false,
+	.dev = {
+		.platform_data = &av8100_hdmi_pdata,
+	},
+	.platform_enable = NULL,
+	.platform_disable = NULL,
+};
+
+static void delayed_work_dispreg_hdmi(struct work_struct *ptr)
+{
+	int ret;
+
+	ret = mcde_display_device_register(&av8100_hdmi);
+	if (ret)
+		pr_warning("Failed to register av8100_hdmi\n");
+	displays[2] = &av8100_hdmi;
+}
+#endif /* CONFIG_DISPLAY_AV8100_TERTIARY */
+
+/*
+* This function will create the framebuffer for the display that is registered.
+*/
+static int display_postregistered_callback(struct notifier_block *nb,
+	unsigned long event, void *dev)
+{
+	struct mcde_display_device *ddev = dev;
+	u16 width, height;
+	u16 virtual_width, virtual_height;
+	u32 rotate = FB_ROTATE_UR;
+
+	if (event != MCDE_DSS_EVENT_DISPLAY_REGISTERED)
+		return 0;
+
+	if (ddev->id < PRIMARY_DISPLAY_ID || ddev->id >= ARRAY_SIZE(fbs))
+		return 0;
+
+	mcde_dss_get_native_resolution(ddev, &width, &height);
+
+#ifdef CONFIG_DISPLAY_GENERIC_DSI_PRIMARY
+	if (ddev->id == PRIMARY_DISPLAY_ID) {
+		switch (CONFIG_DISPLAY_GENERIC_DSI_PRIMARY_ROTATION_ANGLE) {
+		case 0:
+			rotate = FB_ROTATE_UR;
+			break;
+		case 90:
+			rotate = FB_ROTATE_CW;
+			swap(width, height);
+			break;
+		case 180:
+			rotate = FB_ROTATE_UD;
+			break;
+		case 270:
+			rotate = FB_ROTATE_CCW;
+			swap(width, height);
+			break;
+		}
+	}
+#endif
+
+	virtual_width = width;
+	virtual_height = height * 2;
+#ifdef CONFIG_DISPLAY_GENERIC_DSI_PRIMARY_AUTO_SYNC
+	if (ddev->id == PRIMARY_DISPLAY_ID)
+		virtual_height = height;
+#endif
+
+#ifdef CONFIG_DISPLAY_GENERIC_DSI_SECONDARY_AUTO_SYNC
+	if (ddev->id == SECONDARY_DISPLAY_ID)
+		virtual_height = height;
+#endif
+
+	/* Create frame buffer */
+	fbs[ddev->id] = mcde_fb_create(ddev,
+		width, height,
+		virtual_width, virtual_height,
+		ddev->default_pixel_format,
+		rotate);
+
+	if (IS_ERR(fbs[ddev->id]))
+		pr_warning("Failed to create fb for display %s\n", ddev->name);
+	else
+		pr_info("Framebuffer created (%s)\n", ddev->name);
+
+	return 0;
+}
+
+static struct notifier_block display_nb = {
+	.notifier_call = display_postregistered_callback,
+};
+
+/*
+* This function is used to refresh the display (lcd, hdmi, tvout) with black
+* when the framebuffer is registered.
+* The main display will not be updated if startup graphics is displayed
+* from u-boot.
+*/
+#if defined(CONFIG_DISPLAY_GENERIC_DSI_PRIMARY_AUTO_SYNC) || \
+			defined(CONFIG_DISPLAY_GENERIC_DSI_SECONDARY_AUTO_SYNC)
+static int framebuffer_postregistered_callback(struct notifier_block *nb,
+	unsigned long event, void *data)
+{
+	int ret = 0;
+	struct fb_event *event_data = data;
+	struct fb_info *info;
+	struct fb_var_screeninfo var;
+	struct fb_fix_screeninfo fix;
+	struct mcde_fb *mfb;
+	u8 *addr;
+	int i;
+
+	if (event != FB_EVENT_FB_REGISTERED)
+		return 0;
+
+	if (!event_data)
+		return 0;
+
+	info = event_data->info;
+	mfb = to_mcde_fb(info);
+	var = info->var;
+	fix = info->fix;
+	addr = ioremap(fix.smem_start,
+			var.yres_virtual * fix.line_length);
+	memset(addr, 0x00,
+			var.yres_virtual * fix.line_length);
+	/* Apply overlay info */
+	for (i = 0; i < mfb->num_ovlys; i++) {
+		struct mcde_overlay *ovly = mfb->ovlys[i];
+		struct mcde_overlay_info ovly_info;
+		struct mcde_fb *mfb = to_mcde_fb(info);
+		memset(&ovly_info, 0, sizeof(ovly_info));
+		ovly_info.paddr = fix.smem_start +
+			fix.line_length * var.yoffset;
+		if (ovly_info.paddr + fix.line_length * var.yres
+			 > fix.smem_start + fix.smem_len)
+			ovly_info.paddr = fix.smem_start;
+		ovly_info.fmt = mfb->pix_fmt;
+		ovly_info.stride = fix.line_length;
+		ovly_info.w = var.xres;
+		ovly_info.h = var.yres;
+		ovly_info.dirty.w = var.xres;
+		ovly_info.dirty.h = var.yres;
+		(void) mcde_dss_apply_overlay(ovly, &ovly_info);
+		ret = mcde_dss_update_overlay(ovly);
+		if (ret)
+			break;
+	}
+
+	return ret;
+}
+#else
+static int framebuffer_postregistered_callback(struct notifier_block *nb,
+	unsigned long event, void *data)
+{
+	int ret = 0;
+	struct fb_event *event_data = data;
+	struct fb_info *info;
+	struct fb_var_screeninfo var;
+	struct fb_fix_screeninfo fix;
+	struct mcde_fb *mfb;
+	u8 *addr;
+
+	if (event != FB_EVENT_FB_REGISTERED)
+		return 0;
+
+	if (!event_data)
+		return 0;
+
+	info = event_data->info;
+	mfb = to_mcde_fb(info);
+	if (mfb->id == 0 && display_initialized_during_boot)
+		goto out;
+
+	var = info->var;
+	fix = info->fix;
+	addr = ioremap(fix.smem_start,
+			var.yres_virtual * fix.line_length);
+	memset(addr, 0x00,
+			var.yres_virtual * fix.line_length);
+	var.yoffset = var.yoffset ? 0 : var.yres;
+	if (info->fbops->fb_pan_display)
+		ret = info->fbops->fb_pan_display(&var, info);
+out:
+	return ret;
+}
+#endif
+
+
+static struct notifier_block framebuffer_nb = {
+	.notifier_call = framebuffer_postregistered_callback,
+};
+
+int __init init_display_devices(void)
+{
+	int ret;
+
+#ifdef CONFIG_DISPLAY_GENERIC_DSI_PRIMARY_VSYNC
+	struct i2c_adapter *i2c0;
+#endif
+
+	ret = fb_register_client(&framebuffer_nb);
+	if (ret)
+		pr_warning("Failed to register framebuffer notifier\n");
+
+	ret = mcde_dss_register_notifier(&display_nb);
+	if (ret)
+		pr_warning("Failed to register dss notifier\n");
+
+#ifdef CONFIG_DISPLAY_GENERIC_PRIMARY
+	if (machine_is_hrefv60())
+		generic_display0_pdata.reset_gpio = HREFV60_DISP1_RST_GPIO;
+	else
+		generic_display0_pdata.reset_gpio = EGPIO_PIN_15;
+
+#ifdef CONFIG_DISPLAY_GENERIC_DSI_PRIMARY_VSYNC
+	i2c0 = i2c_get_adapter(0);
+	if (i2c0) {
+		/*
+		* U8500-UIB has the TC35893 at 0x44 on I2C0, the
+		* ST-UIB has not.
+		*/
+		ret = i2c_smbus_xfer(i2c0, 0x44, 0, I2C_SMBUS_WRITE, 0,
+							I2C_SMBUS_QUICK, NULL);
+		i2c_put_adapter(i2c0);
+
+		/* ret == 0 => U8500 UIB connected */
+		generic_display0.synchronized_update = (ret == 0);
+	}
+#endif
+
+	if (display_initialized_during_boot)
+		generic_display0.power_mode = MCDE_DISPLAY_PM_STANDBY;
+	ret = mcde_display_device_register(&generic_display0);
+	if (ret)
+		pr_warning("Failed to register generic display device 0\n");
+	displays[0] = &generic_display0;
+#endif
+
+#ifdef CONFIG_DISPLAY_GENERIC_DSI_SECONDARY
+	if (machine_is_hrefv60())
+		generic_subdisplay_pdata.reset_gpio = HREFV60_DISP2_RST_GPIO;
+	else
+		generic_subdisplay_pdata.reset_gpio = EGPIO_PIN_14;
+	ret = mcde_display_device_register(&generic_subdisplay);
+	if (ret)
+		pr_warning("Failed to register generic sub display device\n");
+	displays[1] = &generic_subdisplay;
+#endif
+
+#ifdef CONFIG_DISPLAY_AV8100_TERTIARY
+	INIT_DELAYED_WORK_DEFERRABLE(&work_dispreg_hdmi,
+			delayed_work_dispreg_hdmi);
+
+	schedule_delayed_work(&work_dispreg_hdmi,
+			msecs_to_jiffies(DISPREG_HDMI_DELAY));
+#endif
+#ifdef CONFIG_DISPLAY_AB8500_TERTIARY
+	ret = mcde_display_device_register(&tvout_ab8500_display);
+	if (ret)
+		pr_warning("Failed to register ab8500 tvout device\n");
+	displays[2] = &tvout_ab8500_display;
+#endif
+
+	return ret;
+}
+
+module_init(init_display_devices);
+
+#endif
diff --git a/arch/arm/mach-ux500/mcde.c b/arch/arm/mach-ux500/mcde.c
new file mode 100644
index 00000000000..fe3b80f0961
--- /dev/null
+++ b/arch/arm/mach-ux500/mcde.c
@@ -0,0 +1,102 @@
+/*
+ * Copyright (C) ST-Ericsson AB 2010
+ *
+ * MOP500/HREF500 ed/v1 Display platform devices
+ *
+ * Author: Marcus Lorentzon <marcus.xm.lorentzon@stericsson.com>
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/device.h>
+#include <linux/platform_device.h>
+#include <mach/hardware.h>
+#include <mach/irqs.h>
+#include <video/mcde.h>
+#include <mach/prcmu-fw-api.h>
+
+static struct resource mcde_resources[] = {
+	[0] = {
+		.name  = MCDE_IO_AREA,
+		.start = U8500_MCDE_BASE,
+		.end   = U8500_MCDE_BASE + 0x1000 - 1, /* TODO: Fix size */
+		.flags = IORESOURCE_MEM,
+	},
+	[1] = {
+		.name  = MCDE_IO_AREA,
+		.start = U8500_DSI_LINK1_BASE,
+		.end   = U8500_DSI_LINK1_BASE + U8500_DSI_LINK_SIZE - 1,
+		.flags = IORESOURCE_MEM,
+	},
+	[2] = {
+		.name  = MCDE_IO_AREA,
+		.start = U8500_DSI_LINK2_BASE,
+		.end   = U8500_DSI_LINK2_BASE + U8500_DSI_LINK_SIZE - 1,
+		.flags = IORESOURCE_MEM,
+	},
+	[3] = {
+		.name  = MCDE_IO_AREA,
+		.start = U8500_DSI_LINK3_BASE,
+		.end   = U8500_DSI_LINK3_BASE + U8500_DSI_LINK_SIZE - 1,
+		.flags = IORESOURCE_MEM,
+	},
+	[4] = {
+		.name  = MCDE_IRQ,
+		.start = IRQ_DB8500_DISP,
+		.end   = IRQ_DB8500_DISP,
+		.flags = IORESOURCE_IRQ,
+	},
+};
+
+
+static int mcde_platform_enable(void)
+{
+	return prcmu_enable_mcde();
+}
+
+static int mcde_platform_disable(void)
+{
+	return prcmu_disable_mcde();
+}
+
+static void dev_release_noop(struct device *dev)
+{
+	/* Do nothing */
+}
+
+static struct mcde_platform_data mcde_pdata = {
+	.num_dsilinks = 3,
+	/*
+	 * [0] = 3: 24 bits DPI: connect LSB Ch B to D[0:7]
+	 * [3] = 4: 24 bits DPI: connect MID Ch B to D[24:31]
+	 * [4] = 5: 24 bits DPI: connect MSB Ch B to D[32:39]
+	 *
+	 * [1] = 3: TV out     : connect LSB Ch B to D[8:15]
+	 */
+#define DONT_CARE 0
+	.outmux = { 3, 3, DONT_CARE, 4, 5 },
+#undef DONT_CARE
+	.syncmux = 0x00,  /* DPI channel A and B on output pins A and B resp */
+	.regulator_vana_id = "v-ana",
+	.regulator_mcde_epod_id = "vsupply",
+	.regulator_esram_epod_id = "v-esram34",
+	.clock_dsi_id = "hdmi",
+	.clock_dsi_lp_id = "tv",
+	.clock_dpi_id = "lcd",
+	.clock_mcde_id = "mcde",
+	.platform_enable = mcde_platform_enable,
+	.platform_disable = mcde_platform_disable,
+};
+
+struct platform_device ux500_mcde_device = {
+	.name = "mcde",
+	.id = -1,
+	.dev = {
+		.release = dev_release_noop,
+		.platform_data = &mcde_pdata,
+	},
+	.num_resources = ARRAY_SIZE(mcde_resources),
+	.resource = mcde_resources,
+};
diff --git a/include/video/av8100.h b/include/video/av8100.h
new file mode 100644
index 00000000000..2cec097c73d
--- /dev/null
+++ b/include/video/av8100.h
@@ -0,0 +1,561 @@
+/*
+ * Copyright (C) ST-Ericsson AB 2010
+ *
+ * AV8100 driver
+ *
+ * Author: Per Persson <per.xb.persson@stericsson.com>
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+#ifndef __AV8100__H__
+#define __AV8100__H__
+
+#define AV8100_CEC_MESSAGE_SIZE		16
+#define AV8100_HDCP_SEND_KEY_SIZE	16
+#define AV8100_INFOFRAME_SIZE		28
+#define AV8100_FUSE_KEY_SIZE		16
+#define AV8100_CHIPVER_1		1
+#define AV8100_CHIPVER_2		2
+
+struct av8100_platform_data {
+	unsigned	gpio_base;
+	int		irq;
+	int		reset;
+	const char	*inputclk_id;
+	const char	*regulator_pwr_id;
+};
+
+enum av8100_error {
+	AV8100_OK = 0x0,
+	AV8100_INVALID_COMMAND = 0x1,
+	AV8100_INVALID_INTERFACE = 0x2,
+	AV8100_INVALID_IOCTL = 0x3,
+	AV8100_COMMAND_FAIL = 0x4,
+	AV8100_FWDOWNLOAD_FAIL = 0x5,
+	AV8100_FAIL = 0xFF,
+};
+
+enum av8100_command_type {
+	AV8100_COMMAND_VIDEO_INPUT_FORMAT  = 0x1,
+	AV8100_COMMAND_AUDIO_INPUT_FORMAT,
+	AV8100_COMMAND_VIDEO_OUTPUT_FORMAT,
+	AV8100_COMMAND_VIDEO_SCALING_FORMAT,
+	AV8100_COMMAND_COLORSPACECONVERSION,
+	AV8100_COMMAND_CEC_MESSAGE_WRITE,
+	AV8100_COMMAND_CEC_MESSAGE_READ_BACK,
+	AV8100_COMMAND_DENC,
+	AV8100_COMMAND_HDMI,
+	AV8100_COMMAND_HDCP_SENDKEY,
+	AV8100_COMMAND_HDCP_MANAGEMENT,
+	AV8100_COMMAND_INFOFRAMES,
+	AV8100_COMMAND_EDID_SECTION_READBACK,
+	AV8100_COMMAND_PATTERNGENERATOR,
+	AV8100_COMMAND_FUSE_AES_KEY,
+};
+
+enum interface_type {
+	I2C_INTERFACE = 0x0,
+	DSI_INTERFACE = 0x1,
+};
+
+enum av8100_dsi_mode {
+	AV8100_HDMI_DSI_OFF,
+	AV8100_HDMI_DSI_COMMAND_MODE,
+	AV8100_HDMI_DSI_VIDEO_MODE
+};
+
+enum av8100_pixel_format {
+	AV8100_INPUT_PIX_RGB565,
+	AV8100_INPUT_PIX_RGB666,
+	AV8100_INPUT_PIX_RGB666P,
+	AV8100_INPUT_PIX_RGB888,
+	AV8100_INPUT_PIX_YCBCR422
+};
+
+enum av8100_video_mode {
+	AV8100_VIDEO_INTERLACE,
+	AV8100_VIDEO_PROGRESSIVE
+};
+
+enum av8100_dsi_nb_data_lane {
+	AV8100_DATA_LANES_USED_0,
+	AV8100_DATA_LANES_USED_1,
+	AV8100_DATA_LANES_USED_2,
+	AV8100_DATA_LANES_USED_3,
+	AV8100_DATA_LANES_USED_4
+};
+
+enum av8100_te_config {
+	AV8100_TE_OFF,		/* NO TE*/
+	AV8100_TE_DSI_LANE,	/* TE generated on DSI lane */
+	AV8100_TE_IT_LINE,	/* TE generated on IT line (GPIO) */
+	AV8100_TE_DSI_IT,	/* TE generatedon both DSI lane & IT line*/
+	AV8100_TE_GPIO_IT	/* TE on GPIO I2S DAT3 & or IT line*/
+};
+
+enum av8100_audio_if_format {
+	AV8100_AUDIO_I2S_MODE,
+	AV8100_AUDIO_I2SDELAYED_MODE, /* I2S Mode by default*/
+	AV8100_AUDIO_TDM_MODE         /* 8 Channels by default*/
+};
+
+enum av8100_sample_freq {
+	AV8100_AUDIO_FREQ_32KHZ,
+	AV8100_AUDIO_FREQ_44_1KHZ,
+	AV8100_AUDIO_FREQ_48KHZ,
+	AV8100_AUDIO_FREQ_64KHZ,
+	AV8100_AUDIO_FREQ_88_2KHZ,
+	AV8100_AUDIO_FREQ_96KHZ,
+	AV8100_AUDIO_FREQ_128KHZ,
+	AV8100_AUDIO_FREQ_176_1KHZ,
+	AV8100_AUDIO_FREQ_192KHZ
+};
+
+enum av8100_audio_word_length {
+	AV8100_AUDIO_16BITS,
+	AV8100_AUDIO_20BITS,
+	AV8100_AUDIO_24BITS
+};
+
+enum av8100_audio_format {
+	AV8100_AUDIO_LPCM_MODE,
+	AV8100_AUDIO_COMPRESS_MODE
+};
+
+enum av8100_audio_if_mode {
+	AV8100_AUDIO_SLAVE,
+	AV8100_AUDIO_MASTER
+};
+
+enum av8100_audio_mute {
+	AV8100_AUDIO_MUTE_DISABLE,
+	AV8100_AUDIO_MUTE_ENABLE
+};
+
+enum av8100_output_CEA_VESA {
+	AV8100_CUSTOM,
+	AV8100_CEA1_640X480P_59_94HZ,
+	AV8100_CEA2_3_720X480P_59_94HZ,
+	AV8100_CEA4_1280X720P_60HZ,
+	AV8100_CEA5_1920X1080I_60HZ,
+	AV8100_CEA6_7_NTSC_60HZ,
+	AV8100_CEA14_15_480p_60HZ,
+	AV8100_CEA16_1920X1080P_60HZ,
+	AV8100_CEA17_18_720X576P_50HZ,
+	AV8100_CEA19_1280X720P_50HZ,
+	AV8100_CEA20_1920X1080I_50HZ,
+	AV8100_CEA21_22_576I_PAL_50HZ,
+	AV8100_CEA29_30_576P_50HZ,
+	AV8100_CEA31_1920x1080P_50Hz,
+	AV8100_CEA32_1920X1080P_24HZ,
+	AV8100_CEA33_1920X1080P_25HZ,
+	AV8100_CEA34_1920X1080P_30HZ,
+	AV8100_CEA60_1280X720P_24HZ,
+	AV8100_CEA61_1280X720P_25HZ,
+	AV8100_CEA62_1280X720P_30HZ,
+	AV8100_VESA9_800X600P_60_32HZ,
+	AV8100_VESA14_848X480P_60HZ,
+	AV8100_VESA16_1024X768P_60HZ,
+	AV8100_VESA22_1280X768P_59_99HZ,
+	AV8100_VESA23_1280X768P_59_87HZ,
+	AV8100_VESA27_1280X800P_59_91HZ,
+	AV8100_VESA28_1280X800P_59_81HZ,
+	AV8100_VESA39_1360X768P_60_02HZ,
+	AV8100_VESA81_1366X768P_59_79HZ,
+	AV8100_VIDEO_OUTPUT_CEA_VESA_MAX
+};
+
+enum av8100_video_sync_pol {
+	AV8100_SYNC_POSITIVE,
+	AV8100_SYNC_NEGATIVE
+};
+
+enum av8100_hdmi_mode {
+	AV8100_HDMI_OFF,
+	AV8100_HDMI_ON,
+	AV8100_HDMI_AVMUTE
+};
+
+enum av8100_hdmi_format {
+	AV8100_HDMI,
+	AV8100_DVI
+};
+
+enum av8100_DVI_format {
+	AV8100_DVI_CTRL_CTL0,
+	AV8100_DVI_CTRL_CTL1,
+	AV8100_DVI_CTRL_CTL2
+};
+
+enum av8100_pattern_type {
+	AV8100_PATTERN_OFF,
+	AV8100_PATTERN_GENERATOR,
+	AV8100_PRODUCTION_TESTING
+};
+
+enum av8100_pattern_format {
+	AV8100_NO_PATTERN,
+	AV8100_PATTERN_VGA,
+	AV8100_PATTERN_720P,
+	AV8100_PATTERN_1080P
+};
+
+enum av8100_pattern_audio {
+	AV8100_PATTERN_AUDIO_OFF,
+	AV8100_PATTERN_AUDIO_ON,
+	AV8100_PATTERN_AUDIO_I2S_MEM
+};
+
+struct av8100_video_input_format_cmd {
+	enum av8100_dsi_mode		dsi_input_mode;
+	enum av8100_pixel_format	input_pixel_format;
+	unsigned short			total_horizontal_pixel;
+	unsigned short			total_horizontal_active_pixel;
+	unsigned short			total_vertical_lines;
+	unsigned short			total_vertical_active_lines;
+	enum av8100_video_mode		video_mode;
+	enum av8100_dsi_nb_data_lane	nb_data_lane;
+	unsigned char			nb_virtual_ch_command_mode;
+	unsigned char			nb_virtual_ch_video_mode;
+	unsigned short			TE_line_nb;
+	enum av8100_te_config		TE_config;
+	unsigned long			master_clock_freq;
+	unsigned char			ui_x4;
+};
+
+struct av8100_audio_input_format_cmd {
+	enum av8100_audio_if_format	audio_input_if_format;
+	unsigned char			i2s_input_nb;
+	enum av8100_sample_freq		sample_audio_freq;
+	enum av8100_audio_word_length	audio_word_lg;
+	enum av8100_audio_format	audio_format;
+	enum av8100_audio_if_mode	audio_if_mode;
+	enum av8100_audio_mute		audio_mute;
+};
+
+struct av8100_video_output_format_cmd {
+	enum av8100_output_CEA_VESA	video_output_cea_vesa;
+	enum av8100_video_sync_pol	vsync_polarity;
+	enum av8100_video_sync_pol	hsync_polarity;
+	unsigned short		total_horizontal_pixel;
+	unsigned short		total_horizontal_active_pixel;
+	unsigned short		total_vertical_in_half_lines;
+	unsigned short		total_vertical_active_in_half_lines;
+	unsigned short		hsync_start_in_pixel;
+	unsigned short		hsync_length_in_pixel;
+	unsigned short		vsync_start_in_half_line;
+	unsigned short		vsync_length_in_half_line;
+	unsigned short		hor_video_start_pixel;
+	unsigned short		vert_video_start_pixel;
+	enum av8100_video_mode	video_type;
+	unsigned short		pixel_repeat;
+	unsigned long		pixel_clock_freq_Hz;
+};
+
+struct av8100_video_scaling_format_cmd {
+	unsigned short	h_start_in_pixel;
+	unsigned short	h_stop_in_pixel;
+	unsigned short	v_start_in_line;
+	unsigned short	v_stop_in_line;
+	unsigned short	h_start_out_pixel;
+	unsigned short	h_stop_out_pixel;
+	unsigned short	v_start_out_line;
+	unsigned short	v_stop_out_line;
+};
+
+enum av8100_color_transform {
+	AV8100_COLOR_TRANSFORM_INDENTITY,
+	AV8100_COLOR_TRANSFORM_INDENTITY_CLAMP_YUV,
+	AV8100_COLOR_TRANSFORM_YUV_TO_RGB,
+	AV8100_COLOR_TRANSFORM_YUV_TO_DENC,
+	AV8100_COLOR_TRANSFORM_RGB_TO_DENC,
+};
+
+struct av8100_cec_message_write_format_cmd {
+	unsigned char buffer_length;
+	unsigned char buffer[AV8100_CEC_MESSAGE_SIZE];
+};
+
+struct av8100_cec_message_read_back_format_cmd {
+};
+
+enum av8100_cvbs_video_format {
+	AV8100_CVBS_625,
+	AV8100_CVBS_525,
+};
+
+enum av8100_standard_selection {
+	AV8100_PAL_BDGHI,
+	AV8100_PAL_N,
+	AV8100_NTSC_M,
+	AV8100_PAL_M
+};
+
+struct av8100_denc_format_cmd {
+	enum av8100_cvbs_video_format cvbs_video_format;
+	enum av8100_standard_selection standard_selection;
+	unsigned char enable;
+	unsigned char macrovision_enable;
+	unsigned char internal_generator;
+};
+
+struct av8100_hdmi_cmd {
+	enum av8100_hdmi_mode	hdmi_mode;
+	enum av8100_hdmi_format	hdmi_format;
+	enum av8100_DVI_format	dvi_format; /* used only if HDMI_format = DVI*/
+};
+
+struct av8100_hdcp_send_key_format_cmd {
+	unsigned char key_number;
+	unsigned char data_len;
+	unsigned char data[AV8100_HDCP_SEND_KEY_SIZE];
+};
+
+enum av8100_hdcp_auth_req_type {
+	AV8100_HDCP_AUTH_REQ_OFF = 0,
+	AV8100_HDCP_AUTH_REQ_ON = 1,
+	AV8100_HDCP_REV_LIST_REQ = 2,
+	AV8100_HDCP_AUTH_CONT = 3,
+};
+
+enum av8100_hdcp_encr_req_type {
+	AV8100_HDCP_ENCR_REQ_OFF = 0,
+	AV8100_HDCP_ENCR_REQ_ON = 1,
+};
+
+enum av8100_hdcp_encr_use {
+	AV8100_HDCP_ENCR_USE_OESS = 0,
+	AV8100_HDCP_ENCR_USE_EESS = 1,
+};
+
+struct av8100_hdcp_management_format_cmd {
+	unsigned char req_type;
+	unsigned char req_encr;
+	unsigned char encr_use;
+};
+
+struct av8100_infoframes_format_cmd {
+	unsigned char type;
+	unsigned char version;
+	unsigned char length;
+	unsigned char crc;
+	unsigned char data[AV8100_INFOFRAME_SIZE];
+};
+
+struct av8100_edid_section_readback_format_cmd {
+	unsigned char address;
+	unsigned char block_number;
+};
+
+struct av8100_pattern_generator_format_cmd {
+	enum av8100_pattern_type	pattern_type;
+	enum av8100_pattern_format	pattern_video_format;
+	enum av8100_pattern_audio	pattern_audio_mode;
+};
+
+enum av8100_fuse_operation {
+	AV8100_FUSE_READ = 0,
+	AV8100_FUSE_WRITE = 1,
+};
+
+struct av8100_fuse_aes_key_format_cmd {
+	unsigned char fuse_operation;
+	unsigned char key[AV8100_FUSE_KEY_SIZE];
+};
+
+union av8100_configuration {
+	struct av8100_video_input_format_cmd	video_input_format;
+	struct av8100_audio_input_format_cmd	audio_input_format;
+	struct av8100_video_output_format_cmd	video_output_format;
+	struct av8100_video_scaling_format_cmd	video_scaling_format;
+	enum   av8100_color_transform           color_transform;
+	struct av8100_cec_message_write_format_cmd
+		cec_message_write_format;
+	struct av8100_cec_message_read_back_format_cmd
+		cec_message_read_back_format;
+	struct av8100_denc_format_cmd		denc_format;
+	struct av8100_hdmi_cmd			hdmi_format;
+	struct av8100_hdcp_send_key_format_cmd	hdcp_send_key_format;
+	struct av8100_hdcp_management_format_cmd hdcp_management_format;
+	struct av8100_infoframes_format_cmd	infoframes_format;
+	struct av8100_edid_section_readback_format_cmd
+		edid_section_readback_format;
+	struct av8100_pattern_generator_format_cmd pattern_generator_format;
+	struct av8100_fuse_aes_key_format_cmd	fuse_aes_key_format;
+};
+
+enum av8100_operating_mode {
+	AV8100_OPMODE_UNDEFINED = 0,
+	AV8100_OPMODE_SHUTDOWN,
+	AV8100_OPMODE_STANDBY,
+	AV8100_OPMODE_SCAN,
+	AV8100_OPMODE_INIT,
+	AV8100_OPMODE_IDLE,
+	AV8100_OPMODE_VIDEO,
+};
+
+enum av8100_plugin_status {
+	AV8100_PLUGIN_NONE = 0x0,
+	AV8100_HDMI_PLUGIN = 0x1,
+	AV8100_CVBS_PLUGIN = 0x2,
+};
+
+enum av8100_hdmi_event {
+	AV8100_HDMI_EVENT_NONE =		0x0,
+	AV8100_HDMI_EVENT_HDMI_PLUGIN =		0x1,
+	AV8100_HDMI_EVENT_HDMI_PLUGOUT =	0x2,
+	AV8100_HDMI_EVENT_CEC =			0x4,
+	AV8100_HDMI_EVENT_HDCP =		0x8,
+	AV8100_HDMI_EVENT_CECTXERR =		0x10,
+};
+
+struct av8100_status {
+	enum av8100_operating_mode	av8100_state;
+	enum av8100_plugin_status	av8100_plugin_status;
+	int				hdmi_on;
+};
+
+
+int av8100_init(void);
+void av8100_exit(void);
+int av8100_powerup(void);
+int av8100_powerdown(void);
+int av8100_disable_interrupt(void);
+int av8100_enable_interrupt(void);
+int av8100_download_firmware(char *fw_buff, int numOfBytes,
+	enum interface_type if_type);
+int av8100_reg_stby_w(
+		unsigned char cpd,
+		unsigned char stby,
+		unsigned char mclkrng);
+int av8100_reg_hdmi_5_volt_time_w(
+		unsigned char denc_off_time,
+		unsigned char hdmi_off_time,
+		unsigned char on_time);
+int av8100_reg_stby_int_mask_w(
+		unsigned char hpdm,
+		unsigned char cpdm,
+		unsigned char stbygpiocfg,
+		unsigned char ipol);
+int av8100_reg_stby_pend_int_w(
+		unsigned char hpdi,
+		unsigned char cpdi,
+		unsigned char oni);
+int av8100_reg_gen_int_mask_w(
+		unsigned char eocm,
+		unsigned char vsim,
+		unsigned char vsom,
+		unsigned char cecm,
+		unsigned char hdcpm,
+		unsigned char uovbm,
+		unsigned char tem);
+int av8100_reg_gen_int_w(
+		unsigned char eoci,
+		unsigned char vsii,
+		unsigned char vsoi,
+		unsigned char ceci,
+		unsigned char hdcpi,
+		unsigned char uovbi);
+int av8100_reg_gpio_conf_w(
+		unsigned char dat3dir,
+		unsigned char dat3val,
+		unsigned char dat2dir,
+		unsigned char dat2val,
+		unsigned char dat1dir,
+		unsigned char dat1val,
+		unsigned char ucdbg);
+int av8100_reg_gen_ctrl_w(
+		unsigned char fdl,
+		unsigned char hld,
+		unsigned char wa,
+		unsigned char ra);
+int av8100_reg_fw_dl_entry_w(
+	unsigned char mbyte_code_entry);
+int av8100_reg_w(
+		unsigned char offset,
+		unsigned char value);
+int av8100_reg_stby_r(
+		unsigned char *cpd,
+		unsigned char *stby,
+		unsigned char *hpds,
+		unsigned char *cpds,
+		unsigned char *mclkrng);
+int av8100_reg_hdmi_5_volt_time_r(
+		unsigned char *denc_off_time,
+		unsigned char *hdmi_off_time,
+		unsigned char *on_time);
+int av8100_reg_stby_int_mask_r(
+		unsigned char *hpdm,
+		unsigned char *cpdm,
+		unsigned char *stbygpiocfg,
+		unsigned char *ipol);
+int av8100_reg_stby_pend_int_r(
+		unsigned char *hpdi,
+		unsigned char *cpdi,
+		unsigned char *oni,
+		unsigned char *sid);
+int av8100_reg_gen_int_mask_r(
+		unsigned char *eocm,
+		unsigned char *vsim,
+		unsigned char *vsom,
+		unsigned char *cecm,
+		unsigned char *hdcpm,
+		unsigned char *uovbm,
+		unsigned char *tem);
+int av8100_reg_gen_int_r(
+		unsigned char *eoci,
+		unsigned char *vsii,
+		unsigned char *vsoi,
+		unsigned char *ceci,
+		unsigned char *hdcpi,
+		unsigned char *uovbi,
+		unsigned char *tei);
+int av8100_reg_gen_status_r(
+		unsigned char *cectxerr,
+		unsigned char *cecrec,
+		unsigned char *cectrx,
+		unsigned char *uc,
+		unsigned char *onuvb,
+		unsigned char *hdcps);
+int av8100_reg_gpio_conf_r(
+		unsigned char *dat3dir,
+		unsigned char *dat3val,
+		unsigned char *dat2dir,
+		unsigned char *dat2val,
+		unsigned char *dat1dir,
+		unsigned char *dat1val,
+		unsigned char *ucdbg);
+int av8100_reg_gen_ctrl_r(
+		unsigned char *fdl,
+		unsigned char *hld,
+		unsigned char *wa,
+		unsigned char *ra);
+int av8100_reg_fw_dl_entry_r(
+	unsigned char *mbyte_code_entry);
+int av8100_reg_r(
+		unsigned char offset,
+		unsigned char *value);
+int av8100_conf_get(enum av8100_command_type command_type,
+	union av8100_configuration *config);
+int av8100_conf_prep(enum av8100_command_type command_type,
+	union av8100_configuration *config);
+int av8100_conf_w(enum av8100_command_type command_type,
+		unsigned char *return_buffer_length,
+		unsigned char *return_buffer, enum interface_type if_type);
+int av8100_conf_w_raw(enum av8100_command_type command_type,
+	unsigned char buffer_length,
+	unsigned char *buffer,
+	unsigned char *return_buffer_length,
+	unsigned char *return_buffer);
+struct av8100_status av8100_status_get(void);
+enum av8100_output_CEA_VESA av8100_video_output_format_get(int xres,
+	int yres,
+	int htot,
+	int vtot,
+	int pixelclk,
+	bool interlaced);
+void av8100_hdmi_event_cb_set(void (*event_callback)(enum av8100_hdmi_event));
+u8 av8100_ver_get(void);
+
+#endif /* __AV8100__H__ */
diff --git a/include/video/hdmi.h b/include/video/hdmi.h
new file mode 100644
index 00000000000..18a8e34bd67
--- /dev/null
+++ b/include/video/hdmi.h
@@ -0,0 +1,176 @@
+/*
+ * Copyright (C) ST-Ericsson AB 2010
+ *
+ * HDMI driver
+ *
+ * Author: Per Persson <per.xb.persson@stericsson.com>
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+#ifndef __HDMI__H__
+#define __HDMI__H__
+
+#define HDMI_RESULT_OK			0
+#define HDMI_RESULT_NOT_OK		1
+#define HDMI_AES_NOT_FUSED		2
+#define HDMI_RESULT_CRC_MISMATCH	3
+
+#define HDMI_CEC_READ_MAXSIZE		16
+#define HDMI_CEC_WRITE_MAXSIZE		15
+#define HDMI_INFOFRAME_MAX_SIZE		27
+#define HDMI_HDCP_FUSEAES_KEYSIZE	16
+#define HDMI_HDCP_AES_BLOCK_START	128
+#define HDMI_HDCP_KSV_BLOCK		40
+#define HDMI_HDCP_AES_NR_OF_BLOCKS	18
+#define HDMI_HDCP_AES_KEYSIZE		16
+#define HDMI_HDCP_AES_KSVSIZE		5
+#define HDMI_HDCP_AES_KSVZEROESSIZE	3
+#define HDMI_EDID_DATA_SIZE		128
+#define HDMI_CEC_SIZE			15
+#define HDMI_INFOFR_SIZE		27
+#define HDMI_FUSE_KEYSIZE		16
+#define HDMI_AES_KSVSIZE		5
+#define HDMI_AES_KEYSIZE		288
+#define HDMI_CRC32_SIZE			4
+#define HDMI_REVOC_LIST_SIZE		30
+
+#define HDMI_STOREASTEXT_TEXT_SIZE	2
+#define HDMI_STOREASTEXT_BIN_SIZE	1
+#define HDMI_PLUGDETEN_TEXT_SIZE	6
+#define HDMI_PLUGDETEN_BIN_SIZE		3
+#define HDMI_EDIDREAD_TEXT_SIZE		4
+#define HDMI_EDIDREAD_BIN_SIZE		2
+#define HDMI_CECEVEN_TEXT_SIZE		2
+#define HDMI_CECEVEN_BIN_SIZE		1
+#define HDMI_CECSEND_TEXT_SIZE_MAX	37
+#define HDMI_CECSEND_TEXT_SIZE_MIN	6
+#define HDMI_CECSEND_BIN_SIZE_MAX	18
+#define HDMI_CECSEND_BIN_SIZE_MIN	3
+#define HDMI_INFOFRSEND_TEXT_SIZE_MIN	8
+#define HDMI_INFOFRSEND_TEXT_SIZE_MAX	63
+#define HDMI_INFOFRSEND_BIN_SIZE_MIN	4
+#define HDMI_INFOFRSEND_BIN_SIZE_MAX	31
+#define HDMI_HDCPEVEN_TEXT_SIZE		2
+#define HDMI_HDCPEVEN_BIN_SIZE		1
+#define HDMI_HDCP_FUSEAES_TEXT_SIZE	34
+#define HDMI_HDCP_FUSEAES_BIN_SIZE	17
+#define HDMI_HDCP_LOADAES_TEXT_SIZE	594
+#define HDMI_HDCP_LOADAES_BIN_SIZE	297
+#define HDMI_HDCPAUTHENCR_TEXT_SIZE	4
+#define HDMI_HDCPAUTHENCR_BIN_SIZE	2
+#define HDMI_EVCLR_TEXT_SIZE		2
+#define HDMI_EVCLR_BIN_SIZE		1
+#define HDMI_AUDIOCFG_TEXT_SIZE		14
+#define HDMI_AUDIOCFG_BIN_SIZE		7
+#define HDMI_POWERONOFF_TEXT_SIZE	2
+#define HDMI_POWERONOFF_BIN_SIZE	1
+
+#define HDMI_IOC_MAGIC 0xcc
+
+/** IOCTL Operations */
+#define IOC_PLUG_DETECT_ENABLE		_IOWR(HDMI_IOC_MAGIC, 1, int)
+#define IOC_EDID_READ			_IOWR(HDMI_IOC_MAGIC, 2, int)
+#define IOC_CEC_EVENT_ENABLE		_IOWR(HDMI_IOC_MAGIC, 3, int)
+#define IOC_CEC_READ			_IOWR(HDMI_IOC_MAGIC, 4, int)
+#define IOC_CEC_SEND			_IOWR(HDMI_IOC_MAGIC, 5, int)
+#define IOC_INFOFRAME_SEND		_IOWR(HDMI_IOC_MAGIC, 6, int)
+#define IOC_HDCP_EVENT_ENABLE		_IOWR(HDMI_IOC_MAGIC, 7, int)
+#define IOC_HDCP_CHKAESOTP		_IOWR(HDMI_IOC_MAGIC, 8, int)
+#define IOC_HDCP_FUSEAES		_IOWR(HDMI_IOC_MAGIC, 9, int)
+#define IOC_HDCP_LOADAES		_IOWR(HDMI_IOC_MAGIC, 10, int)
+#define IOC_HDCP_AUTHENCR_REQ		_IOWR(HDMI_IOC_MAGIC, 11, int)
+#define IOC_HDCP_STATE_GET		_IOWR(HDMI_IOC_MAGIC, 12, int)
+#define IOC_EVENTS_READ			_IOWR(HDMI_IOC_MAGIC, 13, int)
+#define IOC_EVENTS_CLEAR		_IOWR(HDMI_IOC_MAGIC, 14, int)
+#define IOC_AUDIO_CFG			_IOWR(HDMI_IOC_MAGIC, 15, int)
+#define IOC_PLUG_STATUS			_IOWR(HDMI_IOC_MAGIC, 16, int)
+#define IOC_POWERONOFF			_IOWR(HDMI_IOC_MAGIC, 17, int)
+
+
+/* HDMI driver */
+void hdmi_event(enum av8100_hdmi_event);
+int hdmi_init(void);
+void hdmi_exit(void);
+
+enum hdmi_event {
+	HDMI_EVENT_NONE =		0x0,
+	HDMI_EVENT_HDMI_PLUGIN =	0x1,
+	HDMI_EVENT_HDMI_PLUGOUT =	0x2,
+	HDMI_EVENT_CEC =		0x4,
+	HDMI_EVENT_HDCP =		0x8,
+	HDMI_EVENT_CECTXERR =		0x10,
+};
+
+enum hdmi_hdcp_auth_type {
+	HDMI_HDCP_AUTH_OFF = 0,
+	HDMI_HDCP_AUTH_START = 1,
+	HDMI_HDCP_AUTH_REV_LIST_REQ = 2,
+	HDMI_HDCP_AUTH_CONT = 3,
+};
+
+enum hdmi_hdcp_encr_type {
+	HDMI_HDCP_ENCR_OFF = 0,
+	HDMI_HDCP_ENCR_OESS = 1,
+	HDMI_HDCP_ENCR_EESS = 2,
+};
+
+struct plug_detect {
+	u8 hdmi_detect_enable;
+	u8 on_time;
+	u8 hdmi_off_time;
+};
+
+struct edid_read {
+	u8 address;
+	u8 block_nr;
+	u8 data_length;
+	u8 data[HDMI_EDID_DATA_SIZE];
+};
+
+struct cec_rw  {
+	u8 src;
+	u8 dest;
+	u8 length;
+	u8 data[HDMI_CEC_SIZE];
+};
+
+struct info_fr {
+	u8 type;
+	u8 ver;
+	u8 crc;
+	u8 length;
+	u8 data[HDMI_INFOFR_SIZE];
+};
+
+struct hdcp_fuseaes {
+	u8 key[HDMI_FUSE_KEYSIZE];
+	u8 crc;
+	u8 result;
+};
+
+struct hdcp_loadaesall {
+	u8 key[HDMI_AES_KEYSIZE];
+	u8 ksv[HDMI_AES_KSVSIZE];
+	u8 crc32[HDMI_CRC32_SIZE];
+	u8 result;
+};
+
+struct hdcp_authencr {
+	u8 auth_type;
+	u8 encr_type;
+	u8 result;
+	u8 revoc_list[HDMI_REVOC_LIST_SIZE];
+};
+
+struct audio_cfg {
+	u8 if_format;
+	u8 i2s_entries;
+	u8 freq;
+	u8 word_length;
+	u8 format;
+	u8 if_mode;
+	u8 mute;
+};
+
+#endif /* __HDMI__H__ */
diff --git a/include/video/mcde.h b/include/video/mcde.h
new file mode 100644
index 00000000000..1777e272329
--- /dev/null
+++ b/include/video/mcde.h
@@ -0,0 +1,434 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2010
+ *
+ * ST-Ericsson MCDE base driver
+ *
+ * Author: Marcus Lorentzon <marcus.xm.lorentzon@stericsson.com>
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+#ifndef __MCDE__H__
+#define __MCDE__H__
+
+/* Physical interface types */
+enum mcde_port_type {
+	MCDE_PORTTYPE_DSI = 0,
+	MCDE_PORTTYPE_DPI = 1,
+};
+
+/* Interface mode */
+enum mcde_port_mode {
+	MCDE_PORTMODE_CMD = 0,
+	MCDE_PORTMODE_VID = 1,
+};
+
+/* MCDE fifos */
+enum mcde_fifo {
+	MCDE_FIFO_A  = 0,
+	MCDE_FIFO_B  = 1,
+	MCDE_FIFO_C0 = 2,
+	MCDE_FIFO_C1 = 3,
+};
+
+/* MCDE channels (pixel pipelines) */
+enum mcde_chnl {
+	MCDE_CHNL_A  = 0,
+	MCDE_CHNL_B  = 1,
+	MCDE_CHNL_C0 = 2,
+	MCDE_CHNL_C1 = 3,
+};
+
+/* Channel path */
+#define MCDE_CHNLPATH(__chnl, __fifo, __type, __ifc, __link) \
+	(((__chnl) << 16) | ((__fifo) << 12) | \
+	 ((__type) << 8) | ((__ifc) << 4) | ((__link) << 0))
+enum mcde_chnl_path {
+	/* Channel A */
+	MCDE_CHNLPATH_CHNLA_FIFOA_DPI_0 = MCDE_CHNLPATH(MCDE_CHNL_A,
+		MCDE_FIFO_A, MCDE_PORTTYPE_DPI, 0, 0),
+	MCDE_CHNLPATH_CHNLA_FIFOA_DSI_IFC0_0 = MCDE_CHNLPATH(MCDE_CHNL_A,
+		MCDE_FIFO_A, MCDE_PORTTYPE_DSI, 0, 0),
+	MCDE_CHNLPATH_CHNLA_FIFOA_DSI_IFC0_1 = MCDE_CHNLPATH(MCDE_CHNL_A,
+		MCDE_FIFO_A, MCDE_PORTTYPE_DSI, 0, 1),
+	MCDE_CHNLPATH_CHNLA_FIFOC0_DSI_IFC0_2 = MCDE_CHNLPATH(MCDE_CHNL_A,
+		MCDE_FIFO_C0, MCDE_PORTTYPE_DSI, 0, 2),
+	MCDE_CHNLPATH_CHNLA_FIFOC0_DSI_IFC1_0 = MCDE_CHNLPATH(MCDE_CHNL_A,
+		MCDE_FIFO_C0, MCDE_PORTTYPE_DSI, 1, 0),
+	MCDE_CHNLPATH_CHNLA_FIFOC0_DSI_IFC1_1 = MCDE_CHNLPATH(MCDE_CHNL_A,
+		MCDE_FIFO_C0, MCDE_PORTTYPE_DSI, 1, 1),
+	MCDE_CHNLPATH_CHNLA_FIFOA_DSI_IFC1_2 = MCDE_CHNLPATH(MCDE_CHNL_A,
+		MCDE_FIFO_A, MCDE_PORTTYPE_DSI, 1, 2),
+	/* Channel B */
+	MCDE_CHNLPATH_CHNLB_FIFOB_DPI_1 = MCDE_CHNLPATH(MCDE_CHNL_B,
+		MCDE_FIFO_B, MCDE_PORTTYPE_DPI, 0, 1),
+	MCDE_CHNLPATH_CHNLB_FIFOB_DSI_IFC0_0 = MCDE_CHNLPATH(MCDE_CHNL_B,
+		MCDE_FIFO_B, MCDE_PORTTYPE_DSI, 0, 0),
+	MCDE_CHNLPATH_CHNLB_FIFOB_DSI_IFC0_1 = MCDE_CHNLPATH(MCDE_CHNL_B,
+		MCDE_FIFO_B, MCDE_PORTTYPE_DSI, 0, 1),
+	MCDE_CHNLPATH_CHNLB_FIFOC1_DSI_IFC0_2 = MCDE_CHNLPATH(MCDE_CHNL_B,
+		MCDE_FIFO_C1, MCDE_PORTTYPE_DSI, 0, 2),
+	MCDE_CHNLPATH_CHNLB_FIFOC1_DSI_IFC1_0 = MCDE_CHNLPATH(MCDE_CHNL_B,
+		MCDE_FIFO_C1, MCDE_PORTTYPE_DSI, 1, 0),
+	MCDE_CHNLPATH_CHNLB_FIFOC1_DSI_IFC1_1 = MCDE_CHNLPATH(MCDE_CHNL_B,
+		MCDE_FIFO_C1, MCDE_PORTTYPE_DSI, 1, 1),
+	MCDE_CHNLPATH_CHNLB_FIFOB_DSI_IFC1_2 = MCDE_CHNLPATH(MCDE_CHNL_B,
+		MCDE_FIFO_B, MCDE_PORTTYPE_DSI, 1, 2),
+	/* Channel C0 */
+	MCDE_CHNLPATH_CHNLC0_FIFOA_DSI_IFC0_0 = MCDE_CHNLPATH(MCDE_CHNL_C0,
+		MCDE_FIFO_A, MCDE_PORTTYPE_DSI, 0, 0),
+	MCDE_CHNLPATH_CHNLC0_FIFOA_DSI_IFC0_1 = MCDE_CHNLPATH(MCDE_CHNL_C0,
+		MCDE_FIFO_A, MCDE_PORTTYPE_DSI, 0, 1),
+	MCDE_CHNLPATH_CHNLC0_FIFOC0_DSI_IFC0_2 = MCDE_CHNLPATH(MCDE_CHNL_C0,
+		MCDE_FIFO_C0, MCDE_PORTTYPE_DSI, 0, 2),
+	MCDE_CHNLPATH_CHNLC0_FIFOC0_DSI_IFC1_0 = MCDE_CHNLPATH(MCDE_CHNL_C0,
+		MCDE_FIFO_C0, MCDE_PORTTYPE_DSI, 1, 0),
+	MCDE_CHNLPATH_CHNLC0_FIFOC0_DSI_IFC1_1 = MCDE_CHNLPATH(MCDE_CHNL_C0,
+		MCDE_FIFO_C0, MCDE_PORTTYPE_DSI, 1, 1),
+	MCDE_CHNLPATH_CHNLC0_FIFOA_DSI_IFC1_2 = MCDE_CHNLPATH(MCDE_CHNL_C0,
+		MCDE_FIFO_A, MCDE_PORTTYPE_DSI, 1, 2),
+	/* Channel C1 */
+	MCDE_CHNLPATH_CHNLC1_FIFOB_DSI_IFC0_0 = MCDE_CHNLPATH(MCDE_CHNL_C1,
+		MCDE_FIFO_B, MCDE_PORTTYPE_DSI, 0, 0),
+	MCDE_CHNLPATH_CHNLC1_FIFOB_DSI_IFC0_1 = MCDE_CHNLPATH(MCDE_CHNL_C1,
+		MCDE_FIFO_B, MCDE_PORTTYPE_DSI, 0, 1),
+	MCDE_CHNLPATH_CHNLC1_FIFOC1_DSI_IFC0_2 = MCDE_CHNLPATH(MCDE_CHNL_C1,
+		MCDE_FIFO_C1, MCDE_PORTTYPE_DSI, 0, 2),
+	MCDE_CHNLPATH_CHNLC1_FIFOC1_DSI_IFC1_0 = MCDE_CHNLPATH(MCDE_CHNL_C1,
+		MCDE_FIFO_C1, MCDE_PORTTYPE_DSI, 1, 0),
+	MCDE_CHNLPATH_CHNLC1_FIFOC1_DSI_IFC1_1 = MCDE_CHNLPATH(MCDE_CHNL_C1,
+		MCDE_FIFO_C1, MCDE_PORTTYPE_DSI, 1, 1),
+	MCDE_CHNLPATH_CHNLC1_FIFOB_DSI_IFC1_2 = MCDE_CHNLPATH(MCDE_CHNL_C1,
+		MCDE_FIFO_B, MCDE_PORTTYPE_DSI, 1, 2),
+};
+
+/* Update sync mode */
+enum mcde_sync_src {
+	MCDE_SYNCSRC_OFF = 0, /* No sync */
+	MCDE_SYNCSRC_TE0 = 1, /* MCDE ext TE0 */
+	MCDE_SYNCSRC_TE1 = 2, /* MCDE ext TE1 */
+	MCDE_SYNCSRC_BTA = 3, /* DSI BTA */
+	MCDE_SYNCSRC_TE_POLLING = 4, /* DSI TE_POLLING */
+};
+
+/* Interface pixel formats (output) */
+/*
+* REVIEW: Define formats
+* Add explanatory comments how the formats are ordered in memory
+*/
+enum mcde_port_pix_fmt {
+	/* MIPI standard formats */
+
+	MCDE_PORTPIXFMT_DPI_16BPP_C1 =     0x21,
+	MCDE_PORTPIXFMT_DPI_16BPP_C2 =     0x22,
+	MCDE_PORTPIXFMT_DPI_16BPP_C3 =     0x23,
+	MCDE_PORTPIXFMT_DPI_18BPP_C1 =     0x24,
+	MCDE_PORTPIXFMT_DPI_18BPP_C2 =     0x25,
+	MCDE_PORTPIXFMT_DPI_24BPP =        0x26,
+
+	MCDE_PORTPIXFMT_DSI_16BPP =        0x31,
+	MCDE_PORTPIXFMT_DSI_18BPP =        0x32,
+	MCDE_PORTPIXFMT_DSI_18BPP_PACKED = 0x33,
+	MCDE_PORTPIXFMT_DSI_24BPP =        0x34,
+
+	/* Custom formats */
+	MCDE_PORTPIXFMT_DSI_YCBCR422 =     0x40,
+};
+
+enum mcde_hdmi_sdtv_switch {
+	HDMI_SWITCH,
+	SDTV_SWITCH
+};
+
+struct mcde_col_convert {
+	u16 matrix[3][3];
+	u16 offset[3];
+};
+
+#define MCDE_PORT_DPI_NO_CLOCK_DIV	0
+
+#define DPI_ACT_HIGH_ALL	0 /* all signals are active high	  */
+#define DPI_ACT_LOW_HSYNC	1 /* horizontal sync signal is active low */
+#define DPI_ACT_LOW_VSYNC	2 /* vertical sync signal is active low	  */
+#define DPI_ACT_LOW_DATA_ENABLE	4 /* data enable signal is active low	  */
+#define DPI_ACT_ON_FALLING_EDGE	8 /* drive data on the falling edge of the
+				   * pixel clock
+				   */
+
+struct mcde_port {
+	enum mcde_port_type type;
+	enum mcde_port_mode mode;
+	enum mcde_port_pix_fmt pixel_format;
+	u8 ifc;
+	u8 link;
+	enum mcde_sync_src sync_src;
+	bool update_auto_trig;
+	enum mcde_hdmi_sdtv_switch hdmi_sdtv_switch;
+	union {
+		struct {
+			u8 virt_id;
+			u8 num_data_lanes;
+			u8 ui;
+			bool clk_cont;
+
+			/* DSI data lanes are swapped if true */
+			bool data_lanes_swap;
+		} dsi;
+		struct {
+			u8 bus_width;
+			bool tv_mode;
+			u16 clock_div; /* use 0 or 1 for no clock divider */
+			u32 polarity;    /* see DPI_ACT_LOW_* definitions */
+		} dpi;
+	} phy;
+};
+
+/* Overlay pixel formats (input) *//* REVIEW: Define byte order */
+enum mcde_ovly_pix_fmt {
+	MCDE_OVLYPIXFMT_RGB565   = 1,
+	MCDE_OVLYPIXFMT_RGBA5551 = 2,
+	MCDE_OVLYPIXFMT_RGBA4444 = 3,
+	MCDE_OVLYPIXFMT_RGB888   = 4,
+	MCDE_OVLYPIXFMT_RGBX8888 = 5,
+	MCDE_OVLYPIXFMT_RGBA8888 = 6,
+	MCDE_OVLYPIXFMT_YCbCr422 = 7,/* REVIEW: Capitalize */
+};
+
+/* Display power modes */
+enum mcde_display_power_mode {
+	MCDE_DISPLAY_PM_OFF     = 0, /* Power off */
+	MCDE_DISPLAY_PM_STANDBY = 1, /* DCS sleep mode */
+	MCDE_DISPLAY_PM_ON      = 2, /* DCS normal mode, display on */
+};
+
+/* Display rotation */
+enum mcde_display_rotation {
+	MCDE_DISPLAY_ROT_0       = 0,
+	MCDE_DISPLAY_ROT_90_CCW  = 90,
+	MCDE_DISPLAY_ROT_180_CCW = 180,
+	MCDE_DISPLAY_ROT_270_CCW = 270,
+	MCDE_DISPLAY_ROT_90_CW   = MCDE_DISPLAY_ROT_270_CCW,
+	MCDE_DISPLAY_ROT_180_CW  = MCDE_DISPLAY_ROT_180_CCW,
+	MCDE_DISPLAY_ROT_270_CW  = MCDE_DISPLAY_ROT_90_CCW,
+};
+
+/* REVIEW: Verify */
+#define MCDE_MIN_WIDTH  16
+#define MCDE_MIN_HEIGHT 16
+#define MCDE_MAX_WIDTH  2048
+#define MCDE_MAX_HEIGHT 2048
+#define MCDE_BUF_START_ALIGMENT 8
+#define MCDE_BUF_LINE_ALIGMENT 8
+
+#define MCDE_FIFO_AB_SIZE 640
+#define MCDE_FIFO_C0C1_SIZE 160
+
+#define MCDE_PIXFETCH_LARGE_WTRMRKLVL 128
+#define MCDE_PIXFETCH_MEDIUM_WTRMRKLVL 64
+#define MCDE_PIXFETCH_SMALL_WTRMRKLVL 16
+
+/* Tv-out defines */
+#define MCDE_CONFIG_TVOUT_HBORDER 2
+#define MCDE_CONFIG_TVOUT_VBORDER 2
+#define MCDE_CONFIG_TVOUT_BACKGROUND_LUMINANCE		0x83
+#define MCDE_CONFIG_TVOUT_BACKGROUND_CHROMINANCE_CB	0x9C
+#define MCDE_CONFIG_TVOUT_BACKGROUND_CHROMINANCE_CR	0x2C
+
+/* In seconds */
+#define MCDE_AUTO_SYNC_WATCHDOG 5
+
+/* Hardware versions */
+#define MCDE_CHIP_VERSION_1_0_4 3	/* U5500 V1 */
+#define MCDE_CHIP_VERSION_3_0_8 2	/* U8500 V2 */
+#define MCDE_CHIP_VERSION_3_0_5 1	/* U8500 V1 */
+#define MCDE_CHIP_VERSION_3	0
+
+/* DSI modes */
+#define DSI_VIDEO_MODE	0
+#define DSI_CMD_MODE	1
+
+/* Video mode descriptor */
+struct mcde_video_mode {/* REVIEW: Join 1 & 2 */
+	u32 xres;
+	u32 yres;
+	u32 pixclock;	/* pixel clock in ps (pico seconds) */
+	u32 hbp;	/* hor back porch = left_margin */
+	u32 hfp;	/* hor front porch equals to right_margin */
+	u32 hsw;	/* horizontal sync width */
+	u32 vbp1;	/* field 1: vert back porch equals to upper_margin */
+	u32 vfp1;	/* field 1: vert front porch equals to lower_margin */
+	u32 vbp2;	/* field 2: vert back porch equals to upper_margin */
+	u32 vfp2;	/* field 2: vert front porch equals to lower_margin */
+	u32 vsw;	/* vertical sync width*/
+	bool interlaced;
+	bool force_update; /* when switching between hdmi and sdtv */
+};
+
+struct mcde_rectangle {
+	u16 x;
+	u16 y;
+	u16 w;
+	u16 h;
+};
+
+struct mcde_overlay_info {
+	u32 paddr;
+	u16 stride; /* buffer line len in bytes */
+	enum mcde_ovly_pix_fmt fmt;
+
+	u16 src_x;
+	u16 src_y;
+	u16 dst_x;
+	u16 dst_y;
+	u16 dst_z;
+	u16 w;
+	u16 h;
+	struct mcde_rectangle dirty;
+};
+
+struct mcde_overlay {
+	struct kobject kobj;
+	struct list_head list; /* mcde_display_device.ovlys */
+
+	struct mcde_display_device *ddev;
+	struct mcde_overlay_info info;
+	struct mcde_ovly_state *state;
+};
+
+/*
+ * Three functions for mapping 8 bits colour channels on 12 bits colour
+ * channels. The colour channels (ch0, ch1, ch2) can represent (r, g, b) or
+ * (Y, Cb, Cr) respectively.
+ */
+struct mcde_palette_table {
+	u16 (*map_col_ch0)(u8);
+	u16 (*map_col_ch1)(u8);
+	u16 (*map_col_ch2)(u8);
+};
+
+struct mcde_chnl_state;
+
+struct mcde_chnl_state *mcde_chnl_get(enum mcde_chnl chnl_id,
+			enum mcde_fifo fifo, const struct mcde_port *port);
+int mcde_chnl_set_pixel_format(struct mcde_chnl_state *chnl,
+					enum mcde_port_pix_fmt pix_fmt);
+int mcde_chnl_set_palette(struct mcde_chnl_state *chnl,
+					struct mcde_palette_table *palette);
+void mcde_chnl_set_col_convert(struct mcde_chnl_state *chnl,
+					struct mcde_col_convert *col_convert);
+int mcde_chnl_set_video_mode(struct mcde_chnl_state *chnl,
+					struct mcde_video_mode *vmode);
+/* TODO: Remove rotbuf* parameters when ESRAM allocator is implemented*/
+int mcde_chnl_set_rotation(struct mcde_chnl_state *chnl,
+		enum mcde_display_rotation rotation, u32 rotbuf1, u32 rotbuf2);
+int mcde_chnl_enable_synchronized_update(struct mcde_chnl_state *chnl,
+								bool enable);
+int mcde_chnl_set_power_mode(struct mcde_chnl_state *chnl,
+				enum mcde_display_power_mode power_mode);
+
+int mcde_chnl_apply(struct mcde_chnl_state *chnl);
+int mcde_chnl_update(struct mcde_chnl_state *chnl,
+					struct mcde_rectangle *update_area);
+void mcde_chnl_put(struct mcde_chnl_state *chnl);
+
+void mcde_chnl_stop_flow(struct mcde_chnl_state *chnl);
+
+void mcde_chnl_enable(struct mcde_chnl_state *chnl);
+void mcde_chnl_disable(struct mcde_chnl_state *chnl);
+
+/* MCDE overlay */
+struct mcde_ovly_state;
+
+struct mcde_ovly_state *mcde_ovly_get(struct mcde_chnl_state *chnl);
+void mcde_ovly_set_source_buf(struct mcde_ovly_state *ovly,
+	u32 paddr);
+void mcde_ovly_set_source_info(struct mcde_ovly_state *ovly,
+	u32 stride, enum mcde_ovly_pix_fmt pix_fmt);
+void mcde_ovly_set_source_area(struct mcde_ovly_state *ovly,
+	u16 x, u16 y, u16 w, u16 h);
+void mcde_ovly_set_dest_pos(struct mcde_ovly_state *ovly,
+	u16 x, u16 y, u8 z);
+void mcde_ovly_apply(struct mcde_ovly_state *ovly);
+void mcde_ovly_put(struct mcde_ovly_state *ovly);
+
+/* MCDE dsi */
+
+#define DCS_CMD_ENTER_IDLE_MODE       0x39
+#define DCS_CMD_ENTER_INVERT_MODE     0x21
+#define DCS_CMD_ENTER_NORMAL_MODE     0x13
+#define DCS_CMD_ENTER_PARTIAL_MODE    0x12
+#define DCS_CMD_ENTER_SLEEP_MODE      0x10
+#define DCS_CMD_EXIT_IDLE_MODE        0x38
+#define DCS_CMD_EXIT_INVERT_MODE      0x20
+#define DCS_CMD_EXIT_SLEEP_MODE       0x11
+#define DCS_CMD_GET_ADDRESS_MODE      0x0B
+#define DCS_CMD_GET_BLUE_CHANNEL      0x08
+#define DCS_CMD_GET_DIAGNOSTIC_RESULT 0x0F
+#define DCS_CMD_GET_DISPLAY_MODE      0x0D
+#define DCS_CMD_GET_GREEN_CHANNEL     0x07
+#define DCS_CMD_GET_PIXEL_FORMAT      0x0C
+#define DCS_CMD_GET_POWER_MODE        0x0A
+#define DCS_CMD_GET_RED_CHANNEL       0x06
+#define DCS_CMD_GET_SCANLINE          0x45
+#define DCS_CMD_GET_SIGNAL_MODE       0x0E
+#define DCS_CMD_NOP                   0x00
+#define DCS_CMD_READ_DDB_CONTINUE     0xA8
+#define DCS_CMD_READ_DDB_START        0xA1
+#define DCS_CMD_READ_MEMORY_CONTINE   0x3E
+#define DCS_CMD_READ_MEMORY_START     0x2E
+#define DCS_CMD_SET_ADDRESS_MODE      0x36
+#define DCS_CMD_SET_COLUMN_ADDRESS    0x2A
+#define DCS_CMD_SET_DISPLAY_OFF       0x28
+#define DCS_CMD_SET_DISPLAY_ON        0x29
+#define DCS_CMD_SET_GAMMA_CURVE       0x26
+#define DCS_CMD_SET_PAGE_ADDRESS      0x2B
+#define DCS_CMD_SET_PARTIAL_AREA      0x30
+#define DCS_CMD_SET_PIXEL_FORMAT      0x3A
+#define DCS_CMD_SET_SCROLL_AREA       0x33
+#define DCS_CMD_SET_SCROLL_START      0x37
+#define DCS_CMD_SET_TEAR_OFF          0x34
+#define DCS_CMD_SET_TEAR_ON           0x35
+#define DCS_CMD_SET_TEAR_SCANLINE     0x44
+#define DCS_CMD_SOFT_RESET            0x01
+#define DCS_CMD_WRITE_LUT             0x2D
+#define DCS_CMD_WRITE_CONTINUE        0x3C
+#define DCS_CMD_WRITE_START           0x2C
+
+#define MCDE_MAX_DCS_READ   4
+#define MCDE_MAX_DCS_WRITE 15
+
+int mcde_dsi_dcs_write(struct mcde_chnl_state *chnl, u8 cmd, u8* data, int len);
+int mcde_dsi_dcs_read(struct mcde_chnl_state *chnl, u8 cmd, u8* data, int *len);
+
+/* MCDE */
+
+/* Driver data */
+#define MCDE_IRQ     "MCDE IRQ"
+#define MCDE_IO_AREA "MCDE I/O Area"
+
+struct mcde_platform_data {
+	/* DSI */
+	int num_dsilinks;
+
+	/* DPI */
+	u8 outmux[5]; /* MCDE_CONF0.OUTMUXx */
+	u8 syncmux;   /* MCDE_CONF0.SYNCMUXx */
+
+	const char *regulator_vana_id;
+	const char *regulator_mcde_epod_id;
+	const char *regulator_esram_epod_id;
+	int num_channels;
+	int num_overlays;
+	const char *clock_dsi_id;
+	const char *clock_dsi_lp_id;
+	const char *clock_dpi_id;
+	const char *clock_mcde_id;
+
+	int (*platform_enable)(void);
+	int (*platform_disable)(void);
+};
+
+int mcde_init(void);
+void mcde_exit(void);
+
+#endif /* __MCDE__H__ */
diff --git a/include/video/mcde_display-ab8500.h b/include/video/mcde_display-ab8500.h
new file mode 100644
index 00000000000..ce0633313f1
--- /dev/null
+++ b/include/video/mcde_display-ab8500.h
@@ -0,0 +1,23 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2010
+ *
+ * AB8500 tvout driver interface
+ *
+ * Author: Marcel Tunnissen <marcel.tuennissen@stericsson.com>
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+#ifndef __DISPLAY_AB8500__H__
+#define __DISPLAY_AB8500__H__
+
+#include <video/mcde.h>
+
+struct ab8500_display_platform_data {
+	/* Platform info */
+	const char *denc_regulator_id;
+	struct mcde_col_convert rgb_2_yCbCr_transform;
+};
+
+#endif /* __DISPLAY_AB8500__H__*/
+
diff --git a/include/video/mcde_display-av8100.h b/include/video/mcde_display-av8100.h
new file mode 100644
index 00000000000..79e806a8391
--- /dev/null
+++ b/include/video/mcde_display-av8100.h
@@ -0,0 +1,38 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2010
+ *
+ * ST-Ericsson MCDE HDMI display driver
+ *
+ * Author: Per Persson <per-xb-persson@stericsson.com>
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+#ifndef __DISPLAY_AV8100__H__
+#define __DISPLAY_AV8100__H__
+
+#include <linux/regulator/consumer.h>
+
+#include "mcde_display.h"
+
+#define GPIO_AV8100_RSTN	196
+#define NATIVE_XRES_HDMI	1280
+#define NATIVE_YRES_HDMI	720
+#define NATIVE_XRES_SDTV	720
+#define NATIVE_YRES_SDTV	576
+
+struct mcde_display_hdmi_platform_data {
+	/* Platform info */
+	int reset_gpio;
+	bool reset_high;
+	const char *regulator_id;
+	int reset_delay; /* ms */
+	u32 ddb_id;
+	struct mcde_col_convert rgb_2_yCbCr_transform;
+
+	/* Driver data */ /* TODO: move to driver data instead */
+	bool hdmi_platform_enable;
+	struct regulator *regulator;
+};
+
+#endif /* __DISPLAY_AV8100__H__ */
diff --git a/include/video/mcde_display-generic_dsi.h b/include/video/mcde_display-generic_dsi.h
new file mode 100644
index 00000000000..87ef6baf67a
--- /dev/null
+++ b/include/video/mcde_display-generic_dsi.h
@@ -0,0 +1,35 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2010
+ *
+ * ST-Ericsson MCDE generic DCS display driver
+ *
+ * Author: Marcus Lorentzon <marcus.xm.lorentzon@stericsson.com>
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+#ifndef __MCDE_DISPLAY_GENERIC__H__
+#define __MCDE_DISPLAY_GENERIC__H__
+
+#include <linux/regulator/consumer.h>
+
+#include "mcde_display.h"
+
+struct mcde_display_generic_platform_data {
+	/* Platform info */
+	int reset_gpio;
+	bool reset_high;
+	const char *regulator_id;
+	int reset_delay; /* ms */
+	int sleep_out_delay; /* ms */
+	u32 ddb_id;
+
+	/* Driver data */
+	bool generic_platform_enable;
+	struct regulator *regulator;
+	int max_supply_voltage;
+	int min_supply_voltage;
+};
+
+#endif /* __MCDE_DISPLAY_GENERIC__H__ */
+
diff --git a/include/video/mcde_display-sony_sy35560_dsi.h b/include/video/mcde_display-sony_sy35560_dsi.h
new file mode 100644
index 00000000000..997a7ed1f85
--- /dev/null
+++ b/include/video/mcde_display-sony_sy35560_dsi.h
@@ -0,0 +1,45 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2010
+ *
+ * ST-Ericsson MCDE Sony sy35560 DCS display driver
+ *
+ * Author: Marcus Lorentzon <marcus.xm.lorentzon@stericsson.com>
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+#ifndef __MCDE_DISPLAY_SONY_SY35560__H__
+#define __MCDE_DISPLAY_SONY_SY35560__H__
+
+#include <linux/regulator/consumer.h>
+
+#include "mcde_display.h"
+#include <linux/workqueue.h>
+
+/* period between ESD status checks */
+#define SONY_SY35560_ESD_CHECK_PERIOD	msecs_to_jiffies(10000)
+
+struct sony_sy35560_platform_data {
+	/* Platform info */
+	int reset_gpio;
+	bool reset_high;
+	const char *regulator_id;
+	bool skip_init;
+
+	/* Driver data */
+	int max_supply_voltage;
+	int min_supply_voltage;
+};
+
+struct sony_sy35560_device {
+	struct mcde_display_device base;
+
+	struct regulator *regulator;
+
+	/* ESD workqueue */
+	struct workqueue_struct *esd_wq;
+	struct delayed_work esd_work;
+};
+
+#endif /* __MCDE_DISPLAY_SONY_SY35560__H__ */
+
diff --git a/include/video/mcde_display-vuib500-dpi.h b/include/video/mcde_display-vuib500-dpi.h
new file mode 100644
index 00000000000..94bad83bf97
--- /dev/null
+++ b/include/video/mcde_display-vuib500-dpi.h
@@ -0,0 +1,31 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2010
+ *
+ * ST-Ericsson MCDE DPI display driver
+ *
+ * Author: Torbjorn Svensson <torbjorn.x.svensson@stericsson.com>
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+
+#ifndef __MCDE_DISPLAY_DPI__H__
+#define __MCDE_DISPLAY_DPI__H__
+
+#include <linux/regulator/consumer.h>
+
+#include "mcde_display.h"
+
+struct mcde_display_dpi_platform_data {
+	/* Platform info */
+	int reset_gpio;
+	bool reset_high;
+	const char *regulator_id;
+	int reset_delay;
+
+	/* Driver data */
+	struct regulator *regulator;
+	int max_supply_voltage;
+	int min_supply_voltage;
+};
+#endif /* __MCDE_DISPLAY_DPI__H__ */
diff --git a/include/video/mcde_display.h b/include/video/mcde_display.h
new file mode 100644
index 00000000000..aa184cb6162
--- /dev/null
+++ b/include/video/mcde_display.h
@@ -0,0 +1,139 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2010
+ *
+ * ST-Ericsson MCDE display driver
+ *
+ * Author: Marcus Lorentzon <marcus.xm.lorentzon@stericsson.com>
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+#ifndef __MCDE_DISPLAY__H__
+#define __MCDE_DISPLAY__H__
+
+#include <linux/device.h>
+#include <linux/pm.h>
+
+#include <video/mcde.h>
+
+#define UPDATE_FLAG_PIXEL_FORMAT	0x1
+#define UPDATE_FLAG_VIDEO_MODE		0x2
+#define UPDATE_FLAG_ROTATION		0x4
+
+#define to_mcde_display_device(__dev) \
+	container_of((__dev), struct mcde_display_device, dev)
+
+struct mcde_display_device {
+	/* MCDE driver static */
+	struct device     dev;
+	const char       *name;
+	int               id;
+	struct mcde_port *port;
+
+	/* MCDE dss driver internal */
+	bool initialized;
+	enum mcde_chnl chnl_id;
+	enum mcde_fifo fifo;
+	bool first_update;
+
+	bool enabled;
+	struct mcde_chnl_state *chnl_state;
+	struct list_head ovlys;
+	struct mcde_rectangle update_area;
+	/* TODO: Remove once ESRAM allocator is done */
+	u32 rotbuf1;
+	u32 rotbuf2;
+
+	/* Display driver internal */
+	u16 native_x_res;
+	u16 native_y_res;
+	u16 physical_width;
+	u16 physical_height;
+	enum mcde_display_power_mode power_mode;
+	enum mcde_ovly_pix_fmt default_pixel_format;
+	enum mcde_ovly_pix_fmt pixel_format;
+	enum mcde_display_rotation rotation;
+	bool synchronized_update;
+	struct mcde_video_mode video_mode;
+	int update_flags;
+
+	/* Driver API */
+	void (*get_native_resolution)(struct mcde_display_device *dev,
+		u16 *x_res, u16 *y_res);
+	enum mcde_ovly_pix_fmt (*get_default_pixel_format)(
+		struct mcde_display_device *dev);
+	void (*get_physical_size)(struct mcde_display_device *dev,
+		u16 *x_size, u16 *y_size);
+
+	int (*set_power_mode)(struct mcde_display_device *dev,
+		enum mcde_display_power_mode power_mode);
+	enum mcde_display_power_mode (*get_power_mode)(
+		struct mcde_display_device *dev);
+
+	int (*try_video_mode)(struct mcde_display_device *dev,
+		struct mcde_video_mode *video_mode);
+	int (*set_video_mode)(struct mcde_display_device *dev,
+		struct mcde_video_mode *video_mode);
+	void (*get_video_mode)(struct mcde_display_device *dev,
+		struct mcde_video_mode *video_mode);
+
+	int (*set_pixel_format)(struct mcde_display_device *dev,
+		enum mcde_ovly_pix_fmt pix_fmt);
+	enum mcde_ovly_pix_fmt (*get_pixel_format)(
+		struct mcde_display_device *dev);
+	enum mcde_port_pix_fmt (*get_port_pixel_format)(
+		struct mcde_display_device *dev);
+
+	int (*set_rotation)(struct mcde_display_device *dev,
+		enum mcde_display_rotation rotation);
+	enum mcde_display_rotation (*get_rotation)(
+		struct mcde_display_device *dev);
+
+	int (*set_synchronized_update)(struct mcde_display_device *dev,
+		bool enable);
+	bool (*get_synchronized_update)(struct mcde_display_device *dev);
+
+	int (*apply_config)(struct mcde_display_device *dev);
+	int (*invalidate_area)(struct mcde_display_device *dev,
+						struct mcde_rectangle *area);
+	int (*update)(struct mcde_display_device *dev);
+	int (*prepare_for_update)(struct mcde_display_device *dev,
+		u16 x, u16 y, u16 w, u16 h);
+	int (*on_first_update)(struct mcde_display_device *dev);
+	int (*platform_enable)(struct mcde_display_device *dev);
+	int (*platform_disable)(struct mcde_display_device *dev);
+};
+
+struct mcde_display_driver {
+	int (*probe)(struct mcde_display_device *dev);
+	int (*remove)(struct mcde_display_device *dev);
+	void (*shutdown)(struct mcde_display_device *dev);
+	int (*suspend)(struct mcde_display_device *dev,
+		pm_message_t state);
+	int (*resume)(struct mcde_display_device *dev);
+
+	struct device_driver driver;
+};
+
+/* MCDE dsi (Used by MCDE display drivers) */
+
+int mcde_display_dsi_dcs_write(struct mcde_display_device *dev,
+	u8 cmd, u8 *data, int len);
+int mcde_display_dsi_dcs_read(struct mcde_display_device *dev,
+	u8 cmd, u8 *data, int *len);
+int mcde_display_dsi_bta_sync(struct mcde_display_device *dev);
+
+/* MCDE display bus */
+
+int mcde_display_driver_register(struct mcde_display_driver *drv);
+void mcde_display_driver_unregister(struct mcde_display_driver *drv);
+int mcde_display_device_register(struct mcde_display_device *dev);
+void mcde_display_device_unregister(struct mcde_display_device *dev);
+
+void mcde_display_init_device(struct mcde_display_device *dev);
+
+int mcde_display_init(void);
+void mcde_display_exit(void);
+
+#endif /* __MCDE_DISPLAY__H__ */
+
diff --git a/include/video/mcde_dss.h b/include/video/mcde_dss.h
new file mode 100644
index 00000000000..6a149a5dee6
--- /dev/null
+++ b/include/video/mcde_dss.h
@@ -0,0 +1,79 @@
+/*
+ * Copyright (C) ST-Ericsson AB 2010
+ *
+ * ST-Ericsson MCDE display sub system driver
+ *
+ * Author: Marcus Lorentzon <marcus.xm.lorentzon@stericsson.com>
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+#ifndef __MCDE_DSS__H__
+#define __MCDE_DSS__H__
+
+#include <linux/kobject.h>
+#include <linux/notifier.h>
+
+#include "mcde.h"
+#include "mcde_display.h"
+
+/* Public MCDE dss (Used by MCDE fb ioctl & MCDE display sysfs) */
+int mcde_dss_open_channel(struct mcde_display_device *ddev);
+void mcde_dss_close_channel(struct mcde_display_device *ddev);
+int mcde_dss_enable_display(struct mcde_display_device *ddev);
+void mcde_dss_disable_display(struct mcde_display_device *ddev);
+int mcde_dss_apply_channel(struct mcde_display_device *ddev);
+struct mcde_overlay *mcde_dss_create_overlay(struct mcde_display_device *ddev,
+	struct mcde_overlay_info *info);
+void mcde_dss_destroy_overlay(struct mcde_overlay *ovl);
+int mcde_dss_enable_overlay(struct mcde_overlay *ovl);
+void mcde_dss_disable_overlay(struct mcde_overlay *ovl);
+int mcde_dss_apply_overlay(struct mcde_overlay *ovl,
+						struct mcde_overlay_info *info);
+int mcde_dss_update_overlay(struct mcde_overlay *ovl);
+
+void mcde_dss_get_native_resolution(struct mcde_display_device *ddev,
+	u16 *x_res, u16 *y_res);
+enum mcde_ovl_pix_fmt mcde_dss_get_default_color_format(
+	struct mcde_display_device *ddev);
+void mcde_dss_get_physical_size(struct mcde_display_device *ddev,
+	u16 *x_size, u16 *y_size); /* mm */
+
+int mcde_dss_try_video_mode(struct mcde_display_device *ddev,
+	struct mcde_video_mode *video_mode);
+int mcde_dss_set_video_mode(struct mcde_display_device *ddev,
+	struct mcde_video_mode *video_mode);
+void mcde_dss_get_video_mode(struct mcde_display_device *ddev,
+	struct mcde_video_mode *video_mode);
+
+int mcde_dss_set_pixel_format(struct mcde_display_device *ddev,
+	enum mcde_ovly_pix_fmt pix_fmt);
+int mcde_dss_get_pixel_format(struct mcde_display_device *ddev);
+
+int mcde_dss_set_rotation(struct mcde_display_device *ddev,
+	enum mcde_display_rotation rotation);
+enum mcde_display_rotation mcde_dss_get_rotation(
+	struct mcde_display_device *ddev);
+
+int mcde_dss_set_synchronized_update(struct mcde_display_device *ddev,
+	bool enable);
+bool mcde_dss_get_synchronized_update(struct mcde_display_device *ddev);
+
+/* MCDE dss events */
+
+/*      A display device and driver has been loaded, probed and bound */
+#define MCDE_DSS_EVENT_DISPLAY_REGISTERED    1
+/*      A display device has been removed */
+#define MCDE_DSS_EVENT_DISPLAY_UNREGISTERED  2
+
+/*      Note! Notifier callback will be called holding the dev sem */
+int mcde_dss_register_notifier(struct notifier_block *nb);
+int mcde_dss_unregister_notifier(struct notifier_block *nb);
+
+/* MCDE dss driver */
+
+int mcde_dss_init(void);
+void mcde_dss_exit(void);
+
+#endif /* __MCDE_DSS__H__ */
+
diff --git a/include/video/mcde_fb.h b/include/video/mcde_fb.h
new file mode 100644
index 00000000000..60d8b244688
--- /dev/null
+++ b/include/video/mcde_fb.h
@@ -0,0 +1,65 @@
+/*
+ * Copyright (C) ST-Ericsson AB 2010
+ *
+ * ST-Ericsson MCDE display sub system frame buffer driver
+ *
+ * Author: Marcus Lorentzon <marcus.xm.lorentzon@stericsson.com>
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+#ifndef __MCDE_FB__H__
+#define __MCDE_FB__H__
+
+#include <linux/fb.h>
+#include <linux/ioctl.h>
+#if !defined(__KERNEL__) && !defined(_KERNEL)
+#include <stdint.h>
+#else
+#include <linux/types.h>
+#include <linux/hwmem.h>
+#endif
+
+#ifdef __KERNEL__
+#include "mcde_dss.h"
+#ifdef CONFIG_HAS_EARLYSUSPEND
+#include <linux/earlysuspend.h>
+#endif
+#endif
+
+#define MCDE_GET_BUFFER_NAME_IOC _IO('M', 1)
+
+#ifdef __KERNEL__
+#define to_mcde_fb(x) ((struct mcde_fb *)(x)->par)
+
+#define MCDE_FB_MAX_NUM_OVERLAYS 3
+
+struct mcde_fb {
+	int num_ovlys;
+	struct mcde_overlay *ovlys[MCDE_FB_MAX_NUM_OVERLAYS];
+	u32 pseudo_palette[17];
+	enum mcde_ovly_pix_fmt pix_fmt;
+	int id;
+	struct hwmem_alloc *alloc;
+	int alloc_name;
+#ifdef CONFIG_HAS_EARLYSUSPEND
+	struct early_suspend early_suspend;
+#endif
+};
+
+/* MCDE fbdev API */
+struct fb_info *mcde_fb_create(struct mcde_display_device *ddev,
+		uint16_t w, uint16_t h, uint16_t vw, uint16_t vh,
+		enum mcde_ovly_pix_fmt pix_fmt,	uint32_t rotate);
+
+int mcde_fb_attach_overlay(struct fb_info *fb_info,
+	struct mcde_overlay *ovl);
+void mcde_fb_destroy(struct fb_info *fb_info);
+
+/* MCDE fb driver */
+int mcde_fb_init(void);
+void mcde_fb_exit(void);
+#endif
+
+#endif /* __MCDE_FB__H__ */
+
-- 
cgit v1.2.3


From 0f141847fc8ee4cdb103c3113a4217c089839dce Mon Sep 17 00:00:00 2001
From: "Mathieu J. Poirier" <mathieu.poirier@linaro.org>
Date: Tue, 29 Mar 2011 16:51:43 -0600
Subject: Porting av8100 portion of video driver from .35 to .38

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
---
 drivers/video/Kconfig              |    3 +
 drivers/video/Makefile             |    2 +
 drivers/video/av8100/Kconfig       |   48 +
 drivers/video/av8100/Makefile      |   10 +
 drivers/video/av8100/av8100.c      | 3617 ++++++++++++++++++++++++++++++++++++
 drivers/video/av8100/av8100_fw.h   | 1165 ++++++++++++
 drivers/video/av8100/av8100_regs.h |  340 ++++
 drivers/video/av8100/hdmi.c        | 2220 ++++++++++++++++++++++
 drivers/video/av8100/hdmi_loc.h    |   67 +
 9 files changed, 7472 insertions(+)
 create mode 100644 drivers/video/av8100/Kconfig
 create mode 100644 drivers/video/av8100/Makefile
 create mode 100644 drivers/video/av8100/av8100.c
 create mode 100644 drivers/video/av8100/av8100_fw.h
 create mode 100644 drivers/video/av8100/av8100_regs.h
 create mode 100644 drivers/video/av8100/hdmi.c
 create mode 100644 drivers/video/av8100/hdmi_loc.h

diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index a290be51a1f..d1901fd219b 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -286,6 +286,8 @@ config FB_CIRRUS
 	  Say N unless you have such a graphics board or plan to get one
 	  before you next recompile the kernel.
 
+source "drivers/video/mcde/Kconfig"
+
 config FB_PM2
 	tristate "Permedia2 support"
 	depends on FB && ((AMIGA && BROKEN) || PCI)
@@ -2415,6 +2417,7 @@ source "drivers/video/omap/Kconfig"
 source "drivers/video/omap2/Kconfig"
 source "drivers/video/exynos/Kconfig"
 source "drivers/video/backlight/Kconfig"
+source "drivers/video/av8100/Kconfig"
 
 if VT
 	source "drivers/video/console/Kconfig"
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index 9356add945b..edaf6b8d921 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -139,6 +139,8 @@ obj-$(CONFIG_FB_SH_MOBILE_MERAM)  += sh_mobile_meram.o
 obj-$(CONFIG_FB_SH_MOBILE_LCDC)	  += sh_mobile_lcdcfb.o
 obj-$(CONFIG_FB_OMAP)             += omap/
 obj-y                             += omap2/
+obj-$(CONFIG_FB_MCDE)		  += mcde/
+obj-$(CONFIG_AV8100)		  += av8100/
 obj-$(CONFIG_XEN_FBDEV_FRONTEND)  += xen-fbfront.o
 obj-$(CONFIG_FB_CARMINE)          += carminefb.o
 obj-$(CONFIG_FB_MB862XX)	  += mb862xx/
diff --git a/drivers/video/av8100/Kconfig b/drivers/video/av8100/Kconfig
new file mode 100644
index 00000000000..40b9943aaa9
--- /dev/null
+++ b/drivers/video/av8100/Kconfig
@@ -0,0 +1,48 @@
+config AV8100
+       tristate "AV8100 driver support(HDMI/CVBS)"
+       default n
+       help
+           Please enable this feature if hdmi/tvout driver support is required.
+
+config HDMI_AV8100_DEBUG
+	bool "HDMI and AV8100 debug messages"
+	default n
+	depends on AV8100
+	---help---
+	  Say Y here if you want the HDMI and AV8100 driver to
+	  output debug messages.
+
+choice
+	prompt "AV8100 HW trig method"
+	default AV8100_HWTRIG_DSI_TE
+
+config AV8100_HWTRIG_INT
+	bool "AV8100 HW trig on INT"
+	depends on AV8100
+	---help---
+	  If you say Y here AV8100 will use HW triggering
+	  from AV8100 INT to MCDE sync0.
+
+config AV8100_HWTRIG_I2SDAT3
+	bool "AV8100 HW trig on I2SDAT3"
+	depends on AV8100
+	---help---
+	  If you say Y here AV8100 will use HW triggering
+	  from AV8100 I2SDAT3 to MCDE sync1.
+
+config AV8100_HWTRIG_DSI_TE
+	bool "AV8100 HW trig on DSI"
+	depends on AV8100
+	---help---
+	  If you say Y here AV8100 will use HW triggering
+	  using DSI TE polling between AV8100 and MCDE.
+
+config AV8100_HWTRIG_NONE
+	bool "AV8100 SW trig"
+	depends on AV8100
+	---help---
+	  If you say Y here AV8100 will use SW triggering
+	  between AV8100 and MCDE.
+
+endchoice
+
diff --git a/drivers/video/av8100/Makefile b/drivers/video/av8100/Makefile
new file mode 100644
index 00000000000..2d3028b18ca
--- /dev/null
+++ b/drivers/video/av8100/Makefile
@@ -0,0 +1,10 @@
+# Make file for compiling and loadable module HDMI
+
+obj-$(CONFIG_AV8100)		+= av8100.o hdmi.o
+
+ifdef CONFIG_HDMI_AV8100_DEBUG
+EXTRA_CFLAGS += -DDEBUG
+endif
+
+clean-files := av8100.o hdmi.o built-in.o modules.order
+
diff --git a/drivers/video/av8100/av8100.c b/drivers/video/av8100/av8100.c
new file mode 100644
index 00000000000..6bacded36df
--- /dev/null
+++ b/drivers/video/av8100/av8100.c
@@ -0,0 +1,3617 @@
+/*
+ * Copyright (C) ST-Ericsson AB 2010
+ *
+ * AV8100 driver
+ *
+ * Author: Per Persson <per.xb.persson@stericsson.com>
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/device.h>
+#include <linux/miscdevice.h>
+#include <linux/platform_device.h>
+#include <linux/i2c.h>
+#include <linux/fs.h>
+#include <linux/gpio.h>
+#include <linux/delay.h>
+#include <linux/kthread.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/timer.h>
+#include <linux/mutex.h>
+#include <linux/slab.h>
+#include <linux/clk.h>
+#include <linux/regulator/consumer.h>
+#include <mach/prcmu-fw-api.h>
+
+#include "av8100_regs.h"
+#include <video/av8100.h>
+#include <video/hdmi.h>
+#include "av8100_fw.h"
+
+/* Interrupts */
+#define AV8100_INT_EVENT 0x1
+#define AV8100_PLUGSTARTUP_EVENT 0x4
+
+#define AV8100_PLUGSTARTUP_TIME 100
+
+/* Standby search time */
+#define AV8100_ON_TIME 1	/* 20 ms step */
+#define AV8100_DENC_OFF_TIME 3	/* 640 ms step if > V1. Not used if V1 */
+#define AV8100_HDMI_OFF_TIME 2	/* 320 ms step if V2. 80 ms step if V1 */
+
+/* Command offsets */
+#define AV8100_COMMAND_OFFSET		0x10
+#define AV8100_COMMAND_MAX_LENGTH	0x81
+#define AV8100_CMD_BUF_OFFSET		(AV8100_COMMAND_OFFSET + 1)
+#define AV8100_2ND_RET_BYTE_OFFSET	(AV8100_COMMAND_OFFSET + 1)
+#define AV8100_CEC_RET_BUF_OFFSET	(AV8100_COMMAND_OFFSET + 4)
+#define AV8100_HDCP_RET_BUF_OFFSET	(AV8100_COMMAND_OFFSET + 2)
+#define AV8100_EDID_RET_BUF_OFFSET	(AV8100_COMMAND_OFFSET + 1)
+#define AV8100_FUSE_CRC_OFFSET		(AV8100_COMMAND_OFFSET + 2)
+#define AV8100_FUSE_PRGD_OFFSET		(AV8100_COMMAND_OFFSET + 3)
+#define AV8100_CRC32_OFFSET		(AV8100_COMMAND_OFFSET + 2)
+#define AV8100_CEC_ADDR_OFFSET		(AV8100_COMMAND_OFFSET + 3)
+
+/* Tearing effect line numbers */
+#define AV8100_TE_LINE_NB_14	14
+#define AV8100_TE_LINE_NB_17	17
+#define AV8100_TE_LINE_NB_18	18
+#define AV8100_TE_LINE_NB_21	21
+#define AV8100_TE_LINE_NB_22	22
+#define AV8100_TE_LINE_NB_30	30
+#define AV8100_TE_LINE_NB_38	38
+#define AV8100_TE_LINE_NB_40	40
+#define AV8100_UI_X4_DEFAULT	6
+
+#define HDMI_REQUEST_FOR_REVOCATION_LIST_INPUT 2
+#define HDMI_CEC_MESSAGE_WRITE_BUFFER_SIZE 16
+#define HDMI_HDCP_SEND_KEY_SIZE 7
+#define HDMI_INFOFRAME_DATA_SIZE 28
+#define HDMI_FUSE_AES_KEY_SIZE 16
+#define HDMI_FUSE_AES_KEY_RET_SIZE 2
+#define HDMI_LOADAES_END_BLK_NR 145
+#define HDMI_CRC32_SIZE 4
+#define HDMI_REVOC_LIST_SIZE 30
+#define HDMI_EDIDREAD_SIZE 0x7F
+
+#define HPDS_INVALID 0xF
+#define CPDS_INVALID 0xF
+#define CECRX_INVALID 0xF
+
+#define REG_16_8_LSB(p)		((u8)(p & 0xFF))
+#define REG_16_8_MSB(p)		((u8)((p & 0xFF00)>>8))
+#define REG_32_8_MSB(p)		((u8)((p & 0xFF000000)>>24))
+#define REG_32_8_MMSB(p)	((u8)((p & 0x00FF0000)>>16))
+#define REG_32_8_MLSB(p)	((u8)((p & 0x0000FF00)>>8))
+#define REG_32_8_LSB(p)		((u8)(p & 0x000000FF))
+#define REG_10_8_MSB(p)		((u8)((p & 0x300)>>8))
+#define REG_12_8_MSB(p)		((u8)((p & 0xf00)>>8))
+
+#define AV8100_POWERON_WAITTIME1_MS 1
+#define AV8100_POWERON_WAITTIME2_MS 1
+#define AV8100_CMD_RET_WAITTIME_MS 1
+#define AV8100_CMD_RET_TRIES 10
+#define AV8100_FWDL_WAITTIME1 10
+#define AV8100_FWDL_WAITTIME2 1
+#define AV8100_FWDL_TRIES 10
+
+/* Master clock timing */
+#define MCLK_RNG_17_22	0	/* Use with 19.2 MHZ clock */
+#define MCLK_RNG_22_27	1
+#define MCLK_RNG_27_33	2
+#define MCLK_RNG_31_38	3	/* Use with 38.4 MHZ clock */
+#define MCLK_RNG_36_44	4
+#define MCLK_RNG_40_49	5
+#define MCLK_RNG_45_55	6
+#define MCLK_RNG_49_60	7
+#define MCLK_RNG_54_66	8
+#define MCLK_RNG_58_71	9
+#define MCLK_RNG_63_77	10
+#define MCLK_RNG_67_82	11
+#define MCLK_RNG_72_88	12
+#define MCLK_RNG_76_93	13
+#define MCLK_RNG_85_104	14
+#define MCLK_RNG_94_115	15
+/*
+ *  Until there is an API for obtaining the input master clock
+ *  frequency, the register value is hard coded.
+ */
+#define MCLK_FREQ	MCLK_RNG_31_38
+
+DEFINE_MUTEX(av8100_hw_mutex);
+#define LOCK_AV8100_HW mutex_lock(&av8100_hw_mutex)
+#define UNLOCK_AV8100_HW mutex_unlock(&av8100_hw_mutex)
+
+struct color_conversion_cmd {
+	unsigned short	c0;
+	unsigned short	c1;
+	unsigned short	c2;
+	unsigned short	c3;
+	unsigned short	c4;
+	unsigned short	c5;
+	unsigned short	c6;
+	unsigned short	c7;
+	unsigned short	c8;
+	unsigned short	aoffset;
+	unsigned short	boffset;
+	unsigned short	coffset;
+	unsigned char	lmax;
+	unsigned char	lmin;
+	unsigned char	cmax;
+	unsigned char	cmin;
+};
+
+struct av8100_config_t {
+	struct i2c_client *client;
+	struct i2c_device_id *id;
+	struct av8100_video_input_format_cmd hdmi_video_input_cmd;
+	struct av8100_audio_input_format_cmd hdmi_audio_input_cmd;
+	struct av8100_video_output_format_cmd hdmi_video_output_cmd;
+	struct av8100_video_scaling_format_cmd hdmi_video_scaling_cmd;
+	enum av8100_color_transform color_transform;
+	struct av8100_cec_message_write_format_cmd
+		hdmi_cec_message_write_cmd;
+	struct av8100_cec_message_read_back_format_cmd
+		hdmi_cec_message_read_back_cmd;
+	struct av8100_denc_format_cmd hdmi_denc_cmd;
+	struct av8100_hdmi_cmd hdmi_cmd;
+	struct av8100_hdcp_send_key_format_cmd hdmi_hdcp_send_key_cmd;
+	struct av8100_hdcp_management_format_cmd
+		hdmi_hdcp_management_format_cmd;
+	struct av8100_infoframes_format_cmd	hdmi_infoframes_cmd;
+	struct av8100_edid_section_readback_format_cmd
+		hdmi_edid_section_readback_cmd;
+	struct av8100_pattern_generator_format_cmd hdmi_pattern_generator_cmd;
+	struct av8100_fuse_aes_key_format_cmd hdmi_fuse_aes_key_cmd;
+};
+
+enum av8100_plug_state {
+	AV8100_UNPLUGGED,
+	AV8100_PLUGGED_STARTUP,
+	AV8100_PLUGGED
+};
+
+struct av8100_globals_t {
+	int denc_off_time;/* 5 volt time */
+	int hdmi_off_time;/* 5 volt time */
+	int on_time;/* 5 volt time */
+	u8 hpdm;/*stby_int_mask*/
+	u8 cpdm;/*stby_int_mask*/
+	u8 cecm;/*gen_int_mask*/
+	u8 hdcpm;/*gen_int_mask*/
+	void (*hdmi_ev_cb)(enum av8100_hdmi_event);
+	enum av8100_plug_state plug_state;
+	struct clk *inputclk;
+	bool inputclk_requested;
+	bool opp_requested;
+	struct regulator *regulator_pwr;
+	bool regulator_requested;
+};
+
+/**
+ * struct av8100_cea - CEA(consumer electronic access) standard structure
+ * @cea_id:
+ * @cea_nb:
+ * @vtotale:
+ **/
+
+struct av8100_cea {
+	char cea_id[40];
+	int cea_nb;
+	int vtotale;
+	int vactive;
+	int vsbp;
+	int vslen;
+	int vsfp;
+	char vpol[5];
+	int htotale;
+	int hactive;
+	int hbp;
+	int hslen;
+	int hfp;
+	int frequence;
+	char hpol[5];
+	int reg_line_duration;
+	int blkoel_duration;
+	int uix4;
+	int pll_mult;
+	int pll_div;
+};
+
+enum av8100_command_size {
+	AV8100_COMMAND_VIDEO_INPUT_FORMAT_SIZE  = 0x17,
+	AV8100_COMMAND_AUDIO_INPUT_FORMAT_SIZE  = 0x8,
+	AV8100_COMMAND_VIDEO_OUTPUT_FORMAT_SIZE = 0x1E,
+	AV8100_COMMAND_VIDEO_SCALING_FORMAT_SIZE = 0x11,
+	AV8100_COMMAND_COLORSPACECONVERSION_SIZE = 0x1D,
+	AV8100_COMMAND_CEC_MESSAGE_WRITE_SIZE = 0x12,
+	AV8100_COMMAND_CEC_MESSAGE_READ_BACK_SIZE = 0x1,
+	AV8100_COMMAND_DENC_SIZE = 0x6,
+	AV8100_COMMAND_HDMI_SIZE = 0x4,
+	AV8100_COMMAND_HDCP_SENDKEY_SIZE = 0xA,
+	AV8100_COMMAND_HDCP_MANAGEMENT_SIZE = 0x4,
+	AV8100_COMMAND_INFOFRAMES_SIZE = 0x21,
+	AV8100_COMMAND_EDID_SECTION_READBACK_SIZE  = 0x3,
+	AV8100_COMMAND_PATTERNGENERATOR_SIZE  = 0x4,
+	AV8100_COMMAND_FUSE_AES_KEY_SIZE = 0x12,
+	AV8100_COMMAND_FUSE_AES_CHK_SIZE = 0x2,
+};
+
+static void clr_plug_status(enum av8100_plugin_status status);
+static void set_plug_status(enum av8100_plugin_status status);
+static void cec_rx(void);
+static void cec_txerr(void);
+static void hdcp_changed(void);
+static const struct color_conversion_cmd *get_color_transform_cmd(
+				enum av8100_color_transform transform);
+static int av8100_open(struct inode *inode, struct file *filp);
+static int av8100_release(struct inode *inode, struct file *filp);
+static int av8100_ioctl(struct inode *inode, struct file *file,
+	unsigned int cmd, unsigned long arg);
+static int __devinit av8100_probe(struct i2c_client *i2cClient,
+	const struct i2c_device_id *id);
+static int __devexit av8100_remove(struct i2c_client *i2cClient);
+
+static struct av8100_config_t *av8100_config;
+static struct av8100_status	g_av8100_status = {0};
+static struct timer_list av8100_plugtimer;
+static wait_queue_head_t av8100_event;
+static int av8100_flag = 0x0;
+static struct av8100_globals_t *av8100_globals;
+static u8 chip_version;
+static char av8100_receivetab[AV8100_FW_SIZE];
+struct device *av8100dev;
+
+static const struct file_operations av8100_fops = {
+	.owner =    THIS_MODULE,
+	.open =     av8100_open,
+	.release =  av8100_release,
+	//.ioctl is no longer in use - needs fixing
+	//.ioctl = av8100_ioctl
+};
+
+static struct miscdevice av8100_miscdev = {
+	MISC_DYNAMIC_MINOR,
+	"av8100",
+	&av8100_fops
+};
+
+struct av8100_cea av8100_all_cea[29] = {
+/* cea id
+ *	cea_nr	vtot	vact	vsbpp	vslen
+ *	vsfp	vpol	htot	hact	hbp	hslen	hfp	freq
+ *	hpol	rld	bd	uix4	pm	pd */
+{ "0  CUSTOM                            ",
+	0,	0,	0,	0,	0,
+	0,	"-",	800,	640,	16,	96,	10,	25200000,
+	"-",	0,	0,	0,	0,	0},/*Settings to be defined*/
+{ "1  CEA 1 VESA 4 640x480p @ 60 Hz     ",
+	1,	525,	480,	33,	2,
+	10,	"-",	800,	640,	49,	290,	146,	25200000,
+	"-",	2438,	1270,	6,	32,	1},/*RGB888*/
+{ "2  CEA 2 - 3    720x480p @ 60 Hz 4:3 ",
+	2,	525,	480,	30,	6,
+	9,	"-",	858,	720,	34,	130,	128,	27027000,
+	"-",	1828,	0x3C0,	8,	24,	1},/*RGB565*/
+{ "3  CEA 4        1280x720p @ 60 Hz    ",
+	4,	750,	720,	20,	5,
+	5,	"+",	1650,	1280,	114,	39,	228,	74250000,
+	"+",	1706,	164,	6,	32,	1},/*RGB565*/
+{ "4  CEA 5        1920x1080i @ 60 Hz   ",
+	5,	1125,	540,	20,	5,
+	0,	"+",	2200,	1920,	88,	44,	10,	74250000,
+	"+",	0,	0,	0,	0,	0},/*Settings to be define*/
+{ "5  CEA 6-7      480i (NTSC)          ",
+	6,	525,	240,	44,	5,
+	0,	"-",	858,	720,	12,	64,	10,	13513513,
+	"-",	0,	0,	0,	0,	0},/*Settings to be define*/
+{ "6  CEA 14-15    480p @ 60 Hz         ",
+	14,	525,	480,	44,	5,
+	0,	"-",	858,	720,	12,	64,	10,	27027000,
+	"-",	0,	0,	0,	0,	0},/*Settings to be define*/
+{ "7  CEA 16       1920x1080p @ 60 Hz   ",
+	16,	1125,	1080,	36,	5,
+	0,	"+",	1980,	1280,	440,	40,	10,	133650000,
+	"+",	0,	0,	0,	0,	0},/*Settings to be define*/
+{ "8  CEA 17-18    720x576p @ 50 Hz     ",
+	17,	625,	576,	44,	5,
+	0,	"-",	864,	720,	12,	64,	10,	27000000,
+	"-",	0,	0,	0,	0,	0},/*Settings to be define*/
+{ "9  CEA 19       1280x720p @ 50 Hz    ",
+	19,	750,	720,	25,	5,
+	0,	"+",	1980,	1280,	440,	40,	10,	74250000,
+	"+",	0,	0,	0,	0,	0},/*Settings to be define*/
+{ "10 CEA 20       1920 x 1080i @ 50 Hz ",
+	20,	1125,	540,	20,	5,
+	0,	"+",	2640,	1920,	528,	44,	10,	74250000,
+	"+",	0,	0,	0,	0,	0},/*Settings to be define*/
+{ "11 CEA 21-22    576i (PAL)           ",
+	21,	625,	288,	44,	5,
+	0,	"-",	1728,	1440,	12,	64,	10,	27000000,
+	"-",	0,	0,	0,	0,	0},/*Settings to be define*/
+{ "12 CEA 29/30    576p                 ",
+	29,	625,	576,	44,	5,
+	0,	"-",	864,	720,	12,	64,	10,	27000000,
+	"-",	0,	0,	0,	0,	0},/*Settings to be define*/
+{ "13 CEA 31       1080p 50Hz           ",
+	31,	1125,	1080,	44,	5,
+	0,	"-",	2640,	1920,	12,	64,	10,	148500000,
+	"-",	0,	0,	0,	0,	0},/*Settings to be define*/
+{ "14 CEA 32       1920x1080p @ 24 Hz   ",
+	32,	1125,	1080,	36,	5,
+	4,	"+",	2750,	1920,	660,	44,	153,	74250000,
+	"+",	2844,	0x530,	6,	32,	1},/*RGB565*/
+{ "15 CEA 33       1920x1080p @ 25 Hz   ",
+	33,	1125,	1080,	36,	5,
+	4,	"+",	2640,	1920,	528,	44,	10,	74250000,
+	"+",	0,	0,	0,	0,	0},/*Settings to be define*/
+{ "16 CEA 34       1920x1080p @ 30Hz    ",
+	34,	1125,	1080,	36,	5,
+	4,	"+",	2200,	1920,	91,	44,	153,	74250000,
+	"+",	2275,	0xAB,	6,	32,	1},/*RGB565*/
+{ "17 CEA 60       1280x720p @ 24 Hz    ",
+	60,	750,	720,	20,	5,
+	5,	"+",	3300,	1280,	284,	50,	2276,	59400000,
+	"+",	4266,	0xAD0,	5,	32,	1},/*RGB565*/
+{ "18 CEA 61       1280x720p @ 25 Hz    ",
+	61,	750,	720,	20,	5,
+	5,	"+",	3960,	1280,	228,	39,	2503,	74250000,
+	"+",	4096,	0x500,	5,	32,	1},/*RGB565*/
+{ "19 CEA 62       1280x720p @ 30 Hz    ",
+	62,	750,	720,	20,	5,
+	5,	"+",	3300,	1280,	228,	39,	1820,	74250000,
+	"+",	3413,	0x770,	5,	32,	1},/*RGB565*/
+{ "20 VESA 9       800x600 @ 60 Hz      ",
+	109,	628,	600,	28,	4,
+	0,	"+",	1056,	800,	40,	128,	10,	20782080,
+	"+",	0,	0,	0,	0,	0},/*Settings to be define*/
+{ "21 VESA 14      848x480  @ 60 Hz     ",
+	114,	500,	480,	20,	5,
+	0,	"+",	1056,	848,	24,	80,	10,	31680000,
+	"-",	0,	0,	0,	0,	0},/*Settings to be define*/
+{ "22 VESA 16      1024x768 @ 60 Hz     ",
+	116,	806,	768,	38,	6,
+	0,	"-",	1344,	1024,	24,	135,	10,	65000000,
+	"-",	0,	0,	0,	0,	0},/*Settings to be define*/
+{ "23 VESA 22      1280x768 @ 60 Hz     ",
+	122,	802,	768,	34,	4,
+	0,	"+",	1688,	1280,	48,	160,	10,	81250000,
+	"-",	0,	0,	0,	0,	0},/*Settings to be define*/
+{ "24 VESA 23      1280x768 @ 60 Hz     ",
+	123,	798,	768,	30,	7,
+	0,	"+",	1664,	1280,	64,	128,	10,	79500000,
+	"-",	0,	0,	0,	0,	0},/*Settings to be define*/
+{ "25 VESA 27      1280x800 @ 60 Hz     ",
+	127,	823,	800,	23,	6,
+	0,	"+",	1440,	1280,	48,	32,	10,	71000000,
+	"+",	0,	0,	0,	0,	0},/*Settings to be define*/
+{ "26 VESA 28      1280x800 @ 60 Hz     ",
+	128,	831,	800,	31,	6,
+	0,	"+",	1680,	1280,	72,	128,	10,	83500000,
+	"-",	0,	0,	0,	0,	0},/*Settings to be define*/
+{ "27 VESA 39      1360x768 @ 60 Hz     ",
+	139,	790,	768,	22,	5,
+	0,	"-",	1520,	1360,	48,	32,	10,	72000000,
+	"+",	0,	0,	0,	0,	0},/*Settings to be define*/
+{ "28 VESA 81      1360x768 @ 60 Hz     ",
+	181,	798,	768,	30,	5,
+	0,	"+",	1776,	1360,	72,	136,	10,	84750000,
+	"-",	0,	0,	0,	0,	0} /*Settings to be define*/
+};
+
+const struct color_conversion_cmd col_trans_identity = {
+	.c0      = 0x0100, .c1      = 0x0000, .c2      = 0x0000,
+	.c3      = 0x0000, .c4      = 0x0100, .c5      = 0x0000,
+	.c6      = 0x0000, .c7      = 0x0000, .c8      = 0x0100,
+	.aoffset = 0x0000, .boffset = 0x0000, .coffset = 0x0000,
+	.lmax    = 0xff,
+	.lmin    = 0x00,
+	.cmax    = 0xff,
+	.cmin    = 0x00,
+};
+
+const struct color_conversion_cmd col_trans_identity_clamp_yuv = {
+	.c0      = 0x0100, .c1      = 0x0000, .c2      = 0x0000,
+	.c3      = 0x0000, .c4      = 0x0100, .c5      = 0x0000,
+	.c6      = 0x0000, .c7      = 0x0000, .c8      = 0x0100,
+	.aoffset = 0x0000, .boffset = 0x0000, .coffset = 0x0000,
+	.lmax    = 0xeb,
+	.lmin    = 0x10,
+	.cmax    = 0xf0,
+	.cmin    = 0x10,
+};
+
+const struct color_conversion_cmd col_trans_yuv_to_rgb_v1 = {
+	.c0      = 0x0087, .c1      = 0x0000, .c2      = 0x00ba,
+	.c3      = 0x0087, .c4      = 0xffd3, .c5      = 0xffa1,
+	.c6      = 0x0087, .c7      = 0x00eb, .c8      = 0x0000,
+	.aoffset = 0xffab, .boffset = 0x004e, .coffset = 0xff92,
+	.lmax    = 0xff,
+	.lmin    = 0x00,
+	.cmax    = 0xff,
+	.cmin    = 0x00,
+};
+
+const struct color_conversion_cmd col_trans_yuv_to_rgb_v2 = {
+	.c0      = 0x0204, .c1      = 0x012a, .c2      = 0x0000,
+	.c3      = 0xff9c, .c4      = 0x012a, .c5      = 0xff30,
+	.c6      = 0x0000, .c7      = 0x012a, .c8      = 0x0198,
+	.aoffset = 0xfeeb, .boffset = 0x0088, .coffset = 0xff21,
+	.lmax    = 0xff,
+	.lmin    = 0x00,
+	.cmax    = 0xff,
+	.cmin    = 0x00,
+};
+
+const struct color_conversion_cmd col_trans_yuv_to_denc = {
+	.c0      = 0x0100, .c1      = 0x0000, .c2      = 0x0000,
+	.c3      = 0x0000, .c4      = 0x0100, .c5      = 0x0000,
+	.c6      = 0x0000, .c7      = 0x0000, .c8      = 0x0100,
+	.aoffset = 0x0000, .boffset = 0x0000, .coffset = 0x0000,
+	.lmax    = 0xeb,
+	.lmin    = 0x10,
+	.cmax    = 0xf0,
+	.cmin    = 0x10,
+};
+
+const struct color_conversion_cmd col_trans_rgb_to_denc = {
+	.c0      = 0x0070, .c1      = 0xffb6, .c2      = 0xffda,
+	.c3      = 0x0019, .c4      = 0x0081, .c5      = 0x0042,
+	.c6      = 0xffee, .c7      = 0xffa2, .c8      = 0x0070,
+	.aoffset = 0x007f, .boffset = 0x0010, .coffset = 0x007f,
+	.lmax    = 0xff,
+	.lmin    = 0x00,
+	.cmax    = 0xff,
+	.cmin    = 0x00,
+};
+
+static const struct i2c_device_id av8100_id[] = {
+	{ "av8100", 0 },
+	{ }
+};
+
+static struct i2c_driver av8100_driver = {
+	.probe	= av8100_probe,
+	.remove = av8100_remove,
+	.driver = {
+		.name	= "av8100",
+	},
+	.id_table	= av8100_id,
+};
+
+static void av8100_plugtimer_int(unsigned long value)
+{
+	av8100_flag |= AV8100_PLUGSTARTUP_EVENT;
+	wake_up_interruptible(&av8100_event);
+	del_timer(&av8100_plugtimer);
+}
+
+static int av8100_int_event_handle(void)
+{
+	u8 hpdi = 0;
+	u8 cpdi = 0;
+	u8 hdcpi = 0;
+	u8 ceci = 0;
+	u8 hpds = 0;
+	u8 cpds = 0;
+	u8 hdcps = 0;
+	u8 cectxerr = 0;
+	u8 cecrx = 0;
+	u8 cectx = 0;
+
+	if (!av8100_globals)
+		return -EINVAL;
+
+	/* STANDBY_PENDING_INTERRUPT reg */
+	if (av8100_reg_stby_pend_int_r(&hpdi, &cpdi, NULL, NULL)) {
+		dev_dbg(av8100dev, "av8100_reg_stby_pend_int_r failed\n");
+		goto av8100_int_event_handle_1;
+	}
+
+	/* Plug event */
+	if (hpdi | cpdi) {
+		/* Clear pending interrupts */
+		(void)av8100_reg_stby_pend_int_w(1, 1, 1);
+
+		/* STANDBY reg */
+		if (av8100_reg_stby_r(NULL, NULL, &hpds, &cpds, NULL)) {
+			dev_dbg(av8100dev, "av8100_reg_stby_r failed\n");
+			goto av8100_int_event_handle_1;
+		}
+	}
+
+	if (cpdi & av8100_globals->cpdm) {
+		/* TVout plugin change */
+		if (cpds) {
+			dev_dbg(av8100dev, "cpds 1\n");
+			set_plug_status(AV8100_CVBS_PLUGIN);
+		} else {
+			dev_dbg(av8100dev, "cpds 0\n");
+			clr_plug_status(AV8100_CVBS_PLUGIN);
+		}
+	}
+
+	if (hpdi & av8100_globals->hpdm) {
+		/* HDMI plugin change */
+		if (hpds) {
+			dev_dbg(av8100dev, "hpds 1\n");
+			set_plug_status(AV8100_HDMI_PLUGIN);
+		} else {
+			dev_dbg(av8100dev, "hpds 0\n");
+			clr_plug_status(AV8100_HDMI_PLUGIN);
+		}
+	}
+
+av8100_int_event_handle_1:
+	/* GENERAL_INTERRUPT reg */
+	if (av8100_reg_gen_int_r(NULL, NULL, NULL, &ceci,
+			&hdcpi, NULL, NULL)) {
+		dev_dbg(av8100dev, "av8100_reg_stby_pend_int_r failed\n");
+		return -EINVAL;
+	}
+
+	/* CEC or HDCP event */
+	if (ceci | hdcpi) {
+		/* Clear pending interrupts */
+		av8100_reg_gen_int_w(1, 1, 1, 1, 1, 1);
+
+		/* GENERAL_STATUS reg */
+		if (av8100_reg_gen_status_r(&cectxerr, &cecrx, &cectx, NULL,
+				NULL, &hdcps) != 0) {
+			dev_dbg(av8100dev, "av8100_reg_gen_status_r fail\n");
+			return -EINVAL;
+		}
+	}
+
+	/* CEC received */
+	if (ceci && cecrx) {
+		dev_dbg(av8100dev, "cecrx\n");
+		/* Report CEC event */
+		cec_rx();
+	}
+
+	/* CEC tx error */
+	if (ceci && cectx && cectxerr) {
+		dev_dbg(av8100dev, "cectxerr\n");
+		/* Report CEC tx error event */
+		cec_txerr();
+	}
+
+	/* HDCP event */
+	if (hdcpi) {
+		dev_dbg(av8100dev, "hdcpch:%0x\n", hdcps);
+		/* Report HDCP status change event */
+		hdcp_changed();
+	}
+
+	return 0;
+}
+
+static int av8100_plugstartup_event_handle(void)
+{
+	u8 hpds = 0;
+	u8 cpds = 0;
+
+	if (!av8100_globals)
+		return -EINVAL;
+
+	switch (av8100_globals->plug_state) {
+	case AV8100_UNPLUGGED:
+	case AV8100_PLUGGED:
+	default:
+		break;
+
+	case AV8100_PLUGGED_STARTUP:
+		/* Unmask interrupt */
+		av8100_globals->hpdm = AV8100_STANDBY_INTERRUPT_MASK_HPDM_HIGH;
+		if (av8100_reg_stby_int_mask_w(av8100_globals->hpdm,
+			av8100_globals->cpdm,
+			AV8100_STANDBY_INTERRUPT_MASK_STBYGPIOCFG_INPUT,
+			AV8100_STANDBY_INTERRUPT_MASK_IPOL_LOW)) {
+			dev_dbg(av8100dev,
+				"av8100_reg_stby_int_mask_w fail\n");
+		}
+
+		/* Get actual plug status */
+		if (av8100_reg_stby_r(NULL, NULL, &hpds, &cpds,	NULL))
+			dev_dbg(av8100dev, "av8100_reg_stby_r fail\n");
+
+		/* Set plugstate */
+		if (hpds) {
+			av8100_globals->plug_state = AV8100_PLUGGED;
+			dev_dbg(av8100dev, "plug_state:2\n");
+		} else {
+			av8100_globals->plug_state = AV8100_UNPLUGGED;
+			dev_dbg(av8100dev, "plug_state:0\n");
+		}
+		break;
+	}
+
+	return 0;
+}
+
+static int av8100_thread(void *p)
+{
+	u8 flags;
+
+	while (1) {
+		wait_event_interruptible(av8100_event, (av8100_flag != 0));
+		flags = av8100_flag;
+		av8100_flag = 0;
+
+		if (!av8100_globals ||
+			g_av8100_status.av8100_state < AV8100_OPMODE_STANDBY)
+			continue;
+
+		if (flags & AV8100_INT_EVENT)
+			(void)av8100_int_event_handle();
+
+		if (flags & AV8100_PLUGSTARTUP_EVENT)
+			(void)av8100_plugstartup_event_handle();
+	}
+
+	return 0;
+}
+
+static irqreturn_t av8100_intr_handler(int irq, void *p)
+{
+	av8100_flag |= AV8100_INT_EVENT;
+	wake_up_interruptible(&av8100_event);
+	return IRQ_HANDLED;
+}
+
+static u16 av8100_get_te_line_nb(
+	enum av8100_output_CEA_VESA output_video_format)
+{
+	u16 retval;
+
+	switch (output_video_format) {
+	case AV8100_CEA1_640X480P_59_94HZ:
+	case AV8100_CEA2_3_720X480P_59_94HZ:
+		retval = AV8100_TE_LINE_NB_30;
+		break;
+
+	case AV8100_CEA5_1920X1080I_60HZ:
+	case AV8100_CEA6_7_NTSC_60HZ:
+	case AV8100_CEA20_1920X1080I_50HZ:
+	case AV8100_CEA21_22_576I_PAL_50HZ:
+		retval = AV8100_TE_LINE_NB_18;
+		break;
+
+	case AV8100_CEA4_1280X720P_60HZ:
+		retval = AV8100_TE_LINE_NB_21;
+		break;
+
+	case AV8100_CEA17_18_720X576P_50HZ:
+		retval = AV8100_TE_LINE_NB_40;
+		break;
+
+	case AV8100_CEA19_1280X720P_50HZ:
+		retval = AV8100_TE_LINE_NB_22;
+		break;
+
+	case AV8100_CEA32_1920X1080P_24HZ:
+	case AV8100_CEA33_1920X1080P_25HZ:
+	case AV8100_CEA34_1920X1080P_30HZ:
+		retval = AV8100_TE_LINE_NB_38;
+		break;
+
+	case AV8100_CEA60_1280X720P_24HZ:
+	case AV8100_CEA62_1280X720P_30HZ:
+		retval = AV8100_TE_LINE_NB_21;
+		break;
+
+	case AV8100_CEA14_15_480p_60HZ:
+	case AV8100_VESA14_848X480P_60HZ:
+	case AV8100_CEA61_1280X720P_25HZ:
+	case AV8100_CEA16_1920X1080P_60HZ:
+	case AV8100_CEA31_1920x1080P_50Hz:
+	case AV8100_CEA29_30_576P_50HZ:
+	case AV8100_VESA9_800X600P_60_32HZ:
+	case AV8100_VESA16_1024X768P_60HZ:
+	case AV8100_VESA22_1280X768P_59_99HZ:
+	case AV8100_VESA23_1280X768P_59_87HZ:
+	case AV8100_VESA27_1280X800P_59_91HZ:
+	case AV8100_VESA28_1280X800P_59_81HZ:
+	case AV8100_VESA39_1360X768P_60_02HZ:
+	case AV8100_VESA81_1366X768P_59_79HZ:
+	default:
+		/* TODO */
+		retval = AV8100_TE_LINE_NB_14;
+		break;
+	}
+
+	return retval;
+}
+
+static u16 av8100_get_ui_x4(
+	enum av8100_output_CEA_VESA output_video_format)
+{
+	return AV8100_UI_X4_DEFAULT;
+}
+
+static int av8100_config_video_output_dep(enum av8100_output_CEA_VESA
+	output_format)
+{
+	int retval;
+	union av8100_configuration config;
+
+	/* video input */
+	config.video_input_format.dsi_input_mode =
+		AV8100_HDMI_DSI_COMMAND_MODE;
+	config.video_input_format.input_pixel_format = AV8100_INPUT_PIX_RGB565;
+	config.video_input_format.total_horizontal_pixel =
+		av8100_all_cea[output_format].htotale;
+	config.video_input_format.total_horizontal_active_pixel =
+		av8100_all_cea[output_format].hactive;
+	config.video_input_format.total_vertical_lines =
+		av8100_all_cea[output_format].vtotale;
+	config.video_input_format.total_vertical_active_lines =
+		av8100_all_cea[output_format].vactive;
+
+	switch (output_format) {
+	case AV8100_CEA5_1920X1080I_60HZ:
+	case AV8100_CEA20_1920X1080I_50HZ:
+	case AV8100_CEA21_22_576I_PAL_50HZ:
+	case AV8100_CEA6_7_NTSC_60HZ:
+		config.video_input_format.video_mode =
+			AV8100_VIDEO_INTERLACE;
+		break;
+
+	default:
+		config.video_input_format.video_mode =
+			AV8100_VIDEO_PROGRESSIVE;
+		break;
+	}
+
+	config.video_input_format.nb_data_lane =
+		AV8100_DATA_LANES_USED_2;
+	config.video_input_format.nb_virtual_ch_command_mode = 0;
+	config.video_input_format.nb_virtual_ch_video_mode = 0;
+	config.video_input_format.ui_x4 = av8100_get_ui_x4(output_format);
+	config.video_input_format.TE_line_nb = av8100_get_te_line_nb(
+		output_format);
+	config.video_input_format.TE_config = AV8100_TE_OFF;
+	config.video_input_format.master_clock_freq = 0;
+
+	retval = av8100_conf_prep(
+		AV8100_COMMAND_VIDEO_INPUT_FORMAT, &config);
+	if (retval)
+		return -EFAULT;
+
+	/* DENC */
+	switch (output_format) {
+	case AV8100_CEA21_22_576I_PAL_50HZ:
+		config.denc_format.cvbs_video_format = AV8100_CVBS_625;
+		config.denc_format.standard_selection = AV8100_PAL_BDGHI;
+		break;
+
+	case AV8100_CEA6_7_NTSC_60HZ:
+		config.denc_format.cvbs_video_format = AV8100_CVBS_525;
+		config.denc_format.standard_selection = AV8100_NTSC_M;
+		break;
+
+	default:
+		/* Not supported */
+		break;
+	}
+
+	return 0;
+}
+
+static int av8100_config_init(void)
+{
+	int retval;
+	union av8100_configuration config;
+
+	dev_dbg(av8100dev, "%s\n", __func__);
+
+	av8100_config = kzalloc(sizeof(struct av8100_config_t), GFP_KERNEL);
+	if (!av8100_config) {
+		dev_err(av8100dev, "%s: Failed to allocate config\n", __func__);
+		return AV8100_FAIL;
+	}
+
+	memset(&config, 0, sizeof(union av8100_configuration));
+	memset(av8100_config, 0, sizeof(union av8100_configuration));
+
+	/* Color conversion */
+	config.color_transform = AV8100_COLOR_TRANSFORM_INDENTITY;
+	retval = av8100_conf_prep(
+		AV8100_COMMAND_COLORSPACECONVERSION, &config);
+	if (retval)
+		return -EFAULT;
+
+	/* DENC */
+	config.denc_format.cvbs_video_format = AV8100_CVBS_625;
+	config.denc_format.standard_selection = AV8100_PAL_BDGHI;
+	config.denc_format.enable = 0;
+	config.denc_format.macrovision_enable = 0;
+	config.denc_format.internal_generator = 0;
+
+	/* Video output */
+	config.video_output_format.video_output_cea_vesa =
+		AV8100_CEA4_1280X720P_60HZ;
+
+	retval = av8100_conf_prep(
+		AV8100_COMMAND_VIDEO_OUTPUT_FORMAT, &config);
+	if (retval)
+		return -EFAULT;
+
+	/* Video input */
+	av8100_config_video_output_dep(
+		config.video_output_format.video_output_cea_vesa);
+
+	/* Pattern generator */
+	config.pattern_generator_format.pattern_audio_mode =
+		AV8100_PATTERN_AUDIO_OFF;
+	config.pattern_generator_format.pattern_type =
+		AV8100_PATTERN_GENERATOR;
+	config.pattern_generator_format.pattern_video_format =
+		AV8100_PATTERN_720P;
+	retval = av8100_conf_prep(AV8100_COMMAND_PATTERNGENERATOR,
+		&config);
+	if (retval)
+		return -EFAULT;
+
+	/* Audio input */
+	config.audio_input_format.audio_input_if_format	=
+		AV8100_AUDIO_I2SDELAYED_MODE;
+	config.audio_input_format.i2s_input_nb = 1;
+	config.audio_input_format.sample_audio_freq = AV8100_AUDIO_FREQ_48KHZ;
+	config.audio_input_format.audio_word_lg = AV8100_AUDIO_16BITS;
+	config.audio_input_format.audio_format = AV8100_AUDIO_LPCM_MODE;
+	config.audio_input_format.audio_if_mode = AV8100_AUDIO_MASTER;
+	config.audio_input_format.audio_mute = AV8100_AUDIO_MUTE_DISABLE;
+	retval = av8100_conf_prep(
+		AV8100_COMMAND_AUDIO_INPUT_FORMAT, &config);
+	if (retval)
+		return -EFAULT;
+
+	/* HDMI mode */
+	config.hdmi_format.hdmi_mode	= AV8100_HDMI_ON;
+	config.hdmi_format.hdmi_format	= AV8100_HDMI;
+	config.hdmi_format.dvi_format	= AV8100_DVI_CTRL_CTL0;
+	retval = av8100_conf_prep(AV8100_COMMAND_HDMI, &config);
+	if (retval)
+		return -EFAULT;
+
+	/* EDID section readback */
+	config.edid_section_readback_format.address = 0xA0;
+	config.edid_section_readback_format.block_number = 0;
+	retval = av8100_conf_prep(
+		AV8100_COMMAND_EDID_SECTION_READBACK, &config);
+	if (retval)
+		return -EFAULT;
+
+	return 0;
+}
+
+static void av8100_config_exit(void)
+{
+	dev_dbg(av8100dev, "%s\n", __func__);
+
+	kfree(av8100_config);
+	av8100_config = NULL;
+}
+
+static int av8100_globals_init(void)
+{
+	dev_dbg(av8100dev, "%s\n", __func__);
+
+	av8100_globals = kzalloc(sizeof(struct av8100_globals_t), GFP_KERNEL);
+	if (!av8100_globals) {
+		dev_err(av8100dev, "%s: Alloc failure\n", __func__);
+		return AV8100_FAIL;
+	}
+
+	av8100_globals->denc_off_time = AV8100_DENC_OFF_TIME;
+	av8100_globals->hdmi_off_time = AV8100_HDMI_OFF_TIME;
+	av8100_globals->on_time = AV8100_ON_TIME;
+
+	av8100_globals->hpdm = AV8100_STANDBY_INTERRUPT_MASK_HPDM_HIGH;
+	av8100_globals->cpdm = AV8100_STANDBY_INTERRUPT_MASK_CPDM_HIGH;
+	av8100_globals->hdcpm = AV8100_GENERAL_INTERRUPT_MASK_HDCPM_HIGH;
+	av8100_globals->cecm = AV8100_GENERAL_INTERRUPT_MASK_CECM_HIGH;
+
+	av8100_globals->plug_state = AV8100_UNPLUGGED;
+	av8100_globals->inputclk = NULL;
+	av8100_globals->inputclk_requested = false;
+	av8100_globals->opp_requested = false;
+	av8100_globals->regulator_requested = false;
+
+	return 0;
+}
+
+static void av8100_globals_exit(void)
+{
+	dev_dbg(av8100dev, "%s\n", __func__);
+
+	kfree(av8100_globals);
+	av8100_globals = NULL;
+}
+
+static void clr_plug_status(enum av8100_plugin_status status)
+{
+	g_av8100_status.av8100_plugin_status &= ~status;
+
+	switch (status) {
+	case AV8100_HDMI_PLUGIN:
+		if (!av8100_globals)
+			return;
+
+		switch (av8100_globals->plug_state) {
+		case AV8100_UNPLUGGED:
+		case AV8100_PLUGGED_STARTUP:
+		default:
+			break;
+
+		case AV8100_PLUGGED:
+			av8100_globals->plug_state =
+				AV8100_UNPLUGGED;
+			dev_dbg(av8100dev, "plug_state:0\n");
+			break;
+		}
+
+		if (av8100_globals->hdmi_ev_cb)
+			av8100_globals->hdmi_ev_cb(
+				AV8100_HDMI_EVENT_HDMI_PLUGOUT);
+		break;
+
+	case AV8100_CVBS_PLUGIN:
+		/* TODO */
+		break;
+
+	default:
+		break;
+	}
+}
+
+static void set_plug_status(enum av8100_plugin_status status)
+{
+	g_av8100_status.av8100_plugin_status |= status;
+
+	switch (status) {
+	case AV8100_HDMI_PLUGIN:
+		if (!av8100_globals)
+			return;
+
+		switch (av8100_globals->plug_state) {
+		case AV8100_UNPLUGGED:
+			av8100_globals->plug_state =
+				AV8100_PLUGGED_STARTUP;
+
+			dev_dbg(av8100dev, "plug_state:1\n");
+
+			/*
+			 * Mask interrupts to avoid plug detect during
+			 * startup
+			 *  */
+			av8100_globals->hpdm =
+				AV8100_STANDBY_INTERRUPT_MASK_HPDM_LOW;
+			if (av8100_reg_stby_int_mask_w(
+				av8100_globals->hpdm,
+				av8100_globals->cpdm,
+				AV8100_STANDBY_INTERRUPT_MASK_STBYGPIOCFG_INPUT,
+				AV8100_STANDBY_INTERRUPT_MASK_IPOL_LOW)) {
+				dev_dbg(av8100dev,
+					"av8100_reg_stby_int_mask_w"
+					"fail\n");
+			}
+
+			/* Set plug startup timer */
+			init_timer(&av8100_plugtimer);
+			av8100_plugtimer.expires = jiffies +
+					AV8100_PLUGSTARTUP_TIME;
+			av8100_plugtimer.function =
+					av8100_plugtimer_int;
+			av8100_plugtimer.data = 0;
+			add_timer(&av8100_plugtimer);
+			break;
+
+		case AV8100_PLUGGED_STARTUP:
+		case AV8100_PLUGGED:
+		default:
+			break;
+		}
+
+		if (av8100_globals->hdmi_ev_cb)
+			av8100_globals->hdmi_ev_cb(
+				AV8100_HDMI_EVENT_HDMI_PLUGIN);
+		break;
+
+	case AV8100_CVBS_PLUGIN:
+		/* TODO */
+		break;
+
+	default:
+		break;
+	}
+}
+
+static void cec_rx(void)
+{
+	if (av8100_globals && av8100_globals->hdmi_ev_cb)
+		av8100_globals->hdmi_ev_cb(AV8100_HDMI_EVENT_CEC);
+}
+
+static void cec_txerr(void)
+{
+	if (av8100_globals && av8100_globals->hdmi_ev_cb)
+		av8100_globals->hdmi_ev_cb(AV8100_HDMI_EVENT_CECTXERR);
+}
+
+static void hdcp_changed(void)
+{
+	if (av8100_globals && av8100_globals->hdmi_ev_cb)
+		av8100_globals->hdmi_ev_cb(AV8100_HDMI_EVENT_HDCP);
+}
+
+static void av8100_set_state(enum av8100_operating_mode state)
+{
+	g_av8100_status.av8100_state = state;
+
+	if (state == AV8100_OPMODE_UNDEFINED)
+		g_av8100_status.hdmi_on = false;
+
+	if (state == AV8100_OPMODE_STANDBY) {
+		clr_plug_status(AV8100_HDMI_PLUGIN);
+		clr_plug_status(AV8100_CVBS_PLUGIN);
+		g_av8100_status.hdmi_on = false;
+	}
+}
+
+/**
+ * write_single_byte() - Write a single byte to av8100
+ * through i2c interface.
+ * @client:	i2c client structure
+ * @reg:	register offset
+ * @data:	data byte to be written
+ *
+ * This funtion uses smbus byte write API to write a single byte to av8100
+ **/
+static int write_single_byte(struct i2c_client *client, u8 reg,
+	u8 data)
+{
+	int ret;
+
+	ret = i2c_smbus_write_byte_data(client, reg, data);
+	if (ret < 0)
+		dev_dbg(av8100dev, "i2c smbus write byte failed\n");
+
+	return ret;
+}
+
+/**
+ * read_single_byte() - read single byte from av8100
+ * through i2c interface
+ * @client:     i2c client structure
+ * @reg:        register offset
+ * @val:	register value
+ *
+ * This funtion uses smbus read block API to read single byte from the reg
+ * offset.
+ **/
+static int read_single_byte(struct i2c_client *client, u8 reg, u8 *val)
+{
+	int value;
+
+	value = i2c_smbus_read_byte_data(client, reg);
+	if (value < 0) {
+		dev_dbg(av8100dev, "i2c smbus read byte failed,read data = %x "
+			"from offset:%x\n" , value, reg);
+		return AV8100_FAIL;
+	}
+
+	*val = (u8) value;
+	return 0;
+}
+
+/**
+ * write_multi_byte() - Write a multiple bytes to av8100 through
+ * i2c interface.
+ * @client:	i2c client structure
+ * @buf:	buffer to be written
+ * @nbytes:	nunmber of bytes to be written
+ *
+ * This funtion uses smbus block write API's to write n number of bytes to the
+ * av8100
+ **/
+static int write_multi_byte(struct i2c_client *client, u8 reg,
+		u8 *buf, u8 nbytes)
+{
+	int ret;
+
+	ret = i2c_smbus_write_i2c_block_data(client, reg, nbytes, buf);
+	if (ret < 0)
+		dev_dbg(av8100dev, "i2c smbus write multi byte error\n");
+
+	return ret;
+}
+
+static int configuration_video_input_get(char *buffer,
+	unsigned int *length)
+{
+	if (!av8100_config)
+		return AV8100_FAIL;
+
+	buffer[0] = av8100_config->hdmi_video_input_cmd.dsi_input_mode;
+	buffer[1] = av8100_config->hdmi_video_input_cmd.input_pixel_format;
+	buffer[2] = REG_16_8_MSB(av8100_config->hdmi_video_input_cmd.
+		total_horizontal_pixel);
+	buffer[3] = REG_16_8_LSB(av8100_config->hdmi_video_input_cmd.
+		total_horizontal_pixel);
+	buffer[4] = REG_16_8_MSB(av8100_config->hdmi_video_input_cmd.
+		total_horizontal_active_pixel);
+	buffer[5] = REG_16_8_LSB(av8100_config->hdmi_video_input_cmd.
+		total_horizontal_active_pixel);
+	buffer[6] = REG_16_8_MSB(av8100_config->hdmi_video_input_cmd.
+		total_vertical_lines);
+	buffer[7] = REG_16_8_LSB(av8100_config->hdmi_video_input_cmd.
+		total_vertical_lines);
+	buffer[8] = REG_16_8_MSB(av8100_config->hdmi_video_input_cmd.
+		total_vertical_active_lines);
+	buffer[9] = REG_16_8_LSB(av8100_config->hdmi_video_input_cmd.
+		total_vertical_active_lines);
+	buffer[10] = av8100_config->hdmi_video_input_cmd.video_mode;
+	buffer[11] = av8100_config->hdmi_video_input_cmd.nb_data_lane;
+	buffer[12] = av8100_config->hdmi_video_input_cmd.
+		nb_virtual_ch_command_mode;
+	buffer[13] = av8100_config->hdmi_video_input_cmd.
+		nb_virtual_ch_video_mode;
+	buffer[14] = REG_16_8_MSB(av8100_config->hdmi_video_input_cmd.
+		TE_line_nb);
+	buffer[15] = REG_16_8_LSB(av8100_config->hdmi_video_input_cmd.
+		TE_line_nb);
+	buffer[16] = av8100_config->hdmi_video_input_cmd.TE_config;
+	buffer[17] = REG_32_8_MSB(av8100_config->hdmi_video_input_cmd.
+		master_clock_freq);
+	buffer[18] = REG_32_8_MMSB(av8100_config->hdmi_video_input_cmd.
+		master_clock_freq);
+	buffer[19] = REG_32_8_MLSB(av8100_config->hdmi_video_input_cmd.
+		master_clock_freq);
+	buffer[20] = REG_32_8_LSB(av8100_config->hdmi_video_input_cmd.
+		master_clock_freq);
+	buffer[21] = av8100_config->hdmi_video_input_cmd.ui_x4;
+
+	*length = AV8100_COMMAND_VIDEO_INPUT_FORMAT_SIZE - 1;
+	return 0;
+
+}
+
+static int configuration_audio_input_get(char *buffer,
+	unsigned int *length)
+{
+	if (!av8100_config)
+		return AV8100_FAIL;
+
+	buffer[0] = av8100_config->hdmi_audio_input_cmd.
+		audio_input_if_format;
+	buffer[1] = av8100_config->hdmi_audio_input_cmd.i2s_input_nb;
+	buffer[2] = av8100_config->hdmi_audio_input_cmd.sample_audio_freq;
+	buffer[3] = av8100_config->hdmi_audio_input_cmd.audio_word_lg;
+	buffer[4] = av8100_config->hdmi_audio_input_cmd.audio_format;
+	buffer[5] = av8100_config->hdmi_audio_input_cmd.audio_if_mode;
+	buffer[6] = av8100_config->hdmi_audio_input_cmd.audio_mute;
+
+	*length = AV8100_COMMAND_AUDIO_INPUT_FORMAT_SIZE - 1;
+	return 0;
+}
+
+static int configuration_video_output_get(char *buffer,
+	unsigned int *length)
+{
+	if (!av8100_config)
+		return AV8100_FAIL;
+
+	buffer[0] = av8100_config->hdmi_video_output_cmd.
+		video_output_cea_vesa;
+
+	if (buffer[0] == AV8100_CUSTOM) {
+		buffer[1] = av8100_config->hdmi_video_output_cmd.
+			vsync_polarity;
+		buffer[2] = av8100_config->hdmi_video_output_cmd.
+			hsync_polarity;
+		buffer[3] = REG_16_8_MSB(av8100_config->
+			hdmi_video_output_cmd.total_horizontal_pixel);
+		buffer[4] = REG_16_8_LSB(av8100_config->
+			hdmi_video_output_cmd.total_horizontal_pixel);
+		buffer[5] = REG_16_8_MSB(av8100_config->
+			hdmi_video_output_cmd.total_horizontal_active_pixel);
+		buffer[6] = REG_16_8_LSB(av8100_config->
+			hdmi_video_output_cmd.total_horizontal_active_pixel);
+		buffer[7] = REG_16_8_MSB(av8100_config->
+			hdmi_video_output_cmd.total_vertical_in_half_lines);
+		buffer[8] = REG_16_8_LSB(av8100_config->
+			hdmi_video_output_cmd.total_vertical_in_half_lines);
+		buffer[9] = REG_16_8_MSB(av8100_config->
+			hdmi_video_output_cmd.
+				total_vertical_active_in_half_lines);
+		buffer[10] = REG_16_8_LSB(av8100_config->
+			hdmi_video_output_cmd.
+				total_vertical_active_in_half_lines);
+		buffer[11] = REG_16_8_MSB(av8100_config->
+			hdmi_video_output_cmd.hsync_start_in_pixel);
+		buffer[12] = REG_16_8_LSB(av8100_config->
+			hdmi_video_output_cmd.hsync_start_in_pixel);
+		buffer[13] = REG_16_8_MSB(av8100_config->
+			hdmi_video_output_cmd.hsync_length_in_pixel);
+		buffer[14] = REG_16_8_LSB(av8100_config->
+			hdmi_video_output_cmd.hsync_length_in_pixel);
+		buffer[15] = REG_16_8_MSB(av8100_config->
+			hdmi_video_output_cmd.vsync_start_in_half_line);
+		buffer[16] = REG_16_8_LSB(av8100_config->
+			hdmi_video_output_cmd.vsync_start_in_half_line);
+		buffer[17] = REG_16_8_MSB(av8100_config->
+			hdmi_video_output_cmd.vsync_length_in_half_line);
+		buffer[18] = REG_16_8_LSB(av8100_config->
+			hdmi_video_output_cmd.vsync_length_in_half_line);
+		buffer[19] = REG_16_8_MSB(av8100_config->
+			hdmi_video_output_cmd.hor_video_start_pixel);
+		buffer[20] = REG_16_8_LSB(av8100_config->
+			hdmi_video_output_cmd.hor_video_start_pixel);
+		buffer[21] = REG_16_8_MSB(av8100_config->
+			hdmi_video_output_cmd.vert_video_start_pixel);
+		buffer[22] = REG_16_8_LSB(av8100_config->
+			hdmi_video_output_cmd.vert_video_start_pixel);
+		buffer[23] = av8100_config->
+			hdmi_video_output_cmd.video_type;
+		buffer[24] = av8100_config->
+			hdmi_video_output_cmd.pixel_repeat;
+		buffer[25] = REG_32_8_MSB(av8100_config->
+			hdmi_video_output_cmd.pixel_clock_freq_Hz);
+		buffer[26] = REG_32_8_MMSB(av8100_config->
+			hdmi_video_output_cmd.pixel_clock_freq_Hz);
+		buffer[27] = REG_32_8_MLSB(av8100_config->
+			hdmi_video_output_cmd.pixel_clock_freq_Hz);
+		buffer[28] = REG_32_8_LSB(av8100_config->
+			hdmi_video_output_cmd.pixel_clock_freq_Hz);
+
+		*length = AV8100_COMMAND_VIDEO_OUTPUT_FORMAT_SIZE - 1;
+	} else {
+		*length = 1;
+	}
+
+	return 0;
+}
+
+static int configuration_video_scaling_get(char *buffer,
+	unsigned int *length)
+{
+	if (!av8100_config)
+		return AV8100_FAIL;
+
+	buffer[0] = REG_16_8_MSB(av8100_config->hdmi_video_scaling_cmd.
+		h_start_in_pixel);
+	buffer[1] = REG_16_8_LSB(av8100_config->hdmi_video_scaling_cmd.
+		h_start_in_pixel);
+	buffer[2] = REG_16_8_MSB(av8100_config->hdmi_video_scaling_cmd.
+		h_stop_in_pixel);
+	buffer[3] = REG_16_8_LSB(av8100_config->hdmi_video_scaling_cmd.
+		h_stop_in_pixel);
+	buffer[4] = REG_16_8_MSB(av8100_config->hdmi_video_scaling_cmd.
+		v_start_in_line);
+	buffer[5] = REG_16_8_LSB(av8100_config->hdmi_video_scaling_cmd.
+		v_start_in_line);
+	buffer[6] = REG_16_8_MSB(av8100_config->hdmi_video_scaling_cmd.
+		v_stop_in_line);
+	buffer[7] = REG_16_8_LSB(av8100_config->hdmi_video_scaling_cmd.
+		v_stop_in_line);
+	buffer[8] = REG_16_8_MSB(av8100_config->hdmi_video_scaling_cmd.
+		h_start_out_pixel);
+	buffer[9] = REG_16_8_LSB(av8100_config->hdmi_video_scaling_cmd
+		.h_start_out_pixel);
+	buffer[10] = REG_16_8_MSB(av8100_config->hdmi_video_scaling_cmd.
+		h_stop_out_pixel);
+	buffer[11] = REG_16_8_LSB(av8100_config->hdmi_video_scaling_cmd.
+		h_stop_out_pixel);
+	buffer[12] = REG_16_8_MSB(av8100_config->hdmi_video_scaling_cmd.
+		v_start_out_line);
+	buffer[13] = REG_16_8_LSB(av8100_config->hdmi_video_scaling_cmd.
+		v_start_out_line);
+	buffer[14] = REG_16_8_MSB(av8100_config->hdmi_video_scaling_cmd.
+		v_stop_out_line);
+	buffer[15] = REG_16_8_LSB(av8100_config->hdmi_video_scaling_cmd.
+		v_stop_out_line);
+
+	*length = AV8100_COMMAND_VIDEO_SCALING_FORMAT_SIZE - 1;
+	return 0;
+}
+
+static int configuration_colorspace_conversion_get(char *buffer,
+	unsigned int *length)
+{
+	const struct color_conversion_cmd *hdmi_color_space_conversion_cmd;
+	if (!av8100_config)
+		return AV8100_FAIL;
+
+	hdmi_color_space_conversion_cmd =
+		get_color_transform_cmd(av8100_config->color_transform);
+
+	buffer[0] = REG_12_8_MSB(hdmi_color_space_conversion_cmd->c0);
+	buffer[1] = REG_16_8_LSB(hdmi_color_space_conversion_cmd->c0);
+	buffer[2] = REG_12_8_MSB(hdmi_color_space_conversion_cmd->c1);
+	buffer[3] = REG_16_8_LSB(hdmi_color_space_conversion_cmd->c1);
+	buffer[4] = REG_12_8_MSB(hdmi_color_space_conversion_cmd->c2);
+	buffer[5] = REG_16_8_LSB(hdmi_color_space_conversion_cmd->c2);
+	buffer[6] = REG_12_8_MSB(hdmi_color_space_conversion_cmd->c3);
+	buffer[7] = REG_16_8_LSB(hdmi_color_space_conversion_cmd->c3);
+	buffer[8] = REG_12_8_MSB(hdmi_color_space_conversion_cmd->c4);
+	buffer[9] = REG_16_8_LSB(hdmi_color_space_conversion_cmd->c4);
+	buffer[10] = REG_12_8_MSB(hdmi_color_space_conversion_cmd->c5);
+	buffer[11] = REG_16_8_LSB(hdmi_color_space_conversion_cmd->c5);
+	buffer[12] = REG_12_8_MSB(hdmi_color_space_conversion_cmd->c6);
+	buffer[13] = REG_16_8_LSB(hdmi_color_space_conversion_cmd->c6);
+	buffer[14] = REG_12_8_MSB(hdmi_color_space_conversion_cmd->c7);
+	buffer[15] = REG_16_8_LSB(hdmi_color_space_conversion_cmd->c7);
+	buffer[16] = REG_12_8_MSB(hdmi_color_space_conversion_cmd->c8);
+	buffer[17] = REG_16_8_LSB(hdmi_color_space_conversion_cmd->c8);
+	buffer[18] = REG_10_8_MSB(hdmi_color_space_conversion_cmd->aoffset);
+	buffer[19] = REG_16_8_LSB(hdmi_color_space_conversion_cmd->aoffset);
+	buffer[20] = REG_10_8_MSB(hdmi_color_space_conversion_cmd->boffset);
+	buffer[21] = REG_16_8_LSB(hdmi_color_space_conversion_cmd->boffset);
+	buffer[22] = REG_10_8_MSB(hdmi_color_space_conversion_cmd->coffset);
+	buffer[23] = REG_16_8_LSB(hdmi_color_space_conversion_cmd->coffset);
+	buffer[24] = hdmi_color_space_conversion_cmd->lmax;
+	buffer[25] = hdmi_color_space_conversion_cmd->lmin;
+	buffer[26] = hdmi_color_space_conversion_cmd->cmax;
+	buffer[27] = hdmi_color_space_conversion_cmd->cmin;
+
+	*length = AV8100_COMMAND_COLORSPACECONVERSION_SIZE - 1;
+	return 0;
+}
+
+static int configuration_cec_message_write_get(char *buffer,
+	unsigned int *length)
+{
+	if (!av8100_config)
+		return AV8100_FAIL;
+
+	buffer[0] = av8100_config->hdmi_cec_message_write_cmd.buffer_length;
+	memcpy(&buffer[1], av8100_config->hdmi_cec_message_write_cmd.buffer,
+		HDMI_CEC_MESSAGE_WRITE_BUFFER_SIZE);
+
+	*length = AV8100_COMMAND_CEC_MESSAGE_WRITE_SIZE - 1;
+	return 0;
+}
+
+static int configuration_cec_message_read_get(char *buffer,
+	unsigned int *length)
+{
+	if (!av8100_config)
+		return AV8100_FAIL;
+
+	/* No buffer data */
+	*length = AV8100_COMMAND_CEC_MESSAGE_READ_BACK_SIZE - 1;
+	return 0;
+}
+
+static int configuration_denc_get(char *buffer,
+	unsigned int *length)
+{
+	if (!av8100_config)
+		return AV8100_FAIL;
+
+	buffer[0] = av8100_config->hdmi_denc_cmd.cvbs_video_format;
+	buffer[1] = av8100_config->hdmi_denc_cmd.standard_selection;
+	buffer[2] = av8100_config->hdmi_denc_cmd.enable;
+	buffer[3] = av8100_config->hdmi_denc_cmd.macrovision_enable;
+	buffer[4] = av8100_config->hdmi_denc_cmd.internal_generator;
+
+	*length = AV8100_COMMAND_DENC_SIZE - 1;
+	return 0;
+}
+
+static int configuration_hdmi_get(char *buffer, unsigned int *length)
+{
+	if (!av8100_config)
+		return AV8100_FAIL;
+
+	buffer[0] = av8100_config->hdmi_cmd.hdmi_mode;
+	buffer[1] = av8100_config->hdmi_cmd.hdmi_format;
+	buffer[2] = av8100_config->hdmi_cmd.dvi_format;
+
+	*length = AV8100_COMMAND_HDMI_SIZE - 1;
+	return 0;
+}
+
+static int configuration_hdcp_sendkey_get(char *buffer,
+	unsigned int *length)
+{
+	if (!av8100_config)
+		return AV8100_FAIL;
+
+	buffer[0] = av8100_config->hdmi_hdcp_send_key_cmd.key_number;
+	memcpy(&buffer[1], av8100_config->hdmi_hdcp_send_key_cmd.data,
+		av8100_config->hdmi_hdcp_send_key_cmd.data_len);
+
+	*length = av8100_config->hdmi_hdcp_send_key_cmd.data_len + 1;
+	return 0;
+}
+
+static int configuration_hdcp_management_get(char *buffer,
+	unsigned int *length)
+{
+	if (!av8100_config)
+		return AV8100_FAIL;
+
+	buffer[0] = av8100_config->hdmi_hdcp_management_format_cmd.req_type;
+	buffer[1] = av8100_config->hdmi_hdcp_management_format_cmd.req_encr;
+	buffer[2] = av8100_config->hdmi_hdcp_management_format_cmd.encr_use;
+
+	*length = AV8100_COMMAND_HDCP_MANAGEMENT_SIZE - 1;
+	return 0;
+}
+
+static int configuration_infoframe_get(char *buffer,
+	unsigned int *length)
+{
+	if (!av8100_config)
+		return AV8100_FAIL;
+
+	buffer[0] = av8100_config->hdmi_infoframes_cmd.type;
+	buffer[1] = av8100_config->hdmi_infoframes_cmd.version;
+	buffer[2] = av8100_config->hdmi_infoframes_cmd.length;
+	buffer[3] = av8100_config->hdmi_infoframes_cmd.crc;
+	memcpy(&buffer[4], av8100_config->hdmi_infoframes_cmd.data,
+	HDMI_INFOFRAME_DATA_SIZE);
+
+	*length = AV8100_COMMAND_INFOFRAMES_SIZE - 1;
+	return 0;
+}
+
+static int av8100_edid_section_readback_get(char *buffer, unsigned int *length)
+{
+	buffer[0] = av8100_config->hdmi_edid_section_readback_cmd.address;
+	buffer[1] = av8100_config->hdmi_edid_section_readback_cmd.
+		block_number;
+
+	*length = AV8100_COMMAND_EDID_SECTION_READBACK_SIZE - 1;
+	return 0;
+}
+
+static int configuration_pattern_generator_get(char *buffer,
+	unsigned int *length)
+{
+	if (!av8100_config)
+		return AV8100_FAIL;
+
+	buffer[0] = av8100_config->hdmi_pattern_generator_cmd.pattern_type;
+	buffer[1] = av8100_config->hdmi_pattern_generator_cmd.
+		pattern_video_format;
+	buffer[2] = av8100_config->hdmi_pattern_generator_cmd.
+		pattern_audio_mode;
+
+	*length = AV8100_COMMAND_PATTERNGENERATOR_SIZE - 1;
+	return 0;
+}
+
+static int configuration_fuse_aes_key_get(char *buffer,
+	unsigned int *length)
+{
+	if (!av8100_config)
+		return AV8100_FAIL;
+
+	buffer[0] = av8100_config->hdmi_fuse_aes_key_cmd.fuse_operation;
+	if (av8100_config->hdmi_fuse_aes_key_cmd.fuse_operation) {
+		/* Write key command */
+		memcpy(&buffer[1], av8100_config->hdmi_fuse_aes_key_cmd.key,
+			HDMI_FUSE_AES_KEY_SIZE);
+
+		*length = AV8100_COMMAND_FUSE_AES_KEY_SIZE - 1;
+	} else {
+		/* Check key command */
+		*length = AV8100_COMMAND_FUSE_AES_CHK_SIZE - 1;
+	}
+	return 0;
+}
+
+static int get_command_return_first(struct i2c_client *i2c,
+		enum av8100_command_type command_type) {
+	int retval = 0;
+	char val;
+
+	retval = read_single_byte(i2c, AV8100_COMMAND_OFFSET, &val);
+	if (retval) {
+		dev_dbg(av8100dev, "%s 1st ret failed\n", __func__);
+		return retval;
+	}
+
+	if (val != (0x80 | command_type)) {
+		dev_dbg(av8100dev, "%s 1st ret wrong:%x\n", __func__, val);
+		return -EFAULT;
+	}
+
+	return 0;
+}
+
+static int get_command_return_data(struct i2c_client *i2c,
+	enum av8100_command_type command_type,
+	u8 *command_buffer,
+	u8 *buffer_length,
+	u8 *buffer)
+{
+	int retval = 0;
+	char val;
+	int index = 0;
+
+	if (buffer_length)
+		*buffer_length = 0;
+
+	switch (command_type) {
+	case AV8100_COMMAND_VIDEO_INPUT_FORMAT:
+	case AV8100_COMMAND_AUDIO_INPUT_FORMAT:
+	case AV8100_COMMAND_VIDEO_OUTPUT_FORMAT:
+	case AV8100_COMMAND_VIDEO_SCALING_FORMAT:
+	case AV8100_COMMAND_COLORSPACECONVERSION:
+	case AV8100_COMMAND_CEC_MESSAGE_WRITE:
+	case AV8100_COMMAND_DENC:
+	case AV8100_COMMAND_HDMI:
+	case AV8100_COMMAND_INFOFRAMES:
+	case AV8100_COMMAND_PATTERNGENERATOR:
+		/* Get the second return byte */
+		retval = read_single_byte(i2c,
+			AV8100_2ND_RET_BYTE_OFFSET, &val);
+		if (retval)
+			goto get_command_return_data_fail2r;
+
+		if (val) {
+			retval = AV8100_FAIL;
+			goto get_command_return_data_fail2v;
+		}
+		break;
+
+	case AV8100_COMMAND_CEC_MESSAGE_READ_BACK:
+		if ((buffer == NULL) ||	(buffer_length == NULL)) {
+			retval = AV8100_FAIL;
+			goto get_command_return_data_fail;
+		}
+
+		/* Get the return buffer length */
+		retval = read_single_byte(i2c, AV8100_CEC_ADDR_OFFSET, &val);
+		if (retval)
+			goto get_command_return_data_fail;
+
+		/* TODO: buffer_length is always zero */
+		/* *buffer_length = val;*/
+		dev_dbg(av8100dev, "cec buflen:%d\n", val);
+		*buffer_length = val;
+
+		if (*buffer_length >
+			HDMI_CEC_READ_MAXSIZE) {
+			dev_dbg(av8100dev, "CEC size too large %d\n",
+				*buffer_length);
+			*buffer_length = HDMI_CEC_READ_MAXSIZE;
+		}
+
+		dev_dbg(av8100dev, "return data: ");
+
+		/* Get the return buffer */
+		for (index = 0; index < *buffer_length; ++index) {
+			retval = read_single_byte(i2c,
+				AV8100_CEC_RET_BUF_OFFSET + index, &val);
+			if (retval) {
+				*buffer_length = 0;
+				goto get_command_return_data_fail;
+			} else {
+				*(buffer + index) = val;
+				dev_dbg(av8100dev, "%02x ", *(buffer + index));
+			}
+		}
+
+		dev_dbg(av8100dev, "\n");
+		break;
+
+	case AV8100_COMMAND_HDCP_MANAGEMENT:
+		/* Get the second return byte */
+		retval = read_single_byte(i2c,
+			AV8100_2ND_RET_BYTE_OFFSET, &val);
+		if (retval) {
+			goto get_command_return_data_fail2r;
+		} else {
+			/* Check the second return byte */
+			if (val)
+				goto get_command_return_data_fail2v;
+		}
+
+		if ((buffer == NULL) || (buffer_length == NULL))
+			/* Ignore return data */
+			break;
+
+		/* Get the return buffer length */
+		if (command_buffer[0] ==
+			HDMI_REQUEST_FOR_REVOCATION_LIST_INPUT) {
+			*buffer_length = HDMI_REVOC_LIST_SIZE;
+		} else {
+			*buffer_length = 0x0;
+		}
+
+		dev_dbg(av8100dev, "return data: ");
+
+		/* Get the return buffer */
+		for (index = 0; index < *buffer_length; ++index) {
+			retval = read_single_byte(i2c,
+				AV8100_HDCP_RET_BUF_OFFSET + index, &val);
+			if (retval) {
+				*buffer_length = 0;
+				goto get_command_return_data_fail;
+			} else {
+				*(buffer + index) = val;
+				dev_dbg(av8100dev, "%02x ", *(buffer + index));
+			}
+		}
+
+		dev_dbg(av8100dev, "\n");
+		break;
+
+	case AV8100_COMMAND_EDID_SECTION_READBACK:
+		if ((buffer == NULL) ||	(buffer_length == NULL)) {
+			retval = AV8100_FAIL;
+			goto get_command_return_data_fail;
+		}
+
+		/* Return buffer length is fixed */
+		*buffer_length = HDMI_EDIDREAD_SIZE;
+
+		dev_dbg(av8100dev, "return data: ");
+
+		/* Get the return buffer */
+		for (index = 0; index < *buffer_length; ++index) {
+			retval = read_single_byte(i2c,
+				AV8100_EDID_RET_BUF_OFFSET + index, &val);
+			if (retval) {
+				*buffer_length = 0;
+				goto get_command_return_data_fail;
+			} else {
+				*(buffer + index) = val;
+				dev_dbg(av8100dev, "%02x ", *(buffer + index));
+			}
+		}
+
+		dev_dbg(av8100dev, "\n");
+		break;
+
+	case AV8100_COMMAND_FUSE_AES_KEY:
+		if ((buffer == NULL) ||	(buffer_length == NULL)) {
+			retval = AV8100_FAIL;
+			goto get_command_return_data_fail;
+		}
+
+		/* Get the second return byte */
+		retval = read_single_byte(i2c,
+			AV8100_2ND_RET_BYTE_OFFSET, &val);
+
+		if (retval)
+			goto get_command_return_data_fail2r;
+
+		/* Check the second return byte */
+		if (val) {
+			retval = AV8100_FAIL;
+			goto get_command_return_data_fail2v;
+		}
+
+		/* Return buffer length is fixed */
+		*buffer_length = HDMI_FUSE_AES_KEY_RET_SIZE;
+
+		/* Get CRC */
+		retval = read_single_byte(i2c,
+			AV8100_FUSE_CRC_OFFSET, &val);
+		if (retval)
+			goto get_command_return_data_fail;
+
+		*buffer = val;
+		dev_dbg(av8100dev, "CRC:%02x ", val);
+
+		/* Get programmed status */
+		retval = read_single_byte(i2c,
+			AV8100_FUSE_PRGD_OFFSET, &val);
+		if (retval)
+			goto get_command_return_data_fail;
+
+		*(buffer + 1) = val;
+
+		dev_dbg(av8100dev, "programmed:%02x ", val);
+		break;
+
+	case AV8100_COMMAND_HDCP_SENDKEY:
+		if ((command_buffer[0] == HDMI_LOADAES_END_BLK_NR) &&
+			((buffer == NULL) || (buffer_length == NULL))) {
+			retval = AV8100_FAIL;
+			goto get_command_return_data_fail;
+		}
+
+		/* Get the second return byte */
+		retval = read_single_byte(i2c,
+			AV8100_2ND_RET_BYTE_OFFSET, &val);
+		if (retval)
+			goto get_command_return_data_fail2r;
+
+		if (val) {
+			retval = AV8100_FAIL;
+			goto get_command_return_data_fail2v;
+		}
+
+		if (command_buffer[0] == HDMI_LOADAES_END_BLK_NR) {
+			/* Return CRC32 if last AES block */
+			int cnt;
+
+			dev_dbg(av8100dev, "CRC32:");
+			for (cnt = 0; cnt < HDMI_CRC32_SIZE; cnt++) {
+				if (read_single_byte(i2c,
+					AV8100_CRC32_OFFSET + cnt, &val))
+					goto get_command_return_data_fail;
+				*(buffer + cnt) = val;
+				dev_dbg(av8100dev, "%02x", val);
+			}
+
+			*buffer_length = HDMI_CRC32_SIZE;
+		}
+		break;
+
+	default:
+		retval = AV8100_INVALID_COMMAND;
+		break;
+	}
+
+	return retval;
+get_command_return_data_fail2r:
+	dev_dbg(av8100dev, "%s Reading 2nd return byte failed\n", __func__);
+	return retval;
+get_command_return_data_fail2v:
+	dev_dbg(av8100dev, "%s 2nd return byte is wrong:%x\n", __func__, val);
+	return retval;
+get_command_return_data_fail:
+	dev_dbg(av8100dev, "%s FAIL\n", __func__);
+	return retval;
+}
+
+static int av8100_powerup1(void)
+{
+	int retval;
+	struct av8100_platform_data *pdata = av8100dev->platform_data;
+
+	/* Regulator enable */
+	if ((av8100_globals->regulator_pwr) &&
+			(av8100_globals->regulator_requested == false)) {
+		retval = regulator_enable(av8100_globals->regulator_pwr);
+		if (retval < 0) {
+			dev_warn(av8100dev, "%s: regulator_enable failed\n",
+			__func__);
+			return retval;
+		}
+		dev_dbg(av8100dev, "regulator_enable ok\n");
+		av8100_globals->regulator_requested = true;
+	}
+
+	/* Reset av8100 */
+	gpio_set_value(pdata->reset, 1);
+
+	/* Need to wait before proceeding */
+	mdelay(AV8100_POWERON_WAITTIME1_MS);
+
+	av8100_set_state(AV8100_OPMODE_STANDBY);
+
+	/* Get chip version */
+	retval = av8100_reg_stby_pend_int_r(NULL, NULL, NULL, &chip_version);
+	if (retval) {
+		dev_err(av8100dev, "Failed to read chip version\n");
+		return -EFAULT;
+	}
+
+	dev_info(av8100dev, "chip version:%d\n", chip_version);
+
+	switch (chip_version) {
+	case AV8100_CHIPVER_1:
+	case AV8100_CHIPVER_2:
+		break;
+
+	default:
+		dev_err(av8100dev, "Unsupported chip version:%d\n",
+			chip_version);
+		return -EFAULT;
+		break;
+	}
+
+	return 0;
+}
+
+static int av8100_powerup2(void)
+{
+	int retval;
+
+	/* Master clock timing, running, search for plug */
+	retval = av8100_reg_stby_w(AV8100_STANDBY_CPD_HIGH,
+		AV8100_STANDBY_STBY_HIGH, MCLK_FREQ);
+	if (retval) {
+		dev_err(av8100dev,
+			"Failed to write the value to av8100 register\n");
+		return -EFAULT;
+	}
+
+	/* ON time & OFF time on 5v HDMI plug detect */
+	retval = av8100_reg_hdmi_5_volt_time_w(
+			av8100_globals->denc_off_time,
+			av8100_globals->hdmi_off_time,
+			av8100_globals->on_time);
+	if (retval) {
+		dev_err(av8100dev,
+			"Failed to write the value to av8100 register\n");
+		return -EFAULT;
+	}
+
+	/* Need to wait before proceeding */
+	mdelay(AV8100_POWERON_WAITTIME2_MS);
+
+	av8100_set_state(AV8100_OPMODE_SCAN);
+
+	return 0;
+}
+
+int av8100_powerup(void)
+{
+	if (av8100_status_get().av8100_state == AV8100_OPMODE_UNDEFINED)
+		return -EINVAL;
+
+	if (av8100_powerup1()) {
+		dev_err(av8100dev, "av8100_powerup1 fail\n");
+		return -EFAULT;
+	}
+
+	return av8100_powerup2();
+}
+EXPORT_SYMBOL(av8100_powerup);
+
+int av8100_powerdown(void)
+{
+	struct av8100_platform_data *pdata = av8100dev->platform_data;
+
+	if (gpio_get_value(pdata->reset) == 0)
+		return 0;
+
+	/* Remove APE OPP requirement */
+	if (av8100_globals->opp_requested) {
+		prcmu_qos_remove_requirement(PRCMU_QOS_APE_OPP,
+				(char *)av8100_miscdev.name);
+		av8100_globals->opp_requested = false;
+	}
+
+	/* Clock disable */
+	if (av8100_globals->inputclk && av8100_globals->inputclk_requested) {
+		clk_disable(av8100_globals->inputclk);
+		av8100_globals->inputclk_requested = false;
+	}
+
+	/* Regulator disable */
+	if ((av8100_globals->regulator_pwr) &&
+			(av8100_globals->regulator_requested)) {
+		dev_dbg(av8100dev, "regulator_disable\n");
+		regulator_disable(av8100_globals->regulator_pwr);
+		av8100_globals->regulator_requested = false;
+	}
+
+	gpio_set_value(pdata->reset, 0);
+	av8100_set_state(AV8100_OPMODE_SHUTDOWN);
+
+	return 0;
+}
+EXPORT_SYMBOL(av8100_powerdown);
+
+int av8100_download_firmware(char *fw_buff, int nbytes,
+	enum interface_type if_type)
+{
+	int retval;
+	int temp = 0x0;
+	int increment = 15;
+	int index = 0;
+	int size = 0x0;
+	int tempnext = 0x0;
+	char val = 0x0;
+	char CheckSum = 0;
+	int cnt = 10;
+	struct i2c_client *i2c;
+	u8 uc;
+	u8 fdl;
+	u8 hld;
+	u8 wa;
+	u8 ra;
+
+	if (av8100_status_get().av8100_state == AV8100_OPMODE_UNDEFINED)
+		return -EINVAL;
+
+	if (!av8100_config)
+		return -EINVAL;
+
+	/* Clock enable */
+	if (av8100_globals->inputclk &&
+			av8100_globals->inputclk_requested == false) {
+		if (clk_enable(av8100_globals->inputclk)) {
+			dev_err(av8100dev, "inputclk en failed\n");
+			return -EFAULT;
+		}
+
+		av8100_globals->inputclk_requested = true;
+	}
+
+	/* Request 100% APE OPP */
+	if (av8100_globals->opp_requested == false) {
+		if (prcmu_qos_add_requirement(PRCMU_QOS_APE_OPP,
+				(char *)av8100_miscdev.name, 100)) {
+			dev_err(av8100dev, "OPP 100 failed\n");
+			return -EFAULT;
+		}
+
+		av8100_globals->opp_requested = true;
+	}
+
+	msleep(AV8100_FWDL_WAITTIME1);
+
+	fw_buff = av8100_fw_buff;
+	nbytes = AV8100_FW_SIZE;
+
+	i2c = av8100_config->client;
+
+	/* Enable firmware download */
+	retval = av8100_reg_gen_ctrl_w(
+		AV8100_GENERAL_CONTROL_FDL_HIGH,
+		AV8100_GENERAL_CONTROL_HLD_HIGH,
+		AV8100_GENERAL_CONTROL_WA_LOW,
+		AV8100_GENERAL_CONTROL_RA_LOW);
+	if (retval) {
+		dev_err(av8100dev,
+			"Failed to write the value to av8100 register\n");
+		return -EFAULT;
+	}
+
+	retval = av8100_reg_gen_ctrl_r(&fdl, &hld, &wa, &ra);
+	if (retval) {
+		dev_err(av8100dev,
+			"Failed to read the value from av8100 register\n");
+		return -EFAULT;
+	} else {
+		dev_dbg(av8100dev, "GENERAL_CONTROL_REG register fdl:%d "
+			"hld:%d wa:%d ra:%d\n", fdl, hld, wa, ra);
+	}
+
+	LOCK_AV8100_HW;
+
+	temp = nbytes % increment;
+	for (size = 0; size < (nbytes-temp); size = size + increment,
+		index += increment) {
+		if (if_type == I2C_INTERFACE) {
+			retval = write_multi_byte(i2c,
+				AV8100_FIRMWARE_DOWNLOAD_ENTRY, fw_buff + size,
+				increment);
+			if (retval) {
+				dev_dbg(av8100dev, "Failed to download the "
+					"av8100 firmware\n");
+				UNLOCK_AV8100_HW;
+				return -EFAULT;
+			}
+		} else if (if_type == DSI_INTERFACE) {
+			dev_dbg(av8100dev,
+				"DSI_INTERFACE is currently not supported\n");
+			UNLOCK_AV8100_HW;
+			return -EINVAL;
+		} else {
+			UNLOCK_AV8100_HW;
+			return -EINVAL;
+		}
+
+		for (tempnext = size; tempnext < (increment+size); tempnext++)
+			av8100_receivetab[tempnext] = fw_buff[tempnext];
+	}
+
+	/* Transfer last firmware bytes */
+	if (if_type == I2C_INTERFACE) {
+		retval = write_multi_byte(i2c,
+			AV8100_FIRMWARE_DOWNLOAD_ENTRY, fw_buff + size, temp);
+		if (retval) {
+			dev_dbg(av8100dev,
+				"Failed to download the av8100 firmware\n");
+			UNLOCK_AV8100_HW;
+			return -EFAULT;
+		}
+	} else if (if_type == DSI_INTERFACE) {
+		/* TODO: Add support for DSI firmware download */
+		UNLOCK_AV8100_HW;
+		return -EINVAL;
+	} else {
+		UNLOCK_AV8100_HW;
+		return -EINVAL;
+	}
+
+	for (tempnext = size; tempnext < (size+temp); tempnext++)
+		av8100_receivetab[tempnext] = fw_buff[tempnext];
+
+	/* check transfer*/
+	for (size = 0; size < nbytes; size++) {
+		CheckSum = CheckSum ^ fw_buff[size];
+		if (av8100_receivetab[size] != fw_buff[size]) {
+			dev_dbg(av8100dev, ">Fw download fail....i=%d\n", size);
+			dev_dbg(av8100dev, "Transm = %x, Receiv = %x\n",
+				fw_buff[size], av8100_receivetab[size]);
+		}
+	}
+
+	UNLOCK_AV8100_HW;
+
+	retval = av8100_reg_fw_dl_entry_r(&val);
+	if (retval) {
+		dev_dbg(av8100dev,
+			"Failed to read the value from the av8100 register\n");
+		return -EFAULT;
+	}
+
+	dev_dbg(av8100dev, "CheckSum:%x,val:%x\n", CheckSum, val);
+
+	if (CheckSum != val) {
+		dev_dbg(av8100dev,
+			">Fw downloading.... FAIL CheckSum issue\n");
+		dev_dbg(av8100dev, "Checksum = %d\n", CheckSum);
+		dev_dbg(av8100dev, "Checksum read: %d\n", val);
+		return -EFAULT;
+	} else {
+		dev_dbg(av8100dev, ">Fw downloading.... success\n");
+	}
+
+	/* Set to idle mode */
+	av8100_reg_gen_ctrl_w(AV8100_GENERAL_CONTROL_FDL_LOW,
+		AV8100_GENERAL_CONTROL_HLD_LOW,	AV8100_GENERAL_CONTROL_WA_LOW,
+		AV8100_GENERAL_CONTROL_RA_LOW);
+	if (retval) {
+		dev_dbg(av8100dev,
+			"Failed to write the value to the av8100 register\n");
+		return -EFAULT;
+	}
+
+	/* Wait Internal Micro controler ready */
+	cnt = AV8100_FWDL_TRIES;
+	retval = av8100_reg_gen_status_r(NULL, NULL, NULL, &uc,
+		NULL, NULL);
+	while ((retval == 0) && (uc != 0x1) && (cnt-- > 0)) {
+		mdelay(AV8100_FWDL_WAITTIME2);
+		retval = av8100_reg_gen_status_r(NULL, NULL, NULL,
+			&uc, NULL, NULL);
+	}
+	dev_dbg(av8100dev, "av8100 fwdl cnt:%d\n", cnt);
+
+	if (retval)	{
+		dev_dbg(av8100dev,
+			"Failed to read the value from the av8100 register\n");
+		return -EFAULT;
+	}
+
+	if (uc != 0x1)
+		dev_dbg(av8100dev, "UC is not ready\n");
+
+	av8100_set_state(AV8100_OPMODE_IDLE);
+
+	return 0;
+}
+EXPORT_SYMBOL(av8100_download_firmware);
+
+int av8100_disable_interrupt(void)
+{
+	int retval;
+	struct i2c_client *i2c;
+	u8 hpdm = 0;
+	u8 cpdm = 0;
+
+	if (av8100_status_get().av8100_state == AV8100_OPMODE_UNDEFINED)
+		return -EINVAL;
+
+	if (!av8100_config)
+		return -EINVAL;
+
+	i2c = av8100_config->client;
+
+	retval = av8100_reg_stby_pend_int_w(
+			AV8100_STANDBY_PENDING_INTERRUPT_HPDI_LOW,
+			AV8100_STANDBY_PENDING_INTERRUPT_CPDI_LOW,
+			AV8100_STANDBY_PENDING_INTERRUPT_ONI_LOW);
+	if (retval) {
+		dev_dbg(av8100dev,
+			"Failed to write the value to av8100 register\n");
+		return -EFAULT;
+	}
+
+	retval = av8100_reg_gen_int_mask_w(
+			AV8100_GENERAL_INTERRUPT_MASK_EOCM_LOW,
+			AV8100_GENERAL_INTERRUPT_MASK_VSIM_LOW,
+			AV8100_GENERAL_INTERRUPT_MASK_VSOM_LOW,
+			AV8100_GENERAL_INTERRUPT_MASK_CECM_LOW,
+			AV8100_GENERAL_INTERRUPT_MASK_HDCPM_LOW,
+			AV8100_GENERAL_INTERRUPT_MASK_UOVBM_LOW,
+			AV8100_GENERAL_INTERRUPT_MASK_TEM_LOW);
+	if (retval) {
+		dev_dbg(av8100dev,
+			"Failed to write the value to av8100 register\n");
+		return -EFAULT;
+	}
+
+	if (av8100_globals) {
+		hpdm = av8100_globals->hpdm;
+		cpdm = av8100_globals->cpdm;
+	}
+
+	retval = av8100_reg_stby_int_mask_w(
+			AV8100_STANDBY_INTERRUPT_MASK_HPDM_LOW,
+			AV8100_STANDBY_INTERRUPT_MASK_CPDM_LOW,
+			AV8100_STANDBY_INTERRUPT_MASK_STBYGPIOCFG_INPUT,
+			AV8100_STANDBY_INTERRUPT_MASK_IPOL_LOW);
+	if (retval) {
+		dev_dbg(av8100dev,
+			"Failed to write the value to av8100 register\n");
+		return -EFAULT;
+	}
+
+	if (av8100_globals) {
+		av8100_globals->hpdm = hpdm;
+		av8100_globals->cpdm = cpdm;
+	}
+
+	return 0;
+}
+EXPORT_SYMBOL(av8100_disable_interrupt);
+
+int av8100_enable_interrupt(void)
+{
+	int retval;
+	struct i2c_client *i2c;
+
+	if (av8100_status_get().av8100_state == AV8100_OPMODE_UNDEFINED)
+		return -EINVAL;
+
+	if (!av8100_globals || !av8100_config)
+		return -EINVAL;
+
+	i2c = av8100_config->client;
+
+	retval = av8100_reg_stby_pend_int_w(
+			AV8100_STANDBY_PENDING_INTERRUPT_HPDI_LOW,
+			AV8100_STANDBY_PENDING_INTERRUPT_CPDI_LOW,
+			AV8100_STANDBY_PENDING_INTERRUPT_ONI_LOW);
+	if (retval) {
+		dev_dbg(av8100dev,
+			"Failed to write the value to av8100 register\n");
+		return -EFAULT;
+	}
+
+	retval = av8100_reg_gen_int_mask_w(
+			AV8100_GENERAL_INTERRUPT_MASK_EOCM_LOW,
+			AV8100_GENERAL_INTERRUPT_MASK_VSIM_LOW,
+			AV8100_GENERAL_INTERRUPT_MASK_VSOM_LOW,
+			av8100_globals->cecm,
+			av8100_globals->hdcpm,
+			AV8100_GENERAL_INTERRUPT_MASK_UOVBM_LOW,
+			AV8100_GENERAL_INTERRUPT_MASK_TEM_LOW);
+	if (retval) {
+		dev_dbg(av8100dev,
+			"Failed to write the value to av8100 register\n");
+		return -EFAULT;
+	}
+
+	retval = av8100_reg_stby_int_mask_w(
+			av8100_globals->hpdm,
+			av8100_globals->cpdm,
+			AV8100_STANDBY_INTERRUPT_MASK_STBYGPIOCFG_INPUT,
+			AV8100_STANDBY_INTERRUPT_MASK_IPOL_LOW);
+	if (retval) {
+		dev_dbg(av8100dev,
+			"Failed to write the value to av8100 register\n");
+		return -EFAULT;
+	}
+
+	return 0;
+}
+EXPORT_SYMBOL(av8100_enable_interrupt);
+
+static int register_write_internal(u8 offset, u8 value)
+{
+	int retval;
+	struct i2c_client *i2c;
+
+	if (!av8100_config)
+		return -EINVAL;
+
+	i2c = av8100_config->client;
+
+	/* Write to register */
+	retval = write_single_byte(i2c, offset, value);
+	if (retval) {
+		dev_dbg(av8100dev,
+			"Failed to write the value to av8100 register\n");
+		return -EFAULT;
+	}
+
+	return 0;
+}
+EXPORT_SYMBOL(register_write_internal);
+
+int av8100_reg_stby_w(
+		u8 cpd, u8 stby, u8 mclkrng)
+{
+	int retval;
+	u8 val;
+
+	if (av8100_status_get().av8100_state == AV8100_OPMODE_UNDEFINED)
+		return -EINVAL;
+
+	LOCK_AV8100_HW;
+
+	/* Set register value */
+	val = AV8100_STANDBY_CPD(cpd) | AV8100_STANDBY_STBY(stby) |
+		AV8100_STANDBY_MCLKRNG(mclkrng);
+
+	/* Write to register */
+	retval = register_write_internal(AV8100_STANDBY, val);
+	UNLOCK_AV8100_HW;
+	return retval;
+}
+EXPORT_SYMBOL(av8100_reg_stby_w);
+
+int av8100_reg_hdmi_5_volt_time_w(u8 denc_off, u8 hdmi_off, u8 on)
+{
+	int retval;
+	u8 val;
+
+	if (av8100_status_get().av8100_state == AV8100_OPMODE_UNDEFINED)
+		return -EINVAL;
+
+	LOCK_AV8100_HW;
+
+	/* Set register value.
+	 * chip_version == 1 have one common off time
+	 * chip_version > 1 support different off time for hdmi and tvout. */
+	if (chip_version == 1)
+		val = AV8100_HDMI_5_VOLT_TIME_OFF_TIME(hdmi_off) |
+			AV8100_HDMI_5_VOLT_TIME_ON_TIME(on);
+	else
+		val = AV8100_HDMI_5_VOLT_TIME_DAC_OFF_TIME(denc_off) |
+			AV8100_HDMI_5_VOLT_TIME_SU_OFF_TIME(hdmi_off) |
+			AV8100_HDMI_5_VOLT_TIME_ON_TIME(on);
+
+	/* Write to register */
+	retval = register_write_internal(AV8100_HDMI_5_VOLT_TIME, val);
+
+	/* Set vars */
+	if (chip_version > 1)
+		av8100_globals->denc_off_time = denc_off;
+
+	av8100_globals->hdmi_off_time = hdmi_off;
+	av8100_globals->on_time = on;
+
+	UNLOCK_AV8100_HW;
+	return retval;
+}
+EXPORT_SYMBOL(av8100_reg_hdmi_5_volt_time_w);
+
+int av8100_reg_stby_int_mask_w(
+		u8 hpdm, u8 cpdm, u8 stbygpiocfg, u8 ipol)
+{
+	int retval;
+	u8 val;
+
+	if (av8100_status_get().av8100_state == AV8100_OPMODE_UNDEFINED)
+		return -EINVAL;
+
+	LOCK_AV8100_HW;
+
+	/* Set register value */
+	val = AV8100_STANDBY_INTERRUPT_MASK_HPDM(hpdm) |
+		AV8100_STANDBY_INTERRUPT_MASK_CPDM(cpdm) |
+		AV8100_STANDBY_INTERRUPT_MASK_STBYGPIOCFG(stbygpiocfg) |
+		AV8100_STANDBY_INTERRUPT_MASK_IPOL(ipol);
+
+	/* Write to register */
+	retval = register_write_internal(AV8100_STANDBY_INTERRUPT_MASK, val);
+
+	av8100_globals->hpdm = hpdm;
+	av8100_globals->cpdm = cpdm;
+
+	UNLOCK_AV8100_HW;
+	return retval;
+}
+EXPORT_SYMBOL(av8100_reg_stby_int_mask_w);
+
+int av8100_reg_stby_pend_int_w(
+		u8 hpdi, u8 cpdi, u8 oni)
+{
+	int retval;
+	u8 val;
+
+	if (av8100_status_get().av8100_state == AV8100_OPMODE_UNDEFINED)
+		return -EINVAL;
+
+	LOCK_AV8100_HW;
+
+	/* Set register value */
+	val = AV8100_STANDBY_PENDING_INTERRUPT_HPDI(hpdi) |
+		AV8100_STANDBY_PENDING_INTERRUPT_CPDI(cpdi) |
+		AV8100_STANDBY_PENDING_INTERRUPT_ONI(oni);
+
+	/* Write to register */
+	retval = register_write_internal(AV8100_STANDBY_PENDING_INTERRUPT, val);
+
+	UNLOCK_AV8100_HW;
+	return retval;
+}
+EXPORT_SYMBOL(av8100_reg_stby_pend_int_w);
+
+int av8100_reg_gen_int_mask_w(
+		u8 eocm, u8 vsim, u8 vsom, u8 cecm, u8 hdcpm, u8 uovbm,	u8 tem)
+{
+	int retval;
+	u8 val;
+
+	if (av8100_status_get().av8100_state == AV8100_OPMODE_UNDEFINED)
+		return -EINVAL;
+
+	LOCK_AV8100_HW;
+
+	/* Set register value */
+	val = AV8100_GENERAL_INTERRUPT_MASK_EOCM(eocm) |
+		AV8100_GENERAL_INTERRUPT_MASK_VSIM(vsim) |
+		AV8100_GENERAL_INTERRUPT_MASK_VSOM(vsom) |
+		AV8100_GENERAL_INTERRUPT_MASK_CECM(cecm) |
+		AV8100_GENERAL_INTERRUPT_MASK_HDCPM(hdcpm) |
+		AV8100_GENERAL_INTERRUPT_MASK_UOVBM(uovbm) |
+		AV8100_GENERAL_INTERRUPT_MASK_TEM(tem);
+
+	/* Write to register */
+	retval = register_write_internal(AV8100_GENERAL_INTERRUPT_MASK,	val);
+
+	UNLOCK_AV8100_HW;
+	return retval;
+}
+EXPORT_SYMBOL(av8100_reg_gen_int_mask_w);
+
+int av8100_reg_gen_int_w(
+		u8 eoci, u8 vsii, u8 vsoi, u8 ceci, u8 hdcpi, u8 uovbi)
+{
+	int retval;
+	u8 val;
+
+	if (av8100_status_get().av8100_state == AV8100_OPMODE_UNDEFINED)
+		return -EINVAL;
+
+	LOCK_AV8100_HW;
+
+	/* Set register value */
+	val = AV8100_GENERAL_INTERRUPT_EOCI(eoci) |
+		AV8100_GENERAL_INTERRUPT_VSII(vsii) |
+		AV8100_GENERAL_INTERRUPT_VSOI(vsoi) |
+		AV8100_GENERAL_INTERRUPT_CECI(ceci) |
+		AV8100_GENERAL_INTERRUPT_HDCPI(hdcpi) |
+		AV8100_GENERAL_INTERRUPT_UOVBI(uovbi);
+
+	/* Write to register */
+	retval = register_write_internal(AV8100_GENERAL_INTERRUPT, val);
+	UNLOCK_AV8100_HW;
+	return retval;
+}
+EXPORT_SYMBOL(av8100_reg_gen_int_w);
+
+int av8100_reg_gpio_conf_w(
+		u8 dat3dir, u8 dat3val, u8 dat2dir, u8 dat2val,	u8 dat1dir,
+		u8 dat1val, u8 ucdbg)
+{
+	int retval;
+	u8 val;
+
+	if (av8100_status_get().av8100_state == AV8100_OPMODE_UNDEFINED)
+		return -EINVAL;
+
+	LOCK_AV8100_HW;
+
+	/* Set register value */
+	val = AV8100_GPIO_CONFIGURATION_DAT3DIR(dat3dir) |
+		AV8100_GPIO_CONFIGURATION_DAT3VAL(dat3val) |
+		AV8100_GPIO_CONFIGURATION_DAT2DIR(dat2dir) |
+		AV8100_GPIO_CONFIGURATION_DAT2VAL(dat2val) |
+		AV8100_GPIO_CONFIGURATION_DAT1DIR(dat1dir) |
+		AV8100_GPIO_CONFIGURATION_DAT1VAL(dat1val) |
+		AV8100_GPIO_CONFIGURATION_UCDBG(ucdbg);
+
+	/* Write to register */
+	retval = register_write_internal(AV8100_GPIO_CONFIGURATION, val);
+	UNLOCK_AV8100_HW;
+	return retval;
+}
+EXPORT_SYMBOL(av8100_reg_gpio_conf_w);
+
+int av8100_reg_gen_ctrl_w(
+		u8 fdl, u8 hld, u8 wa, u8 ra)
+{
+	int retval;
+	u8 val;
+
+	if (av8100_status_get().av8100_state == AV8100_OPMODE_UNDEFINED)
+		return -EINVAL;
+
+	LOCK_AV8100_HW;
+
+	/* Set register value */
+	val = AV8100_GENERAL_CONTROL_FDL(fdl) |
+		AV8100_GENERAL_CONTROL_HLD(hld) |
+		AV8100_GENERAL_CONTROL_WA(wa) |
+		AV8100_GENERAL_CONTROL_RA(ra);
+
+	/* Write to register */
+	retval = register_write_internal(AV8100_GENERAL_CONTROL, val);
+	UNLOCK_AV8100_HW;
+	return retval;
+}
+EXPORT_SYMBOL(av8100_reg_gen_ctrl_w);
+
+int av8100_reg_fw_dl_entry_w(
+	u8 mbyte_code_entry)
+{
+	int retval;
+	u8 val;
+
+	if (av8100_status_get().av8100_state == AV8100_OPMODE_UNDEFINED)
+		return -EINVAL;
+
+	LOCK_AV8100_HW;
+
+	/* Set register value */
+	val = AV8100_FIRMWARE_DOWNLOAD_ENTRY_MBYTE_CODE_ENTRY(
+		mbyte_code_entry);
+
+	/* Write to register */
+	retval = register_write_internal(AV8100_FIRMWARE_DOWNLOAD_ENTRY, val);
+	UNLOCK_AV8100_HW;
+	return retval;
+}
+EXPORT_SYMBOL(av8100_reg_fw_dl_entry_w);
+
+int av8100_reg_w(
+		u8 offset, u8 value)
+{
+	int retval = 0;
+	struct i2c_client *i2c;
+
+	if (av8100_status_get().av8100_state == AV8100_OPMODE_UNDEFINED)
+		return -EINVAL;
+
+	LOCK_AV8100_HW;
+
+	if (!av8100_config) {
+		UNLOCK_AV8100_HW;
+		return -EINVAL;
+	}
+
+	i2c = av8100_config->client;
+
+	/* Write to register */
+	retval = write_single_byte(i2c, offset, value);
+	if (retval) {
+		dev_dbg(av8100dev,
+			"Failed to write the value to av8100 register\n");
+		UNLOCK_AV8100_HW;
+		return -EFAULT;
+	}
+
+	UNLOCK_AV8100_HW;
+	return 0;
+}
+EXPORT_SYMBOL(av8100_reg_w);
+
+int register_read_internal(u8 offset, u8 *value)
+{
+	int retval = 0;
+	struct i2c_client *i2c;
+
+	if (av8100_status_get().av8100_state == AV8100_OPMODE_UNDEFINED)
+		return -EINVAL;
+
+	if (!av8100_config)
+		return -EINVAL;
+
+	i2c = av8100_config->client;
+
+	/* Read from register */
+	retval = read_single_byte(i2c, offset, value);
+	if (retval)	{
+		dev_dbg(av8100dev,
+			"Failed to read the value from av8100 register\n");
+		return -EFAULT;
+	}
+
+	return retval;
+}
+EXPORT_SYMBOL(register_read_internal);
+
+int av8100_reg_stby_r(
+		u8 *cpd, u8 *stby, u8 *hpds, u8 *cpds, u8 *mclkrng)
+{
+	int retval;
+	u8 val;
+
+	if (av8100_status_get().av8100_state == AV8100_OPMODE_UNDEFINED)
+		return -EINVAL;
+
+	LOCK_AV8100_HW;
+
+	/* Read from register */
+	retval = register_read_internal(AV8100_STANDBY, &val);
+
+	/* Set return params */
+	if (cpd)
+		*cpd = AV8100_STANDBY_CPD_GET(val);
+	if (stby)
+		*stby = AV8100_STANDBY_STBY_GET(val);
+	if (hpds)
+		*hpds = AV8100_STANDBY_HPDS_GET(val);
+	if (cpds)
+		*cpds = AV8100_STANDBY_CPDS_GET(val);
+	if (mclkrng)
+		*mclkrng = AV8100_STANDBY_MCLKRNG_GET(val);
+
+	UNLOCK_AV8100_HW;
+	return retval;
+}
+EXPORT_SYMBOL(av8100_reg_stby_r);
+
+int av8100_reg_hdmi_5_volt_time_r(
+		u8 *denc_off_time, u8 *hdmi_off_time, u8 *on_time)
+{
+	int retval;
+	u8 val;
+
+	if (av8100_status_get().av8100_state == AV8100_OPMODE_UNDEFINED)
+		return -EINVAL;
+
+	LOCK_AV8100_HW;
+
+	/* Read from register */
+	retval = register_read_internal(AV8100_HDMI_5_VOLT_TIME, &val);
+
+	/* Set return params */
+	if (chip_version == 1) {
+		if (denc_off_time)
+			*denc_off_time = 0;
+		if (hdmi_off_time)
+			*hdmi_off_time =
+				AV8100_HDMI_5_VOLT_TIME_OFF_TIME_GET(val);
+	} else {
+		if (denc_off_time)
+			*denc_off_time =
+				AV8100_HDMI_5_VOLT_TIME_DAC_OFF_TIME_GET(val);
+		if (hdmi_off_time)
+			*hdmi_off_time =
+				AV8100_HDMI_5_VOLT_TIME_SU_OFF_TIME_GET(val);
+	}
+
+	if (on_time)
+		*on_time = AV8100_HDMI_5_VOLT_TIME_ON_TIME_GET(val);
+
+	UNLOCK_AV8100_HW;
+	return retval;
+}
+EXPORT_SYMBOL(av8100_reg_hdmi_5_volt_time_r);
+
+int av8100_reg_stby_int_mask_r(
+		u8 *hpdm, u8 *cpdm, u8 *stbygpiocfg, u8 *ipol)
+{
+	int retval;
+	u8 val;
+
+	if (av8100_status_get().av8100_state == AV8100_OPMODE_UNDEFINED)
+		return -EINVAL;
+
+	LOCK_AV8100_HW;
+
+	/* Read from register */
+	retval = register_read_internal(AV8100_STANDBY_INTERRUPT_MASK, &val);
+
+	/* Set return params */
+	if (hpdm)
+		*hpdm = AV8100_STANDBY_INTERRUPT_MASK_HPDM_GET(val);
+	if (cpdm)
+		*cpdm = AV8100_STANDBY_INTERRUPT_MASK_CPDM_GET(val);
+	if (stbygpiocfg)
+		*stbygpiocfg =
+			AV8100_STANDBY_INTERRUPT_MASK_STBYGPIOCFG_GET(val);
+	if (ipol)
+		*ipol = AV8100_STANDBY_INTERRUPT_MASK_IPOL_GET(val);
+
+	UNLOCK_AV8100_HW;
+	return retval;
+}
+EXPORT_SYMBOL(av8100_reg_stby_int_mask_r);
+
+int av8100_reg_stby_pend_int_r(
+		u8 *hpdi, u8 *cpdi, u8 *oni, u8 *sid)
+{
+	int retval;
+	u8 val;
+
+	if (av8100_status_get().av8100_state == AV8100_OPMODE_UNDEFINED)
+		return -EINVAL;
+
+	LOCK_AV8100_HW;
+
+	/* Read from register */
+	retval = register_read_internal(AV8100_STANDBY_PENDING_INTERRUPT,
+			&val);
+
+	/* Set return params */
+	if (hpdi)
+		*hpdi = AV8100_STANDBY_PENDING_INTERRUPT_HPDI_GET(val);
+	if (cpdi)
+		*cpdi = AV8100_STANDBY_PENDING_INTERRUPT_CPDI_GET(val);
+	if (oni)
+		*oni = AV8100_STANDBY_PENDING_INTERRUPT_ONI_GET(val);
+	if (sid)
+		*sid = AV8100_STANDBY_PENDING_INTERRUPT_SID_GET(val);
+
+	UNLOCK_AV8100_HW;
+	return retval;
+}
+EXPORT_SYMBOL(av8100_reg_stby_pend_int_r);
+
+int av8100_reg_gen_int_mask_r(
+		u8 *eocm,
+		u8 *vsim,
+		u8 *vsom,
+		u8 *cecm,
+		u8 *hdcpm,
+		u8 *uovbm,
+		u8 *tem)
+{
+	int retval;
+	u8 val;
+
+	if (av8100_status_get().av8100_state == AV8100_OPMODE_UNDEFINED)
+		return -EINVAL;
+
+	LOCK_AV8100_HW;
+
+	/* Read from register */
+	retval = register_read_internal(AV8100_GENERAL_INTERRUPT_MASK, &val);
+
+	/* Set return params */
+	if (eocm)
+		*eocm = AV8100_GENERAL_INTERRUPT_MASK_EOCM_GET(val);
+	if (vsim)
+		*vsim = AV8100_GENERAL_INTERRUPT_MASK_VSIM_GET(val);
+	if (vsom)
+		*vsom = AV8100_GENERAL_INTERRUPT_MASK_VSOM_GET(val);
+	if (cecm)
+		*cecm = AV8100_GENERAL_INTERRUPT_MASK_CECM_GET(val);
+	if (hdcpm)
+		*hdcpm = AV8100_GENERAL_INTERRUPT_MASK_HDCPM_GET(val);
+	if (uovbm)
+		*uovbm = AV8100_GENERAL_INTERRUPT_MASK_UOVBM_GET(val);
+	if (tem)
+		*tem = AV8100_GENERAL_INTERRUPT_MASK_TEM_GET(val);
+
+	UNLOCK_AV8100_HW;
+	return retval;
+}
+EXPORT_SYMBOL(av8100_reg_gen_int_mask_r);
+
+int av8100_reg_gen_int_r(
+		u8 *eoci,
+		u8 *vsii,
+		u8 *vsoi,
+		u8 *ceci,
+		u8 *hdcpi,
+		u8 *uovbi,
+		u8 *tei)
+{
+	int retval;
+	u8 val;
+
+	if (av8100_status_get().av8100_state == AV8100_OPMODE_UNDEFINED)
+		return -EINVAL;
+
+	LOCK_AV8100_HW;
+
+	/* Read from register */
+	retval = register_read_internal(AV8100_GENERAL_INTERRUPT, &val);
+
+	/* Set return params */
+	if (eoci)
+		*eoci = AV8100_GENERAL_INTERRUPT_EOCI_GET(val);
+	if (vsii)
+		*vsii = AV8100_GENERAL_INTERRUPT_VSII_GET(val);
+	if (vsoi)
+		*vsoi = AV8100_GENERAL_INTERRUPT_VSOI_GET(val);
+	if (ceci)
+		*ceci = AV8100_GENERAL_INTERRUPT_CECI_GET(val);
+	if (hdcpi)
+		*hdcpi = AV8100_GENERAL_INTERRUPT_HDCPI_GET(val);
+	if (uovbi)
+		*uovbi = AV8100_GENERAL_INTERRUPT_UOVBI_GET(val);
+	if (tei)
+		*tei = AV8100_GENERAL_INTERRUPT_TEI_GET(val);
+
+	UNLOCK_AV8100_HW;
+	return retval;
+}
+EXPORT_SYMBOL(av8100_reg_gen_int_r);
+
+int av8100_reg_gen_status_r(
+		u8 *cectxerr,
+		u8 *cecrec,
+		u8 *cectrx,
+		u8 *uc,
+		u8 *onuvb,
+		u8 *hdcps)
+{
+	int retval;
+	u8 val;
+
+	if (av8100_status_get().av8100_state == AV8100_OPMODE_UNDEFINED)
+		return -EINVAL;
+
+	LOCK_AV8100_HW;
+
+	/* Read from register */
+	retval = register_read_internal(AV8100_GENERAL_STATUS, &val);
+
+	/* Set return params */
+	if (cectxerr)
+		*cectxerr = AV8100_GENERAL_STATUS_CECTXERR_GET(val);
+	if (cecrec)
+		*cecrec	= AV8100_GENERAL_STATUS_CECREC_GET(val);
+	if (cectrx)
+		*cectrx	= AV8100_GENERAL_STATUS_CECTRX_GET(val);
+	if (uc)
+		*uc = AV8100_GENERAL_STATUS_UC_GET(val);
+	if (onuvb)
+		*onuvb = AV8100_GENERAL_STATUS_ONUVB_GET(val);
+	if (hdcps)
+		*hdcps = AV8100_GENERAL_STATUS_HDCPS_GET(val);
+
+	UNLOCK_AV8100_HW;
+	return retval;
+}
+EXPORT_SYMBOL(av8100_reg_gen_status_r);
+
+int av8100_reg_gpio_conf_r(
+		u8 *dat3dir,
+		u8 *dat3val,
+		u8 *dat2dir,
+		u8 *dat2val,
+		u8 *dat1dir,
+		u8 *dat1val,
+		u8 *ucdbg)
+{
+	int retval;
+	u8 val;
+
+	if (av8100_status_get().av8100_state == AV8100_OPMODE_UNDEFINED)
+		return -EINVAL;
+
+	LOCK_AV8100_HW;
+
+	/* Read from register */
+	retval = register_read_internal(AV8100_GPIO_CONFIGURATION, &val);
+
+	/* Set return params */
+	if (dat3dir)
+		*dat3dir = AV8100_GPIO_CONFIGURATION_DAT3DIR_GET(val);
+	if (dat3val)
+		*dat3val = AV8100_GPIO_CONFIGURATION_DAT3VAL_GET(val);
+	if (dat2dir)
+		*dat2dir = AV8100_GPIO_CONFIGURATION_DAT2DIR_GET(val);
+	if (dat2val)
+		*dat2val = AV8100_GPIO_CONFIGURATION_DAT2VAL_GET(val);
+	if (dat1dir)
+		*dat1dir = AV8100_GPIO_CONFIGURATION_DAT1DIR_GET(val);
+	if (dat1val)
+		*dat1val = AV8100_GPIO_CONFIGURATION_DAT1VAL_GET(val);
+	if (ucdbg)
+		*ucdbg = AV8100_GPIO_CONFIGURATION_UCDBG_GET(val);
+
+	UNLOCK_AV8100_HW;
+	return retval;
+}
+EXPORT_SYMBOL(av8100_reg_gpio_conf_r);
+
+int av8100_reg_gen_ctrl_r(
+		u8 *fdl,
+		u8 *hld,
+		u8 *wa,
+		u8 *ra)
+{
+	int retval;
+	u8 val;
+
+	if (av8100_status_get().av8100_state == AV8100_OPMODE_UNDEFINED)
+		return -EINVAL;
+
+	LOCK_AV8100_HW;
+
+	/* Read from register */
+	retval = register_read_internal(AV8100_GENERAL_CONTROL, &val);
+	/* Set return params */
+	if (fdl)
+		*fdl = AV8100_GENERAL_CONTROL_FDL_GET(val);
+	if (hld)
+		*hld = AV8100_GENERAL_CONTROL_HLD_GET(val);
+	if (wa)
+		*wa = AV8100_GENERAL_CONTROL_WA_GET(val);
+	if (ra)
+		*ra = AV8100_GENERAL_CONTROL_RA_GET(val);
+
+	UNLOCK_AV8100_HW;
+	return retval;
+}
+EXPORT_SYMBOL(av8100_reg_gen_ctrl_r);
+
+int av8100_reg_fw_dl_entry_r(
+	u8 *mbyte_code_entry)
+{
+	int retval;
+	u8 val;
+
+	if (av8100_status_get().av8100_state == AV8100_OPMODE_UNDEFINED)
+		return -EINVAL;
+
+	LOCK_AV8100_HW;
+
+	/* Read from register */
+	retval = register_read_internal(AV8100_FIRMWARE_DOWNLOAD_ENTRY,	&val);
+
+	/* Set return params */
+	if (mbyte_code_entry)
+		*mbyte_code_entry =
+		AV8100_FIRMWARE_DOWNLOAD_ENTRY_MBYTE_CODE_ENTRY_GET(val);
+
+	UNLOCK_AV8100_HW;
+	return retval;
+}
+EXPORT_SYMBOL(av8100_reg_fw_dl_entry_r);
+
+int av8100_reg_r(
+		u8 offset,
+		u8 *value)
+{
+	int retval = 0;
+	struct i2c_client *i2c;
+
+	if (av8100_status_get().av8100_state == AV8100_OPMODE_UNDEFINED)
+		return -EINVAL;
+
+	LOCK_AV8100_HW;
+
+	if (!av8100_config) {
+		retval = AV8100_FAIL;
+		goto av8100_register_read_out;
+	}
+
+	i2c = av8100_config->client;
+
+	/* Read from register */
+	retval = read_single_byte(i2c, offset, value);
+	if (retval)	{
+		dev_dbg(av8100dev,
+			"Failed to read the value from av8100 register\n");
+		retval = -EFAULT;
+		goto av8100_register_read_out;
+	}
+
+av8100_register_read_out:
+	UNLOCK_AV8100_HW;
+	return retval;
+}
+EXPORT_SYMBOL(av8100_reg_r);
+
+int av8100_conf_get(enum av8100_command_type command_type,
+	union av8100_configuration *config)
+{
+	if (av8100_status_get().av8100_state == AV8100_OPMODE_UNDEFINED)
+		return -EINVAL;
+
+	if (!av8100_config || !config)
+		return AV8100_FAIL;
+
+	/* Put configuration data to the corresponding data struct depending
+	 * on command type */
+	switch (command_type) {
+	case AV8100_COMMAND_VIDEO_INPUT_FORMAT:
+		memcpy(&config->video_input_format,
+			&av8100_config->hdmi_video_input_cmd,
+			sizeof(struct av8100_video_input_format_cmd));
+		break;
+
+	case AV8100_COMMAND_AUDIO_INPUT_FORMAT:
+		memcpy(&config->audio_input_format,
+			&av8100_config->hdmi_audio_input_cmd,
+			sizeof(struct av8100_audio_input_format_cmd));
+		break;
+
+	case AV8100_COMMAND_VIDEO_OUTPUT_FORMAT:
+		memcpy(&config->video_output_format,
+			&av8100_config->hdmi_video_output_cmd,
+			sizeof(struct av8100_video_output_format_cmd));
+		break;
+
+	case AV8100_COMMAND_VIDEO_SCALING_FORMAT:
+		memcpy(&config->video_scaling_format,
+			&av8100_config->hdmi_video_scaling_cmd,
+			sizeof(struct av8100_video_scaling_format_cmd));
+		break;
+
+	case AV8100_COMMAND_COLORSPACECONVERSION:
+		config->color_transform = av8100_config->color_transform;
+		break;
+
+	case AV8100_COMMAND_CEC_MESSAGE_WRITE:
+		memcpy(&config->cec_message_write_format,
+			&av8100_config->hdmi_cec_message_write_cmd,
+			sizeof(struct av8100_cec_message_write_format_cmd));
+		break;
+
+	case AV8100_COMMAND_CEC_MESSAGE_READ_BACK:
+		memcpy(&config->cec_message_read_back_format,
+			&av8100_config->hdmi_cec_message_read_back_cmd,
+			sizeof(struct av8100_cec_message_read_back_format_cmd));
+		break;
+
+	case AV8100_COMMAND_DENC:
+		memcpy(&config->denc_format, &av8100_config->hdmi_denc_cmd,
+				sizeof(struct av8100_denc_format_cmd));
+		break;
+
+	case AV8100_COMMAND_HDMI:
+		memcpy(&config->hdmi_format, &av8100_config->hdmi_cmd,
+				sizeof(struct av8100_hdmi_cmd));
+		break;
+
+	case AV8100_COMMAND_HDCP_SENDKEY:
+		memcpy(&config->hdcp_send_key_format,
+			&av8100_config->hdmi_hdcp_send_key_cmd,
+			sizeof(struct av8100_hdcp_send_key_format_cmd));
+		break;
+
+	case AV8100_COMMAND_HDCP_MANAGEMENT:
+		memcpy(&config->hdcp_management_format,
+			&av8100_config->hdmi_hdcp_management_format_cmd,
+			sizeof(struct av8100_hdcp_management_format_cmd));
+		break;
+
+	case AV8100_COMMAND_INFOFRAMES:
+		memcpy(&config->infoframes_format,
+			&av8100_config->hdmi_infoframes_cmd,
+			sizeof(struct av8100_infoframes_format_cmd));
+		break;
+
+	case AV8100_COMMAND_EDID_SECTION_READBACK:
+		memcpy(&config->edid_section_readback_format,
+			&av8100_config->hdmi_edid_section_readback_cmd,
+			sizeof(struct
+				av8100_edid_section_readback_format_cmd));
+		break;
+
+	case AV8100_COMMAND_PATTERNGENERATOR:
+		memcpy(&config->pattern_generator_format,
+			&av8100_config->hdmi_pattern_generator_cmd,
+			sizeof(struct av8100_pattern_generator_format_cmd));
+		break;
+
+	case AV8100_COMMAND_FUSE_AES_KEY:
+		memcpy(&config->fuse_aes_key_format,
+			&av8100_config->hdmi_fuse_aes_key_cmd,
+			sizeof(struct av8100_fuse_aes_key_format_cmd));
+		break;
+
+	default:
+		return AV8100_FAIL;
+		break;
+	}
+
+	return 0;
+}
+EXPORT_SYMBOL(av8100_conf_get);
+
+int av8100_conf_prep(enum av8100_command_type command_type,
+	union av8100_configuration *config)
+{
+	if (!av8100_config || !config)
+		return AV8100_FAIL;
+
+	/* Put configuration data to the corresponding data struct depending
+	 * on command type */
+	switch (command_type) {
+	case AV8100_COMMAND_VIDEO_INPUT_FORMAT:
+		memcpy(&av8100_config->hdmi_video_input_cmd,
+			&config->video_input_format,
+			sizeof(struct av8100_video_input_format_cmd));
+		break;
+
+	case AV8100_COMMAND_AUDIO_INPUT_FORMAT:
+		memcpy(&av8100_config->hdmi_audio_input_cmd,
+			&config->audio_input_format,
+			sizeof(struct av8100_audio_input_format_cmd));
+		break;
+
+	case AV8100_COMMAND_VIDEO_OUTPUT_FORMAT:
+		memcpy(&av8100_config->hdmi_video_output_cmd,
+			&config->video_output_format,
+			sizeof(struct av8100_video_output_format_cmd));
+
+		/* Set params that depend on video output */
+		av8100_config_video_output_dep(av8100_config->
+			hdmi_video_output_cmd.video_output_cea_vesa);
+		break;
+
+	case AV8100_COMMAND_VIDEO_SCALING_FORMAT:
+		memcpy(&av8100_config->hdmi_video_scaling_cmd,
+			&config->video_scaling_format,
+			sizeof(struct av8100_video_scaling_format_cmd));
+		break;
+
+	case AV8100_COMMAND_COLORSPACECONVERSION:
+		av8100_config->color_transform = config->color_transform;
+		break;
+
+	case AV8100_COMMAND_CEC_MESSAGE_WRITE:
+		memcpy(&av8100_config->hdmi_cec_message_write_cmd,
+			&config->cec_message_write_format,
+			sizeof(struct av8100_cec_message_write_format_cmd));
+		break;
+
+	case AV8100_COMMAND_CEC_MESSAGE_READ_BACK:
+		memcpy(&av8100_config->hdmi_cec_message_read_back_cmd,
+			&config->cec_message_read_back_format,
+			sizeof(struct av8100_cec_message_read_back_format_cmd));
+		break;
+
+	case AV8100_COMMAND_DENC:
+		memcpy(&av8100_config->hdmi_denc_cmd, &config->denc_format,
+				sizeof(struct av8100_denc_format_cmd));
+		break;
+
+	case AV8100_COMMAND_HDMI:
+		memcpy(&av8100_config->hdmi_cmd, &config->hdmi_format,
+				sizeof(struct av8100_hdmi_cmd));
+		break;
+
+	case AV8100_COMMAND_HDCP_SENDKEY:
+		memcpy(&av8100_config->hdmi_hdcp_send_key_cmd,
+			&config->hdcp_send_key_format,
+			sizeof(struct av8100_hdcp_send_key_format_cmd));
+		break;
+
+	case AV8100_COMMAND_HDCP_MANAGEMENT:
+		memcpy(&av8100_config->hdmi_hdcp_management_format_cmd,
+			&config->hdcp_management_format,
+			sizeof(struct av8100_hdcp_management_format_cmd));
+		break;
+
+	case AV8100_COMMAND_INFOFRAMES:
+		memcpy(&av8100_config->hdmi_infoframes_cmd,
+			&config->infoframes_format,
+			sizeof(struct av8100_infoframes_format_cmd));
+		break;
+
+	case AV8100_COMMAND_EDID_SECTION_READBACK:
+		memcpy(&av8100_config->hdmi_edid_section_readback_cmd,
+			&config->edid_section_readback_format,
+			sizeof(struct
+				av8100_edid_section_readback_format_cmd));
+		break;
+
+	case AV8100_COMMAND_PATTERNGENERATOR:
+		memcpy(&av8100_config->hdmi_pattern_generator_cmd,
+			&config->pattern_generator_format,
+			sizeof(struct av8100_pattern_generator_format_cmd));
+		break;
+
+	case AV8100_COMMAND_FUSE_AES_KEY:
+		memcpy(&av8100_config->hdmi_fuse_aes_key_cmd,
+			&config->fuse_aes_key_format,
+			sizeof(struct av8100_fuse_aes_key_format_cmd));
+		break;
+
+	default:
+		return AV8100_FAIL;
+		break;
+	}
+
+	return 0;
+}
+EXPORT_SYMBOL(av8100_conf_prep);
+
+int av8100_conf_w(enum av8100_command_type command_type,
+	u8 *return_buffer_length,
+	u8 *return_buffer, enum interface_type if_type)
+{
+	int retval = 0;
+	u8 cmd_buffer[AV8100_COMMAND_MAX_LENGTH];
+	u32 cmd_length = 0;
+	struct i2c_client *i2c;
+
+	if (av8100_status_get().av8100_state == AV8100_OPMODE_UNDEFINED)
+		return -EINVAL;
+
+	if (return_buffer_length)
+		*return_buffer_length = 0;
+
+	if (!av8100_config)
+		return AV8100_FAIL;
+
+	i2c = av8100_config->client;
+
+	memset(&cmd_buffer, 0x00, AV8100_COMMAND_MAX_LENGTH);
+
+#define PRNK_MODE(_m) dev_dbg(av8100dev, "cmd: " #_m "\n");
+
+	/* Fill the command buffer with configuration data */
+	switch (command_type) {
+	case AV8100_COMMAND_VIDEO_INPUT_FORMAT:
+		PRNK_MODE(AV8100_COMMAND_VIDEO_INPUT_FORMAT);
+		configuration_video_input_get(cmd_buffer, &cmd_length);
+		break;
+
+	case AV8100_COMMAND_AUDIO_INPUT_FORMAT:
+		PRNK_MODE(AV8100_COMMAND_AUDIO_INPUT_FORMAT);
+		configuration_audio_input_get(cmd_buffer, &cmd_length);
+		break;
+
+	case AV8100_COMMAND_VIDEO_OUTPUT_FORMAT:
+		PRNK_MODE(AV8100_COMMAND_VIDEO_OUTPUT_FORMAT);
+		configuration_video_output_get(cmd_buffer, &cmd_length);
+		break;
+
+	case AV8100_COMMAND_VIDEO_SCALING_FORMAT:
+		PRNK_MODE(AV8100_COMMAND_VIDEO_SCALING_FORMAT);
+		configuration_video_scaling_get(cmd_buffer,
+			&cmd_length);
+		break;
+
+	case AV8100_COMMAND_COLORSPACECONVERSION:
+		PRNK_MODE(AV8100_COMMAND_COLORSPACECONVERSION);
+		configuration_colorspace_conversion_get(cmd_buffer,
+			&cmd_length);
+		break;
+
+	case AV8100_COMMAND_CEC_MESSAGE_WRITE:
+		PRNK_MODE(AV8100_COMMAND_CEC_MESSAGE_WRITE);
+		configuration_cec_message_write_get(cmd_buffer,
+			&cmd_length);
+		break;
+
+	case AV8100_COMMAND_CEC_MESSAGE_READ_BACK:
+		PRNK_MODE(AV8100_COMMAND_CEC_MESSAGE_READ_BACK);
+		configuration_cec_message_read_get(cmd_buffer,
+			&cmd_length);
+		break;
+
+	case AV8100_COMMAND_DENC:
+		PRNK_MODE(AV8100_COMMAND_DENC);
+		configuration_denc_get(cmd_buffer, &cmd_length);
+		break;
+
+	case AV8100_COMMAND_HDMI:
+		PRNK_MODE(AV8100_COMMAND_HDMI);
+		configuration_hdmi_get(cmd_buffer, &cmd_length);
+		break;
+
+	case AV8100_COMMAND_HDCP_SENDKEY:
+		PRNK_MODE(AV8100_COMMAND_HDCP_SENDKEY);
+		configuration_hdcp_sendkey_get(cmd_buffer, &cmd_length);
+		break;
+
+	case AV8100_COMMAND_HDCP_MANAGEMENT:
+		PRNK_MODE(AV8100_COMMAND_HDCP_MANAGEMENT);
+		configuration_hdcp_management_get(cmd_buffer,
+			&cmd_length);
+		break;
+
+	case AV8100_COMMAND_INFOFRAMES:
+		PRNK_MODE(AV8100_COMMAND_INFOFRAMES);
+		configuration_infoframe_get(cmd_buffer, &cmd_length);
+		break;
+
+	case AV8100_COMMAND_EDID_SECTION_READBACK:
+		PRNK_MODE(AV8100_COMMAND_EDID_SECTION_READBACK);
+		av8100_edid_section_readback_get(cmd_buffer, &cmd_length);
+		break;
+
+	case AV8100_COMMAND_PATTERNGENERATOR:
+		PRNK_MODE(AV8100_COMMAND_PATTERNGENERATOR);
+		configuration_pattern_generator_get(cmd_buffer,
+			&cmd_length);
+		break;
+
+	case AV8100_COMMAND_FUSE_AES_KEY:
+		PRNK_MODE(AV8100_COMMAND_FUSE_AES_KEY);
+		configuration_fuse_aes_key_get(cmd_buffer, &cmd_length);
+		break;
+
+	default:
+		dev_dbg(av8100dev, "Invalid command type\n");
+		retval = AV8100_INVALID_COMMAND;
+		break;
+	}
+
+	LOCK_AV8100_HW;
+
+	if (if_type == I2C_INTERFACE) {
+		int cnt = 0;
+		dev_dbg(av8100dev, "av8100_conf_w cmd_type:%02x length:%02x ",
+			command_type, cmd_length);
+		dev_dbg(av8100dev, "buffer: ");
+		while (cnt < cmd_length) {
+			dev_dbg(av8100dev, "%02x ", cmd_buffer[cnt]);
+			cnt++;
+		}
+
+		/* Write the command buffer */
+		retval = write_multi_byte(i2c,
+			AV8100_CMD_BUF_OFFSET, cmd_buffer, cmd_length);
+		if (retval) {
+			UNLOCK_AV8100_HW;
+			return retval;
+		}
+
+		/* Write the command */
+		retval = write_single_byte(i2c, AV8100_COMMAND_OFFSET,
+			command_type);
+		if (retval) {
+			UNLOCK_AV8100_HW;
+			return retval;
+		}
+
+
+		/* Get the first return byte */
+		mdelay(AV8100_CMD_RET_WAITTIME_MS);
+		cnt = AV8100_CMD_RET_TRIES;
+		retval = get_command_return_first(i2c, command_type);
+		while (retval && (cnt-- > 0)) {
+			mdelay(AV8100_CMD_RET_WAITTIME_MS);
+			retval = get_command_return_first(i2c, command_type);
+		}
+		dev_dbg(av8100dev, "first return cnt:%d\n", cnt);
+
+		if (retval) {
+			UNLOCK_AV8100_HW;
+			return retval;
+		}
+
+		retval = get_command_return_data(i2c, command_type, cmd_buffer,
+			return_buffer_length, return_buffer);
+	} else if (if_type == DSI_INTERFACE) {
+		/* TODO */
+	} else {
+		retval = AV8100_INVALID_INTERFACE;
+		dev_dbg(av8100dev, "Invalid command type\n");
+	}
+
+	if (command_type == AV8100_COMMAND_HDMI) {
+		g_av8100_status.hdmi_on = ((av8100_config->hdmi_cmd.
+			hdmi_mode == AV8100_HDMI_ON) &&
+			(av8100_config->hdmi_cmd.hdmi_format == AV8100_HDMI));
+	}
+
+	UNLOCK_AV8100_HW;
+	return retval;
+}
+EXPORT_SYMBOL(av8100_conf_w);
+
+int av8100_conf_w_raw(enum av8100_command_type command_type,
+	u8 buffer_length,
+	u8 *buffer,
+	u8 *return_buffer_length,
+	u8 *return_buffer)
+{
+	int retval = 0;
+	struct i2c_client *i2c;
+	int cnt;
+
+	if (av8100_status_get().av8100_state == AV8100_OPMODE_UNDEFINED)
+		return -EINVAL;
+
+	LOCK_AV8100_HW;
+
+	if (return_buffer_length)
+		*return_buffer_length = 0;
+
+	if (!av8100_config) {
+		retval = AV8100_FAIL;
+		goto av8100_conf_w_raw_out;
+	}
+
+	i2c = av8100_config->client;
+
+	/* Write the command buffer */
+	retval = write_multi_byte(i2c,
+		AV8100_CMD_BUF_OFFSET, buffer, buffer_length);
+	if (retval)
+		goto av8100_conf_w_raw_out;
+
+	/* Write the command */
+	retval = write_single_byte(i2c, AV8100_COMMAND_OFFSET,
+		command_type);
+	if (retval)
+		goto av8100_conf_w_raw_out;
+
+
+	/* Get the first return byte */
+	mdelay(AV8100_CMD_RET_WAITTIME_MS);
+	cnt = AV8100_CMD_RET_TRIES;
+	retval = get_command_return_first(i2c, command_type);
+	while (retval && (cnt-- > 0)) {
+		mdelay(AV8100_CMD_RET_WAITTIME_MS);
+		retval = get_command_return_first(i2c, command_type);
+	}
+	dev_dbg(av8100dev, "first return cnt:%d\n", cnt);
+	if (retval)
+		goto av8100_conf_w_raw_out;
+
+	retval = get_command_return_data(i2c, command_type, buffer,
+		return_buffer_length, return_buffer);
+
+av8100_conf_w_raw_out:
+	UNLOCK_AV8100_HW;
+	return retval;
+}
+EXPORT_SYMBOL(av8100_conf_w_raw);
+
+struct av8100_status av8100_status_get(void)
+{
+	return g_av8100_status;
+}
+EXPORT_SYMBOL(av8100_status_get);
+
+enum av8100_output_CEA_VESA av8100_video_output_format_get(int xres,
+	int yres,
+	int htot,
+	int vtot,
+	int pixelclk,
+	bool interlaced)
+{
+	enum av8100_output_CEA_VESA index = 1;
+	int yres_div = !interlaced ? 1 : 2;
+	int hres_div = 1;
+	long freq1;
+	long freq2;
+
+	/*
+	* 720_576_I need a divider for hact and htot since
+	* these params need to be twice as large as expected in av8100_all_cea,
+	* which is used as input parameter to video input config.
+	*/
+	if ((xres == 720) && (yres == 576) && (interlaced == true))
+		hres_div = 2;
+
+	freq1 = 1000000 / htot * 1000000 / vtot / pixelclk + 1;
+	while (index < sizeof(av8100_all_cea)/sizeof(struct av8100_cea)) {
+		freq2 = av8100_all_cea[index].frequence /
+			av8100_all_cea[index].htotale /
+			av8100_all_cea[index].vtotale;
+
+		dev_dbg(av8100dev, "freq1:%ld freq2:%ld\n", freq1, freq2);
+		if ((xres == av8100_all_cea[index].hactive / hres_div) &&
+			(yres == av8100_all_cea[index].vactive * yres_div) &&
+			(htot == av8100_all_cea[index].htotale / hres_div) &&
+			(vtot == av8100_all_cea[index].vtotale) &&
+			(abs(freq1 - freq2) < 2)) {
+			goto av8100_video_output_format_get_out;
+		}
+		index++;
+	}
+
+av8100_video_output_format_get_out:
+	dev_dbg(av8100dev, "av8100_video_output_format_get %d %d %d %d %d\n",
+		xres, yres, htot, vtot, index);
+	return index;
+}
+EXPORT_SYMBOL(av8100_video_output_format_get);
+
+void av8100_hdmi_event_cb_set(void (*hdmi_ev_cb)(enum av8100_hdmi_event))
+{
+	if (av8100_globals)
+		av8100_globals->hdmi_ev_cb = hdmi_ev_cb;
+}
+EXPORT_SYMBOL(av8100_hdmi_event_cb_set);
+
+u8 av8100_ver_get(void)
+{
+	u8 ret;
+
+	LOCK_AV8100_HW;
+	ret = chip_version;
+	UNLOCK_AV8100_HW;
+
+	return ret;
+}
+EXPORT_SYMBOL(av8100_ver_get);
+
+static const struct color_conversion_cmd *get_color_transform_cmd(
+				enum av8100_color_transform transform)
+{
+	const struct color_conversion_cmd *result;
+
+	switch (transform) {
+	case AV8100_COLOR_TRANSFORM_INDENTITY:
+		result = &col_trans_identity;
+		break;
+	case AV8100_COLOR_TRANSFORM_INDENTITY_CLAMP_YUV:
+		result = &col_trans_identity_clamp_yuv;
+		break;
+	case AV8100_COLOR_TRANSFORM_YUV_TO_RGB:
+		if (chip_version == AV8100_CHIPVER_1)
+			result = &col_trans_yuv_to_rgb_v1;
+		else
+			result = &col_trans_yuv_to_rgb_v2;
+		break;
+	case AV8100_COLOR_TRANSFORM_YUV_TO_DENC:
+		result = &col_trans_yuv_to_denc;
+		break;
+	case AV8100_COLOR_TRANSFORM_RGB_TO_DENC:
+		result = &col_trans_rgb_to_denc;
+		break;
+	default:
+		dev_warn(av8100dev, "Unknown color space transform\n");
+		result = &col_trans_identity;
+		break;
+	}
+	return result;
+}
+
+static int av8100_open(struct inode *inode, struct file *filp)
+{
+	dev_dbg(av8100dev, "av8100_open is called\n");
+	return 0;
+}
+
+static int av8100_release(struct inode *inode, struct file *filp)
+{
+	dev_dbg(av8100dev, "av8100_release is called\n");
+	return 0;
+}
+
+static int av8100_ioctl(struct inode *inode, struct file *file,
+				unsigned int cmd, unsigned long arg)
+{
+	return 0;
+}
+
+static int __devinit av8100_probe(struct i2c_client *i2cClient,
+	const struct i2c_device_id *id)
+{
+	int ret = 0;
+	struct av8100_platform_data *pdata = i2cClient->dev.platform_data;
+
+	av8100dev = &i2cClient->dev;
+
+	dev_dbg(av8100dev, "%s\n", __func__);
+
+	av8100_set_state(AV8100_OPMODE_UNDEFINED);
+
+	ret = av8100_config_init();
+	if (ret) {
+		dev_info(av8100dev, "av8100_config_init failed\n");
+		goto err;
+	}
+
+	ret = av8100_globals_init();
+	if (ret) {
+		dev_info(av8100dev, "av8100_globals_init failed\n");
+		goto err;
+	}
+
+	if (!i2c_check_functionality(i2cClient->adapter,
+		I2C_FUNC_SMBUS_BYTE_DATA |
+		I2C_FUNC_SMBUS_READ_WORD_DATA)) {
+		ret = -ENODEV;
+		dev_info(av8100dev, "av8100 i2c_check_functionality failed\n");
+		goto err;
+	}
+
+	init_waitqueue_head(&av8100_event);
+
+	av8100_config->client = i2cClient;
+	av8100_config->id = (struct i2c_device_id *) id;
+	i2c_set_clientdata(i2cClient, av8100_config);
+
+	kthread_run(av8100_thread, NULL, "av8100_thread");
+
+	ret = request_irq(pdata->irq, av8100_intr_handler,
+			IRQF_TRIGGER_RISING, "av8100", av8100_config);
+	if (ret) {
+		dev_err(av8100dev, "av8100_hw request_irq %d failed %d\n",
+			pdata->irq, ret);
+		gpio_free(pdata->irq);
+		goto err;
+	}
+
+	/* Get regulator resource */
+	if (pdata->regulator_pwr_id) {
+		av8100_globals->regulator_pwr = regulator_get(av8100dev,
+				pdata->regulator_pwr_id);
+		if (IS_ERR(av8100_globals->regulator_pwr)) {
+			ret = PTR_ERR(av8100_globals->regulator_pwr);
+			dev_warn(av8100dev,
+				"%s: Failed to get regulator '%s'\n",
+				__func__, pdata->regulator_pwr_id);
+			av8100_globals->regulator_pwr = NULL;
+			return ret;
+		}
+	}
+
+	/* Get clock resource */
+	av8100_globals->inputclk = clk_get(NULL, pdata->inputclk_id);
+	if (IS_ERR(av8100_globals->inputclk)) {
+		av8100_globals->inputclk = NULL;
+		dev_warn(av8100dev, "%s: Failed to get clock '%s'\n",
+					__func__, pdata->inputclk_id);
+	}
+
+	av8100_set_state(AV8100_OPMODE_SHUTDOWN);
+
+	/* Obtain the chip version */
+	av8100_powerup1();
+	av8100_powerdown();
+
+err:
+	return ret;
+}
+
+static int __devexit av8100_remove(struct i2c_client *i2cClient)
+{
+	dev_dbg(av8100dev, "%s\n", __func__);
+
+	av8100_config_exit();
+	av8100_globals_exit();
+	if (av8100_globals->inputclk)
+		clk_put(av8100_globals->inputclk);
+
+	/* Release regulator resource */
+	if (av8100_globals->regulator_pwr)
+		regulator_put(av8100_globals->regulator_pwr);
+
+	return 0;
+}
+
+int av8100_init(void)
+{
+	int ret;
+
+	pr_debug("%s\n", __func__);
+
+	ret = i2c_add_driver(&av8100_driver);
+	if (ret) {
+		pr_err("av8100 i2c_add_driver failed\n");
+		goto av8100_init_err;
+	}
+
+	ret = misc_register(&av8100_miscdev);
+	if (ret) {
+		pr_err("av8100 misc_register failed\n");
+		goto av8100_init_err;
+	}
+
+	return ret;
+
+av8100_init_err:
+	return ret;
+}
+module_init(av8100_init);
+
+void av8100_exit(void)
+{
+	pr_debug("%s\n", __func__);
+
+	misc_deregister(&av8100_miscdev);
+	i2c_del_driver(&av8100_driver);
+}
+module_exit(av8100_exit);
+
+MODULE_AUTHOR("Per Persson <per.xb.persson@stericsson.com>");
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("ST-Ericsson hdmi display driver");
diff --git a/drivers/video/av8100/av8100_fw.h b/drivers/video/av8100/av8100_fw.h
new file mode 100644
index 00000000000..2beb0736922
--- /dev/null
+++ b/drivers/video/av8100/av8100_fw.h
@@ -0,0 +1,1165 @@
+/*
+ * Copyright (C) ST-Ericsson AB 2010
+ *
+ * Author: Per Persson <per.xb.persson@stericsson.com>
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+
+/* AV8100 Firmware version : Unified version V2.2 for av8100v1 and av8100v2.x */
+#define AV8100_FW_SIZE 18432
+char av8100_fw_buff[AV8100_FW_SIZE] = {
+0x80,0xfe,0xcb,0xfe,0x6b,0xf4,0x22,0xf6,0x22,0xf6,0xb9,0xf7,0x21,0xf5,0xbe,0xf7,
+0x06,0xf9,0xc8,0xfa,0xe5,0xfa,0xf6,0xfa,0x08,0xfb,0x1b,0xfb,0x20,0xfb,0x25,0xfb,
+0x2a,0xfb,0x2f,0xfb,0x44,0xfb,0x7e,0xfb,0x23,0xfc,0x65,0xf4,0x65,0xf4,0x66,0xf4,
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+0x44,0x24,0x49,0x23,0x24,0x49,0x0b,0xad,0x82,0xfe,0xcd,0x9e,0x82,0xfe,0xcd,0x9f,
+0x5b,0x82,0xfe,0xcd,0x80,0xb6,0x82,0xfe,0xcd,0x81,0xb6,0x82,0xfe,0xcd,0x82,0xb6,
+0x82,0xad,0x9f,0x90,0x86,0xad,0x85,0x90,0x84,0x42,0x8c,0x20,0x9f,0x90,0x01,0xab,
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+0x72,0x30,0x20,0x1c,0x72,0x95,0x05,0xa0,0x9e,0x3d,0x18,0xcc,0x5f,0x90,0x5f,0x4f,
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+0x01,0x01,0x35,0x6d,0x01,0x86,0x35,0x6e,0x01,0xa0,0x35,0x6f,0x01,0xc7,0x0f,0x20,
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+0xab,0x5b,0x01,0x6b,0x94,0x84,0xc6,0x02,0x6b,0x95,0x84,0xc6,0x03,0x6b,0x96,0x84,
+0xc6,0x04,0x6b,0x97,0x84,0xc6,0x47,0x25,0x10,0xa1,0x03,0x20,0xc6,0xf2,0x25,0x10,
+0xa1,0x05,0x6b,0x4c,0xc9,0x01,0x4f,0x72,0x05,0xee,0x72,0x05,0x6b,0x4f,0xd2,0x00,
+0x5f,0x72,0xd3,0x00,0x5f,0x72,0xe4,0x01,0x5f,0x72,0xbb,0x00,0x5f,0x72,0xbd,0x00,
+0x5f,0x72,0xbc,0x00,0x5f,0x72,0xda,0x01,0x5f,0x72,0xd9,0x01,0x5f,0x72,0x9b,0x01,
+0x0a,0x35,0x9e,0x01,0x5f,0x72,0x9f,0x01,0x5f,0x72,0xa9,0x01,0x5f,0x72,0xa0,0x01,
+0x5f,0x72,0xa1,0x01,0x5f,0x72,0xa2,0x01,0x5f,0x72,0x86,0x01,0x5f,0x72,0xe9,0x01,
+0x5f,0x72,0xee,0x01,0x5f,0x72,0x71,0x01,0x5f,0x72,0x72,0x01,0x5f,0x72,0xaa,0x00,
+0x5f,0x72,0x74,0x01,0x5f,0x72,0x87,0x01,0x5f,0x72,0x75,0x01,0x5f,0x72,0xbf,0x00,
+0x5f,0x72,0xc0,0x00,0x5f,0x72,0xc1,0x00,0x5f,0x72,0xc2,0x00,0x5f,0x72,0x70,0x01,
+0x5f,0x72,0x11,0x3f,0x10,0x3f,0x73,0x01,0x5f,0x72,0xc7,0x01,0x5f,0x72,0xc8,0x01,
+0x5f,0x72,0xef,0x01,0x5f,0x72,0xf0,0x01,0xff,0x35,0xf2,0x01,0x5f,0x72,0xe8,0x01,
+0x5f,0x72,0x9b,0x06,0x20,0x5f,0x72,0x88,0x88,0x88,0x88,0x88,0x81,0x84,0xe3,0xad,
+0xf4,0x25,0x40,0xa1,0x01,0x6b,0x4c,0x12,0x6f,0x01,0xee,0x72,0x01,0x6b,0x4f,0x88,
+0x81,0x05,0x20,0x10,0x72,0x15,0x20,0x11,0x72,0x10,0x1e,0x23,0x1b,0xcc,0x8b,0xff,
+0xa6,0x04,0xae,0x81,0x85,0x01,0x7b,0x9a,0xc7,0x01,0xc7,0x0f,0xa4,0xc7,0x01,0xc6,
+0xc9,0x01,0x4f,0x72,0xc7,0x01,0x5c,0x72,0x01,0x6b,0xc9,0x01,0xd6,0xc7,0x01,0xce,
+0x18,0x27,0xc7,0x01,0xc1,0xc8,0x01,0xc6,0x9b,0x01,0x6b,0x4f,0x88,0x81,0xc8,0x01,
+0xc7,0x0f,0xa4,0xc8,0x01,0xc6,0xc9,0x01,0xd7,0xc8,0x01,0x5c,0x72,0xc8,0x01,0xce,
+};
diff --git a/drivers/video/av8100/av8100_regs.h b/drivers/video/av8100/av8100_regs.h
new file mode 100644
index 00000000000..7e3dc21895e
--- /dev/null
+++ b/drivers/video/av8100/av8100_regs.h
@@ -0,0 +1,340 @@
+
+#define AV8100_VAL2REG(__reg, __fld, __val) \
+	(((__val) << __reg##_##__fld##_SHIFT) & __reg##_##__fld##_MASK)
+#define AV8100_REG2VAL(__reg, __fld, __val) \
+	(((__val) & __reg##_##__fld##_MASK) >> __reg##_##__fld##_SHIFT)
+
+#define AV8100_STANDBY 0x00000000
+#define AV8100_STANDBY_CPD_SHIFT 0
+#define AV8100_STANDBY_CPD_MASK 0x00000001
+#define AV8100_STANDBY_CPD_HIGH 1
+#define AV8100_STANDBY_CPD_LOW 0
+#define AV8100_STANDBY_CPD(__x) \
+	AV8100_VAL2REG(AV8100_STANDBY, CPD, __x)
+#define AV8100_STANDBY_CPD_GET(__x) \
+	AV8100_REG2VAL(AV8100_STANDBY, CPD, __x)
+#define AV8100_STANDBY_STBY_SHIFT 1
+#define AV8100_STANDBY_STBY_MASK 0x00000002
+#define AV8100_STANDBY_STBY_HIGH 1
+#define AV8100_STANDBY_STBY_LOW 0
+#define AV8100_STANDBY_STBY(__x) \
+	AV8100_VAL2REG(AV8100_STANDBY, STBY, __x)
+#define AV8100_STANDBY_STBY_GET(__x) \
+	AV8100_REG2VAL(AV8100_STANDBY, STBY, __x)
+#define AV8100_STANDBY_HPDS_SHIFT 2
+#define AV8100_STANDBY_HPDS_MASK 0x00000004
+#define AV8100_STANDBY_HPDS(__x) \
+	AV8100_VAL2REG(AV8100_STANDBY, HPDS, __x)
+#define AV8100_STANDBY_HPDS_GET(__x) \
+	AV8100_REG2VAL(AV8100_STANDBY, HPDS, __x)
+#define AV8100_STANDBY_CPDS_SHIFT 3
+#define AV8100_STANDBY_CPDS_MASK 0x00000008
+#define AV8100_STANDBY_CPDS(__x) \
+	AV8100_VAL2REG(AV8100_STANDBY, CPDS, __x)
+#define AV8100_STANDBY_CPDS_GET(__x) \
+	AV8100_REG2VAL(AV8100_STANDBY, CPDS, __x)
+#define AV8100_STANDBY_MCLKRNG_SHIFT 4
+#define AV8100_STANDBY_MCLKRNG_MASK 0x000000F0
+#define AV8100_STANDBY_MCLKRNG(__x) \
+	AV8100_VAL2REG(AV8100_STANDBY, MCLKRNG, __x)
+#define AV8100_STANDBY_MCLKRNG_GET(__x) \
+	AV8100_REG2VAL(AV8100_STANDBY, MCLKRNG, __x)
+#define AV8100_HDMI_5_VOLT_TIME 0x00000001
+#define AV8100_HDMI_5_VOLT_TIME_OFF_TIME_SHIFT 0
+#define AV8100_HDMI_5_VOLT_TIME_OFF_TIME_MASK 0x0000001F
+#define AV8100_HDMI_5_VOLT_TIME_OFF_TIME(__x) \
+	AV8100_VAL2REG(AV8100_HDMI_5_VOLT_TIME, OFF_TIME, __x)
+#define AV8100_HDMI_5_VOLT_TIME_OFF_TIME_GET(__x) \
+	AV8100_REG2VAL(AV8100_HDMI_5_VOLT_TIME, OFF_TIME, __x)
+#define AV8100_HDMI_5_VOLT_TIME_DAC_OFF_TIME_SHIFT 0
+#define AV8100_HDMI_5_VOLT_TIME_DAC_OFF_TIME_MASK 0x00000003
+#define AV8100_HDMI_5_VOLT_TIME_DAC_OFF_TIME(__x) \
+	AV8100_VAL2REG(AV8100_HDMI_5_VOLT_TIME, DAC_OFF_TIME, __x)
+#define AV8100_HDMI_5_VOLT_TIME_DAC_OFF_TIME_GET(__x) \
+	AV8100_REG2VAL(AV8100_HDMI_5_VOLT_TIME, DAC_OFF_TIME, __x)
+#define AV8100_HDMI_5_VOLT_TIME_SU_OFF_TIME_SHIFT 2
+#define AV8100_HDMI_5_VOLT_TIME_SU_OFF_TIME_MASK 0x0000001C
+#define AV8100_HDMI_5_VOLT_TIME_SU_OFF_TIME(__x) \
+	AV8100_VAL2REG(AV8100_HDMI_5_VOLT_TIME, SU_OFF_TIME, __x)
+#define AV8100_HDMI_5_VOLT_TIME_SU_OFF_TIME_GET(__x) \
+	AV8100_REG2VAL(AV8100_HDMI_5_VOLT_TIME, SU_OFF_TIME, __x)
+#define AV8100_HDMI_5_VOLT_TIME_ON_TIME_SHIFT 5
+#define AV8100_HDMI_5_VOLT_TIME_ON_TIME_MASK 0x000000E0
+#define AV8100_HDMI_5_VOLT_TIME_ON_TIME(__x) \
+	AV8100_VAL2REG(AV8100_HDMI_5_VOLT_TIME, ON_TIME, __x)
+#define AV8100_HDMI_5_VOLT_TIME_ON_TIME_GET(__x) \
+	AV8100_REG2VAL(AV8100_HDMI_5_VOLT_TIME, ON_TIME, __x)
+#define AV8100_STANDBY_INTERRUPT_MASK 0x00000002
+#define AV8100_STANDBY_INTERRUPT_MASK_HPDM_SHIFT 0
+#define AV8100_STANDBY_INTERRUPT_MASK_HPDM_MASK 0x00000001
+#define AV8100_STANDBY_INTERRUPT_MASK_HPDM_HIGH 1
+#define AV8100_STANDBY_INTERRUPT_MASK_HPDM_LOW 0
+#define AV8100_STANDBY_INTERRUPT_MASK_HPDM(__x) \
+	AV8100_VAL2REG(AV8100_STANDBY_INTERRUPT_MASK, HPDM, __x)
+#define AV8100_STANDBY_INTERRUPT_MASK_HPDM_GET(__x) \
+	AV8100_REG2VAL(AV8100_STANDBY_INTERRUPT_MASK, HPDM, __x)
+#define AV8100_STANDBY_INTERRUPT_MASK_CPDM_SHIFT 1
+#define AV8100_STANDBY_INTERRUPT_MASK_CPDM_MASK 0x00000002
+#define AV8100_STANDBY_INTERRUPT_MASK_CPDM_HIGH 1
+#define AV8100_STANDBY_INTERRUPT_MASK_CPDM_LOW 0
+#define AV8100_STANDBY_INTERRUPT_MASK_CPDM(__x) \
+	AV8100_VAL2REG(AV8100_STANDBY_INTERRUPT_MASK, CPDM, __x)
+#define AV8100_STANDBY_INTERRUPT_MASK_CPDM_GET(__x) \
+	AV8100_REG2VAL(AV8100_STANDBY_INTERRUPT_MASK, CPDM, __x)
+#define AV8100_STANDBY_INTERRUPT_MASK_STBYGPIOCFG_SHIFT 2
+#define AV8100_STANDBY_INTERRUPT_MASK_STBYGPIOCFG_MASK 0x0000000C
+#define AV8100_STANDBY_INTERRUPT_MASK_STBYGPIOCFG_INPUT 0x00
+#define AV8100_STANDBY_INTERRUPT_MASK_STBYGPIOCFG_ALT 0x01
+#define AV8100_STANDBY_INTERRUPT_MASK_STBYGPIOCFG_OUTPUT0 0x02
+#define AV8100_STANDBY_INTERRUPT_MASK_STBYGPIOCFG_OUTPUT1 0x03
+#define AV8100_STANDBY_INTERRUPT_MASK_STBYGPIOCFG(__x) \
+	AV8100_VAL2REG(AV8100_STANDBY_INTERRUPT_MASK, STBYGPIOCFG, __x)
+#define AV8100_STANDBY_INTERRUPT_MASK_STBYGPIOCFG_GET(__x) \
+	AV8100_REG2VAL(AV8100_STANDBY_INTERRUPT_MASK, STBYGPIOCFG, __x)
+#define AV8100_STANDBY_INTERRUPT_MASK_IPOL_SHIFT 7
+#define AV8100_STANDBY_INTERRUPT_MASK_IPOL_MASK 0x00000080
+#define AV8100_STANDBY_INTERRUPT_MASK_IPOL_HIGH 1
+#define AV8100_STANDBY_INTERRUPT_MASK_IPOL_LOW 0
+#define AV8100_STANDBY_INTERRUPT_MASK_IPOL(__x) \
+	AV8100_VAL2REG(AV8100_STANDBY_INTERRUPT_MASK, IPOL, __x)
+#define AV8100_STANDBY_INTERRUPT_MASK_IPOL_GET(__x) \
+	AV8100_REG2VAL(AV8100_STANDBY_INTERRUPT_MASK, IPOL, __x)
+#define AV8100_STANDBY_PENDING_INTERRUPT 0x00000003
+#define AV8100_STANDBY_PENDING_INTERRUPT_HPDI_SHIFT 0
+#define AV8100_STANDBY_PENDING_INTERRUPT_HPDI_MASK 0x00000001
+#define AV8100_STANDBY_PENDING_INTERRUPT_HPDI_HIGH 1
+#define AV8100_STANDBY_PENDING_INTERRUPT_HPDI_LOW 0
+#define AV8100_STANDBY_PENDING_INTERRUPT_HPDI(__x) \
+	AV8100_VAL2REG(AV8100_STANDBY_PENDING_INTERRUPT, HPDI, __x)
+#define AV8100_STANDBY_PENDING_INTERRUPT_HPDI_GET(__x) \
+	AV8100_REG2VAL(AV8100_STANDBY_PENDING_INTERRUPT, HPDI, __x)
+#define AV8100_STANDBY_PENDING_INTERRUPT_CPDI_SHIFT 1
+#define AV8100_STANDBY_PENDING_INTERRUPT_CPDI_MASK 0x00000002
+#define AV8100_STANDBY_PENDING_INTERRUPT_CPDI_HIGH 1
+#define AV8100_STANDBY_PENDING_INTERRUPT_CPDI_LOW 0
+#define AV8100_STANDBY_PENDING_INTERRUPT_CPDI(__x) \
+	AV8100_VAL2REG(AV8100_STANDBY_PENDING_INTERRUPT, CPDI, __x)
+#define AV8100_STANDBY_PENDING_INTERRUPT_CPDI_GET(__x) \
+	AV8100_REG2VAL(AV8100_STANDBY_PENDING_INTERRUPT, CPDI, __x)
+#define AV8100_STANDBY_PENDING_INTERRUPT_ONI_SHIFT 2
+#define AV8100_STANDBY_PENDING_INTERRUPT_ONI_MASK 0x00000004
+#define AV8100_STANDBY_PENDING_INTERRUPT_ONI_HIGH 1
+#define AV8100_STANDBY_PENDING_INTERRUPT_ONI_LOW 0
+#define AV8100_STANDBY_PENDING_INTERRUPT_ONI(__x) \
+	AV8100_VAL2REG(AV8100_STANDBY_PENDING_INTERRUPT, ONI, __x)
+#define AV8100_STANDBY_PENDING_INTERRUPT_ONI_GET(__x) \
+	AV8100_REG2VAL(AV8100_STANDBY_PENDING_INTERRUPT, ONI, __x)
+#define AV8100_STANDBY_PENDING_INTERRUPT_SID_SHIFT 4
+#define AV8100_STANDBY_PENDING_INTERRUPT_SID_MASK 0x000000F0
+#define AV8100_STANDBY_PENDING_INTERRUPT_SID(__x) \
+	AV8100_VAL2REG(AV8100_STANDBY_PENDING_INTERRUPT, SID, __x)
+#define AV8100_STANDBY_PENDING_INTERRUPT_SID_GET(__x) \
+	AV8100_REG2VAL(AV8100_STANDBY_PENDING_INTERRUPT, SID, __x)
+#define AV8100_GENERAL_INTERRUPT_MASK 0x00000004
+#define AV8100_GENERAL_INTERRUPT_MASK_EOCM_SHIFT 0
+#define AV8100_GENERAL_INTERRUPT_MASK_EOCM_MASK 0x00000001
+#define AV8100_GENERAL_INTERRUPT_MASK_EOCM_HIGH 1
+#define AV8100_GENERAL_INTERRUPT_MASK_EOCM_LOW 0
+#define AV8100_GENERAL_INTERRUPT_MASK_EOCM(__x) \
+	AV8100_VAL2REG(AV8100_GENERAL_INTERRUPT_MASK, EOCM, __x)
+#define AV8100_GENERAL_INTERRUPT_MASK_EOCM_GET(__x) \
+	AV8100_REG2VAL(AV8100_GENERAL_INTERRUPT_MASK, EOCM, __x)
+#define AV8100_GENERAL_INTERRUPT_MASK_VSIM_SHIFT 1
+#define AV8100_GENERAL_INTERRUPT_MASK_VSIM_MASK 0x00000002
+#define AV8100_GENERAL_INTERRUPT_MASK_VSIM_HIGH 1
+#define AV8100_GENERAL_INTERRUPT_MASK_VSIM_LOW 0
+#define AV8100_GENERAL_INTERRUPT_MASK_VSIM(__x) \
+	AV8100_VAL2REG(AV8100_GENERAL_INTERRUPT_MASK, VSIM, __x)
+#define AV8100_GENERAL_INTERRUPT_MASK_VSIM_GET(__x) \
+	AV8100_REG2VAL(AV8100_GENERAL_INTERRUPT_MASK, VSIM, __x)
+#define AV8100_GENERAL_INTERRUPT_MASK_VSOM_SHIFT 2
+#define AV8100_GENERAL_INTERRUPT_MASK_VSOM_MASK 0x00000004
+#define AV8100_GENERAL_INTERRUPT_MASK_VSOM_HIGH 1
+#define AV8100_GENERAL_INTERRUPT_MASK_VSOM_LOW 0
+#define AV8100_GENERAL_INTERRUPT_MASK_VSOM(__x) \
+	AV8100_VAL2REG(AV8100_GENERAL_INTERRUPT_MASK, VSOM, __x)
+#define AV8100_GENERAL_INTERRUPT_MASK_VSOM_GET(__x) \
+	AV8100_REG2VAL(AV8100_GENERAL_INTERRUPT_MASK, VSOM, __x)
+#define AV8100_GENERAL_INTERRUPT_MASK_CECM_SHIFT 3
+#define AV8100_GENERAL_INTERRUPT_MASK_CECM_MASK 0x00000008
+#define AV8100_GENERAL_INTERRUPT_MASK_CECM_HIGH 1
+#define AV8100_GENERAL_INTERRUPT_MASK_CECM_LOW 0
+#define AV8100_GENERAL_INTERRUPT_MASK_CECM(__x) \
+	AV8100_VAL2REG(AV8100_GENERAL_INTERRUPT_MASK, CECM, __x)
+#define AV8100_GENERAL_INTERRUPT_MASK_CECM_GET(__x) \
+	AV8100_REG2VAL(AV8100_GENERAL_INTERRUPT_MASK, CECM, __x)
+#define AV8100_GENERAL_INTERRUPT_MASK_HDCPM_SHIFT 4
+#define AV8100_GENERAL_INTERRUPT_MASK_HDCPM_MASK 0x00000010
+#define AV8100_GENERAL_INTERRUPT_MASK_HDCPM_HIGH 1
+#define AV8100_GENERAL_INTERRUPT_MASK_HDCPM_LOW 0
+#define AV8100_GENERAL_INTERRUPT_MASK_HDCPM(__x) \
+	AV8100_VAL2REG(AV8100_GENERAL_INTERRUPT_MASK, HDCPM, __x)
+#define AV8100_GENERAL_INTERRUPT_MASK_HDCPM_GET(__x) \
+	AV8100_REG2VAL(AV8100_GENERAL_INTERRUPT_MASK, HDCPM, __x)
+#define AV8100_GENERAL_INTERRUPT_MASK_UOVBM_SHIFT 5
+#define AV8100_GENERAL_INTERRUPT_MASK_UOVBM_MASK 0x00000020
+#define AV8100_GENERAL_INTERRUPT_MASK_UOVBM_HIGH 1
+#define AV8100_GENERAL_INTERRUPT_MASK_UOVBM_LOW 0
+#define AV8100_GENERAL_INTERRUPT_MASK_UOVBM(__x) \
+	AV8100_VAL2REG(AV8100_GENERAL_INTERRUPT_MASK, UOVBM, __x)
+#define AV8100_GENERAL_INTERRUPT_MASK_UOVBM_GET(__x) \
+	AV8100_REG2VAL(AV8100_GENERAL_INTERRUPT_MASK, UOVBM, __x)
+#define AV8100_GENERAL_INTERRUPT_MASK_TEM_SHIFT 6
+#define AV8100_GENERAL_INTERRUPT_MASK_TEM_MASK 0x00000040
+#define AV8100_GENERAL_INTERRUPT_MASK_TEM_HIGH 1
+#define AV8100_GENERAL_INTERRUPT_MASK_TEM_LOW 0
+#define AV8100_GENERAL_INTERRUPT_MASK_TEM(__x) \
+	AV8100_VAL2REG(AV8100_GENERAL_INTERRUPT_MASK, TEM, __x)
+#define AV8100_GENERAL_INTERRUPT_MASK_TEM_GET(__x) \
+	AV8100_REG2VAL(AV8100_GENERAL_INTERRUPT_MASK, TEM, __x)
+#define AV8100_GENERAL_INTERRUPT 0x00000005
+#define AV8100_GENERAL_INTERRUPT_EOCI_SHIFT 0
+#define AV8100_GENERAL_INTERRUPT_EOCI_MASK 0x00000001
+#define AV8100_GENERAL_INTERRUPT_EOCI(__x) \
+	AV8100_VAL2REG(AV8100_GENERAL_INTERRUPT, EOCI, __x)
+#define AV8100_GENERAL_INTERRUPT_EOCI_GET(__x) \
+	AV8100_REG2VAL(AV8100_GENERAL_INTERRUPT, EOCI, __x)
+#define AV8100_GENERAL_INTERRUPT_VSII_SHIFT 1
+#define AV8100_GENERAL_INTERRUPT_VSII_MASK 0x00000002
+#define AV8100_GENERAL_INTERRUPT_VSII(__x) \
+	AV8100_VAL2REG(AV8100_GENERAL_INTERRUPT, VSII, __x)
+#define AV8100_GENERAL_INTERRUPT_VSII_GET(__x) \
+	AV8100_REG2VAL(AV8100_GENERAL_INTERRUPT, VSII, __x)
+#define AV8100_GENERAL_INTERRUPT_VSOI_SHIFT 2
+#define AV8100_GENERAL_INTERRUPT_VSOI_MASK 0x00000004
+#define AV8100_GENERAL_INTERRUPT_VSOI(__x) \
+	AV8100_VAL2REG(AV8100_GENERAL_INTERRUPT, VSOI, __x)
+#define AV8100_GENERAL_INTERRUPT_VSOI_GET(__x) \
+	AV8100_REG2VAL(AV8100_GENERAL_INTERRUPT, VSOI, __x)
+#define AV8100_GENERAL_INTERRUPT_CECI_SHIFT 3
+#define AV8100_GENERAL_INTERRUPT_CECI_MASK 0x00000008
+#define AV8100_GENERAL_INTERRUPT_CECI(__x) \
+	AV8100_VAL2REG(AV8100_GENERAL_INTERRUPT, CECI, __x)
+#define AV8100_GENERAL_INTERRUPT_CECI_GET(__x) \
+	AV8100_REG2VAL(AV8100_GENERAL_INTERRUPT, CECI, __x)
+#define AV8100_GENERAL_INTERRUPT_HDCPI_SHIFT 4
+#define AV8100_GENERAL_INTERRUPT_HDCPI_MASK 0x00000010
+#define AV8100_GENERAL_INTERRUPT_HDCPI(__x) \
+	AV8100_VAL2REG(AV8100_GENERAL_INTERRUPT, HDCPI, __x)
+#define AV8100_GENERAL_INTERRUPT_HDCPI_GET(__x) \
+	AV8100_REG2VAL(AV8100_GENERAL_INTERRUPT, HDCPI, __x)
+#define AV8100_GENERAL_INTERRUPT_UOVBI_SHIFT 5
+#define AV8100_GENERAL_INTERRUPT_UOVBI_MASK 0x00000020
+#define AV8100_GENERAL_INTERRUPT_UOVBI(__x) \
+	AV8100_VAL2REG(AV8100_GENERAL_INTERRUPT, UOVBI, __x)
+#define AV8100_GENERAL_INTERRUPT_UOVBI_GET(__x) \
+	AV8100_REG2VAL(AV8100_GENERAL_INTERRUPT, UOVBI, __x)
+#define AV8100_GENERAL_INTERRUPT_TEI_SHIFT 6
+#define AV8100_GENERAL_INTERRUPT_TEI_MASK 0x00000040
+#define AV8100_GENERAL_INTERRUPT_TEI(__x) \
+	AV8100_VAL2REG(AV8100_GENERAL_INTERRUPT, TEI, __x)
+#define AV8100_GENERAL_INTERRUPT_TEI_GET(__x) \
+	AV8100_REG2VAL(AV8100_GENERAL_INTERRUPT, TEI, __x)
+#define AV8100_GENERAL_STATUS 0x00000006
+#define AV8100_GENERAL_STATUS_CECTXERR_SHIFT 0
+#define AV8100_GENERAL_STATUS_CECTXERR_MASK 0x00000001
+#define AV8100_GENERAL_STATUS_CECTXERR_GET(__x) \
+	AV8100_REG2VAL(AV8100_GENERAL_STATUS, CECTXERR, __x)
+#define AV8100_GENERAL_STATUS_CECREC_SHIFT 1
+#define AV8100_GENERAL_STATUS_CECREC_MASK 0x00000002
+#define AV8100_GENERAL_STATUS_CECREC_GET(__x) \
+	AV8100_REG2VAL(AV8100_GENERAL_STATUS, CECREC, __x)
+#define AV8100_GENERAL_STATUS_CECTRX_SHIFT 2
+#define AV8100_GENERAL_STATUS_CECTRX_MASK 0x00000004
+#define AV8100_GENERAL_STATUS_CECTRX_GET(__x) \
+	AV8100_REG2VAL(AV8100_GENERAL_STATUS, CECTRX, __x)
+#define AV8100_GENERAL_STATUS_UC_SHIFT 3
+#define AV8100_GENERAL_STATUS_UC_MASK 0x00000008
+#define AV8100_GENERAL_STATUS_UC_GET(__x) \
+	AV8100_REG2VAL(AV8100_GENERAL_STATUS, UC, __x)
+#define AV8100_GENERAL_STATUS_ONUVB_SHIFT 4
+#define AV8100_GENERAL_STATUS_ONUVB_MASK 0x00000010
+#define AV8100_GENERAL_STATUS_ONUVB_GET(__x) \
+	AV8100_REG2VAL(AV8100_GENERAL_STATUS, ONUVB, __x)
+#define AV8100_GENERAL_STATUS_HDCPS_SHIFT 5
+#define AV8100_GENERAL_STATUS_HDCPS_MASK 0x000000E0
+#define AV8100_GENERAL_STATUS_HDCPS_GET(__x) \
+	AV8100_REG2VAL(AV8100_GENERAL_STATUS, HDCPS, __x)
+#define AV8100_GPIO_CONFIGURATION 0x00000007
+#define AV8100_GPIO_CONFIGURATION_DAT3DIR_SHIFT 0
+#define AV8100_GPIO_CONFIGURATION_DAT3DIR_MASK 0x00000001
+#define AV8100_GPIO_CONFIGURATION_DAT3DIR(__x) \
+	AV8100_VAL2REG(AV8100_GPIO_CONFIGURATION, DAT3DIR, __x)
+#define AV8100_GPIO_CONFIGURATION_DAT3DIR_GET(__x) \
+	AV8100_REG2VAL(AV8100_GPIO_CONFIGURATION, DAT3DIR, __x)
+#define AV8100_GPIO_CONFIGURATION_DAT3VAL_SHIFT 1
+#define AV8100_GPIO_CONFIGURATION_DAT3VAL_MASK 0x00000002
+#define AV8100_GPIO_CONFIGURATION_DAT3VAL(__x) \
+	AV8100_VAL2REG(AV8100_GPIO_CONFIGURATION, DAT3VAL, __x)
+#define AV8100_GPIO_CONFIGURATION_DAT3VAL_GET(__x) \
+	AV8100_REG2VAL(AV8100_GPIO_CONFIGURATION, DAT3VAL, __x)
+#define AV8100_GPIO_CONFIGURATION_DAT2DIR_SHIFT 2
+#define AV8100_GPIO_CONFIGURATION_DAT2DIR_MASK 0x00000004
+#define AV8100_GPIO_CONFIGURATION_DAT2DIR(__x) \
+	AV8100_VAL2REG(AV8100_GPIO_CONFIGURATION, DAT2DIR, __x)
+#define AV8100_GPIO_CONFIGURATION_DAT2DIR_GET(__x) \
+	AV8100_REG2VAL(AV8100_GPIO_CONFIGURATION, DAT2DIR, __x)
+#define AV8100_GPIO_CONFIGURATION_DAT2VAL_SHIFT 3
+#define AV8100_GPIO_CONFIGURATION_DAT2VAL_MASK 0x00000008
+#define AV8100_GPIO_CONFIGURATION_DAT2VAL(__x) \
+	AV8100_VAL2REG(AV8100_GPIO_CONFIGURATION, DAT2VAL, __x)
+#define AV8100_GPIO_CONFIGURATION_DAT2VAL_GET(__x) \
+	AV8100_REG2VAL(AV8100_GPIO_CONFIGURATION, DAT2VAL, __x)
+#define AV8100_GPIO_CONFIGURATION_DAT1DIR_SHIFT 4
+#define AV8100_GPIO_CONFIGURATION_DAT1DIR_MASK 0x00000010
+#define AV8100_GPIO_CONFIGURATION_DAT1DIR(__x) \
+	AV8100_VAL2REG(AV8100_GPIO_CONFIGURATION, DAT1DIR, __x)
+#define AV8100_GPIO_CONFIGURATION_DAT1DIR_GET(__x) \
+	AV8100_REG2VAL(AV8100_GPIO_CONFIGURATION, DAT1DIR, __x)
+#define AV8100_GPIO_CONFIGURATION_DAT1VAL_SHIFT 5
+#define AV8100_GPIO_CONFIGURATION_DAT1VAL_MASK 0x00000020
+#define AV8100_GPIO_CONFIGURATION_DAT1VAL(__x) \
+	AV8100_VAL2REG(AV8100_GPIO_CONFIGURATION, DAT1VAL, __x)
+#define AV8100_GPIO_CONFIGURATION_DAT1VAL_GET(__x) \
+	AV8100_REG2VAL(AV8100_GPIO_CONFIGURATION, DAT1VAL, __x)
+#define AV8100_GPIO_CONFIGURATION_UCDBG_SHIFT 6
+#define AV8100_GPIO_CONFIGURATION_UCDBG_MASK 0x00000040
+#define AV8100_GPIO_CONFIGURATION_UCDBG(__x) \
+	AV8100_VAL2REG(AV8100_GPIO_CONFIGURATION, UCDBG, __x)
+#define AV8100_GPIO_CONFIGURATION_UCDBG_GET(__x) \
+	AV8100_REG2VAL(AV8100_GPIO_CONFIGURATION, UCDBG, __x)
+#define AV8100_GENERAL_CONTROL 0x00000008
+#define AV8100_GENERAL_CONTROL_FDL_SHIFT 4
+#define AV8100_GENERAL_CONTROL_FDL_MASK 0x00000010
+#define AV8100_GENERAL_CONTROL_FDL_HIGH 1
+#define AV8100_GENERAL_CONTROL_FDL_LOW 0
+#define AV8100_GENERAL_CONTROL_FDL(__x) \
+	AV8100_VAL2REG(AV8100_GENERAL_CONTROL, FDL, __x)
+#define AV8100_GENERAL_CONTROL_FDL_GET(__x) \
+	AV8100_REG2VAL(AV8100_GENERAL_CONTROL, FDL, __x)
+#define AV8100_GENERAL_CONTROL_HLD_SHIFT 5
+#define AV8100_GENERAL_CONTROL_HLD_MASK 0x00000020
+#define AV8100_GENERAL_CONTROL_HLD_HIGH 1
+#define AV8100_GENERAL_CONTROL_HLD_LOW 0
+#define AV8100_GENERAL_CONTROL_HLD(__x) \
+	AV8100_VAL2REG(AV8100_GENERAL_CONTROL, HLD, __x)
+#define AV8100_GENERAL_CONTROL_HLD_GET(__x) \
+	AV8100_REG2VAL(AV8100_GENERAL_CONTROL, HLD, __x)
+#define AV8100_GENERAL_CONTROL_WA_SHIFT 6
+#define AV8100_GENERAL_CONTROL_WA_MASK 0x00000040
+#define AV8100_GENERAL_CONTROL_WA_HIGH 1
+#define AV8100_GENERAL_CONTROL_WA_LOW 0
+#define AV8100_GENERAL_CONTROL_WA(__x) \
+	AV8100_VAL2REG(AV8100_GENERAL_CONTROL, WA, __x)
+#define AV8100_GENERAL_CONTROL_WA_GET(__x) \
+	AV8100_REG2VAL(AV8100_GENERAL_CONTROL, WA, __x)
+#define AV8100_GENERAL_CONTROL_RA_SHIFT 7
+#define AV8100_GENERAL_CONTROL_RA_MASK 0x00000080
+#define AV8100_GENERAL_CONTROL_RA_HIGH 1
+#define AV8100_GENERAL_CONTROL_RA_LOW 0
+#define AV8100_GENERAL_CONTROL_RA(__x) \
+	AV8100_VAL2REG(AV8100_GENERAL_CONTROL, RA, __x)
+#define AV8100_GENERAL_CONTROL_RA_GET(__x) \
+	AV8100_REG2VAL(AV8100_GENERAL_CONTROL, RA, __x)
+#define AV8100_FIRMWARE_DOWNLOAD_ENTRY 0x0000000F
+#define AV8100_FIRMWARE_DOWNLOAD_ENTRY_MBYTE_CODE_ENTRY_SHIFT 0
+#define AV8100_FIRMWARE_DOWNLOAD_ENTRY_MBYTE_CODE_ENTRY_MASK 0x000000FF
+#define AV8100_FIRMWARE_DOWNLOAD_ENTRY_MBYTE_CODE_ENTRY(__x) \
+	AV8100_VAL2REG(AV8100_FIRMWARE_DOWNLOAD_ENTRY, MBYTE_CODE_ENTRY, __x)
+#define AV8100_FIRMWARE_DOWNLOAD_ENTRY_MBYTE_CODE_ENTRY_GET(__x) \
+	AV8100_REG2VAL(AV8100_FIRMWARE_DOWNLOAD_ENTRY, MBYTE_CODE_ENTRY, __x)
diff --git a/drivers/video/av8100/hdmi.c b/drivers/video/av8100/hdmi.c
new file mode 100644
index 00000000000..0c7468a09a1
--- /dev/null
+++ b/drivers/video/av8100/hdmi.c
@@ -0,0 +1,2220 @@
+/*
+ * Copyright (C) ST-Ericsson AB 2010
+ *
+ * ST-Ericsson HDMI driver
+ *
+ * Author: Per Persson <per.xb.persson@stericsson.com>
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+
+#include <linux/kernel.h>
+#include <linux/miscdevice.h>
+#include <linux/device.h>
+#include <linux/fs.h>
+#include <linux/ioctl.h>
+#include <linux/uaccess.h>
+#include <video/av8100.h>
+#include <video/hdmi.h>
+#include <linux/poll.h>
+#include <linux/mutex.h>
+#include <linux/ctype.h>
+#include "hdmi_loc.h"
+#include <linux/slab.h>
+#include <linux/sched.h>
+
+#define SYSFS_EVENT_FILENAME "evread"
+
+DEFINE_MUTEX(hdmi_events_mutex);
+#define LOCK_HDMI_EVENTS mutex_lock(&hdmi_events_mutex)
+#define UNLOCK_HDMI_EVENTS mutex_unlock(&hdmi_events_mutex)
+#define EVENTS_MASK 0xFF
+
+static int device_open;
+static int events;
+static int events_mask;
+static bool events_received;
+static wait_queue_head_t hdmi_event_wq;
+struct device *hdmidev;
+
+static ssize_t store_storeastext(struct device *dev,
+		struct device_attribute *attr, const char *buf, size_t count);
+static ssize_t store_plugdeten(struct device *dev,
+		struct device_attribute *attr, const char *buf, size_t count);
+static ssize_t store_edidread(struct device *dev,
+		struct device_attribute *attr, const char *buf, size_t count);
+static ssize_t show_edidread(struct device *dev, struct device_attribute *attr,
+				char *buf);
+static ssize_t store_ceceven(struct device *dev,
+		struct device_attribute *attr, const char *buf, size_t count);
+static ssize_t show_cecread(struct device *dev, struct device_attribute *attr,
+				char *buf);
+static ssize_t store_cecsend(struct device *dev,
+		struct device_attribute *attr, const char *buf, size_t count);
+static ssize_t store_infofrsend(struct device *dev,
+		struct device_attribute *attr, const char *buf, size_t count);
+static ssize_t store_hdcpeven(struct device *dev,
+		struct device_attribute *attr, const char *buf, size_t count);
+static ssize_t show_hdcpchkaesotp(struct device *dev,
+		struct device_attribute *attr, char *buf);
+static ssize_t store_hdcpfuseaes(struct device *dev,
+		struct device_attribute *attr, const char *buf, size_t count);
+static ssize_t show_hdcpfuseaes(struct device *dev,
+		struct device_attribute *attr, char *buf);
+static ssize_t store_hdcploadaes(struct device *dev,
+		struct device_attribute *attr, const char *buf, size_t count);
+static ssize_t show_hdcploadaes(struct device *dev,
+		struct device_attribute *attr, char *buf);
+static ssize_t store_hdcpauthencr(struct device *dev,
+		struct device_attribute *attr, const char *buf, size_t count);
+static ssize_t show_hdcpauthencr(struct device *dev,
+		struct device_attribute *attr, char *buf);
+static ssize_t show_hdcpstateget(struct device *dev,
+		struct device_attribute *attr, char *buf);
+static ssize_t show_evread(struct device *dev, struct device_attribute *attr,
+				char *buf);
+static ssize_t store_evclr(struct device *dev,
+		struct device_attribute *attr, const char *buf, size_t count);
+static ssize_t store_audiocfg(struct device *dev,
+		struct device_attribute *attr, const char *buf, size_t count);
+static ssize_t show_plugstatus(struct device *dev,
+		struct device_attribute *attr, char *buf);
+static ssize_t store_poweronoff(struct device *dev,
+		struct device_attribute *attr, const char *buf, size_t count);
+
+static DEVICE_ATTR(storeastext, S_IWUSR, NULL, store_storeastext);
+static DEVICE_ATTR(plugdeten, S_IWUSR, NULL, store_plugdeten);
+static DEVICE_ATTR(edidread, S_IRUGO | S_IWUSR, show_edidread, store_edidread);
+static DEVICE_ATTR(ceceven, S_IWUSR, NULL, store_ceceven);
+static DEVICE_ATTR(cecread, S_IRUGO, show_cecread, NULL);
+static DEVICE_ATTR(cecsend, S_IWUSR, NULL, store_cecsend);
+static DEVICE_ATTR(infofrsend, S_IWUSR, NULL, store_infofrsend);
+static DEVICE_ATTR(hdcpeven, S_IWUSR, NULL, store_hdcpeven);
+static DEVICE_ATTR(hdcpchkaesotp, S_IRUGO, show_hdcpchkaesotp, NULL);
+static DEVICE_ATTR(hdcpfuseaes, S_IRUGO | S_IWUSR, show_hdcpfuseaes,
+		store_hdcpfuseaes);
+static DEVICE_ATTR(hdcploadaes, S_IRUGO | S_IWUSR, show_hdcploadaes,
+		store_hdcploadaes);
+static DEVICE_ATTR(hdcpauthencr, S_IRUGO | S_IWUSR, show_hdcpauthencr,
+		store_hdcpauthencr);
+static DEVICE_ATTR(hdcpstateget, S_IRUGO, show_hdcpstateget, NULL);
+static DEVICE_ATTR(evread, S_IRUGO, show_evread, NULL);
+static DEVICE_ATTR(evclr, S_IWUSR, NULL, store_evclr);
+static DEVICE_ATTR(audiocfg, S_IWUSR, NULL, store_audiocfg);
+static DEVICE_ATTR(plugstatus, S_IRUGO, show_plugstatus, NULL);
+static DEVICE_ATTR(poweronoff, S_IWUSR, NULL, store_poweronoff);
+
+/* Hex to int conversion */
+static unsigned int htoi(const char *ptr)
+{
+	unsigned int value = 0;
+	char ch = *ptr;
+
+	if (!ptr)
+		return 0;
+
+	if (isdigit(ch))
+		value = ch - '0';
+	else
+		value = toupper(ch) - 'A' + 10;
+
+	value <<= 4;
+	ch = *(++ptr);
+
+	if (isdigit(ch))
+		value += ch - '0';
+	else
+		value += toupper(ch) - 'A' + 10;
+
+	return value;
+}
+
+static int event_enable(bool enable, enum hdmi_event ev)
+{
+	struct av8100_status status;
+
+	dev_dbg(hdmidev, "enable_event %d %02x\n", enable, ev);
+	if (enable) {
+		status = av8100_status_get();
+		if (status.av8100_state < AV8100_OPMODE_IDLE) {
+			av8100_disable_interrupt();
+			av8100_enable_interrupt();
+		}
+
+		events_mask |= ev;
+	} else
+		events_mask &= ~ev;
+
+	return 0;
+}
+
+static int plugdeten(struct plug_detect *pldet)
+{
+	struct av8100_status status;
+	u8 denc_off_time = 0;
+	int retval;
+
+	status = av8100_status_get();
+	if (status.av8100_state < AV8100_OPMODE_STANDBY) {
+		if (av8100_powerup() != 0) {
+			dev_err(hdmidev, "av8100_powerup failed\n");
+			return -EINVAL;
+		}
+	}
+
+	av8100_reg_hdmi_5_volt_time_r(&denc_off_time, NULL, NULL);
+
+	retval = av8100_reg_hdmi_5_volt_time_w(
+			denc_off_time,
+			pldet->hdmi_off_time,
+			pldet->on_time);
+
+	if (retval) {
+		dev_err(hdmidev, "Failed to write the value to av8100 "
+			"register\n");
+		return -EFAULT;
+	}
+
+	event_enable(pldet->hdmi_detect_enable != 0,
+		HDMI_EVENT_HDMI_PLUGIN);
+	event_enable(pldet->hdmi_detect_enable != 0,
+		HDMI_EVENT_HDMI_PLUGOUT);
+
+	return retval;
+}
+
+static int edidread(struct edid_read *edidread, u8 *len, u8 *data)
+{
+	union av8100_configuration config;
+	struct av8100_status status;
+
+	status = av8100_status_get();
+	if (status.av8100_state < AV8100_OPMODE_STANDBY) {
+		if (av8100_powerup() != 0) {
+			dev_err(hdmidev, "av8100_powerup failed\n");
+			return -EINVAL;
+		}
+	}
+
+	if (status.av8100_state < AV8100_OPMODE_INIT) {
+		if (av8100_download_firmware(NULL, 0, I2C_INTERFACE) != 0) {
+			dev_err(hdmidev, "av8100 dl fw FAIL\n");
+			return -EINVAL;
+		}
+	}
+
+	config.edid_section_readback_format.address = edidread->address;
+	config.edid_section_readback_format.block_number = edidread->block_nr;
+
+	dev_dbg(hdmidev, "addr:%0x blnr:%0x",
+		config.edid_section_readback_format.address,
+		config.edid_section_readback_format.block_number);
+
+	if (av8100_conf_prep(AV8100_COMMAND_EDID_SECTION_READBACK,
+		&config) != 0) {
+		dev_err(hdmidev, "av8100_conf_prep FAIL\n");
+		return -EINVAL;
+	}
+
+	if (av8100_conf_w(AV8100_COMMAND_EDID_SECTION_READBACK,
+		len, data, I2C_INTERFACE) != 0) {
+		dev_err(hdmidev, "av8100_conf_w FAIL\n");
+		return -EINVAL;
+	}
+
+	dev_dbg(hdmidev, "len:%0x\n", *len);
+
+	return 0;
+}
+
+static int cecread(u8 *src, u8 *dest, u8 *data_len, u8 *data)
+{
+	union av8100_configuration config;
+	struct av8100_status status;
+	u8 buf_len;
+	u8 buff[HDMI_CEC_READ_MAXSIZE];
+
+	status = av8100_status_get();
+	if (status.av8100_state < AV8100_OPMODE_STANDBY) {
+		if (av8100_powerup() != 0) {
+			dev_err(hdmidev, "av8100_powerup failed\n");
+			return -EINVAL;
+		}
+	}
+
+	if (status.av8100_state < AV8100_OPMODE_INIT) {
+		if (av8100_download_firmware(NULL, 0, I2C_INTERFACE) !=	0) {
+			dev_err(hdmidev, "av8100 dl fw FAIL\n");
+			return -EINVAL;
+		}
+	}
+
+	if (av8100_conf_prep(AV8100_COMMAND_CEC_MESSAGE_READ_BACK,
+			&config) != 0) {
+		dev_err(hdmidev, "av8100_conf_prep FAIL\n");
+		return -EINVAL;
+	}
+
+	if (av8100_conf_w(AV8100_COMMAND_CEC_MESSAGE_READ_BACK,
+		&buf_len, buff, I2C_INTERFACE) != 0) {
+		dev_err(hdmidev, "av8100_conf_w FAIL\n");
+		return -EINVAL;
+	}
+
+	if (buf_len > 0) {
+		*src = (buff[0] & 0xF0) >> 4;
+		*dest = buff[0] & 0x0F;
+		*data_len = buf_len - 1;
+		memcpy(data, &buff[1], buf_len - 1);
+	} else
+		*data_len = 0;
+
+	return 0;
+}
+
+static int cecsend(u8 src, u8 dest, u8 data_len, u8 *data)
+{
+	union av8100_configuration config;
+	struct av8100_status status;
+
+	status = av8100_status_get();
+	if (status.av8100_state < AV8100_OPMODE_STANDBY) {
+		if (av8100_powerup() != 0) {
+			dev_err(hdmidev, "av8100_powerup failed\n");
+			return -EINVAL;
+		}
+	}
+
+	if (status.av8100_state < AV8100_OPMODE_INIT) {
+		if (av8100_download_firmware(NULL, 0, I2C_INTERFACE) != 0) {
+			dev_err(hdmidev, "av8100 dl fw FAIL\n");
+			return -EINVAL;
+		}
+	}
+
+	config.cec_message_write_format.buffer[0] = ((src & 0x0F) << 4) +
+			(dest & 0x0F);
+	config.cec_message_write_format.buffer_length = data_len + 1;
+	memcpy(&config.cec_message_write_format.buffer[1], data, data_len);
+
+	if (av8100_conf_prep(AV8100_COMMAND_CEC_MESSAGE_WRITE,
+		&config) != 0) {
+		dev_err(hdmidev, "av8100_conf_prep FAIL\n");
+		return -EINVAL;
+	}
+
+	if (av8100_conf_w(AV8100_COMMAND_CEC_MESSAGE_WRITE,
+		NULL, NULL, I2C_INTERFACE) != 0) {
+		dev_err(hdmidev, "av8100_conf_w FAIL\n");
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static int infofrsend(u8 type, u8 version, u8 crc, u8 data_len, u8 *data)
+{
+	union av8100_configuration config;
+	struct av8100_status status;
+
+	status = av8100_status_get();
+	if (status.av8100_state < AV8100_OPMODE_STANDBY) {
+		if (av8100_powerup() != 0) {
+			dev_err(hdmidev, "av8100_powerup failed\n");
+			return -EINVAL;
+		}
+	}
+
+	if (status.av8100_state < AV8100_OPMODE_INIT) {
+		if (av8100_download_firmware(NULL, 0, I2C_INTERFACE) != 0) {
+			dev_err(hdmidev, "av8100 dl fw FAIL\n");
+			return -EINVAL;
+		}
+	}
+
+	if ((data_len < 1) || (data_len > HDMI_INFOFRAME_MAX_SIZE))
+		return -EINVAL;
+
+	config.infoframes_format.type = type;
+	config.infoframes_format.version = version;
+	config.infoframes_format.crc = crc;
+	config.infoframes_format.length = data_len;
+	memcpy(&config.infoframes_format.data, data, data_len);
+	if (av8100_conf_prep(AV8100_COMMAND_INFOFRAMES,
+		&config) != 0) {
+		dev_err(hdmidev, "av8100_conf_prep FAIL\n");
+		return -EINVAL;
+	}
+
+	if (av8100_conf_w(AV8100_COMMAND_INFOFRAMES,
+		NULL, NULL, I2C_INTERFACE) != 0) {
+		dev_err(hdmidev, "av8100_conf_w FAIL\n");
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static int hdcpchkaesotp(u8 *crc, u8 *progged)
+{
+	union av8100_configuration config;
+	struct av8100_status status;
+	u8 buf_len;
+	u8 buf[2];
+
+	status = av8100_status_get();
+	if (status.av8100_state < AV8100_OPMODE_STANDBY) {
+		if (av8100_powerup() != 0) {
+			dev_err(hdmidev, "av8100_powerup failed\n");
+			return -EINVAL;
+		}
+	}
+
+	if (status.av8100_state < AV8100_OPMODE_INIT) {
+		if (av8100_download_firmware(NULL, 0, I2C_INTERFACE) !=
+			0) {
+			dev_err(hdmidev, "av8100 dl fw FAIL\n");
+			return -EINVAL;
+		}
+	}
+
+	config.fuse_aes_key_format.fuse_operation = AV8100_FUSE_READ;
+	memset(config.fuse_aes_key_format.key, 0, AV8100_FUSE_KEY_SIZE);
+	if (av8100_conf_prep(AV8100_COMMAND_FUSE_AES_KEY,
+		&config) != 0) {
+		dev_err(hdmidev, "av8100_conf_prep FAIL\n");
+		return -EINVAL;
+	}
+
+	if (av8100_conf_w(AV8100_COMMAND_FUSE_AES_KEY,
+		&buf_len, buf, I2C_INTERFACE) != 0) {
+		dev_err(hdmidev, "av8100_conf_w FAIL\n");
+		return -EINVAL;
+	}
+
+	if (buf_len == 2) {
+		*crc = buf[0];
+		*progged = buf[1];
+	}
+
+	return 0;
+}
+
+static int hdcpfuseaes(u8 *key, u8 crc, u8 *result)
+{
+	union av8100_configuration config;
+	struct av8100_status status;
+	u8 buf_len;
+	u8 buf[2];
+
+	/* Default not OK */
+	*result = HDMI_RESULT_NOT_OK;
+
+	status = av8100_status_get();
+	if (status.av8100_state < AV8100_OPMODE_STANDBY) {
+		if (av8100_powerup() != 0) {
+			dev_err(hdmidev, "av8100_powerup failed\n");
+			return -EINVAL;
+		}
+	}
+
+	if (status.av8100_state < AV8100_OPMODE_INIT) {
+		if (av8100_download_firmware(NULL, 0, I2C_INTERFACE) !=
+			0) {
+			dev_err(hdmidev, "av8100 dl fw FAIL\n");
+			return -EINVAL;
+		}
+	}
+
+	config.fuse_aes_key_format.fuse_operation = AV8100_FUSE_WRITE;
+	memcpy(config.fuse_aes_key_format.key, key, AV8100_FUSE_KEY_SIZE);
+	if (av8100_conf_prep(AV8100_COMMAND_FUSE_AES_KEY,
+		&config) != 0) {
+		dev_err(hdmidev, "av8100_conf_prep FAIL\n");
+		return -EINVAL;
+	}
+
+	if (av8100_conf_w(AV8100_COMMAND_FUSE_AES_KEY,
+		&buf_len, buf, I2C_INTERFACE) != 0) {
+		dev_err(hdmidev, "av8100_conf_w FAIL\n");
+		return -EINVAL;
+	}
+
+	if (buf_len == 2) {
+		dev_dbg(hdmidev, "buf[0]:%02x buf[1]:%02x\n", buf[0], buf[1]);
+		if ((crc == buf[0]) && (buf[1] == 1))
+			/* OK */
+			*result = HDMI_RESULT_OK;
+		else
+			*result = HDMI_RESULT_CRC_MISMATCH;
+	}
+
+	return 0;
+}
+
+static int hdcploadaes(u8 block, u8 key_len, u8 *key, u8 *result, u8 *crc32)
+{
+	union av8100_configuration config;
+	struct av8100_status status;
+	u8 buf_len;
+	u8 buf[CRC32_SIZE];
+
+	/* Default not OK */
+	*result = HDMI_RESULT_NOT_OK;
+
+	dev_dbg(hdmidev, "%s block:%d\n", __func__, block);
+
+	status = av8100_status_get();
+	if (status.av8100_state < AV8100_OPMODE_STANDBY) {
+		if (av8100_powerup() != 0) {
+			dev_err(hdmidev, "av8100_powerup failed\n");
+			return -EINVAL;
+		}
+	}
+
+	if (status.av8100_state < AV8100_OPMODE_INIT) {
+		if (av8100_download_firmware(NULL, 0, I2C_INTERFACE) != 0) {
+			dev_err(hdmidev, "av8100 dl fw FAIL\n");
+			return -EINVAL;
+		}
+	}
+
+	config.hdcp_send_key_format.key_number = block;
+	config.hdcp_send_key_format.data_len = key_len;
+	memcpy(config.hdcp_send_key_format.data, key, key_len);
+	if (av8100_conf_prep(AV8100_COMMAND_HDCP_SENDKEY, &config) != 0) {
+		dev_err(hdmidev, "av8100_conf_prep FAIL\n");
+		return -EINVAL;
+	}
+
+	if (av8100_conf_w(AV8100_COMMAND_HDCP_SENDKEY,
+		&buf_len, buf, I2C_INTERFACE) != 0) {
+		dev_err(hdmidev, "av8100_conf_w FAIL\n");
+		return -EINVAL;
+	}
+
+	if ((buf_len == CRC32_SIZE) && (crc32)) {
+		memcpy(crc32, buf, CRC32_SIZE);
+		dev_dbg(hdmidev, "crc32:%02x%02x%02x%02x\n",
+			crc32[0], crc32[1], crc32[2], crc32[3]);
+	}
+
+	*result = HDMI_RESULT_OK;
+
+	return 0;
+}
+
+static int hdcpauthencr(u8 auth_type, u8 encr_type, u8 *len, u8 *data)
+{
+	union av8100_configuration config;
+	struct av8100_status status;
+
+	status = av8100_status_get();
+	if (status.av8100_state < AV8100_OPMODE_STANDBY) {
+		if (av8100_powerup() != 0) {
+			dev_err(hdmidev, "av8100_powerup failed\n");
+			return -EINVAL;
+		}
+	}
+
+	if (status.av8100_state < AV8100_OPMODE_INIT) {
+		if (av8100_download_firmware(NULL, 0, I2C_INTERFACE) != 0) {
+			dev_err(hdmidev, "av8100 dl fw FAIL\n");
+			return -EINVAL;
+		}
+	}
+
+	switch (auth_type) {
+	case HDMI_HDCP_AUTH_OFF:
+	default:
+		config.hdcp_management_format.req_type =
+				AV8100_HDCP_AUTH_REQ_OFF;
+		break;
+
+	case HDMI_HDCP_AUTH_START:
+		config.hdcp_management_format.req_type =
+				AV8100_HDCP_AUTH_REQ_ON;
+		break;
+
+	case HDMI_HDCP_AUTH_REV_LIST_REQ:
+		config.hdcp_management_format.req_type =
+				AV8100_HDCP_REV_LIST_REQ;
+		break;
+	case HDMI_HDCP_AUTH_CONT:
+		config.hdcp_management_format.req_type =
+				AV8100_HDCP_AUTH_CONT;
+		break;
+	}
+
+	switch (encr_type) {
+	case HDMI_HDCP_ENCR_OFF:
+		config.hdcp_management_format.req_encr =
+				AV8100_HDCP_ENCR_REQ_OFF;
+		config.hdcp_management_format.encr_use =
+				AV8100_HDCP_ENCR_USE_OESS;
+		break;
+
+	case HDMI_HDCP_ENCR_OESS:
+		config.hdcp_management_format.req_encr =
+				AV8100_HDCP_ENCR_REQ_ON;
+		config.hdcp_management_format.encr_use =
+				AV8100_HDCP_ENCR_USE_OESS;
+		break;
+
+	case HDMI_HDCP_ENCR_EESS:
+		config.hdcp_management_format.req_encr =
+				AV8100_HDCP_ENCR_REQ_ON;
+		config.hdcp_management_format.encr_use =
+				AV8100_HDCP_ENCR_USE_EESS;
+		break;
+	}
+
+	if (av8100_conf_prep(AV8100_COMMAND_HDCP_MANAGEMENT,
+		&config) != 0) {
+		dev_err(hdmidev, "av8100_conf_prep FAIL\n");
+		return -EINVAL;
+	}
+
+	if (av8100_conf_w(AV8100_COMMAND_HDCP_MANAGEMENT,
+		len, data, I2C_INTERFACE) != 0) {
+		dev_err(hdmidev, "av8100_conf_w FAIL\n");
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static u8 events_read(void)
+{
+	int ret;
+
+	LOCK_HDMI_EVENTS;
+	ret = events;
+	dev_dbg(hdmidev, "%s %02x\n", __func__, events);
+	UNLOCK_HDMI_EVENTS;
+
+	return ret;
+}
+
+static int events_clear(u8 ev)
+{
+	dev_dbg(hdmidev, "%s %02x\n", __func__, ev);
+
+	LOCK_HDMI_EVENTS;
+	events &= ~ev & EVENTS_MASK;
+	UNLOCK_HDMI_EVENTS;
+
+	return 0;
+}
+
+static int audiocfg(struct audio_cfg *cfg)
+{
+	union av8100_configuration config;
+	struct av8100_status status;
+
+	status = av8100_status_get();
+	if (status.av8100_state < AV8100_OPMODE_STANDBY) {
+		if (av8100_powerup() != 0) {
+			dev_err(hdmidev, "av8100_powerup failed\n");
+			return -EINVAL;
+		}
+	}
+
+	if (status.av8100_state < AV8100_OPMODE_INIT) {
+		if (av8100_download_firmware(NULL, 0, I2C_INTERFACE) != 0) {
+			dev_err(hdmidev, "av8100 dl fw FAIL\n");
+			return -EINVAL;
+		}
+	}
+
+	config.audio_input_format.audio_input_if_format	= cfg->if_format;
+	config.audio_input_format.i2s_input_nb		= cfg->i2s_entries;
+	config.audio_input_format.sample_audio_freq	= cfg->freq;
+	config.audio_input_format.audio_word_lg		= cfg->word_length;
+	config.audio_input_format.audio_format		= cfg->format;
+	config.audio_input_format.audio_if_mode		= cfg->if_mode;
+	config.audio_input_format.audio_mute		= cfg->mute;
+
+	if (av8100_conf_prep(AV8100_COMMAND_AUDIO_INPUT_FORMAT,
+		&config) != 0) {
+		dev_err(hdmidev, "av8100_conf_prep FAIL\n");
+		return -EINVAL;
+	}
+
+	if (av8100_conf_w(AV8100_COMMAND_AUDIO_INPUT_FORMAT,
+		NULL, NULL, I2C_INTERFACE) != 0) {
+		dev_err(hdmidev, "av8100_conf_w FAIL\n");
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+/* sysfs */
+static ssize_t store_storeastext(struct device *dev,
+		struct device_attribute *attr, const char *buf, size_t count)
+{
+	struct hdmi_driver_data *hdmi_driver_data;
+
+	dev_dbg(hdmidev, "%s\n", __func__);
+
+	hdmi_driver_data = dev_get_drvdata(dev);
+
+	if ((count != HDMI_STOREASTEXT_BIN_SIZE) &&
+		(count != HDMI_STOREASTEXT_TEXT_SIZE) &&
+		(count != HDMI_STOREASTEXT_TEXT_SIZE + 1))
+		return -EINVAL;
+
+	if ((count == HDMI_STOREASTEXT_BIN_SIZE) && (*buf == 0x1))
+		hdmi_driver_data->store_as_hextext = true;
+	else if (((count == HDMI_STOREASTEXT_TEXT_SIZE) ||
+		(count == HDMI_STOREASTEXT_TEXT_SIZE + 1)) && (*buf == '0') &&
+			(*(buf + 1) == '1')) {
+		hdmi_driver_data->store_as_hextext = true;
+	} else {
+		hdmi_driver_data->store_as_hextext = false;
+	}
+
+	dev_dbg(hdmidev, "store_as_hextext:%0d\n",
+		hdmi_driver_data->store_as_hextext);
+
+	return count;
+}
+
+static ssize_t store_plugdeten(struct device *dev,
+		struct device_attribute *attr, const char *buf, size_t count)
+{
+	struct hdmi_driver_data *hdmi_driver_data;
+	struct plug_detect plug_detect;
+	int index = 0;
+
+	dev_dbg(hdmidev, "%s\n", __func__);
+
+	hdmi_driver_data = dev_get_drvdata(dev);
+
+	if (hdmi_driver_data->store_as_hextext) {
+		if ((count != HDMI_PLUGDETEN_TEXT_SIZE) &&
+			(count != HDMI_PLUGDETEN_TEXT_SIZE + 1))
+			return -EINVAL;
+		plug_detect.hdmi_detect_enable = htoi(buf + index);
+		index += 2;
+		plug_detect.on_time = htoi(buf + index);
+		index += 2;
+		plug_detect.hdmi_off_time = htoi(buf + index);
+		index += 2;
+	} else {
+		if (count != HDMI_PLUGDETEN_BIN_SIZE)
+			return -EINVAL;
+		plug_detect.hdmi_detect_enable = *(buf + index++);
+		plug_detect.on_time = *(buf + index++);
+		plug_detect.hdmi_off_time = *(buf + index++);
+	}
+
+	if (plugdeten(&plug_detect))
+		return -EINVAL;
+
+	return count;
+}
+
+static ssize_t store_edidread(struct device *dev,
+		struct device_attribute *attr, const char *buf, size_t count)
+{
+	struct hdmi_driver_data *hdmi_driver_data;
+	struct edid_read edid_read;
+	int index = 0;
+
+	dev_dbg(hdmidev, "%s\n", __func__);
+	dev_dbg(hdmidev, "count:%d\n", count);
+
+	hdmi_driver_data = dev_get_drvdata(dev);
+
+	if (hdmi_driver_data->store_as_hextext) {
+		if ((count != HDMI_EDIDREAD_TEXT_SIZE) &&
+			(count != HDMI_EDIDREAD_TEXT_SIZE + 1))
+			return -EINVAL;
+		edid_read.address = htoi(buf + index);
+		index += 2;
+		edid_read.block_nr = htoi(buf + index);
+		index += 2;
+	} else {
+		if (count != HDMI_EDIDREAD_BIN_SIZE)
+			return -EINVAL;
+		edid_read.address = *(buf + index++);
+		edid_read.block_nr = *(buf + index++);
+	}
+
+	if (edidread(&edid_read, &hdmi_driver_data->edid_data.buf_len,
+			hdmi_driver_data->edid_data.buf))
+		return -EINVAL;
+
+	return count;
+}
+
+static ssize_t show_edidread(struct device *dev, struct device_attribute *attr,
+		char *buf)
+{
+	struct hdmi_driver_data *hdmi_driver_data;
+	int len;
+	int index = 0;
+	int cnt;
+
+	dev_dbg(hdmidev, "%s\n", __func__);
+
+	hdmi_driver_data = dev_get_drvdata(dev);
+
+	len = hdmi_driver_data->edid_data.buf_len;
+
+	if (hdmi_driver_data->store_as_hextext) {
+		snprintf(buf + index, 3, "%02x", len);
+		index += 2;
+	} else
+		*(buf + index++) = len;
+
+	dev_dbg(hdmidev, "len:%02x\n", len);
+
+	cnt = 0;
+	while (cnt < len) {
+		if (hdmi_driver_data->store_as_hextext) {
+			snprintf(buf + index, 3, "%02x",
+				hdmi_driver_data->edid_data.buf[cnt]);
+			index += 2;
+		} else
+			*(buf + index++) =
+				hdmi_driver_data->edid_data.buf[cnt];
+
+		dev_dbg(hdmidev, "%02x ",
+			hdmi_driver_data->edid_data.buf[cnt]);
+
+		cnt++;
+	}
+
+	if (hdmi_driver_data->store_as_hextext)
+		index++;
+
+	return index;
+}
+
+static ssize_t store_ceceven(struct device *dev,
+		struct device_attribute *attr, const char *buf, size_t count)
+{
+	struct hdmi_driver_data *hdmi_driver_data;
+	bool enable = false;
+
+	dev_dbg(hdmidev, "%s\n", __func__);
+
+	hdmi_driver_data = dev_get_drvdata(dev);
+
+	if (hdmi_driver_data->store_as_hextext) {
+		if ((count != HDMI_CECEVEN_TEXT_SIZE) &&
+			(count != HDMI_CECEVEN_TEXT_SIZE + 1))
+			return -EINVAL;
+		if ((*buf == '0') && (*(buf + 1) == '1'))
+			enable = true;
+	} else {
+		if (count != HDMI_CECEVEN_BIN_SIZE)
+			return -EINVAL;
+		if (*buf == 0x01)
+			enable = true;
+	}
+
+	event_enable(enable, HDMI_EVENT_CEC | HDMI_EVENT_CECTXERR);
+
+	return count;
+}
+
+static ssize_t show_cecread(struct device *dev, struct device_attribute *attr,
+		char *buf)
+{
+	struct hdmi_driver_data *hdmi_driver_data;
+	struct cec_rw cec_read;
+	int index = 0;
+	int cnt;
+
+	dev_dbg(hdmidev, "%s\n", __func__);
+
+	hdmi_driver_data = dev_get_drvdata(dev);
+
+	if (cecread(&cec_read.src, &cec_read.dest, &cec_read.length,
+		cec_read.data))
+		return -EINVAL;
+
+	if (hdmi_driver_data->store_as_hextext) {
+		snprintf(buf + index, 3, "%02x", cec_read.src);
+		index += 2;
+		snprintf(buf + index, 3, "%02x", cec_read.dest);
+		index += 2;
+		snprintf(buf + index, 3, "%02x", cec_read.length);
+		index += 2;
+	} else {
+		*(buf + index++) = cec_read.src;
+		*(buf + index++) = cec_read.dest;
+		*(buf + index++) = cec_read.length;
+	}
+
+	dev_dbg(hdmidev, "len:%02x\n", cec_read.length);
+
+	cnt = 0;
+	while (cnt < cec_read.length) {
+		if (hdmi_driver_data->store_as_hextext) {
+			snprintf(buf + index, 3, "%02x", cec_read.data[cnt]);
+			index += 2;
+		} else
+			*(buf + index++) = cec_read.data[cnt];
+
+		dev_dbg(hdmidev, "%02x ", cec_read.data[cnt]);
+
+		cnt++;
+	}
+
+	if (hdmi_driver_data->store_as_hextext)
+		index++;
+
+	return index;
+}
+
+static ssize_t store_cecsend(struct device *dev,
+		struct device_attribute *attr, const char *buf, size_t count)
+{
+	struct hdmi_driver_data *hdmi_driver_data;
+	struct cec_rw cec_w;
+	int index = 0;
+	int cnt;
+
+	dev_dbg(hdmidev, "%s\n", __func__);
+
+	hdmi_driver_data = dev_get_drvdata(dev);
+
+	if (hdmi_driver_data->store_as_hextext) {
+		if ((count < HDMI_CECSEND_TEXT_SIZE_MIN) ||
+			(count > HDMI_CECSEND_TEXT_SIZE_MAX))
+			return -EINVAL;
+
+		cec_w.src = htoi(buf + index);
+		index += 2;
+		cec_w.dest = htoi(buf + index);
+		index += 2;
+		cec_w.length = htoi(buf + index);
+		index += 2;
+		if (cec_w.length > HDMI_CEC_WRITE_MAXSIZE)
+			return -EINVAL;
+		cnt = 0;
+		while (cnt < cec_w.length) {
+			cec_w.data[cnt] = htoi(buf + index);
+			index += 2;
+			dev_dbg(hdmidev, "%02x ", cec_w.data[cnt]);
+			cnt++;
+		}
+	} else {
+		if ((count < HDMI_CECSEND_BIN_SIZE_MIN) ||
+			(count > HDMI_CECSEND_BIN_SIZE_MAX))
+			return -EINVAL;
+
+		cec_w.src = *(buf + index++);
+		cec_w.dest = *(buf + index++);
+		cec_w.length = *(buf + index++);
+		if (cec_w.length > HDMI_CEC_WRITE_MAXSIZE)
+			return -EINVAL;
+		memcpy(cec_w.data, buf + index, cec_w.length);
+	}
+
+	if (cecsend(cec_w.src,
+			cec_w.dest,
+			cec_w.length,
+			cec_w.data))
+		return -EINVAL;
+
+	return count;
+}
+
+static ssize_t store_infofrsend(struct device *dev,
+		struct device_attribute *attr, const char *buf, size_t count)
+{
+	struct hdmi_driver_data *hdmi_driver_data;
+	struct info_fr info_fr;
+	int index = 0;
+	int cnt;
+
+	dev_dbg(hdmidev, "%s\n", __func__);
+
+	hdmi_driver_data = dev_get_drvdata(dev);
+
+	if (hdmi_driver_data->store_as_hextext) {
+		if ((count < HDMI_INFOFRSEND_TEXT_SIZE_MIN) ||
+			(count > HDMI_INFOFRSEND_TEXT_SIZE_MAX))
+			return -EINVAL;
+
+		info_fr.type = htoi(&buf[index]);
+		index += 2;
+		info_fr.ver = htoi(&buf[index]);
+		index += 2;
+		info_fr.crc = htoi(&buf[index]);
+		index += 2;
+		info_fr.length = htoi(&buf[index]);
+		index += 2;
+
+		if (info_fr.length > HDMI_INFOFRAME_MAX_SIZE)
+			return -EINVAL;
+		cnt = 0;
+		while (cnt < info_fr.length) {
+			info_fr.data[cnt] = htoi(buf + index);
+			index += 2;
+			dev_dbg(hdmidev, "%02x ", info_fr.data[cnt]);
+			cnt++;
+		}
+	} else {
+		if ((count < HDMI_INFOFRSEND_BIN_SIZE_MIN) ||
+			(count > HDMI_INFOFRSEND_BIN_SIZE_MAX))
+			return -EINVAL;
+
+		info_fr.type = *(buf + index++);
+		info_fr.ver = *(buf + index++);
+		info_fr.crc = *(buf + index++);
+		info_fr.length = *(buf + index++);
+
+		if (info_fr.length > HDMI_INFOFRAME_MAX_SIZE)
+			return -EINVAL;
+		memcpy(info_fr.data, buf + index, info_fr.length);
+	}
+
+	if (infofrsend(info_fr.type, info_fr.ver, info_fr.crc,
+		info_fr.length, info_fr.data))
+		return -EINVAL;
+
+	return count;
+}
+
+static ssize_t store_hdcpeven(struct device *dev,
+		struct device_attribute *attr, const char *buf, size_t count)
+{
+	struct hdmi_driver_data *hdmi_driver_data;
+	bool enable = false;
+
+	dev_dbg(hdmidev, "%s\n", __func__);
+
+	hdmi_driver_data = dev_get_drvdata(dev);
+
+	if (hdmi_driver_data->store_as_hextext) {
+		if ((count != HDMI_HDCPEVEN_TEXT_SIZE) &&
+			(count != HDMI_HDCPEVEN_TEXT_SIZE + 1))
+			return -EINVAL;
+		if ((*buf == '0') && (*(buf + 1) == '1'))
+			enable = true;
+	} else {
+		if (count != HDMI_HDCPEVEN_BIN_SIZE)
+			return -EINVAL;
+		if (*buf == 0x01)
+			enable = true;
+	}
+
+	event_enable(enable, HDMI_EVENT_HDCP);
+
+	return count;
+}
+
+static ssize_t show_hdcpchkaesotp(struct device *dev,
+	struct device_attribute *attr, char *buf)
+{
+	struct hdmi_driver_data *hdmi_driver_data;
+	u8 crc;
+	u8 progged;
+	int index = 0;
+
+	dev_dbg(hdmidev, "%s\n", __func__);
+
+	hdmi_driver_data = dev_get_drvdata(dev);
+
+	if (hdcpchkaesotp(&crc, &progged))
+		return -EINVAL;
+
+	if (hdmi_driver_data->store_as_hextext) {
+		snprintf(buf + index, 3, "%02x", progged);
+		index += 2;
+	} else {
+		*(buf + index++) = progged;
+	}
+
+	dev_dbg(hdmidev, "progged:%02x\n", progged);
+
+	if (hdmi_driver_data->store_as_hextext)
+		index++;
+
+	return index;
+}
+
+static ssize_t store_hdcpfuseaes(struct device *dev,
+		struct device_attribute *attr, const char *buf, size_t count)
+{
+	struct hdmi_driver_data *hdmi_driver_data;
+	struct hdcp_fuseaes hdcp_fuseaes;
+	int index = 0;
+	int cnt;
+
+	dev_dbg(hdmidev, "%s\n", __func__);
+
+	hdmi_driver_data = dev_get_drvdata(dev);
+
+	/* Default not OK */
+	hdmi_driver_data->fuse_result = HDMI_RESULT_NOT_OK;
+
+	if (hdmi_driver_data->store_as_hextext) {
+		if ((count != HDMI_HDCP_FUSEAES_TEXT_SIZE) &&
+			(count != HDMI_HDCP_FUSEAES_TEXT_SIZE + 1))
+			return -EINVAL;
+
+		cnt = 0;
+		while (cnt < HDMI_HDCP_FUSEAES_KEYSIZE) {
+			hdcp_fuseaes.key[cnt] = htoi(buf + index);
+			index += 2;
+			dev_dbg(hdmidev, "%02x ", hdcp_fuseaes.key[cnt]);
+			cnt++;
+		}
+		hdcp_fuseaes.crc = htoi(&buf[index]);
+		index += 2;
+		dev_dbg(hdmidev, "%02x ", hdcp_fuseaes.crc);
+	} else {
+		if (count != HDMI_HDCP_FUSEAES_BIN_SIZE)
+			return -EINVAL;
+
+		memcpy(hdcp_fuseaes.key, buf + index,
+				HDMI_HDCP_FUSEAES_KEYSIZE);
+		index += HDMI_HDCP_FUSEAES_KEYSIZE;
+		hdcp_fuseaes.crc = *(buf + index++);
+	}
+
+	if (hdcpfuseaes(hdcp_fuseaes.key, hdcp_fuseaes.crc,
+		&hdcp_fuseaes.result))
+		return -EINVAL;
+
+	dev_dbg(hdmidev, "fuseresult:%02x ", hdcp_fuseaes.result);
+
+	hdmi_driver_data->fuse_result = hdcp_fuseaes.result;
+
+	return count;
+}
+
+static ssize_t show_hdcpfuseaes(struct device *dev,
+	struct device_attribute *attr, char *buf)
+{
+	struct hdmi_driver_data *hdmi_driver_data;
+	int index = 0;
+
+	dev_dbg(hdmidev, "%s\n", __func__);
+
+	hdmi_driver_data = dev_get_drvdata(dev);
+
+	if (hdmi_driver_data->store_as_hextext) {
+		snprintf(buf + index, 3, "%02x",
+			hdmi_driver_data->fuse_result);
+		index += 2;
+	} else
+		*(buf + index++) = hdmi_driver_data->fuse_result;
+
+	dev_dbg(hdmidev, "status:%02x\n", hdmi_driver_data->fuse_result);
+
+	if (hdmi_driver_data->store_as_hextext)
+		index++;
+
+	return index;
+}
+
+static ssize_t store_hdcploadaes(struct device *dev,
+		struct device_attribute *attr, const char *buf, size_t count)
+{
+	struct hdmi_driver_data *hdmi_driver_data;
+	struct hdcp_loadaesone hdcp_loadaes;
+	int index = 0;
+	int block_cnt;
+	int cnt;
+	u8 crc32_rcvd[CRC32_SIZE];
+	u8 crc;
+	u8 progged;
+
+	dev_dbg(hdmidev, "%s\n", __func__);
+
+	hdmi_driver_data = dev_get_drvdata(dev);
+
+	/* Default not OK */
+	hdmi_driver_data->loadaes_result = HDMI_RESULT_NOT_OK;
+
+	if (hdcpchkaesotp(&crc, &progged))
+		return -EINVAL;
+
+	if (!progged) {
+		/* AES is not fused */
+		hdcp_loadaes.result = HDMI_AES_NOT_FUSED;
+		goto store_hdcploadaes_err;
+	}
+
+	if (hdmi_driver_data->store_as_hextext) {
+		if ((count != HDMI_HDCP_LOADAES_TEXT_SIZE) &&
+			(count != HDMI_HDCP_LOADAES_TEXT_SIZE + 1)) {
+			dev_err(hdmidev, "%s", "count mismatch\n");
+			return -EINVAL;
+		}
+
+		/* AES */
+		block_cnt = 0;
+		while (block_cnt < HDMI_HDCP_AES_NR_OF_BLOCKS) {
+			cnt = 0;
+			while (cnt < HDMI_HDCP_AES_KEYSIZE) {
+				hdcp_loadaes.key[cnt] =	htoi(buf + index);
+				index += 2;
+				dev_dbg(hdmidev, "%02x ",
+					hdcp_loadaes.key[cnt]);
+				cnt++;
+			}
+
+			if (hdcploadaes(block_cnt + HDMI_HDCP_AES_BLOCK_START,
+					HDMI_HDCP_AES_KEYSIZE,
+					hdcp_loadaes.key,
+					&hdcp_loadaes.result,
+					crc32_rcvd)) {
+				dev_err(hdmidev, "%s %d\n",
+					"hdcploadaes err aes block",
+					block_cnt + HDMI_HDCP_AES_BLOCK_START);
+				return -EINVAL;
+			}
+
+			if (hdcp_loadaes.result)
+				goto store_hdcploadaes_err;
+
+			block_cnt++;
+		}
+
+		/* KSV */
+		memset(hdcp_loadaes.key, 0, HDMI_HDCP_AES_KSVZEROESSIZE);
+		cnt = HDMI_HDCP_AES_KSVZEROESSIZE;
+		while (cnt < HDMI_HDCP_AES_KSVSIZE +
+				HDMI_HDCP_AES_KSVZEROESSIZE) {
+			hdcp_loadaes.key[cnt] =
+					htoi(&buf[index]);
+			index += 2;
+			dev_dbg(hdmidev, "%02x ", hdcp_loadaes.key[cnt]);
+			cnt++;
+		}
+
+		if (hdcploadaes(HDMI_HDCP_KSV_BLOCK,
+				HDMI_HDCP_AES_KSVSIZE +
+				HDMI_HDCP_AES_KSVZEROESSIZE,
+				hdcp_loadaes.key,
+				&hdcp_loadaes.result,
+				NULL)) {
+			dev_err(hdmidev, "%s %d\n", "hdcploadaes err in ksv\n",
+				block_cnt + HDMI_HDCP_AES_BLOCK_START);
+			return -EINVAL;
+		}
+
+		if (hdcp_loadaes.result)
+			goto store_hdcploadaes_err;
+
+		/* CRC32 */
+		for (cnt = 0; cnt < CRC32_SIZE; cnt++) {
+			hdcp_loadaes.crc32[cnt] = htoi(buf + index);
+			index += 2;
+		}
+
+		if (memcmp(hdcp_loadaes.crc32, crc32_rcvd, CRC32_SIZE)) {
+			dev_dbg(hdmidev, "crc32exp:%02x%02x%02x%02x\n",
+				hdcp_loadaes.crc32[0],
+				hdcp_loadaes.crc32[1],
+				hdcp_loadaes.crc32[2],
+				hdcp_loadaes.crc32[3]);
+			hdcp_loadaes.result = HDMI_RESULT_CRC_MISMATCH;
+			goto store_hdcploadaes_err;
+		}
+	} else {
+		if (count != HDMI_HDCP_LOADAES_BIN_SIZE) {
+			dev_err(hdmidev, "%s", "count mismatch\n");
+			return -EINVAL;
+		}
+
+		/* AES */
+		block_cnt = 0;
+		while (block_cnt < HDMI_HDCP_AES_NR_OF_BLOCKS) {
+			memcpy(hdcp_loadaes.key, buf + index,
+					HDMI_HDCP_AES_KEYSIZE);
+			index += HDMI_HDCP_AES_KEYSIZE;
+
+			if (hdcploadaes(block_cnt + HDMI_HDCP_AES_BLOCK_START,
+					HDMI_HDCP_AES_KEYSIZE,
+					hdcp_loadaes.key,
+					&hdcp_loadaes.result,
+					crc32_rcvd)) {
+				dev_err(hdmidev, "%s %d\n",
+					"hdcploadaes err aes block",
+					block_cnt + HDMI_HDCP_AES_BLOCK_START);
+				return -EINVAL;
+			}
+
+			if (hdcp_loadaes.result)
+				goto store_hdcploadaes_err;
+
+			block_cnt++;
+		}
+
+		/* KSV */
+		memset(hdcp_loadaes.key, 0, HDMI_HDCP_AES_KSVZEROESSIZE);
+		memcpy(hdcp_loadaes.key + HDMI_HDCP_AES_KSVZEROESSIZE,
+				buf + index,
+				HDMI_HDCP_AES_KSVSIZE);
+		index += HDMI_HDCP_AES_KSVSIZE;
+
+		if (hdcploadaes(HDMI_HDCP_KSV_BLOCK,
+				HDMI_HDCP_AES_KSVSIZE +
+				HDMI_HDCP_AES_KSVZEROESSIZE,
+				hdcp_loadaes.key,
+				&hdcp_loadaes.result,
+				NULL)) {
+			dev_err(hdmidev, "%s %d\n", "hdcploadaes err in ksv\n",
+				block_cnt + HDMI_HDCP_AES_BLOCK_START);
+			return -EINVAL;
+		}
+
+		memcpy(hdcp_loadaes.crc32, buf + index, CRC32_SIZE);
+		index += CRC32_SIZE;
+
+		/* CRC32 */
+		if (memcmp(hdcp_loadaes.crc32, crc32_rcvd, CRC32_SIZE)) {
+			dev_dbg(hdmidev, "crc32exp:%02x%02x%02x%02x\n",
+				hdcp_loadaes.crc32[0],
+				hdcp_loadaes.crc32[1],
+				hdcp_loadaes.crc32[2],
+				hdcp_loadaes.crc32[3]);
+			hdcp_loadaes.result = HDMI_RESULT_CRC_MISMATCH;
+		}
+	}
+
+store_hdcploadaes_err:
+	hdmi_driver_data->loadaes_result = hdcp_loadaes.result;
+	return count;
+}
+
+static ssize_t show_hdcploadaes(struct device *dev,
+	struct device_attribute *attr, char *buf)
+{
+	struct hdmi_driver_data *hdmi_driver_data;
+	int index = 0;
+
+	dev_dbg(hdmidev, "%s\n", __func__);
+
+	hdmi_driver_data = dev_get_drvdata(dev);
+
+	if (hdmi_driver_data->store_as_hextext) {
+		snprintf(buf + index, 3, "%02x",
+			hdmi_driver_data->loadaes_result);
+		index += 2;
+	} else
+		*(buf + index++) = hdmi_driver_data->loadaes_result;
+
+	dev_dbg(hdmidev, "result:%02x\n", hdmi_driver_data->loadaes_result);
+
+	if (hdmi_driver_data->store_as_hextext)
+		index++;
+
+	return index;
+}
+
+static ssize_t store_hdcpauthencr(struct device *dev,
+		struct device_attribute *attr, const char *buf, size_t count)
+{
+	struct hdmi_driver_data *hdmi_driver_data;
+	struct hdcp_authencr hdcp_authencr;
+	int index = 0;
+	u8 crc;
+	u8 progged;
+	int result = HDMI_RESULT_OK;
+
+	dev_dbg(hdmidev, "%s\n", __func__);
+
+	hdmi_driver_data = dev_get_drvdata(dev);
+
+	/* Default not OK */
+	hdmi_driver_data->authencr.result = HDMI_RESULT_NOT_OK;
+
+	if (hdcpchkaesotp(&crc, &progged))
+		return -EINVAL;
+
+	if (!progged) {
+		/* AES is not fused */
+		result = HDMI_AES_NOT_FUSED;
+		goto store_hdcpauthencr_err;
+	}
+
+	if (hdmi_driver_data->store_as_hextext) {
+		if ((count != HDMI_HDCPAUTHENCR_TEXT_SIZE) &&
+			(count != HDMI_HDCPAUTHENCR_TEXT_SIZE + 1))
+			return -EINVAL;
+
+		hdcp_authencr.auth_type = htoi(buf + index);
+		index += 2;
+		hdcp_authencr.encr_type = htoi(buf + index);
+		index += 2;
+	} else {
+		if (count != HDMI_HDCPAUTHENCR_BIN_SIZE)
+			return -EINVAL;
+
+		hdcp_authencr.auth_type = *(buf + index++);
+		hdcp_authencr.encr_type = *(buf + index++);
+	}
+
+	if (hdcpauthencr(hdcp_authencr.auth_type, hdcp_authencr.encr_type,
+		 &hdmi_driver_data->authencr.buf_len,
+		 hdmi_driver_data->authencr.buf))
+		return -EINVAL;
+
+store_hdcpauthencr_err:
+	hdmi_driver_data->authencr.result = result;
+	return count;
+}
+
+static ssize_t show_hdcpauthencr(struct device *dev,
+	struct device_attribute *attr, char *buf)
+{
+	struct hdmi_driver_data *hdmi_driver_data;
+	int len;
+	int index = 0;
+	int cnt;
+
+	dev_dbg(hdmidev, "%s\n", __func__);
+
+	hdmi_driver_data = dev_get_drvdata(dev);
+
+	len = hdmi_driver_data->authencr.buf_len;
+	if (len > AUTH_BUF_LEN)
+		len = AUTH_BUF_LEN;
+
+	if (hdmi_driver_data->store_as_hextext) {
+		snprintf(buf + index, 3, "%02x",
+			hdmi_driver_data->authencr.result);
+		index += 2;
+	} else
+		*(buf + index++) = hdmi_driver_data->authencr.result;
+
+	cnt = 0;
+	while (cnt < len) {
+		if (hdmi_driver_data->store_as_hextext) {
+			snprintf(buf + index, 3, "%02x",
+				hdmi_driver_data->authencr.buf[cnt]);
+			index += 2;
+
+			dev_dbg(hdmidev, "%02x ",
+				hdmi_driver_data->authencr.buf[cnt]);
+
+		} else
+			*(buf + index++) = hdmi_driver_data->authencr.buf[cnt];
+
+		cnt++;
+	}
+
+	dev_dbg(hdmidev, "result:%02x\n", hdmi_driver_data->authencr.result);
+
+	if (hdmi_driver_data->store_as_hextext)
+		index++;
+
+	return index;
+}
+
+static ssize_t show_hdcpstateget(struct device *dev,
+	struct device_attribute *attr, char *buf)
+{
+	struct hdmi_driver_data *hdmi_driver_data;
+	u8 hdcp_state;
+	int index = 0;
+
+	dev_dbg(hdmidev, "%s\n", __func__);
+
+	hdmi_driver_data = dev_get_drvdata(dev);
+
+	if (av8100_reg_gen_status_r(NULL, NULL, NULL, NULL, NULL, &hdcp_state))
+			return -EINVAL;
+
+	if (hdmi_driver_data->store_as_hextext) {
+		snprintf(buf + index, 3, "%02x", hdcp_state);
+		index += 2;
+	} else
+		*(buf + index++) = hdcp_state;
+
+	dev_dbg(hdmidev, "status:%02x\n", hdcp_state);
+
+	if (hdmi_driver_data->store_as_hextext)
+		index++;
+
+	return index;
+}
+
+static ssize_t show_evread(struct device *dev, struct device_attribute *attr,
+		char *buf)
+{
+	struct hdmi_driver_data *hdmi_driver_data;
+	int index = 0;
+	u8 ev;
+
+	dev_dbg(hdmidev, "%s\n", __func__);
+
+	hdmi_driver_data = dev_get_drvdata(dev);
+
+	ev = events_read();
+
+	if (hdmi_driver_data->store_as_hextext) {
+		snprintf(buf + index, 3, "%02x", ev);
+		index += 2;
+	} else
+		*(buf + index++) = ev;
+
+	if (hdmi_driver_data->store_as_hextext)
+		index++;
+
+	/* Events are read: clear events */
+	events_clear(EVENTS_MASK);
+
+	return index;
+}
+
+static ssize_t store_evclr(struct device *dev,
+		struct device_attribute *attr, const char *buf, size_t count)
+{
+	struct hdmi_driver_data *hdmi_driver_data;
+	u8 ev;
+	int index = 0;
+
+	dev_dbg(hdmidev, "%s\n", __func__);
+
+	hdmi_driver_data = dev_get_drvdata(dev);
+
+	if (hdmi_driver_data->store_as_hextext) {
+		if ((count != HDMI_EVCLR_TEXT_SIZE) &&
+			(count != HDMI_EVCLR_TEXT_SIZE + 1))
+			return -EINVAL;
+
+		ev = htoi(&buf[index]);
+		index += 2;
+	} else {
+		if (count != HDMI_EVCLR_BIN_SIZE)
+			return -EINVAL;
+
+		ev = *(buf + index++);
+	}
+
+	events_clear(ev);
+
+	return count;
+}
+
+static ssize_t store_audiocfg(struct device *dev,
+		struct device_attribute *attr, const char *buf, size_t count)
+{
+	struct hdmi_driver_data *hdmi_driver_data;
+	struct audio_cfg audio_cfg;
+	int index = 0;
+
+	dev_dbg(hdmidev, "%s\n", __func__);
+
+	hdmi_driver_data = dev_get_drvdata(dev);
+
+	if (hdmi_driver_data->store_as_hextext) {
+		if ((count != HDMI_AUDIOCFG_TEXT_SIZE) &&
+			(count != HDMI_AUDIOCFG_TEXT_SIZE + 1))
+			return -EINVAL;
+
+		audio_cfg.if_format = htoi(&buf[index]);
+		index += 2;
+		audio_cfg.i2s_entries = htoi(&buf[index]);
+		index += 2;
+		audio_cfg.freq = htoi(&buf[index]);
+		index += 2;
+		audio_cfg.word_length = htoi(&buf[index]);
+		index += 2;
+		audio_cfg.format = htoi(&buf[index]);
+		index += 2;
+		audio_cfg.if_mode = htoi(&buf[index]);
+		index += 2;
+		audio_cfg.mute = htoi(&buf[index]);
+		index += 2;
+	} else {
+		if (count != HDMI_AUDIOCFG_BIN_SIZE)
+			return -EINVAL;
+
+		audio_cfg.if_format = *(buf + index++);
+		audio_cfg.i2s_entries = *(buf + index++);
+		audio_cfg.freq = *(buf + index++);
+		audio_cfg.word_length = *(buf + index++);
+		audio_cfg.format = *(buf + index++);
+		audio_cfg.if_mode = *(buf + index++);
+		audio_cfg.mute = *(buf + index++);
+	}
+
+	audiocfg(&audio_cfg);
+
+	return count;
+}
+
+static ssize_t show_plugstatus(struct device *dev,
+		struct device_attribute *attr, char *buf)
+{
+	struct hdmi_driver_data *hdmi_driver_data;
+	int index = 0;
+	struct av8100_status av8100_status;
+	u8 plstat;
+
+	dev_dbg(hdmidev, "%s\n", __func__);
+
+	hdmi_driver_data = dev_get_drvdata(dev);
+
+	av8100_status = av8100_status_get();
+	plstat = av8100_status.av8100_plugin_status == AV8100_HDMI_PLUGIN;
+
+	if (hdmi_driver_data->store_as_hextext) {
+		snprintf(buf + index, 3, "%02x", plstat);
+		index += 2;
+	} else
+		*(buf + index++) = plstat;
+
+	if (hdmi_driver_data->store_as_hextext)
+		index++;
+
+	return index;
+}
+
+static ssize_t store_poweronoff(struct device *dev,
+		struct device_attribute *attr, const char *buf, size_t count)
+{
+	struct hdmi_driver_data *hdmi_driver_data;
+	bool enable = false;
+
+	dev_dbg(hdmidev, "%s\n", __func__);
+
+	hdmi_driver_data = dev_get_drvdata(dev);
+
+	if (hdmi_driver_data->store_as_hextext) {
+		if ((count != HDMI_POWERONOFF_TEXT_SIZE) &&
+			(count != HDMI_POWERONOFF_TEXT_SIZE + 1))
+			return -EINVAL;
+		if ((*buf == '0') && (*(buf + 1) == '1'))
+			enable = true;
+	} else {
+		if (count != HDMI_POWERONOFF_BIN_SIZE)
+			return -EINVAL;
+		if (*buf == 0x01)
+			enable = true;
+	}
+
+	if (enable == 0) {
+		if (av8100_powerdown() != 0) {
+			dev_err(hdmidev, "av8100_powerdown FAIL\n");
+			return -EINVAL;
+		}
+	} else {
+		if (av8100_powerup() != 0) {
+			dev_err(hdmidev, "av8100_powerup FAIL\n");
+			return -EINVAL;
+		}
+	}
+
+	return count;
+}
+
+static int hdmi_open(struct inode *inode, struct file *filp)
+{
+	if (device_open)
+		return -EBUSY;
+
+	device_open++;
+
+	return 0;
+}
+
+static int hdmi_release(struct inode *inode, struct file *filp)
+{
+	if (device_open)
+		device_open--;
+
+	return 0;
+}
+
+/* ioctl */
+static int hdmi_ioctl(struct inode *inode, struct file *file,
+		       unsigned int cmd, unsigned long arg)
+{
+	u8 value = 0;
+	struct plug_detect plug_detect;
+	struct edid_read edid_read;
+	struct cec_rw cec_read;
+	struct cec_rw cec_send;
+	struct info_fr info_fr;
+	struct hdcp_fuseaes hdcp_fuseaes;
+	struct hdcp_loadaesall hdcp_loadaesall;
+	int block_cnt;
+	struct hdcp_loadaesone hdcp_loadaesone;
+	struct hdcp_authencr hdcp_authencr;
+	struct audio_cfg audio_cfg;
+	union av8100_configuration config;
+	struct hdmi_register reg;
+	struct hdmi_command_register command_reg;
+	struct av8100_status status;
+	u8 aes_status;
+
+	switch (cmd) {
+
+	case IOC_PLUG_DETECT_ENABLE:
+		if (copy_from_user(&plug_detect, (void *)arg,
+			sizeof(struct plug_detect)))
+			return -EINVAL;
+
+		if (plugdeten(&plug_detect))
+			return -EINVAL;
+		break;
+
+	case IOC_EDID_READ:
+		if (copy_from_user(&edid_read, (void *)arg,
+				sizeof(struct edid_read)))
+			return -EINVAL;
+
+		if (edidread(&edid_read, &edid_read.data_length,
+				edid_read.data))
+			return -EINVAL;
+
+		if (copy_to_user((void *)arg, (void *)&edid_read,
+			sizeof(struct edid_read))) {
+			return -EINVAL;
+		}
+		break;
+
+	case IOC_CEC_EVENT_ENABLE:
+		if (copy_from_user(&value, (void *)arg, sizeof(u8)))
+			return -EINVAL;
+
+		event_enable(value != 0, HDMI_EVENT_CEC | HDMI_EVENT_CECTXERR);
+		break;
+
+	case IOC_CEC_READ:
+		if (cecread(&cec_read.src, &cec_read.dest, &cec_read.length,
+			cec_read.data))
+			return -EINVAL;
+
+		if (copy_to_user((void *)arg, (void *)&cec_read,
+			sizeof(struct cec_rw))) {
+			return -EINVAL;
+		}
+		break;
+
+	case IOC_CEC_SEND:
+		if (copy_from_user(&cec_send, (void *)arg,
+				sizeof(struct cec_rw)))
+			return -EINVAL;
+
+		if (cecsend(cec_send.src,
+				cec_send.dest,
+				cec_send.length,
+				cec_send.data))
+			return -EINVAL;
+		break;
+
+	case IOC_INFOFRAME_SEND:
+		if (copy_from_user(&info_fr, (void *)arg,
+				sizeof(struct info_fr)))
+			return -EINVAL;
+
+		if (infofrsend(info_fr.type, info_fr.ver, info_fr.crc,
+			info_fr.length, info_fr.data))
+			return -EINVAL;
+		break;
+
+	case IOC_HDCP_EVENT_ENABLE:
+		if (copy_from_user(&value, (void *)arg, sizeof(u8)))
+			return -EINVAL;
+
+		event_enable(value != 0, HDMI_EVENT_HDCP);
+		break;
+
+	case IOC_HDCP_CHKAESOTP:
+		if (hdcpchkaesotp(&value, &aes_status))
+			return -EINVAL;
+
+		if (copy_to_user((void *)arg, (void *)&aes_status,
+			sizeof(u8))) {
+			return -EINVAL;
+		}
+		break;
+
+	case IOC_HDCP_FUSEAES:
+		if (copy_from_user(&hdcp_fuseaes, (void *)arg,
+				sizeof(struct hdcp_fuseaes)))
+			return -EINVAL;
+
+		if (hdcpfuseaes(hdcp_fuseaes.key, hdcp_fuseaes.crc,
+				&hdcp_fuseaes.result))
+				return -EINVAL;
+
+		if (copy_to_user((void *)arg, (void *)&hdcp_fuseaes,
+			sizeof(struct hdcp_fuseaes))) {
+			return -EINVAL;
+		}
+		break;
+
+	case IOC_HDCP_LOADAES:
+		if (copy_from_user(&hdcp_loadaesall, (void *)arg,
+				sizeof(struct hdcp_loadaesall)))
+			return -EINVAL;
+
+		if (hdcpchkaesotp(&value, &aes_status))
+			return -EINVAL;
+
+		if (!aes_status) {
+			/* AES is not fused */
+			hdcp_loadaesone.result = HDMI_AES_NOT_FUSED;
+			goto ioc_hdcploadaes_err;
+		}
+
+		/* AES */
+		block_cnt = 0;
+		while (block_cnt < HDMI_HDCP_AES_NR_OF_BLOCKS) {
+			memcpy(hdcp_loadaesone.key, hdcp_loadaesall.key +
+					block_cnt * HDMI_HDCP_AES_KEYSIZE,
+					HDMI_HDCP_AES_KEYSIZE);
+
+			if (hdcploadaes(block_cnt + HDMI_HDCP_AES_BLOCK_START,
+					HDMI_HDCP_AES_KEYSIZE,
+					hdcp_loadaesone.key,
+					&hdcp_loadaesone.result,
+					hdcp_loadaesone.crc32))
+				return -EINVAL;
+
+			if (hdcp_loadaesone.result)
+				return -EINVAL;
+
+			block_cnt++;
+		}
+
+		/* KSV */
+		memset(hdcp_loadaesone.key, 0, HDMI_HDCP_AES_KSVZEROESSIZE);
+		memcpy(hdcp_loadaesone.key + HDMI_HDCP_AES_KSVZEROESSIZE,
+				hdcp_loadaesall.ksv, HDMI_HDCP_AES_KSVSIZE);
+
+		if (hdcploadaes(HDMI_HDCP_KSV_BLOCK,
+				HDMI_HDCP_AES_KSVSIZE +
+				HDMI_HDCP_AES_KSVZEROESSIZE,
+				hdcp_loadaesone.key,
+				&hdcp_loadaesone.result,
+				NULL))
+			return -EINVAL;
+
+		if (hdcp_loadaesone.result)
+			return -EINVAL;
+
+		/* CRC32 */
+		if (memcmp(hdcp_loadaesall.crc32, hdcp_loadaesone.crc32,
+				CRC32_SIZE)) {
+			dev_dbg(hdmidev, "crc32exp:%02x%02x%02x%02x\n",
+				hdcp_loadaesall.crc32[0],
+				hdcp_loadaesall.crc32[1],
+				hdcp_loadaesall.crc32[2],
+				hdcp_loadaesall.crc32[3]);
+			hdcp_loadaesone.result = HDMI_RESULT_CRC_MISMATCH;
+			goto ioc_hdcploadaes_err;
+		}
+
+ioc_hdcploadaes_err:
+		hdcp_loadaesall.result = hdcp_loadaesone.result;
+
+		if (copy_to_user((void *)arg, (void *)&hdcp_loadaesall,
+			sizeof(struct hdcp_loadaesall))) {
+			return -EINVAL;
+		}
+		break;
+
+	case IOC_HDCP_AUTHENCR_REQ:
+		if (copy_from_user(&hdcp_authencr, (void *)arg,
+				sizeof(struct hdcp_authencr)))
+			return -EINVAL;
+
+		/* Default not OK */
+		hdcp_authencr.result = HDMI_RESULT_NOT_OK;
+
+		if (hdcpchkaesotp(&value, &aes_status))
+			return -EINVAL;
+
+		if (!aes_status) {
+			/* AES is not fused */
+			hdcp_authencr.result = HDMI_AES_NOT_FUSED;
+			break;
+		}
+
+		if (hdcpauthencr(hdcp_authencr.auth_type,
+				hdcp_authencr.encr_type,
+				&value,
+				hdcp_authencr.revoc_list))
+			return -EINVAL;
+
+		hdcp_authencr.result = HDMI_RESULT_OK;
+		break;
+
+	case IOC_HDCP_STATE_GET:
+		if (av8100_reg_gen_status_r(NULL, NULL, NULL, NULL, NULL,
+				&value))
+				return -EINVAL;
+
+		if (copy_to_user((void *)arg, (void *)&value,
+			sizeof(u8))) {
+			return -EINVAL;
+		}
+		break;
+
+	case IOC_EVENTS_READ:
+		value = events_read();
+
+		if (copy_to_user((void *)arg, (void *)&value,
+			sizeof(u8))) {
+			return -EINVAL;
+		}
+
+		/* Events are read: clear events */
+		events_clear(EVENTS_MASK);
+		break;
+
+	case IOC_EVENTS_CLEAR:
+		if (copy_from_user(&value, (void *)arg, sizeof(u8)))
+			return -EINVAL;
+
+		events_clear(value);
+		break;
+
+	case IOC_AUDIO_CFG:
+		if (copy_from_user(&audio_cfg, (void *)arg,
+				sizeof(struct audio_cfg)))
+			return -EINVAL;
+
+		audiocfg(&audio_cfg);
+		break;
+
+	case IOC_PLUG_STATUS:
+		status = av8100_status_get();
+		value = status.av8100_plugin_status == AV8100_HDMI_PLUGIN;
+
+		if (copy_to_user((void *)arg, (void *)&value,
+			sizeof(u8))) {
+			return -EINVAL;
+		}
+		break;
+
+	case IOC_POWERONOFF:
+		/* Get desired power state on or off */
+		if (copy_from_user(&value, (void *)arg, sizeof(u8)))
+			return -EINVAL;
+
+		if (value == 0) {
+			if (av8100_powerdown() != 0) {
+				dev_err(hdmidev, "av8100_powerdown FAIL\n");
+				return -EINVAL;
+			}
+		} else {
+			if (av8100_powerup() != 0) {
+				dev_err(hdmidev, "av8100_powerup FAIL\n");
+				return -EINVAL;
+			}
+		}
+		break;
+
+	/* Internal */
+	case IOC_HDMI_ENABLE_INTERRUPTS:
+		av8100_disable_interrupt();
+		if (av8100_enable_interrupt() != 0) {
+			dev_err(hdmidev, "av8100_conf_get FAIL\n");
+			return -EINVAL;
+		}
+		break;
+
+	case IOC_HDMI_DOWNLOAD_FW:
+		if (av8100_download_firmware(NULL, 0, I2C_INTERFACE) != 0) {
+			dev_err(hdmidev, "av8100 dl fw FAIL\n");
+			return -EINVAL;
+		}
+		break;
+
+	case IOC_HDMI_ONOFF:
+		/* Get desired HDMI mode on or off */
+		if (copy_from_user(&value, (void *)arg, sizeof(u8)))
+			return -EFAULT;
+
+		if (av8100_conf_get(AV8100_COMMAND_HDMI, &config) != 0) {
+			dev_err(hdmidev, "av8100_conf_get FAIL\n");
+			return -EINVAL;
+		}
+		if (value == 0)
+			config.hdmi_format.hdmi_mode = AV8100_HDMI_OFF;
+		else
+			config.hdmi_format.hdmi_mode = AV8100_HDMI_ON;
+
+		if (av8100_conf_prep(AV8100_COMMAND_HDMI, &config) != 0) {
+			dev_err(hdmidev, "av8100_conf_prep FAIL\n");
+			return -EINVAL;
+		}
+		if (av8100_conf_w(AV8100_COMMAND_HDMI, NULL, NULL,
+			I2C_INTERFACE) != 0) {
+			dev_err(hdmidev, "av8100_conf_w FAIL\n");
+			return -EINVAL;
+		}
+		break;
+
+	case IOC_HDMI_REGISTER_WRITE:
+		if (copy_from_user(&reg, (void *)arg,
+			sizeof(struct hdmi_register))) {
+			return -EINVAL;
+		}
+
+		if (av8100_reg_w(reg.offset, reg.value) != 0) {
+			dev_err(hdmidev, "hdmi_register_write FAIL\n");
+			return -EINVAL;
+		}
+		break;
+
+	case IOC_HDMI_REGISTER_READ:
+		if (copy_from_user(&reg, (void *)arg,
+			sizeof(struct hdmi_register))) {
+			return -EINVAL;
+		}
+
+		if (av8100_reg_r(reg.offset, &reg.value) != 0) {
+			dev_err(hdmidev, "hdmi_register_write FAIL\n");
+			return -EINVAL;
+		}
+
+		if (copy_to_user((void *)arg, (void *)&reg,
+			sizeof(struct hdmi_register))) {
+			return -EINVAL;
+		}
+		break;
+
+	case IOC_HDMI_STATUS_GET:
+		status = av8100_status_get();
+
+		if (copy_to_user((void *)arg, (void *)&status,
+			sizeof(struct av8100_status))) {
+			return -EINVAL;
+		}
+		break;
+
+	case IOC_HDMI_CONFIGURATION_WRITE:
+		if (copy_from_user(&command_reg, (void *)arg,
+			sizeof(struct hdmi_command_register)) != 0) {
+			dev_err(hdmidev, "IOC_HDMI_CONFIGURATION_WRITE "
+				"fail 1\n");
+			command_reg.return_status = EINVAL;
+		} else {
+			if (av8100_conf_w_raw(command_reg.cmd_id,
+					command_reg.buf_len,
+					command_reg.buf,
+					&(command_reg.buf_len),
+					command_reg.buf) != 0) {
+				dev_err(hdmidev, "IOC_HDMI_CONFIGURATION_WRITE "
+					"fail 2\n");
+			command_reg.return_status = EINVAL;
+			}
+		}
+
+		if (copy_to_user((void *)arg, (void *)&command_reg,
+			sizeof(struct hdmi_command_register)) != 0) {
+			return -EINVAL;
+		}
+		break;
+
+	default:
+		break;
+	}
+
+	return 0;
+}
+
+static unsigned int
+hdmi_poll(struct file *filp, poll_table *wait)
+{
+	unsigned int mask = 0;
+
+	dev_dbg(hdmidev, "%s\n", __func__);
+
+	poll_wait(filp, &hdmi_event_wq , wait);
+
+	LOCK_HDMI_EVENTS;
+	if (events_received == true) {
+		events_received = false;
+		mask = POLLIN | POLLRDNORM;
+	}
+	UNLOCK_HDMI_EVENTS;
+
+	return mask;
+}
+
+static const struct file_operations hdmi_fops = {
+	.owner =    THIS_MODULE,
+	.open =     hdmi_open,
+	.release =  hdmi_release,
+	//.ioctl is no longer in use - needs fixing
+	//.ioctl = hdmi_ioctl,
+	.poll = hdmi_poll
+};
+
+static struct miscdevice hdmi_miscdev = {
+	MISC_DYNAMIC_MINOR,
+	"hdmi",
+	&hdmi_fops
+};
+
+/* Event callback function called by hw driver */
+void hdmi_event(enum av8100_hdmi_event ev)
+{
+	int events_old;
+	int events_new;
+	struct kobject *kobj = &hdmidev->kobj;
+
+	dev_dbg(hdmidev, "hdmi_event %02x\n", ev);
+
+	LOCK_HDMI_EVENTS;
+
+	events_old = events;
+
+	/* Set event */
+	switch (ev) {
+	case AV8100_HDMI_EVENT_HDMI_PLUGIN:
+		events |= events_mask & HDMI_EVENT_HDMI_PLUGIN;
+		break;
+
+	case AV8100_HDMI_EVENT_HDMI_PLUGOUT:
+		events |= events_mask & HDMI_EVENT_HDMI_PLUGOUT;
+		break;
+
+	case AV8100_HDMI_EVENT_CEC:
+		events |= events_mask & HDMI_EVENT_CEC;
+		break;
+
+	case AV8100_HDMI_EVENT_HDCP:
+		events |= events_mask & HDMI_EVENT_HDCP;
+		break;
+
+	case AV8100_HDMI_EVENT_CECTXERR:
+		events |= events_mask & HDMI_EVENT_CECTXERR;
+		break;
+
+	default:
+		break;
+	}
+
+	events_new = events;
+
+	UNLOCK_HDMI_EVENTS;
+
+	dev_dbg(hdmidev, "hdmi events:%02x, events_old:%02x mask:%02x\n",
+			events_new, events_old, events_mask);
+
+	if (events_new != events_old) {
+		/* Wake up application waiting for event via call to poll() */
+		sysfs_notify(kobj, NULL, SYSFS_EVENT_FILENAME);
+
+		LOCK_HDMI_EVENTS;
+		events_received = true;
+		UNLOCK_HDMI_EVENTS;
+
+		wake_up_interruptible(&hdmi_event_wq);
+	}
+}
+EXPORT_SYMBOL(hdmi_event);
+
+int __init hdmi_init(void)
+{
+	int ret;
+	struct hdmi_driver_data *hdmi_driver_data;
+
+	ret = misc_register(&hdmi_miscdev);
+	if (ret)
+		goto hdmi_init_out;
+
+	hdmidev = hdmi_miscdev.this_device;
+
+	hdmi_driver_data =
+		kzalloc(sizeof(struct hdmi_driver_data), GFP_KERNEL);
+
+	if (!hdmi_driver_data)
+		return -ENOMEM;
+
+	dev_set_drvdata(hdmidev, hdmi_driver_data);
+
+	/* Default sysfs file format is hextext */
+	hdmi_driver_data->store_as_hextext = true;
+
+	init_waitqueue_head(&hdmi_event_wq);
+
+	if (device_create_file(hdmidev, &dev_attr_storeastext))
+		dev_info(hdmidev, "Unable to create storeastext attribute\n");
+	if (device_create_file(hdmidev, &dev_attr_plugdeten))
+		dev_info(hdmidev, "Unable to create plugdeten attribute\n");
+	if (device_create_file(hdmidev, &dev_attr_edidread))
+		dev_info(hdmidev, "Unable to create edidread attribute\n");
+	if (device_create_file(hdmidev, &dev_attr_ceceven))
+		dev_info(hdmidev, "Unable to create ceceven attribute\n");
+	if (device_create_file(hdmidev, &dev_attr_cecread))
+		dev_info(hdmidev, "Unable to create cecread attribute\n");
+	if (device_create_file(hdmidev, &dev_attr_cecsend))
+		dev_info(hdmidev, "Unable to create cecsend attribute\n");
+	if (device_create_file(hdmidev, &dev_attr_infofrsend))
+		dev_info(hdmidev, "Unable to create infofrsend attribute\n");
+	if (device_create_file(hdmidev, &dev_attr_hdcpeven))
+		dev_info(hdmidev, "Unable to create hdcpeven attribute\n");
+	if (device_create_file(hdmidev, &dev_attr_hdcpchkaesotp))
+		dev_info(hdmidev, "Unable to create hdcpchkaesotp attribute\n");
+	if (device_create_file(hdmidev, &dev_attr_hdcpfuseaes))
+		dev_info(hdmidev, "Unable to create hdcpfuseaes attribute\n");
+	if (device_create_file(hdmidev, &dev_attr_hdcploadaes))
+		dev_info(hdmidev, "Unable to create hdcploadaes attribute\n");
+	if (device_create_file(hdmidev, &dev_attr_hdcpauthencr))
+		dev_info(hdmidev, "Unable to create hdcpauthreq attribute\n");
+	if (device_create_file(hdmidev, &dev_attr_hdcpstateget))
+		dev_info(hdmidev, "Unable to create hdcpstateget attribute\n");
+	if (device_create_file(hdmidev, &dev_attr_evread))
+		dev_info(hdmidev, "Unable to create evread attribute\n");
+	if (device_create_file(hdmidev, &dev_attr_evclr))
+		dev_info(hdmidev, "Unable to create evclr attribute\n");
+	if (device_create_file(hdmidev, &dev_attr_audiocfg))
+		dev_info(hdmidev, "Unable to create audiocfg attribute\n");
+	if (device_create_file(hdmidev, &dev_attr_plugstatus))
+		dev_info(hdmidev, "Unable to create plugstatus attribute\n");
+	if (device_create_file(hdmidev, &dev_attr_poweronoff))
+		dev_info(hdmidev, "Unable to create poweronoff attribute\n");
+
+	/* Register event callback */
+	av8100_hdmi_event_cb_set(hdmi_event);
+
+hdmi_init_out:
+	return ret;
+}
+late_initcall(hdmi_init);
+
+void hdmi_exit(void)
+{
+	struct hdmi_driver_data *hdmi_driver_data;
+
+	/* Deregister event callback */
+	av8100_hdmi_event_cb_set(NULL);
+
+	device_remove_file(hdmidev, &dev_attr_storeastext);
+	device_remove_file(hdmidev, &dev_attr_plugdeten);
+	device_remove_file(hdmidev, &dev_attr_edidread);
+	device_remove_file(hdmidev, &dev_attr_ceceven);
+	device_remove_file(hdmidev, &dev_attr_cecread);
+	device_remove_file(hdmidev, &dev_attr_cecsend);
+	device_remove_file(hdmidev, &dev_attr_infofrsend);
+	device_remove_file(hdmidev, &dev_attr_hdcpeven);
+	device_remove_file(hdmidev, &dev_attr_hdcpchkaesotp);
+	device_remove_file(hdmidev, &dev_attr_hdcpfuseaes);
+	device_remove_file(hdmidev, &dev_attr_hdcploadaes);
+	device_remove_file(hdmidev, &dev_attr_hdcpauthencr);
+	device_remove_file(hdmidev, &dev_attr_hdcpstateget);
+	device_remove_file(hdmidev, &dev_attr_evread);
+	device_remove_file(hdmidev, &dev_attr_evclr);
+	device_remove_file(hdmidev, &dev_attr_audiocfg);
+	device_remove_file(hdmidev, &dev_attr_plugstatus);
+	device_remove_file(hdmidev, &dev_attr_poweronoff);
+
+	hdmi_driver_data = dev_get_drvdata(hdmidev);
+	kfree(hdmi_driver_data);
+
+	misc_deregister(&hdmi_miscdev);
+}
diff --git a/drivers/video/av8100/hdmi_loc.h b/drivers/video/av8100/hdmi_loc.h
new file mode 100644
index 00000000000..5db30e7526b
--- /dev/null
+++ b/drivers/video/av8100/hdmi_loc.h
@@ -0,0 +1,67 @@
+/*
+ * Copyright (C) ST-Ericsson AB 2010
+ *
+ * Author: Per Persson <per.xb.persson@stericsson.com>
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+#ifndef __HDMI_LOC__H__
+#define __HDMI_LOC__H__
+
+#define EDID_BUF_LEN	128
+#define COMMAND_BUF_LEN	128
+#define AES_KEY_SIZE	16
+#define CRC32_SIZE	4
+#define AUTH_BUF_LEN	30
+
+struct edid_data {
+	u8 buf_len;
+	u8 buf[EDID_BUF_LEN];
+};
+
+struct authencr {
+	int result;
+	u8 buf_len;
+	u8 buf[AUTH_BUF_LEN];
+};
+
+struct hdmi_register {
+	unsigned char value;
+	unsigned char offset;
+};
+
+struct hdcp_loadaesone {
+	u8 key[AES_KEY_SIZE];
+	u8 result;
+	u8 crc32[CRC32_SIZE];
+};
+
+struct hdmi_driver_data {
+	bool			store_as_hextext;
+	struct plug_detect	plug_detect;
+	bool			enable_cec_event;
+	struct edid_data	edid_data;
+	struct cec_rw		cec_read;
+	bool			fuse_result;
+	int			loadaes_result;
+	struct authencr         authencr;
+};
+
+struct hdmi_command_register {
+	unsigned char cmd_id;			/* input */
+	unsigned char buf_len;			/* input, output */
+	unsigned char buf[COMMAND_BUF_LEN];	/* input, output */
+	unsigned char return_status;		/* output */
+};
+
+/* Internal */
+#define IOC_HDMI_ENABLE_INTERRUPTS	_IOWR(HDMI_IOC_MAGIC, 32, int)
+#define IOC_HDMI_DOWNLOAD_FW		_IOWR(HDMI_IOC_MAGIC, 33, int)
+#define IOC_HDMI_ONOFF			_IOWR(HDMI_IOC_MAGIC, 34, int)
+#define IOC_HDMI_REGISTER_WRITE		_IOWR(HDMI_IOC_MAGIC, 35, int)
+#define IOC_HDMI_REGISTER_READ		_IOWR(HDMI_IOC_MAGIC, 36, int)
+#define IOC_HDMI_STATUS_GET		_IOWR(HDMI_IOC_MAGIC, 37, int)
+#define IOC_HDMI_CONFIGURATION_WRITE	_IOWR(HDMI_IOC_MAGIC, 38, int)
+
+#endif /* __HDMI_LOC__H__ */
-- 
cgit v1.2.3


From d78219b3ceb18914c643246c0880ad8e847a1502 Mon Sep 17 00:00:00 2001
From: "Mathieu J. Poirier" <mathieu.poirier@linaro.org>
Date: Wed, 30 Mar 2011 10:09:14 -0600
Subject: Porting mcde portion of the video driver from .35 to .38

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
---
 drivers/video/mcde/Kconfig                    |   74 +
 drivers/video/mcde/Makefile                   |   16 +
 drivers/video/mcde/display-ab8500.c           |  420 ++
 drivers/video/mcde/display-av8100.c           |  907 +++++
 drivers/video/mcde/display-generic_dsi.c      |  300 ++
 drivers/video/mcde/display-sony_sy35560_dsi.c |  239 ++
 drivers/video/mcde/display-vuib500-dpi.c      |  218 +
 drivers/video/mcde/dsilink_regs.h             | 2032 ++++++++++
 drivers/video/mcde/mcde_bus.c                 |  261 ++
 drivers/video/mcde/mcde_display.c             |  438 ++
 drivers/video/mcde/mcde_dss.c                 |  386 ++
 drivers/video/mcde/mcde_fb.c                  |  749 ++++
 drivers/video/mcde/mcde_hw.c                  | 3350 ++++++++++++++++
 drivers/video/mcde/mcde_mod.c                 |   69 +
 drivers/video/mcde/mcde_regs.h                | 5315 +++++++++++++++++++++++++
 15 files changed, 14774 insertions(+)
 create mode 100644 drivers/video/mcde/Kconfig
 create mode 100644 drivers/video/mcde/Makefile
 create mode 100644 drivers/video/mcde/display-ab8500.c
 create mode 100644 drivers/video/mcde/display-av8100.c
 create mode 100644 drivers/video/mcde/display-generic_dsi.c
 create mode 100644 drivers/video/mcde/display-sony_sy35560_dsi.c
 create mode 100644 drivers/video/mcde/display-vuib500-dpi.c
 create mode 100644 drivers/video/mcde/dsilink_regs.h
 create mode 100644 drivers/video/mcde/mcde_bus.c
 create mode 100644 drivers/video/mcde/mcde_display.c
 create mode 100644 drivers/video/mcde/mcde_dss.c
 create mode 100644 drivers/video/mcde/mcde_fb.c
 create mode 100644 drivers/video/mcde/mcde_hw.c
 create mode 100644 drivers/video/mcde/mcde_mod.c
 create mode 100644 drivers/video/mcde/mcde_regs.h

diff --git a/drivers/video/mcde/Kconfig b/drivers/video/mcde/Kconfig
new file mode 100644
index 00000000000..c97387a97ed
--- /dev/null
+++ b/drivers/video/mcde/Kconfig
@@ -0,0 +1,74 @@
+config FB_MCDE
+	tristate "MCDE support"
+	depends on FB
+	select FB_SYS_FILLRECT
+	select FB_SYS_COPYAREA
+	select FB_SYS_IMAGEBLIT
+	select FB_SYS_FOPS
+	select HWMEM
+	---help---
+	  This enables support for MCDE based frame buffer driver.
+
+	  Please read the file <file:Documentation/fb/mcde.txt>
+
+config MCDE_DISPLAY_GENERIC_DSI
+	tristate "Generic DSI display driver"
+	depends on FB_MCDE
+
+config MCDE_DISPLAY_SONY_SY35560_DSI
+	tristate "Sony sy35560 display driver"
+	depends on FB_MCDE
+
+config MCDE_DISPLAY_DPI
+	bool "Support for DPI displays within MCDE"
+	depends on FB_MCDE
+	default n
+	---help---
+	  Add this option to choose which DPI display driver for MCDE to include
+
+	  DPI (Display Pixel Interface) is a MIPI Alliance standard used for
+	  active-matrix LCDs. The DPI uses parallel data lines.
+
+menu "MCDE DPI displays"
+	depends on MCDE_DISPLAY_DPI
+
+config MCDE_DISPLAY_VUIB500_DPI
+	tristate "DPI display driver for the VUIB500 board"
+	---help---
+	  The VUIB500 is an ST-Ericsson user interface board.
+
+endmenu
+
+config MCDE_DISPLAY_AV8100
+	tristate "AV8100 HDMI/CVBS display driver"
+	depends on FB_MCDE
+	select AV8100
+
+config MCDE_DISPLAY_AB8500_DENC
+	tristate "AB8500 CVBS display driver"
+	depends on FB_MCDE
+	select AB8500_DENC
+
+config FB_MCDE_DEBUG
+	bool "MCDE debug messages"
+	depends on FB_MCDE
+	---help---
+	  Say Y here if you want the MCDE driver to output debug messages
+
+config FB_MCDE_VDEBUG
+	bool "MCDE verbose debug messages"
+	depends on FB_MCDE_DEBUG
+	---help---
+	  Say Y here if you want the MCDE driver to output more debug messages
+
+config MCDE_FB_AVOID_REALLOC
+	bool "MCDE early allocate framebuffer"
+	default n
+	depends on FB_MCDE
+	---help---
+	  If you say Y here maximum frame buffer size is allocated and
+	  used for all resolutions. If you say N here, the frame buffer is
+	  reallocated when resolution is changed. This reallocation might
+	  fail because of fragmented memory. Note that this memory will
+	  never be deallocated, while the MCDE framebuffer is used.
+
diff --git a/drivers/video/mcde/Makefile b/drivers/video/mcde/Makefile
new file mode 100644
index 00000000000..93097f8961e
--- /dev/null
+++ b/drivers/video/mcde/Makefile
@@ -0,0 +1,16 @@
+
+mcde-objs			:= mcde_mod.o mcde_hw.o mcde_dss.o mcde_display.o mcde_bus.o mcde_fb.o
+obj-$(CONFIG_FB_MCDE)		+= mcde.o
+
+obj-$(CONFIG_MCDE_DISPLAY_GENERIC_DSI)		+= display-generic_dsi.o
+obj-$(CONFIG_MCDE_DISPLAY_SONY_SY35560_DSI)	+= display-sony_sy35560_dsi.o
+obj-$(CONFIG_MCDE_DISPLAY_VUIB500_DPI)		+= display-vuib500-dpi.o
+obj-$(CONFIG_MCDE_DISPLAY_AB8500_DENC)		+= display-ab8500.o
+obj-$(CONFIG_MCDE_DISPLAY_AV8100)		+= display-av8100.o
+
+ifdef CONFIG_FB_MCDE_DEBUG
+EXTRA_CFLAGS += -DDEBUG
+endif
+ifdef CONFIG_FB_MCDE_VDEBUG
+EXTRA_CFLAGS += -DVERBOSE_DEBUG
+endif
diff --git a/drivers/video/mcde/display-ab8500.c b/drivers/video/mcde/display-ab8500.c
new file mode 100644
index 00000000000..fa6b3208781
--- /dev/null
+++ b/drivers/video/mcde/display-ab8500.c
@@ -0,0 +1,420 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2010
+ *
+ * AB8500 display driver
+ *
+ * Author: Marcel Tunnissen <marcel.tuennissen@stericsson.com>
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+
+#include <linux/kernel.h>
+#include <linux/device.h>
+#include <linux/regulator/consumer.h>
+#include <linux/slab.h>
+#include <linux/err.h>
+#include <linux/mfd/ab8500/denc.h>
+#include <video/mcde_display.h>
+#include <video/mcde_display-ab8500.h>
+
+#define AB8500_DISP_TRACE	dev_dbg(&ddev->dev, "%s\n", __func__)
+
+struct display_driver_data {
+	struct ab8500_denc_conf denc_conf;
+	struct platform_device *denc_dev;
+	struct regulator *denc_regulator;
+};
+
+static int try_video_mode(struct mcde_display_device *ddev,
+				struct mcde_video_mode *video_mode);
+static int set_video_mode(struct mcde_display_device *ddev,
+				struct mcde_video_mode *video_mode);
+static int set_power_mode(struct mcde_display_device *ddev,
+				enum mcde_display_power_mode power_mode);
+static int on_first_update(struct mcde_display_device *ddev);
+static int display_update(struct mcde_display_device *ddev);
+
+static int __devinit ab8500_probe(struct mcde_display_device *ddev)
+{
+	int ret = 0;
+	struct ab8500_display_platform_data *pdata = ddev->dev.platform_data;
+	struct display_driver_data *driver_data;
+
+	AB8500_DISP_TRACE;
+
+	if (pdata == NULL) {
+		dev_err(&ddev->dev, "%s:Platform data missing\n", __func__);
+		return -EINVAL;
+	}
+	if (ddev->port->type != MCDE_PORTTYPE_DPI) {
+		dev_err(&ddev->dev, "%s:Invalid port type %d\n", __func__,
+							ddev->port->type);
+		return -EINVAL;
+	}
+
+	driver_data = (struct display_driver_data *)
+		kzalloc(sizeof(struct display_driver_data), GFP_KERNEL);
+	if (!driver_data) {
+		dev_err(&ddev->dev, "Failed to allocate driver data\n");
+		return -ENOMEM;
+	}
+	driver_data->denc_dev = ab8500_denc_get_device();
+	if (!driver_data->denc_dev) {
+		dev_err(&ddev->dev, "Failed to get DENC device\n");
+		ret = -ENODEV;
+		goto dev_get_failed;
+	}
+
+	if (pdata->denc_regulator_id) {
+		driver_data->denc_regulator = regulator_get(&ddev->dev,
+						pdata->denc_regulator_id);
+		if (IS_ERR(driver_data->denc_regulator)) {
+			ret = PTR_ERR(driver_data->denc_regulator);
+			dev_warn(&ddev->dev, "%s:Failed to get regulator %s\n",
+					__func__, pdata->denc_regulator_id);
+			driver_data->denc_regulator = NULL;
+			goto regulator_get_failed;
+		}
+	}
+
+	dev_set_drvdata(&ddev->dev, driver_data);
+
+	ddev->try_video_mode = try_video_mode;
+	ddev->set_video_mode = set_video_mode;
+	ddev->set_power_mode = set_power_mode;
+	ddev->on_first_update = on_first_update;
+	ddev->update = display_update;
+	ddev->prepare_for_update = NULL;
+
+	return 0;
+
+regulator_get_failed:
+	ab8500_denc_put_device(driver_data->denc_dev);
+dev_get_failed:
+	kzfree(driver_data);
+	return ret;
+}
+
+static int __devexit ab8500_remove(struct mcde_display_device *ddev)
+{
+	struct display_driver_data *driver_data = dev_get_drvdata(&ddev->dev);
+	AB8500_DISP_TRACE;
+
+	ddev->set_power_mode(ddev, MCDE_DISPLAY_PM_OFF);
+
+	if (driver_data->denc_regulator)
+		regulator_put(driver_data->denc_regulator);
+	ab8500_denc_put_device(driver_data->denc_dev);
+	kzfree(driver_data);
+	return 0;
+}
+
+static int ab8500_resume(struct mcde_display_device *ddev)
+{
+	int ret = 0;
+	AB8500_DISP_TRACE;
+
+	ret = ddev->set_power_mode(ddev, MCDE_DISPLAY_PM_STANDBY);
+	if (ret < 0)
+		dev_warn(&ddev->dev, "%s: Failed to resume display\n",
+								__func__);
+
+	return ret;
+}
+
+static int ab8500_suspend(struct mcde_display_device *ddev, pm_message_t state)
+{
+	int ret = 0;
+	AB8500_DISP_TRACE;
+
+	ret = ddev->set_power_mode(ddev, MCDE_DISPLAY_PM_OFF);
+	if (ret < 0)
+		dev_warn(&ddev->dev, "%s: Failed to suspend display\n",
+								__func__);
+
+	return ret;
+}
+
+
+static struct mcde_display_driver ab8500_driver = {
+	.probe	= ab8500_probe,
+	.remove = ab8500_remove,
+	.suspend = ab8500_suspend,
+	.resume = ab8500_resume,
+	.driver = {
+		.name	= "mcde_tv_ab8500",
+	},
+};
+
+static void print_vmode(struct mcde_video_mode *vmode)
+{
+	pr_debug("resolution: %dx%d\n", vmode->xres, vmode->yres);
+	pr_debug("  pixclock: %d\n",    vmode->pixclock);
+	pr_debug("       hbp: %d\n",    vmode->hbp);
+	pr_debug("       hfp: %d\n",    vmode->hfp);
+	pr_debug("      vbp1: %d\n",    vmode->vbp1);
+	pr_debug("      vfp1: %d\n",    vmode->vfp1);
+	pr_debug("      vbp2: %d\n",    vmode->vbp2);
+	pr_debug("      vfp2: %d\n",    vmode->vfp2);
+	pr_debug("interlaced: %s\n", vmode->interlaced ? "true" : "false");
+}
+
+static int try_video_mode(
+	struct mcde_display_device *ddev, struct mcde_video_mode *video_mode)
+{
+	AB8500_DISP_TRACE;
+
+	if (ddev == NULL || video_mode == NULL) {
+		dev_warn(&ddev->dev, "%s:ddev = NULL or video_mode = NULL\n",
+			__func__);
+		return -EINVAL;
+	}
+
+	if (video_mode->xres != 720) {
+		dev_warn(&ddev->dev,
+			"%s:Failed to find video mode x=%d, y=%d\n",
+			__func__, video_mode->xres, video_mode->yres);
+		return -EINVAL;
+	}
+
+
+	/* TODO: move this part to MCDE: mcde_dss_try_video_mode? */
+	/* check for PAL */
+	switch (video_mode->yres) {
+	case 576:
+		/* set including SAV/EAV: */
+		video_mode->hbp = 132;
+		video_mode->hfp =  12;
+		/*
+		 * Total nr of active lines:  576
+		 * Total nr of blanking lines: 49
+		 */
+		video_mode->vbp1 = 22;
+		video_mode->vfp1 =  2;
+		video_mode->vbp2 = 23;
+		video_mode->vfp2 =  2;
+		/* currently only support interlaced */
+		video_mode->interlaced = true;
+		video_mode->pixclock = 37037;
+		break;
+	case 480:
+		/* set including SAV/EAV */
+		video_mode->hbp = 122;
+		video_mode->hfp =  16;
+		/*
+		 * Total nr of active lines:  486.
+		 * Total nr of blanking lines: 39.
+		 */
+		/* Why does the following work? As far as I know the
+		 * total nr of vertical blanking lines between the
+		 * fields equals to 19 or 20, of which 3 are vfp.
+		 */
+		video_mode->vbp1 = 19;
+		video_mode->vfp1 = 3;
+		video_mode->vbp2 = 20;
+		video_mode->vfp2 = 3;
+		/* currently only support interlaced */
+		video_mode->interlaced = true;
+		video_mode->pixclock = 37037;
+		break;
+	default:
+		dev_warn(&ddev->dev,
+			"%s:Failed to find video mode x=%d, y=%d\n",
+			__func__, video_mode->xres, video_mode->yres);
+		return -EINVAL;
+	}
+
+	print_vmode(video_mode);
+
+	return 0;
+
+}
+
+static int set_video_mode(
+	struct mcde_display_device *ddev, struct mcde_video_mode *video_mode)
+{
+	int res;
+	struct ab8500_display_platform_data *pdata = ddev->dev.platform_data;
+	struct display_driver_data *driver_data =
+		(struct display_driver_data *)dev_get_drvdata(&ddev->dev);
+	AB8500_DISP_TRACE;
+
+	if (ddev == NULL || video_mode == NULL) {
+		dev_warn(&ddev->dev, "%s:ddev = NULL or video_mode = NULL\n",
+			__func__);
+		return -EINVAL;
+	}
+	ddev->video_mode = *video_mode;
+
+	if (video_mode->xres != 720) {
+		dev_warn(&ddev->dev, "%s:Failed to set video mode x=%d, y=%d\n",
+			__func__, video_mode->xres, video_mode->yres);
+		return -EINVAL;
+	}
+
+	/* check for PAL BDGHI and N */
+	switch (video_mode->yres) {
+	case 576:
+		driver_data->denc_conf.TV_std = TV_STD_PAL_BDGHI;
+		/* TODO: how to choose LOW DEF FILTER */
+		driver_data->denc_conf.cr_filter = TV_CR_PAL_HIGH_DEF_FILTER;
+		/* TODO: PAL N (e.g. uses a setup of 7.5 IRE) */
+		driver_data->denc_conf.black_level_setup = false;
+		break;
+	case 480: /* NTSC, PAL M */
+		/* TODO: PAL M */
+		driver_data->denc_conf.TV_std = TV_STD_NTSC_M;
+		/* TODO: how to choose LOW DEF FILTER */
+		driver_data->denc_conf.cr_filter = TV_CR_NTSC_HIGH_DEF_FILTER;
+		driver_data->denc_conf.black_level_setup = true;
+		break;
+	default:
+		dev_warn(&ddev->dev, "%s:Failed to set video mode x=%d, y=%d\n",
+			__func__, video_mode->xres, video_mode->yres);
+		return -EINVAL;
+	}
+
+
+	driver_data->denc_conf.progressive	= !video_mode->interlaced;
+	driver_data->denc_conf.act_output	= true;
+	driver_data->denc_conf.test_pattern	= false;
+	driver_data->denc_conf.partial_blanking	= true;
+	driver_data->denc_conf.blank_all	= false;
+	driver_data->denc_conf.suppress_col	= false;
+	driver_data->denc_conf.phase_reset_mode	= TV_PHASE_RST_MOD_DISABLE;
+	driver_data->denc_conf.dac_enable	= false;
+	driver_data->denc_conf.act_dc_output	= true;
+
+	set_power_mode(ddev, MCDE_DISPLAY_PM_STANDBY);
+	mcde_chnl_set_col_convert(ddev->chnl_state,
+						&pdata->rgb_2_yCbCr_transform);
+	mcde_chnl_stop_flow(ddev->chnl_state);
+	res = mcde_chnl_set_video_mode(ddev->chnl_state, &ddev->video_mode);
+	if (res < 0) {
+		dev_warn(&ddev->dev, "%s:Failed to set video mode on channel\n",
+			__func__);
+
+		return res;
+	}
+	ddev->update_flags |= UPDATE_FLAG_VIDEO_MODE;
+
+	return 0;
+}
+
+static int set_power_mode(struct mcde_display_device *ddev,
+	enum mcde_display_power_mode power_mode)
+{
+	int ret;
+	struct display_driver_data *driver_data = dev_get_drvdata(&ddev->dev);
+	AB8500_DISP_TRACE;
+
+	/* OFF -> STANDBY */
+	if (ddev->power_mode == MCDE_DISPLAY_PM_OFF &&
+					power_mode != MCDE_DISPLAY_PM_OFF) {
+		dev_dbg(&ddev->dev, "off -> standby\n");
+		if (ddev->platform_enable) {
+			ret = ddev->platform_enable(ddev);
+			if (ret)
+				goto error;
+		}
+		if (driver_data->denc_regulator) {
+			ret = regulator_enable(driver_data->denc_regulator);
+			if (ret != 0)
+				goto error;
+		}
+		ab8500_denc_power_up(driver_data->denc_dev);
+		ab8500_denc_reset(driver_data->denc_dev, true);
+		ddev->power_mode = MCDE_DISPLAY_PM_STANDBY;
+	}
+	/* STANDBY -> ON */
+	if (ddev->power_mode == MCDE_DISPLAY_PM_STANDBY &&
+					power_mode == MCDE_DISPLAY_PM_ON) {
+		dev_dbg(&ddev->dev, "standby -> on\n");
+		ddev->power_mode = MCDE_DISPLAY_PM_ON;
+	}
+	/* ON -> STANDBY */
+	if (ddev->power_mode == MCDE_DISPLAY_PM_ON &&
+					power_mode <= MCDE_DISPLAY_PM_STANDBY) {
+		dev_dbg(&ddev->dev, "on -> standby\n");
+		ab8500_denc_reset(driver_data->denc_dev, false);
+		ddev->power_mode = MCDE_DISPLAY_PM_STANDBY;
+	}
+	/* STANDBY -> OFF */
+	if (ddev->power_mode == MCDE_DISPLAY_PM_STANDBY &&
+					power_mode == MCDE_DISPLAY_PM_OFF) {
+		dev_dbg(&ddev->dev, "standby -> off\n");
+		memset(&(ddev->video_mode), 0, sizeof(struct mcde_video_mode));
+		if (driver_data->denc_regulator) {
+			ret = regulator_disable(driver_data->denc_regulator);
+			if (ret != 0)
+				goto error;
+		}
+		if (ddev->platform_disable) {
+			ret = ddev->platform_disable(ddev);
+			if (ret)
+				goto error;
+		}
+		ab8500_denc_power_down(driver_data->denc_dev);
+		ddev->power_mode = MCDE_DISPLAY_PM_OFF;
+	}
+
+	return 0;
+error:
+	dev_err(&ddev->dev, "Failed to set power mode");
+	return ret;
+}
+
+static int on_first_update(struct mcde_display_device *ddev)
+{
+	struct display_driver_data *driver_data = dev_get_drvdata(&ddev->dev);
+
+	ab8500_denc_conf(driver_data->denc_dev, &driver_data->denc_conf);
+	ab8500_denc_conf_plug_detect(driver_data->denc_dev, true, false,
+							TV_PLUG_TIME_2S);
+	ab8500_denc_mask_int_plug_det(driver_data->denc_dev, false, false);
+	ddev->first_update = false;
+	return 0;
+}
+
+static int display_update(struct mcde_display_device *ddev)
+{
+	int ret;
+
+	if (ddev->first_update)
+		on_first_update(ddev);
+	if (ddev->power_mode != MCDE_DISPLAY_PM_ON && ddev->set_power_mode) {
+		ret = set_power_mode(ddev, MCDE_DISPLAY_PM_ON);
+		if (ret < 0)
+			goto error;
+	}
+	ret = mcde_chnl_update(ddev->chnl_state, &ddev->update_area);
+	if (ret < 0)
+		goto error;
+out:
+	return ret;
+error:
+	dev_warn(&ddev->dev, "%s:Failed to set power mode to on\n", __func__);
+	goto out;
+}
+
+/* Module init */
+static int __init mcde_display_tvout_ab8500_init(void)
+{
+	pr_debug("%s\n", __func__);
+
+	return mcde_display_driver_register(&ab8500_driver);
+}
+late_initcall(mcde_display_tvout_ab8500_init);
+
+static void __exit mcde_display_tvout_ab8500_exit(void)
+{
+	pr_debug("%s\n", __func__);
+
+	mcde_display_driver_unregister(&ab8500_driver);
+}
+module_exit(mcde_display_tvout_ab8500_exit);
+
+MODULE_AUTHOR("Marcel Tunnissen <marcel.tuennissen@stericsson.com>");
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("ST-Ericsson MCDE TVout through AB8500 display driver");
diff --git a/drivers/video/mcde/display-av8100.c b/drivers/video/mcde/display-av8100.c
new file mode 100644
index 00000000000..009ff6e9696
--- /dev/null
+++ b/drivers/video/mcde/display-av8100.c
@@ -0,0 +1,907 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2010
+ *
+ * ST-Ericsson HDMI display driver
+ *
+ * Author: Per Persson <per-xb-persson@stericsson.com>
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+
+#include <linux/kernel.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/gpio.h>
+#include <linux/io.h>
+
+#include <video/mcde_display.h>
+#include <video/mcde_display-av8100.h>
+#include <video/av8100.h>
+#include <video/hdmi.h>
+
+static int hdmi_try_video_mode(
+	struct mcde_display_device *ddev, struct mcde_video_mode *video_mode);
+static int hdmi_set_video_mode(
+	struct mcde_display_device *ddev, struct mcde_video_mode *video_mode);
+
+static ssize_t store_hdmisdtvswitch(struct device *dev,
+		struct device_attribute *attr, const char *buf, size_t count);
+
+static DEVICE_ATTR(hdmisdtvswitch, S_IWUSR, NULL, store_hdmisdtvswitch);
+
+static ssize_t store_hdmisdtvswitch(struct device *dev,
+		struct device_attribute *attr, const char *buf, size_t count)
+{
+	struct mcde_display_device *mdev = to_mcde_display_device(dev);
+	dev_dbg(dev, "%s\n", __func__);
+
+	if (count > 0) {
+		if ((*buf == 0) || (*buf == '0')) {
+			dev_dbg(dev, "hdmi/sdtv switch = hdmi\n");
+			mdev->port->hdmi_sdtv_switch = HDMI_SWITCH;
+			mdev->native_x_res = NATIVE_XRES_HDMI;
+			mdev->native_y_res = NATIVE_YRES_HDMI;
+			mdev->video_mode.force_update = true;
+		} else {
+			dev_dbg(dev, "hdmi/sdtv switch = sdtv\n");
+			mdev->port->hdmi_sdtv_switch = SDTV_SWITCH;
+			mdev->native_x_res = NATIVE_XRES_SDTV;
+			mdev->native_y_res = NATIVE_YRES_SDTV;
+			mdev->video_mode.force_update = true;
+		}
+	}
+
+	return count;
+}
+
+/* Supported HDMI modes */
+static struct mcde_video_mode video_modes_supp_hdmi[] = {
+	/* 640_480_60_P */
+	{
+		.xres = 640,	.yres = 480,
+		.pixclock = 39682,
+		.hbp = 112,	.hfp = 48,
+		.vbp1 = 33,	.vfp1 = 12
+	},
+	/* 720_480_60_P */
+	{
+		.xres = 720,	.yres = 480,
+		.pixclock = 37000,
+		.hbp = 104,	.hfp = 34,
+		.vbp1 = 30,	.vfp1 = 15
+	},
+	/* 720_576_50_P */
+	{
+		.xres = 720,	.yres = 576,
+		.pixclock = 37037,
+		.hbp = 132,	.hfp = 12,
+		.vbp1 = 44,	.vfp1 = 5
+	},
+	/* 1280_720_60_P */
+	{
+		.xres = 1280,	.yres = 720,
+		.pixclock = 13468,
+		.hbp = 256,	.hfp = 114,
+		.vbp1 = 20,	.vfp1 = 10
+	},
+	/* 1280_720_50_P */
+	{
+		.xres = 1280,	.yres = 720,
+		.pixclock = 13468,
+		.hbp = 260,	.hfp = 440,
+		.vbp1 = 25,	.vfp1 = 5
+	},
+	/* 1920_1080_30_P */
+	{
+		.xres = 1920,	.yres = 1080,
+		.pixclock = 13468,
+		.hbp = 189,	.hfp = 91,
+		.vbp1 = 36,	.vfp1 = 9
+	},
+	/* 1920_1080_24_P */
+	{
+		.xres = 1920,	.yres = 1080,
+		.pixclock = 13468,
+		.hbp = 170,	.hfp = 660,
+		.vbp1 = 36,	.vfp1 = 9
+	},
+	/* 1920_1080_25_P */
+	{
+		.xres = 1920,	.yres = 1080,
+		.pixclock = 13468,
+		.hbp = 192,	.hfp = 528,
+		.vbp1 = 36,	.vfp1 = 9
+	},
+	/* 720_480_60_I) */
+	{
+		.xres = 720,	.yres = 480,
+		.pixclock = 74074,
+		.hbp = 126,	.hfp = 12,
+		.vbp1 = 44,	.vfp1 = 1,
+		.interlaced = true,
+	},
+	/* 720_576_50_I) */
+	{
+		.xres = 720,	.yres = 576,
+		.pixclock = 74074,
+		.hbp = 132,	.hfp = 12,
+		.vbp1 = 44,	.vfp1 = 5,
+		.interlaced = true,
+	},
+	/* 1920_1080_50_I) */
+	{
+		.xres = 1920,	.yres = 1080,
+		.pixclock = 13468,
+		.hbp = 192,	.hfp = 528,
+		.vbp1 = 20,	.vfp1 = 25,
+		.interlaced = true,
+	},
+	/* 1920_1080_60_I) */
+	{
+		.xres = 1920,	.yres = 1080,
+		.pixclock = 13468,
+		.hbp = 192,	.hfp = 88,
+		.vbp1 = 20,	.vfp1 = 25,
+		.interlaced = true,
+	},
+};
+
+/* Supported TVout modes */
+static struct mcde_video_mode video_modes_supp_sdtv[] = {
+	/* 720_480_60_I) */
+	{
+		.xres = 720,	.yres = 480,
+		.pixclock = 74074,
+		.hbp = 126,	.hfp = 12,
+		.vbp1 = 44,	.vfp1 = 1,
+		.interlaced = true,
+	},
+	/* 720_576_50_I) */
+	{
+		.xres = 720,	.yres = 576,
+		.pixclock = 74074,
+		.hbp = 132,	.hfp = 12,
+		.vbp1 = 44,	.vfp1 = 5,
+		.interlaced = true,
+	},
+};
+
+#define AV8100_MAX_LEVEL 255
+
+static int hdmi_try_video_mode(
+	struct mcde_display_device *ddev, struct mcde_video_mode *video_mode)
+{
+	int index = 0;
+	int match_level = AV8100_MAX_LEVEL;
+	int found_index = -1;
+	struct mcde_video_mode *video_modes_supp;
+	int array_size;
+
+	if (ddev == NULL || video_mode == NULL) {
+		pr_warning("%s:ddev = NULL or video_mode = NULL\n", __func__);
+		return -EINVAL;
+	}
+
+	dev_vdbg(&ddev->dev, "%s\n", __func__);
+
+	if (ddev->port->hdmi_sdtv_switch == SDTV_SWITCH) {
+		video_mode->interlaced = true;
+		video_modes_supp = video_modes_supp_sdtv;
+		array_size = ARRAY_SIZE(video_modes_supp_sdtv);
+	} else {
+		video_modes_supp = video_modes_supp_hdmi;
+		array_size = ARRAY_SIZE(video_modes_supp_hdmi);
+	}
+
+	while (index < array_size) {
+		/* 1. Check if all parameters match */
+		if ((video_mode->xres == video_modes_supp[index].xres) &&
+			(video_mode->yres == video_modes_supp[index].yres) &&
+			((video_mode->xres + video_mode->hbp +
+				video_mode->hfp) ==
+			(video_modes_supp[index].xres +
+				video_modes_supp[index].hbp +
+				video_modes_supp[index].hfp)) &&
+			((video_mode->yres + video_mode->vbp1 +
+				video_mode->vbp2 + video_mode->vfp1 +
+				video_mode->vfp2) ==
+			(video_modes_supp[index].yres +
+				video_modes_supp[index].vbp1 +
+				video_modes_supp[index].vbp2 +
+				video_modes_supp[index].vfp1 +
+				video_modes_supp[index].vfp2)) &&
+			(video_mode->pixclock ==
+				video_modes_supp[index].pixclock) &&
+			(video_mode->interlaced ==
+				video_modes_supp[index].interlaced)) {
+					match_level = 1;
+					found_index = index;
+					break;
+		}
+
+		/* 2. Check if xres,yres,htot,vtot,interlaced match */
+		if ((match_level > 2) &&
+			(video_mode->xres == video_modes_supp[index].xres) &&
+			(video_mode->yres == video_modes_supp[index].yres) &&
+			((video_mode->xres + video_mode->hbp +
+				video_mode->hfp) ==
+			(video_modes_supp[index].xres +
+				video_modes_supp[index].hbp +
+				video_modes_supp[index].hfp)) &&
+			((video_mode->yres + video_mode->vbp1 +
+				video_mode->vbp2 + video_mode->vfp1 +
+				video_mode->vfp2) ==
+			(video_modes_supp[index].yres +
+				video_modes_supp[index].vbp1 +
+				video_modes_supp[index].vbp2 +
+				video_modes_supp[index].vfp1 +
+				video_modes_supp[index].vfp2)) &&
+			(video_mode->interlaced ==
+				video_modes_supp[index].interlaced)) {
+			match_level = 2;
+			found_index = index;
+		}
+
+		/* 3. Check if xres,yres,pixelclock,interlaced match */
+		if ((match_level > 3) &&
+			(video_mode->xres == video_modes_supp[index].xres) &&
+			(video_mode->yres == video_modes_supp[index].yres) &&
+			(video_mode->interlaced ==
+				video_modes_supp[index].interlaced) &&
+			(video_mode->pixclock ==
+				video_modes_supp[index].pixclock)) {
+			match_level = 3;
+			found_index = index;
+		}
+
+		/* 4. Check if xres,yres,interlaced match */
+		if ((match_level > 4) &&
+			(video_mode->xres == video_modes_supp[index].xres) &&
+			(video_mode->yres == video_modes_supp[index].yres) &&
+			(video_mode->interlaced ==
+				video_modes_supp[index].interlaced)) {
+			match_level = 4;
+			found_index = index;
+		}
+
+		index++;
+	}
+
+	if (found_index == -1) {
+		dev_dbg(&ddev->dev, "video_mode not accepted\n");
+		dev_dbg(&ddev->dev, "xres:%d yres:%d pixclock:%d hbp:%d hfp:%d "
+			"vfp1:%d vfp2:%d vbp1:%d vbp2:%d intlcd:%d\n",
+			video_mode->xres, video_mode->yres,
+			video_mode->pixclock, video_mode->hbp,
+			video_mode->hfp, video_mode->vfp1, video_mode->vfp2,
+			video_mode->vbp1, video_mode->vbp2,
+			video_mode->interlaced);
+		return -EINVAL;
+	}
+
+	memset(video_mode, 0, sizeof(struct mcde_video_mode));
+	memcpy(video_mode, &video_modes_supp[found_index],
+		sizeof(struct mcde_video_mode));
+
+	dev_dbg(&ddev->dev, "%s:HDMI video_mode %d chosen. Level:%d\n",
+		__func__, found_index, match_level);
+
+	return 0;
+}
+
+static int hdmi_set_video_mode(
+	struct mcde_display_device *dev, struct mcde_video_mode *video_mode)
+{
+	int ret;
+	bool update = 0;
+	union av8100_configuration av8100_config;
+	struct mcde_display_hdmi_platform_data *pdata = dev->dev.platform_data;
+	struct av8100_status status;
+
+	/* TODO check video_mode_params */
+	if (dev == NULL || video_mode == NULL) {
+		pr_warning("%s:ddev = NULL or video_mode = NULL\n", __func__);
+		return -EINVAL;
+	}
+
+	dev_vdbg(&dev->dev, "%s:\n", __func__);
+	dev_vdbg(&dev->dev, "%s:xres:%d yres:%d hbp:%d hfp:%d vbp1:%d vfp1:%d "
+		"vbp2:%d vfp2:%d interlaced:%d\n", __func__,
+		video_mode->xres,
+		video_mode->yres,
+		video_mode->hbp,
+		video_mode->hfp,
+		video_mode->vbp1,
+		video_mode->vfp1,
+		video_mode->vbp2,
+		video_mode->vfp2,
+		video_mode->interlaced);
+
+	memset(&(dev->video_mode), 0, sizeof(struct mcde_video_mode));
+	memcpy(&(dev->video_mode), video_mode, sizeof(struct mcde_video_mode));
+
+	if (dev->port->pixel_format == MCDE_PORTPIXFMT_DSI_YCBCR422)
+		mcde_chnl_set_col_convert(dev->chnl_state,
+						&pdata->rgb_2_yCbCr_transform);
+	mcde_chnl_stop_flow(dev->chnl_state);
+
+	ret = mcde_chnl_set_video_mode(dev->chnl_state, &dev->video_mode);
+	if (ret < 0) {
+		dev_warn(&dev->dev, "Failed to set video mode\n");
+		return ret;
+	}
+
+	status = av8100_status_get();
+	if (status.av8100_state == AV8100_OPMODE_UNDEFINED)
+		return -EINVAL;
+
+	if (av8100_ver_get() == AV8100_CHIPVER_1) {
+		if (status.av8100_state >= AV8100_OPMODE_STANDBY) {
+			/* Disable interrupts */
+			ret = av8100_disable_interrupt();
+			if (ret) {
+				dev_err(&dev->dev,
+					"%s:av8100_disable_interrupt failed\n",
+					__func__);
+				return ret;
+			}
+
+			ret = av8100_powerdown();
+			if (ret) {
+				dev_err(&dev->dev,
+						"av8100_powerdown failed\n");
+				return ret;
+			}
+
+			msleep(10);
+		}
+	}
+
+	/* Set to powerup with interrupts disabled */
+	status = av8100_status_get();
+	if (status.av8100_state < AV8100_OPMODE_STANDBY) {
+		ret = av8100_powerup();
+		if (ret) {
+			dev_err(&dev->dev, "av8100_powerup failed\n");
+			return ret;
+		}
+
+		ret = av8100_download_firmware(NULL, 0, I2C_INTERFACE);
+		if (ret) {
+			dev_err(&dev->dev, "av8100_download_firmware failed\n");
+			av8100_powerdown();
+			return ret;
+		}
+	} else if (av8100_disable_interrupt()) {
+		return -EFAULT;
+	}
+
+	/* Set HDMI mode to OFF */
+	av8100_config.hdmi_format.hdmi_mode = AV8100_HDMI_OFF;
+	av8100_config.hdmi_format.dvi_format = AV8100_DVI_CTRL_CTL0;
+	av8100_config.hdmi_format.hdmi_format = AV8100_HDMI;
+	if (av8100_conf_prep(AV8100_COMMAND_HDMI, &av8100_config))
+		return -EFAULT;
+
+	if (av8100_conf_w(AV8100_COMMAND_HDMI, NULL, NULL, I2C_INTERFACE))
+		return -EFAULT;
+
+	/* Get current av8100 video output format */
+	ret = av8100_conf_get(AV8100_COMMAND_VIDEO_OUTPUT_FORMAT,
+		&av8100_config);
+	if (ret) {
+		dev_err(&dev->dev, "%s:av8100_conf_get "
+			"AV8100_COMMAND_VIDEO_OUTPUT_FORMAT failed\n",
+			__func__);
+		return ret;
+	}
+
+	if (dev->port->hdmi_sdtv_switch == SDTV_SWITCH)
+		av8100_config.video_output_format.video_output_cea_vesa =
+			dev->video_mode.yres == NATIVE_YRES_SDTV ?
+				AV8100_CEA21_22_576I_PAL_50HZ :
+				AV8100_CEA6_7_NTSC_60HZ;
+	else
+		av8100_config.video_output_format.video_output_cea_vesa =
+			av8100_video_output_format_get(
+				dev->video_mode.xres,
+				dev->video_mode.yres,
+				dev->video_mode.xres +
+				dev->video_mode.hbp + dev->video_mode.hfp,
+				dev->video_mode.yres +
+				dev->video_mode.vbp1 + dev->video_mode.vfp1 +
+				dev->video_mode.vbp2 + dev->video_mode.vfp2,
+				dev->video_mode.pixclock,
+				dev->video_mode.interlaced);
+
+	if (AV8100_VIDEO_OUTPUT_CEA_VESA_MAX ==
+		av8100_config.video_output_format.video_output_cea_vesa) {
+		dev_err(&dev->dev, "%s:video output format not found "
+			"\n", __func__);
+		return ret;
+	}
+
+	ret = av8100_conf_prep(AV8100_COMMAND_VIDEO_OUTPUT_FORMAT,
+		&av8100_config);
+	if (ret) {
+		dev_err(&dev->dev, "%s:av8100_conf_prep "
+			"AV8100_COMMAND_VIDEO_OUTPUT_FORMAT failed\n",
+			__func__);
+		return ret;
+	}
+
+	/* Get current av8100 video input format */
+	ret = av8100_conf_get(AV8100_COMMAND_VIDEO_INPUT_FORMAT,
+		&av8100_config);
+	if (ret) {
+		dev_err(&dev->dev, "%s:av8100_conf_get "
+			"AV8100_COMMAND_VIDEO_INPUT_FORMAT failed\n",
+			__func__);
+		return ret;
+	}
+
+	/* Set correct av8100 video input pixel format */
+	switch (dev->port->pixel_format) {
+	case MCDE_PORTPIXFMT_DSI_16BPP:
+	default:
+		av8100_config.video_input_format.input_pixel_format =
+			AV8100_INPUT_PIX_RGB565;
+		break;
+	case MCDE_PORTPIXFMT_DSI_18BPP:
+		av8100_config.video_input_format.input_pixel_format =
+			AV8100_INPUT_PIX_RGB666;
+		break;
+	case MCDE_PORTPIXFMT_DSI_18BPP_PACKED:
+		av8100_config.video_input_format.input_pixel_format =
+			AV8100_INPUT_PIX_RGB666P;
+		break;
+	case MCDE_PORTPIXFMT_DSI_24BPP:
+		av8100_config.video_input_format.input_pixel_format =
+			AV8100_INPUT_PIX_RGB888;
+		break;
+	case MCDE_PORTPIXFMT_DSI_YCBCR422:
+		av8100_config.video_input_format.input_pixel_format =
+			AV8100_INPUT_PIX_YCBCR422;
+		break;
+	}
+
+	/*  Set ui_x4 */
+	av8100_config.video_input_format.ui_x4 = dev->port->phy.dsi.ui;
+
+	/* Set TE_config */
+	switch (dev->port->sync_src) {
+	case MCDE_SYNCSRC_TE0:
+		av8100_config.video_input_format.TE_config = AV8100_TE_IT_LINE;
+		break;
+	case MCDE_SYNCSRC_TE1:
+		av8100_config.video_input_format.TE_config = AV8100_TE_GPIO_IT;
+		break;
+	case MCDE_SYNCSRC_TE_POLLING:
+		av8100_config.video_input_format.TE_config =
+			AV8100_TE_DSI_LANE; /* Only on DSI, no interrupts */
+		break;
+	case MCDE_SYNCSRC_OFF:
+	default:
+		av8100_config.video_input_format.TE_config = AV8100_TE_OFF;
+		break;
+	}
+
+	ret = av8100_conf_prep(AV8100_COMMAND_VIDEO_INPUT_FORMAT,
+		&av8100_config);
+	if (ret) {
+		dev_err(&dev->dev, "%s:av8100_conf_prep "
+				"AV8100_COMMAND_VIDEO_INPUT_FORMAT failed\n",
+				__func__);
+		return ret;
+	}
+
+	ret = av8100_conf_w(AV8100_COMMAND_VIDEO_INPUT_FORMAT,
+		NULL, NULL, I2C_INTERFACE);
+	if (ret) {
+		dev_err(&dev->dev, "%s:av8100_conf_w "
+				"AV8100_COMMAND_VIDEO_INPUT_FORMAT failed\n",
+				__func__);
+		return ret;
+	}
+
+	if (dev->port->hdmi_sdtv_switch == SDTV_SWITCH) {
+		if (dev->port->pixel_format != MCDE_PORTPIXFMT_DSI_YCBCR422)
+			av8100_config.color_transform =
+					AV8100_COLOR_TRANSFORM_RGB_TO_DENC;
+		else
+			av8100_config.color_transform =
+					AV8100_COLOR_TRANSFORM_YUV_TO_DENC;
+	} else if (dev->port->pixel_format == MCDE_PORTPIXFMT_DSI_YCBCR422) {
+		av8100_config.color_transform =
+					AV8100_COLOR_TRANSFORM_YUV_TO_RGB;
+	} else {
+		av8100_config.color_transform =
+					AV8100_COLOR_TRANSFORM_INDENTITY;
+	}
+
+	ret = av8100_conf_prep(
+		AV8100_COMMAND_COLORSPACECONVERSION,
+		&av8100_config);
+	if (ret) {
+		dev_err(&dev->dev, "%s:av8100_configuration_prepare "
+			"AV8100_COMMAND_COLORSPACECONVERSION failed\n",
+			__func__);
+		return ret;
+	}
+
+	ret = av8100_conf_w(
+			AV8100_COMMAND_COLORSPACECONVERSION,
+			NULL, NULL, I2C_INTERFACE);
+	if (ret) {
+		dev_err(&dev->dev, "%s:av8100_conf_w "
+			"AV8100_COMMAND_COLORSPACECONVERSION failed\n",
+			__func__);
+		return ret;
+	}
+
+	/* Set video output format */
+	ret = av8100_conf_w(AV8100_COMMAND_VIDEO_OUTPUT_FORMAT,
+		NULL, NULL, I2C_INTERFACE);
+	if (ret) {
+		dev_err(&dev->dev, "av8100_conf_w failed\n");
+		return ret;
+	}
+
+	/* Set audio input format */
+	ret = av8100_conf_w(AV8100_COMMAND_AUDIO_INPUT_FORMAT,
+		NULL, NULL, I2C_INTERFACE);
+	if (ret) {
+		dev_err(&dev->dev, "%s:av8100_conf_w "
+				"AV8100_COMMAND_AUDIO_INPUT_FORMAT failed\n",
+			__func__);
+		return ret;
+	}
+
+	/* Get current av8100 video denc settings format */
+	ret = av8100_conf_get(AV8100_COMMAND_DENC,
+		&av8100_config);
+	if (ret) {
+		dev_err(&dev->dev, "%s:av8100_conf_get "
+				"AV8100_COMMAND_DENC failed\n", __func__);
+		return ret;
+	}
+
+	if (dev->port->hdmi_sdtv_switch == SDTV_SWITCH) {
+		update = true;
+		if (dev->video_mode.yres == NATIVE_YRES_SDTV) {
+			av8100_config.denc_format.standard_selection =
+					AV8100_PAL_BDGHI;
+			av8100_config.denc_format.cvbs_video_format  =
+					AV8100_CVBS_625;
+		} else {
+			av8100_config.denc_format.standard_selection =
+					AV8100_NTSC_M;
+			av8100_config.denc_format.cvbs_video_format  =
+					AV8100_CVBS_525;
+		}
+	} else
+		update = (av8100_config.denc_format.enable != 0);
+
+	if (update) {
+		if (dev->port->hdmi_sdtv_switch == SDTV_SWITCH)
+			av8100_config.denc_format.enable = 1;
+		else
+			av8100_config.denc_format.enable = 0;
+
+		ret = av8100_conf_prep(AV8100_COMMAND_DENC,
+			&av8100_config);
+		if (ret) {
+			dev_err(&dev->dev, "%s:av8100_conf_prep "
+				"AV8100_COMMAND_DENC failed\n", __func__);
+			return ret;
+		}
+
+		/* TODO: prepare depending on OUT fmt */
+		ret = av8100_conf_w(AV8100_COMMAND_DENC,
+			NULL, NULL, I2C_INTERFACE);
+		if (ret) {
+			dev_err(&dev->dev, "%s:av8100_conf_w "
+				"AV8100_COMMAND_DENC failed\n", __func__);
+			return ret;
+		}
+	}
+
+	dev->update_flags |= UPDATE_FLAG_VIDEO_MODE;
+	dev->first_update = true;
+
+	return 0;
+}
+
+static u16 rotate_byte_left(u8 c, int nr)
+{
+	return (0xff & (c << nr)) | (0xff & (c >> (8 - nr)));
+}
+
+static u16 map_yv(u8 in)
+{
+	return rotate_byte_left(in, 3) << 4;
+}
+
+static u16 map_u(u8 in)
+{
+	return rotate_byte_left(in, 5) << 4;
+}
+
+static int hdmi_set_pixel_format(
+	struct mcde_display_device *ddev, enum mcde_ovly_pix_fmt format)
+{
+	int ret;
+
+	ddev->pixel_format = format;
+	mcde_chnl_stop_flow(ddev->chnl_state);
+	ret = mcde_chnl_set_pixel_format(ddev->chnl_state,
+						ddev->port->pixel_format);
+
+	if (ret < 0) {
+		dev_warn(&ddev->dev, "%s:Failed to set pixel format = %d\n",
+							__func__, format);
+		return ret;
+	}
+
+	if (ddev->port->pixel_format == MCDE_PORTPIXFMT_DSI_YCBCR422 &&
+						av8100_ver_get() == 2) {
+		/* The V2 version has an error for unpacking YUV422 */
+		struct mcde_palette_table palette = {
+			.map_col_ch0 = *map_yv,
+			.map_col_ch1 = *map_u,
+			.map_col_ch2 = *map_yv,
+		};
+		ret = mcde_chnl_set_palette(ddev->chnl_state, &palette);
+	}
+
+	ddev->update_flags |= UPDATE_FLAG_PIXEL_FORMAT;
+
+	return 0;
+}
+
+static int hdmi_apply_config(struct mcde_display_device *ddev)
+{
+	int ret;
+
+	if (!ddev->update_flags)
+		return 0;
+
+	ret = mcde_chnl_apply(ddev->chnl_state);
+	if (ret < 0) {
+		dev_warn(&ddev->dev, "%s:Failed to apply to channel\n",
+							__func__);
+		return ret;
+	}
+	ddev->update_flags = 0;
+
+	return 0;
+}
+
+static int hdmi_on_first_update(struct mcde_display_device *dev)
+{
+	int ret;
+	union av8100_configuration av8100_config;
+
+	dev->first_update = false;
+
+	/* Get current av8100 video denc settings format */
+	ret = av8100_conf_get(AV8100_COMMAND_DENC,
+		&av8100_config);
+	if (ret) {
+		dev_err(&dev->dev, "%s:av8100_conf_get "
+				"AV8100_COMMAND_DENC failed\n", __func__);
+		return ret;
+	}
+
+	/*
+	 * Avoid simultaneous output of DENC and HDMI.
+	 * Only one of them should be enabled.
+	 */
+	if (av8100_config.denc_format.enable)
+		av8100_config.hdmi_format.hdmi_mode = AV8100_HDMI_OFF;
+	else
+		av8100_config.hdmi_format.hdmi_mode = AV8100_HDMI_ON;
+
+	av8100_config.hdmi_format.hdmi_format = AV8100_HDMI;
+	av8100_config.hdmi_format.dvi_format = AV8100_DVI_CTRL_CTL0;
+
+	ret = av8100_conf_prep(AV8100_COMMAND_HDMI, &av8100_config);
+	if (ret) {
+		dev_err(&dev->dev, "%s:av8100_conf_prep "
+			"AV8100_COMMAND_HDMI failed\n", __func__);
+		return ret;
+	}
+
+	/* Enable interrupts */
+	ret = av8100_enable_interrupt();
+	if (ret) {
+		dev_err(&dev->dev, "%s:av8100_enable_interrupt failed\n",
+			__func__);
+		return ret;
+	}
+
+	ret = av8100_conf_w(AV8100_COMMAND_HDMI, NULL,
+		NULL, I2C_INTERFACE);
+	if (ret) {
+		dev_err(&dev->dev, "%s:av8100_conf_w "
+			"AV8100_COMMAND_HDMI failed\n", __func__);
+	}
+
+	return ret;
+}
+
+static int hdmi_set_power_mode(struct mcde_display_device *ddev,
+	enum mcde_display_power_mode power_mode)
+{
+	int ret = 0;
+
+	/* OFF -> STANDBY */
+	if (ddev->power_mode == MCDE_DISPLAY_PM_OFF &&
+		power_mode != MCDE_DISPLAY_PM_OFF) {
+		if (ddev->platform_enable) {
+			ret = ddev->platform_enable(ddev);
+			if (ret)
+				return ret;
+		}
+		ddev->power_mode = MCDE_DISPLAY_PM_STANDBY;
+	}
+	/* STANDBY -> ON */
+	if (ddev->power_mode == MCDE_DISPLAY_PM_STANDBY &&
+		power_mode == MCDE_DISPLAY_PM_ON) {
+		ddev->power_mode = MCDE_DISPLAY_PM_ON;
+		goto set_power_and_exit;
+	}
+	/* ON -> STANDBY */
+	else if (ddev->power_mode == MCDE_DISPLAY_PM_ON &&
+		power_mode <= MCDE_DISPLAY_PM_STANDBY) {
+		ddev->power_mode = MCDE_DISPLAY_PM_STANDBY;
+	}
+
+	/* STANDBY -> OFF */
+	if (ddev->power_mode == MCDE_DISPLAY_PM_STANDBY &&
+		power_mode == MCDE_DISPLAY_PM_OFF) {
+		memset(&(ddev->video_mode), 0, sizeof(struct mcde_video_mode));
+		ret = av8100_powerdown();
+		if (ret)
+			dev_err(&ddev->dev, "%s:av8100_powerdown failed\n"
+								, __func__);
+		if (ddev->platform_disable) {
+			ret = ddev->platform_disable(ddev);
+			if (ret)
+				return ret;
+		}
+		ddev->power_mode = MCDE_DISPLAY_PM_OFF;
+	}
+
+set_power_and_exit:
+	mcde_chnl_set_power_mode(ddev->chnl_state, ddev->power_mode);
+
+	return ret;
+}
+
+static int __devinit hdmi_probe(struct mcde_display_device *dev)
+{
+	struct mcde_display_hdmi_platform_data *pdata =
+		dev->dev.platform_data;
+
+	if (pdata == NULL) {
+		dev_err(&dev->dev, "%s:Platform data missing\n", __func__);
+		return -EINVAL;
+	}
+
+	if (dev->port->type != MCDE_PORTTYPE_DSI) {
+		dev_err(&dev->dev, "%s:Invalid port type %d\n",
+			__func__, dev->port->type);
+		return -EINVAL;
+	}
+
+	/* DSI use clock continous mode if AV8100_CHIPVER_1 > 1 */
+	if (av8100_ver_get() > AV8100_CHIPVER_1)
+		dev->port->phy.dsi.clk_cont = true;
+
+	dev->prepare_for_update = NULL;
+	dev->on_first_update = hdmi_on_first_update;
+	dev->try_video_mode = hdmi_try_video_mode;
+	dev->set_video_mode = hdmi_set_video_mode;
+	dev->apply_config = hdmi_apply_config;
+	dev->set_pixel_format = hdmi_set_pixel_format;
+	dev->set_power_mode = hdmi_set_power_mode;
+
+	/* Create sysfs file for switching between hdmi and sdtv */
+	if (device_create_file(&dev->dev, &dev_attr_hdmisdtvswitch))
+		dev_info(&dev->dev,
+			"Unable to create hdmisdtvswitch attr\n");
+
+	dev_info(&dev->dev, "HDMI display probed\n");
+
+	return 0;
+}
+
+static int __devexit hdmi_remove(struct mcde_display_device *dev)
+{
+	struct mcde_display_hdmi_platform_data *pdata =
+		dev->dev.platform_data;
+
+	/* Remove sysfs file */
+	device_remove_file(&dev->dev, &dev_attr_hdmisdtvswitch);
+
+	dev->set_power_mode(dev, MCDE_DISPLAY_PM_OFF);
+
+	if (pdata->hdmi_platform_enable) {
+		if (pdata->regulator)
+			regulator_put(pdata->regulator);
+		if (pdata->reset_gpio) {
+			gpio_direction_input(pdata->reset_gpio);
+			gpio_free(pdata->reset_gpio);
+		}
+	}
+
+	return 0;
+}
+
+#if !defined(CONFIG_HAS_EARLYSUSPEND) && defined(CONFIG_PM)
+static int hdmi_resume(struct mcde_display_device *ddev)
+{
+	int ret;
+
+	/* set_power_mode will handle call platform_enable */
+	ret = ddev->set_power_mode(ddev, MCDE_DISPLAY_PM_STANDBY);
+	if (ret < 0)
+		dev_warn(&ddev->dev, "%s:Failed to resume display\n"
+			, __func__);
+
+	ddev->update(ddev);
+	return ret;
+}
+
+static int hdmi_suspend(struct mcde_display_device *ddev, pm_message_t state)
+{
+	int ret;
+
+	/* set_power_mode will handle call platform_disable */
+	ret = ddev->set_power_mode(ddev, MCDE_DISPLAY_PM_OFF);
+	if (ret < 0)
+		dev_warn(&ddev->dev, "%s:Failed to suspend display\n"
+			, __func__);
+
+	return ret;
+}
+#endif
+
+static struct mcde_display_driver hdmi_driver = {
+	.probe	= hdmi_probe,
+	.remove = hdmi_remove,
+#if !defined(CONFIG_HAS_EARLYSUSPEND) && defined(CONFIG_PM)
+	.suspend = hdmi_suspend,
+	.resume = hdmi_resume,
+#else
+	.suspend = NULL,
+	.resume = NULL,
+#endif
+	.driver = {
+		.name	= "av8100_hdmi",
+	},
+};
+
+/* Module init */
+static int __init mcde_display_hdmi_init(void)
+{
+	pr_info("%s\n", __func__);
+
+	return mcde_display_driver_register(&hdmi_driver);
+
+}
+late_initcall(mcde_display_hdmi_init);
+
+static void __exit mcde_display_hdmi_exit(void)
+{
+	pr_info("%s\n", __func__);
+
+	mcde_display_driver_unregister(&hdmi_driver);
+}
+module_exit(mcde_display_hdmi_exit);
+
+MODULE_AUTHOR("Per Persson <per.xb.persson@stericsson.com>");
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("ST-Ericsson hdmi display driver");
diff --git a/drivers/video/mcde/display-generic_dsi.c b/drivers/video/mcde/display-generic_dsi.c
new file mode 100644
index 00000000000..9bb5babda5f
--- /dev/null
+++ b/drivers/video/mcde/display-generic_dsi.c
@@ -0,0 +1,300 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2010
+ *
+ * ST-Ericsson MCDE generic DCS display driver
+ *
+ * Author: Marcus Lorentzon <marcus.xm.lorentzon@stericsson.com>
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+
+#include <linux/kernel.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/gpio.h>
+#include <linux/err.h>
+
+#include <video/mcde_display.h>
+#include <video/mcde_display-generic_dsi.h>
+
+static int generic_platform_enable(struct mcde_display_device *dev)
+{
+	struct mcde_display_generic_platform_data *pdata =
+		dev->dev.platform_data;
+
+	dev_dbg(&dev->dev, "%s: Reset & power on generic display\n", __func__);
+
+	if (pdata->regulator) {
+		if (regulator_enable(pdata->regulator) < 0) {
+			dev_err(&dev->dev, "%s:Failed to enable regulator\n"
+				, __func__);
+			return -EINVAL;
+		}
+	}
+	if (pdata->reset_gpio)
+		gpio_set_value(pdata->reset_gpio, pdata->reset_high);
+	mdelay(pdata->reset_delay);
+	if (pdata->reset_gpio)
+		gpio_set_value(pdata->reset_gpio, !pdata->reset_high);
+
+	return 0;
+}
+
+static int generic_platform_disable(struct mcde_display_device *dev)
+{
+	struct mcde_display_generic_platform_data *pdata =
+		dev->dev.platform_data;
+
+	dev_dbg(&dev->dev, "%s:Reset & power off generic display\n", __func__);
+
+	if (pdata->regulator) {
+		if (regulator_disable(pdata->regulator) < 0) {
+			dev_err(&dev->dev, "%s:Failed to disable regulator\n"
+				, __func__);
+			return -EINVAL;
+		}
+	}
+	return 0;
+}
+
+static int generic_set_power_mode(struct mcde_display_device *ddev,
+	enum mcde_display_power_mode power_mode)
+{
+	int ret = 0;
+	struct mcde_display_generic_platform_data *pdata =
+		ddev->dev.platform_data;
+
+	dev_dbg(&ddev->dev, "%s:Set Power mode\n", __func__);
+
+	/* OFF -> STANDBY */
+	if (ddev->power_mode == MCDE_DISPLAY_PM_OFF &&
+		power_mode != MCDE_DISPLAY_PM_OFF) {
+
+		if (ddev->platform_enable) {
+			ret = ddev->platform_enable(ddev);
+			if (ret)
+				return ret;
+		}
+
+		ddev->power_mode = MCDE_DISPLAY_PM_STANDBY;
+	}
+
+	/* STANDBY -> ON */
+	if (ddev->power_mode == MCDE_DISPLAY_PM_STANDBY &&
+		power_mode == MCDE_DISPLAY_PM_ON) {
+
+		ret = mcde_dsi_dcs_write(ddev->chnl_state,
+		DCS_CMD_EXIT_SLEEP_MODE, NULL, 0);
+		if (ret)
+			return ret;
+
+		msleep(pdata->sleep_out_delay);
+
+		ret = mcde_dsi_dcs_write(ddev->chnl_state,
+			DCS_CMD_SET_DISPLAY_ON, NULL, 0);
+		if (ret)
+			return ret;
+
+		ddev->power_mode = MCDE_DISPLAY_PM_ON;
+		goto set_power_and_exit;
+	}
+	/* ON -> STANDBY */
+	else if (ddev->power_mode == MCDE_DISPLAY_PM_ON &&
+		power_mode <= MCDE_DISPLAY_PM_STANDBY) {
+		ret = mcde_dsi_dcs_write(ddev->chnl_state,
+			DCS_CMD_SET_DISPLAY_OFF, NULL, 0);
+		if (ret)
+			return ret;
+
+		ret = mcde_dsi_dcs_write(ddev->chnl_state,
+			DCS_CMD_ENTER_SLEEP_MODE, NULL, 0);
+		if (ret)
+			return ret;
+
+		ddev->power_mode = MCDE_DISPLAY_PM_STANDBY;
+	}
+
+	/* SLEEP -> OFF */
+	if (ddev->power_mode == MCDE_DISPLAY_PM_STANDBY &&
+		power_mode == MCDE_DISPLAY_PM_OFF) {
+		if (ddev->platform_disable) {
+			ret = ddev->platform_disable(ddev);
+			if (ret)
+				return ret;
+		}
+		ddev->power_mode = MCDE_DISPLAY_PM_OFF;
+	}
+
+set_power_and_exit:
+	mcde_chnl_set_power_mode(ddev->chnl_state, ddev->power_mode);
+
+	return ret;
+}
+
+static int __devinit generic_probe(struct mcde_display_device *dev)
+{
+	int ret = 0;
+	struct mcde_display_generic_platform_data *pdata =
+		dev->dev.platform_data;
+
+	if (pdata == NULL) {
+		dev_err(&dev->dev, "%s:Platform data missing\n", __func__);
+		return -EINVAL;
+	}
+
+	if (dev->port->type != MCDE_PORTTYPE_DSI) {
+		dev_err(&dev->dev,
+			"%s:Invalid port type %d\n",
+			__func__, dev->port->type);
+		return -EINVAL;
+	}
+
+	if (!dev->platform_enable && !dev->platform_disable) {
+		pdata->generic_platform_enable = true;
+		if (pdata->reset_gpio) {
+			ret = gpio_request(pdata->reset_gpio, NULL);
+			if (ret) {
+				dev_warn(&dev->dev,
+					"%s:Failed to request gpio %d\n",
+					__func__, pdata->reset_gpio);
+				goto gpio_request_failed;
+			}
+			gpio_direction_output(pdata->reset_gpio,
+				!pdata->reset_high);
+		}
+		if (pdata->regulator_id) {
+			pdata->regulator = regulator_get(NULL,
+				pdata->regulator_id);
+			if (IS_ERR(pdata->regulator)) {
+				ret = PTR_ERR(pdata->regulator);
+				dev_warn(&dev->dev,
+					"%s:Failed to get regulator '%s'\n",
+					__func__, pdata->regulator_id);
+				pdata->regulator = NULL;
+				goto regulator_get_failed;
+			}
+			regulator_set_voltage(pdata->regulator,
+					pdata->min_supply_voltage,
+					pdata->max_supply_voltage);
+			/*
+			* When u-boot has display a startup screen.
+			* U-boot has turned on display power however the
+			* regulator framework does not know about that
+			* This is the case here, the display driver has to
+			* enable the regulator for the display.
+			*/
+			if (dev->power_mode == MCDE_DISPLAY_PM_STANDBY) {
+				ret = regulator_enable(pdata->regulator);
+				if (ret < 0) {
+					dev_err(&dev->dev,
+					"%s:Failed to enable regulator\n"
+					, __func__);
+					goto regulator_enable_failed;
+				}
+			}
+		}
+	}
+
+	/* TODO: Remove when DSI send command uses interrupts */
+	dev->prepare_for_update = NULL;
+	dev->platform_enable = generic_platform_enable,
+	dev->platform_disable = generic_platform_disable,
+	dev->set_power_mode = generic_set_power_mode;
+
+	dev_info(&dev->dev, "Generic display probed\n");
+
+	goto out;
+regulator_enable_failed:
+regulator_get_failed:
+	if (pdata->generic_platform_enable && pdata->reset_gpio)
+		gpio_free(pdata->reset_gpio);
+gpio_request_failed:
+out:
+	return ret;
+}
+
+static int __devexit generic_remove(struct mcde_display_device *dev)
+{
+	struct mcde_display_generic_platform_data *pdata =
+		dev->dev.platform_data;
+
+	dev->set_power_mode(dev, MCDE_DISPLAY_PM_OFF);
+
+	if (!pdata->generic_platform_enable)
+		return 0;
+
+	if (pdata->regulator)
+		regulator_put(pdata->regulator);
+	if (pdata->reset_gpio) {
+		gpio_direction_input(pdata->reset_gpio);
+		gpio_free(pdata->reset_gpio);
+	}
+
+	return 0;
+}
+
+#if !defined(CONFIG_HAS_EARLYSUSPEND) && defined(CONFIG_PM)
+static int generic_resume(struct mcde_display_device *ddev)
+{
+	int ret;
+
+	/* set_power_mode will handle call platform_enable */
+	ret = ddev->set_power_mode(ddev, MCDE_DISPLAY_PM_STANDBY);
+	if (ret < 0)
+		dev_warn(&ddev->dev, "%s:Failed to resume display\n"
+			, __func__);
+	ddev->set_synchronized_update(ddev,
+					ddev->get_synchronized_update(ddev));
+	ddev->update(ddev);
+	return ret;
+}
+
+static int generic_suspend(struct mcde_display_device *ddev, pm_message_t state)
+{
+	int ret;
+
+	/* set_power_mode will handle call platform_disable */
+	ret = ddev->set_power_mode(ddev, MCDE_DISPLAY_PM_OFF);
+	if (ret < 0)
+		dev_warn(&ddev->dev, "%s:Failed to suspend display\n"
+			, __func__);
+	return ret;
+}
+#endif
+
+static struct mcde_display_driver generic_driver = {
+	.probe	= generic_probe,
+	.remove = generic_remove,
+#if !defined(CONFIG_HAS_EARLYSUSPEND) && defined(CONFIG_PM)
+	.suspend = generic_suspend,
+	.resume = generic_resume,
+#else
+	.suspend = NULL,
+	.resume = NULL,
+#endif
+	.driver = {
+		.name	= "mcde_disp_generic",
+	},
+};
+
+/* Module init */
+static int __init mcde_display_generic_init(void)
+{
+	pr_info("%s\n", __func__);
+
+	return mcde_display_driver_register(&generic_driver);
+}
+module_init(mcde_display_generic_init);
+
+static void __exit mcde_display_generic_exit(void)
+{
+	pr_info("%s\n", __func__);
+
+	mcde_display_driver_unregister(&generic_driver);
+}
+module_exit(mcde_display_generic_exit);
+
+MODULE_AUTHOR("Marcus Lorentzon <marcus.xm.lorentzon@stericsson.com>");
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("ST-Ericsson MCDE generic DCS display driver");
diff --git a/drivers/video/mcde/display-sony_sy35560_dsi.c b/drivers/video/mcde/display-sony_sy35560_dsi.c
new file mode 100644
index 00000000000..28a36b98c77
--- /dev/null
+++ b/drivers/video/mcde/display-sony_sy35560_dsi.c
@@ -0,0 +1,239 @@
+/*
+ * Copyright (C) ST-Ericsson AB 2010
+ *
+ * ST-Ericsson MCDE Sony sy35560 DCS display driver
+ *
+ * Author: Marcus Lorentzon <marcus.xm.lorentzon@stericsson.com>
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+
+#include <linux/kernel.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/gpio.h>
+#include <linux/err.h>
+
+#include <video/mcde_dss.h>
+#include <video/mcde_display.h>
+#include <video/mcde_display-sony_sy35560_dsi.h>
+
+static int counter = 1;
+
+/*
+ * Work queue function for ESD check
+ *
+ * read display registers and perform power off/on/init sequence
+ * if register value indicate HW failure
+ */
+static void sony_sy35560_esd_work_fn(struct work_struct *work)
+{
+	u8  value;
+	struct sony_sy35560_device *dev = container_of(work,
+		struct sony_sy35560_device,
+		esd_work.work);
+
+
+	mcde_dsi_dcs_write(((struct mcde_display_device *)dev)->chnl_state,
+		0x00, &value, 1);
+	pr_info("%s: %d) Read register 0x00, value 0x%.2X\n",
+		__func__, counter, value);
+
+	/* for now there are no registers available for ESD status check
+	 * just perform power off/on/init every 4th work queue task
+	 */
+
+	if (counter % 4 == 0) {
+		bool vsync_enabled;
+
+		pr_info("%s:Resetting display....", __func__);
+
+		/* get current display state */
+		vsync_enabled = ((struct mcde_display_device *)dev)->
+			get_synchronized_update(
+			(struct mcde_display_device *)dev);
+
+		/* wait a while to make sure finish refresh before resetting */
+		mdelay(10);
+
+		((struct mcde_display_device *)dev)->set_power_mode(
+			(struct mcde_display_device *)dev,
+			MCDE_DISPLAY_PM_OFF);
+		((struct mcde_display_device *)dev)->set_power_mode(
+			(struct mcde_display_device *)dev,
+			MCDE_DISPLAY_PM_STANDBY);
+
+		if (vsync_enabled) {
+			u8 m = 0;
+			mcde_dsi_dcs_write(
+				((struct mcde_display_device *)dev)->chnl_state,
+				DCS_CMD_SET_TEAR_ON, &m, 1);
+			mcde_dss_set_synchronized_update(
+				(struct mcde_display_device *)dev, 0);
+
+			/* refresh display */
+			((struct mcde_display_device *)dev)->update(
+				(struct mcde_display_device *)dev);
+
+			mcde_dss_set_synchronized_update(
+				(struct mcde_display_device *)dev, 1);
+		} else {
+			/* need to wait a while before turning on the display */
+			mdelay(5);
+
+			((struct mcde_display_device *)dev)->set_power_mode(
+				(struct mcde_display_device *)dev,
+				MCDE_DISPLAY_PM_ON);
+		}
+	}
+	counter++;
+
+	queue_delayed_work(((struct sony_sy35560_device *)dev)->esd_wq,
+		&(((struct sony_sy35560_device *)dev)->esd_work),
+		SONY_SY35560_ESD_CHECK_PERIOD);
+}
+
+static int __devinit sony_sy35560_probe(struct mcde_display_device *dev)
+{
+	struct mcde_chnl_state *chnl;
+
+	u32 id;
+	u8  id1, id2, id3;
+	int len = 1;
+	int ret = 0;
+	int readret = 0;
+
+	/* create a workqueue for ESD status check */
+	((struct sony_sy35560_device *)dev)->esd_wq =
+		create_singlethread_workqueue("sony_esd");
+	if (((struct sony_sy35560_device *)dev)->esd_wq == NULL) {
+		dev_warn(&dev->dev, "can't create ESD workqueue\n");
+		ret = -ENOMEM;
+		goto out;
+	}
+	INIT_DELAYED_WORK(&(((struct sony_sy35560_device *)dev)->esd_work),
+		sony_sy35560_esd_work_fn);
+
+	/* Acquire MCDE resources */
+	chnl = mcde_chnl_get(dev->chnl_id, dev->fifo, dev->port);
+	if (IS_ERR(chnl)) {
+		ret = PTR_ERR(chnl);
+		dev_warn(&dev->dev, "Failed to acquire MCDE channel\n");
+		goto out;
+	}
+
+	/* plugnplay: use registers DAh, DBh and DCh to detect display */
+	readret = mcde_dsi_dcs_read(chnl, 0xDA, &id1, &len);
+	if (!readret)
+		readret = mcde_dsi_dcs_read(chnl, 0xDB, &id2, &len);
+	if (!readret)
+		readret = mcde_dsi_dcs_read(chnl, 0xDC, &id3, &len);
+
+	if (readret) {
+		dev_info(&dev->dev,
+			"mcde_dsi_dcs_read failed to read display ID\n");
+		goto read_fail;
+	}
+
+	id = (id3 << 16) | (id2 << 8) | id1;
+
+	switch (id) {
+	case 0x018101:
+		dev_info(&dev->dev,
+			"Cygnus Cut1 display (ID 0x%.6X) probed\n", id);
+		/* add display specific initialization here */
+		break;
+
+	case 0x028101:
+		dev_info(&dev->dev,
+			"Cygnus Cut2 display (ID 0x%.6X) probed\n", id);
+		/* add display specific initialization here */
+		break;
+
+	default:
+		dev_info(&dev->dev,
+			"Display with id 0x%.6X probed\n", id);
+		break;
+	}
+
+read_fail:
+	/* close  MCDE channel */
+	mcde_chnl_put(chnl);
+	chnl = NULL;
+out:
+	return ret;
+}
+
+static int __devexit sony_sy35560_remove(struct mcde_display_device *dev)
+{
+	dev->set_power_mode(dev, MCDE_DISPLAY_PM_OFF);
+
+	cancel_delayed_work(&(((struct sony_sy35560_device *)dev)->esd_work));
+	destroy_workqueue(((struct sony_sy35560_device *)dev)->esd_wq);
+	return 0;
+}
+
+static int sony_sy35560_resume(struct mcde_display_device *ddev)
+{
+	int ret;
+	/* set_power_mode will handle call platform_enable */
+	ret = ddev->set_power_mode(ddev, MCDE_DISPLAY_PM_STANDBY);
+	if (ret < 0)
+		dev_warn(&ddev->dev, "%s:Failed to resume display\n"
+			, __func__);
+
+	queue_delayed_work(((struct sony_sy35560_device *)ddev)->esd_wq,
+		&(((struct sony_sy35560_device *)ddev)->esd_work),
+		SONY_SY35560_ESD_CHECK_PERIOD);
+
+	return ret;
+}
+
+static int sony_sy35560_suspend(struct mcde_display_device *ddev,
+			pm_message_t state)
+{
+	int ret;
+	/* set_power_mode will handle call platform_disable */
+	ret = ddev->set_power_mode(ddev, MCDE_DISPLAY_PM_OFF);
+	if (ret < 0)
+		dev_warn(&ddev->dev, "%s:Failed to suspend display\n"
+			, __func__);
+
+	cancel_delayed_work(&(((struct sony_sy35560_device *)ddev)->esd_work));
+
+	return ret;
+}
+
+static struct mcde_display_driver sony_sy35560_driver = {
+	.probe	= sony_sy35560_probe,
+	.remove = sony_sy35560_remove,
+	.suspend = sony_sy35560_suspend,
+	.resume = sony_sy35560_resume,
+	.driver = {
+		.name	= "mcde_disp_sony",
+	},
+};
+
+/* Module init */
+
+static int __init mcde_display_sony_sy35560_init(void)
+{
+	pr_info("%s\n", __func__);
+
+	return mcde_display_driver_register(&sony_sy35560_driver);
+}
+module_init(mcde_display_sony_sy35560_init);
+
+static void __exit mcde_display_sony_sy35560_exit(void)
+{
+	pr_info("%s\n", __func__);
+
+	mcde_display_driver_unregister(&sony_sy35560_driver);
+}
+module_exit(mcde_display_sony_sy35560_exit);
+
+MODULE_AUTHOR("Marcus Lorentzon <marcus.xm.lorentzon@stericsson.com>");
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("ST-Ericsson MCDE Sony sy35560 DCS display driver");
+
diff --git a/drivers/video/mcde/display-vuib500-dpi.c b/drivers/video/mcde/display-vuib500-dpi.c
new file mode 100644
index 00000000000..211c04e5070
--- /dev/null
+++ b/drivers/video/mcde/display-vuib500-dpi.c
@@ -0,0 +1,218 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2010
+ *
+ * ST-Ericsson MCDE DPI display driver
+ * The VUIB500 is an user interface board the can be attached to an HREF. It
+ * supports the DPI pixel interface and converts this to an analog VGA signal,
+ * which can be connected to a monitor using a DSUB connector. The VUIB board
+ * uses an external power supply of 5V.
+ *
+ * Author: Marcel Tunnissen <marcel.tuennissen@stericsson.com>
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+
+#include <linux/kernel.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/gpio.h>
+
+#include <video/mcde_display.h>
+#include <video/mcde_display-vuib500-dpi.h>
+
+#define DPI_DISP_TRACE	dev_dbg(&ddev->dev, "%s\n", __func__)
+
+static int try_video_mode(struct mcde_display_device *ddev,
+				struct mcde_video_mode *video_mode);
+static int set_video_mode(struct mcde_display_device *ddev,
+				struct mcde_video_mode *video_mode);
+
+static int __devinit dpi_display_probe(struct mcde_display_device *ddev)
+{
+	int ret = 0;
+	struct mcde_display_dpi_platform_data *pdata = ddev->dev.platform_data;
+	DPI_DISP_TRACE;
+
+	if (pdata == NULL) {
+		dev_err(&ddev->dev, "%s:Platform data missing\n", __func__);
+		ret = -EINVAL;
+		goto no_pdata;
+	}
+
+	if (ddev->port->type != MCDE_PORTTYPE_DPI) {
+		dev_err(&ddev->dev,
+			"%s:Invalid port type %d\n",
+			__func__, ddev->port->type);
+		ret = -EINVAL;
+		goto invalid_port_type;
+	}
+
+	ddev->try_video_mode = try_video_mode;
+	ddev->set_video_mode = set_video_mode;
+	ddev->prepare_for_update = NULL;
+	dev_info(&ddev->dev, "DPI display probed\n");
+
+	goto out;
+invalid_port_type:
+no_pdata:
+out:
+	return ret;
+}
+
+static int __devexit dpi_display_remove(struct mcde_display_device *ddev)
+{
+	DPI_DISP_TRACE;
+
+	ddev->set_power_mode(ddev, MCDE_DISPLAY_PM_OFF);
+
+	return 0;
+}
+
+static int dpi_display_resume(struct mcde_display_device *ddev)
+{
+	int ret;
+	DPI_DISP_TRACE;
+
+	/* set_power_mode will handle call platform_enable */
+	ret = ddev->set_power_mode(ddev, MCDE_DISPLAY_PM_STANDBY);
+	if (ret < 0)
+		dev_warn(&ddev->dev, "%s:Failed to resume display\n"
+			, __func__);
+	return ret;
+}
+
+static int dpi_display_suspend(struct mcde_display_device *ddev,
+							pm_message_t state)
+{
+	int ret;
+	DPI_DISP_TRACE;
+
+	/* set_power_mode will handle call platform_disable */
+	ret = ddev->set_power_mode(ddev, MCDE_DISPLAY_PM_OFF);
+	if (ret < 0)
+		dev_warn(&ddev->dev, "%s:Failed to suspend display\n"
+			, __func__);
+	return ret;
+}
+
+static void print_vmode(struct mcde_video_mode *vmode)
+{
+	pr_debug("resolution: %dx%d\n", vmode->xres, vmode->yres);
+	pr_debug("  pixclock: %d\n",    vmode->pixclock);
+	pr_debug("       hbp: %d\n",    vmode->hbp);
+	pr_debug("       hfp: %d\n",    vmode->hfp);
+	pr_debug("       hsw: %d\n",    vmode->hsw);
+	pr_debug("       vbp: %d\n",    vmode->vbp1);
+	pr_debug("       vfp: %d\n",    vmode->vfp1);
+	pr_debug("       vsw: %d\n",    vmode->vsw);
+	pr_debug("interlaced: %s\n", vmode->interlaced ? "true" : "false");
+}
+
+/* Taken from the programmed value of the LCD clock in PRCMU */
+#define PIX_CLK_FREQ		25000000
+#define VMODE_XRES		640
+#define VMODE_YRES		480
+
+static int try_video_mode(
+	struct mcde_display_device *ddev, struct mcde_video_mode *video_mode)
+{
+	int res = -EINVAL;
+	DPI_DISP_TRACE;
+
+	if (ddev == NULL || video_mode == NULL) {
+		dev_warn(&ddev->dev, "%s:ddev = NULL or video_mode = NULL\n",
+			__func__);
+		return res;
+	}
+
+	if (video_mode->xres == VMODE_XRES && video_mode->yres == VMODE_YRES) {
+		video_mode->hbp = 40;
+		video_mode->hfp = 8;
+		video_mode->hsw = 96;
+		video_mode->vbp1 = 25;
+		video_mode->vfp1 = 2;
+		video_mode->vbp2 = 0;
+		video_mode->vfp2 = 0;
+		video_mode->vsw = 2;
+		/*
+		 * The pixclock setting is not used within MCDE. The clock is
+		 * setup elsewhere. But the pixclock value is visible in user
+		 * space.
+		 */
+		video_mode->pixclock =	(int) (1e+12 * (1.0 / PIX_CLK_FREQ));
+		res = 0;
+	} /* TODO: add more supported resolutions here */
+	video_mode->interlaced = false;
+
+	if (res == 0)
+		print_vmode(video_mode);
+	else
+		dev_warn(&ddev->dev,
+			"%s:Failed to find video mode x=%d, y=%d\n",
+			__func__, video_mode->xres, video_mode->yres);
+
+	return res;
+
+}
+
+static int set_video_mode(
+	struct mcde_display_device *ddev, struct mcde_video_mode *video_mode)
+{
+	int res;
+	DPI_DISP_TRACE;
+
+	if (ddev == NULL || video_mode == NULL) {
+		dev_warn(&ddev->dev, "%s:ddev = NULL or video_mode = NULL\n",
+			__func__);
+		return -EINVAL;
+	}
+	if (video_mode->xres != VMODE_XRES || video_mode->yres != VMODE_YRES) {
+		dev_warn(&ddev->dev, "%s:Failed to set video mode x=%d, y=%d\n",
+			__func__, video_mode->xres, video_mode->yres);
+		return -EINVAL;
+	}
+	ddev->video_mode = *video_mode;
+	print_vmode(video_mode);
+
+	res = mcde_chnl_set_video_mode(ddev->chnl_state, &ddev->video_mode);
+	if (res < 0) {
+		dev_warn(&ddev->dev, "%s:Failed to set video mode on channel\n",
+			__func__);
+
+	}
+	/* notify mcde display driver about updated video mode */
+	ddev->update_flags |= UPDATE_FLAG_VIDEO_MODE;
+	return res;
+}
+
+static struct mcde_display_driver dpi_display_driver = {
+	.probe	= dpi_display_probe,
+	.remove = dpi_display_remove,
+	.suspend = dpi_display_suspend,
+	.resume = dpi_display_resume,
+	.driver = {
+		.name	= "mcde_display_dpi",
+	},
+};
+
+/* Module init */
+static int __init mcde_dpi_display_init(void)
+{
+	pr_info("%s\n", __func__);
+
+	return mcde_display_driver_register(&dpi_display_driver);
+}
+module_init(mcde_dpi_display_init);
+
+static void __exit mcde_dpi_display_exit(void)
+{
+	pr_info("%s\n", __func__);
+
+	mcde_display_driver_unregister(&dpi_display_driver);
+}
+module_exit(mcde_dpi_display_exit);
+
+MODULE_AUTHOR("Marcel Tunnissen <marcel.tuennissen@stericsson.com>");
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("ST-Ericsson MCDE DPI display driver fro VUIB500 display");
diff --git a/drivers/video/mcde/dsilink_regs.h b/drivers/video/mcde/dsilink_regs.h
new file mode 100644
index 00000000000..102d4fb0a56
--- /dev/null
+++ b/drivers/video/mcde/dsilink_regs.h
@@ -0,0 +1,2032 @@
+
+#define DSI_VAL2REG(__reg, __fld, __val) \
+	(((__val) << __reg##_##__fld##_SHIFT) & __reg##_##__fld##_MASK)
+#define DSI_REG2VAL(__reg, __fld, __val) \
+	(((__val) & __reg##_##__fld##_MASK) >> __reg##_##__fld##_SHIFT)
+
+#define DSI_MCTL_INTEGRATION_MODE 0x00000000
+#define DSI_MCTL_INTEGRATION_MODE_INT_MODE_EN_SHIFT 0
+#define DSI_MCTL_INTEGRATION_MODE_INT_MODE_EN_MASK 0x00000001
+#define DSI_MCTL_INTEGRATION_MODE_INT_MODE_EN(__x) \
+	DSI_VAL2REG(DSI_MCTL_INTEGRATION_MODE, INT_MODE_EN, __x)
+#define DSI_MCTL_MAIN_DATA_CTL 0x00000004
+#define DSI_MCTL_MAIN_DATA_CTL_LINK_EN_SHIFT 0
+#define DSI_MCTL_MAIN_DATA_CTL_LINK_EN_MASK 0x00000001
+#define DSI_MCTL_MAIN_DATA_CTL_LINK_EN(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_DATA_CTL, LINK_EN, __x)
+#define DSI_MCTL_MAIN_DATA_CTL_IF1_MODE_SHIFT 1
+#define DSI_MCTL_MAIN_DATA_CTL_IF1_MODE_MASK 0x00000002
+#define DSI_MCTL_MAIN_DATA_CTL_IF1_MODE_CMD 0
+#define DSI_MCTL_MAIN_DATA_CTL_IF1_MODE_VID 1
+#define DSI_MCTL_MAIN_DATA_CTL_IF1_MODE_ENUM(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_DATA_CTL, IF1_MODE, \
+	DSI_MCTL_MAIN_DATA_CTL_IF1_MODE_##__x)
+#define DSI_MCTL_MAIN_DATA_CTL_IF1_MODE(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_DATA_CTL, IF1_MODE, __x)
+#define DSI_MCTL_MAIN_DATA_CTL_VID_EN_SHIFT 2
+#define DSI_MCTL_MAIN_DATA_CTL_VID_EN_MASK 0x00000004
+#define DSI_MCTL_MAIN_DATA_CTL_VID_EN(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_DATA_CTL, VID_EN, __x)
+#define DSI_MCTL_MAIN_DATA_CTL_TVG_SEL_SHIFT 3
+#define DSI_MCTL_MAIN_DATA_CTL_TVG_SEL_MASK 0x00000008
+#define DSI_MCTL_MAIN_DATA_CTL_TVG_SEL(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_DATA_CTL, TVG_SEL, __x)
+#define DSI_MCTL_MAIN_DATA_CTL_TBG_SEL_SHIFT 4
+#define DSI_MCTL_MAIN_DATA_CTL_TBG_SEL_MASK 0x00000010
+#define DSI_MCTL_MAIN_DATA_CTL_TBG_SEL(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_DATA_CTL, TBG_SEL, __x)
+#define DSI_MCTL_MAIN_DATA_CTL_IF1_TE_EN_SHIFT 5
+#define DSI_MCTL_MAIN_DATA_CTL_IF1_TE_EN_MASK 0x00000020
+#define DSI_MCTL_MAIN_DATA_CTL_IF1_TE_EN(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_DATA_CTL, IF1_TE_EN, __x)
+#define DSI_MCTL_MAIN_DATA_CTL_IF2_TE_EN_SHIFT 6
+#define DSI_MCTL_MAIN_DATA_CTL_IF2_TE_EN_MASK 0x00000040
+#define DSI_MCTL_MAIN_DATA_CTL_IF2_TE_EN(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_DATA_CTL, IF2_TE_EN, __x)
+#define DSI_MCTL_MAIN_DATA_CTL_REG_TE_EN_SHIFT 7
+#define DSI_MCTL_MAIN_DATA_CTL_REG_TE_EN_MASK 0x00000080
+#define DSI_MCTL_MAIN_DATA_CTL_REG_TE_EN(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_DATA_CTL, REG_TE_EN, __x)
+#define DSI_MCTL_MAIN_DATA_CTL_READ_EN_SHIFT 8
+#define DSI_MCTL_MAIN_DATA_CTL_READ_EN_MASK 0x00000100
+#define DSI_MCTL_MAIN_DATA_CTL_READ_EN(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_DATA_CTL, READ_EN, __x)
+#define DSI_MCTL_MAIN_DATA_CTL_BTA_EN_SHIFT 9
+#define DSI_MCTL_MAIN_DATA_CTL_BTA_EN_MASK 0x00000200
+#define DSI_MCTL_MAIN_DATA_CTL_BTA_EN(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_DATA_CTL, BTA_EN, __x)
+#define DSI_MCTL_MAIN_DATA_CTL_DISP_GEN_ECC_SHIFT 10
+#define DSI_MCTL_MAIN_DATA_CTL_DISP_GEN_ECC_MASK 0x00000400
+#define DSI_MCTL_MAIN_DATA_CTL_DISP_GEN_ECC(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_DATA_CTL, DISP_GEN_ECC, __x)
+#define DSI_MCTL_MAIN_DATA_CTL_DISP_GEN_CHECKSUM_SHIFT 11
+#define DSI_MCTL_MAIN_DATA_CTL_DISP_GEN_CHECKSUM_MASK 0x00000800
+#define DSI_MCTL_MAIN_DATA_CTL_DISP_GEN_CHECKSUM(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_DATA_CTL, DISP_GEN_CHECKSUM, __x)
+#define DSI_MCTL_MAIN_DATA_CTL_HOST_EOT_GEN_SHIFT 12
+#define DSI_MCTL_MAIN_DATA_CTL_HOST_EOT_GEN_MASK 0x00001000
+#define DSI_MCTL_MAIN_DATA_CTL_HOST_EOT_GEN(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_DATA_CTL, HOST_EOT_GEN, __x)
+#define DSI_MCTL_MAIN_DATA_CTL_DISP_EOT_GEN_SHIFT 13
+#define DSI_MCTL_MAIN_DATA_CTL_DISP_EOT_GEN_MASK 0x00002000
+#define DSI_MCTL_MAIN_DATA_CTL_DISP_EOT_GEN(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_DATA_CTL, DISP_EOT_GEN, __x)
+#define DSI_MCTL_MAIN_DATA_CTL_DLX_REMAP_EN_SHIFT 14
+#define DSI_MCTL_MAIN_DATA_CTL_DLX_REMAP_EN_MASK 0x00004000
+#define DSI_MCTL_MAIN_DATA_CTL_DLX_REMAP_EN(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_DATA_CTL, DLX_REMAP_EN, __x)
+#define DSI_MCTL_MAIN_DATA_CTL_TE_POLLING_EN_SHIFT 15
+#define DSI_MCTL_MAIN_DATA_CTL_TE_POLLING_EN_MASK 0x00008000
+#define DSI_MCTL_MAIN_DATA_CTL_TE_POLLING_EN(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_DATA_CTL, TE_POLLING_EN, __x)
+#define DSI_MCTL_MAIN_PHY_CTL 0x00000008
+#define DSI_MCTL_MAIN_PHY_CTL_LANE2_EN_SHIFT 0
+#define DSI_MCTL_MAIN_PHY_CTL_LANE2_EN_MASK 0x00000001
+#define DSI_MCTL_MAIN_PHY_CTL_LANE2_EN(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_PHY_CTL, LANE2_EN, __x)
+#define DSI_MCTL_MAIN_PHY_CTL_FORCE_STOP_MODE_SHIFT 1
+#define DSI_MCTL_MAIN_PHY_CTL_FORCE_STOP_MODE_MASK 0x00000002
+#define DSI_MCTL_MAIN_PHY_CTL_FORCE_STOP_MODE(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_PHY_CTL, FORCE_STOP_MODE, __x)
+#define DSI_MCTL_MAIN_PHY_CTL_CLK_CONTINUOUS_SHIFT 2
+#define DSI_MCTL_MAIN_PHY_CTL_CLK_CONTINUOUS_MASK 0x00000004
+#define DSI_MCTL_MAIN_PHY_CTL_CLK_CONTINUOUS(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_PHY_CTL, CLK_CONTINUOUS, __x)
+#define DSI_MCTL_MAIN_PHY_CTL_CLK_ULPM_EN_SHIFT 3
+#define DSI_MCTL_MAIN_PHY_CTL_CLK_ULPM_EN_MASK 0x00000008
+#define DSI_MCTL_MAIN_PHY_CTL_CLK_ULPM_EN(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_PHY_CTL, CLK_ULPM_EN, __x)
+#define DSI_MCTL_MAIN_PHY_CTL_DAT1_ULPM_EN_SHIFT 4
+#define DSI_MCTL_MAIN_PHY_CTL_DAT1_ULPM_EN_MASK 0x00000010
+#define DSI_MCTL_MAIN_PHY_CTL_DAT1_ULPM_EN(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_PHY_CTL, DAT1_ULPM_EN, __x)
+#define DSI_MCTL_MAIN_PHY_CTL_DAT2_ULPM_EN_SHIFT 5
+#define DSI_MCTL_MAIN_PHY_CTL_DAT2_ULPM_EN_MASK 0x00000020
+#define DSI_MCTL_MAIN_PHY_CTL_DAT2_ULPM_EN(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_PHY_CTL, DAT2_ULPM_EN, __x)
+#define DSI_MCTL_MAIN_PHY_CTL_WAIT_BURST_TIME_SHIFT 6
+#define DSI_MCTL_MAIN_PHY_CTL_WAIT_BURST_TIME_MASK 0x000003C0
+#define DSI_MCTL_MAIN_PHY_CTL_WAIT_BURST_TIME(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_PHY_CTL, WAIT_BURST_TIME, __x)
+#define DSI_MCTL_PLL_CTL 0x0000000C
+#define DSI_MCTL_PLL_CTL_PLL_MULT_SHIFT 0
+#define DSI_MCTL_PLL_CTL_PLL_MULT_MASK 0x000000FF
+#define DSI_MCTL_PLL_CTL_PLL_MULT(__x) \
+	DSI_VAL2REG(DSI_MCTL_PLL_CTL, PLL_MULT, __x)
+#define DSI_MCTL_PLL_CTL_PLL_OUT_DIV_SHIFT 8
+#define DSI_MCTL_PLL_CTL_PLL_OUT_DIV_MASK 0x00003F00
+#define DSI_MCTL_PLL_CTL_PLL_OUT_DIV(__x) \
+	DSI_VAL2REG(DSI_MCTL_PLL_CTL, PLL_OUT_DIV, __x)
+#define DSI_MCTL_PLL_CTL_PLL_IN_DIV_SHIFT 14
+#define DSI_MCTL_PLL_CTL_PLL_IN_DIV_MASK 0x0001C000
+#define DSI_MCTL_PLL_CTL_PLL_IN_DIV(__x) \
+	DSI_VAL2REG(DSI_MCTL_PLL_CTL, PLL_IN_DIV, __x)
+#define DSI_MCTL_PLL_CTL_PLL_SEL_DIV2_SHIFT 17
+#define DSI_MCTL_PLL_CTL_PLL_SEL_DIV2_MASK 0x00020000
+#define DSI_MCTL_PLL_CTL_PLL_SEL_DIV2(__x) \
+	DSI_VAL2REG(DSI_MCTL_PLL_CTL, PLL_SEL_DIV2, __x)
+#define DSI_MCTL_PLL_CTL_PLL_OUT_SEL_SHIFT 18
+#define DSI_MCTL_PLL_CTL_PLL_OUT_SEL_MASK 0x00040000
+#define DSI_MCTL_PLL_CTL_PLL_OUT_SEL_INT_PLL 0
+#define DSI_MCTL_PLL_CTL_PLL_OUT_SEL_SYS_PLL 1
+#define DSI_MCTL_PLL_CTL_PLL_OUT_SEL_ENUM(__x) \
+	DSI_VAL2REG(DSI_MCTL_PLL_CTL, PLL_OUT_SEL, \
+	DSI_MCTL_PLL_CTL_PLL_OUT_SEL_##__x)
+#define DSI_MCTL_PLL_CTL_PLL_OUT_SEL(__x) \
+	DSI_VAL2REG(DSI_MCTL_PLL_CTL, PLL_OUT_SEL, __x)
+#define DSI_MCTL_PLL_CTL_PLL_MASTER_SHIFT 31
+#define DSI_MCTL_PLL_CTL_PLL_MASTER_MASK 0x80000000
+#define DSI_MCTL_PLL_CTL_PLL_MASTER(__x) \
+	DSI_VAL2REG(DSI_MCTL_PLL_CTL, PLL_MASTER, __x)
+#define DSI_MCTL_LANE_STS 0x00000010
+#define DSI_MCTL_LANE_STS_CLKLANE_STATE_SHIFT 0
+#define DSI_MCTL_LANE_STS_CLKLANE_STATE_MASK 0x00000003
+#define DSI_MCTL_LANE_STS_CLKLANE_STATE_START 0
+#define DSI_MCTL_LANE_STS_CLKLANE_STATE_IDLE 1
+#define DSI_MCTL_LANE_STS_CLKLANE_STATE_HS 2
+#define DSI_MCTL_LANE_STS_CLKLANE_STATE_ULPM 3
+#define DSI_MCTL_LANE_STS_CLKLANE_STATE_ENUM(__x) \
+	DSI_VAL2REG(DSI_MCTL_LANE_STS, CLKLANE_STATE, \
+	DSI_MCTL_LANE_STS_CLKLANE_STATE_##__x)
+#define DSI_MCTL_LANE_STS_CLKLANE_STATE(__x) \
+	DSI_VAL2REG(DSI_MCTL_LANE_STS, CLKLANE_STATE, __x)
+#define DSI_MCTL_LANE_STS_DATLANE1_STATE_SHIFT 2
+#define DSI_MCTL_LANE_STS_DATLANE1_STATE_MASK 0x0000001C
+#define DSI_MCTL_LANE_STS_DATLANE1_STATE_START 0
+#define DSI_MCTL_LANE_STS_DATLANE1_STATE_IDLE 1
+#define DSI_MCTL_LANE_STS_DATLANE1_STATE_WRITE 2
+#define DSI_MCTL_LANE_STS_DATLANE1_STATE_ULPM 3
+#define DSI_MCTL_LANE_STS_DATLANE1_STATE_READ 4
+#define DSI_MCTL_LANE_STS_DATLANE1_STATE_ENUM(__x) \
+	DSI_VAL2REG(DSI_MCTL_LANE_STS, DATLANE1_STATE, \
+	DSI_MCTL_LANE_STS_DATLANE1_STATE_##__x)
+#define DSI_MCTL_LANE_STS_DATLANE1_STATE(__x) \
+	DSI_VAL2REG(DSI_MCTL_LANE_STS, DATLANE1_STATE, __x)
+#define DSI_MCTL_LANE_STS_DATLANE2_STATE_SHIFT 5
+#define DSI_MCTL_LANE_STS_DATLANE2_STATE_MASK 0x00000060
+#define DSI_MCTL_LANE_STS_DATLANE2_STATE_START 0
+#define DSI_MCTL_LANE_STS_DATLANE2_STATE_IDLE 1
+#define DSI_MCTL_LANE_STS_DATLANE2_STATE_WRITE 2
+#define DSI_MCTL_LANE_STS_DATLANE2_STATE_ULPM 3
+#define DSI_MCTL_LANE_STS_DATLANE2_STATE_ENUM(__x) \
+	DSI_VAL2REG(DSI_MCTL_LANE_STS, DATLANE2_STATE, \
+	DSI_MCTL_LANE_STS_DATLANE2_STATE_##__x)
+#define DSI_MCTL_LANE_STS_DATLANE2_STATE(__x) \
+	DSI_VAL2REG(DSI_MCTL_LANE_STS, DATLANE2_STATE, __x)
+#define DSI_MCTL_DPHY_TIMEOUT 0x00000014
+#define DSI_MCTL_DPHY_TIMEOUT_CLK_DIV_SHIFT 0
+#define DSI_MCTL_DPHY_TIMEOUT_CLK_DIV_MASK 0x0000000F
+#define DSI_MCTL_DPHY_TIMEOUT_CLK_DIV(__x) \
+	DSI_VAL2REG(DSI_MCTL_DPHY_TIMEOUT, CLK_DIV, __x)
+#define DSI_MCTL_DPHY_TIMEOUT_HSTX_TO_VAL_SHIFT 4
+#define DSI_MCTL_DPHY_TIMEOUT_HSTX_TO_VAL_MASK 0x0003FFF0
+#define DSI_MCTL_DPHY_TIMEOUT_HSTX_TO_VAL(__x) \
+	DSI_VAL2REG(DSI_MCTL_DPHY_TIMEOUT, HSTX_TO_VAL, __x)
+#define DSI_MCTL_DPHY_TIMEOUT_LPRX_TO_VAL_SHIFT 18
+#define DSI_MCTL_DPHY_TIMEOUT_LPRX_TO_VAL_MASK 0xFFFC0000
+#define DSI_MCTL_DPHY_TIMEOUT_LPRX_TO_VAL(__x) \
+	DSI_VAL2REG(DSI_MCTL_DPHY_TIMEOUT, LPRX_TO_VAL, __x)
+#define DSI_MCTL_ULPOUT_TIME 0x00000018
+#define DSI_MCTL_ULPOUT_TIME_CKLANE_ULPOUT_TIME_SHIFT 0
+#define DSI_MCTL_ULPOUT_TIME_CKLANE_ULPOUT_TIME_MASK 0x000001FF
+#define DSI_MCTL_ULPOUT_TIME_CKLANE_ULPOUT_TIME(__x) \
+	DSI_VAL2REG(DSI_MCTL_ULPOUT_TIME, CKLANE_ULPOUT_TIME, __x)
+#define DSI_MCTL_ULPOUT_TIME_DATA_ULPOUT_TIME_SHIFT 9
+#define DSI_MCTL_ULPOUT_TIME_DATA_ULPOUT_TIME_MASK 0x0003FE00
+#define DSI_MCTL_ULPOUT_TIME_DATA_ULPOUT_TIME(__x) \
+	DSI_VAL2REG(DSI_MCTL_ULPOUT_TIME, DATA_ULPOUT_TIME, __x)
+#define DSI_MCTL_DPHY_STATIC 0x0000001C
+#define DSI_MCTL_DPHY_STATIC_SWAP_PINS_CLK_SHIFT 0
+#define DSI_MCTL_DPHY_STATIC_SWAP_PINS_CLK_MASK 0x00000001
+#define DSI_MCTL_DPHY_STATIC_SWAP_PINS_CLK(__x) \
+	DSI_VAL2REG(DSI_MCTL_DPHY_STATIC, SWAP_PINS_CLK, __x)
+#define DSI_MCTL_DPHY_STATIC_HS_INVERT_CLK_SHIFT 1
+#define DSI_MCTL_DPHY_STATIC_HS_INVERT_CLK_MASK 0x00000002
+#define DSI_MCTL_DPHY_STATIC_HS_INVERT_CLK(__x) \
+	DSI_VAL2REG(DSI_MCTL_DPHY_STATIC, HS_INVERT_CLK, __x)
+#define DSI_MCTL_DPHY_STATIC_SWAP_PINS_DAT1_SHIFT 2
+#define DSI_MCTL_DPHY_STATIC_SWAP_PINS_DAT1_MASK 0x00000004
+#define DSI_MCTL_DPHY_STATIC_SWAP_PINS_DAT1(__x) \
+	DSI_VAL2REG(DSI_MCTL_DPHY_STATIC, SWAP_PINS_DAT1, __x)
+#define DSI_MCTL_DPHY_STATIC_HS_INVERT_DAT1_SHIFT 3
+#define DSI_MCTL_DPHY_STATIC_HS_INVERT_DAT1_MASK 0x00000008
+#define DSI_MCTL_DPHY_STATIC_HS_INVERT_DAT1(__x) \
+	DSI_VAL2REG(DSI_MCTL_DPHY_STATIC, HS_INVERT_DAT1, __x)
+#define DSI_MCTL_DPHY_STATIC_SWAP_PINS_DAT2_SHIFT 4
+#define DSI_MCTL_DPHY_STATIC_SWAP_PINS_DAT2_MASK 0x00000010
+#define DSI_MCTL_DPHY_STATIC_SWAP_PINS_DAT2(__x) \
+	DSI_VAL2REG(DSI_MCTL_DPHY_STATIC, SWAP_PINS_DAT2, __x)
+#define DSI_MCTL_DPHY_STATIC_HS_INVERT_DAT2_SHIFT 5
+#define DSI_MCTL_DPHY_STATIC_HS_INVERT_DAT2_MASK 0x00000020
+#define DSI_MCTL_DPHY_STATIC_HS_INVERT_DAT2(__x) \
+	DSI_VAL2REG(DSI_MCTL_DPHY_STATIC, HS_INVERT_DAT2, __x)
+#define DSI_MCTL_DPHY_STATIC_UI_X4_SHIFT 6
+#define DSI_MCTL_DPHY_STATIC_UI_X4_MASK 0x00000FC0
+#define DSI_MCTL_DPHY_STATIC_UI_X4(__x) \
+	DSI_VAL2REG(DSI_MCTL_DPHY_STATIC, UI_X4, __x)
+#define DSI_MCTL_MAIN_EN 0x00000020
+#define DSI_MCTL_MAIN_EN_PLL_START_SHIFT 0
+#define DSI_MCTL_MAIN_EN_PLL_START_MASK 0x00000001
+#define DSI_MCTL_MAIN_EN_PLL_START(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_EN, PLL_START, __x)
+#define DSI_MCTL_MAIN_EN_CKLANE_EN_SHIFT 3
+#define DSI_MCTL_MAIN_EN_CKLANE_EN_MASK 0x00000008
+#define DSI_MCTL_MAIN_EN_CKLANE_EN(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_EN, CKLANE_EN, __x)
+#define DSI_MCTL_MAIN_EN_DAT1_EN_SHIFT 4
+#define DSI_MCTL_MAIN_EN_DAT1_EN_MASK 0x00000010
+#define DSI_MCTL_MAIN_EN_DAT1_EN(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_EN, DAT1_EN, __x)
+#define DSI_MCTL_MAIN_EN_DAT2_EN_SHIFT 5
+#define DSI_MCTL_MAIN_EN_DAT2_EN_MASK 0x00000020
+#define DSI_MCTL_MAIN_EN_DAT2_EN(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_EN, DAT2_EN, __x)
+#define DSI_MCTL_MAIN_EN_CLKLANE_ULPM_REQ_SHIFT 6
+#define DSI_MCTL_MAIN_EN_CLKLANE_ULPM_REQ_MASK 0x00000040
+#define DSI_MCTL_MAIN_EN_CLKLANE_ULPM_REQ(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_EN, CLKLANE_ULPM_REQ, __x)
+#define DSI_MCTL_MAIN_EN_DAT1_ULPM_REQ_SHIFT 7
+#define DSI_MCTL_MAIN_EN_DAT1_ULPM_REQ_MASK 0x00000080
+#define DSI_MCTL_MAIN_EN_DAT1_ULPM_REQ(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_EN, DAT1_ULPM_REQ, __x)
+#define DSI_MCTL_MAIN_EN_DAT2_ULPM_REQ_SHIFT 8
+#define DSI_MCTL_MAIN_EN_DAT2_ULPM_REQ_MASK 0x00000100
+#define DSI_MCTL_MAIN_EN_DAT2_ULPM_REQ(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_EN, DAT2_ULPM_REQ, __x)
+#define DSI_MCTL_MAIN_EN_IF1_EN_SHIFT 9
+#define DSI_MCTL_MAIN_EN_IF1_EN_MASK 0x00000200
+#define DSI_MCTL_MAIN_EN_IF1_EN(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_EN, IF1_EN, __x)
+#define DSI_MCTL_MAIN_EN_IF2_EN_SHIFT 10
+#define DSI_MCTL_MAIN_EN_IF2_EN_MASK 0x00000400
+#define DSI_MCTL_MAIN_EN_IF2_EN(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_EN, IF2_EN, __x)
+#define DSI_MCTL_MAIN_STS 0x00000024
+#define DSI_MCTL_MAIN_STS_PLL_LOCK_SHIFT 0
+#define DSI_MCTL_MAIN_STS_PLL_LOCK_MASK 0x00000001
+#define DSI_MCTL_MAIN_STS_PLL_LOCK(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_STS, PLL_LOCK, __x)
+#define DSI_MCTL_MAIN_STS_CLKLANE_READY_SHIFT 1
+#define DSI_MCTL_MAIN_STS_CLKLANE_READY_MASK 0x00000002
+#define DSI_MCTL_MAIN_STS_CLKLANE_READY(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_STS, CLKLANE_READY, __x)
+#define DSI_MCTL_MAIN_STS_DAT1_READY_SHIFT 2
+#define DSI_MCTL_MAIN_STS_DAT1_READY_MASK 0x00000004
+#define DSI_MCTL_MAIN_STS_DAT1_READY(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_STS, DAT1_READY, __x)
+#define DSI_MCTL_MAIN_STS_DAT2_READY_SHIFT 3
+#define DSI_MCTL_MAIN_STS_DAT2_READY_MASK 0x00000008
+#define DSI_MCTL_MAIN_STS_DAT2_READY(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_STS, DAT2_READY, __x)
+#define DSI_MCTL_MAIN_STS_HSTX_TO_ERR_SHIFT 4
+#define DSI_MCTL_MAIN_STS_HSTX_TO_ERR_MASK 0x00000010
+#define DSI_MCTL_MAIN_STS_HSTX_TO_ERR(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_STS, HSTX_TO_ERR, __x)
+#define DSI_MCTL_MAIN_STS_LPRX_TO_ERR_SHIFT 5
+#define DSI_MCTL_MAIN_STS_LPRX_TO_ERR_MASK 0x00000020
+#define DSI_MCTL_MAIN_STS_LPRX_TO_ERR(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_STS, LPRX_TO_ERR, __x)
+#define DSI_MCTL_MAIN_STS_CRS_UNTERM_PCK_SHIFT 6
+#define DSI_MCTL_MAIN_STS_CRS_UNTERM_PCK_MASK 0x00000040
+#define DSI_MCTL_MAIN_STS_CRS_UNTERM_PCK(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_STS, CRS_UNTERM_PCK, __x)
+#define DSI_MCTL_MAIN_STS_VRS_UNTERM_PCK_SHIFT 7
+#define DSI_MCTL_MAIN_STS_VRS_UNTERM_PCK_MASK 0x00000080
+#define DSI_MCTL_MAIN_STS_VRS_UNTERM_PCK(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_STS, VRS_UNTERM_PCK, __x)
+#define DSI_MCTL_DPHY_ERR 0x00000028
+#define DSI_MCTL_DPHY_ERR_ERR_ESC_1_SHIFT 6
+#define DSI_MCTL_DPHY_ERR_ERR_ESC_1_MASK 0x00000040
+#define DSI_MCTL_DPHY_ERR_ERR_ESC_1(__x) \
+	DSI_VAL2REG(DSI_MCTL_DPHY_ERR, ERR_ESC_1, __x)
+#define DSI_MCTL_DPHY_ERR_ERR_ESC_2_SHIFT 7
+#define DSI_MCTL_DPHY_ERR_ERR_ESC_2_MASK 0x00000080
+#define DSI_MCTL_DPHY_ERR_ERR_ESC_2(__x) \
+	DSI_VAL2REG(DSI_MCTL_DPHY_ERR, ERR_ESC_2, __x)
+#define DSI_MCTL_DPHY_ERR_ERR_SYNCESC_1_SHIFT 8
+#define DSI_MCTL_DPHY_ERR_ERR_SYNCESC_1_MASK 0x00000100
+#define DSI_MCTL_DPHY_ERR_ERR_SYNCESC_1(__x) \
+	DSI_VAL2REG(DSI_MCTL_DPHY_ERR, ERR_SYNCESC_1, __x)
+#define DSI_MCTL_DPHY_ERR_ERR_SYNCESC_2_SHIFT 9
+#define DSI_MCTL_DPHY_ERR_ERR_SYNCESC_2_MASK 0x00000200
+#define DSI_MCTL_DPHY_ERR_ERR_SYNCESC_2(__x) \
+	DSI_VAL2REG(DSI_MCTL_DPHY_ERR, ERR_SYNCESC_2, __x)
+#define DSI_MCTL_DPHY_ERR_ERR_CONTROL_1_SHIFT 10
+#define DSI_MCTL_DPHY_ERR_ERR_CONTROL_1_MASK 0x00000400
+#define DSI_MCTL_DPHY_ERR_ERR_CONTROL_1(__x) \
+	DSI_VAL2REG(DSI_MCTL_DPHY_ERR, ERR_CONTROL_1, __x)
+#define DSI_MCTL_DPHY_ERR_ERR_CONTROL_2_SHIFT 11
+#define DSI_MCTL_DPHY_ERR_ERR_CONTROL_2_MASK 0x00000800
+#define DSI_MCTL_DPHY_ERR_ERR_CONTROL_2(__x) \
+	DSI_VAL2REG(DSI_MCTL_DPHY_ERR, ERR_CONTROL_2, __x)
+#define DSI_MCTL_DPHY_ERR_ERR_CONT_LP0_1_SHIFT 12
+#define DSI_MCTL_DPHY_ERR_ERR_CONT_LP0_1_MASK 0x00001000
+#define DSI_MCTL_DPHY_ERR_ERR_CONT_LP0_1(__x) \
+	DSI_VAL2REG(DSI_MCTL_DPHY_ERR, ERR_CONT_LP0_1, __x)
+#define DSI_MCTL_DPHY_ERR_ERR_CONT_LP0_2_SHIFT 13
+#define DSI_MCTL_DPHY_ERR_ERR_CONT_LP0_2_MASK 0x00002000
+#define DSI_MCTL_DPHY_ERR_ERR_CONT_LP0_2(__x) \
+	DSI_VAL2REG(DSI_MCTL_DPHY_ERR, ERR_CONT_LP0_2, __x)
+#define DSI_MCTL_DPHY_ERR_ERR_CONT_LP1_1_SHIFT 14
+#define DSI_MCTL_DPHY_ERR_ERR_CONT_LP1_1_MASK 0x00004000
+#define DSI_MCTL_DPHY_ERR_ERR_CONT_LP1_1(__x) \
+	DSI_VAL2REG(DSI_MCTL_DPHY_ERR, ERR_CONT_LP1_1, __x)
+#define DSI_MCTL_DPHY_ERR_ERR_CONT_LP1_2_SHIFT 15
+#define DSI_MCTL_DPHY_ERR_ERR_CONT_LP1_2_MASK 0x00008000
+#define DSI_MCTL_DPHY_ERR_ERR_CONT_LP1_2(__x) \
+	DSI_VAL2REG(DSI_MCTL_DPHY_ERR, ERR_CONT_LP1_2, __x)
+#define DSI_INT_VID_RDDATA 0x00000030
+#define DSI_INT_VID_RDDATA_IF_DATA_SHIFT 0
+#define DSI_INT_VID_RDDATA_IF_DATA_MASK 0x0000FFFF
+#define DSI_INT_VID_RDDATA_IF_DATA(__x) \
+	DSI_VAL2REG(DSI_INT_VID_RDDATA, IF_DATA, __x)
+#define DSI_INT_VID_RDDATA_IF_VALID_SHIFT 16
+#define DSI_INT_VID_RDDATA_IF_VALID_MASK 0x00010000
+#define DSI_INT_VID_RDDATA_IF_VALID(__x) \
+	DSI_VAL2REG(DSI_INT_VID_RDDATA, IF_VALID, __x)
+#define DSI_INT_VID_RDDATA_IF_START_SHIFT 17
+#define DSI_INT_VID_RDDATA_IF_START_MASK 0x00020000
+#define DSI_INT_VID_RDDATA_IF_START(__x) \
+	DSI_VAL2REG(DSI_INT_VID_RDDATA, IF_START, __x)
+#define DSI_INT_VID_RDDATA_IF_FRAME_SYNC_SHIFT 18
+#define DSI_INT_VID_RDDATA_IF_FRAME_SYNC_MASK 0x00040000
+#define DSI_INT_VID_RDDATA_IF_FRAME_SYNC(__x) \
+	DSI_VAL2REG(DSI_INT_VID_RDDATA, IF_FRAME_SYNC, __x)
+#define DSI_INT_VID_GNT 0x00000034
+#define DSI_INT_VID_GNT_IF_STALL_SHIFT 0
+#define DSI_INT_VID_GNT_IF_STALL_MASK 0x00000001
+#define DSI_INT_VID_GNT_IF_STALL(__x) \
+	DSI_VAL2REG(DSI_INT_VID_GNT, IF_STALL, __x)
+#define DSI_INT_CMD_RDDATA 0x00000038
+#define DSI_INT_CMD_RDDATA_IF_DATA_SHIFT 0
+#define DSI_INT_CMD_RDDATA_IF_DATA_MASK 0x0000FFFF
+#define DSI_INT_CMD_RDDATA_IF_DATA(__x) \
+	DSI_VAL2REG(DSI_INT_CMD_RDDATA, IF_DATA, __x)
+#define DSI_INT_CMD_RDDATA_IF_VALID_SHIFT 16
+#define DSI_INT_CMD_RDDATA_IF_VALID_MASK 0x00010000
+#define DSI_INT_CMD_RDDATA_IF_VALID(__x) \
+	DSI_VAL2REG(DSI_INT_CMD_RDDATA, IF_VALID, __x)
+#define DSI_INT_CMD_RDDATA_IF_START_SHIFT 17
+#define DSI_INT_CMD_RDDATA_IF_START_MASK 0x00020000
+#define DSI_INT_CMD_RDDATA_IF_START(__x) \
+	DSI_VAL2REG(DSI_INT_CMD_RDDATA, IF_START, __x)
+#define DSI_INT_CMD_RDDATA_IF_FRAME_SYNC_SHIFT 18
+#define DSI_INT_CMD_RDDATA_IF_FRAME_SYNC_MASK 0x00040000
+#define DSI_INT_CMD_RDDATA_IF_FRAME_SYNC(__x) \
+	DSI_VAL2REG(DSI_INT_CMD_RDDATA, IF_FRAME_SYNC, __x)
+#define DSI_INT_CMD_GNT 0x0000003C
+#define DSI_INT_CMD_GNT_IF_STALL_SHIFT 0
+#define DSI_INT_CMD_GNT_IF_STALL_MASK 0x00000001
+#define DSI_INT_CMD_GNT_IF_STALL(__x) \
+	DSI_VAL2REG(DSI_INT_CMD_GNT, IF_STALL, __x)
+#define DSI_INT_INTERRUPT_CTL 0x00000040
+#define DSI_INT_INTERRUPT_CTL_INT_VAL_SHIFT 0
+#define DSI_INT_INTERRUPT_CTL_INT_VAL_MASK 0x00000001
+#define DSI_INT_INTERRUPT_CTL_INT_VAL(__x) \
+	DSI_VAL2REG(DSI_INT_INTERRUPT_CTL, INT_VAL, __x)
+#define DSI_CMD_MODE_CTL 0x00000050
+#define DSI_CMD_MODE_CTL_IF1_ID_SHIFT 0
+#define DSI_CMD_MODE_CTL_IF1_ID_MASK 0x00000003
+#define DSI_CMD_MODE_CTL_IF1_ID(__x) \
+	DSI_VAL2REG(DSI_CMD_MODE_CTL, IF1_ID, __x)
+#define DSI_CMD_MODE_CTL_IF2_ID_SHIFT 2
+#define DSI_CMD_MODE_CTL_IF2_ID_MASK 0x0000000C
+#define DSI_CMD_MODE_CTL_IF2_ID(__x) \
+	DSI_VAL2REG(DSI_CMD_MODE_CTL, IF2_ID, __x)
+#define DSI_CMD_MODE_CTL_IF1_LP_EN_SHIFT 4
+#define DSI_CMD_MODE_CTL_IF1_LP_EN_MASK 0x00000010
+#define DSI_CMD_MODE_CTL_IF1_LP_EN(__x) \
+	DSI_VAL2REG(DSI_CMD_MODE_CTL, IF1_LP_EN, __x)
+#define DSI_CMD_MODE_CTL_IF2_LP_EN_SHIFT 5
+#define DSI_CMD_MODE_CTL_IF2_LP_EN_MASK 0x00000020
+#define DSI_CMD_MODE_CTL_IF2_LP_EN(__x) \
+	DSI_VAL2REG(DSI_CMD_MODE_CTL, IF2_LP_EN, __x)
+#define DSI_CMD_MODE_CTL_ARB_MODE_SHIFT 6
+#define DSI_CMD_MODE_CTL_ARB_MODE_MASK 0x00000040
+#define DSI_CMD_MODE_CTL_ARB_MODE(__x) \
+	DSI_VAL2REG(DSI_CMD_MODE_CTL, ARB_MODE, __x)
+#define DSI_CMD_MODE_CTL_ARB_PRI_SHIFT 7
+#define DSI_CMD_MODE_CTL_ARB_PRI_MASK 0x00000080
+#define DSI_CMD_MODE_CTL_ARB_PRI(__x) \
+	DSI_VAL2REG(DSI_CMD_MODE_CTL, ARB_PRI, __x)
+#define DSI_CMD_MODE_CTL_FIL_VALUE_SHIFT 8
+#define DSI_CMD_MODE_CTL_FIL_VALUE_MASK 0x0000FF00
+#define DSI_CMD_MODE_CTL_FIL_VALUE(__x) \
+	DSI_VAL2REG(DSI_CMD_MODE_CTL, FIL_VALUE, __x)
+#define DSI_CMD_MODE_CTL_TE_TIMEOUT_SHIFT 16
+#define DSI_CMD_MODE_CTL_TE_TIMEOUT_MASK 0x03FF0000
+#define DSI_CMD_MODE_CTL_TE_TIMEOUT(__x) \
+	DSI_VAL2REG(DSI_CMD_MODE_CTL, TE_TIMEOUT, __x)
+#define DSI_CMD_MODE_STS 0x00000054
+#define DSI_CMD_MODE_STS_ERR_NO_TE_SHIFT 0
+#define DSI_CMD_MODE_STS_ERR_NO_TE_MASK 0x00000001
+#define DSI_CMD_MODE_STS_ERR_NO_TE(__x) \
+	DSI_VAL2REG(DSI_CMD_MODE_STS, ERR_NO_TE, __x)
+#define DSI_CMD_MODE_STS_ERR_TE_MISS_SHIFT 1
+#define DSI_CMD_MODE_STS_ERR_TE_MISS_MASK 0x00000002
+#define DSI_CMD_MODE_STS_ERR_TE_MISS(__x) \
+	DSI_VAL2REG(DSI_CMD_MODE_STS, ERR_TE_MISS, __x)
+#define DSI_CMD_MODE_STS_ERR_SDI1_UNDERRUN_SHIFT 2
+#define DSI_CMD_MODE_STS_ERR_SDI1_UNDERRUN_MASK 0x00000004
+#define DSI_CMD_MODE_STS_ERR_SDI1_UNDERRUN(__x) \
+	DSI_VAL2REG(DSI_CMD_MODE_STS, ERR_SDI1_UNDERRUN, __x)
+#define DSI_CMD_MODE_STS_ERR_SDI2_UNDERRUN_SHIFT 3
+#define DSI_CMD_MODE_STS_ERR_SDI2_UNDERRUN_MASK 0x00000008
+#define DSI_CMD_MODE_STS_ERR_SDI2_UNDERRUN(__x) \
+	DSI_VAL2REG(DSI_CMD_MODE_STS, ERR_SDI2_UNDERRUN, __x)
+#define DSI_CMD_MODE_STS_ERR_UNWANTED_RD_SHIFT 4
+#define DSI_CMD_MODE_STS_ERR_UNWANTED_RD_MASK 0x00000010
+#define DSI_CMD_MODE_STS_ERR_UNWANTED_RD(__x) \
+	DSI_VAL2REG(DSI_CMD_MODE_STS, ERR_UNWANTED_RD, __x)
+#define DSI_CMD_MODE_STS_CSM_RUNNING_SHIFT 5
+#define DSI_CMD_MODE_STS_CSM_RUNNING_MASK 0x00000020
+#define DSI_CMD_MODE_STS_CSM_RUNNING(__x) \
+	DSI_VAL2REG(DSI_CMD_MODE_STS, CSM_RUNNING, __x)
+#define DSI_DIRECT_CMD_SEND 0x00000060
+#define DSI_DIRECT_CMD_SEND_START_SHIFT 0
+#define DSI_DIRECT_CMD_SEND_START_MASK 0xFFFFFFFF
+#define DSI_DIRECT_CMD_SEND_START(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_SEND, START, __x)
+#define DSI_DIRECT_CMD_MAIN_SETTINGS 0x00000064
+#define DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_NAT_SHIFT 0
+#define DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_NAT_MASK 0x00000007
+#define DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_NAT_WRITE 0
+#define DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_NAT_READ 1
+#define DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_NAT_TE_REQ 4
+#define DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_NAT_TRIG_REQ 5
+#define DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_NAT_BTA_REQ 6
+#define DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_NAT_ENUM(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_MAIN_SETTINGS, CMD_NAT, \
+	DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_NAT_##__x)
+#define DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_NAT(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_MAIN_SETTINGS, CMD_NAT, __x)
+#define DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_LONGNOTSHORT_SHIFT 3
+#define DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_LONGNOTSHORT_MASK 0x00000008
+#define DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_LONGNOTSHORT(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_MAIN_SETTINGS, CMD_LONGNOTSHORT, __x)
+#define DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_HEAD_SHIFT 8
+#define DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_HEAD_MASK 0x00003F00
+#define DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_HEAD_DCS_SHORT_WRITE_0 5
+#define DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_HEAD_DCS_SHORT_WRITE_1 21
+#define DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_HEAD_DCS_LONG_WRITE 57
+#define DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_HEAD_DCS_READ 6
+#define DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_HEAD_ENUM(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_MAIN_SETTINGS, CMD_HEAD, \
+	DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_HEAD_##__x)
+#define DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_HEAD(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_MAIN_SETTINGS, CMD_HEAD, __x)
+#define DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_ID_SHIFT 14
+#define DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_ID_MASK 0x0000C000
+#define DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_ID(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_MAIN_SETTINGS, CMD_ID, __x)
+#define DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_SIZE_SHIFT 16
+#define DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_SIZE_MASK 0x001F0000
+#define DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_SIZE(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_MAIN_SETTINGS, CMD_SIZE, __x)
+#define DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_LP_EN_SHIFT 21
+#define DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_LP_EN_MASK 0x00200000
+#define DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_LP_EN(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_MAIN_SETTINGS, CMD_LP_EN, __x)
+#define DSI_DIRECT_CMD_MAIN_SETTINGS_TRIGGER_VAL_SHIFT 24
+#define DSI_DIRECT_CMD_MAIN_SETTINGS_TRIGGER_VAL_MASK 0x0F000000
+#define DSI_DIRECT_CMD_MAIN_SETTINGS_TRIGGER_VAL(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_MAIN_SETTINGS, TRIGGER_VAL, __x)
+#define DSI_DIRECT_CMD_STS 0x00000068
+#define DSI_DIRECT_CMD_STS_CMD_TRANSMISSION_SHIFT 0
+#define DSI_DIRECT_CMD_STS_CMD_TRANSMISSION_MASK 0x00000001
+#define DSI_DIRECT_CMD_STS_CMD_TRANSMISSION(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_STS, CMD_TRANSMISSION, __x)
+#define DSI_DIRECT_CMD_STS_WRITE_COMPLETED_SHIFT 1
+#define DSI_DIRECT_CMD_STS_WRITE_COMPLETED_MASK 0x00000002
+#define DSI_DIRECT_CMD_STS_WRITE_COMPLETED(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_STS, WRITE_COMPLETED, __x)
+#define DSI_DIRECT_CMD_STS_TRIGGER_COMPLETED_SHIFT 2
+#define DSI_DIRECT_CMD_STS_TRIGGER_COMPLETED_MASK 0x00000004
+#define DSI_DIRECT_CMD_STS_TRIGGER_COMPLETED(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_STS, TRIGGER_COMPLETED, __x)
+#define DSI_DIRECT_CMD_STS_READ_COMPLETED_SHIFT 3
+#define DSI_DIRECT_CMD_STS_READ_COMPLETED_MASK 0x00000008
+#define DSI_DIRECT_CMD_STS_READ_COMPLETED(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_STS, READ_COMPLETED, __x)
+#define DSI_DIRECT_CMD_STS_ACKNOWLEDGE_RECEIVED_SHIFT 4
+#define DSI_DIRECT_CMD_STS_ACKNOWLEDGE_RECEIVED_MASK 0x00000010
+#define DSI_DIRECT_CMD_STS_ACKNOWLEDGE_RECEIVED(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_STS, ACKNOWLEDGE_RECEIVED, __x)
+#define DSI_DIRECT_CMD_STS_ACKNOWLEDGE_WITH_ERR_RECEIVED_SHIFT 5
+#define DSI_DIRECT_CMD_STS_ACKNOWLEDGE_WITH_ERR_RECEIVED_MASK 0x00000020
+#define DSI_DIRECT_CMD_STS_ACKNOWLEDGE_WITH_ERR_RECEIVED(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_STS, ACKNOWLEDGE_WITH_ERR_RECEIVED, __x)
+#define DSI_DIRECT_CMD_STS_TRIGGER_RECEIVED_SHIFT 6
+#define DSI_DIRECT_CMD_STS_TRIGGER_RECEIVED_MASK 0x00000040
+#define DSI_DIRECT_CMD_STS_TRIGGER_RECEIVED(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_STS, TRIGGER_RECEIVED, __x)
+#define DSI_DIRECT_CMD_STS_TE_RECEIVED_SHIFT 7
+#define DSI_DIRECT_CMD_STS_TE_RECEIVED_MASK 0x00000080
+#define DSI_DIRECT_CMD_STS_TE_RECEIVED(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_STS, TE_RECEIVED, __x)
+#define DSI_DIRECT_CMD_STS_BTA_COMPLETED_SHIFT 8
+#define DSI_DIRECT_CMD_STS_BTA_COMPLETED_MASK 0x00000100
+#define DSI_DIRECT_CMD_STS_BTA_COMPLETED(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_STS, BTA_COMPLETED, __x)
+#define DSI_DIRECT_CMD_STS_BTA_FINISHED_SHIFT 9
+#define DSI_DIRECT_CMD_STS_BTA_FINISHED_MASK 0x00000200
+#define DSI_DIRECT_CMD_STS_BTA_FINISHED(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_STS, BTA_FINISHED, __x)
+#define DSI_DIRECT_CMD_STS_READ_COMPLETED_WITH_ERR_SHIFT 10
+#define DSI_DIRECT_CMD_STS_READ_COMPLETED_WITH_ERR_MASK 0x00000400
+#define DSI_DIRECT_CMD_STS_READ_COMPLETED_WITH_ERR(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_STS, READ_COMPLETED_WITH_ERR, __x)
+#define DSI_DIRECT_CMD_STS_TRIGGER_VAL_SHIFT 11
+#define DSI_DIRECT_CMD_STS_TRIGGER_VAL_MASK 0x00007800
+#define DSI_DIRECT_CMD_STS_TRIGGER_VAL(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_STS, TRIGGER_VAL, __x)
+#define DSI_DIRECT_CMD_STS_ACK_VAL_SHIFT 16
+#define DSI_DIRECT_CMD_STS_ACK_VAL_MASK 0xFFFF0000
+#define DSI_DIRECT_CMD_STS_ACK_VAL(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_STS, ACK_VAL, __x)
+#define DSI_DIRECT_CMD_RD_INIT 0x0000006C
+#define DSI_DIRECT_CMD_RD_INIT_RESET_SHIFT 0
+#define DSI_DIRECT_CMD_RD_INIT_RESET_MASK 0xFFFFFFFF
+#define DSI_DIRECT_CMD_RD_INIT_RESET(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_RD_INIT, RESET, __x)
+#define DSI_DIRECT_CMD_WRDAT0 0x00000070
+#define DSI_DIRECT_CMD_WRDAT0_WRDAT0_SHIFT 0
+#define DSI_DIRECT_CMD_WRDAT0_WRDAT0_MASK 0x000000FF
+#define DSI_DIRECT_CMD_WRDAT0_WRDAT0(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_WRDAT0, WRDAT0, __x)
+#define DSI_DIRECT_CMD_WRDAT0_WRDAT1_SHIFT 8
+#define DSI_DIRECT_CMD_WRDAT0_WRDAT1_MASK 0x0000FF00
+#define DSI_DIRECT_CMD_WRDAT0_WRDAT1(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_WRDAT0, WRDAT1, __x)
+#define DSI_DIRECT_CMD_WRDAT0_WRDAT2_SHIFT 16
+#define DSI_DIRECT_CMD_WRDAT0_WRDAT2_MASK 0x00FF0000
+#define DSI_DIRECT_CMD_WRDAT0_WRDAT2(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_WRDAT0, WRDAT2, __x)
+#define DSI_DIRECT_CMD_WRDAT0_WRDAT3_SHIFT 24
+#define DSI_DIRECT_CMD_WRDAT0_WRDAT3_MASK 0xFF000000
+#define DSI_DIRECT_CMD_WRDAT0_WRDAT3(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_WRDAT0, WRDAT3, __x)
+#define DSI_DIRECT_CMD_WRDAT1 0x00000074
+#define DSI_DIRECT_CMD_WRDAT1_WRDAT4_SHIFT 0
+#define DSI_DIRECT_CMD_WRDAT1_WRDAT4_MASK 0x000000FF
+#define DSI_DIRECT_CMD_WRDAT1_WRDAT4(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_WRDAT1, WRDAT4, __x)
+#define DSI_DIRECT_CMD_WRDAT1_WRDAT5_SHIFT 8
+#define DSI_DIRECT_CMD_WRDAT1_WRDAT5_MASK 0x0000FF00
+#define DSI_DIRECT_CMD_WRDAT1_WRDAT5(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_WRDAT1, WRDAT5, __x)
+#define DSI_DIRECT_CMD_WRDAT1_WRDAT6_SHIFT 16
+#define DSI_DIRECT_CMD_WRDAT1_WRDAT6_MASK 0x00FF0000
+#define DSI_DIRECT_CMD_WRDAT1_WRDAT6(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_WRDAT1, WRDAT6, __x)
+#define DSI_DIRECT_CMD_WRDAT1_WRDAT7_SHIFT 24
+#define DSI_DIRECT_CMD_WRDAT1_WRDAT7_MASK 0xFF000000
+#define DSI_DIRECT_CMD_WRDAT1_WRDAT7(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_WRDAT1, WRDAT7, __x)
+#define DSI_DIRECT_CMD_WRDAT2 0x00000078
+#define DSI_DIRECT_CMD_WRDAT2_WRDAT8_SHIFT 0
+#define DSI_DIRECT_CMD_WRDAT2_WRDAT8_MASK 0x000000FF
+#define DSI_DIRECT_CMD_WRDAT2_WRDAT8(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_WRDAT2, WRDAT8, __x)
+#define DSI_DIRECT_CMD_WRDAT2_WRDAT9_SHIFT 8
+#define DSI_DIRECT_CMD_WRDAT2_WRDAT9_MASK 0x0000FF00
+#define DSI_DIRECT_CMD_WRDAT2_WRDAT9(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_WRDAT2, WRDAT9, __x)
+#define DSI_DIRECT_CMD_WRDAT2_WRDAT10_SHIFT 16
+#define DSI_DIRECT_CMD_WRDAT2_WRDAT10_MASK 0x00FF0000
+#define DSI_DIRECT_CMD_WRDAT2_WRDAT10(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_WRDAT2, WRDAT10, __x)
+#define DSI_DIRECT_CMD_WRDAT2_WRDAT11_SHIFT 24
+#define DSI_DIRECT_CMD_WRDAT2_WRDAT11_MASK 0xFF000000
+#define DSI_DIRECT_CMD_WRDAT2_WRDAT11(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_WRDAT2, WRDAT11, __x)
+#define DSI_DIRECT_CMD_WRDAT3 0x0000007C
+#define DSI_DIRECT_CMD_WRDAT3_WRDAT12_SHIFT 0
+#define DSI_DIRECT_CMD_WRDAT3_WRDAT12_MASK 0x000000FF
+#define DSI_DIRECT_CMD_WRDAT3_WRDAT12(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_WRDAT3, WRDAT12, __x)
+#define DSI_DIRECT_CMD_WRDAT3_WRDAT13_SHIFT 8
+#define DSI_DIRECT_CMD_WRDAT3_WRDAT13_MASK 0x0000FF00
+#define DSI_DIRECT_CMD_WRDAT3_WRDAT13(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_WRDAT3, WRDAT13, __x)
+#define DSI_DIRECT_CMD_WRDAT3_WRDAT14_SHIFT 16
+#define DSI_DIRECT_CMD_WRDAT3_WRDAT14_MASK 0x00FF0000
+#define DSI_DIRECT_CMD_WRDAT3_WRDAT14(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_WRDAT3, WRDAT14, __x)
+#define DSI_DIRECT_CMD_WRDAT3_WRDAT15_SHIFT 24
+#define DSI_DIRECT_CMD_WRDAT3_WRDAT15_MASK 0xFF000000
+#define DSI_DIRECT_CMD_WRDAT3_WRDAT15(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_WRDAT3, WRDAT15, __x)
+#define DSI_DIRECT_CMD_RDDAT 0x00000080
+#define DSI_DIRECT_CMD_RDDAT_RDDAT0_SHIFT 0
+#define DSI_DIRECT_CMD_RDDAT_RDDAT0_MASK 0x000000FF
+#define DSI_DIRECT_CMD_RDDAT_RDDAT0(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_RDDAT, RDDAT0, __x)
+#define DSI_DIRECT_CMD_RDDAT_RDDAT1_SHIFT 8
+#define DSI_DIRECT_CMD_RDDAT_RDDAT1_MASK 0x0000FF00
+#define DSI_DIRECT_CMD_RDDAT_RDDAT1(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_RDDAT, RDDAT1, __x)
+#define DSI_DIRECT_CMD_RDDAT_RDDAT2_SHIFT 16
+#define DSI_DIRECT_CMD_RDDAT_RDDAT2_MASK 0x00FF0000
+#define DSI_DIRECT_CMD_RDDAT_RDDAT2(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_RDDAT, RDDAT2, __x)
+#define DSI_DIRECT_CMD_RDDAT_RDDAT3_SHIFT 24
+#define DSI_DIRECT_CMD_RDDAT_RDDAT3_MASK 0xFF000000
+#define DSI_DIRECT_CMD_RDDAT_RDDAT3(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_RDDAT, RDDAT3, __x)
+#define DSI_DIRECT_CMD_RD_PROPERTY 0x00000084
+#define DSI_DIRECT_CMD_RD_PROPERTY_RD_SIZE_SHIFT 0
+#define DSI_DIRECT_CMD_RD_PROPERTY_RD_SIZE_MASK 0x0000FFFF
+#define DSI_DIRECT_CMD_RD_PROPERTY_RD_SIZE(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_RD_PROPERTY, RD_SIZE, __x)
+#define DSI_DIRECT_CMD_RD_PROPERTY_RD_ID_SHIFT 16
+#define DSI_DIRECT_CMD_RD_PROPERTY_RD_ID_MASK 0x00030000
+#define DSI_DIRECT_CMD_RD_PROPERTY_RD_ID(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_RD_PROPERTY, RD_ID, __x)
+#define DSI_DIRECT_CMD_RD_PROPERTY_RD_DCSNOTGENERIC_SHIFT 18
+#define DSI_DIRECT_CMD_RD_PROPERTY_RD_DCSNOTGENERIC_MASK 0x00040000
+#define DSI_DIRECT_CMD_RD_PROPERTY_RD_DCSNOTGENERIC(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_RD_PROPERTY, RD_DCSNOTGENERIC, __x)
+#define DSI_DIRECT_CMD_RD_STS 0x00000088
+#define DSI_DIRECT_CMD_RD_STS_ERR_FIXED_SHIFT 0
+#define DSI_DIRECT_CMD_RD_STS_ERR_FIXED_MASK 0x00000001
+#define DSI_DIRECT_CMD_RD_STS_ERR_FIXED(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_RD_STS, ERR_FIXED, __x)
+#define DSI_DIRECT_CMD_RD_STS_ERR_UNCORRECTABLE_SHIFT 1
+#define DSI_DIRECT_CMD_RD_STS_ERR_UNCORRECTABLE_MASK 0x00000002
+#define DSI_DIRECT_CMD_RD_STS_ERR_UNCORRECTABLE(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_RD_STS, ERR_UNCORRECTABLE, __x)
+#define DSI_DIRECT_CMD_RD_STS_ERR_CHECKSUM_SHIFT 2
+#define DSI_DIRECT_CMD_RD_STS_ERR_CHECKSUM_MASK 0x00000004
+#define DSI_DIRECT_CMD_RD_STS_ERR_CHECKSUM(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_RD_STS, ERR_CHECKSUM, __x)
+#define DSI_DIRECT_CMD_RD_STS_ERR_UNDECODABLE_SHIFT 3
+#define DSI_DIRECT_CMD_RD_STS_ERR_UNDECODABLE_MASK 0x00000008
+#define DSI_DIRECT_CMD_RD_STS_ERR_UNDECODABLE(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_RD_STS, ERR_UNDECODABLE, __x)
+#define DSI_DIRECT_CMD_RD_STS_ERR_RECEIVE_SHIFT 4
+#define DSI_DIRECT_CMD_RD_STS_ERR_RECEIVE_MASK 0x00000010
+#define DSI_DIRECT_CMD_RD_STS_ERR_RECEIVE(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_RD_STS, ERR_RECEIVE, __x)
+#define DSI_DIRECT_CMD_RD_STS_ERR_OVERSIZE_SHIFT 5
+#define DSI_DIRECT_CMD_RD_STS_ERR_OVERSIZE_MASK 0x00000020
+#define DSI_DIRECT_CMD_RD_STS_ERR_OVERSIZE(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_RD_STS, ERR_OVERSIZE, __x)
+#define DSI_DIRECT_CMD_RD_STS_ERR_WRONG_LENGTH_SHIFT 6
+#define DSI_DIRECT_CMD_RD_STS_ERR_WRONG_LENGTH_MASK 0x00000040
+#define DSI_DIRECT_CMD_RD_STS_ERR_WRONG_LENGTH(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_RD_STS, ERR_WRONG_LENGTH, __x)
+#define DSI_DIRECT_CMD_RD_STS_ERR_MISSING_EOT_SHIFT 7
+#define DSI_DIRECT_CMD_RD_STS_ERR_MISSING_EOT_MASK 0x00000080
+#define DSI_DIRECT_CMD_RD_STS_ERR_MISSING_EOT(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_RD_STS, ERR_MISSING_EOT, __x)
+#define DSI_DIRECT_CMD_RD_STS_ERR_EOT_WITH_ERR_SHIFT 8
+#define DSI_DIRECT_CMD_RD_STS_ERR_EOT_WITH_ERR_MASK 0x00000100
+#define DSI_DIRECT_CMD_RD_STS_ERR_EOT_WITH_ERR(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_RD_STS, ERR_EOT_WITH_ERR, __x)
+#define DSI_VID_MAIN_CTL 0x00000090
+#define DSI_VID_MAIN_CTL_START_MODE_SHIFT 0
+#define DSI_VID_MAIN_CTL_START_MODE_MASK 0x00000003
+#define DSI_VID_MAIN_CTL_START_MODE(__x) \
+	DSI_VAL2REG(DSI_VID_MAIN_CTL, START_MODE, __x)
+#define DSI_VID_MAIN_CTL_STOP_MODE_SHIFT 2
+#define DSI_VID_MAIN_CTL_STOP_MODE_MASK 0x0000000C
+#define DSI_VID_MAIN_CTL_STOP_MODE(__x) \
+	DSI_VAL2REG(DSI_VID_MAIN_CTL, STOP_MODE, __x)
+#define DSI_VID_MAIN_CTL_VID_ID_SHIFT 4
+#define DSI_VID_MAIN_CTL_VID_ID_MASK 0x00000030
+#define DSI_VID_MAIN_CTL_VID_ID(__x) \
+	DSI_VAL2REG(DSI_VID_MAIN_CTL, VID_ID, __x)
+#define DSI_VID_MAIN_CTL_HEADER_SHIFT 6
+#define DSI_VID_MAIN_CTL_HEADER_MASK 0x00000FC0
+#define DSI_VID_MAIN_CTL_HEADER(__x) \
+	DSI_VAL2REG(DSI_VID_MAIN_CTL, HEADER, __x)
+#define DSI_VID_MAIN_CTL_VID_PIXEL_MODE_SHIFT 12
+#define DSI_VID_MAIN_CTL_VID_PIXEL_MODE_MASK 0x00003000
+#define DSI_VID_MAIN_CTL_VID_PIXEL_MODE_16BITS 0
+#define DSI_VID_MAIN_CTL_VID_PIXEL_MODE_18BITS 1
+#define DSI_VID_MAIN_CTL_VID_PIXEL_MODE_18BITS_LOOSE 2
+#define DSI_VID_MAIN_CTL_VID_PIXEL_MODE_24BITS 3
+#define DSI_VID_MAIN_CTL_VID_PIXEL_MODE_ENUM(__x) \
+	DSI_VAL2REG(DSI_VID_MAIN_CTL, VID_PIXEL_MODE, \
+	DSI_VID_MAIN_CTL_VID_PIXEL_MODE_##__x)
+#define DSI_VID_MAIN_CTL_VID_PIXEL_MODE(__x) \
+	DSI_VAL2REG(DSI_VID_MAIN_CTL, VID_PIXEL_MODE, __x)
+#define DSI_VID_MAIN_CTL_BURST_MODE_SHIFT 14
+#define DSI_VID_MAIN_CTL_BURST_MODE_MASK 0x00004000
+#define DSI_VID_MAIN_CTL_BURST_MODE(__x) \
+	DSI_VAL2REG(DSI_VID_MAIN_CTL, BURST_MODE, __x)
+#define DSI_VID_MAIN_CTL_SYNC_PULSE_ACTIVE_SHIFT 15
+#define DSI_VID_MAIN_CTL_SYNC_PULSE_ACTIVE_MASK 0x00008000
+#define DSI_VID_MAIN_CTL_SYNC_PULSE_ACTIVE(__x) \
+	DSI_VAL2REG(DSI_VID_MAIN_CTL, SYNC_PULSE_ACTIVE, __x)
+#define DSI_VID_MAIN_CTL_SYNC_PULSE_HORIZONTAL_SHIFT 16
+#define DSI_VID_MAIN_CTL_SYNC_PULSE_HORIZONTAL_MASK 0x00010000
+#define DSI_VID_MAIN_CTL_SYNC_PULSE_HORIZONTAL(__x) \
+	DSI_VAL2REG(DSI_VID_MAIN_CTL, SYNC_PULSE_HORIZONTAL, __x)
+#define DSI_VID_MAIN_CTL_REG_BLKLINE_MODE_SHIFT 17
+#define DSI_VID_MAIN_CTL_REG_BLKLINE_MODE_MASK 0x00060000
+#define DSI_VID_MAIN_CTL_REG_BLKLINE_MODE_NULL 0
+#define DSI_VID_MAIN_CTL_REG_BLKLINE_MODE_BLANKING 1
+#define DSI_VID_MAIN_CTL_REG_BLKLINE_MODE_LP_0 2
+#define DSI_VID_MAIN_CTL_REG_BLKLINE_MODE_LP_1 3
+#define DSI_VID_MAIN_CTL_REG_BLKLINE_MODE_ENUM(__x) \
+	DSI_VAL2REG(DSI_VID_MAIN_CTL, REG_BLKLINE_MODE, \
+	DSI_VID_MAIN_CTL_REG_BLKLINE_MODE_##__x)
+#define DSI_VID_MAIN_CTL_REG_BLKLINE_MODE(__x) \
+	DSI_VAL2REG(DSI_VID_MAIN_CTL, REG_BLKLINE_MODE, __x)
+#define DSI_VID_MAIN_CTL_REG_BLKEOL_MODE_SHIFT 19
+#define DSI_VID_MAIN_CTL_REG_BLKEOL_MODE_MASK 0x00180000
+#define DSI_VID_MAIN_CTL_REG_BLKEOL_MODE_NULL 0
+#define DSI_VID_MAIN_CTL_REG_BLKEOL_MODE_BLANKING 1
+#define DSI_VID_MAIN_CTL_REG_BLKEOL_MODE_LP_0 2
+#define DSI_VID_MAIN_CTL_REG_BLKEOL_MODE_LP_1 3
+#define DSI_VID_MAIN_CTL_REG_BLKEOL_MODE_ENUM(__x) \
+	DSI_VAL2REG(DSI_VID_MAIN_CTL, REG_BLKEOL_MODE, \
+	DSI_VID_MAIN_CTL_REG_BLKEOL_MODE_##__x)
+#define DSI_VID_MAIN_CTL_REG_BLKEOL_MODE(__x) \
+	DSI_VAL2REG(DSI_VID_MAIN_CTL, REG_BLKEOL_MODE, __x)
+#define DSI_VID_MAIN_CTL_RECOVERY_MODE_SHIFT 21
+#define DSI_VID_MAIN_CTL_RECOVERY_MODE_MASK 0x00600000
+#define DSI_VID_MAIN_CTL_RECOVERY_MODE(__x) \
+	DSI_VAL2REG(DSI_VID_MAIN_CTL, RECOVERY_MODE, __x)
+#define DSI_VID_VSIZE 0x00000094
+#define DSI_VID_VSIZE_VSA_LENGTH_SHIFT 0
+#define DSI_VID_VSIZE_VSA_LENGTH_MASK 0x0000003F
+#define DSI_VID_VSIZE_VSA_LENGTH(__x) \
+	DSI_VAL2REG(DSI_VID_VSIZE, VSA_LENGTH, __x)
+#define DSI_VID_VSIZE_VBP_LENGTH_SHIFT 6
+#define DSI_VID_VSIZE_VBP_LENGTH_MASK 0x00000FC0
+#define DSI_VID_VSIZE_VBP_LENGTH(__x) \
+	DSI_VAL2REG(DSI_VID_VSIZE, VBP_LENGTH, __x)
+#define DSI_VID_VSIZE_VFP_LENGTH_SHIFT 12
+#define DSI_VID_VSIZE_VFP_LENGTH_MASK 0x000FF000
+#define DSI_VID_VSIZE_VFP_LENGTH(__x) \
+	DSI_VAL2REG(DSI_VID_VSIZE, VFP_LENGTH, __x)
+#define DSI_VID_VSIZE_VACT_LENGTH_SHIFT 20
+#define DSI_VID_VSIZE_VACT_LENGTH_MASK 0x7FF00000
+#define DSI_VID_VSIZE_VACT_LENGTH(__x) \
+	DSI_VAL2REG(DSI_VID_VSIZE, VACT_LENGTH, __x)
+#define DSI_VID_HSIZE1 0x00000098
+#define DSI_VID_HSIZE1_HSA_LENGTH_SHIFT 0
+#define DSI_VID_HSIZE1_HSA_LENGTH_MASK 0x000003FF
+#define DSI_VID_HSIZE1_HSA_LENGTH(__x) \
+	DSI_VAL2REG(DSI_VID_HSIZE1, HSA_LENGTH, __x)
+#define DSI_VID_HSIZE1_HBP_LENGTH_SHIFT 10
+#define DSI_VID_HSIZE1_HBP_LENGTH_MASK 0x000FFC00
+#define DSI_VID_HSIZE1_HBP_LENGTH(__x) \
+	DSI_VAL2REG(DSI_VID_HSIZE1, HBP_LENGTH, __x)
+#define DSI_VID_HSIZE1_HFP_LENGTH_SHIFT 20
+#define DSI_VID_HSIZE1_HFP_LENGTH_MASK 0x7FF00000
+#define DSI_VID_HSIZE1_HFP_LENGTH(__x) \
+	DSI_VAL2REG(DSI_VID_HSIZE1, HFP_LENGTH, __x)
+#define DSI_VID_HSIZE2 0x0000009C
+#define DSI_VID_HSIZE2_RGB_SIZE_SHIFT 0
+#define DSI_VID_HSIZE2_RGB_SIZE_MASK 0x00001FFF
+#define DSI_VID_HSIZE2_RGB_SIZE(__x) \
+	DSI_VAL2REG(DSI_VID_HSIZE2, RGB_SIZE, __x)
+#define DSI_VID_BLKSIZE1 0x000000A0
+#define DSI_VID_BLKSIZE1_BLKLINE_EVENT_PCK_SHIFT 0
+#define DSI_VID_BLKSIZE1_BLKLINE_EVENT_PCK_MASK 0x00001FFF
+#define DSI_VID_BLKSIZE1_BLKLINE_EVENT_PCK(__x) \
+	DSI_VAL2REG(DSI_VID_BLKSIZE1, BLKLINE_EVENT_PCK, __x)
+#define DSI_VID_BLKSIZE1_BLKEOL_PCK_SHIFT 13
+#define DSI_VID_BLKSIZE1_BLKEOL_PCK_MASK 0x03FFE000
+#define DSI_VID_BLKSIZE1_BLKEOL_PCK(__x) \
+	DSI_VAL2REG(DSI_VID_BLKSIZE1, BLKEOL_PCK, __x)
+#define DSI_VID_BLKSIZE2 0x000000A4
+#define DSI_VID_BLKSIZE2_BLKLINE_PULSE_PCK_SHIFT 0
+#define DSI_VID_BLKSIZE2_BLKLINE_PULSE_PCK_MASK 0x00001FFF
+#define DSI_VID_BLKSIZE2_BLKLINE_PULSE_PCK(__x) \
+	DSI_VAL2REG(DSI_VID_BLKSIZE2, BLKLINE_PULSE_PCK, __x)
+#define DSI_VID_PCK_TIME 0x000000A8
+#define DSI_VID_PCK_TIME_BLKEOL_DURATION_SHIFT 0
+#define DSI_VID_PCK_TIME_BLKEOL_DURATION_MASK 0x00001FFF
+#define DSI_VID_PCK_TIME_BLKEOL_DURATION(__x) \
+	DSI_VAL2REG(DSI_VID_PCK_TIME, BLKEOL_DURATION, __x)
+#define DSI_VID_DPHY_TIME 0x000000AC
+#define DSI_VID_DPHY_TIME_REG_LINE_DURATION_SHIFT 0
+#define DSI_VID_DPHY_TIME_REG_LINE_DURATION_MASK 0x00001FFF
+#define DSI_VID_DPHY_TIME_REG_LINE_DURATION(__x) \
+	DSI_VAL2REG(DSI_VID_DPHY_TIME, REG_LINE_DURATION, __x)
+#define DSI_VID_DPHY_TIME_REG_WAKEUP_TIME_SHIFT 13
+#define DSI_VID_DPHY_TIME_REG_WAKEUP_TIME_MASK 0x00FFE000
+#define DSI_VID_DPHY_TIME_REG_WAKEUP_TIME(__x) \
+	DSI_VAL2REG(DSI_VID_DPHY_TIME, REG_WAKEUP_TIME, __x)
+#define DSI_VID_ERR_COLOR 0x000000B0
+#define DSI_VID_ERR_COLOR_COL_RED_SHIFT 0
+#define DSI_VID_ERR_COLOR_COL_RED_MASK 0x000000FF
+#define DSI_VID_ERR_COLOR_COL_RED(__x) \
+	DSI_VAL2REG(DSI_VID_ERR_COLOR, COL_RED, __x)
+#define DSI_VID_ERR_COLOR_COL_GREEN_SHIFT 8
+#define DSI_VID_ERR_COLOR_COL_GREEN_MASK 0x0000FF00
+#define DSI_VID_ERR_COLOR_COL_GREEN(__x) \
+	DSI_VAL2REG(DSI_VID_ERR_COLOR, COL_GREEN, __x)
+#define DSI_VID_ERR_COLOR_COL_BLUE_SHIFT 16
+#define DSI_VID_ERR_COLOR_COL_BLUE_MASK 0x00FF0000
+#define DSI_VID_ERR_COLOR_COL_BLUE(__x) \
+	DSI_VAL2REG(DSI_VID_ERR_COLOR, COL_BLUE, __x)
+#define DSI_VID_ERR_COLOR_PAD_VAL_SHIFT 24
+#define DSI_VID_ERR_COLOR_PAD_VAL_MASK 0xFF000000
+#define DSI_VID_ERR_COLOR_PAD_VAL(__x) \
+	DSI_VAL2REG(DSI_VID_ERR_COLOR, PAD_VAL, __x)
+#define DSI_VID_VPOS 0x000000B4
+#define DSI_VID_VPOS_LINE_POS_SHIFT 0
+#define DSI_VID_VPOS_LINE_POS_MASK 0x00000003
+#define DSI_VID_VPOS_LINE_POS(__x) \
+	DSI_VAL2REG(DSI_VID_VPOS, LINE_POS, __x)
+#define DSI_VID_VPOS_LINE_VAL_SHIFT 2
+#define DSI_VID_VPOS_LINE_VAL_MASK 0x00001FFC
+#define DSI_VID_VPOS_LINE_VAL(__x) \
+	DSI_VAL2REG(DSI_VID_VPOS, LINE_VAL, __x)
+#define DSI_VID_HPOS 0x000000B8
+#define DSI_VID_HPOS_HORIZONTAL_POS_SHIFT 0
+#define DSI_VID_HPOS_HORIZONTAL_POS_MASK 0x00000007
+#define DSI_VID_HPOS_HORIZONTAL_POS(__x) \
+	DSI_VAL2REG(DSI_VID_HPOS, HORIZONTAL_POS, __x)
+#define DSI_VID_HPOS_HORIZONTAL_VAL_SHIFT 3
+#define DSI_VID_HPOS_HORIZONTAL_VAL_MASK 0x0000FFF8
+#define DSI_VID_HPOS_HORIZONTAL_VAL(__x) \
+	DSI_VAL2REG(DSI_VID_HPOS, HORIZONTAL_VAL, __x)
+#define DSI_VID_MODE_STS 0x000000BC
+#define DSI_VID_MODE_STS_VSG_RUNNING_SHIFT 0
+#define DSI_VID_MODE_STS_VSG_RUNNING_MASK 0x00000001
+#define DSI_VID_MODE_STS_VSG_RUNNING(__x) \
+	DSI_VAL2REG(DSI_VID_MODE_STS, VSG_RUNNING, __x)
+#define DSI_VID_MODE_STS_ERR_MISSING_DATA_SHIFT 1
+#define DSI_VID_MODE_STS_ERR_MISSING_DATA_MASK 0x00000002
+#define DSI_VID_MODE_STS_ERR_MISSING_DATA(__x) \
+	DSI_VAL2REG(DSI_VID_MODE_STS, ERR_MISSING_DATA, __x)
+#define DSI_VID_MODE_STS_ERR_MISSING_HSYNC_SHIFT 2
+#define DSI_VID_MODE_STS_ERR_MISSING_HSYNC_MASK 0x00000004
+#define DSI_VID_MODE_STS_ERR_MISSING_HSYNC(__x) \
+	DSI_VAL2REG(DSI_VID_MODE_STS, ERR_MISSING_HSYNC, __x)
+#define DSI_VID_MODE_STS_ERR_MISSING_VSYNC_SHIFT 3
+#define DSI_VID_MODE_STS_ERR_MISSING_VSYNC_MASK 0x00000008
+#define DSI_VID_MODE_STS_ERR_MISSING_VSYNC(__x) \
+	DSI_VAL2REG(DSI_VID_MODE_STS, ERR_MISSING_VSYNC, __x)
+#define DSI_VID_MODE_STS_REG_ERR_SMALL_LENGTH_SHIFT 4
+#define DSI_VID_MODE_STS_REG_ERR_SMALL_LENGTH_MASK 0x00000010
+#define DSI_VID_MODE_STS_REG_ERR_SMALL_LENGTH(__x) \
+	DSI_VAL2REG(DSI_VID_MODE_STS, REG_ERR_SMALL_LENGTH, __x)
+#define DSI_VID_MODE_STS_REG_ERR_SMALL_HEIGHT_SHIFT 5
+#define DSI_VID_MODE_STS_REG_ERR_SMALL_HEIGHT_MASK 0x00000020
+#define DSI_VID_MODE_STS_REG_ERR_SMALL_HEIGHT(__x) \
+	DSI_VAL2REG(DSI_VID_MODE_STS, REG_ERR_SMALL_HEIGHT, __x)
+#define DSI_VID_MODE_STS_ERR_BURSTWRITE_SHIFT 6
+#define DSI_VID_MODE_STS_ERR_BURSTWRITE_MASK 0x00000040
+#define DSI_VID_MODE_STS_ERR_BURSTWRITE(__x) \
+	DSI_VAL2REG(DSI_VID_MODE_STS, ERR_BURSTWRITE, __x)
+#define DSI_VID_MODE_STS_ERR_LONGWRITE_SHIFT 7
+#define DSI_VID_MODE_STS_ERR_LONGWRITE_MASK 0x00000080
+#define DSI_VID_MODE_STS_ERR_LONGWRITE(__x) \
+	DSI_VAL2REG(DSI_VID_MODE_STS, ERR_LONGWRITE, __x)
+#define DSI_VID_MODE_STS_ERR_LONGREAD_SHIFT 8
+#define DSI_VID_MODE_STS_ERR_LONGREAD_MASK 0x00000100
+#define DSI_VID_MODE_STS_ERR_LONGREAD(__x) \
+	DSI_VAL2REG(DSI_VID_MODE_STS, ERR_LONGREAD, __x)
+#define DSI_VID_MODE_STS_ERR_VRS_WRONG_LENGTH_SHIFT 9
+#define DSI_VID_MODE_STS_ERR_VRS_WRONG_LENGTH_MASK 0x00000200
+#define DSI_VID_MODE_STS_ERR_VRS_WRONG_LENGTH(__x) \
+	DSI_VAL2REG(DSI_VID_MODE_STS, ERR_VRS_WRONG_LENGTH, __x)
+#define DSI_VID_MODE_STS_VSG_RECOVERY_SHIFT 10
+#define DSI_VID_MODE_STS_VSG_RECOVERY_MASK 0x00000400
+#define DSI_VID_MODE_STS_VSG_RECOVERY(__x) \
+	DSI_VAL2REG(DSI_VID_MODE_STS, VSG_RECOVERY, __x)
+#define DSI_VID_VCA_SETTING1 0x000000C0
+#define DSI_VID_VCA_SETTING1_MAX_BURST_LIMIT_SHIFT 0
+#define DSI_VID_VCA_SETTING1_MAX_BURST_LIMIT_MASK 0x0000FFFF
+#define DSI_VID_VCA_SETTING1_MAX_BURST_LIMIT(__x) \
+	DSI_VAL2REG(DSI_VID_VCA_SETTING1, MAX_BURST_LIMIT, __x)
+#define DSI_VID_VCA_SETTING1_BURST_LP_SHIFT 16
+#define DSI_VID_VCA_SETTING1_BURST_LP_MASK 0x00010000
+#define DSI_VID_VCA_SETTING1_BURST_LP(__x) \
+	DSI_VAL2REG(DSI_VID_VCA_SETTING1, BURST_LP, __x)
+#define DSI_VID_VCA_SETTING2 0x000000C4
+#define DSI_VID_VCA_SETTING2_EXACT_BURST_LIMIT_SHIFT 0
+#define DSI_VID_VCA_SETTING2_EXACT_BURST_LIMIT_MASK 0x0000FFFF
+#define DSI_VID_VCA_SETTING2_EXACT_BURST_LIMIT(__x) \
+	DSI_VAL2REG(DSI_VID_VCA_SETTING2, EXACT_BURST_LIMIT, __x)
+#define DSI_VID_VCA_SETTING2_MAX_LINE_LIMIT_SHIFT 16
+#define DSI_VID_VCA_SETTING2_MAX_LINE_LIMIT_MASK 0xFFFF0000
+#define DSI_VID_VCA_SETTING2_MAX_LINE_LIMIT(__x) \
+	DSI_VAL2REG(DSI_VID_VCA_SETTING2, MAX_LINE_LIMIT, __x)
+#define DSI_TVG_CTL 0x000000C8
+#define DSI_TVG_CTL_TVG_RUN_SHIFT 0
+#define DSI_TVG_CTL_TVG_RUN_MASK 0x00000001
+#define DSI_TVG_CTL_TVG_RUN(__x) \
+	DSI_VAL2REG(DSI_TVG_CTL, TVG_RUN, __x)
+#define DSI_TVG_CTL_TVG_STOPMODE_SHIFT 1
+#define DSI_TVG_CTL_TVG_STOPMODE_MASK 0x00000006
+#define DSI_TVG_CTL_TVG_STOPMODE(__x) \
+	DSI_VAL2REG(DSI_TVG_CTL, TVG_STOPMODE, __x)
+#define DSI_TVG_CTL_TVG_MODE_SHIFT 3
+#define DSI_TVG_CTL_TVG_MODE_MASK 0x00000018
+#define DSI_TVG_CTL_TVG_MODE(__x) \
+	DSI_VAL2REG(DSI_TVG_CTL, TVG_MODE, __x)
+#define DSI_TVG_CTL_TVG_STRIPE_SIZE_SHIFT 5
+#define DSI_TVG_CTL_TVG_STRIPE_SIZE_MASK 0x000000E0
+#define DSI_TVG_CTL_TVG_STRIPE_SIZE(__x) \
+	DSI_VAL2REG(DSI_TVG_CTL, TVG_STRIPE_SIZE, __x)
+#define DSI_TVG_IMG_SIZE 0x000000CC
+#define DSI_TVG_IMG_SIZE_TVG_LINE_SIZE_SHIFT 0
+#define DSI_TVG_IMG_SIZE_TVG_LINE_SIZE_MASK 0x00001FFF
+#define DSI_TVG_IMG_SIZE_TVG_LINE_SIZE(__x) \
+	DSI_VAL2REG(DSI_TVG_IMG_SIZE, TVG_LINE_SIZE, __x)
+#define DSI_TVG_IMG_SIZE_TVG_NBLINE_SHIFT 16
+#define DSI_TVG_IMG_SIZE_TVG_NBLINE_MASK 0x07FF0000
+#define DSI_TVG_IMG_SIZE_TVG_NBLINE(__x) \
+	DSI_VAL2REG(DSI_TVG_IMG_SIZE, TVG_NBLINE, __x)
+#define DSI_TVG_COLOR1 0x000000D0
+#define DSI_TVG_COLOR1_COL1_RED_SHIFT 0
+#define DSI_TVG_COLOR1_COL1_RED_MASK 0x000000FF
+#define DSI_TVG_COLOR1_COL1_RED(__x) \
+	DSI_VAL2REG(DSI_TVG_COLOR1, COL1_RED, __x)
+#define DSI_TVG_COLOR1_COL1_GREEN_SHIFT 8
+#define DSI_TVG_COLOR1_COL1_GREEN_MASK 0x0000FF00
+#define DSI_TVG_COLOR1_COL1_GREEN(__x) \
+	DSI_VAL2REG(DSI_TVG_COLOR1, COL1_GREEN, __x)
+#define DSI_TVG_COLOR1_COL1_BLUE_SHIFT 16
+#define DSI_TVG_COLOR1_COL1_BLUE_MASK 0x00FF0000
+#define DSI_TVG_COLOR1_COL1_BLUE(__x) \
+	DSI_VAL2REG(DSI_TVG_COLOR1, COL1_BLUE, __x)
+#define DSI_TVG_COLOR2 0x000000D4
+#define DSI_TVG_COLOR2_COL2_RED_SHIFT 0
+#define DSI_TVG_COLOR2_COL2_RED_MASK 0x000000FF
+#define DSI_TVG_COLOR2_COL2_RED(__x) \
+	DSI_VAL2REG(DSI_TVG_COLOR2, COL2_RED, __x)
+#define DSI_TVG_COLOR2_COL2_GREEN_SHIFT 8
+#define DSI_TVG_COLOR2_COL2_GREEN_MASK 0x0000FF00
+#define DSI_TVG_COLOR2_COL2_GREEN(__x) \
+	DSI_VAL2REG(DSI_TVG_COLOR2, COL2_GREEN, __x)
+#define DSI_TVG_COLOR2_COL2_BLUE_SHIFT 16
+#define DSI_TVG_COLOR2_COL2_BLUE_MASK 0x00FF0000
+#define DSI_TVG_COLOR2_COL2_BLUE(__x) \
+	DSI_VAL2REG(DSI_TVG_COLOR2, COL2_BLUE, __x)
+#define DSI_TVG_STS 0x000000D8
+#define DSI_TVG_STS_TVG_RUNNING_SHIFT 0
+#define DSI_TVG_STS_TVG_RUNNING_MASK 0x00000001
+#define DSI_TVG_STS_TVG_RUNNING(__x) \
+	DSI_VAL2REG(DSI_TVG_STS, TVG_RUNNING, __x)
+#define DSI_TBG_CTL 0x000000E0
+#define DSI_TBG_CTL_TBG_START_SHIFT 0
+#define DSI_TBG_CTL_TBG_START_MASK 0x00000001
+#define DSI_TBG_CTL_TBG_START(__x) \
+	DSI_VAL2REG(DSI_TBG_CTL, TBG_START, __x)
+#define DSI_TBG_CTL_TBG_HS_REQ_SHIFT 1
+#define DSI_TBG_CTL_TBG_HS_REQ_MASK 0x00000002
+#define DSI_TBG_CTL_TBG_HS_REQ(__x) \
+	DSI_VAL2REG(DSI_TBG_CTL, TBG_HS_REQ, __x)
+#define DSI_TBG_CTL_TBG_DATA_SEL_SHIFT 2
+#define DSI_TBG_CTL_TBG_DATA_SEL_MASK 0x00000004
+#define DSI_TBG_CTL_TBG_DATA_SEL(__x) \
+	DSI_VAL2REG(DSI_TBG_CTL, TBG_DATA_SEL, __x)
+#define DSI_TBG_CTL_TBG_MODE_SHIFT 3
+#define DSI_TBG_CTL_TBG_MODE_MASK 0x00000018
+#define DSI_TBG_CTL_TBG_MODE_1BYTE 0
+#define DSI_TBG_CTL_TBG_MODE_2BYTE 1
+#define DSI_TBG_CTL_TBG_MODE_BURST_COUNTER 2
+#define DSI_TBG_CTL_TBG_MODE_BURST 3
+#define DSI_TBG_CTL_TBG_MODE_ENUM(__x) \
+	DSI_VAL2REG(DSI_TBG_CTL, TBG_MODE, DSI_TBG_CTL_TBG_MODE_##__x)
+#define DSI_TBG_CTL_TBG_MODE(__x) \
+	DSI_VAL2REG(DSI_TBG_CTL, TBG_MODE, __x)
+#define DSI_TBG_SETTING 0x000000E4
+#define DSI_TBG_SETTING_TBG_DATA_SHIFT 0
+#define DSI_TBG_SETTING_TBG_DATA_MASK 0x0000FFFF
+#define DSI_TBG_SETTING_TBG_DATA(__x) \
+	DSI_VAL2REG(DSI_TBG_SETTING, TBG_DATA, __x)
+#define DSI_TBG_SETTING_TBG_CPT_SHIFT 16
+#define DSI_TBG_SETTING_TBG_CPT_MASK 0x0FFF0000
+#define DSI_TBG_SETTING_TBG_CPT(__x) \
+	DSI_VAL2REG(DSI_TBG_SETTING, TBG_CPT, __x)
+#define DSI_TBG_STS 0x000000E8
+#define DSI_TBG_STS_TBG_STATUS_SHIFT 0
+#define DSI_TBG_STS_TBG_STATUS_MASK 0x00000001
+#define DSI_TBG_STS_TBG_STATUS(__x) \
+	DSI_VAL2REG(DSI_TBG_STS, TBG_STATUS, __x)
+#define DSI_MCTL_MAIN_STS_CTL 0x000000F0
+#define DSI_MCTL_MAIN_STS_CTL_PLL_LOCK_EN_SHIFT 0
+#define DSI_MCTL_MAIN_STS_CTL_PLL_LOCK_EN_MASK 0x00000001
+#define DSI_MCTL_MAIN_STS_CTL_PLL_LOCK_EN(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_STS_CTL, PLL_LOCK_EN, __x)
+#define DSI_MCTL_MAIN_STS_CTL_CLKLANE_READY_EN_SHIFT 1
+#define DSI_MCTL_MAIN_STS_CTL_CLKLANE_READY_EN_MASK 0x00000002
+#define DSI_MCTL_MAIN_STS_CTL_CLKLANE_READY_EN(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_STS_CTL, CLKLANE_READY_EN, __x)
+#define DSI_MCTL_MAIN_STS_CTL_DAT1_READY_EN_SHIFT 2
+#define DSI_MCTL_MAIN_STS_CTL_DAT1_READY_EN_MASK 0x00000004
+#define DSI_MCTL_MAIN_STS_CTL_DAT1_READY_EN(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_STS_CTL, DAT1_READY_EN, __x)
+#define DSI_MCTL_MAIN_STS_CTL_DAT2_READY_EN_SHIFT 3
+#define DSI_MCTL_MAIN_STS_CTL_DAT2_READY_EN_MASK 0x00000008
+#define DSI_MCTL_MAIN_STS_CTL_DAT2_READY_EN(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_STS_CTL, DAT2_READY_EN, __x)
+#define DSI_MCTL_MAIN_STS_CTL_HSTX_TO_ERR_EN_SHIFT 4
+#define DSI_MCTL_MAIN_STS_CTL_HSTX_TO_ERR_EN_MASK 0x00000010
+#define DSI_MCTL_MAIN_STS_CTL_HSTX_TO_ERR_EN(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_STS_CTL, HSTX_TO_ERR_EN, __x)
+#define DSI_MCTL_MAIN_STS_CTL_LPRX_TO_ERR_EN_SHIFT 5
+#define DSI_MCTL_MAIN_STS_CTL_LPRX_TO_ERR_EN_MASK 0x00000020
+#define DSI_MCTL_MAIN_STS_CTL_LPRX_TO_ERR_EN(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_STS_CTL, LPRX_TO_ERR_EN, __x)
+#define DSI_MCTL_MAIN_STS_CTL_CRS_UNTERM_PCK_ERR_EN_SHIFT 6
+#define DSI_MCTL_MAIN_STS_CTL_CRS_UNTERM_PCK_ERR_EN_MASK 0x00000040
+#define DSI_MCTL_MAIN_STS_CTL_CRS_UNTERM_PCK_ERR_EN(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_STS_CTL, CRS_UNTERM_PCK_ERR_EN, __x)
+#define DSI_MCTL_MAIN_STS_CTL_VRS_UNTERM_PCK_ERR_EN_SHIFT 7
+#define DSI_MCTL_MAIN_STS_CTL_VRS_UNTERM_PCK_ERR_EN_MASK 0x00000080
+#define DSI_MCTL_MAIN_STS_CTL_VRS_UNTERM_PCK_ERR_EN(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_STS_CTL, VRS_UNTERM_PCK_ERR_EN, __x)
+#define DSI_MCTL_MAIN_STS_CTL_PLL_LOCK_EDGE_SHIFT 16
+#define DSI_MCTL_MAIN_STS_CTL_PLL_LOCK_EDGE_MASK 0x00010000
+#define DSI_MCTL_MAIN_STS_CTL_PLL_LOCK_EDGE(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_STS_CTL, PLL_LOCK_EDGE, __x)
+#define DSI_MCTL_MAIN_STS_CTL_CLKLANE_READY_EDGE_SHIFT 17
+#define DSI_MCTL_MAIN_STS_CTL_CLKLANE_READY_EDGE_MASK 0x00020000
+#define DSI_MCTL_MAIN_STS_CTL_CLKLANE_READY_EDGE(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_STS_CTL, CLKLANE_READY_EDGE, __x)
+#define DSI_MCTL_MAIN_STS_CTL_DAT1_READY_EDGE_SHIFT 18
+#define DSI_MCTL_MAIN_STS_CTL_DAT1_READY_EDGE_MASK 0x00040000
+#define DSI_MCTL_MAIN_STS_CTL_DAT1_READY_EDGE(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_STS_CTL, DAT1_READY_EDGE, __x)
+#define DSI_MCTL_MAIN_STS_CTL_DAT2_READY_EDGE_SHIFT 19
+#define DSI_MCTL_MAIN_STS_CTL_DAT2_READY_EDGE_MASK 0x00080000
+#define DSI_MCTL_MAIN_STS_CTL_DAT2_READY_EDGE(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_STS_CTL, DAT2_READY_EDGE, __x)
+#define DSI_MCTL_MAIN_STS_CTL_HSTX_TO_ERR_EDGE_SHIFT 20
+#define DSI_MCTL_MAIN_STS_CTL_HSTX_TO_ERR_EDGE_MASK 0x00100000
+#define DSI_MCTL_MAIN_STS_CTL_HSTX_TO_ERR_EDGE(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_STS_CTL, HSTX_TO_ERR_EDGE, __x)
+#define DSI_MCTL_MAIN_STS_CTL_LPRX_TO_ERR_EDGE_SHIFT 21
+#define DSI_MCTL_MAIN_STS_CTL_LPRX_TO_ERR_EDGE_MASK 0x00200000
+#define DSI_MCTL_MAIN_STS_CTL_LPRX_TO_ERR_EDGE(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_STS_CTL, LPRX_TO_ERR_EDGE, __x)
+#define DSI_MCTL_MAIN_STS_CTL_CRS_UNTERM_PCK_ERR_EDGE_SHIFT 22
+#define DSI_MCTL_MAIN_STS_CTL_CRS_UNTERM_PCK_ERR_EDGE_MASK 0x00400000
+#define DSI_MCTL_MAIN_STS_CTL_CRS_UNTERM_PCK_ERR_EDGE(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_STS_CTL, CRS_UNTERM_PCK_ERR_EDGE, __x)
+#define DSI_MCTL_MAIN_STS_CTL_VRS_UNTERM_PCK_ERR_EDGE_SHIFT 23
+#define DSI_MCTL_MAIN_STS_CTL_VRS_UNTERM_PCK_ERR_EDGE_MASK 0x00800000
+#define DSI_MCTL_MAIN_STS_CTL_VRS_UNTERM_PCK_ERR_EDGE(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_STS_CTL, VRS_UNTERM_PCK_ERR_EDGE, __x)
+#define DSI_CMD_MODE_STS_CTL 0x000000F4
+#define DSI_CMD_MODE_STS_CTL_ERR_NO_TE_EN_SHIFT 0
+#define DSI_CMD_MODE_STS_CTL_ERR_NO_TE_EN_MASK 0x00000001
+#define DSI_CMD_MODE_STS_CTL_ERR_NO_TE_EN(__x) \
+	DSI_VAL2REG(DSI_CMD_MODE_STS_CTL, ERR_NO_TE_EN, __x)
+#define DSI_CMD_MODE_STS_CTL_ERR_TE_MISS_EN_SHIFT 1
+#define DSI_CMD_MODE_STS_CTL_ERR_TE_MISS_EN_MASK 0x00000002
+#define DSI_CMD_MODE_STS_CTL_ERR_TE_MISS_EN(__x) \
+	DSI_VAL2REG(DSI_CMD_MODE_STS_CTL, ERR_TE_MISS_EN, __x)
+#define DSI_CMD_MODE_STS_CTL_ERR_SDI1_UNDERRUN_EN_SHIFT 2
+#define DSI_CMD_MODE_STS_CTL_ERR_SDI1_UNDERRUN_EN_MASK 0x00000004
+#define DSI_CMD_MODE_STS_CTL_ERR_SDI1_UNDERRUN_EN(__x) \
+	DSI_VAL2REG(DSI_CMD_MODE_STS_CTL, ERR_SDI1_UNDERRUN_EN, __x)
+#define DSI_CMD_MODE_STS_CTL_ERR_SDI2_UNDERRUN_EN_SHIFT 3
+#define DSI_CMD_MODE_STS_CTL_ERR_SDI2_UNDERRUN_EN_MASK 0x00000008
+#define DSI_CMD_MODE_STS_CTL_ERR_SDI2_UNDERRUN_EN(__x) \
+	DSI_VAL2REG(DSI_CMD_MODE_STS_CTL, ERR_SDI2_UNDERRUN_EN, __x)
+#define DSI_CMD_MODE_STS_CTL_ERR_UNWANTED_RD_EN_SHIFT 4
+#define DSI_CMD_MODE_STS_CTL_ERR_UNWANTED_RD_EN_MASK 0x00000010
+#define DSI_CMD_MODE_STS_CTL_ERR_UNWANTED_RD_EN(__x) \
+	DSI_VAL2REG(DSI_CMD_MODE_STS_CTL, ERR_UNWANTED_RD_EN, __x)
+#define DSI_CMD_MODE_STS_CTL_CSM_RUNNING_EN_SHIFT 5
+#define DSI_CMD_MODE_STS_CTL_CSM_RUNNING_EN_MASK 0x00000020
+#define DSI_CMD_MODE_STS_CTL_CSM_RUNNING_EN(__x) \
+	DSI_VAL2REG(DSI_CMD_MODE_STS_CTL, CSM_RUNNING_EN, __x)
+#define DSI_CMD_MODE_STS_CTL_ERR_NO_TE_EDGE_SHIFT 16
+#define DSI_CMD_MODE_STS_CTL_ERR_NO_TE_EDGE_MASK 0x00010000
+#define DSI_CMD_MODE_STS_CTL_ERR_NO_TE_EDGE(__x) \
+	DSI_VAL2REG(DSI_CMD_MODE_STS_CTL, ERR_NO_TE_EDGE, __x)
+#define DSI_CMD_MODE_STS_CTL_ERR_TE_MISS_EDGE_SHIFT 17
+#define DSI_CMD_MODE_STS_CTL_ERR_TE_MISS_EDGE_MASK 0x00020000
+#define DSI_CMD_MODE_STS_CTL_ERR_TE_MISS_EDGE(__x) \
+	DSI_VAL2REG(DSI_CMD_MODE_STS_CTL, ERR_TE_MISS_EDGE, __x)
+#define DSI_CMD_MODE_STS_CTL_ERR_SDI1_UNDERRUN_EDGE_SHIFT 18
+#define DSI_CMD_MODE_STS_CTL_ERR_SDI1_UNDERRUN_EDGE_MASK 0x00040000
+#define DSI_CMD_MODE_STS_CTL_ERR_SDI1_UNDERRUN_EDGE(__x) \
+	DSI_VAL2REG(DSI_CMD_MODE_STS_CTL, ERR_SDI1_UNDERRUN_EDGE, __x)
+#define DSI_CMD_MODE_STS_CTL_ERR_SDI2_UNDERRUN_EDGE_SHIFT 19
+#define DSI_CMD_MODE_STS_CTL_ERR_SDI2_UNDERRUN_EDGE_MASK 0x00080000
+#define DSI_CMD_MODE_STS_CTL_ERR_SDI2_UNDERRUN_EDGE(__x) \
+	DSI_VAL2REG(DSI_CMD_MODE_STS_CTL, ERR_SDI2_UNDERRUN_EDGE, __x)
+#define DSI_CMD_MODE_STS_CTL_ERR_UNWANTED_RD_EDGE_SHIFT 20
+#define DSI_CMD_MODE_STS_CTL_ERR_UNWANTED_RD_EDGE_MASK 0x00100000
+#define DSI_CMD_MODE_STS_CTL_ERR_UNWANTED_RD_EDGE(__x) \
+	DSI_VAL2REG(DSI_CMD_MODE_STS_CTL, ERR_UNWANTED_RD_EDGE, __x)
+#define DSI_CMD_MODE_STS_CTL_CSM_RUNNING_EDGE_SHIFT 21
+#define DSI_CMD_MODE_STS_CTL_CSM_RUNNING_EDGE_MASK 0x00200000
+#define DSI_CMD_MODE_STS_CTL_CSM_RUNNING_EDGE(__x) \
+	DSI_VAL2REG(DSI_CMD_MODE_STS_CTL, CSM_RUNNING_EDGE, __x)
+#define DSI_DIRECT_CMD_STS_CTL 0x000000F8
+#define DSI_DIRECT_CMD_STS_CTL_CMD_TRANSMISSION_EN_SHIFT 0
+#define DSI_DIRECT_CMD_STS_CTL_CMD_TRANSMISSION_EN_MASK 0x00000001
+#define DSI_DIRECT_CMD_STS_CTL_CMD_TRANSMISSION_EN(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_STS_CTL, CMD_TRANSMISSION_EN, __x)
+#define DSI_DIRECT_CMD_STS_CTL_WRITE_COMPLETED_EN_SHIFT 1
+#define DSI_DIRECT_CMD_STS_CTL_WRITE_COMPLETED_EN_MASK 0x00000002
+#define DSI_DIRECT_CMD_STS_CTL_WRITE_COMPLETED_EN(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_STS_CTL, WRITE_COMPLETED_EN, __x)
+#define DSI_DIRECT_CMD_STS_CTL_TRIGGER_COMPLETED_EN_SHIFT 2
+#define DSI_DIRECT_CMD_STS_CTL_TRIGGER_COMPLETED_EN_MASK 0x00000004
+#define DSI_DIRECT_CMD_STS_CTL_TRIGGER_COMPLETED_EN(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_STS_CTL, TRIGGER_COMPLETED_EN, __x)
+#define DSI_DIRECT_CMD_STS_CTL_READ_COMPLETED_EN_SHIFT 3
+#define DSI_DIRECT_CMD_STS_CTL_READ_COMPLETED_EN_MASK 0x00000008
+#define DSI_DIRECT_CMD_STS_CTL_READ_COMPLETED_EN(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_STS_CTL, READ_COMPLETED_EN, __x)
+#define DSI_DIRECT_CMD_STS_CTL_ACKNOWLEDGE_RECEIVED_EN_SHIFT 4
+#define DSI_DIRECT_CMD_STS_CTL_ACKNOWLEDGE_RECEIVED_EN_MASK 0x00000010
+#define DSI_DIRECT_CMD_STS_CTL_ACKNOWLEDGE_RECEIVED_EN(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_STS_CTL, ACKNOWLEDGE_RECEIVED_EN, __x)
+#define DSI_DIRECT_CMD_STS_CTL_ACKNOWLEDGE_WITH_ERR_EN_SHIFT 5
+#define DSI_DIRECT_CMD_STS_CTL_ACKNOWLEDGE_WITH_ERR_EN_MASK 0x00000020
+#define DSI_DIRECT_CMD_STS_CTL_ACKNOWLEDGE_WITH_ERR_EN(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_STS_CTL, ACKNOWLEDGE_WITH_ERR_EN, __x)
+#define DSI_DIRECT_CMD_STS_CTL_TRIGGER_RECEIVED_EN_SHIFT 6
+#define DSI_DIRECT_CMD_STS_CTL_TRIGGER_RECEIVED_EN_MASK 0x00000040
+#define DSI_DIRECT_CMD_STS_CTL_TRIGGER_RECEIVED_EN(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_STS_CTL, TRIGGER_RECEIVED_EN, __x)
+#define DSI_DIRECT_CMD_STS_CTL_TE_RECEIVED_EN_SHIFT 7
+#define DSI_DIRECT_CMD_STS_CTL_TE_RECEIVED_EN_MASK 0x00000080
+#define DSI_DIRECT_CMD_STS_CTL_TE_RECEIVED_EN(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_STS_CTL, TE_RECEIVED_EN, __x)
+#define DSI_DIRECT_CMD_STS_CTL_BTA_COMPLETED_EN_SHIFT 8
+#define DSI_DIRECT_CMD_STS_CTL_BTA_COMPLETED_EN_MASK 0x00000100
+#define DSI_DIRECT_CMD_STS_CTL_BTA_COMPLETED_EN(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_STS_CTL, BTA_COMPLETED_EN, __x)
+#define DSI_DIRECT_CMD_STS_CTL_BTA_FINISHED_EN_SHIFT 9
+#define DSI_DIRECT_CMD_STS_CTL_BTA_FINISHED_EN_MASK 0x00000200
+#define DSI_DIRECT_CMD_STS_CTL_BTA_FINISHED_EN(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_STS_CTL, BTA_FINISHED_EN, __x)
+#define DSI_DIRECT_CMD_STS_CTL_READ_COMPLETED_WITH_ERR_EN_SHIFT 10
+#define DSI_DIRECT_CMD_STS_CTL_READ_COMPLETED_WITH_ERR_EN_MASK 0x00000400
+#define DSI_DIRECT_CMD_STS_CTL_READ_COMPLETED_WITH_ERR_EN(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_STS_CTL, READ_COMPLETED_WITH_ERR_EN, __x)
+#define DSI_DIRECT_CMD_STS_CTL_CMD_TRANSMISSION_EDGE_SHIFT 16
+#define DSI_DIRECT_CMD_STS_CTL_CMD_TRANSMISSION_EDGE_MASK 0x00010000
+#define DSI_DIRECT_CMD_STS_CTL_CMD_TRANSMISSION_EDGE(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_STS_CTL, CMD_TRANSMISSION_EDGE, __x)
+#define DSI_DIRECT_CMD_STS_CTL_WRITE_COMPLETED_EDGE_SHIFT 17
+#define DSI_DIRECT_CMD_STS_CTL_WRITE_COMPLETED_EDGE_MASK 0x00020000
+#define DSI_DIRECT_CMD_STS_CTL_WRITE_COMPLETED_EDGE(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_STS_CTL, WRITE_COMPLETED_EDGE, __x)
+#define DSI_DIRECT_CMD_STS_CTL_TRIGGER_COMPLETED_EDGE_SHIFT 18
+#define DSI_DIRECT_CMD_STS_CTL_TRIGGER_COMPLETED_EDGE_MASK 0x00040000
+#define DSI_DIRECT_CMD_STS_CTL_TRIGGER_COMPLETED_EDGE(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_STS_CTL, TRIGGER_COMPLETED_EDGE, __x)
+#define DSI_DIRECT_CMD_STS_CTL_READ_COMPLETED_EDGE_SHIFT 19
+#define DSI_DIRECT_CMD_STS_CTL_READ_COMPLETED_EDGE_MASK 0x00080000
+#define DSI_DIRECT_CMD_STS_CTL_READ_COMPLETED_EDGE(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_STS_CTL, READ_COMPLETED_EDGE, __x)
+#define DSI_DIRECT_CMD_STS_CTL_ACKNOWLEDGE_RECEIVED_EDGE_SHIFT 20
+#define DSI_DIRECT_CMD_STS_CTL_ACKNOWLEDGE_RECEIVED_EDGE_MASK 0x00100000
+#define DSI_DIRECT_CMD_STS_CTL_ACKNOWLEDGE_RECEIVED_EDGE(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_STS_CTL, ACKNOWLEDGE_RECEIVED_EDGE, __x)
+#define DSI_DIRECT_CMD_STS_CTL_ACKNOWLEDGE_WITH_ERR_EDGE_SHIFT 21
+#define DSI_DIRECT_CMD_STS_CTL_ACKNOWLEDGE_WITH_ERR_EDGE_MASK 0x00200000
+#define DSI_DIRECT_CMD_STS_CTL_ACKNOWLEDGE_WITH_ERR_EDGE(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_STS_CTL, ACKNOWLEDGE_WITH_ERR_EDGE, __x)
+#define DSI_DIRECT_CMD_STS_CTL_TRIGGER_RECEIVED_EDGE_SHIFT 22
+#define DSI_DIRECT_CMD_STS_CTL_TRIGGER_RECEIVED_EDGE_MASK 0x00400000
+#define DSI_DIRECT_CMD_STS_CTL_TRIGGER_RECEIVED_EDGE(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_STS_CTL, TRIGGER_RECEIVED_EDGE, __x)
+#define DSI_DIRECT_CMD_STS_CTL_TE_RECEIVED_EDGE_SHIFT 23
+#define DSI_DIRECT_CMD_STS_CTL_TE_RECEIVED_EDGE_MASK 0x00800000
+#define DSI_DIRECT_CMD_STS_CTL_TE_RECEIVED_EDGE(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_STS_CTL, TE_RECEIVED_EDGE, __x)
+#define DSI_DIRECT_CMD_STS_CTL_BTA_COMPLETED_EDGE_SHIFT 24
+#define DSI_DIRECT_CMD_STS_CTL_BTA_COMPLETED_EDGE_MASK 0x01000000
+#define DSI_DIRECT_CMD_STS_CTL_BTA_COMPLETED_EDGE(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_STS_CTL, BTA_COMPLETED_EDGE, __x)
+#define DSI_DIRECT_CMD_STS_CTL_BTA_FINISHED_EDGE_SHIFT 25
+#define DSI_DIRECT_CMD_STS_CTL_BTA_FINISHED_EDGE_MASK 0x02000000
+#define DSI_DIRECT_CMD_STS_CTL_BTA_FINISHED_EDGE(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_STS_CTL, BTA_FINISHED_EDGE, __x)
+#define DSI_DIRECT_CMD_STS_CTL_READ_COMPLETED_WITH_ERR_EDGE_SHIFT 26
+#define DSI_DIRECT_CMD_STS_CTL_READ_COMPLETED_WITH_ERR_EDGE_MASK 0x04000000
+#define DSI_DIRECT_CMD_STS_CTL_READ_COMPLETED_WITH_ERR_EDGE(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_STS_CTL, READ_COMPLETED_WITH_ERR_EDGE, __x)
+#define DSI_DIRECT_CMD_RD_STS_CTL 0x000000FC
+#define DSI_DIRECT_CMD_RD_STS_CTL_ERR_FIXED_EN_SHIFT 0
+#define DSI_DIRECT_CMD_RD_STS_CTL_ERR_FIXED_EN_MASK 0x00000001
+#define DSI_DIRECT_CMD_RD_STS_CTL_ERR_FIXED_EN(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_RD_STS_CTL, ERR_FIXED_EN, __x)
+#define DSI_DIRECT_CMD_RD_STS_CTL_ERR_UNCORRECTABLE_EN_SHIFT 1
+#define DSI_DIRECT_CMD_RD_STS_CTL_ERR_UNCORRECTABLE_EN_MASK 0x00000002
+#define DSI_DIRECT_CMD_RD_STS_CTL_ERR_UNCORRECTABLE_EN(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_RD_STS_CTL, ERR_UNCORRECTABLE_EN, __x)
+#define DSI_DIRECT_CMD_RD_STS_CTL_ERR_CHECKSUM_EN_SHIFT 2
+#define DSI_DIRECT_CMD_RD_STS_CTL_ERR_CHECKSUM_EN_MASK 0x00000004
+#define DSI_DIRECT_CMD_RD_STS_CTL_ERR_CHECKSUM_EN(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_RD_STS_CTL, ERR_CHECKSUM_EN, __x)
+#define DSI_DIRECT_CMD_RD_STS_CTL_ERR_UNDECODABLE_EN_SHIFT 3
+#define DSI_DIRECT_CMD_RD_STS_CTL_ERR_UNDECODABLE_EN_MASK 0x00000008
+#define DSI_DIRECT_CMD_RD_STS_CTL_ERR_UNDECODABLE_EN(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_RD_STS_CTL, ERR_UNDECODABLE_EN, __x)
+#define DSI_DIRECT_CMD_RD_STS_CTL_ERR_RECEIVE_EN_SHIFT 4
+#define DSI_DIRECT_CMD_RD_STS_CTL_ERR_RECEIVE_EN_MASK 0x00000010
+#define DSI_DIRECT_CMD_RD_STS_CTL_ERR_RECEIVE_EN(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_RD_STS_CTL, ERR_RECEIVE_EN, __x)
+#define DSI_DIRECT_CMD_RD_STS_CTL_ERR_OVERSIZE_EN_SHIFT 5
+#define DSI_DIRECT_CMD_RD_STS_CTL_ERR_OVERSIZE_EN_MASK 0x00000020
+#define DSI_DIRECT_CMD_RD_STS_CTL_ERR_OVERSIZE_EN(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_RD_STS_CTL, ERR_OVERSIZE_EN, __x)
+#define DSI_DIRECT_CMD_RD_STS_CTL_ERR_WRONG_LENGTH_EN_SHIFT 6
+#define DSI_DIRECT_CMD_RD_STS_CTL_ERR_WRONG_LENGTH_EN_MASK 0x00000040
+#define DSI_DIRECT_CMD_RD_STS_CTL_ERR_WRONG_LENGTH_EN(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_RD_STS_CTL, ERR_WRONG_LENGTH_EN, __x)
+#define DSI_DIRECT_CMD_RD_STS_CTL_ERR_MISSING_EOT_EN_SHIFT 7
+#define DSI_DIRECT_CMD_RD_STS_CTL_ERR_MISSING_EOT_EN_MASK 0x00000080
+#define DSI_DIRECT_CMD_RD_STS_CTL_ERR_MISSING_EOT_EN(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_RD_STS_CTL, ERR_MISSING_EOT_EN, __x)
+#define DSI_DIRECT_CMD_RD_STS_CTL_ERR_EOT_WITH_ERR_EN_SHIFT 8
+#define DSI_DIRECT_CMD_RD_STS_CTL_ERR_EOT_WITH_ERR_EN_MASK 0x00000100
+#define DSI_DIRECT_CMD_RD_STS_CTL_ERR_EOT_WITH_ERR_EN(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_RD_STS_CTL, ERR_EOT_WITH_ERR_EN, __x)
+#define DSI_DIRECT_CMD_RD_STS_CTL_ERR_FIXED_EDGE_SHIFT 16
+#define DSI_DIRECT_CMD_RD_STS_CTL_ERR_FIXED_EDGE_MASK 0x00010000
+#define DSI_DIRECT_CMD_RD_STS_CTL_ERR_FIXED_EDGE(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_RD_STS_CTL, ERR_FIXED_EDGE, __x)
+#define DSI_DIRECT_CMD_RD_STS_CTL_ERR_UNCORRECTABLE_EDGE_SHIFT 17
+#define DSI_DIRECT_CMD_RD_STS_CTL_ERR_UNCORRECTABLE_EDGE_MASK 0x00020000
+#define DSI_DIRECT_CMD_RD_STS_CTL_ERR_UNCORRECTABLE_EDGE(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_RD_STS_CTL, ERR_UNCORRECTABLE_EDGE, __x)
+#define DSI_DIRECT_CMD_RD_STS_CTL_ERR_CHECKSUM_EDGE_SHIFT 18
+#define DSI_DIRECT_CMD_RD_STS_CTL_ERR_CHECKSUM_EDGE_MASK 0x00040000
+#define DSI_DIRECT_CMD_RD_STS_CTL_ERR_CHECKSUM_EDGE(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_RD_STS_CTL, ERR_CHECKSUM_EDGE, __x)
+#define DSI_DIRECT_CMD_RD_STS_CTL_ERR_UNDECODABLE_EDGE_SHIFT 19
+#define DSI_DIRECT_CMD_RD_STS_CTL_ERR_UNDECODABLE_EDGE_MASK 0x00080000
+#define DSI_DIRECT_CMD_RD_STS_CTL_ERR_UNDECODABLE_EDGE(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_RD_STS_CTL, ERR_UNDECODABLE_EDGE, __x)
+#define DSI_DIRECT_CMD_RD_STS_CTL_ERR_RECEIVE_EDGE_SHIFT 20
+#define DSI_DIRECT_CMD_RD_STS_CTL_ERR_RECEIVE_EDGE_MASK 0x00100000
+#define DSI_DIRECT_CMD_RD_STS_CTL_ERR_RECEIVE_EDGE(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_RD_STS_CTL, ERR_RECEIVE_EDGE, __x)
+#define DSI_DIRECT_CMD_RD_STS_CTL_ERR_OVERSIZE_EDGE_SHIFT 21
+#define DSI_DIRECT_CMD_RD_STS_CTL_ERR_OVERSIZE_EDGE_MASK 0x00200000
+#define DSI_DIRECT_CMD_RD_STS_CTL_ERR_OVERSIZE_EDGE(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_RD_STS_CTL, ERR_OVERSIZE_EDGE, __x)
+#define DSI_DIRECT_CMD_RD_STS_CTL_ERR_WRONG_LENGTH_EDGE_SHIFT 22
+#define DSI_DIRECT_CMD_RD_STS_CTL_ERR_WRONG_LENGTH_EDGE_MASK 0x00400000
+#define DSI_DIRECT_CMD_RD_STS_CTL_ERR_WRONG_LENGTH_EDGE(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_RD_STS_CTL, ERR_WRONG_LENGTH_EDGE, __x)
+#define DSI_DIRECT_CMD_RD_STS_CTL_ERR_MISSING_EOT_EDGE_SHIFT 23
+#define DSI_DIRECT_CMD_RD_STS_CTL_ERR_MISSING_EOT_EDGE_MASK 0x00800000
+#define DSI_DIRECT_CMD_RD_STS_CTL_ERR_MISSING_EOT_EDGE(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_RD_STS_CTL, ERR_MISSING_EOT_EDGE, __x)
+#define DSI_DIRECT_CMD_RD_STS_CTL_ERR_EOT_WITH_ERR_EDGE_SHIFT 24
+#define DSI_DIRECT_CMD_RD_STS_CTL_ERR_EOT_WITH_ERR_EDGE_MASK 0x01000000
+#define DSI_DIRECT_CMD_RD_STS_CTL_ERR_EOT_WITH_ERR_EDGE(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_RD_STS_CTL, ERR_EOT_WITH_ERR_EDGE, __x)
+#define DSI_VID_MODE_STS_CTL 0x00000100
+#define DSI_VID_MODE_STS_CTL_VSG_RUNNING_EN_SHIFT 0
+#define DSI_VID_MODE_STS_CTL_VSG_RUNNING_EN_MASK 0x00000001
+#define DSI_VID_MODE_STS_CTL_VSG_RUNNING_EN(__x) \
+	DSI_VAL2REG(DSI_VID_MODE_STS_CTL, VSG_RUNNING_EN, __x)
+#define DSI_VID_MODE_STS_CTL_ERR_MISSING_DATA_EN_SHIFT 1
+#define DSI_VID_MODE_STS_CTL_ERR_MISSING_DATA_EN_MASK 0x00000002
+#define DSI_VID_MODE_STS_CTL_ERR_MISSING_DATA_EN(__x) \
+	DSI_VAL2REG(DSI_VID_MODE_STS_CTL, ERR_MISSING_DATA_EN, __x)
+#define DSI_VID_MODE_STS_CTL_ERR_MISSING_HSYNC_EN_SHIFT 2
+#define DSI_VID_MODE_STS_CTL_ERR_MISSING_HSYNC_EN_MASK 0x00000004
+#define DSI_VID_MODE_STS_CTL_ERR_MISSING_HSYNC_EN(__x) \
+	DSI_VAL2REG(DSI_VID_MODE_STS_CTL, ERR_MISSING_HSYNC_EN, __x)
+#define DSI_VID_MODE_STS_CTL_ERR_MISSING_VSYNC_EN_SHIFT 3
+#define DSI_VID_MODE_STS_CTL_ERR_MISSING_VSYNC_EN_MASK 0x00000008
+#define DSI_VID_MODE_STS_CTL_ERR_MISSING_VSYNC_EN(__x) \
+	DSI_VAL2REG(DSI_VID_MODE_STS_CTL, ERR_MISSING_VSYNC_EN, __x)
+#define DSI_VID_MODE_STS_CTL_REG_ERR_SMALL_LENGTH_EN_SHIFT 4
+#define DSI_VID_MODE_STS_CTL_REG_ERR_SMALL_LENGTH_EN_MASK 0x00000010
+#define DSI_VID_MODE_STS_CTL_REG_ERR_SMALL_LENGTH_EN(__x) \
+	DSI_VAL2REG(DSI_VID_MODE_STS_CTL, REG_ERR_SMALL_LENGTH_EN, __x)
+#define DSI_VID_MODE_STS_CTL_REG_ERR_SMALL_HEIGHT_EN_SHIFT 5
+#define DSI_VID_MODE_STS_CTL_REG_ERR_SMALL_HEIGHT_EN_MASK 0x00000020
+#define DSI_VID_MODE_STS_CTL_REG_ERR_SMALL_HEIGHT_EN(__x) \
+	DSI_VAL2REG(DSI_VID_MODE_STS_CTL, REG_ERR_SMALL_HEIGHT_EN, __x)
+#define DSI_VID_MODE_STS_CTL_ERR_BURSTWRITE_EN_SHIFT 6
+#define DSI_VID_MODE_STS_CTL_ERR_BURSTWRITE_EN_MASK 0x00000040
+#define DSI_VID_MODE_STS_CTL_ERR_BURSTWRITE_EN(__x) \
+	DSI_VAL2REG(DSI_VID_MODE_STS_CTL, ERR_BURSTWRITE_EN, __x)
+#define DSI_VID_MODE_STS_CTL_ERR_LONGWRITE_EN_SHIFT 7
+#define DSI_VID_MODE_STS_CTL_ERR_LONGWRITE_EN_MASK 0x00000080
+#define DSI_VID_MODE_STS_CTL_ERR_LONGWRITE_EN(__x) \
+	DSI_VAL2REG(DSI_VID_MODE_STS_CTL, ERR_LONGWRITE_EN, __x)
+#define DSI_VID_MODE_STS_CTL_ERR_LONGREAD_EN_SHIFT 8
+#define DSI_VID_MODE_STS_CTL_ERR_LONGREAD_EN_MASK 0x00000100
+#define DSI_VID_MODE_STS_CTL_ERR_LONGREAD_EN(__x) \
+	DSI_VAL2REG(DSI_VID_MODE_STS_CTL, ERR_LONGREAD_EN, __x)
+#define DSI_VID_MODE_STS_CTL_ERR_VRS_WRONG_LENGTH_EN_SHIFT 9
+#define DSI_VID_MODE_STS_CTL_ERR_VRS_WRONG_LENGTH_EN_MASK 0x00000200
+#define DSI_VID_MODE_STS_CTL_ERR_VRS_WRONG_LENGTH_EN(__x) \
+	DSI_VAL2REG(DSI_VID_MODE_STS_CTL, ERR_VRS_WRONG_LENGTH_EN, __x)
+#define DSI_VID_MODE_STS_CTL_VSG_RUNNING_EDGE_SHIFT 16
+#define DSI_VID_MODE_STS_CTL_VSG_RUNNING_EDGE_MASK 0x00010000
+#define DSI_VID_MODE_STS_CTL_VSG_RUNNING_EDGE(__x) \
+	DSI_VAL2REG(DSI_VID_MODE_STS_CTL, VSG_RUNNING_EDGE, __x)
+#define DSI_VID_MODE_STS_CTL_ERR_MISSING_DATA_EDGE_SHIFT 17
+#define DSI_VID_MODE_STS_CTL_ERR_MISSING_DATA_EDGE_MASK 0x00020000
+#define DSI_VID_MODE_STS_CTL_ERR_MISSING_DATA_EDGE(__x) \
+	DSI_VAL2REG(DSI_VID_MODE_STS_CTL, ERR_MISSING_DATA_EDGE, __x)
+#define DSI_VID_MODE_STS_CTL_ERR_MISSING_HSYNC_EDGE_SHIFT 18
+#define DSI_VID_MODE_STS_CTL_ERR_MISSING_HSYNC_EDGE_MASK 0x00040000
+#define DSI_VID_MODE_STS_CTL_ERR_MISSING_HSYNC_EDGE(__x) \
+	DSI_VAL2REG(DSI_VID_MODE_STS_CTL, ERR_MISSING_HSYNC_EDGE, __x)
+#define DSI_VID_MODE_STS_CTL_ERR_MISSING_VSYNC_EDGE_SHIFT 19
+#define DSI_VID_MODE_STS_CTL_ERR_MISSING_VSYNC_EDGE_MASK 0x00080000
+#define DSI_VID_MODE_STS_CTL_ERR_MISSING_VSYNC_EDGE(__x) \
+	DSI_VAL2REG(DSI_VID_MODE_STS_CTL, ERR_MISSING_VSYNC_EDGE, __x)
+#define DSI_VID_MODE_STS_CTL_REG_ERR_SMALL_LENGTH_EDGE_SHIFT 20
+#define DSI_VID_MODE_STS_CTL_REG_ERR_SMALL_LENGTH_EDGE_MASK 0x00100000
+#define DSI_VID_MODE_STS_CTL_REG_ERR_SMALL_LENGTH_EDGE(__x) \
+	DSI_VAL2REG(DSI_VID_MODE_STS_CTL, REG_ERR_SMALL_LENGTH_EDGE, __x)
+#define DSI_VID_MODE_STS_CTL_REG_ERR_SMALL_HEIGHT_EDGE_SHIFT 21
+#define DSI_VID_MODE_STS_CTL_REG_ERR_SMALL_HEIGHT_EDGE_MASK 0x00200000
+#define DSI_VID_MODE_STS_CTL_REG_ERR_SMALL_HEIGHT_EDGE(__x) \
+	DSI_VAL2REG(DSI_VID_MODE_STS_CTL, REG_ERR_SMALL_HEIGHT_EDGE, __x)
+#define DSI_VID_MODE_STS_CTL_ERR_BURSTWRITE_EDGE_SHIFT 22
+#define DSI_VID_MODE_STS_CTL_ERR_BURSTWRITE_EDGE_MASK 0x00400000
+#define DSI_VID_MODE_STS_CTL_ERR_BURSTWRITE_EDGE(__x) \
+	DSI_VAL2REG(DSI_VID_MODE_STS_CTL, ERR_BURSTWRITE_EDGE, __x)
+#define DSI_VID_MODE_STS_CTL_ERR_LONGWRITE_EDGE_SHIFT 23
+#define DSI_VID_MODE_STS_CTL_ERR_LONGWRITE_EDGE_MASK 0x00800000
+#define DSI_VID_MODE_STS_CTL_ERR_LONGWRITE_EDGE(__x) \
+	DSI_VAL2REG(DSI_VID_MODE_STS_CTL, ERR_LONGWRITE_EDGE, __x)
+#define DSI_VID_MODE_STS_CTL_ERR_LONGREAD_EDGE_SHIFT 24
+#define DSI_VID_MODE_STS_CTL_ERR_LONGREAD_EDGE_MASK 0x01000000
+#define DSI_VID_MODE_STS_CTL_ERR_LONGREAD_EDGE(__x) \
+	DSI_VAL2REG(DSI_VID_MODE_STS_CTL, ERR_LONGREAD_EDGE, __x)
+#define DSI_VID_MODE_STS_CTL_ERR_VRS_WRONG_LENGTH_EDGE_SHIFT 25
+#define DSI_VID_MODE_STS_CTL_ERR_VRS_WRONG_LENGTH_EDGE_MASK 0x02000000
+#define DSI_VID_MODE_STS_CTL_ERR_VRS_WRONG_LENGTH_EDGE(__x) \
+	DSI_VAL2REG(DSI_VID_MODE_STS_CTL, ERR_VRS_WRONG_LENGTH_EDGE, __x)
+#define DSI_VID_MODE_STS_CTL_VSG_RECOVERY_EDGE_SHIFT 26
+#define DSI_VID_MODE_STS_CTL_VSG_RECOVERY_EDGE_MASK 0x04000000
+#define DSI_VID_MODE_STS_CTL_VSG_RECOVERY_EDGE(__x) \
+	DSI_VAL2REG(DSI_VID_MODE_STS_CTL, VSG_RECOVERY_EDGE, __x)
+#define DSI_TG_STS_CTL 0x00000104
+#define DSI_TG_STS_CTL_TVG_STS_EN_SHIFT 0
+#define DSI_TG_STS_CTL_TVG_STS_EN_MASK 0x00000001
+#define DSI_TG_STS_CTL_TVG_STS_EN(__x) \
+	DSI_VAL2REG(DSI_TG_STS_CTL, TVG_STS_EN, __x)
+#define DSI_TG_STS_CTL_TBG_STS_EN_SHIFT 1
+#define DSI_TG_STS_CTL_TBG_STS_EN_MASK 0x00000002
+#define DSI_TG_STS_CTL_TBG_STS_EN(__x) \
+	DSI_VAL2REG(DSI_TG_STS_CTL, TBG_STS_EN, __x)
+#define DSI_TG_STS_CTL_TVG_STS_EDGE_SHIFT 16
+#define DSI_TG_STS_CTL_TVG_STS_EDGE_MASK 0x00010000
+#define DSI_TG_STS_CTL_TVG_STS_EDGE(__x) \
+	DSI_VAL2REG(DSI_TG_STS_CTL, TVG_STS_EDGE, __x)
+#define DSI_TG_STS_CTL_TBG_STS_EDGE_SHIFT 17
+#define DSI_TG_STS_CTL_TBG_STS_EDGE_MASK 0x00020000
+#define DSI_TG_STS_CTL_TBG_STS_EDGE(__x) \
+	DSI_VAL2REG(DSI_TG_STS_CTL, TBG_STS_EDGE, __x)
+#define DSI_MCTL_DHPY_ERR_CTL 0x00000108
+#define DSI_MCTL_DHPY_ERR_CTL_ERR_ESC_1_EN_SHIFT 6
+#define DSI_MCTL_DHPY_ERR_CTL_ERR_ESC_1_EN_MASK 0x00000040
+#define DSI_MCTL_DHPY_ERR_CTL_ERR_ESC_1_EN(__x) \
+	DSI_VAL2REG(DSI_MCTL_DHPY_ERR_CTL, ERR_ESC_1_EN, __x)
+#define DSI_MCTL_DHPY_ERR_CTL_ERR_ESC_2_EN_SHIFT 7
+#define DSI_MCTL_DHPY_ERR_CTL_ERR_ESC_2_EN_MASK 0x00000080
+#define DSI_MCTL_DHPY_ERR_CTL_ERR_ESC_2_EN(__x) \
+	DSI_VAL2REG(DSI_MCTL_DHPY_ERR_CTL, ERR_ESC_2_EN, __x)
+#define DSI_MCTL_DHPY_ERR_CTL_ERR_SYNCESC_1_EN_SHIFT 8
+#define DSI_MCTL_DHPY_ERR_CTL_ERR_SYNCESC_1_EN_MASK 0x00000100
+#define DSI_MCTL_DHPY_ERR_CTL_ERR_SYNCESC_1_EN(__x) \
+	DSI_VAL2REG(DSI_MCTL_DHPY_ERR_CTL, ERR_SYNCESC_1_EN, __x)
+#define DSI_MCTL_DHPY_ERR_CTL_ERR_SYNCESC_2_EN_SHIFT 9
+#define DSI_MCTL_DHPY_ERR_CTL_ERR_SYNCESC_2_EN_MASK 0x00000200
+#define DSI_MCTL_DHPY_ERR_CTL_ERR_SYNCESC_2_EN(__x) \
+	DSI_VAL2REG(DSI_MCTL_DHPY_ERR_CTL, ERR_SYNCESC_2_EN, __x)
+#define DSI_MCTL_DHPY_ERR_CTL_ERR_CONTROL_1_EN_SHIFT 10
+#define DSI_MCTL_DHPY_ERR_CTL_ERR_CONTROL_1_EN_MASK 0x00000400
+#define DSI_MCTL_DHPY_ERR_CTL_ERR_CONTROL_1_EN(__x) \
+	DSI_VAL2REG(DSI_MCTL_DHPY_ERR_CTL, ERR_CONTROL_1_EN, __x)
+#define DSI_MCTL_DHPY_ERR_CTL_ERR_CONTROL_2_EN_SHIFT 11
+#define DSI_MCTL_DHPY_ERR_CTL_ERR_CONTROL_2_EN_MASK 0x00000800
+#define DSI_MCTL_DHPY_ERR_CTL_ERR_CONTROL_2_EN(__x) \
+	DSI_VAL2REG(DSI_MCTL_DHPY_ERR_CTL, ERR_CONTROL_2_EN, __x)
+#define DSI_MCTL_DHPY_ERR_CTL_ERR_CONT_LP0_1_EN_SHIFT 12
+#define DSI_MCTL_DHPY_ERR_CTL_ERR_CONT_LP0_1_EN_MASK 0x00001000
+#define DSI_MCTL_DHPY_ERR_CTL_ERR_CONT_LP0_1_EN(__x) \
+	DSI_VAL2REG(DSI_MCTL_DHPY_ERR_CTL, ERR_CONT_LP0_1_EN, __x)
+#define DSI_MCTL_DHPY_ERR_CTL_ERR_CONT_LP0_2_EN_SHIFT 13
+#define DSI_MCTL_DHPY_ERR_CTL_ERR_CONT_LP0_2_EN_MASK 0x00002000
+#define DSI_MCTL_DHPY_ERR_CTL_ERR_CONT_LP0_2_EN(__x) \
+	DSI_VAL2REG(DSI_MCTL_DHPY_ERR_CTL, ERR_CONT_LP0_2_EN, __x)
+#define DSI_MCTL_DHPY_ERR_CTL_ERR_CONT_LP1_1_EN_SHIFT 14
+#define DSI_MCTL_DHPY_ERR_CTL_ERR_CONT_LP1_1_EN_MASK 0x00004000
+#define DSI_MCTL_DHPY_ERR_CTL_ERR_CONT_LP1_1_EN(__x) \
+	DSI_VAL2REG(DSI_MCTL_DHPY_ERR_CTL, ERR_CONT_LP1_1_EN, __x)
+#define DSI_MCTL_DHPY_ERR_CTL_ERR_CONT_LP1_2_EN_SHIFT 15
+#define DSI_MCTL_DHPY_ERR_CTL_ERR_CONT_LP1_2_EN_MASK 0x00008000
+#define DSI_MCTL_DHPY_ERR_CTL_ERR_CONT_LP1_2_EN(__x) \
+	DSI_VAL2REG(DSI_MCTL_DHPY_ERR_CTL, ERR_CONT_LP1_2_EN, __x)
+#define DSI_MCTL_DHPY_ERR_CTL_ERR_ESC_1_EDGE_SHIFT 22
+#define DSI_MCTL_DHPY_ERR_CTL_ERR_ESC_1_EDGE_MASK 0x00400000
+#define DSI_MCTL_DHPY_ERR_CTL_ERR_ESC_1_EDGE(__x) \
+	DSI_VAL2REG(DSI_MCTL_DHPY_ERR_CTL, ERR_ESC_1_EDGE, __x)
+#define DSI_MCTL_DHPY_ERR_CTL_ERR_ESC_2_EDGE_SHIFT 23
+#define DSI_MCTL_DHPY_ERR_CTL_ERR_ESC_2_EDGE_MASK 0x00800000
+#define DSI_MCTL_DHPY_ERR_CTL_ERR_ESC_2_EDGE(__x) \
+	DSI_VAL2REG(DSI_MCTL_DHPY_ERR_CTL, ERR_ESC_2_EDGE, __x)
+#define DSI_MCTL_DHPY_ERR_CTL_ERR_SYNCESC_1_EDGE_SHIFT 24
+#define DSI_MCTL_DHPY_ERR_CTL_ERR_SYNCESC_1_EDGE_MASK 0x01000000
+#define DSI_MCTL_DHPY_ERR_CTL_ERR_SYNCESC_1_EDGE(__x) \
+	DSI_VAL2REG(DSI_MCTL_DHPY_ERR_CTL, ERR_SYNCESC_1_EDGE, __x)
+#define DSI_MCTL_DHPY_ERR_CTL_ERR_SYNCESC_2_EDGE_SHIFT 25
+#define DSI_MCTL_DHPY_ERR_CTL_ERR_SYNCESC_2_EDGE_MASK 0x02000000
+#define DSI_MCTL_DHPY_ERR_CTL_ERR_SYNCESC_2_EDGE(__x) \
+	DSI_VAL2REG(DSI_MCTL_DHPY_ERR_CTL, ERR_SYNCESC_2_EDGE, __x)
+#define DSI_MCTL_DHPY_ERR_CTL_ERR_CONTROL_1_EDGE_SHIFT 26
+#define DSI_MCTL_DHPY_ERR_CTL_ERR_CONTROL_1_EDGE_MASK 0x04000000
+#define DSI_MCTL_DHPY_ERR_CTL_ERR_CONTROL_1_EDGE(__x) \
+	DSI_VAL2REG(DSI_MCTL_DHPY_ERR_CTL, ERR_CONTROL_1_EDGE, __x)
+#define DSI_MCTL_DHPY_ERR_CTL_ERR_CONTROL_2_EDGE_SHIFT 27
+#define DSI_MCTL_DHPY_ERR_CTL_ERR_CONTROL_2_EDGE_MASK 0x08000000
+#define DSI_MCTL_DHPY_ERR_CTL_ERR_CONTROL_2_EDGE(__x) \
+	DSI_VAL2REG(DSI_MCTL_DHPY_ERR_CTL, ERR_CONTROL_2_EDGE, __x)
+#define DSI_MCTL_DHPY_ERR_CTL_ERR_CONT_LP0_1_EDGE_SHIFT 28
+#define DSI_MCTL_DHPY_ERR_CTL_ERR_CONT_LP0_1_EDGE_MASK 0x10000000
+#define DSI_MCTL_DHPY_ERR_CTL_ERR_CONT_LP0_1_EDGE(__x) \
+	DSI_VAL2REG(DSI_MCTL_DHPY_ERR_CTL, ERR_CONT_LP0_1_EDGE, __x)
+#define DSI_MCTL_DHPY_ERR_CTL_ERR_CONT_LP0_2_EDGE_SHIFT 29
+#define DSI_MCTL_DHPY_ERR_CTL_ERR_CONT_LP0_2_EDGE_MASK 0x20000000
+#define DSI_MCTL_DHPY_ERR_CTL_ERR_CONT_LP0_2_EDGE(__x) \
+	DSI_VAL2REG(DSI_MCTL_DHPY_ERR_CTL, ERR_CONT_LP0_2_EDGE, __x)
+#define DSI_MCTL_DHPY_ERR_CTL_ERR_CONT_LP1_1_EDGE_SHIFT 30
+#define DSI_MCTL_DHPY_ERR_CTL_ERR_CONT_LP1_1_EDGE_MASK 0x40000000
+#define DSI_MCTL_DHPY_ERR_CTL_ERR_CONT_LP1_1_EDGE(__x) \
+	DSI_VAL2REG(DSI_MCTL_DHPY_ERR_CTL, ERR_CONT_LP1_1_EDGE, __x)
+#define DSI_MCTL_DHPY_ERR_CTL_ERR_CONT_LP1_2_EDGE_SHIFT 31
+#define DSI_MCTL_DHPY_ERR_CTL_ERR_CONT_LP1_2_EDGE_MASK 0x80000000
+#define DSI_MCTL_DHPY_ERR_CTL_ERR_CONT_LP1_2_EDGE(__x) \
+	DSI_VAL2REG(DSI_MCTL_DHPY_ERR_CTL, ERR_CONT_LP1_2_EDGE, __x)
+#define DSI_MCTL_MAIN_STS_CLR 0x00000110
+#define DSI_MCTL_MAIN_STS_CLR_PLL_LOCK_CLR_SHIFT 0
+#define DSI_MCTL_MAIN_STS_CLR_PLL_LOCK_CLR_MASK 0x00000001
+#define DSI_MCTL_MAIN_STS_CLR_PLL_LOCK_CLR(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_STS_CLR, PLL_LOCK_CLR, __x)
+#define DSI_MCTL_MAIN_STS_CLR_CLKLANE_READY_CLR_SHIFT 1
+#define DSI_MCTL_MAIN_STS_CLR_CLKLANE_READY_CLR_MASK 0x00000002
+#define DSI_MCTL_MAIN_STS_CLR_CLKLANE_READY_CLR(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_STS_CLR, CLKLANE_READY_CLR, __x)
+#define DSI_MCTL_MAIN_STS_CLR_DAT1_READY_CLR_SHIFT 2
+#define DSI_MCTL_MAIN_STS_CLR_DAT1_READY_CLR_MASK 0x00000004
+#define DSI_MCTL_MAIN_STS_CLR_DAT1_READY_CLR(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_STS_CLR, DAT1_READY_CLR, __x)
+#define DSI_MCTL_MAIN_STS_CLR_DAT2_READY_CLR_SHIFT 3
+#define DSI_MCTL_MAIN_STS_CLR_DAT2_READY_CLR_MASK 0x00000008
+#define DSI_MCTL_MAIN_STS_CLR_DAT2_READY_CLR(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_STS_CLR, DAT2_READY_CLR, __x)
+#define DSI_MCTL_MAIN_STS_CLR_HSTX_TO_ERR_CLR_SHIFT 4
+#define DSI_MCTL_MAIN_STS_CLR_HSTX_TO_ERR_CLR_MASK 0x00000010
+#define DSI_MCTL_MAIN_STS_CLR_HSTX_TO_ERR_CLR(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_STS_CLR, HSTX_TO_ERR_CLR, __x)
+#define DSI_MCTL_MAIN_STS_CLR_LPRX_TO_ERR_CLR_SHIFT 5
+#define DSI_MCTL_MAIN_STS_CLR_LPRX_TO_ERR_CLR_MASK 0x00000020
+#define DSI_MCTL_MAIN_STS_CLR_LPRX_TO_ERR_CLR(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_STS_CLR, LPRX_TO_ERR_CLR, __x)
+#define DSI_MCTL_MAIN_STS_CLR_CRS_UNTERM_PCK_CLR_SHIFT 6
+#define DSI_MCTL_MAIN_STS_CLR_CRS_UNTERM_PCK_CLR_MASK 0x00000040
+#define DSI_MCTL_MAIN_STS_CLR_CRS_UNTERM_PCK_CLR(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_STS_CLR, CRS_UNTERM_PCK_CLR, __x)
+#define DSI_MCTL_MAIN_STS_CLR_VRS_UNTERM_PCK_CLR_SHIFT 7
+#define DSI_MCTL_MAIN_STS_CLR_VRS_UNTERM_PCK_CLR_MASK 0x00000080
+#define DSI_MCTL_MAIN_STS_CLR_VRS_UNTERM_PCK_CLR(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_STS_CLR, VRS_UNTERM_PCK_CLR, __x)
+#define DSI_CMD_MODE_STS_CLR 0x00000114
+#define DSI_CMD_MODE_STS_CLR_ERR_NO_TE_CLR_SHIFT 0
+#define DSI_CMD_MODE_STS_CLR_ERR_NO_TE_CLR_MASK 0x00000001
+#define DSI_CMD_MODE_STS_CLR_ERR_NO_TE_CLR(__x) \
+	DSI_VAL2REG(DSI_CMD_MODE_STS_CLR, ERR_NO_TE_CLR, __x)
+#define DSI_CMD_MODE_STS_CLR_ERR_TE_MISS_CLR_SHIFT 1
+#define DSI_CMD_MODE_STS_CLR_ERR_TE_MISS_CLR_MASK 0x00000002
+#define DSI_CMD_MODE_STS_CLR_ERR_TE_MISS_CLR(__x) \
+	DSI_VAL2REG(DSI_CMD_MODE_STS_CLR, ERR_TE_MISS_CLR, __x)
+#define DSI_CMD_MODE_STS_CLR_ERR_SDI1_UNDERRUN_CLR_SHIFT 2
+#define DSI_CMD_MODE_STS_CLR_ERR_SDI1_UNDERRUN_CLR_MASK 0x00000004
+#define DSI_CMD_MODE_STS_CLR_ERR_SDI1_UNDERRUN_CLR(__x) \
+	DSI_VAL2REG(DSI_CMD_MODE_STS_CLR, ERR_SDI1_UNDERRUN_CLR, __x)
+#define DSI_CMD_MODE_STS_CLR_ERR_SDI2_UNDERRUN_CLR_SHIFT 3
+#define DSI_CMD_MODE_STS_CLR_ERR_SDI2_UNDERRUN_CLR_MASK 0x00000008
+#define DSI_CMD_MODE_STS_CLR_ERR_SDI2_UNDERRUN_CLR(__x) \
+	DSI_VAL2REG(DSI_CMD_MODE_STS_CLR, ERR_SDI2_UNDERRUN_CLR, __x)
+#define DSI_CMD_MODE_STS_CLR_ERR_UNWANTED_RD_CLR_SHIFT 4
+#define DSI_CMD_MODE_STS_CLR_ERR_UNWANTED_RD_CLR_MASK 0x00000010
+#define DSI_CMD_MODE_STS_CLR_ERR_UNWANTED_RD_CLR(__x) \
+	DSI_VAL2REG(DSI_CMD_MODE_STS_CLR, ERR_UNWANTED_RD_CLR, __x)
+#define DSI_CMD_MODE_STS_CLR_CSM_RUNNING_CLR_SHIFT 5
+#define DSI_CMD_MODE_STS_CLR_CSM_RUNNING_CLR_MASK 0x00000020
+#define DSI_CMD_MODE_STS_CLR_CSM_RUNNING_CLR(__x) \
+	DSI_VAL2REG(DSI_CMD_MODE_STS_CLR, CSM_RUNNING_CLR, __x)
+#define DSI_DIRECT_CMD_STS_CLR 0x00000118
+#define DSI_DIRECT_CMD_STS_CLR_CMD_TRANSMISSION_CLR_SHIFT 0
+#define DSI_DIRECT_CMD_STS_CLR_CMD_TRANSMISSION_CLR_MASK 0x00000001
+#define DSI_DIRECT_CMD_STS_CLR_CMD_TRANSMISSION_CLR(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_STS_CLR, CMD_TRANSMISSION_CLR, __x)
+#define DSI_DIRECT_CMD_STS_CLR_WRITE_COMPLETED_CLR_SHIFT 1
+#define DSI_DIRECT_CMD_STS_CLR_WRITE_COMPLETED_CLR_MASK 0x00000002
+#define DSI_DIRECT_CMD_STS_CLR_WRITE_COMPLETED_CLR(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_STS_CLR, WRITE_COMPLETED_CLR, __x)
+#define DSI_DIRECT_CMD_STS_CLR_TRIGGER_COMPLETED_CLR_SHIFT 2
+#define DSI_DIRECT_CMD_STS_CLR_TRIGGER_COMPLETED_CLR_MASK 0x00000004
+#define DSI_DIRECT_CMD_STS_CLR_TRIGGER_COMPLETED_CLR(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_STS_CLR, TRIGGER_COMPLETED_CLR, __x)
+#define DSI_DIRECT_CMD_STS_CLR_READ_COMPLETED_CLR_SHIFT 3
+#define DSI_DIRECT_CMD_STS_CLR_READ_COMPLETED_CLR_MASK 0x00000008
+#define DSI_DIRECT_CMD_STS_CLR_READ_COMPLETED_CLR(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_STS_CLR, READ_COMPLETED_CLR, __x)
+#define DSI_DIRECT_CMD_STS_CLR_ACKNOWLEDGE_RECEIVED_CLR_SHIFT 4
+#define DSI_DIRECT_CMD_STS_CLR_ACKNOWLEDGE_RECEIVED_CLR_MASK 0x00000010
+#define DSI_DIRECT_CMD_STS_CLR_ACKNOWLEDGE_RECEIVED_CLR(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_STS_CLR, ACKNOWLEDGE_RECEIVED_CLR, __x)
+#define DSI_DIRECT_CMD_STS_CLR_ACKNOWLEDGE_WITH_ERR_RECEIVED_CLR_SHIFT 5
+#define DSI_DIRECT_CMD_STS_CLR_ACKNOWLEDGE_WITH_ERR_RECEIVED_CLR_MASK 0x00000020
+#define DSI_DIRECT_CMD_STS_CLR_ACKNOWLEDGE_WITH_ERR_RECEIVED_CLR(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_STS_CLR, ACKNOWLEDGE_WITH_ERR_RECEIVED_CLR, __x)
+#define DSI_DIRECT_CMD_STS_CLR_TRIGGER_RECEIVED_CLR_SHIFT 6
+#define DSI_DIRECT_CMD_STS_CLR_TRIGGER_RECEIVED_CLR_MASK 0x00000040
+#define DSI_DIRECT_CMD_STS_CLR_TRIGGER_RECEIVED_CLR(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_STS_CLR, TRIGGER_RECEIVED_CLR, __x)
+#define DSI_DIRECT_CMD_STS_CLR_TE_RECEIVED_CLR_SHIFT 7
+#define DSI_DIRECT_CMD_STS_CLR_TE_RECEIVED_CLR_MASK 0x00000080
+#define DSI_DIRECT_CMD_STS_CLR_TE_RECEIVED_CLR(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_STS_CLR, TE_RECEIVED_CLR, __x)
+#define DSI_DIRECT_CMD_STS_CLR_BTA_COMPLETED_CLR_SHIFT 8
+#define DSI_DIRECT_CMD_STS_CLR_BTA_COMPLETED_CLR_MASK 0x00000100
+#define DSI_DIRECT_CMD_STS_CLR_BTA_COMPLETED_CLR(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_STS_CLR, BTA_COMPLETED_CLR, __x)
+#define DSI_DIRECT_CMD_STS_CLR_BTA_FINISHED_CLR_SHIFT 9
+#define DSI_DIRECT_CMD_STS_CLR_BTA_FINISHED_CLR_MASK 0x00000200
+#define DSI_DIRECT_CMD_STS_CLR_BTA_FINISHED_CLR(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_STS_CLR, BTA_FINISHED_CLR, __x)
+#define DSI_DIRECT_CMD_STS_CLR_READ_COMPLETED_WITH_ERR_CLR_SHIFT 10
+#define DSI_DIRECT_CMD_STS_CLR_READ_COMPLETED_WITH_ERR_CLR_MASK 0x00000400
+#define DSI_DIRECT_CMD_STS_CLR_READ_COMPLETED_WITH_ERR_CLR(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_STS_CLR, READ_COMPLETED_WITH_ERR_CLR, __x)
+#define DSI_DIRECT_CMD_RD_STS_CLR 0x0000011C
+#define DSI_DIRECT_CMD_RD_STS_CLR_ERR_FIXED_CLR_SHIFT 0
+#define DSI_DIRECT_CMD_RD_STS_CLR_ERR_FIXED_CLR_MASK 0x00000001
+#define DSI_DIRECT_CMD_RD_STS_CLR_ERR_FIXED_CLR(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_RD_STS_CLR, ERR_FIXED_CLR, __x)
+#define DSI_DIRECT_CMD_RD_STS_CLR_ERR_UNCORRECTABLE_CLR_SHIFT 1
+#define DSI_DIRECT_CMD_RD_STS_CLR_ERR_UNCORRECTABLE_CLR_MASK 0x00000002
+#define DSI_DIRECT_CMD_RD_STS_CLR_ERR_UNCORRECTABLE_CLR(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_RD_STS_CLR, ERR_UNCORRECTABLE_CLR, __x)
+#define DSI_DIRECT_CMD_RD_STS_CLR_ERR_CHECKSUM_CLR_SHIFT 2
+#define DSI_DIRECT_CMD_RD_STS_CLR_ERR_CHECKSUM_CLR_MASK 0x00000004
+#define DSI_DIRECT_CMD_RD_STS_CLR_ERR_CHECKSUM_CLR(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_RD_STS_CLR, ERR_CHECKSUM_CLR, __x)
+#define DSI_DIRECT_CMD_RD_STS_CLR_ERR_UNDECODABLE_CLR_SHIFT 3
+#define DSI_DIRECT_CMD_RD_STS_CLR_ERR_UNDECODABLE_CLR_MASK 0x00000008
+#define DSI_DIRECT_CMD_RD_STS_CLR_ERR_UNDECODABLE_CLR(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_RD_STS_CLR, ERR_UNDECODABLE_CLR, __x)
+#define DSI_DIRECT_CMD_RD_STS_CLR_ERR_RECEIVE_CLR_SHIFT 4
+#define DSI_DIRECT_CMD_RD_STS_CLR_ERR_RECEIVE_CLR_MASK 0x00000010
+#define DSI_DIRECT_CMD_RD_STS_CLR_ERR_RECEIVE_CLR(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_RD_STS_CLR, ERR_RECEIVE_CLR, __x)
+#define DSI_DIRECT_CMD_RD_STS_CLR_ERR_OVERSIZE_CLR_SHIFT 5
+#define DSI_DIRECT_CMD_RD_STS_CLR_ERR_OVERSIZE_CLR_MASK 0x00000020
+#define DSI_DIRECT_CMD_RD_STS_CLR_ERR_OVERSIZE_CLR(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_RD_STS_CLR, ERR_OVERSIZE_CLR, __x)
+#define DSI_DIRECT_CMD_RD_STS_CLR_ERR_WRONG_LENGTH_CLR_SHIFT 6
+#define DSI_DIRECT_CMD_RD_STS_CLR_ERR_WRONG_LENGTH_CLR_MASK 0x00000040
+#define DSI_DIRECT_CMD_RD_STS_CLR_ERR_WRONG_LENGTH_CLR(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_RD_STS_CLR, ERR_WRONG_LENGTH_CLR, __x)
+#define DSI_DIRECT_CMD_RD_STS_CLR_ERR_MISSING_EOT_CLR_SHIFT 7
+#define DSI_DIRECT_CMD_RD_STS_CLR_ERR_MISSING_EOT_CLR_MASK 0x00000080
+#define DSI_DIRECT_CMD_RD_STS_CLR_ERR_MISSING_EOT_CLR(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_RD_STS_CLR, ERR_MISSING_EOT_CLR, __x)
+#define DSI_DIRECT_CMD_RD_STS_CLR_ERR_EOT_WITH_ERR_CLR_SHIFT 8
+#define DSI_DIRECT_CMD_RD_STS_CLR_ERR_EOT_WITH_ERR_CLR_MASK 0x00000100
+#define DSI_DIRECT_CMD_RD_STS_CLR_ERR_EOT_WITH_ERR_CLR(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_RD_STS_CLR, ERR_EOT_WITH_ERR_CLR, __x)
+#define DSI_VID_MODE_STS_CLR 0x00000120
+#define DSI_VID_MODE_STS_CLR_VSG_STS_CLR_SHIFT 0
+#define DSI_VID_MODE_STS_CLR_VSG_STS_CLR_MASK 0x00000001
+#define DSI_VID_MODE_STS_CLR_VSG_STS_CLR(__x) \
+	DSI_VAL2REG(DSI_VID_MODE_STS_CLR, VSG_STS_CLR, __x)
+#define DSI_VID_MODE_STS_CLR_ERR_MISSING_DATA_CLR_SHIFT 1
+#define DSI_VID_MODE_STS_CLR_ERR_MISSING_DATA_CLR_MASK 0x00000002
+#define DSI_VID_MODE_STS_CLR_ERR_MISSING_DATA_CLR(__x) \
+	DSI_VAL2REG(DSI_VID_MODE_STS_CLR, ERR_MISSING_DATA_CLR, __x)
+#define DSI_VID_MODE_STS_CLR_ERR_MISSING_HSYNC_CLR_SHIFT 2
+#define DSI_VID_MODE_STS_CLR_ERR_MISSING_HSYNC_CLR_MASK 0x00000004
+#define DSI_VID_MODE_STS_CLR_ERR_MISSING_HSYNC_CLR(__x) \
+	DSI_VAL2REG(DSI_VID_MODE_STS_CLR, ERR_MISSING_HSYNC_CLR, __x)
+#define DSI_VID_MODE_STS_CLR_ERR_MISSING_VSYNC_CLR_SHIFT 3
+#define DSI_VID_MODE_STS_CLR_ERR_MISSING_VSYNC_CLR_MASK 0x00000008
+#define DSI_VID_MODE_STS_CLR_ERR_MISSING_VSYNC_CLR(__x) \
+	DSI_VAL2REG(DSI_VID_MODE_STS_CLR, ERR_MISSING_VSYNC_CLR, __x)
+#define DSI_VID_MODE_STS_CLR_REG_ERR_SMALL_LENGTH_CLR_SHIFT 4
+#define DSI_VID_MODE_STS_CLR_REG_ERR_SMALL_LENGTH_CLR_MASK 0x00000010
+#define DSI_VID_MODE_STS_CLR_REG_ERR_SMALL_LENGTH_CLR(__x) \
+	DSI_VAL2REG(DSI_VID_MODE_STS_CLR, REG_ERR_SMALL_LENGTH_CLR, __x)
+#define DSI_VID_MODE_STS_CLR_REG_ERR_SMALL_HEIGHT_CLR_SHIFT 5
+#define DSI_VID_MODE_STS_CLR_REG_ERR_SMALL_HEIGHT_CLR_MASK 0x00000020
+#define DSI_VID_MODE_STS_CLR_REG_ERR_SMALL_HEIGHT_CLR(__x) \
+	DSI_VAL2REG(DSI_VID_MODE_STS_CLR, REG_ERR_SMALL_HEIGHT_CLR, __x)
+#define DSI_VID_MODE_STS_CLR_ERR_BURSTWRITE_CLR_SHIFT 6
+#define DSI_VID_MODE_STS_CLR_ERR_BURSTWRITE_CLR_MASK 0x00000040
+#define DSI_VID_MODE_STS_CLR_ERR_BURSTWRITE_CLR(__x) \
+	DSI_VAL2REG(DSI_VID_MODE_STS_CLR, ERR_BURSTWRITE_CLR, __x)
+#define DSI_VID_MODE_STS_CLR_ERR_LONGWRITE_CLR_SHIFT 7
+#define DSI_VID_MODE_STS_CLR_ERR_LONGWRITE_CLR_MASK 0x00000080
+#define DSI_VID_MODE_STS_CLR_ERR_LONGWRITE_CLR(__x) \
+	DSI_VAL2REG(DSI_VID_MODE_STS_CLR, ERR_LONGWRITE_CLR, __x)
+#define DSI_VID_MODE_STS_CLR_ERR_LONGREAD_CLR_SHIFT 8
+#define DSI_VID_MODE_STS_CLR_ERR_LONGREAD_CLR_MASK 0x00000100
+#define DSI_VID_MODE_STS_CLR_ERR_LONGREAD_CLR(__x) \
+	DSI_VAL2REG(DSI_VID_MODE_STS_CLR, ERR_LONGREAD_CLR, __x)
+#define DSI_VID_MODE_STS_CLR_ERR_VRS_WRONG_LENGTH_CLR_SHIFT 9
+#define DSI_VID_MODE_STS_CLR_ERR_VRS_WRONG_LENGTH_CLR_MASK 0x00000200
+#define DSI_VID_MODE_STS_CLR_ERR_VRS_WRONG_LENGTH_CLR(__x) \
+	DSI_VAL2REG(DSI_VID_MODE_STS_CLR, ERR_VRS_WRONG_LENGTH_CLR, __x)
+#define DSI_VID_MODE_STS_CLR_VSG_RECOVERY_CLR_SHIFT 10
+#define DSI_VID_MODE_STS_CLR_VSG_RECOVERY_CLR_MASK 0x00000400
+#define DSI_VID_MODE_STS_CLR_VSG_RECOVERY_CLR(__x) \
+	DSI_VAL2REG(DSI_VID_MODE_STS_CLR, VSG_RECOVERY_CLR, __x)
+#define DSI_TG_STS_CLR 0x00000124
+#define DSI_TG_STS_CLR_TVG_STS_CLR_SHIFT 0
+#define DSI_TG_STS_CLR_TVG_STS_CLR_MASK 0x00000001
+#define DSI_TG_STS_CLR_TVG_STS_CLR(__x) \
+	DSI_VAL2REG(DSI_TG_STS_CLR, TVG_STS_CLR, __x)
+#define DSI_TG_STS_CLR_TBG_STS_CLR_SHIFT 1
+#define DSI_TG_STS_CLR_TBG_STS_CLR_MASK 0x00000002
+#define DSI_TG_STS_CLR_TBG_STS_CLR(__x) \
+	DSI_VAL2REG(DSI_TG_STS_CLR, TBG_STS_CLR, __x)
+#define DSI_MCTL_DPHY_ERR_CLR 0x00000128
+#define DSI_MCTL_DPHY_ERR_CLR_ERR_ESC_1_CLR_SHIFT 6
+#define DSI_MCTL_DPHY_ERR_CLR_ERR_ESC_1_CLR_MASK 0x00000040
+#define DSI_MCTL_DPHY_ERR_CLR_ERR_ESC_1_CLR(__x) \
+	DSI_VAL2REG(DSI_MCTL_DPHY_ERR_CLR, ERR_ESC_1_CLR, __x)
+#define DSI_MCTL_DPHY_ERR_CLR_ERR_ESC_2_CLR_SHIFT 7
+#define DSI_MCTL_DPHY_ERR_CLR_ERR_ESC_2_CLR_MASK 0x00000080
+#define DSI_MCTL_DPHY_ERR_CLR_ERR_ESC_2_CLR(__x) \
+	DSI_VAL2REG(DSI_MCTL_DPHY_ERR_CLR, ERR_ESC_2_CLR, __x)
+#define DSI_MCTL_DPHY_ERR_CLR_ERR_SYNCESC_1_CLR_SHIFT 8
+#define DSI_MCTL_DPHY_ERR_CLR_ERR_SYNCESC_1_CLR_MASK 0x00000100
+#define DSI_MCTL_DPHY_ERR_CLR_ERR_SYNCESC_1_CLR(__x) \
+	DSI_VAL2REG(DSI_MCTL_DPHY_ERR_CLR, ERR_SYNCESC_1_CLR, __x)
+#define DSI_MCTL_DPHY_ERR_CLR_ERR_SYNCESC_2_CLR_SHIFT 9
+#define DSI_MCTL_DPHY_ERR_CLR_ERR_SYNCESC_2_CLR_MASK 0x00000200
+#define DSI_MCTL_DPHY_ERR_CLR_ERR_SYNCESC_2_CLR(__x) \
+	DSI_VAL2REG(DSI_MCTL_DPHY_ERR_CLR, ERR_SYNCESC_2_CLR, __x)
+#define DSI_MCTL_DPHY_ERR_CLR_ERR_CONTROL_1_CLR_SHIFT 10
+#define DSI_MCTL_DPHY_ERR_CLR_ERR_CONTROL_1_CLR_MASK 0x00000400
+#define DSI_MCTL_DPHY_ERR_CLR_ERR_CONTROL_1_CLR(__x) \
+	DSI_VAL2REG(DSI_MCTL_DPHY_ERR_CLR, ERR_CONTROL_1_CLR, __x)
+#define DSI_MCTL_DPHY_ERR_CLR_ERR_CONTROL_2_CLR_SHIFT 11
+#define DSI_MCTL_DPHY_ERR_CLR_ERR_CONTROL_2_CLR_MASK 0x00000800
+#define DSI_MCTL_DPHY_ERR_CLR_ERR_CONTROL_2_CLR(__x) \
+	DSI_VAL2REG(DSI_MCTL_DPHY_ERR_CLR, ERR_CONTROL_2_CLR, __x)
+#define DSI_MCTL_DPHY_ERR_CLR_ERR_CONT_LP0_1_CLR_SHIFT 12
+#define DSI_MCTL_DPHY_ERR_CLR_ERR_CONT_LP0_1_CLR_MASK 0x00001000
+#define DSI_MCTL_DPHY_ERR_CLR_ERR_CONT_LP0_1_CLR(__x) \
+	DSI_VAL2REG(DSI_MCTL_DPHY_ERR_CLR, ERR_CONT_LP0_1_CLR, __x)
+#define DSI_MCTL_DPHY_ERR_CLR_ERR_CONT_LP0_2_CLR_SHIFT 13
+#define DSI_MCTL_DPHY_ERR_CLR_ERR_CONT_LP0_2_CLR_MASK 0x00002000
+#define DSI_MCTL_DPHY_ERR_CLR_ERR_CONT_LP0_2_CLR(__x) \
+	DSI_VAL2REG(DSI_MCTL_DPHY_ERR_CLR, ERR_CONT_LP0_2_CLR, __x)
+#define DSI_MCTL_DPHY_ERR_CLR_ERR_CONT_LP1_1_CLR_SHIFT 14
+#define DSI_MCTL_DPHY_ERR_CLR_ERR_CONT_LP1_1_CLR_MASK 0x00004000
+#define DSI_MCTL_DPHY_ERR_CLR_ERR_CONT_LP1_1_CLR(__x) \
+	DSI_VAL2REG(DSI_MCTL_DPHY_ERR_CLR, ERR_CONT_LP1_1_CLR, __x)
+#define DSI_MCTL_DPHY_ERR_CLR_ERR_CONT_LP1_2_CLR_SHIFT 15
+#define DSI_MCTL_DPHY_ERR_CLR_ERR_CONT_LP1_2_CLR_MASK 0x00008000
+#define DSI_MCTL_DPHY_ERR_CLR_ERR_CONT_LP1_2_CLR(__x) \
+	DSI_VAL2REG(DSI_MCTL_DPHY_ERR_CLR, ERR_CONT_LP1_2_CLR, __x)
+#define DSI_MCTL_MAIN_STS_FLAG 0x00000130
+#define DSI_MCTL_MAIN_STS_FLAG_PLL_LOCK_FLAG_SHIFT 0
+#define DSI_MCTL_MAIN_STS_FLAG_PLL_LOCK_FLAG_MASK 0x00000001
+#define DSI_MCTL_MAIN_STS_FLAG_PLL_LOCK_FLAG(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_STS_FLAG, PLL_LOCK_FLAG, __x)
+#define DSI_MCTL_MAIN_STS_FLAG_CLKLANE_READY_FLAG_SHIFT 1
+#define DSI_MCTL_MAIN_STS_FLAG_CLKLANE_READY_FLAG_MASK 0x00000002
+#define DSI_MCTL_MAIN_STS_FLAG_CLKLANE_READY_FLAG(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_STS_FLAG, CLKLANE_READY_FLAG, __x)
+#define DSI_MCTL_MAIN_STS_FLAG_DAT1_READY_FLAG_SHIFT 2
+#define DSI_MCTL_MAIN_STS_FLAG_DAT1_READY_FLAG_MASK 0x00000004
+#define DSI_MCTL_MAIN_STS_FLAG_DAT1_READY_FLAG(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_STS_FLAG, DAT1_READY_FLAG, __x)
+#define DSI_MCTL_MAIN_STS_FLAG_DAT2_READY_FLAG_SHIFT 3
+#define DSI_MCTL_MAIN_STS_FLAG_DAT2_READY_FLAG_MASK 0x00000008
+#define DSI_MCTL_MAIN_STS_FLAG_DAT2_READY_FLAG(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_STS_FLAG, DAT2_READY_FLAG, __x)
+#define DSI_MCTL_MAIN_STS_FLAG_HSTX_TO_ERR_FLAG_SHIFT 4
+#define DSI_MCTL_MAIN_STS_FLAG_HSTX_TO_ERR_FLAG_MASK 0x00000010
+#define DSI_MCTL_MAIN_STS_FLAG_HSTX_TO_ERR_FLAG(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_STS_FLAG, HSTX_TO_ERR_FLAG, __x)
+#define DSI_MCTL_MAIN_STS_FLAG_LPRX_TO_ERR_FLAG_SHIFT 5
+#define DSI_MCTL_MAIN_STS_FLAG_LPRX_TO_ERR_FLAG_MASK 0x00000020
+#define DSI_MCTL_MAIN_STS_FLAG_LPRX_TO_ERR_FLAG(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_STS_FLAG, LPRX_TO_ERR_FLAG, __x)
+#define DSI_MCTL_MAIN_STS_FLAG_CRS_UNTERM_PCK_FLAG_SHIFT 6
+#define DSI_MCTL_MAIN_STS_FLAG_CRS_UNTERM_PCK_FLAG_MASK 0x00000040
+#define DSI_MCTL_MAIN_STS_FLAG_CRS_UNTERM_PCK_FLAG(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_STS_FLAG, CRS_UNTERM_PCK_FLAG, __x)
+#define DSI_MCTL_MAIN_STS_FLAG_VRS_UNTERM_PCK_FLAG_SHIFT 7
+#define DSI_MCTL_MAIN_STS_FLAG_VRS_UNTERM_PCK_FLAG_MASK 0x00000080
+#define DSI_MCTL_MAIN_STS_FLAG_VRS_UNTERM_PCK_FLAG(__x) \
+	DSI_VAL2REG(DSI_MCTL_MAIN_STS_FLAG, VRS_UNTERM_PCK_FLAG, __x)
+#define DSI_CMD_MODE_STS_FLAG 0x00000134
+#define DSI_CMD_MODE_STS_FLAG_ERR_NO_TE_FLAG_SHIFT 0
+#define DSI_CMD_MODE_STS_FLAG_ERR_NO_TE_FLAG_MASK 0x00000001
+#define DSI_CMD_MODE_STS_FLAG_ERR_NO_TE_FLAG(__x) \
+	DSI_VAL2REG(DSI_CMD_MODE_STS_FLAG, ERR_NO_TE_FLAG, __x)
+#define DSI_CMD_MODE_STS_FLAG_ERR_TE_MISS_FLAG_SHIFT 1
+#define DSI_CMD_MODE_STS_FLAG_ERR_TE_MISS_FLAG_MASK 0x00000002
+#define DSI_CMD_MODE_STS_FLAG_ERR_TE_MISS_FLAG(__x) \
+	DSI_VAL2REG(DSI_CMD_MODE_STS_FLAG, ERR_TE_MISS_FLAG, __x)
+#define DSI_CMD_MODE_STS_FLAG_ERR_SDI1_UNDERRUN_FLAG_SHIFT 2
+#define DSI_CMD_MODE_STS_FLAG_ERR_SDI1_UNDERRUN_FLAG_MASK 0x00000004
+#define DSI_CMD_MODE_STS_FLAG_ERR_SDI1_UNDERRUN_FLAG(__x) \
+	DSI_VAL2REG(DSI_CMD_MODE_STS_FLAG, ERR_SDI1_UNDERRUN_FLAG, __x)
+#define DSI_CMD_MODE_STS_FLAG_ERR_SDI2_UNDERRUN_FLAG_SHIFT 3
+#define DSI_CMD_MODE_STS_FLAG_ERR_SDI2_UNDERRUN_FLAG_MASK 0x00000008
+#define DSI_CMD_MODE_STS_FLAG_ERR_SDI2_UNDERRUN_FLAG(__x) \
+	DSI_VAL2REG(DSI_CMD_MODE_STS_FLAG, ERR_SDI2_UNDERRUN_FLAG, __x)
+#define DSI_CMD_MODE_STS_FLAG_ERR_UNWANTED_RD_FLAG_SHIFT 4
+#define DSI_CMD_MODE_STS_FLAG_ERR_UNWANTED_RD_FLAG_MASK 0x00000010
+#define DSI_CMD_MODE_STS_FLAG_ERR_UNWANTED_RD_FLAG(__x) \
+	DSI_VAL2REG(DSI_CMD_MODE_STS_FLAG, ERR_UNWANTED_RD_FLAG, __x)
+#define DSI_CMD_MODE_STS_FLAG_CSM_RUNNING_FLAG_SHIFT 5
+#define DSI_CMD_MODE_STS_FLAG_CSM_RUNNING_FLAG_MASK 0x00000020
+#define DSI_CMD_MODE_STS_FLAG_CSM_RUNNING_FLAG(__x) \
+	DSI_VAL2REG(DSI_CMD_MODE_STS_FLAG, CSM_RUNNING_FLAG, __x)
+#define DSI_DIRECT_CMD_STS_FLAG 0x00000138
+#define DSI_DIRECT_CMD_STS_FLAG_CMD_TRANSMISSION_FLAG_SHIFT 0
+#define DSI_DIRECT_CMD_STS_FLAG_CMD_TRANSMISSION_FLAG_MASK 0x00000001
+#define DSI_DIRECT_CMD_STS_FLAG_CMD_TRANSMISSION_FLAG(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_STS_FLAG, CMD_TRANSMISSION_FLAG, __x)
+#define DSI_DIRECT_CMD_STS_FLAG_WRITE_COMPLETED_FLAG_SHIFT 1
+#define DSI_DIRECT_CMD_STS_FLAG_WRITE_COMPLETED_FLAG_MASK 0x00000002
+#define DSI_DIRECT_CMD_STS_FLAG_WRITE_COMPLETED_FLAG(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_STS_FLAG, WRITE_COMPLETED_FLAG, __x)
+#define DSI_DIRECT_CMD_STS_FLAG_TRIGGER_COMPLETED_FLAG_SHIFT 2
+#define DSI_DIRECT_CMD_STS_FLAG_TRIGGER_COMPLETED_FLAG_MASK 0x00000004
+#define DSI_DIRECT_CMD_STS_FLAG_TRIGGER_COMPLETED_FLAG(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_STS_FLAG, TRIGGER_COMPLETED_FLAG, __x)
+#define DSI_DIRECT_CMD_STS_FLAG_READ_COMPLETED_FLAG_SHIFT 3
+#define DSI_DIRECT_CMD_STS_FLAG_READ_COMPLETED_FLAG_MASK 0x00000008
+#define DSI_DIRECT_CMD_STS_FLAG_READ_COMPLETED_FLAG(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_STS_FLAG, READ_COMPLETED_FLAG, __x)
+#define DSI_DIRECT_CMD_STS_FLAG_ACKNOWLEDGE_RECEIVED_FLAG_SHIFT 4
+#define DSI_DIRECT_CMD_STS_FLAG_ACKNOWLEDGE_RECEIVED_FLAG_MASK 0x00000010
+#define DSI_DIRECT_CMD_STS_FLAG_ACKNOWLEDGE_RECEIVED_FLAG(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_STS_FLAG, ACKNOWLEDGE_RECEIVED_FLAG, __x)
+#define DSI_DIRECT_CMD_STS_FLAG_ACKNOWLEDGE_WITH_ERR_RECEIVED_FLAG_SHIFT 5
+#define DSI_DIRECT_CMD_STS_FLAG_ACKNOWLEDGE_WITH_ERR_RECEIVED_FLAG_MASK 0x00000020
+#define DSI_DIRECT_CMD_STS_FLAG_ACKNOWLEDGE_WITH_ERR_RECEIVED_FLAG(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_STS_FLAG, ACKNOWLEDGE_WITH_ERR_RECEIVED_FLAG, __x)
+#define DSI_DIRECT_CMD_STS_FLAG_TRIGGER_RECEIVED_FLAG_SHIFT 6
+#define DSI_DIRECT_CMD_STS_FLAG_TRIGGER_RECEIVED_FLAG_MASK 0x00000040
+#define DSI_DIRECT_CMD_STS_FLAG_TRIGGER_RECEIVED_FLAG(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_STS_FLAG, TRIGGER_RECEIVED_FLAG, __x)
+#define DSI_DIRECT_CMD_STS_FLAG_TE_RECEIVED_FLAG_SHIFT 7
+#define DSI_DIRECT_CMD_STS_FLAG_TE_RECEIVED_FLAG_MASK 0x00000080
+#define DSI_DIRECT_CMD_STS_FLAG_TE_RECEIVED_FLAG(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_STS_FLAG, TE_RECEIVED_FLAG, __x)
+#define DSI_DIRECT_CMD_STS_FLAG_BTA_COMPLETED_FLAG_SHIFT 8
+#define DSI_DIRECT_CMD_STS_FLAG_BTA_COMPLETED_FLAG_MASK 0x00000100
+#define DSI_DIRECT_CMD_STS_FLAG_BTA_COMPLETED_FLAG(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_STS_FLAG, BTA_COMPLETED_FLAG, __x)
+#define DSI_DIRECT_CMD_STS_FLAG_BTA_FINISHED_FLAG_SHIFT 9
+#define DSI_DIRECT_CMD_STS_FLAG_BTA_FINISHED_FLAG_MASK 0x00000200
+#define DSI_DIRECT_CMD_STS_FLAG_BTA_FINISHED_FLAG(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_STS_FLAG, BTA_FINISHED_FLAG, __x)
+#define DSI_DIRECT_CMD_STS_FLAG_READ_COMPLETED_WITH_ERR_FLAG_SHIFT 10
+#define DSI_DIRECT_CMD_STS_FLAG_READ_COMPLETED_WITH_ERR_FLAG_MASK 0x00000400
+#define DSI_DIRECT_CMD_STS_FLAG_READ_COMPLETED_WITH_ERR_FLAG(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_STS_FLAG, READ_COMPLETED_WITH_ERR_FLAG, __x)
+#define DSI_DIRECT_CMD_RD_STS_FLAG 0x0000013C
+#define DSI_DIRECT_CMD_RD_STS_FLAG_ERR_FIXED_FLAG_SHIFT 0
+#define DSI_DIRECT_CMD_RD_STS_FLAG_ERR_FIXED_FLAG_MASK 0x00000001
+#define DSI_DIRECT_CMD_RD_STS_FLAG_ERR_FIXED_FLAG(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_RD_STS_FLAG, ERR_FIXED_FLAG, __x)
+#define DSI_DIRECT_CMD_RD_STS_FLAG_ERR_UNCORRECTABLE_FLAG_SHIFT 1
+#define DSI_DIRECT_CMD_RD_STS_FLAG_ERR_UNCORRECTABLE_FLAG_MASK 0x00000002
+#define DSI_DIRECT_CMD_RD_STS_FLAG_ERR_UNCORRECTABLE_FLAG(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_RD_STS_FLAG, ERR_UNCORRECTABLE_FLAG, __x)
+#define DSI_DIRECT_CMD_RD_STS_FLAG_ERR_CHECKSUM_FLAG_SHIFT 2
+#define DSI_DIRECT_CMD_RD_STS_FLAG_ERR_CHECKSUM_FLAG_MASK 0x00000004
+#define DSI_DIRECT_CMD_RD_STS_FLAG_ERR_CHECKSUM_FLAG(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_RD_STS_FLAG, ERR_CHECKSUM_FLAG, __x)
+#define DSI_DIRECT_CMD_RD_STS_FLAG_ERR_UNDECODABLE_FLAG_SHIFT 3
+#define DSI_DIRECT_CMD_RD_STS_FLAG_ERR_UNDECODABLE_FLAG_MASK 0x00000008
+#define DSI_DIRECT_CMD_RD_STS_FLAG_ERR_UNDECODABLE_FLAG(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_RD_STS_FLAG, ERR_UNDECODABLE_FLAG, __x)
+#define DSI_DIRECT_CMD_RD_STS_FLAG_ERR_RECEIVE_FLAG_SHIFT 4
+#define DSI_DIRECT_CMD_RD_STS_FLAG_ERR_RECEIVE_FLAG_MASK 0x00000010
+#define DSI_DIRECT_CMD_RD_STS_FLAG_ERR_RECEIVE_FLAG(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_RD_STS_FLAG, ERR_RECEIVE_FLAG, __x)
+#define DSI_DIRECT_CMD_RD_STS_FLAG_ERR_OVERSIZE_FLAG_SHIFT 5
+#define DSI_DIRECT_CMD_RD_STS_FLAG_ERR_OVERSIZE_FLAG_MASK 0x00000020
+#define DSI_DIRECT_CMD_RD_STS_FLAG_ERR_OVERSIZE_FLAG(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_RD_STS_FLAG, ERR_OVERSIZE_FLAG, __x)
+#define DSI_DIRECT_CMD_RD_STS_FLAG_ERR_WRONG_LENGTH_FLAG_SHIFT 6
+#define DSI_DIRECT_CMD_RD_STS_FLAG_ERR_WRONG_LENGTH_FLAG_MASK 0x00000040
+#define DSI_DIRECT_CMD_RD_STS_FLAG_ERR_WRONG_LENGTH_FLAG(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_RD_STS_FLAG, ERR_WRONG_LENGTH_FLAG, __x)
+#define DSI_DIRECT_CMD_RD_STS_FLAG_ERR_MISSING_EOT_FLAG_SHIFT 7
+#define DSI_DIRECT_CMD_RD_STS_FLAG_ERR_MISSING_EOT_FLAG_MASK 0x00000080
+#define DSI_DIRECT_CMD_RD_STS_FLAG_ERR_MISSING_EOT_FLAG(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_RD_STS_FLAG, ERR_MISSING_EOT_FLAG, __x)
+#define DSI_DIRECT_CMD_RD_STS_FLAG_ERR_EOT_WITH_ERR_FLAG_SHIFT 8
+#define DSI_DIRECT_CMD_RD_STS_FLAG_ERR_EOT_WITH_ERR_FLAG_MASK 0x00000100
+#define DSI_DIRECT_CMD_RD_STS_FLAG_ERR_EOT_WITH_ERR_FLAG(__x) \
+	DSI_VAL2REG(DSI_DIRECT_CMD_RD_STS_FLAG, ERR_EOT_WITH_ERR_FLAG, __x)
+#define DSI_VID_MODE_STS_FLAG 0x00000140
+#define DSI_VID_MODE_STS_FLAG_VSG_STS_FLAG_SHIFT 0
+#define DSI_VID_MODE_STS_FLAG_VSG_STS_FLAG_MASK 0x00000001
+#define DSI_VID_MODE_STS_FLAG_VSG_STS_FLAG(__x) \
+	DSI_VAL2REG(DSI_VID_MODE_STS_FLAG, VSG_STS_FLAG, __x)
+#define DSI_VID_MODE_STS_FLAG_ERR_MISSING_DATA_FLAG_SHIFT 1
+#define DSI_VID_MODE_STS_FLAG_ERR_MISSING_DATA_FLAG_MASK 0x00000002
+#define DSI_VID_MODE_STS_FLAG_ERR_MISSING_DATA_FLAG(__x) \
+	DSI_VAL2REG(DSI_VID_MODE_STS_FLAG, ERR_MISSING_DATA_FLAG, __x)
+#define DSI_VID_MODE_STS_FLAG_ERR_MISSING_HSYNC_FLAG_SHIFT 2
+#define DSI_VID_MODE_STS_FLAG_ERR_MISSING_HSYNC_FLAG_MASK 0x00000004
+#define DSI_VID_MODE_STS_FLAG_ERR_MISSING_HSYNC_FLAG(__x) \
+	DSI_VAL2REG(DSI_VID_MODE_STS_FLAG, ERR_MISSING_HSYNC_FLAG, __x)
+#define DSI_VID_MODE_STS_FLAG_ERR_MISSING_VSYNC_FLAG_SHIFT 3
+#define DSI_VID_MODE_STS_FLAG_ERR_MISSING_VSYNC_FLAG_MASK 0x00000008
+#define DSI_VID_MODE_STS_FLAG_ERR_MISSING_VSYNC_FLAG(__x) \
+	DSI_VAL2REG(DSI_VID_MODE_STS_FLAG, ERR_MISSING_VSYNC_FLAG, __x)
+#define DSI_VID_MODE_STS_FLAG_REG_ERR_SMALL_LENGTH_FLAG_SHIFT 4
+#define DSI_VID_MODE_STS_FLAG_REG_ERR_SMALL_LENGTH_FLAG_MASK 0x00000010
+#define DSI_VID_MODE_STS_FLAG_REG_ERR_SMALL_LENGTH_FLAG(__x) \
+	DSI_VAL2REG(DSI_VID_MODE_STS_FLAG, REG_ERR_SMALL_LENGTH_FLAG, __x)
+#define DSI_VID_MODE_STS_FLAG_REG_ERR_SMALL_HEIGHT_FLAG_SHIFT 5
+#define DSI_VID_MODE_STS_FLAG_REG_ERR_SMALL_HEIGHT_FLAG_MASK 0x00000020
+#define DSI_VID_MODE_STS_FLAG_REG_ERR_SMALL_HEIGHT_FLAG(__x) \
+	DSI_VAL2REG(DSI_VID_MODE_STS_FLAG, REG_ERR_SMALL_HEIGHT_FLAG, __x)
+#define DSI_VID_MODE_STS_FLAG_ERR_BURSTWRITE_FLAG_SHIFT 6
+#define DSI_VID_MODE_STS_FLAG_ERR_BURSTWRITE_FLAG_MASK 0x00000040
+#define DSI_VID_MODE_STS_FLAG_ERR_BURSTWRITE_FLAG(__x) \
+	DSI_VAL2REG(DSI_VID_MODE_STS_FLAG, ERR_BURSTWRITE_FLAG, __x)
+#define DSI_VID_MODE_STS_FLAG_ERR_LONGWRITE_FLAG_SHIFT 7
+#define DSI_VID_MODE_STS_FLAG_ERR_LONGWRITE_FLAG_MASK 0x00000080
+#define DSI_VID_MODE_STS_FLAG_ERR_LONGWRITE_FLAG(__x) \
+	DSI_VAL2REG(DSI_VID_MODE_STS_FLAG, ERR_LONGWRITE_FLAG, __x)
+#define DSI_VID_MODE_STS_FLAG_ERR_LONGREAD_FLAG_SHIFT 8
+#define DSI_VID_MODE_STS_FLAG_ERR_LONGREAD_FLAG_MASK 0x00000100
+#define DSI_VID_MODE_STS_FLAG_ERR_LONGREAD_FLAG(__x) \
+	DSI_VAL2REG(DSI_VID_MODE_STS_FLAG, ERR_LONGREAD_FLAG, __x)
+#define DSI_VID_MODE_STS_FLAG_ERR_VRS_WRONG_LENGTH_FLAG_SHIFT 9
+#define DSI_VID_MODE_STS_FLAG_ERR_VRS_WRONG_LENGTH_FLAG_MASK 0x00000200
+#define DSI_VID_MODE_STS_FLAG_ERR_VRS_WRONG_LENGTH_FLAG(__x) \
+	DSI_VAL2REG(DSI_VID_MODE_STS_FLAG, ERR_VRS_WRONG_LENGTH_FLAG, __x)
+#define DSI_VID_MODE_STS_FLAG_VSG_RECOVERY_FLAG_SHIFT 10
+#define DSI_VID_MODE_STS_FLAG_VSG_RECOVERY_FLAG_MASK 0x00000400
+#define DSI_VID_MODE_STS_FLAG_VSG_RECOVERY_FLAG(__x) \
+	DSI_VAL2REG(DSI_VID_MODE_STS_FLAG, VSG_RECOVERY_FLAG, __x)
+#define DSI_TG_STS_FLAG 0x00000144
+#define DSI_TG_STS_FLAG_TVG_STS_FLAG_SHIFT 0
+#define DSI_TG_STS_FLAG_TVG_STS_FLAG_MASK 0x00000001
+#define DSI_TG_STS_FLAG_TVG_STS_FLAG(__x) \
+	DSI_VAL2REG(DSI_TG_STS_FLAG, TVG_STS_FLAG, __x)
+#define DSI_TG_STS_FLAG_TBG_STS_FLAG_SHIFT 1
+#define DSI_TG_STS_FLAG_TBG_STS_FLAG_MASK 0x00000002
+#define DSI_TG_STS_FLAG_TBG_STS_FLAG(__x) \
+	DSI_VAL2REG(DSI_TG_STS_FLAG, TBG_STS_FLAG, __x)
+#define DSI_MCTL_DPHY_ERR_FLAG 0x00000148
+#define DSI_MCTL_DPHY_ERR_FLAG_ERR_ESC_1_FLAG_SHIFT 6
+#define DSI_MCTL_DPHY_ERR_FLAG_ERR_ESC_1_FLAG_MASK 0x00000040
+#define DSI_MCTL_DPHY_ERR_FLAG_ERR_ESC_1_FLAG(__x) \
+	DSI_VAL2REG(DSI_MCTL_DPHY_ERR_FLAG, ERR_ESC_1_FLAG, __x)
+#define DSI_MCTL_DPHY_ERR_FLAG_ERR_ESC_2_FLAG_SHIFT 7
+#define DSI_MCTL_DPHY_ERR_FLAG_ERR_ESC_2_FLAG_MASK 0x00000080
+#define DSI_MCTL_DPHY_ERR_FLAG_ERR_ESC_2_FLAG(__x) \
+	DSI_VAL2REG(DSI_MCTL_DPHY_ERR_FLAG, ERR_ESC_2_FLAG, __x)
+#define DSI_MCTL_DPHY_ERR_FLAG_ERR_SYNCESC_1_FLAG_SHIFT 8
+#define DSI_MCTL_DPHY_ERR_FLAG_ERR_SYNCESC_1_FLAG_MASK 0x00000100
+#define DSI_MCTL_DPHY_ERR_FLAG_ERR_SYNCESC_1_FLAG(__x) \
+	DSI_VAL2REG(DSI_MCTL_DPHY_ERR_FLAG, ERR_SYNCESC_1_FLAG, __x)
+#define DSI_MCTL_DPHY_ERR_FLAG_ERR_SYNCESC_2_FLAG_SHIFT 9
+#define DSI_MCTL_DPHY_ERR_FLAG_ERR_SYNCESC_2_FLAG_MASK 0x00000200
+#define DSI_MCTL_DPHY_ERR_FLAG_ERR_SYNCESC_2_FLAG(__x) \
+	DSI_VAL2REG(DSI_MCTL_DPHY_ERR_FLAG, ERR_SYNCESC_2_FLAG, __x)
+#define DSI_MCTL_DPHY_ERR_FLAG_ERR_CONTROL_1_FLAG_SHIFT 10
+#define DSI_MCTL_DPHY_ERR_FLAG_ERR_CONTROL_1_FLAG_MASK 0x00000400
+#define DSI_MCTL_DPHY_ERR_FLAG_ERR_CONTROL_1_FLAG(__x) \
+	DSI_VAL2REG(DSI_MCTL_DPHY_ERR_FLAG, ERR_CONTROL_1_FLAG, __x)
+#define DSI_MCTL_DPHY_ERR_FLAG_ERR_CONTROL_2_FLAG_SHIFT 11
+#define DSI_MCTL_DPHY_ERR_FLAG_ERR_CONTROL_2_FLAG_MASK 0x00000800
+#define DSI_MCTL_DPHY_ERR_FLAG_ERR_CONTROL_2_FLAG(__x) \
+	DSI_VAL2REG(DSI_MCTL_DPHY_ERR_FLAG, ERR_CONTROL_2_FLAG, __x)
+#define DSI_MCTL_DPHY_ERR_FLAG_ERR_CONT_LP0_1_FLAG_SHIFT 12
+#define DSI_MCTL_DPHY_ERR_FLAG_ERR_CONT_LP0_1_FLAG_MASK 0x00001000
+#define DSI_MCTL_DPHY_ERR_FLAG_ERR_CONT_LP0_1_FLAG(__x) \
+	DSI_VAL2REG(DSI_MCTL_DPHY_ERR_FLAG, ERR_CONT_LP0_1_FLAG, __x)
+#define DSI_MCTL_DPHY_ERR_FLAG_ERR_CONT_LP0_2_FLAG_SHIFT 13
+#define DSI_MCTL_DPHY_ERR_FLAG_ERR_CONT_LP0_2_FLAG_MASK 0x00002000
+#define DSI_MCTL_DPHY_ERR_FLAG_ERR_CONT_LP0_2_FLAG(__x) \
+	DSI_VAL2REG(DSI_MCTL_DPHY_ERR_FLAG, ERR_CONT_LP0_2_FLAG, __x)
+#define DSI_MCTL_DPHY_ERR_FLAG_ERR_CONT_LP1_1_FLAG_SHIFT 14
+#define DSI_MCTL_DPHY_ERR_FLAG_ERR_CONT_LP1_1_FLAG_MASK 0x00004000
+#define DSI_MCTL_DPHY_ERR_FLAG_ERR_CONT_LP1_1_FLAG(__x) \
+	DSI_VAL2REG(DSI_MCTL_DPHY_ERR_FLAG, ERR_CONT_LP1_1_FLAG, __x)
+#define DSI_MCTL_DPHY_ERR_FLAG_ERR_CONT_LP1_2_FLAG_SHIFT 15
+#define DSI_MCTL_DPHY_ERR_FLAG_ERR_CONT_LP1_2_FLAG_MASK 0x00008000
+#define DSI_MCTL_DPHY_ERR_FLAG_ERR_CONT_LP1_2_FLAG(__x) \
+	DSI_VAL2REG(DSI_MCTL_DPHY_ERR_FLAG, ERR_CONT_LP1_2_FLAG, __x)
+#define DSI_DPHY_LANES_TRIM 0x00000150
+#define DSI_DPHY_LANES_TRIM_DPHY_SKEW_DAT1_SHIFT 0
+#define DSI_DPHY_LANES_TRIM_DPHY_SKEW_DAT1_MASK 0x00000003
+#define DSI_DPHY_LANES_TRIM_DPHY_SKEW_DAT1(__x) \
+	DSI_VAL2REG(DSI_DPHY_LANES_TRIM, DPHY_SKEW_DAT1, __x)
+#define DSI_DPHY_LANES_TRIM_DPHY_CD_OFF_DAT1_SHIFT 2
+#define DSI_DPHY_LANES_TRIM_DPHY_CD_OFF_DAT1_MASK 0x00000004
+#define DSI_DPHY_LANES_TRIM_DPHY_CD_OFF_DAT1(__x) \
+	DSI_VAL2REG(DSI_DPHY_LANES_TRIM, DPHY_CD_OFF_DAT1, __x)
+#define DSI_DPHY_LANES_TRIM_DPHY_HSTX_SLEWRATE_UP_DAT1_SHIFT 3
+#define DSI_DPHY_LANES_TRIM_DPHY_HSTX_SLEWRATE_UP_DAT1_MASK 0x00000008
+#define DSI_DPHY_LANES_TRIM_DPHY_HSTX_SLEWRATE_UP_DAT1(__x) \
+	DSI_VAL2REG(DSI_DPHY_LANES_TRIM, DPHY_HSTX_SLEWRATE_UP_DAT1, __x)
+#define DSI_DPHY_LANES_TRIM_DPHY_HSTX_SLEWRATE_DOWN_DAT1_SHIFT 4
+#define DSI_DPHY_LANES_TRIM_DPHY_HSTX_SLEWRATE_DOWN_DAT1_MASK 0x00000010
+#define DSI_DPHY_LANES_TRIM_DPHY_HSTX_SLEWRATE_DOWN_DAT1(__x) \
+	DSI_VAL2REG(DSI_DPHY_LANES_TRIM, DPHY_HSTX_SLEWRATE_DOWN_DAT1, __x)
+#define DSI_DPHY_LANES_TRIM_DPHY_TEST_RESERVED_1_DAT1_SHIFT 5
+#define DSI_DPHY_LANES_TRIM_DPHY_TEST_RESERVED_1_DAT1_MASK 0x00000020
+#define DSI_DPHY_LANES_TRIM_DPHY_TEST_RESERVED_1_DAT1(__x) \
+	DSI_VAL2REG(DSI_DPHY_LANES_TRIM, DPHY_TEST_RESERVED_1_DAT1, __x)
+#define DSI_DPHY_LANES_TRIM_DPHY_SKEW_CLK_SHIFT 6
+#define DSI_DPHY_LANES_TRIM_DPHY_SKEW_CLK_MASK 0x000000C0
+#define DSI_DPHY_LANES_TRIM_DPHY_SKEW_CLK(__x) \
+	DSI_VAL2REG(DSI_DPHY_LANES_TRIM, DPHY_SKEW_CLK, __x)
+#define DSI_DPHY_LANES_TRIM_DPHY_LP_RX_VIL_CLK_SHIFT 8
+#define DSI_DPHY_LANES_TRIM_DPHY_LP_RX_VIL_CLK_MASK 0x00000300
+#define DSI_DPHY_LANES_TRIM_DPHY_LP_RX_VIL_CLK(__x) \
+	DSI_VAL2REG(DSI_DPHY_LANES_TRIM, DPHY_LP_RX_VIL_CLK, __x)
+#define DSI_DPHY_LANES_TRIM_DPHY_LP_TX_SLEWRATE_CLK_SHIFT 10
+#define DSI_DPHY_LANES_TRIM_DPHY_LP_TX_SLEWRATE_CLK_MASK 0x00000C00
+#define DSI_DPHY_LANES_TRIM_DPHY_LP_TX_SLEWRATE_CLK(__x) \
+	DSI_VAL2REG(DSI_DPHY_LANES_TRIM, DPHY_LP_TX_SLEWRATE_CLK, __x)
+#define DSI_DPHY_LANES_TRIM_DPHY_SPECS_90_81B_SHIFT 12
+#define DSI_DPHY_LANES_TRIM_DPHY_SPECS_90_81B_MASK 0x00001000
+#define DSI_DPHY_LANES_TRIM_DPHY_SPECS_90_81B_0_81 0
+#define DSI_DPHY_LANES_TRIM_DPHY_SPECS_90_81B_0_90 1
+#define DSI_DPHY_LANES_TRIM_DPHY_SPECS_90_81B_ENUM(__x) \
+	DSI_VAL2REG(DSI_DPHY_LANES_TRIM, DPHY_SPECS_90_81B, \
+	DSI_DPHY_LANES_TRIM_DPHY_SPECS_90_81B_##__x)
+#define DSI_DPHY_LANES_TRIM_DPHY_SPECS_90_81B(__x) \
+	DSI_VAL2REG(DSI_DPHY_LANES_TRIM, DPHY_SPECS_90_81B, __x)
+#define DSI_DPHY_LANES_TRIM_DPHY_HSTX_SLEWRATE_UP_CLK_SHIFT 13
+#define DSI_DPHY_LANES_TRIM_DPHY_HSTX_SLEWRATE_UP_CLK_MASK 0x00002000
+#define DSI_DPHY_LANES_TRIM_DPHY_HSTX_SLEWRATE_UP_CLK(__x) \
+	DSI_VAL2REG(DSI_DPHY_LANES_TRIM, DPHY_HSTX_SLEWRATE_UP_CLK, __x)
+#define DSI_DPHY_LANES_TRIM_DPHY_HSTX_SLEWRATE_DOWN_CLK_SHIFT 14
+#define DSI_DPHY_LANES_TRIM_DPHY_HSTX_SLEWRATE_DOWN_CLK_MASK 0x00004000
+#define DSI_DPHY_LANES_TRIM_DPHY_HSTX_SLEWRATE_DOWN_CLK(__x) \
+	DSI_VAL2REG(DSI_DPHY_LANES_TRIM, DPHY_HSTX_SLEWRATE_DOWN_CLK, __x)
+#define DSI_DPHY_LANES_TRIM_DPHY_TEST_RESERVED_1_CLK_SHIFT 15
+#define DSI_DPHY_LANES_TRIM_DPHY_TEST_RESERVED_1_CLK_MASK 0x00008000
+#define DSI_DPHY_LANES_TRIM_DPHY_TEST_RESERVED_1_CLK(__x) \
+	DSI_VAL2REG(DSI_DPHY_LANES_TRIM, DPHY_TEST_RESERVED_1_CLK, __x)
+#define DSI_DPHY_LANES_TRIM_DPHY_SKEW_DAT2_SHIFT 16
+#define DSI_DPHY_LANES_TRIM_DPHY_SKEW_DAT2_MASK 0x00030000
+#define DSI_DPHY_LANES_TRIM_DPHY_SKEW_DAT2(__x) \
+	DSI_VAL2REG(DSI_DPHY_LANES_TRIM, DPHY_SKEW_DAT2, __x)
+#define DSI_DPHY_LANES_TRIM_DPHY_HSTX_SLEWRATE_UP_DAT2_SHIFT 18
+#define DSI_DPHY_LANES_TRIM_DPHY_HSTX_SLEWRATE_UP_DAT2_MASK 0x00040000
+#define DSI_DPHY_LANES_TRIM_DPHY_HSTX_SLEWRATE_UP_DAT2(__x) \
+	DSI_VAL2REG(DSI_DPHY_LANES_TRIM, DPHY_HSTX_SLEWRATE_UP_DAT2, __x)
+#define DSI_DPHY_LANES_TRIM_DPHY_HSTX_SLEWRATE_DOWN_DAT2_SHIFT 19
+#define DSI_DPHY_LANES_TRIM_DPHY_HSTX_SLEWRATE_DOWN_DAT2_MASK 0x00080000
+#define DSI_DPHY_LANES_TRIM_DPHY_HSTX_SLEWRATE_DOWN_DAT2(__x) \
+	DSI_VAL2REG(DSI_DPHY_LANES_TRIM, DPHY_HSTX_SLEWRATE_DOWN_DAT2, __x)
+#define DSI_DPHY_LANES_TRIM_DPHY_TEST_RESERVED_1_DAT2_SHIFT 20
+#define DSI_DPHY_LANES_TRIM_DPHY_TEST_RESERVED_1_DAT2_MASK 0x00100000
+#define DSI_DPHY_LANES_TRIM_DPHY_TEST_RESERVED_1_DAT2(__x) \
+	DSI_VAL2REG(DSI_DPHY_LANES_TRIM, DPHY_TEST_RESERVED_1_DAT2, __x)
+#define DSI_ID_REG 0x00000FF0
+#define DSI_ID_REG_Y_SHIFT 0
+#define DSI_ID_REG_Y_MASK 0x0000000F
+#define DSI_ID_REG_Y(__x) \
+	DSI_VAL2REG(DSI_ID_REG, Y, __x)
+#define DSI_ID_REG_X_SHIFT 4
+#define DSI_ID_REG_X_MASK 0x000000F0
+#define DSI_ID_REG_X(__x) \
+	DSI_VAL2REG(DSI_ID_REG, X, __x)
+#define DSI_ID_REG_H_SHIFT 8
+#define DSI_ID_REG_H_MASK 0x00000300
+#define DSI_ID_REG_H(__x) \
+	DSI_VAL2REG(DSI_ID_REG, H, __x)
+#define DSI_ID_REG_PRODUCT_ID_SHIFT 10
+#define DSI_ID_REG_PRODUCT_ID_MASK 0x0003FC00
+#define DSI_ID_REG_PRODUCT_ID(__x) \
+	DSI_VAL2REG(DSI_ID_REG, PRODUCT_ID, __x)
+#define DSI_ID_REG_VENDOR_ID_SHIFT 18
+#define DSI_ID_REG_VENDOR_ID_MASK 0xFFFC0000
+#define DSI_ID_REG_VENDOR_ID(__x) \
+	DSI_VAL2REG(DSI_ID_REG, VENDOR_ID, __x)
+#define DSI_IP_CONF 0x00000FF4
+#define DSI_IP_CONF_FIFO_SIZE_SHIFT 0
+#define DSI_IP_CONF_FIFO_SIZE_MASK 0x0000003F
+#define DSI_IP_CONF_FIFO_SIZE(__x) \
+	DSI_VAL2REG(DSI_IP_CONF, FIFO_SIZE, __x)
diff --git a/drivers/video/mcde/mcde_bus.c b/drivers/video/mcde/mcde_bus.c
new file mode 100644
index 00000000000..3d7049652a1
--- /dev/null
+++ b/drivers/video/mcde/mcde_bus.c
@@ -0,0 +1,261 @@
+/*
+ * Copyright (C) ST-Ericsson AB 2010
+ *
+ * ST-Ericsson MCDE display bus driver
+ *
+ * Author: Marcus Lorentzon <marcus.xm.lorentzon@stericsson.com>
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+
+#include <linux/kernel.h>
+#include <linux/device.h>
+#include <linux/platform_device.h>
+#include <linux/dma-mapping.h>
+#include <linux/notifier.h>
+
+#include <video/mcde_display.h>
+#include <video/mcde_dss.h>
+
+#define to_mcde_display_driver(__drv) \
+	container_of((__drv), struct mcde_display_driver, driver)
+
+static BLOCKING_NOTIFIER_HEAD(bus_notifier_list);
+
+static int mcde_drv_suspend(struct device *_dev, pm_message_t state);
+static int mcde_drv_resume(struct device *_dev);
+struct bus_type mcde_bus_type;
+
+static int mcde_suspend_device(struct device *dev, void *data)
+{
+	pm_message_t* state = (pm_message_t *) data;
+	if (dev->driver->suspend)
+		return dev->driver->suspend(dev, *state);
+	return 0;
+}
+
+static int mcde_resume_device(struct device *dev, void *data)
+{
+	if (dev->driver->resume)
+		return dev->driver->resume(dev);
+	return 0;
+}
+
+/* Bus driver */
+
+static int mcde_bus_match(struct device *_dev, struct device_driver *driver)
+{
+	pr_debug("Matching device %s with driver %s\n",
+		dev_name(_dev), driver->name);
+
+	return strncmp(dev_name(_dev), driver->name, strlen(driver->name)) == 0;
+}
+
+static int mcde_bus_suspend(struct device *_dev, pm_message_t state)
+{
+	int ret;
+	ret = bus_for_each_dev(&mcde_bus_type, NULL, &state,
+				mcde_suspend_device);
+	if (ret) {
+		/* TODO Resume all suspended devices */
+		/* mcde_bus_resume(dev); */
+		return ret;
+	}
+	return 0;
+}
+
+static int mcde_bus_resume(struct device *_dev)
+{
+	return bus_for_each_dev(&mcde_bus_type, NULL, NULL, mcde_resume_device);
+}
+
+struct bus_type mcde_bus_type = {
+	.name = "mcde_bus",
+	.match = mcde_bus_match,
+	.suspend = mcde_bus_suspend,
+	.resume = mcde_bus_resume,
+};
+
+static int mcde_drv_probe(struct device *_dev)
+{
+	struct mcde_display_driver *drv = to_mcde_display_driver(_dev->driver);
+	struct mcde_display_device *dev = to_mcde_display_device(_dev);
+
+	return drv->probe(dev);
+}
+
+static int mcde_drv_remove(struct device *_dev)
+{
+	struct mcde_display_driver *drv = to_mcde_display_driver(_dev->driver);
+	struct mcde_display_device *dev = to_mcde_display_device(_dev);
+
+	return drv->remove(dev);
+}
+
+static void mcde_drv_shutdown(struct device *_dev)
+{
+	struct mcde_display_driver *drv = to_mcde_display_driver(_dev->driver);
+	struct mcde_display_device *dev = to_mcde_display_device(_dev);
+
+	drv->shutdown(dev);
+}
+
+static int mcde_drv_suspend(struct device *_dev, pm_message_t state)
+{
+	struct mcde_display_driver *drv = to_mcde_display_driver(_dev->driver);
+	struct mcde_display_device *dev = to_mcde_display_device(_dev);
+
+	return drv->suspend(dev, state);
+}
+
+static int mcde_drv_resume(struct device *_dev)
+{
+	struct mcde_display_driver *drv = to_mcde_display_driver(_dev->driver);
+	struct mcde_display_device *dev = to_mcde_display_device(_dev);
+
+	return drv->resume(dev);
+}
+
+/* Bus device */
+
+static void mcde_bus_release(struct device *dev)
+{
+}
+
+struct device mcde_bus = {
+	.init_name = "mcde_bus",
+	.release  = mcde_bus_release
+};
+
+/* Public bus API */
+
+int mcde_display_driver_register(struct mcde_display_driver *drv)
+{
+	drv->driver.bus = &mcde_bus_type;
+	if (drv->probe)
+		drv->driver.probe = mcde_drv_probe;
+	if (drv->remove)
+		drv->driver.remove = mcde_drv_remove;
+	if (drv->shutdown)
+		drv->driver.shutdown = mcde_drv_shutdown;
+	if (drv->suspend)
+		drv->driver.suspend = mcde_drv_suspend;
+	if (drv->resume)
+		drv->driver.resume = mcde_drv_resume;
+
+	return driver_register(&drv->driver);
+}
+EXPORT_SYMBOL(mcde_display_driver_register);
+
+void mcde_display_driver_unregister(struct mcde_display_driver *drv)
+{
+	driver_unregister(&drv->driver);
+}
+EXPORT_SYMBOL(mcde_display_driver_unregister);
+
+static void mcde_display_dev_release(struct device *dev)
+{
+	/* Do nothing */
+}
+
+int mcde_display_device_register(struct mcde_display_device *dev)
+{
+	/* Setup device */
+	if (!dev)
+		return -EINVAL;
+	dev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
+	dev->dev.bus = &mcde_bus_type;
+	if (dev->dev.parent != NULL)
+		dev->dev.parent = &mcde_bus;
+	dev->dev.release = mcde_display_dev_release;
+	if (dev->id != -1)
+		dev_set_name(&dev->dev, "%s.%d", dev->name,  dev->id);
+	else
+		dev_set_name(&dev->dev, dev->name);
+
+	mcde_display_init_device(dev);
+
+	return device_register(&dev->dev);
+}
+EXPORT_SYMBOL(mcde_display_device_register);
+
+void mcde_display_device_unregister(struct mcde_display_device *dev)
+{
+	device_unregister(&dev->dev);
+}
+EXPORT_SYMBOL(mcde_display_device_unregister);
+
+/* Notifications */
+int mcde_dss_register_notifier(struct notifier_block *nb)
+{
+	return blocking_notifier_chain_register(&bus_notifier_list, nb);
+}
+EXPORT_SYMBOL(mcde_dss_register_notifier);
+
+int mcde_dss_unregister_notifier(struct notifier_block *nb)
+{
+	return blocking_notifier_chain_unregister(&bus_notifier_list, nb);
+}
+EXPORT_SYMBOL(mcde_dss_unregister_notifier);
+
+static int bus_notify_callback(struct notifier_block *nb,
+	unsigned long event, void *dev)
+{
+	struct mcde_display_device *ddev = to_mcde_display_device(dev);
+
+	if (event == BUS_NOTIFY_BOUND_DRIVER) {
+		ddev->initialized = true;
+		blocking_notifier_call_chain(&bus_notifier_list,
+			MCDE_DSS_EVENT_DISPLAY_REGISTERED, ddev);
+	} else if (event == BUS_NOTIFY_UNBIND_DRIVER) {
+		ddev->initialized = false;
+		blocking_notifier_call_chain(&bus_notifier_list,
+			MCDE_DSS_EVENT_DISPLAY_UNREGISTERED, ddev);
+	}
+	return 0;
+}
+
+struct notifier_block bus_nb = {
+	.notifier_call = bus_notify_callback,
+};
+
+/* Driver init/exit */
+
+int __init mcde_display_init(void)
+{
+	int ret;
+
+	ret = bus_register(&mcde_bus_type);
+	if (ret) {
+		pr_warning("Unable to register bus type\n");
+		goto no_bus_registration;
+	}
+	ret = device_register(&mcde_bus);
+	if (ret) {
+		pr_warning("Unable to register bus device\n");
+		goto no_device_registration;
+	}
+	ret = bus_register_notifier(&mcde_bus_type, &bus_nb);
+	if (ret) {
+		pr_warning("Unable to register bus notifier\n");
+		goto no_bus_notifier;
+	}
+
+	goto out;
+
+no_bus_notifier:
+	device_unregister(&mcde_bus);
+no_device_registration:
+	bus_unregister(&mcde_bus_type);
+no_bus_registration:
+out:
+	return ret;
+}
+
+void mcde_display_exit(void)
+{
+	bus_unregister_notifier(&mcde_bus_type, &bus_nb);
+	device_unregister(&mcde_bus);
+	bus_unregister(&mcde_bus_type);
+}
diff --git a/drivers/video/mcde/mcde_display.c b/drivers/video/mcde/mcde_display.c
new file mode 100644
index 00000000000..fcca1e277fc
--- /dev/null
+++ b/drivers/video/mcde/mcde_display.c
@@ -0,0 +1,438 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2010
+ *
+ * ST-Ericsson MCDE display driver
+ *
+ * Author: Marcus Lorentzon <marcus.xm.lorentzon@stericsson.com>
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+
+#include <linux/kernel.h>
+#include <linux/device.h>
+
+#include <video/mcde_display.h>
+
+/*temp*/
+#include <linux/delay.h>
+
+static void mcde_display_get_native_resolution_default(
+	struct mcde_display_device *ddev, u16 *x_res, u16 *y_res)
+{
+	if (x_res)
+		*x_res = ddev->native_x_res;
+	if (y_res)
+		*y_res = ddev->native_y_res;
+}
+
+static enum mcde_ovly_pix_fmt mcde_display_get_default_pixel_format_default(
+	struct mcde_display_device *ddev)
+{
+	return ddev->default_pixel_format;
+}
+
+static void mcde_display_get_physical_size_default(
+	struct mcde_display_device *ddev, u16 *width, u16 *height)
+{
+	if (width)
+		*width = ddev->physical_width;
+	if (height)
+		*height = ddev->physical_height;
+}
+
+static int mcde_display_set_power_mode_default(struct mcde_display_device *ddev,
+	enum mcde_display_power_mode power_mode)
+{
+	int ret = 0;
+
+	/* OFF -> STANDBY */
+	if (ddev->power_mode == MCDE_DISPLAY_PM_OFF &&
+		power_mode != MCDE_DISPLAY_PM_OFF) {
+		if (ddev->platform_enable) {
+			ret = ddev->platform_enable(ddev);
+			if (ret)
+				return ret;
+		}
+		ddev->power_mode = MCDE_DISPLAY_PM_STANDBY;
+		/* force register settings */
+		if (ddev->port->type == MCDE_PORTTYPE_DPI)
+			ddev->update_flags = UPDATE_FLAG_VIDEO_MODE | UPDATE_FLAG_PIXEL_FORMAT;
+	}
+
+	if (ddev->port->type == MCDE_PORTTYPE_DSI) {
+		/* STANDBY -> ON */
+		if (ddev->power_mode == MCDE_DISPLAY_PM_STANDBY &&
+			power_mode == MCDE_DISPLAY_PM_ON) {
+			ret = mcde_dsi_dcs_write(ddev->chnl_state,
+				DCS_CMD_EXIT_SLEEP_MODE, NULL, 0);
+			if (ret)
+				return ret;
+
+			ret = mcde_dsi_dcs_write(ddev->chnl_state,
+				DCS_CMD_SET_DISPLAY_ON, NULL, 0);
+			if (ret)
+				return ret;
+
+			ddev->power_mode = MCDE_DISPLAY_PM_ON;
+		} else if (ddev->power_mode == MCDE_DISPLAY_PM_ON &&
+			power_mode <= MCDE_DISPLAY_PM_STANDBY) {
+			/* ON -> STANDBY */
+			ret = mcde_dsi_dcs_write(ddev->chnl_state,
+				DCS_CMD_SET_DISPLAY_OFF, NULL, 0);
+			if (ret)
+				return ret;
+
+			ret = mcde_dsi_dcs_write(ddev->chnl_state,
+				DCS_CMD_ENTER_SLEEP_MODE, NULL, 0);
+			if (ret)
+				return ret;
+
+			ddev->power_mode = MCDE_DISPLAY_PM_STANDBY;
+		}
+	} else if (ddev->port->type == MCDE_PORTTYPE_DPI) {
+		ddev->power_mode = power_mode;
+	} else if (ddev->power_mode != power_mode) {
+		return -EINVAL;
+	}
+
+	/* SLEEP -> OFF */
+	if (ddev->power_mode == MCDE_DISPLAY_PM_STANDBY &&
+		power_mode == MCDE_DISPLAY_PM_OFF) {
+		if (ddev->platform_disable) {
+			ret = ddev->platform_disable(ddev);
+			if (ret)
+				return ret;
+		}
+		ddev->power_mode = MCDE_DISPLAY_PM_OFF;
+	}
+
+	mcde_chnl_set_power_mode(ddev->chnl_state, ddev->power_mode);
+
+	return ret;
+}
+
+static inline enum mcde_display_power_mode mcde_display_get_power_mode_default(
+	struct mcde_display_device *ddev)
+{
+	return ddev->power_mode;
+}
+
+static inline int mcde_display_try_video_mode_default(
+	struct mcde_display_device *ddev,
+	struct mcde_video_mode *video_mode)
+{
+	/* TODO Check if inside native_xres and native_yres */
+	return 0;
+}
+
+static int mcde_display_set_video_mode_default(struct mcde_display_device *ddev,
+	struct mcde_video_mode *video_mode)
+{
+	int ret;
+	struct mcde_video_mode channel_video_mode;
+
+	if (!video_mode)
+		return -EINVAL;
+
+	ddev->video_mode = *video_mode;
+	channel_video_mode = ddev->video_mode;
+	/* Dependant on if display should rotate or MCDE should rotate */
+	if (ddev->rotation == MCDE_DISPLAY_ROT_90_CCW ||
+				ddev->rotation == MCDE_DISPLAY_ROT_90_CW) {
+		channel_video_mode.xres = ddev->native_x_res;
+		channel_video_mode.yres = ddev->native_y_res;
+	}
+	ret = mcde_chnl_set_video_mode(ddev->chnl_state, &channel_video_mode);
+	if (ret < 0) {
+		dev_warn(&ddev->dev, "%s:Failed to set video mode\n", __func__);
+		return ret;
+	}
+
+	ddev->update_flags |= UPDATE_FLAG_VIDEO_MODE;
+
+	return 0;
+}
+
+static inline void mcde_display_get_video_mode_default(
+	struct mcde_display_device *ddev, struct mcde_video_mode *video_mode)
+{
+	if (video_mode)
+		*video_mode = ddev->video_mode;
+}
+
+static int mcde_display_set_pixel_format_default(
+	struct mcde_display_device *ddev, enum mcde_ovly_pix_fmt format)
+{
+	int ret;
+
+	ddev->pixel_format = format;
+	ret = mcde_chnl_set_pixel_format(ddev->chnl_state,
+						ddev->port->pixel_format);
+	if (ret < 0) {
+		dev_warn(&ddev->dev, "%s:Failed to set pixel format = %d\n",
+							__func__, format);
+		return ret;
+	}
+
+	ddev->update_flags |= UPDATE_FLAG_PIXEL_FORMAT;
+
+	return 0;
+}
+
+static inline enum mcde_ovly_pix_fmt mcde_display_get_pixel_format_default(
+	struct mcde_display_device *ddev)
+{
+	return ddev->pixel_format;
+}
+
+static inline enum mcde_port_pix_fmt mcde_display_get_port_pixel_format_default(
+	struct mcde_display_device *ddev)
+{
+	return ddev->port->pixel_format;
+}
+
+static int mcde_display_set_rotation_default(struct mcde_display_device *ddev,
+	enum mcde_display_rotation rotation)
+{
+	int ret;
+
+	ret = mcde_chnl_set_rotation(ddev->chnl_state, rotation,
+		ddev->rotbuf1, ddev->rotbuf2);
+	if (ret < 0) {
+		dev_warn(&ddev->dev, "%s:Failed to set rotation = %d\n",
+							__func__, rotation);
+		return ret;
+	}
+
+	if (rotation == MCDE_DISPLAY_ROT_180_CCW) {
+		u8 param = 0x40;
+		(void) mcde_dsi_dcs_write(ddev->chnl_state,
+				DCS_CMD_SET_ADDRESS_MODE, &param, 1);
+	} else if (ddev->rotation == MCDE_DISPLAY_ROT_180_CCW &&
+			rotation != MCDE_DISPLAY_ROT_180_CCW) {
+		u8 param = 0;
+		(void) mcde_dsi_dcs_write(ddev->chnl_state,
+				DCS_CMD_SET_ADDRESS_MODE, &param, 1);
+	}
+
+	ddev->rotation = rotation;
+	ddev->update_flags |= UPDATE_FLAG_ROTATION;
+
+	return 0;
+}
+
+static inline enum mcde_display_rotation mcde_display_get_rotation_default(
+	struct mcde_display_device *ddev)
+{
+	return ddev->rotation;
+}
+
+static int mcde_display_set_synchronized_update_default(
+	struct mcde_display_device *ddev, bool enable)
+{
+	if (ddev->port->type == MCDE_PORTTYPE_DSI && enable) {
+		int ret;
+		u8 m = 0;
+
+		if (ddev->port->sync_src == MCDE_SYNCSRC_OFF)
+			return -EINVAL;
+
+		ret = mcde_dsi_dcs_write(ddev->chnl_state,
+						DCS_CMD_SET_TEAR_ON, &m, 1);
+		if (ret < 0) {
+			dev_warn(&ddev->dev,
+				"%s:Failed to set synchornized update = %d\n",
+				__func__, enable);
+			return ret;
+		}
+	}
+	ddev->synchronized_update = enable;
+	return 0;
+}
+
+static inline bool mcde_display_get_synchronized_update_default(
+	struct mcde_display_device *ddev)
+{
+	return ddev->synchronized_update;
+}
+
+static int mcde_display_apply_config_default(struct mcde_display_device *ddev)
+{
+	int ret;
+
+	ret = mcde_chnl_enable_synchronized_update(ddev->chnl_state,
+		ddev->synchronized_update);
+
+	if (ret < 0) {
+		dev_warn(&ddev->dev,
+			"%s:Failed to enable synchronized update\n",
+			__func__);
+		return ret;
+	}
+
+	if (!ddev->update_flags)
+		return 0;
+
+	if ((ddev->update_flags & UPDATE_FLAG_VIDEO_MODE) ||
+		(ddev->update_flags & UPDATE_FLAG_PIXEL_FORMAT))
+		mcde_chnl_stop_flow(ddev->chnl_state);
+
+	ret = mcde_chnl_apply(ddev->chnl_state);
+	if (ret < 0) {
+		dev_warn(&ddev->dev, "%s:Failed to apply to channel\n",
+							__func__);
+		return ret;
+	}
+	ddev->update_flags = 0;
+	ddev->first_update = true;
+
+	return 0;
+}
+
+static int mcde_display_invalidate_area_default(
+					struct mcde_display_device *ddev,
+					struct mcde_rectangle *area)
+{
+	dev_vdbg(&ddev->dev, "%s\n", __func__);
+	if (area) {
+		/* take union of rects */
+		u16 t;
+		t = min(ddev->update_area.x, area->x);
+		/* note should be > 0 */
+		ddev->update_area.w = max(ddev->update_area.x +
+							ddev->update_area.w,
+							area->x + area->w) - t;
+		ddev->update_area.x = t;
+		t = min(ddev->update_area.y, area->y);
+		ddev->update_area.h = max(ddev->update_area.y +
+							ddev->update_area.h,
+							area->y + area->h) - t;
+		ddev->update_area.y = t;
+		/* TODO: Implement real clipping when partial refresh is
+		activated.*/
+		ddev->update_area.w = min((u16) ddev->video_mode.xres,
+					(u16) ddev->update_area.w);
+		ddev->update_area.h = min((u16) ddev->video_mode.yres,
+					(u16) ddev->update_area.h);
+	} else {
+		ddev->update_area.x = 0;
+		ddev->update_area.y = 0;
+		ddev->update_area.w = ddev->video_mode.xres;
+		ddev->update_area.h = ddev->video_mode.yres;
+		/* Invalidate_area(ddev, NULL) means reset area to empty
+		 * rectangle really. After that the rectangle should grow by
+		 * taking an union (above). This means that the code should
+		 * really look like below, however the code above is a temp fix
+		 * for rotation.
+		 * TODO: fix
+		 * ddev->update_area.x = ddev->video_mode.xres;
+		 * ddev->update_area.y = ddev->video_mode.yres;
+		 * ddev->update_area.w = 0;
+		 * ddev->update_area.h = 0;
+		 */
+	}
+
+	return 0;
+}
+
+static int mcde_display_update_default(struct mcde_display_device *ddev)
+{
+	int ret;
+
+	/* TODO: Dirty */
+	if (ddev->prepare_for_update) {
+		/* TODO: Send dirty rectangle */
+		ret = ddev->prepare_for_update(ddev, 0, 0,
+			ddev->native_x_res, ddev->native_y_res);
+		if (ret < 0) {
+			dev_warn(&ddev->dev,
+				"%s:Failed to prepare for update\n", __func__);
+			return ret;
+		}
+	}
+	/* TODO: Calculate & set update rect */
+	ret = mcde_chnl_update(ddev->chnl_state, &ddev->update_area);
+	if (ret < 0) {
+		dev_warn(&ddev->dev, "%s:Failed to update channel\n", __func__);
+		return ret;
+	}
+	if (ddev->first_update && ddev->on_first_update)
+		ddev->on_first_update(ddev);
+
+	if (ddev->power_mode != MCDE_DISPLAY_PM_ON && ddev->set_power_mode) {
+		ret = ddev->set_power_mode(ddev, MCDE_DISPLAY_PM_ON);
+		if (ret < 0) {
+			dev_warn(&ddev->dev,
+				"%s:Failed to set power mode to on\n",
+				__func__);
+			return ret;
+		}
+	}
+
+	dev_vdbg(&ddev->dev, "Overlay updated, chnl=%d\n", ddev->chnl_id);
+
+	return 0;
+}
+
+static int mcde_display_prepare_for_update_default(
+					struct mcde_display_device *ddev,
+					u16 x, u16 y, u16 w, u16 h)
+{
+	int ret;
+	u8 params[8] = { x >> 8, x & 0xff,
+			(x + w - 1) >> 8, (x + w - 1) & 0xff,
+			 y >> 8, y & 0xff,
+			(y + h - 1) >> 8, (y + h - 1) & 0xff };
+
+	if (ddev->port->type != MCDE_PORTTYPE_DSI)
+		return -EINVAL;
+
+	ret = mcde_dsi_dcs_write(ddev->chnl_state,
+		DCS_CMD_SET_COLUMN_ADDRESS, &params[0], 4);
+	if (ret)
+		return ret;
+
+	ret = mcde_dsi_dcs_write(ddev->chnl_state,
+		DCS_CMD_SET_PAGE_ADDRESS, &params[4], 4);
+
+	return ret;
+}
+
+static inline int mcde_display_on_first_update_default(
+					struct mcde_display_device *ddev)
+{
+	ddev->first_update = false;
+	return 0;
+}
+
+void mcde_display_init_device(struct mcde_display_device *ddev)
+{
+	/* Setup default callbacks */
+	ddev->get_native_resolution =
+				mcde_display_get_native_resolution_default;
+	ddev->get_default_pixel_format =
+				mcde_display_get_default_pixel_format_default;
+	ddev->get_physical_size = mcde_display_get_physical_size_default;
+	ddev->set_power_mode = mcde_display_set_power_mode_default;
+	ddev->get_power_mode = mcde_display_get_power_mode_default;
+	ddev->try_video_mode = mcde_display_try_video_mode_default;
+	ddev->set_video_mode = mcde_display_set_video_mode_default;
+	ddev->get_video_mode = mcde_display_get_video_mode_default;
+	ddev->set_pixel_format = mcde_display_set_pixel_format_default;
+	ddev->get_pixel_format = mcde_display_get_pixel_format_default;
+	ddev->get_port_pixel_format =
+				mcde_display_get_port_pixel_format_default;
+	ddev->set_rotation = mcde_display_set_rotation_default;
+	ddev->get_rotation = mcde_display_get_rotation_default;
+	ddev->set_synchronized_update =
+				mcde_display_set_synchronized_update_default;
+	ddev->get_synchronized_update =
+				mcde_display_get_synchronized_update_default;
+	ddev->apply_config = mcde_display_apply_config_default;
+	ddev->invalidate_area = mcde_display_invalidate_area_default;
+	ddev->update = mcde_display_update_default;
+	ddev->prepare_for_update = mcde_display_prepare_for_update_default;
+	ddev->on_first_update = mcde_display_on_first_update_default;
+}
+
diff --git a/drivers/video/mcde/mcde_dss.c b/drivers/video/mcde/mcde_dss.c
new file mode 100644
index 00000000000..a53040f48e1
--- /dev/null
+++ b/drivers/video/mcde/mcde_dss.c
@@ -0,0 +1,386 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2010
+ *
+ * ST-Ericsson MCDE display sub system driver
+ *
+ * Author: Marcus Lorentzon <marcus.xm.lorentzon@stericsson.com>
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+
+#include <linux/kernel.h>
+#include <linux/device.h>
+#include <linux/err.h>
+#include <linux/slab.h>
+
+#include <video/mcde_dss.h>
+
+#define to_overlay(x) container_of(x, struct mcde_overlay, kobj)
+
+void overlay_release(struct kobject *kobj)
+{
+	struct mcde_overlay *ovly = to_overlay(kobj);
+
+	kfree(ovly);
+}
+
+struct kobj_type ovly_type = {
+	.release = overlay_release,
+};
+
+static int apply_overlay(struct mcde_overlay *ovly,
+				struct mcde_overlay_info *info, bool force)
+{
+	int ret = 0;
+	if (ovly->ddev->invalidate_area) {
+		/* TODO: transform ovly coord to screen coords (vmode):
+		 * add offset
+		 */
+		struct mcde_rectangle dirty = info->dirty;
+		ret = ovly->ddev->invalidate_area(ovly->ddev, &dirty);
+	}
+
+	if (ovly->info.paddr != info->paddr || force)
+		mcde_ovly_set_source_buf(ovly->state, info->paddr);
+
+	if (ovly->info.stride != info->stride || ovly->info.fmt != info->fmt ||
+									force)
+		mcde_ovly_set_source_info(ovly->state, info->stride, info->fmt);
+	if (ovly->info.src_x != info->src_x ||
+					ovly->info.src_y != info->src_y ||
+					ovly->info.w != info->w ||
+					ovly->info.h != info->h || force)
+		mcde_ovly_set_source_area(ovly->state,
+				info->src_x, info->src_y, info->w, info->h);
+	if (ovly->info.dst_x != info->dst_x || ovly->info.dst_y != info->dst_y
+					|| ovly->info.dst_z != info->dst_z ||
+					force)
+		mcde_ovly_set_dest_pos(ovly->state,
+					info->dst_x, info->dst_y, info->dst_z);
+
+	mcde_ovly_apply(ovly->state);
+	ovly->info = *info;
+
+	return ret;
+}
+
+/* MCDE DSS operations */
+
+int mcde_dss_open_channel(struct mcde_display_device *ddev)
+{
+	int ret;
+	struct mcde_chnl_state *chnl;
+
+	/* Acquire MCDE resources */
+	chnl = mcde_chnl_get(ddev->chnl_id, ddev->fifo, ddev->port);
+	if (IS_ERR(chnl)) {
+		ret = PTR_ERR(chnl);
+		dev_warn(&ddev->dev, "Failed to acquire MCDE channel\n");
+		return ret;
+	}
+	ddev->chnl_state = chnl;
+	return 0;
+}
+EXPORT_SYMBOL(mcde_dss_open_channel);
+
+void mcde_dss_close_channel(struct mcde_display_device *ddev)
+{
+	mcde_chnl_put(ddev->chnl_state);
+	ddev->chnl_state = NULL;
+}
+EXPORT_SYMBOL(mcde_dss_close_channel);
+
+int mcde_dss_enable_display(struct mcde_display_device *ddev)
+{
+	int ret;
+
+	if (ddev->enabled)
+		return 0;
+
+	mcde_chnl_enable(ddev->chnl_state);
+
+	/* Initiate display communication */
+	ret = ddev->set_power_mode(ddev, MCDE_DISPLAY_PM_STANDBY);
+	if (ret < 0) {
+		dev_warn(&ddev->dev, "Failed to initialize display\n");
+		goto display_failed;
+	}
+
+	ret = ddev->set_synchronized_update(ddev,
+					ddev->get_synchronized_update(ddev));
+	if (ret < 0)
+		dev_warn(&ddev->dev, "Failed to set sync\n");
+
+	ret = mcde_chnl_enable_synchronized_update(ddev->chnl_state,
+		ddev->synchronized_update);
+	if (ret < 0) {
+		dev_warn(&ddev->dev,
+			"%s:Failed to enable synchronized update\n",
+			__func__);
+		goto enable_sync_failed;
+	}
+	/* TODO: call driver for all defaults like sync_update above */
+
+	dev_dbg(&ddev->dev, "Display enabled, chnl=%d\n",
+					ddev->chnl_id);
+	ddev->enabled = true;
+	return 0;
+
+enable_sync_failed:
+	ddev->set_power_mode(ddev, MCDE_DISPLAY_PM_OFF);
+display_failed:
+	mcde_chnl_disable(ddev->chnl_state);
+	return ret;
+}
+EXPORT_SYMBOL(mcde_dss_enable_display);
+
+void mcde_dss_disable_display(struct mcde_display_device *ddev)
+{
+	if (!ddev->enabled)
+		return;
+
+	/* TODO: Disable overlays */
+
+	mcde_chnl_stop_flow(ddev->chnl_state);
+
+	(void)ddev->set_power_mode(ddev, MCDE_DISPLAY_PM_OFF);
+
+	mcde_chnl_disable(ddev->chnl_state);
+
+	ddev->enabled = false;
+
+	dev_dbg(&ddev->dev, "Display disabled, chnl=%d\n", ddev->chnl_id);
+}
+EXPORT_SYMBOL(mcde_dss_disable_display);
+
+int mcde_dss_apply_channel(struct mcde_display_device *ddev)
+{
+	if (!ddev->apply_config)
+		return -EINVAL;
+
+	return ddev->apply_config(ddev);
+}
+EXPORT_SYMBOL(mcde_dss_apply_channel);
+
+struct mcde_overlay *mcde_dss_create_overlay(struct mcde_display_device *ddev,
+	struct mcde_overlay_info *info)
+{
+	struct mcde_overlay *ovly;
+
+	ovly = kzalloc(sizeof(struct mcde_overlay), GFP_KERNEL);
+	if (!ovly)
+		return NULL;
+
+	kobject_init(&ovly->kobj, &ovly_type); /* Local ref */
+	kobject_get(&ovly->kobj); /* Creator ref */
+	INIT_LIST_HEAD(&ovly->list);
+	list_add(&ddev->ovlys, &ovly->list);
+	ovly->info = *info;
+	ovly->ddev = ddev;
+
+	return ovly;
+}
+EXPORT_SYMBOL(mcde_dss_create_overlay);
+
+void mcde_dss_destroy_overlay(struct mcde_overlay *ovly)
+{
+	list_del(&ovly->list);
+	if (ovly->state)
+		mcde_dss_disable_overlay(ovly);
+	kobject_put(&ovly->kobj);
+}
+EXPORT_SYMBOL(mcde_dss_destroy_overlay);
+
+int mcde_dss_enable_overlay(struct mcde_overlay *ovly)
+{
+	int ret;
+
+	if (!ovly->ddev->chnl_state)
+		return -EINVAL;
+
+	if (!ovly->state) {
+		struct mcde_ovly_state *state;
+		state = mcde_ovly_get(ovly->ddev->chnl_state);
+		if (IS_ERR(state)) {
+			ret = PTR_ERR(state);
+			dev_warn(&ovly->ddev->dev,
+				"Failed to acquire overlay\n");
+			return ret;
+		}
+		ovly->state = state;
+	}
+
+	apply_overlay(ovly, &ovly->info, true);
+
+	dev_vdbg(&ovly->ddev->dev, "Overlay enabled, chnl=%d\n",
+							ovly->ddev->chnl_id);
+	return 0;
+}
+EXPORT_SYMBOL(mcde_dss_enable_overlay);
+
+int mcde_dss_apply_overlay(struct mcde_overlay *ovly,
+						struct mcde_overlay_info *info)
+{
+	if (info == NULL)
+		info = &ovly->info;
+	return apply_overlay(ovly, info, false);
+}
+EXPORT_SYMBOL(mcde_dss_apply_overlay);
+
+void mcde_dss_disable_overlay(struct mcde_overlay *ovly)
+{
+	if (!ovly->state)
+		return;
+
+	mcde_ovly_put(ovly->state);
+
+	dev_dbg(&ovly->ddev->dev, "Overlay disabled, chnl=%d\n",
+							ovly->ddev->chnl_id);
+
+	ovly->state = NULL;
+}
+EXPORT_SYMBOL(mcde_dss_disable_overlay);
+
+int mcde_dss_update_overlay(struct mcde_overlay *ovly)
+{
+	int ret;
+
+	dev_vdbg(&ovly->ddev->dev, "Overlay update, chnl=%d\n",
+							ovly->ddev->chnl_id);
+
+	if (!ovly->state || !ovly->ddev->update || !ovly->ddev->invalidate_area)
+		return -EINVAL;
+
+	/* Do not perform an update if power mode is off */
+	if (ovly->ddev->get_power_mode(ovly->ddev) == MCDE_DISPLAY_PM_OFF)
+		return 0;
+
+	ret = ovly->ddev->update(ovly->ddev);
+	if (ret)
+		return ret;
+
+	return ovly->ddev->invalidate_area(ovly->ddev, NULL);
+}
+EXPORT_SYMBOL(mcde_dss_update_overlay);
+
+void mcde_dss_get_native_resolution(struct mcde_display_device *ddev,
+	u16 *x_res, u16 *y_res)
+{
+	ddev->get_native_resolution(ddev, x_res, y_res);
+}
+EXPORT_SYMBOL(mcde_dss_get_native_resolution);
+
+enum mcde_ovly_pix_fmt mcde_dss_get_default_pixel_format(
+	struct mcde_display_device *ddev)
+{
+	return ddev->get_default_pixel_format(ddev);
+}
+EXPORT_SYMBOL(mcde_dss_get_default_pixel_format);
+
+void mcde_dss_get_physical_size(struct mcde_display_device *ddev,
+	u16 *physical_width, u16 *physical_height)
+{
+	ddev->get_physical_size(ddev, physical_width, physical_height);
+}
+EXPORT_SYMBOL(mcde_dss_get_physical_size);
+
+int mcde_dss_try_video_mode(struct mcde_display_device *ddev,
+	struct mcde_video_mode *video_mode)
+{
+	return ddev->try_video_mode(ddev, video_mode);
+}
+EXPORT_SYMBOL(mcde_dss_try_video_mode);
+
+int mcde_dss_set_video_mode(struct mcde_display_device *ddev,
+	struct mcde_video_mode *vmode)
+{
+	int ret;
+	struct mcde_video_mode old_vmode;
+
+	ddev->get_video_mode(ddev, &old_vmode);
+	if (memcmp(vmode, &old_vmode, sizeof(old_vmode)) == 0)
+		return 0;
+
+	ret = ddev->set_video_mode(ddev, vmode);
+	if (ret)
+		return ret;
+
+	return ddev->invalidate_area(ddev, NULL);
+}
+EXPORT_SYMBOL(mcde_dss_set_video_mode);
+
+void mcde_dss_get_video_mode(struct mcde_display_device *ddev,
+	struct mcde_video_mode *video_mode)
+{
+	ddev->get_video_mode(ddev, video_mode);
+}
+EXPORT_SYMBOL(mcde_dss_get_video_mode);
+
+int mcde_dss_set_pixel_format(struct mcde_display_device *ddev,
+	enum mcde_ovly_pix_fmt pix_fmt)
+{
+	enum mcde_ovly_pix_fmt old_pix_fmt;
+
+	old_pix_fmt = ddev->get_pixel_format(ddev);
+	if (old_pix_fmt == pix_fmt)
+		return 0;
+
+	return ddev->set_pixel_format(ddev, pix_fmt);
+}
+EXPORT_SYMBOL(mcde_dss_set_pixel_format);
+
+int mcde_dss_get_pixel_format(struct mcde_display_device *ddev)
+{
+	return ddev->get_pixel_format(ddev);
+}
+EXPORT_SYMBOL(mcde_dss_get_pixel_format);
+
+int mcde_dss_set_rotation(struct mcde_display_device *ddev,
+	enum mcde_display_rotation rotation)
+{
+	enum mcde_display_rotation old_rotation;
+
+	old_rotation = ddev->get_rotation(ddev);
+	if (old_rotation == rotation)
+		return 0;
+
+	return ddev->set_rotation(ddev, rotation);
+}
+EXPORT_SYMBOL(mcde_dss_set_rotation);
+
+enum mcde_display_rotation mcde_dss_get_rotation(
+	struct mcde_display_device *ddev)
+{
+	return ddev->get_rotation(ddev);
+}
+EXPORT_SYMBOL(mcde_dss_get_rotation);
+
+int mcde_dss_set_synchronized_update(struct mcde_display_device *ddev,
+	bool enable)
+{
+	int ret;
+	ret = ddev->set_synchronized_update(ddev, enable);
+	if (ret)
+		return ret;
+	if (ddev->chnl_state)
+		mcde_chnl_enable_synchronized_update(ddev->chnl_state, enable);
+	return 0;
+}
+EXPORT_SYMBOL(mcde_dss_set_synchronized_update);
+
+bool mcde_dss_get_synchronized_update(struct mcde_display_device *ddev)
+{
+	return ddev->get_synchronized_update(ddev);
+}
+EXPORT_SYMBOL(mcde_dss_get_synchronized_update);
+
+int __init mcde_dss_init(void)
+{
+	return 0;
+}
+
+void mcde_dss_exit(void)
+{
+}
+
diff --git a/drivers/video/mcde/mcde_fb.c b/drivers/video/mcde/mcde_fb.c
new file mode 100644
index 00000000000..dadb9cf918e
--- /dev/null
+++ b/drivers/video/mcde/mcde_fb.c
@@ -0,0 +1,749 @@
+/*
+ * Copyright (C) ST-Ericsson AB 2010
+ *
+ * ST-Ericsson MCDE frame buffer driver
+ *
+ * Author: Marcus Lorentzon <marcus.xm.lorentzon@stericsson.com>
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+
+#include <linux/kernel.h>
+#include <linux/device.h>
+#include <linux/platform_device.h>
+#include <linux/fb.h>
+#include <linux/mm.h>
+#include <linux/dma-mapping.h>
+
+#include <linux/hwmem.h>
+#include <linux/io.h>
+
+#include <video/mcde_fb.h>
+
+#define MCDE_FB_BPP_MAX		16
+#define MCDE_FB_VXRES_MAX	1920
+#define MCDE_FB_VYRES_MAX	2160
+
+static struct fb_ops fb_ops;
+
+struct pix_fmt_info {
+	enum mcde_ovly_pix_fmt pix_fmt;
+
+	u32		   bpp;
+	struct fb_bitfield r;
+	struct fb_bitfield g;
+	struct fb_bitfield b;
+	struct fb_bitfield a;
+	u32                nonstd;
+};
+
+struct pix_fmt_info pix_fmt_map[] = {
+	{
+		.pix_fmt = MCDE_OVLYPIXFMT_RGB565,
+		.bpp = 16,
+		.r = { .offset = 11, .length = 5 },
+		.g = { .offset =  5, .length = 6 },
+		.b = { .offset =  0, .length = 5 },
+	}, {
+		.pix_fmt = MCDE_OVLYPIXFMT_RGBA5551,
+		.bpp = 16,
+		.r = { .offset = 11, .length = 5 },
+		.g = { .offset =  6, .length = 5 },
+		.b = { .offset =  1, .length = 5 },
+		.a = { .offset =  0, .length = 1 },
+	}, {
+		.pix_fmt = MCDE_OVLYPIXFMT_RGBA4444,
+		.bpp = 16,
+		.r = { .offset = 12, .length = 4 },
+		.g = { .offset =  8, .length = 4 },
+		.b = { .offset =  4, .length = 4 },
+		.a = { .offset =  0, .length = 4 },
+	}, {
+		.pix_fmt = MCDE_OVLYPIXFMT_YCbCr422,
+		.bpp = 16,
+		.nonstd = MCDE_OVLYPIXFMT_YCbCr422,
+	}, {
+		.pix_fmt = MCDE_OVLYPIXFMT_RGB888,
+		.bpp = 24,
+		.r = { .offset = 16, .length = 8 },
+		.g = { .offset =  8, .length = 8 },
+		.b = { .offset =  0, .length = 8 },
+	}, {
+		.pix_fmt = MCDE_OVLYPIXFMT_RGBA8888,
+		.bpp = 32,
+		.r = { .offset = 16, .length = 8 },
+		.g = { .offset =  8, .length = 8 },
+		.b = { .offset =  0, .length = 8 },
+		.a = { .offset = 24, .length = 8 },
+	}, {
+		.pix_fmt = MCDE_OVLYPIXFMT_RGBX8888,
+		.bpp = 32,
+		.r = { .offset = 16, .length = 8 },
+		.g = { .offset =  8, .length = 8 },
+		.b = { .offset =  0, .length = 8 },
+	}
+
+};
+
+static struct platform_device mcde_fb_device = {
+	.name = "mcde_fb",
+	.id = -1,
+};
+
+#ifdef CONFIG_HAS_EARLYSUSPEND
+static void early_suspend(struct early_suspend *data)
+{
+	int i;
+	struct mcde_fb *mfb =
+		container_of(data, struct mcde_fb, early_suspend);
+
+	for (i = 0; i < mfb->num_ovlys; i++) {
+		if (mfb->ovlys[i])
+			mcde_dss_disable_display(mfb->ovlys[i]->ddev);
+	}
+}
+
+static void late_resume(struct early_suspend *data)
+{
+	int i;
+	struct mcde_fb *mfb =
+		container_of(data, struct mcde_fb, early_suspend);
+
+	for (i = 0; i < mfb->num_ovlys; i++) {
+		if (mfb->ovlys[i]) {
+			struct mcde_overlay *ovly = mfb->ovlys[i];
+			(void) mcde_dss_enable_display(ovly->ddev);
+		}
+	}
+}
+#endif
+
+/* Helpers */
+
+static struct pix_fmt_info *find_pix_fmt_info(enum mcde_ovly_pix_fmt pix_fmt)
+{
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(pix_fmt_map); i++) {
+		if (pix_fmt_map[i].pix_fmt == pix_fmt)
+			return &pix_fmt_map[i];
+	}
+	return NULL;
+}
+
+static bool bitfield_cmp(struct fb_bitfield *bf1, struct fb_bitfield *bf2)
+{
+	return bf1->offset == bf2->offset &&
+		bf1->length == bf2->length &&
+		bf1->msb_right == bf2->msb_right;
+}
+
+static struct pix_fmt_info *var_to_pix_fmt_info(struct fb_var_screeninfo *var)
+{
+	int i;
+	struct pix_fmt_info *info;
+
+	if (var->nonstd)
+		return find_pix_fmt_info(var->nonstd);
+
+	for (i = 0; i < ARRAY_SIZE(pix_fmt_map); i++) {
+		info = &pix_fmt_map[i];
+		if (info->bpp == var->bits_per_pixel &&
+					bitfield_cmp(&info->r, &var->red) &&
+					bitfield_cmp(&info->g, &var->green) &&
+					bitfield_cmp(&info->b, &var->blue) &&
+					bitfield_cmp(&info->a, &var->transp))
+			return info;
+	}
+
+	for (i = 0; i < ARRAY_SIZE(pix_fmt_map); i++) {
+		info = &pix_fmt_map[i];
+		if (var->bits_per_pixel == info->bpp)
+			return info;
+	}
+
+	return NULL;
+}
+
+static void pix_fmt_info_to_var(struct pix_fmt_info *pix_fmt_info,
+	struct fb_var_screeninfo *var)
+{
+	var->bits_per_pixel = pix_fmt_info->bpp;
+	var->nonstd = pix_fmt_info->nonstd;
+	var->red = pix_fmt_info->r;
+	var->green = pix_fmt_info->g;
+	var->blue = pix_fmt_info->b;
+	var->transp = pix_fmt_info->a;
+}
+
+static int init_var_fmt(struct fb_var_screeninfo *var,
+	u16 w, u16 h, u16 vw, u16 vh, enum mcde_ovly_pix_fmt pix_fmt,
+	u32 rotate)
+{
+	struct pix_fmt_info *info;
+
+	info = find_pix_fmt_info(pix_fmt);
+	if (!info)
+		return -EINVAL;
+
+	var->bits_per_pixel = info->bpp;
+	var->nonstd         = info->nonstd;
+	var->red            = info->r;
+	var->green          = info->g;
+	var->blue           = info->b;
+	var->transp         = info->a;
+	var->grayscale      = false;
+
+	var->xres = w;
+	var->yres = h;
+	var->xres_virtual = vw;
+	var->yres_virtual = vh;
+	var->xoffset = 0;
+	var->yoffset = 0;
+	var->activate = FB_ACTIVATE_NOW;
+	var->rotate = rotate;
+	return 0;
+};
+
+static int reallocate_fb_mem(struct fb_info *fbi, u32 size)
+{
+	struct mcde_fb *mfb = to_mcde_fb(fbi);
+	dma_addr_t paddr;
+	void __iomem *vaddr;
+	struct hwmem_alloc *alloc;
+	int name;
+
+	size = PAGE_ALIGN(size);
+
+	if (size == fbi->screen_size)
+		return 0;
+
+/* TODO: Remove once hwmem has support for defragmentation */
+#ifdef CONFIG_MCDE_FB_AVOID_REALLOC
+	if (!mfb->alloc) {
+		u32 old_size = size;
+
+		size = MCDE_FB_BPP_MAX / 8 * MCDE_FB_VXRES_MAX *
+			MCDE_FB_VYRES_MAX;
+#endif
+
+		alloc = hwmem_alloc(size, HWMEM_ALLOC_BUFFERED,
+				(HWMEM_ACCESS_READ  | HWMEM_ACCESS_WRITE |
+					HWMEM_ACCESS_IMPORT),
+				HWMEM_MEM_CONTIGUOUS_SYS);
+		if (IS_ERR(alloc))
+			return PTR_ERR(alloc);
+
+		name = hwmem_get_name(alloc);
+		if (name < 0) {
+			hwmem_release(alloc);
+			return name;
+		}
+
+		if (mfb->alloc) {
+			hwmem_unpin(mfb->alloc);
+			hwmem_release(mfb->alloc);
+		}
+
+		(void)hwmem_pin(alloc, &paddr, NULL);
+
+		vaddr = ioremap(paddr, size);
+
+		mfb->alloc = alloc;
+		mfb->alloc_name = name;
+
+		fbi->screen_base = vaddr;
+		fbi->fix.smem_start = paddr;
+
+#ifdef CONFIG_MCDE_FB_AVOID_REALLOC
+		size = old_size;
+	}
+#endif
+
+	fbi->screen_size = size;
+	fbi->fix.smem_len = size;
+
+	return 0;
+}
+
+static void free_fb_mem(struct fb_info *fbi)
+{
+	struct mcde_fb *mfb = to_mcde_fb(fbi);
+
+	if (mfb->alloc) {
+		hwmem_unpin(mfb->alloc);
+		hwmem_release(mfb->alloc);
+		mfb->alloc = NULL;
+		mfb->alloc_name = 0;
+
+		fbi->fix.smem_start = 0;
+		fbi->fix.smem_len = 0;
+		fbi->screen_base = 0;
+		fbi->screen_size = 0;
+	}
+}
+
+static void init_fb(struct fb_info *fbi)
+{
+	struct mcde_fb *mfb = to_mcde_fb(fbi);
+
+	strlcpy(fbi->fix.id, "mcde_fb", sizeof(fbi->fix.id));
+	fbi->fix.type = FB_TYPE_PACKED_PIXELS;
+	fbi->fix.visual = FB_VISUAL_TRUECOLOR;
+	fbi->fix.xpanstep = 1;
+	fbi->fix.ypanstep = 1;
+	fbi->flags = FBINFO_HWACCEL_DISABLED;
+	fbi->fbops = &fb_ops;
+	fbi->pseudo_palette = &mfb->pseudo_palette[0];
+}
+
+static void get_ovly_info(struct fb_info *fbi, struct mcde_overlay *ovly,
+	struct mcde_overlay_info *info)
+{
+	struct mcde_fb *mfb = to_mcde_fb(fbi);
+
+	memset(info, 0, sizeof(*info));
+	info->paddr = fbi->fix.smem_start +
+		fbi->fix.line_length * fbi->var.yoffset;
+	/* TODO: move mem check to check_var/pan_display */
+	if (info->paddr + fbi->fix.line_length * fbi->var.yres >
+		fbi->fix.smem_start + fbi->fix.smem_len)
+		info->paddr = fbi->fix.smem_start;
+	info->fmt = mfb->pix_fmt;
+	info->stride = fbi->fix.line_length;
+	if (ovly) {
+		info->src_x = ovly->info.src_x;
+		info->src_y = ovly->info.src_y;
+		info->dst_x = ovly->info.dst_x;
+		info->dst_y = ovly->info.dst_y;
+		info->dst_z = 1;
+	} else {
+		info->src_x = 0;
+		info->src_y = 0;
+		info->dst_x = 0;
+		info->dst_y = 0;
+		info->dst_z = 1;
+	}
+	info->w = fbi->var.xres;
+	info->h = fbi->var.yres;
+	info->dirty.x = 0;
+	info->dirty.y = 0;
+	info->dirty.w = fbi->var.xres;
+	info->dirty.h = fbi->var.yres;
+}
+
+void vmode_to_var(struct mcde_video_mode *video_mode,
+	struct fb_var_screeninfo *var)
+{
+	/* TODO: use only 1 vbp and 1 vfp */
+	var->xres           = video_mode->xres;
+	var->yres           = video_mode->yres;
+	var->pixclock       = video_mode->pixclock;
+	var->upper_margin   = video_mode->vbp1 + video_mode->vbp2;
+	var->lower_margin   = video_mode->vfp1 + video_mode->vfp2;
+	var->vsync_len      = video_mode->vsw;
+	var->left_margin    = video_mode->hbp;
+	var->right_margin   = video_mode->hfp;
+	var->hsync_len      = video_mode->hsw;
+	var->vmode         &= ~FB_VMODE_INTERLACED;
+	var->vmode         |= video_mode->interlaced ?
+				FB_VMODE_INTERLACED : FB_VMODE_NONINTERLACED;
+}
+
+void var_to_vmode(struct fb_var_screeninfo *var,
+	struct mcde_video_mode *video_mode)
+{
+	video_mode->xres       = var->xres;
+	video_mode->yres       = var->yres;
+	video_mode->pixclock   = var->pixclock;
+	video_mode->vbp1       = var->upper_margin / 2;
+	video_mode->vfp1       = var->lower_margin / 2;
+	video_mode->vbp2       = video_mode->vbp1 + var->upper_margin % 2;
+	video_mode->vfp2       = video_mode->vfp1 + var->lower_margin % 2;
+	video_mode->vsw        = var->vsync_len;
+	video_mode->hbp        = var->left_margin;
+	video_mode->hfp        = var->right_margin;
+	video_mode->hsw        = var->hsync_len;
+	video_mode->interlaced = (var->vmode & FB_VMODE_INTERLACED) ==
+							FB_VMODE_INTERLACED;
+}
+
+enum mcde_display_rotation var_to_rotation(struct fb_var_screeninfo *var)
+{
+	enum mcde_display_rotation rot;
+
+	switch (var->rotate) {
+	case FB_ROTATE_UR:
+		rot = MCDE_DISPLAY_ROT_0;
+		break;
+	case FB_ROTATE_CW:
+		rot = MCDE_DISPLAY_ROT_90_CW;
+		break;
+	case FB_ROTATE_UD:
+		rot = MCDE_DISPLAY_ROT_180_CW;
+		break;
+	case FB_ROTATE_CCW:
+		rot = MCDE_DISPLAY_ROT_90_CCW;
+		break;
+	default:
+		rot = MCDE_DISPLAY_ROT_0;
+		break;
+	}
+	dev_vdbg(&mcde_fb_device.dev, "var_rot: %d -> mcde_rot: %d\n",
+							var->rotate, rot);
+	return rot;
+}
+
+static struct mcde_display_device *fb_to_display(struct fb_info *fbi)
+{
+	int i;
+	struct mcde_fb *mfb = to_mcde_fb(fbi);
+
+	for (i = 0; i < mfb->num_ovlys; i++) {
+		if (mfb->ovlys[i])
+			return mfb->ovlys[i]->ddev;
+	}
+	return NULL;
+}
+
+static int check_var(struct fb_var_screeninfo *var, struct fb_info *fbi,
+	struct mcde_display_device *ddev)
+{
+	int ret;
+	u16 w = -1, h = -1;
+	struct mcde_video_mode vmode;
+	struct pix_fmt_info *fmtinfo;
+
+	/* TODO: check sizes/offsets/memory validity */
+
+	/* Device physical size */
+	mcde_dss_get_physical_size(ddev, &w, &h);
+	var->width  = w;
+	var->height = h;
+
+	/* Rotation */
+	if (var->rotate > 3) {
+		dev_info(&(ddev->dev), "check_var failed var->rotate\n");
+		return -EINVAL;
+	}
+
+	/* Video mode */
+	var_to_vmode(var, &vmode);
+	ret = mcde_dss_try_video_mode(ddev, &vmode);
+	if (ret < 0) {
+		dev_vdbg(&(ddev->dev), "check_var failed "
+			"mcde_dss_try_video_mode with size = %x\n", ret);
+		return ret;
+	}
+	vmode_to_var(&vmode, var);
+
+	/* Pixel format */
+	fmtinfo = var_to_pix_fmt_info(var);
+	if (!fmtinfo) {
+		dev_vdbg(&(ddev->dev), "check_var failed fmtinfo\n");
+		return -EINVAL;
+	}
+	pix_fmt_info_to_var(fmtinfo, var);
+
+	/* Not used */
+	var->grayscale = 0;
+	var->sync = 0;
+
+	return 0;
+}
+
+static int apply_var(struct fb_info *fbi, struct mcde_display_device *ddev)
+{
+	int ret, i;
+	struct mcde_fb *mfb = to_mcde_fb(fbi);
+	struct fb_var_screeninfo *var;
+	struct mcde_video_mode vmode;
+	struct pix_fmt_info *fmt;
+	u32 line_len, size;
+
+	dev_vdbg(&(ddev->dev), "%s\n", __func__);
+
+	var = &fbi->var;
+
+	/* Reallocate memory */
+	line_len = (fbi->var.bits_per_pixel * var->xres_virtual) / 8;
+	line_len = ALIGN(line_len, MCDE_BUF_LINE_ALIGMENT);
+	size = line_len * var->yres_virtual;
+	ret = reallocate_fb_mem(fbi, size);
+	if (ret) {
+		dev_vdbg(&(ddev->dev), "apply_var failed with"
+				"reallocate mem with size = %d\n", size);
+		return ret;
+	}
+	fbi->fix.line_length = line_len;
+
+	if (ddev) {
+		/* Apply pixel format */
+		fmt = var_to_pix_fmt_info(var);
+		mfb->pix_fmt = fmt->pix_fmt;
+		mcde_dss_set_pixel_format(ddev, mfb->pix_fmt);
+
+		/* Apply rotation */
+		mcde_dss_set_rotation(ddev, var_to_rotation(var));
+		/* Apply video mode */
+		memset(&vmode, 0, sizeof(struct mcde_video_mode));
+		var_to_vmode(var, &vmode);
+		ret = mcde_dss_set_video_mode(ddev, &vmode);
+		if (ret)
+			return ret;
+
+		mcde_dss_apply_channel(ddev);
+	}
+
+	/* Apply overlay info */
+	for (i = 0; i < mfb->num_ovlys; i++) {
+		struct mcde_overlay *ovly = mfb->ovlys[i];
+		struct mcde_overlay_info info;
+
+		get_ovly_info(fbi, ovly, &info);
+		(void) mcde_dss_apply_overlay(ovly, &info);
+		ret = mcde_dss_update_overlay(ovly);
+	}
+
+	return 0;
+}
+
+/* FB ops */
+
+static int mcde_fb_open(struct fb_info *fbi, int user)
+{
+	dev_vdbg(fbi->dev, "%s\n", __func__);
+	return 0;
+}
+
+static int mcde_fb_release(struct fb_info *fbi, int user)
+{
+	dev_vdbg(fbi->dev, "%s\n", __func__);
+	return 0;
+}
+
+static int mcde_fb_check_var(struct fb_var_screeninfo *var, struct fb_info *fbi)
+{
+	struct mcde_display_device *ddev = fb_to_display(fbi);
+
+	dev_vdbg(fbi->dev, "%s\n", __func__);
+
+	if (!ddev) {
+		printk(KERN_ERR "mcde_fb_check_var failed !ddev\n");
+		return -ENODEV;
+	}
+
+	return check_var(var, fbi, ddev);
+}
+
+static int mcde_fb_set_par(struct fb_info *fbi)
+{
+	dev_vdbg(fbi->dev, "%s\n", __func__);
+
+	return apply_var(fbi, fb_to_display(fbi));
+}
+
+static int mcde_fb_blank(int blank, struct fb_info *fbi)
+{
+	return 0;
+}
+
+static int mcde_fb_pan_display(struct fb_var_screeninfo *var,
+	struct fb_info *fbi)
+{
+	dev_vdbg(fbi->dev, "%s\n", __func__);
+
+	if (var->xoffset == fbi->var.xoffset &&
+					var->yoffset == fbi->var.yoffset)
+		return 0;
+
+	fbi->var.xoffset = var->xoffset;
+	fbi->var.yoffset = var->yoffset;
+	return apply_var(fbi, fb_to_display(fbi));
+}
+
+static void mcde_fb_rotate(struct fb_info *fbi, int rotate)
+{
+	dev_vdbg(fbi->dev, "%s\n", __func__);
+}
+
+static int mcde_fb_ioctl(struct fb_info *fbi, unsigned int cmd,
+							 unsigned long arg)
+{
+	struct mcde_fb *mfb = to_mcde_fb(fbi);
+
+	if (cmd == MCDE_GET_BUFFER_NAME_IOC)
+		return mfb->alloc_name;
+
+	return -EINVAL;
+}
+
+static struct fb_ops fb_ops = {
+	/* creg, cmap */
+	.owner          = THIS_MODULE,
+	.fb_open        = mcde_fb_open,
+	.fb_release     = mcde_fb_release,
+	.fb_read        = fb_sys_read,
+	.fb_write       = fb_sys_write,
+	.fb_fillrect    = sys_fillrect,
+	.fb_copyarea    = sys_copyarea,
+	.fb_imageblit   = sys_imageblit,
+	.fb_check_var   = mcde_fb_check_var,
+	.fb_set_par     = mcde_fb_set_par,
+	.fb_blank       = mcde_fb_blank,
+	.fb_pan_display = mcde_fb_pan_display,
+	.fb_rotate      = mcde_fb_rotate,
+	.fb_ioctl       = mcde_fb_ioctl,
+};
+
+/* FB driver */
+
+struct fb_info *mcde_fb_create(struct mcde_display_device *ddev,
+	u16 w, u16 h, u16 vw, u16 vh, enum mcde_ovly_pix_fmt pix_fmt,
+	u32 rotate)
+{
+	int ret = 0;
+	struct fb_info *fbi;
+	struct mcde_fb *mfb;
+	struct mcde_overlay *ovly = NULL;
+	struct mcde_overlay_info ovly_info;
+
+	dev_vdbg(&ddev->dev, "%s\n", __func__);
+	if (!ddev->initialized) {
+		dev_warn(&ddev->dev, "%s: Device not initialized\n", __func__);
+		return ERR_PTR(-EINVAL);
+	}
+
+	/* Init fb */
+	fbi = framebuffer_alloc(sizeof(struct mcde_fb), &mcde_fb_device.dev);
+	if (fbi == NULL) {
+		ret = -ENOMEM;
+		goto fb_alloc_failed;
+	}
+	init_fb(fbi);
+	mfb = to_mcde_fb(fbi);
+
+	ret = mcde_dss_open_channel(ddev);
+	if (ret)
+		goto channel_open_failed;
+
+
+	ret = mcde_dss_enable_display(ddev);
+	if (ret)
+		goto display_enable_failed;
+
+	/* Prepare var and allocate frame buffer memory */
+	init_var_fmt(&fbi->var, w, h, vw, vh, pix_fmt, rotate);
+	check_var(&fbi->var, fbi, ddev);
+	ret = apply_var(fbi, ddev);
+	if (ret)
+		goto apply_var_failed;
+
+	/* Setup overlay */
+	get_ovly_info(fbi, NULL, &ovly_info);
+	ovly = mcde_dss_create_overlay(ddev, &ovly_info);
+	if (!ovly) {
+		ret = PTR_ERR(ovly);
+		goto ovly_alloc_failed;
+	}
+	mfb->ovlys[0] = ovly;
+	mfb->num_ovlys = 1;
+
+	ret = mcde_dss_enable_overlay(ovly);
+	if (ret)
+		goto ovly_enable_failed;
+
+	mfb->id = ddev->id;
+
+	/* Register framebuffer */
+	ret = register_framebuffer(fbi);
+	if (ret)
+		goto fb_register_failed;
+
+#ifdef CONFIG_HAS_EARLYSUSPEND
+	mfb->early_suspend.level =
+				EARLY_SUSPEND_LEVEL_DISABLE_FB;
+	mfb->early_suspend.suspend = early_suspend;
+	mfb->early_suspend.resume = late_resume;
+	register_early_suspend(&mfb->early_suspend);
+#endif
+
+	goto out;
+fb_register_failed:
+	mcde_dss_disable_overlay(ovly);
+ovly_enable_failed:
+	mcde_dss_destroy_overlay(ovly);
+ovly_alloc_failed:
+	free_fb_mem(fbi);
+apply_var_failed:
+	mcde_dss_disable_display(ddev);
+display_enable_failed:
+	mcde_dss_close_channel(ddev);
+channel_open_failed:
+	framebuffer_release(fbi);
+	fbi = NULL;
+fb_alloc_failed:
+out:
+	return ret ? ERR_PTR(ret) : fbi;
+}
+EXPORT_SYMBOL(mcde_fb_create);
+
+int mcde_fb_attach_overlay(struct fb_info *fb_info, struct mcde_overlay *ovl)
+{
+	/* TODO: Attach extra overlay targets */
+	return -EINVAL;
+}
+
+void mcde_fb_destroy(struct fb_info *fb_info)
+{
+	/* TODO: clean up */
+}
+
+/* Overlay fbs' platform device */
+static int mcde_fb_probe(struct platform_device *pdev)
+{
+	return 0;
+}
+
+static int mcde_fb_remove(struct platform_device *pdev)
+{
+	return 0;
+}
+
+static struct platform_driver mcde_fb_driver = {
+	.probe  = mcde_fb_probe,
+	.remove = mcde_fb_remove,
+	.driver = {
+		.name  = "mcde_fb",
+		.owner = THIS_MODULE,
+	},
+};
+
+/* MCDE fb init */
+
+int __init mcde_fb_init(void)
+{
+	int ret;
+
+	ret = platform_driver_register(&mcde_fb_driver);
+	if (ret)
+		goto fb_driver_failed;
+	ret = platform_device_register(&mcde_fb_device);
+	if (ret)
+		goto fb_device_failed;
+
+	goto out;
+fb_device_failed:
+	platform_driver_unregister(&mcde_fb_driver);
+fb_driver_failed:
+out:
+	return ret;
+}
+
+void mcde_fb_exit(void)
+{
+	platform_device_unregister(&mcde_fb_device);
+	platform_driver_unregister(&mcde_fb_driver);
+}
+
diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
new file mode 100644
index 00000000000..3b0c3bcd4dc
--- /dev/null
+++ b/drivers/video/mcde/mcde_hw.c
@@ -0,0 +1,3350 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2010
+ *
+ * ST-Ericsson MCDE base driver
+ *
+ * Author: Marcus Lorentzon <marcus.xm.lorentzon@stericsson.com>
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+
+#include <linux/kernel.h>
+#include <linux/device.h>
+#include <linux/platform_device.h>
+#include <linux/io.h>
+#include <linux/gpio.h>
+#include <linux/delay.h>
+#include <linux/spinlock.h>
+#include <linux/err.h>
+#include <linux/wait.h>
+#include <linux/sched.h>
+#include <linux/interrupt.h>
+#include <linux/regulator/consumer.h>
+#include <linux/clk.h>
+#include <linux/slab.h>
+#include <linux/jiffies.h>
+#include <linux/workqueue.h>
+
+#include <video/mcde.h>
+#include "dsilink_regs.h"
+#include "mcde_regs.h"
+
+static void disable_channel(struct mcde_chnl_state *chnl);
+static void watchdog_auto_sync_timer_function(unsigned long arg);
+static int _mcde_chnl_apply(struct mcde_chnl_state *chnl);
+static void disable_flow(struct mcde_chnl_state *chnl);
+static void enable_channel(struct mcde_chnl_state *chnl);
+static void do_softwaretrig(struct mcde_chnl_state *chnl);
+static int is_channel_enabled(struct mcde_chnl_state *chnl);
+static void dsi_te_poll_req(struct mcde_chnl_state *chnl);
+static void dsi_te_poll_set_timer(struct mcde_chnl_state *chnl,
+		unsigned int timeout);
+static void dsi_te_timer_function(unsigned long value);
+
+#define OVLY_TIMEOUT 100
+#define CHNL_TIMEOUT 100
+#define SCREEN_PPL_HIGH 1920
+
+#define MCDE_SLEEP_WATCHDOG 500
+#define DSI_TE_NO_ANSWER_TIMEOUT_INIT 2500
+#define DSI_TE_NO_ANSWER_TIMEOUT 250
+
+static u8 *mcdeio;
+static u8 **dsiio;
+static struct platform_device *mcde_dev;
+static u8 num_dsilinks;
+static u8 num_channels;
+static u8 num_overlays;
+static u8 hardware_version;
+static int mcde_irq;
+
+#ifdef CONFIG_REGULATOR
+static struct regulator *regulator_vana;
+static struct regulator *regulator_mcde_epod;
+static struct regulator *regulator_esram_epod;
+#endif
+static struct clk *clock_dpi;
+static struct clk *clock_dsi;
+static struct clk *clock_mcde;
+static struct clk *clock_dsi_lp;
+static u8 mcde_is_enabled;
+static struct mutex mcde_hw_lock;
+static struct delayed_work hw_timeout_work;
+
+static u8 mcde_dynamic_power_management = true;
+
+static inline u32 dsi_rreg(int i, u32 reg)
+{
+	return readl(dsiio[i] + reg);
+}
+static inline void dsi_wreg(int i, u32 reg, u32 val)
+{
+	writel(val, dsiio[i] + reg);
+}
+#define dsi_rfld(__i, __reg, __fld) \
+	((dsi_rreg(__i, __reg) & __reg##_##__fld##_MASK) >> \
+		__reg##_##__fld##_SHIFT)
+#define dsi_wfld(__i, __reg, __fld, __val) \
+	dsi_wreg(__i, __reg, (dsi_rreg(__i, __reg) & \
+	~__reg##_##__fld##_MASK) | (((__val) << __reg##_##__fld##_SHIFT) & \
+		 __reg##_##__fld##_MASK))
+
+static inline u32 mcde_rreg(u32 reg)
+{
+	return readl(mcdeio + reg);
+}
+static inline void mcde_wreg(u32 reg, u32 val)
+{
+	writel(val, mcdeio + reg);
+}
+#define mcde_wreg_fld(__reg, __fld_mask, __fld_shift, __val) \
+	mcde_wreg(__reg, (mcde_rreg(__reg) & ~(__fld_mask)) |\
+			(((__val) << (__fld_shift)) & (__fld_mask)))
+
+#define mcde_rfld(__reg, __fld) \
+	((mcde_rreg(__reg) & __reg##_##__fld##_MASK) >> \
+		__reg##_##__fld##_SHIFT)
+#define mcde_wfld(__reg, __fld, __val) \
+	mcde_wreg_fld(__reg, __reg##_##__fld##_MASK,\
+						__reg##_##__fld##_SHIFT, __val)
+
+struct ovly_regs {
+	u8   ch_id;
+	bool enabled;
+	u32  baseaddress0;
+	u32  baseaddress1;
+	bool reset_buf_id;
+	u8   bits_per_pixel;
+	u8   bpp;
+	bool bgr;
+	bool bebo;
+	bool opq;
+	u8   col_conv;
+	u8   alpha_source;
+	u8   alpha_value;
+	u8   pixoff;
+	u16  ppl;
+	u16  lpf;
+	u16  cropx;
+	u16  cropy;
+	u16  xpos;
+	u16  ypos;
+	u8   z;
+};
+
+struct mcde_ovly_state {
+	bool inuse;
+	u8 idx; /* MCDE overlay index */
+	struct mcde_chnl_state *chnl; /* Owner channel */
+	u32 transactionid; /* Apply time stamp */
+	u32 transactionid_regs; /* Register update time stamp */
+	u32 transactionid_hw; /* HW completed time stamp */
+	wait_queue_head_t waitq_hw; /* Waitq for transactionid_hw */
+
+	/* Staged settings */
+	u32 paddr;
+	u16 stride;
+	enum mcde_ovly_pix_fmt pix_fmt;
+
+	u16 src_x;
+	u16 src_y;
+	u16 dst_x;
+	u16 dst_y;
+	u16 dst_z;
+	u16 w;
+	u16 h;
+
+	u8 alpha_source;
+	u8 alpha_value;
+
+	/* Applied settings */
+	struct ovly_regs regs;
+};
+
+static struct mcde_ovly_state *overlays;
+
+struct chnl_regs {
+	bool floen;
+	u16  x;
+	u16  y;
+	u16  ppl;
+	u16  lpf;
+	u8   bpp;
+	bool internal_clk; /* CLKTYPE field */
+	u16  pcd;
+	u8   clksel;
+	u8   cdwin;
+	u16 (*map_r)(u8);
+	u16 (*map_g)(u8);
+	u16 (*map_b)(u8);
+	bool palette_enable;
+	bool bcd;
+	bool synchronized_update;
+	bool roten;
+	u8   rotdir;
+	u32  rotbuf1; /* TODO: Replace with eSRAM alloc */
+	u32  rotbuf2; /* TODO: Replace with eSRAM alloc */
+
+	/* Blending */
+	u8 blend_ctrl;
+	bool blend_en;
+	u8 alpha_blend;
+
+	/* DSI */
+	u8 dsipacking;
+};
+
+struct col_regs {
+	u16 y_red;
+	u16 y_green;
+	u16 y_blue;
+	u16 cb_red;
+	u16 cb_green;
+	u16 cb_blue;
+	u16 cr_red;
+	u16 cr_green;
+	u16 cr_blue;
+	u16 off_red;
+	u16 off_green;
+	u16 off_blue;
+};
+
+struct tv_regs {
+	u16 dho; /* TV mode: left border width; destination horizontal offset */
+		 /* LCD MODE: horizontal back porch */
+	u16 alw; /* TV mode: right border width */
+		 /* LCD mode: horizontal front porch */
+	u16 hsw; /* horizontal synch width */
+	u16 dvo; /* TV mode: top border width; destination horizontal offset */
+		 /* LCD MODE: vertical back porch */
+	u16 bsl; /* TV mode: bottom border width; blanking start line */
+		 /* LCD MODE: vertical front porch */
+	/* field 1 */
+	u16 bel1; /* TV mode: field total vertical blanking lines */
+		 /* LCD mode: vertical sync width */
+	u16 fsl1; /* field vbp */
+	/* field 2 */
+	u16 bel2;
+	u16 fsl2;
+	u8 tv_mode;
+	bool sel_mode_tv;
+	bool inv_clk;
+	bool interlaced_en;
+	u32 lcdtim1;
+};
+
+struct mcde_chnl_state {
+	bool enabled;
+	bool reserved;
+	enum mcde_chnl id;
+	enum mcde_fifo fifo;
+	struct mcde_port port;
+	struct mcde_ovly_state *ovly0;
+	struct mcde_ovly_state *ovly1;
+	const struct chnl_config *cfg;
+	u32 transactionid;
+	u32 transactionid_regs;
+	u32 transactionid_hw;
+	wait_queue_head_t waitq_hw; /* Waitq for transactionid_hw */
+	/* Used as watchdog timer for auto sync feature */
+	struct timer_list auto_sync_timer;
+	struct timer_list dsi_te_timer;
+
+	enum mcde_display_power_mode power_mode;
+
+	/* Staged settings */
+	u16 (*map_r)(u8);
+	u16 (*map_g)(u8);
+	u16 (*map_b)(u8);
+	bool palette_enable;
+	bool synchronized_update;
+	enum mcde_port_pix_fmt pix_fmt;
+	struct mcde_video_mode vmode;
+	enum mcde_display_rotation rotation;
+	u32 rotbuf1;
+	u32 rotbuf2;
+
+	/* Blending */
+	u8 blend_ctrl;
+	bool blend_en;
+	u8 alpha_blend;
+
+	/* Applied settings */
+	struct chnl_regs regs;
+	struct col_regs  col_regs;
+	struct tv_regs   tv_regs;
+
+	bool continous_running;
+	bool disable_software_trig;
+	bool formatter_updated;
+};
+
+static struct mcde_chnl_state *channels;
+
+struct chnl_config {
+	/* Key */
+	enum mcde_chnl_path path;
+
+	/* Value */
+	bool swap_a_c0;
+	bool swap_a_c0_set;
+	bool swap_b_c1;
+	bool swap_b_c1_set;
+	bool fabmux;
+	bool fabmux_set;
+	bool f01mux;
+	bool f01mux_set;
+};
+
+static /* TODO: const, compiler bug? */ struct chnl_config chnl_configs[] = {
+	/* Channel A */
+	{ .path = MCDE_CHNLPATH_CHNLA_FIFOA_DPI_0,
+	  .swap_a_c0 = false, .swap_a_c0_set = true },
+	{ .path = MCDE_CHNLPATH_CHNLA_FIFOA_DSI_IFC0_0,
+	  .swap_a_c0 = false, .swap_a_c0_set = true,
+	  .fabmux = false, .fabmux_set = true },
+	{ .path = MCDE_CHNLPATH_CHNLA_FIFOA_DSI_IFC0_1,
+	  .swap_a_c0 = false, .swap_a_c0_set = true,
+	  .fabmux = true, .fabmux_set = true },
+	{ .path = MCDE_CHNLPATH_CHNLA_FIFOC0_DSI_IFC0_2,
+	  .swap_a_c0 = true, .swap_a_c0_set = true,
+	  .f01mux = false, .f01mux_set = true },
+	{ .path = MCDE_CHNLPATH_CHNLA_FIFOC0_DSI_IFC1_0,
+	  .swap_a_c0 = true, .swap_a_c0_set = true,
+	  .f01mux = false, .f01mux_set = true },
+	{ .path = MCDE_CHNLPATH_CHNLA_FIFOC0_DSI_IFC1_1,
+	  .swap_a_c0 = true, .swap_a_c0_set = true,
+	  .f01mux = true, .f01mux_set = true },
+	{ .path = MCDE_CHNLPATH_CHNLA_FIFOA_DSI_IFC1_2,
+	  .swap_a_c0 = false, .swap_a_c0_set = true,
+	  .fabmux = false, .fabmux_set = true },
+	/* Channel B */
+	{ .path = MCDE_CHNLPATH_CHNLB_FIFOB_DPI_1,
+	  .swap_b_c1 = false, .swap_b_c1_set = true },
+	{ .path = MCDE_CHNLPATH_CHNLB_FIFOB_DSI_IFC0_0,
+	  .swap_b_c1 = false, .swap_b_c1_set = true,
+	  .fabmux = true, .fabmux_set = true },
+	{ .path = MCDE_CHNLPATH_CHNLB_FIFOB_DSI_IFC0_1,
+	  .swap_b_c1 = false, .swap_b_c1_set = true,
+	  .fabmux = false, .fabmux_set = true },
+	{ .path = MCDE_CHNLPATH_CHNLB_FIFOC1_DSI_IFC0_2,
+	  .swap_b_c1 = true, .swap_b_c1_set = true,
+	  .f01mux = true, .f01mux_set = true },
+	{ .path = MCDE_CHNLPATH_CHNLB_FIFOC1_DSI_IFC1_0,
+	  .swap_b_c1 = true, .swap_b_c1_set = true,
+	  .f01mux = true, .f01mux_set = true },
+	{ .path = MCDE_CHNLPATH_CHNLB_FIFOC1_DSI_IFC1_1,
+	  .swap_b_c1 = true, .swap_b_c1_set = true,
+	  .f01mux = false, .f01mux_set = true },
+	{ .path = MCDE_CHNLPATH_CHNLB_FIFOB_DSI_IFC1_2,
+	  .swap_b_c1 = false, .swap_b_c1_set = true,
+	  .fabmux = true, .fabmux_set = true },
+	/* Channel C0 */
+	{ .path = MCDE_CHNLPATH_CHNLC0_FIFOA_DSI_IFC0_0,
+	  .swap_a_c0 = true, .swap_a_c0_set = true,
+	  .fabmux = false, .fabmux_set = true },
+	{ .path = MCDE_CHNLPATH_CHNLC0_FIFOA_DSI_IFC0_1,
+	  .swap_a_c0 = true, .swap_a_c0_set = true,
+	  .fabmux = true, .fabmux_set = true },
+	{ .path = MCDE_CHNLPATH_CHNLC0_FIFOC0_DSI_IFC0_2,
+	  .swap_a_c0 = false, .swap_a_c0_set = true,
+	  .f01mux = false, .f01mux_set = true },
+	{ .path = MCDE_CHNLPATH_CHNLC0_FIFOC0_DSI_IFC1_0,
+	  .swap_a_c0 = false, .swap_a_c0_set = true,
+	  .f01mux = false, .f01mux_set = true },
+	{ .path = MCDE_CHNLPATH_CHNLC0_FIFOC0_DSI_IFC1_1,
+	  .swap_a_c0 = false, .swap_a_c0_set = true,
+	  .f01mux = true, .f01mux_set = true },
+	{ .path = MCDE_CHNLPATH_CHNLC0_FIFOA_DSI_IFC1_2,
+	  .swap_a_c0 = true, .swap_a_c0_set = true,
+	  .fabmux = false, .fabmux_set = true },
+	/* Channel C1 */
+	{ .path = MCDE_CHNLPATH_CHNLC1_FIFOB_DSI_IFC0_0,
+	  .swap_b_c1 = true, .swap_b_c1_set = true,
+	  .fabmux = true, .fabmux_set = true },
+	{ .path = MCDE_CHNLPATH_CHNLC1_FIFOB_DSI_IFC0_1,
+	  .swap_b_c1 = true, .swap_b_c1_set = true,
+	  .fabmux = false, .fabmux_set = true },
+	{ .path = MCDE_CHNLPATH_CHNLC1_FIFOC1_DSI_IFC0_2,
+	  .swap_b_c1 = false, .swap_b_c1_set = true,
+	  .f01mux = true, .f01mux_set = true },
+	{ .path = MCDE_CHNLPATH_CHNLC1_FIFOC1_DSI_IFC1_0,
+	  .swap_b_c1 = false, .swap_b_c1_set = true,
+	  .f01mux = true, .f01mux_set = true },
+	{ .path = MCDE_CHNLPATH_CHNLC1_FIFOC1_DSI_IFC1_1,
+	  .swap_b_c1 = false, .swap_b_c1_set = true,
+	  .f01mux = false, .f01mux_set = true },
+	{ .path = MCDE_CHNLPATH_CHNLC1_FIFOB_DSI_IFC1_2,
+	  .swap_b_c1 = true, .swap_b_c1_set = true,
+	  .fabmux = true, .fabmux_set = true },
+};
+
+static int enable_clocks_and_power(struct platform_device *pdev)
+{
+	struct mcde_platform_data *pdata = pdev->dev.platform_data;
+	int ret = 0;
+
+	dev_vdbg(&mcde_dev->dev, "%s\n", __func__);
+
+#ifdef CONFIG_REGULATOR
+	if (regulator_mcde_epod) {
+		ret = regulator_enable(regulator_mcde_epod);
+		if (ret < 0) {
+			dev_warn(&pdev->dev, "%s: regulator_enable failed\n",
+			__func__);
+			return ret;
+		}
+	} else {
+		dev_warn(&pdev->dev, "%s: mcde_epod regulator is null\n"
+						, __func__);
+		return -EINVAL;
+	}
+
+	if (regulator_esram_epod) {
+		ret = regulator_enable(regulator_esram_epod);
+		if (ret < 0) {
+			dev_warn(&pdev->dev, "%s: regulator_enable failed\n",
+			__func__);
+			goto regulator_esram_err;
+		}
+	} else {
+		dev_warn(&pdev->dev, "%s: esram_epod regulator is null\n"
+						, __func__);
+	}
+
+	if (regulator_vana) {
+		ret = regulator_enable(regulator_vana);
+		if (ret < 0) {
+			dev_warn(&pdev->dev, "%s: regulator_enable failed\n",
+			__func__);
+			goto regulator_vana_err;
+		}
+	} else {
+		dev_warn(&pdev->dev, "%s: vana regulator is null\n"
+						, __func__);
+		goto regulator_vana_err;
+	}
+#endif
+
+	ret = pdata->platform_enable();
+	if (ret < 0) {
+		dev_warn(&pdev->dev, "%s: "
+			"platform_enable failed ret = %d\n", __func__, ret);
+		goto prcmu_err;
+	}
+
+	ret = clk_enable(clock_dpi);
+	if (ret < 0) {
+		dev_warn(&pdev->dev, "%s: "
+			"clk_enable dpi failed ret = %d\n", __func__, ret);
+		goto clk_dpi_err;
+	}
+
+	ret = clk_enable(clock_dsi);
+	if (ret < 0) {
+		dev_warn(&pdev->dev, "%s: "
+			"clk_enable dsi failed ret = %d\n", __func__, ret);
+		goto clk_dsi_err;
+	}
+	ret = clk_enable(clock_dsi_lp);
+	if (ret < 0) {
+		dev_warn(&pdev->dev, "%s: "
+			"clk_enable dsi_lp failed ret = %d\n", __func__, ret);
+		goto clk_dsi_lp_err;
+	}
+	ret = clk_enable(clock_mcde);
+	if (ret < 0) {
+		dev_warn(&pdev->dev, "%s: "
+			"clk_enable mcde failed ret = %d\n", __func__, ret);
+		goto clk_mcde_err;
+	}
+
+	return ret;
+
+clk_mcde_err:
+	clk_disable(clock_dsi_lp);
+clk_dsi_lp_err:
+	clk_disable(clock_dsi);
+clk_dsi_err:
+	clk_disable(clock_dpi);
+clk_dpi_err:
+	pdata->platform_disable();
+prcmu_err:
+#ifdef CONFIG_REGULATOR
+	if (regulator_vana)
+		regulator_disable(regulator_vana);
+regulator_vana_err:
+	if (regulator_esram_epod)
+		regulator_disable(regulator_esram_epod);
+regulator_esram_err:
+	if (regulator_mcde_epod)
+		regulator_disable(regulator_mcde_epod);
+#endif
+	return ret;
+}
+
+static int disable_clocks_and_power(struct platform_device *pdev)
+{
+	struct mcde_platform_data *pdata = pdev->dev.platform_data;
+	int ret = 0;
+
+	dev_vdbg(&mcde_dev->dev, "%s\n", __func__);
+
+	clk_disable(clock_dpi);
+	clk_disable(clock_dsi_lp);
+	clk_disable(clock_mcde);
+	clk_disable(clock_dsi);
+
+	pdata->platform_disable();
+
+#ifdef CONFIG_REGULATOR
+	if (regulator_vana) {
+		ret = regulator_disable(regulator_vana);
+		if (ret < 0) {
+			dev_warn(&pdev->dev, "%s: regulator_disable failed\n"
+					, __func__);
+			goto regulator_vana_err;
+		}
+	} else {
+		dev_warn(&pdev->dev, "%s: vana regulator is null\n"
+					, __func__);
+		goto regulator_vana_err;
+	}
+
+	if (regulator_mcde_epod) {
+		ret = regulator_disable(regulator_mcde_epod);
+		if (ret < 0) {
+			dev_warn(&pdev->dev, "%s: regulator_disable failed\n"
+					, __func__);
+			goto regulator_mcde_epod_err;
+		}
+	} else {
+		dev_warn(&pdev->dev, "%s: mcde_epod regulator is null\n"
+					, __func__);
+		goto regulator_mcde_epod_err;
+	}
+
+	if (regulator_esram_epod) {
+		ret = regulator_disable(regulator_esram_epod);
+		if (ret < 0) {
+			dev_warn(&pdev->dev, "%s: regulator_disable failed\n"
+					, __func__);
+			goto regulator_esram_epod_err;
+		}
+	} else {
+		dev_warn(&pdev->dev, "%s: esram_epod regulator is null\n"
+					, __func__);
+	}
+	return ret;
+
+regulator_esram_epod_err:
+	regulator_enable(regulator_mcde_epod);
+regulator_mcde_epod_err:
+	regulator_enable(regulator_vana);
+regulator_vana_err:
+	clk_enable(clock_dpi);
+	clk_enable(clock_dsi_lp);
+	clk_enable(clock_mcde);
+	clk_enable(clock_dsi);
+#endif
+	return ret;
+}
+
+static void update_mcde_registers(void)
+{
+	struct mcde_platform_data *pdata = mcde_dev->dev.platform_data;
+
+	if (hardware_version == MCDE_CHIP_VERSION_1_0_4) {
+		/* Setup output muxing */
+		mcde_wreg(MCDE_CONF0,
+			MCDE_CONF0_IFIFOCTRLWTRMRKLVL(7));
+
+		mcde_wfld(MCDE_RISOVL, OVLFDRIS, 1);
+		mcde_wfld(MCDE_RISPP, VCMPARIS, 1);
+		mcde_wfld(MCDE_RISPP, VCMPBRIS, 1);
+
+		/* Enable channel VCMP interrupts */
+		mcde_wreg(MCDE_IMSCPP,
+			MCDE_IMSCPP_VCMPAIM(true) |
+			MCDE_IMSCPP_VCMPBIM(true));
+	} else {
+		/* Setup output muxing */
+		mcde_wreg(MCDE_CONF0,
+			MCDE_CONF0_IFIFOCTRLWTRMRKLVL(7) |
+			MCDE_CONF0_OUTMUX0(pdata->outmux[0]) |
+			MCDE_CONF0_OUTMUX1(pdata->outmux[1]) |
+			MCDE_CONF0_OUTMUX2(pdata->outmux[2]) |
+			MCDE_CONF0_OUTMUX3(pdata->outmux[3]) |
+			MCDE_CONF0_OUTMUX4(pdata->outmux[4]) |
+			pdata->syncmux);
+
+		mcde_wfld(MCDE_RISOVL, OVLFDRIS, 1);
+		mcde_wfld(MCDE_RISPP, VCMPARIS, 1);
+		mcde_wfld(MCDE_RISPP, VCMPBRIS, 1);
+		mcde_wfld(MCDE_RISPP, VCMPC0RIS, 1);
+		mcde_wfld(MCDE_RISPP, VCMPC1RIS, 1);
+
+		/* Enable channel VCMP interrupts */
+		mcde_wreg(MCDE_IMSCPP,
+			MCDE_IMSCPP_VCMPAIM(true) |
+			MCDE_IMSCPP_VCMPBIM(true) |
+			MCDE_IMSCPP_VCMPC0IM(true) |
+			MCDE_IMSCPP_VCMPC1IM(true));
+	}
+
+	/* Enable overlay fetch done interrupts */
+	mcde_wfld(MCDE_IMSCOVL, OVLFDIM, 0x3f);
+
+	/* Setup sync pulse length */
+	mcde_wreg(MCDE_VSCRC0,
+		MCDE_VSCRC0_VSPMIN(1) |
+		MCDE_VSCRC0_VSPMAX(0xff));
+	mcde_wreg(MCDE_VSCRC1,
+		MCDE_VSCRC1_VSPMIN(1) |
+		MCDE_VSCRC1_VSPMAX(0xff));
+}
+
+static int disable_mcde_hw(bool force_disable)
+{
+	int i;
+	int ret;
+	bool mcde_up = false;
+
+	dev_vdbg(&mcde_dev->dev, "%s\n", __func__);
+
+	if (!mcde_is_enabled)
+		return 0;
+
+	for (i = 0; i < num_channels; i++) {
+		struct mcde_chnl_state *chnl = &channels[i];
+		if (force_disable ||
+			(chnl->enabled && !chnl->continous_running)) {
+			u8 counter = 10;
+			disable_channel(chnl);
+			if (chnl->port.type == MCDE_PORTTYPE_DSI)
+				/*
+				* Wait for CSM_RUNNING,
+				* all data sent for display
+				*/
+				while (dsi_rfld(chnl->port.link,
+					DSI_CMD_MODE_STS, CSM_RUNNING)
+							&& counter--) {
+					cpu_relax();
+					udelay(100);
+				}
+		} else if (chnl->enabled && chnl->continous_running) {
+			mcde_up = true;
+		}
+	}
+
+	if (mcde_up)
+		return 0;
+
+	for (i = 0; i < num_channels; i++) {
+		struct mcde_chnl_state *chnl = &channels[i];
+		chnl->formatter_updated = false;
+		del_timer(&chnl->dsi_te_timer);
+		del_timer(&chnl->auto_sync_timer);
+	}
+
+	free_irq(mcde_irq, &mcde_dev->dev);
+
+	ret = disable_clocks_and_power(mcde_dev);
+	if (ret < 0) {
+		dev_dbg(&mcde_dev->dev,
+			"%s: disable_clocks_and_power failed\n"
+						, __func__);
+		return -EINVAL;
+	}
+	mcde_is_enabled = false;
+	return 0;
+}
+
+static void dpi_video_mode_apply(struct mcde_chnl_state *chnl)
+{
+	dev_vdbg(&mcde_dev->dev, "%s\n", __func__);
+	chnl->tv_regs.interlaced_en = chnl->vmode.interlaced;
+
+	chnl->tv_regs.sel_mode_tv = chnl->port.phy.dpi.tv_mode;
+	if (chnl->tv_regs.sel_mode_tv) {
+		/* TV mode */
+		u32 bel = chnl->vmode.vbp1 + chnl->vmode.vfp1
+				+ chnl->vmode.vbp2 + chnl->vmode.vfp2;
+		/* -4 since hsw is excluding SAV/EAV, 2 bytes each */
+		chnl->tv_regs.hsw  = chnl->vmode.hbp + chnl->vmode.hfp - 4;
+		/* in TV mode: bel2 = bel1 + 1 */
+		chnl->tv_regs.bel1 = bel / 2;
+		chnl->tv_regs.bel2 = bel - chnl->tv_regs.bel1;
+		chnl->tv_regs.fsl1 = chnl->vmode.vbp1;
+		chnl->tv_regs.fsl2 = chnl->vmode.vbp2;
+		if (chnl->port.phy.dpi.bus_width == 4)
+			chnl->tv_regs.tv_mode = MCDE_TVCRA_TVMODE_SDTV_656P_BE;
+		else
+			chnl->tv_regs.tv_mode = MCDE_TVCRA_TVMODE_SDTV_656P;
+		if (hardware_version == MCDE_CHIP_VERSION_3_0_8)
+			chnl->tv_regs.inv_clk = true;
+		else {
+			chnl->tv_regs.dho  = MCDE_CONFIG_TVOUT_HBORDER;
+			chnl->tv_regs.alw  = MCDE_CONFIG_TVOUT_HBORDER;
+			chnl->tv_regs.dvo  = MCDE_CONFIG_TVOUT_VBORDER;
+			chnl->tv_regs.bsl  = MCDE_CONFIG_TVOUT_VBORDER;
+		}
+	} else {
+		/* LCD mode */
+		u32 polarity;
+		chnl->tv_regs.hsw  = chnl->vmode.hsw;
+		chnl->tv_regs.dho  = chnl->vmode.hbp;
+		chnl->tv_regs.alw  = chnl->vmode.hfp;
+		chnl->tv_regs.bel1 = chnl->vmode.vsw;
+		chnl->tv_regs.bel2 = chnl->tv_regs.bel1;
+		chnl->tv_regs.dvo  = chnl->vmode.vbp1 + chnl->vmode.vbp2;
+		chnl->tv_regs.bsl  = chnl->vmode.vfp1 + chnl->vmode.vfp2;
+		chnl->tv_regs.fsl1 = 0;
+		chnl->tv_regs.fsl2 = 0;
+		polarity = chnl->port.phy.dpi.polarity;
+		chnl->tv_regs.lcdtim1 |= MCDE_LCDTIM1A_IPC(
+				(polarity & DPI_ACT_ON_FALLING_EDGE) != 0);
+		chnl->tv_regs.lcdtim1 = MCDE_LCDTIM1A_IHS(
+				(polarity & DPI_ACT_LOW_HSYNC) != 0);
+		chnl->tv_regs.lcdtim1 |= MCDE_LCDTIM1A_IVS(
+				(polarity & DPI_ACT_LOW_VSYNC) != 0);
+		chnl->tv_regs.lcdtim1 |= MCDE_LCDTIM1A_IOE(
+				(polarity & DPI_ACT_LOW_DATA_ENABLE) != 0);
+	}
+}
+
+static void update_dpi_registers(enum mcde_chnl chnl_id, struct tv_regs *regs)
+{
+	u8 idx = chnl_id;
+
+	dev_dbg(&mcde_dev->dev, "%s\n", __func__);
+	mcde_wreg(MCDE_TVCRA + idx * MCDE_TVCRA_GROUPOFFSET,
+			MCDE_TVCRA_SEL_MOD(regs->sel_mode_tv)             |
+			MCDE_TVCRA_INTEREN(regs->interlaced_en)           |
+			MCDE_TVCRA_IFIELD(1)                              |
+			MCDE_TVCRA_TVMODE(regs->tv_mode)                  |
+			MCDE_TVCRA_SDTVMODE(MCDE_TVCRA_SDTVMODE_Y0CBY1CR) |
+			MCDE_TVCRA_CKINV(regs->inv_clk)                   |
+			MCDE_TVCRA_AVRGEN(0));
+	mcde_wreg(MCDE_TVBLUA + idx * MCDE_TVBLUA_GROUPOFFSET,
+		MCDE_TVBLUA_TVBLU(MCDE_CONFIG_TVOUT_BACKGROUND_LUMINANCE) |
+		MCDE_TVBLUA_TVBCB(MCDE_CONFIG_TVOUT_BACKGROUND_CHROMINANCE_CB)|
+		MCDE_TVBLUA_TVBCR(MCDE_CONFIG_TVOUT_BACKGROUND_CHROMINANCE_CR));
+
+	/* Vertical timing registers */
+	mcde_wreg(MCDE_TVDVOA + idx * MCDE_TVDVOA_GROUPOFFSET,
+					MCDE_TVDVOA_DVO1(regs->dvo) |
+					MCDE_TVDVOA_DVO2(regs->dvo));
+	mcde_wreg(MCDE_TVBL1A + idx * MCDE_TVBL1A_GROUPOFFSET,
+					MCDE_TVBL1A_BEL1(regs->bel1) |
+					MCDE_TVBL1A_BSL1(regs->bsl));
+	mcde_wreg(MCDE_TVBL2A + idx * MCDE_TVBL1A_GROUPOFFSET,
+					MCDE_TVBL2A_BEL2(regs->bel2) |
+					MCDE_TVBL2A_BSL2(regs->bsl));
+	mcde_wreg(MCDE_TVISLA + idx * MCDE_TVISLA_GROUPOFFSET,
+					MCDE_TVISLA_FSL1(regs->fsl1) |
+					MCDE_TVISLA_FSL2(regs->fsl2));
+
+	/* Horizontal timing registers */
+	if (!regs->sel_mode_tv ||
+			hardware_version == MCDE_CHIP_VERSION_3_0_8) {
+		mcde_wreg(MCDE_TVLBALWA + idx * MCDE_TVLBALWA_GROUPOFFSET,
+					MCDE_TVLBALWA_LBW(regs->hsw) |
+					MCDE_TVLBALWA_ALW(regs->alw));
+		mcde_wreg(MCDE_TVTIM1A + idx * MCDE_TVTIM1A_GROUPOFFSET,
+					MCDE_TVTIM1A_DHO(regs->dho));
+	} else {
+		/* in earlier versions the LBW and DHO fields are swapped
+		 * TV mode only
+		 */
+		mcde_wreg(MCDE_TVLBALWA + idx * MCDE_TVLBALWA_GROUPOFFSET,
+					MCDE_TVLBALWA_LBW(regs->dho) |
+					MCDE_TVLBALWA_ALW(regs->alw));
+		mcde_wreg(MCDE_TVTIM1A + idx * MCDE_TVTIM1A_GROUPOFFSET,
+					MCDE_TVTIM1A_DHO(regs->hsw));
+	}
+	if (!regs->sel_mode_tv)
+		mcde_wreg(MCDE_LCDTIM1A + idx * MCDE_LCDTIM1A_GROUPOFFSET,
+								regs->lcdtim1);
+}
+
+static void update_col_registers(enum mcde_chnl chnl_id, struct col_regs *regs)
+{
+	u8 idx = chnl_id;
+
+	dev_vdbg(&mcde_dev->dev, "%s\n", __func__);
+	mcde_wreg(MCDE_RGBCONV1A + idx * MCDE_RGBCONV1A_GROUPOFFSET,
+				MCDE_RGBCONV1A_YR_RED(regs->y_red) |
+				MCDE_RGBCONV1A_YR_GREEN(regs->y_green));
+	mcde_wreg(MCDE_RGBCONV2A + idx * MCDE_RGBCONV2A_GROUPOFFSET,
+				MCDE_RGBCONV2A_YR_BLUE(regs->y_blue) |
+				MCDE_RGBCONV2A_CR_RED(regs->cr_red));
+	mcde_wreg(MCDE_RGBCONV3A + idx * MCDE_RGBCONV3A_GROUPOFFSET,
+				MCDE_RGBCONV3A_CR_GREEN(regs->cr_green) |
+				MCDE_RGBCONV3A_CR_BLUE(regs->cr_blue));
+	mcde_wreg(MCDE_RGBCONV4A + idx * MCDE_RGBCONV4A_GROUPOFFSET,
+				MCDE_RGBCONV4A_CB_RED(regs->cb_red) |
+				MCDE_RGBCONV4A_CB_GREEN(regs->cb_green));
+	mcde_wreg(MCDE_RGBCONV5A + idx * MCDE_RGBCONV5A_GROUPOFFSET,
+				MCDE_RGBCONV5A_CB_BLUE(regs->cb_blue) |
+				MCDE_RGBCONV5A_OFF_RED(regs->off_red));
+	mcde_wreg(MCDE_RGBCONV6A + idx * MCDE_RGBCONV6A_GROUPOFFSET,
+				MCDE_RGBCONV6A_OFF_GREEN(regs->off_green) |
+				MCDE_RGBCONV6A_OFF_BLUE(regs->off_blue));
+}
+
+/* MCDE internal helpers */
+static u8 portfmt2dsipacking(enum mcde_port_pix_fmt pix_fmt)
+{
+	switch (pix_fmt) {
+	case MCDE_PORTPIXFMT_DSI_16BPP:
+		return MCDE_DSIVID0CONF0_PACKING_RGB565;
+	case MCDE_PORTPIXFMT_DSI_18BPP_PACKED:
+		return MCDE_DSIVID0CONF0_PACKING_RGB666;
+	case MCDE_PORTPIXFMT_DSI_18BPP:
+	case MCDE_PORTPIXFMT_DSI_24BPP:
+	default:
+		return MCDE_DSIVID0CONF0_PACKING_RGB888;
+	case MCDE_PORTPIXFMT_DSI_YCBCR422:
+		return MCDE_DSIVID0CONF0_PACKING_HDTV;
+	}
+}
+
+static u8 portfmt2bpp(enum mcde_port_pix_fmt pix_fmt)
+{
+	/* TODO: Check DPI spec *//* REVIEW: Remove or check */
+	switch (pix_fmt) {
+	case MCDE_PORTPIXFMT_DPI_16BPP_C1:
+	case MCDE_PORTPIXFMT_DPI_16BPP_C2:
+	case MCDE_PORTPIXFMT_DPI_16BPP_C3:
+	case MCDE_PORTPIXFMT_DSI_16BPP:
+	case MCDE_PORTPIXFMT_DSI_YCBCR422:
+		return 16;
+	case MCDE_PORTPIXFMT_DPI_18BPP_C1:
+	case MCDE_PORTPIXFMT_DPI_18BPP_C2:
+	case MCDE_PORTPIXFMT_DSI_18BPP_PACKED:
+		return 18;
+	case MCDE_PORTPIXFMT_DSI_18BPP:
+	case MCDE_PORTPIXFMT_DPI_24BPP:
+	case MCDE_PORTPIXFMT_DSI_24BPP:
+		return 24;
+	default:
+		return 1;
+	}
+}
+
+static u8 bpp2outbpp(u8 bpp)
+{
+	switch (bpp) {
+	case 16:
+		return MCDE_CRA1_OUTBPP_16BPP;
+	case 18:
+		return MCDE_CRA1_OUTBPP_18BPP;
+	case 24:
+		return MCDE_CRA1_OUTBPP_24BPP;
+	default:
+		return 0;
+	}
+}
+
+static u8 portfmt2cdwin(enum mcde_port_pix_fmt pix_fmt)
+{
+	switch (pix_fmt) {
+	case MCDE_PORTPIXFMT_DPI_16BPP_C1:
+		return MCDE_CRA1_CDWIN_16BPP_C1;
+	case MCDE_PORTPIXFMT_DPI_16BPP_C2:
+		return MCDE_CRA1_CDWIN_16BPP_C2;
+	case MCDE_PORTPIXFMT_DPI_16BPP_C3:
+		return MCDE_CRA1_CDWIN_16BPP_C3;
+	case MCDE_PORTPIXFMT_DPI_18BPP_C1:
+		return MCDE_CRA1_CDWIN_18BPP_C1;
+	case MCDE_PORTPIXFMT_DPI_18BPP_C2:
+		return MCDE_CRA1_CDWIN_18BPP_C2;
+	case MCDE_PORTPIXFMT_DPI_24BPP:
+		return MCDE_CRA1_CDWIN_24BPP;
+	default:
+		/* only DPI formats are relevant */
+		return 0;
+	}
+}
+
+static u32 get_output_fifo_size(enum mcde_fifo fifo)
+{
+	u32 ret = 1; /* Avoid div by zero */
+
+	switch (fifo) {
+	case MCDE_FIFO_A:
+	case MCDE_FIFO_B:
+		if (hardware_version == MCDE_CHIP_VERSION_1_0_4)
+			ret = MCDE_FIFO_AB_SIZE / 2;
+		else
+			ret = MCDE_FIFO_AB_SIZE;
+		break;
+	case MCDE_FIFO_C0:
+	case MCDE_FIFO_C1:
+		ret = MCDE_FIFO_C0C1_SIZE;
+		break;
+	default:
+		dev_vdbg(&mcde_dev->dev, "Unsupported fifo");
+		break;
+	}
+	return ret;
+}
+
+static u8 get_dsi_formid(const struct mcde_port *port)
+{
+	if (port->ifc == DSI_VIDEO_MODE && port->link == 0)
+		return MCDE_CTRLA_FORMID_DSI0VID;
+	else if (port->ifc == DSI_VIDEO_MODE && port->link == 1)
+		return MCDE_CTRLA_FORMID_DSI1VID;
+	else if (port->ifc == DSI_VIDEO_MODE && port->link == 2)
+		return MCDE_CTRLA_FORMID_DSI2VID;
+	else if (port->ifc == DSI_CMD_MODE && port->link == 0)
+		return MCDE_CTRLA_FORMID_DSI0CMD;
+	else if (port->ifc == DSI_CMD_MODE && port->link == 1)
+		return MCDE_CTRLA_FORMID_DSI1CMD;
+	else if (port->ifc == DSI_CMD_MODE && port->link == 2)
+		return MCDE_CTRLA_FORMID_DSI2CMD;
+	return 0;
+}
+
+static struct mcde_chnl_state *find_channel_by_dsilink(int link)
+{
+	struct mcde_chnl_state *chnl = &channels[0];
+	for (; chnl < &channels[num_channels]; chnl++)
+		if (chnl->enabled && chnl->port.link == link &&
+					chnl->port.type == MCDE_PORTTYPE_DSI)
+			return chnl;
+	return NULL;
+}
+
+static irqreturn_t mcde_irq_handler(int irq, void *dev)
+{
+	int i;
+	u32 irq_status;
+	bool trig = false;
+	struct mcde_chnl_state *chnl;
+
+	/* Handle overlay irqs */
+	irq_status = mcde_rfld(MCDE_RISOVL, OVLFDRIS);
+	for (i = 0; i < num_overlays; i++) {
+		if (irq_status & (1 << i)) {
+			struct mcde_ovly_state *ovly = &overlays[i];
+			ovly->transactionid_hw = ovly->transactionid_regs;
+			wake_up(&ovly->waitq_hw);
+		}
+	}
+	mcde_wfld(MCDE_RISOVL, OVLFDRIS, irq_status);
+
+	/* Handle channel irqs */
+	irq_status = mcde_rreg(MCDE_RISPP);
+	if (irq_status & MCDE_RISPP_VCMPARIS_MASK) {
+		chnl = &channels[MCDE_CHNL_A];
+		chnl->transactionid_hw = chnl->transactionid_regs;
+		wake_up(&chnl->waitq_hw);
+		mcde_wfld(MCDE_RISPP, VCMPARIS, 1);
+		if (chnl->port.update_auto_trig &&
+				chnl->port.sync_src == MCDE_SYNCSRC_OFF &&
+				chnl->port.type == MCDE_PORTTYPE_DSI &&
+				chnl->continous_running) {
+			if (hardware_version == MCDE_CHIP_VERSION_3_0_8)
+				enable_channel(chnl);
+
+			mcde_wreg(MCDE_CHNL0SYNCHSW +
+				chnl->id * MCDE_CHNL0SYNCHSW_GROUPOFFSET,
+				MCDE_CHNL0SYNCHSW_SW_TRIG(true));
+
+			if (hardware_version == MCDE_CHIP_VERSION_3_0_8)
+				disable_flow(chnl);
+			mod_timer(&chnl->auto_sync_timer,
+				jiffies +
+				msecs_to_jiffies(MCDE_AUTO_SYNC_WATCHDOG
+								* 1000));
+		}
+	}
+	if (irq_status & MCDE_RISPP_VCMPBRIS_MASK) {
+		chnl = &channels[MCDE_CHNL_B];
+		chnl->transactionid_hw = chnl->transactionid_regs;
+		wake_up(&chnl->waitq_hw);
+		mcde_wfld(MCDE_RISPP, VCMPBRIS, 1);
+		if (chnl->port.update_auto_trig &&
+				chnl->port.sync_src == MCDE_SYNCSRC_OFF &&
+				chnl->port.type == MCDE_PORTTYPE_DSI &&
+				chnl->continous_running) {
+			if (hardware_version == MCDE_CHIP_VERSION_3_0_8)
+				enable_channel(chnl);
+
+			mcde_wreg(MCDE_CHNL0SYNCHSW +
+				chnl->id * MCDE_CHNL0SYNCHSW_GROUPOFFSET,
+				MCDE_CHNL0SYNCHSW_SW_TRIG(true));
+
+			if (hardware_version == MCDE_CHIP_VERSION_3_0_8)
+				disable_flow(chnl);
+			mod_timer(&chnl->auto_sync_timer,
+				jiffies +
+				msecs_to_jiffies(MCDE_AUTO_SYNC_WATCHDOG
+								* 1000));
+		}
+	}
+	if (irq_status & MCDE_RISPP_VCMPC0RIS_MASK) {
+		chnl = &channels[MCDE_CHNL_C0];
+		chnl->transactionid_hw = chnl->transactionid_regs;
+		wake_up(&chnl->waitq_hw);
+		mcde_wfld(MCDE_RISPP, VCMPC0RIS, 1);
+		if (chnl->port.update_auto_trig &&
+				chnl->port.sync_src == MCDE_SYNCSRC_OFF &&
+				chnl->port.type == MCDE_PORTTYPE_DSI &&
+				chnl->continous_running) {
+			if (hardware_version == MCDE_CHIP_VERSION_3_0_8)
+				enable_channel(chnl);
+
+			mcde_wreg(MCDE_CHNL0SYNCHSW +
+				chnl->id * MCDE_CHNL0SYNCHSW_GROUPOFFSET,
+				MCDE_CHNL0SYNCHSW_SW_TRIG(true));
+
+			if (hardware_version == MCDE_CHIP_VERSION_3_0_8)
+				disable_flow(chnl);
+			mod_timer(&chnl->auto_sync_timer,
+				jiffies +
+				msecs_to_jiffies(MCDE_AUTO_SYNC_WATCHDOG
+								* 1000));
+
+		}
+	}
+	if (irq_status & MCDE_RISPP_VCMPC1RIS_MASK) {
+		chnl = &channels[MCDE_CHNL_C1];
+		chnl->transactionid_hw = chnl->transactionid_regs;
+		wake_up(&chnl->waitq_hw);
+		mcde_wfld(MCDE_RISPP, VCMPC1RIS, 1);
+		if (chnl->port.update_auto_trig &&
+				chnl->port.sync_src == MCDE_SYNCSRC_OFF &&
+				chnl->port.type == MCDE_PORTTYPE_DSI &&
+				chnl->continous_running) {
+			if (hardware_version == MCDE_CHIP_VERSION_3_0_8)
+				enable_channel(chnl);
+
+			mcde_wreg(MCDE_CHNL0SYNCHSW +
+				chnl->id * MCDE_CHNL0SYNCHSW_GROUPOFFSET,
+				MCDE_CHNL0SYNCHSW_SW_TRIG(true));
+
+			if (hardware_version == MCDE_CHIP_VERSION_3_0_8)
+				disable_flow(chnl);
+			mod_timer(&chnl->auto_sync_timer,
+				jiffies +
+				msecs_to_jiffies(MCDE_AUTO_SYNC_WATCHDOG
+								* 1000));
+		}
+	}
+	for (i = 0; i < num_dsilinks; i++) {
+		struct mcde_chnl_state *chnl_from_dsi;
+
+		chnl_from_dsi = find_channel_by_dsilink(i);
+
+		trig = false;
+		irq_status = dsi_rfld(i, DSI_DIRECT_CMD_STS_FLAG,
+			TE_RECEIVED_FLAG);
+		if (irq_status) {
+			if (hardware_version == MCDE_CHIP_VERSION_3_0_8)
+				disable_flow(chnl_from_dsi);
+			trig = true;
+			dsi_wreg(i, DSI_DIRECT_CMD_STS_CLR,
+				DSI_DIRECT_CMD_STS_CLR_TE_RECEIVED_CLR(true));
+			dev_vdbg(&mcde_dev->dev, "BTA TE DSI%d\n", i);
+		}
+
+		irq_status = dsi_rfld(i, DSI_CMD_MODE_STS_FLAG, ERR_NO_TE_FLAG);
+		if (irq_status) {
+			if (hardware_version == MCDE_CHIP_VERSION_3_0_8)
+				disable_flow(chnl_from_dsi);
+			dsi_wreg(i, DSI_CMD_MODE_STS_CLR,
+				DSI_CMD_MODE_STS_CLR_ERR_NO_TE_CLR(true));
+			dev_info(&mcde_dev->dev, "NO_TE DSI%d\n", i);
+		}
+
+		irq_status = dsi_rfld(i, DSI_DIRECT_CMD_STS, TRIGGER_RECEIVED);
+		if (irq_status) {
+			/* DSI TE polling answer received */
+			dsi_wreg(i, DSI_DIRECT_CMD_STS_CLR,
+				DSI_DIRECT_CMD_STS_CLR_TRIGGER_RECEIVED_CLR(
+						true));
+
+			chnl_from_dsi = find_channel_by_dsilink(i);
+			if (chnl_from_dsi && (chnl_from_dsi->port.sync_src ==
+					MCDE_SYNCSRC_TE_POLLING))
+				/* Reset timer */
+				dsi_te_poll_set_timer(chnl_from_dsi,
+						DSI_TE_NO_ANSWER_TIMEOUT);
+		}
+
+		if (!trig)
+			continue;
+		chnl_from_dsi = find_channel_by_dsilink(i);
+		if (chnl_from_dsi) {
+			do_softwaretrig(chnl_from_dsi);
+			dev_vdbg(&mcde_dev->dev, "SW TRIG DSI%d, chnl=%d\n", i,
+				chnl_from_dsi->id);
+		}
+	}
+
+	return IRQ_HANDLED;
+}
+
+static void wait_for_overlay(struct mcde_ovly_state *ovly)
+{
+	int ret;
+
+	if (ovly->transactionid_hw >= ovly->transactionid_regs)
+		return;
+
+	ret = wait_event_timeout(ovly->waitq_hw,
+		ovly->transactionid_hw == ovly->transactionid_regs,
+		msecs_to_jiffies(OVLY_TIMEOUT));
+	if (!ret)
+		dev_warn(&mcde_dev->dev,
+			"Wait for overlay timeout (ovly=%d,%d<%d)!\n",
+			ovly->idx, ovly->transactionid_hw,
+			ovly->transactionid_regs);
+}
+
+static void wait_for_channel(struct mcde_chnl_state *chnl)
+{
+	int ret;
+
+	if (chnl->transactionid_hw >= chnl->transactionid_regs)
+		return;
+
+	ret = wait_event_timeout(chnl->waitq_hw,
+		chnl->transactionid_hw == chnl->transactionid_regs,
+		msecs_to_jiffies(CHNL_TIMEOUT));
+	if (!ret)
+		dev_warn(&mcde_dev->dev,
+			"Wait for channel timeout (chnl=%d,%d<%d)!\n",
+			chnl->id, chnl->transactionid_hw,
+			chnl->transactionid_regs);
+}
+
+static int update_channel_static_registers(struct mcde_chnl_state *chnl)
+{
+	const struct chnl_config *cfg = chnl->cfg;
+	const struct mcde_port *port = &chnl->port;
+
+	if (hardware_version == MCDE_CHIP_VERSION_3_0_5) {
+		/* Fifo & muxing */
+		if (cfg->swap_a_c0_set)
+			mcde_wfld(MCDE_CONF0, SWAP_A_C0_V1, cfg->swap_a_c0);
+		if (cfg->swap_b_c1_set)
+			mcde_wfld(MCDE_CONF0, SWAP_B_C1_V1, cfg->swap_b_c1);
+		if (cfg->fabmux_set)
+			mcde_wfld(MCDE_CR, FABMUX_V1, cfg->fabmux);
+		if (cfg->f01mux_set)
+			mcde_wfld(MCDE_CR, F01MUX_V1, cfg->f01mux);
+
+		if (port->type == MCDE_PORTTYPE_DPI) {
+			if (port->link == 0)
+				mcde_wfld(MCDE_CR, DPIA_EN_V1, true);
+			else if (port->link == 1)
+				mcde_wfld(MCDE_CR, DPIB_EN_V1, true);
+		} else if (port->type == MCDE_PORTTYPE_DSI) {
+			if (port->ifc == DSI_VIDEO_MODE && port->link == 0)
+				mcde_wfld(MCDE_CR, DSIVID0_EN_V1, true);
+			else if (port->ifc == DSI_VIDEO_MODE && port->link == 1)
+				mcde_wfld(MCDE_CR, DSIVID1_EN_V1, true);
+			else if (port->ifc == DSI_VIDEO_MODE && port->link == 2)
+				mcde_wfld(MCDE_CR, DSIVID2_EN_V1, true);
+			else if (port->ifc == DSI_CMD_MODE && port->link == 0)
+				mcde_wfld(MCDE_CR, DSICMD0_EN_V1, true);
+			else if (port->ifc == DSI_CMD_MODE && port->link == 1)
+				mcde_wfld(MCDE_CR, DSICMD1_EN_V1, true);
+			else if (port->ifc == DSI_CMD_MODE && port->link == 2)
+				mcde_wfld(MCDE_CR, DSICMD2_EN_V1, true);
+		}
+
+		if (chnl->fifo == MCDE_FIFO_C0)
+			mcde_wreg(MCDE_CTRLC0, MCDE_CTRLC0_FIFOWTRMRK(
+					get_output_fifo_size(MCDE_FIFO_C0)));
+		else if (chnl->fifo == MCDE_FIFO_C1)
+			mcde_wreg(MCDE_CTRLC1, MCDE_CTRLC1_FIFOWTRMRK(
+					get_output_fifo_size(MCDE_FIFO_C1)));
+		else if (port->update_auto_trig &&
+					(port->sync_src == MCDE_SYNCSRC_TE0))
+			mcde_wreg(MCDE_CTRLC0, MCDE_CTRLC0_FIFOWTRMRK(
+					get_output_fifo_size(MCDE_FIFO_C0)));
+		else if (port->update_auto_trig &&
+					(port->sync_src == MCDE_SYNCSRC_TE1))
+			mcde_wreg(MCDE_CTRLC1, MCDE_CTRLC1_FIFOWTRMRK(
+					get_output_fifo_size(MCDE_FIFO_C1)));
+	} else if (hardware_version == MCDE_CHIP_VERSION_3_0_8) {
+		switch (chnl->fifo) {
+		case MCDE_FIFO_A:
+			mcde_wreg(MCDE_CHNL0MUXING_V2 + chnl->id *
+				MCDE_CHNL0MUXING_V2_GROUPOFFSET,
+				MCDE_CHNL0MUXING_V2_FIFO_ID_ENUM(FIFO_A));
+			if (port->type == MCDE_PORTTYPE_DPI) {
+				mcde_wfld(MCDE_CTRLA, FORMTYPE,
+						MCDE_CTRLA_FORMTYPE_DPITV);
+				mcde_wfld(MCDE_CTRLA, FORMID, port->link);
+				mcde_wfld(MCDE_CTRLA, FIFOWTRMRK,
+					get_output_fifo_size(MCDE_FIFO_A));
+			} else if (port->type == MCDE_PORTTYPE_DSI) {
+				mcde_wfld(MCDE_CTRLA, FORMTYPE,
+						MCDE_CTRLA_FORMTYPE_DSI);
+				mcde_wfld(MCDE_CTRLA, FORMID,
+							get_dsi_formid(port));
+				mcde_wfld(MCDE_CTRLA, FIFOWTRMRK,
+					get_output_fifo_size(MCDE_FIFO_A));
+			}
+			break;
+		case MCDE_FIFO_B:
+			mcde_wreg(MCDE_CHNL0MUXING_V2 + chnl->id *
+				MCDE_CHNL0MUXING_V2_GROUPOFFSET,
+				MCDE_CHNL0MUXING_V2_FIFO_ID_ENUM(FIFO_B));
+			if (port->type == MCDE_PORTTYPE_DPI) {
+				mcde_wfld(MCDE_CTRLB, FORMTYPE,
+						MCDE_CTRLB_FORMTYPE_DPITV);
+				mcde_wfld(MCDE_CTRLB, FORMID, port->link);
+				mcde_wfld(MCDE_CTRLB, FIFOWTRMRK,
+					get_output_fifo_size(MCDE_FIFO_B));
+			} else if (port->type == MCDE_PORTTYPE_DSI) {
+				mcde_wfld(MCDE_CTRLB, FORMTYPE,
+						MCDE_CTRLB_FORMTYPE_DSI);
+				mcde_wfld(MCDE_CTRLB, FORMID,
+							get_dsi_formid(port));
+				mcde_wfld(MCDE_CTRLB, FIFOWTRMRK,
+					get_output_fifo_size(MCDE_FIFO_B));
+			}
+
+			break;
+		case MCDE_FIFO_C0:
+			mcde_wreg(MCDE_CHNL0MUXING_V2 + chnl->id *
+				MCDE_CHNL0MUXING_V2_GROUPOFFSET,
+				MCDE_CHNL0MUXING_V2_FIFO_ID_ENUM(FIFO_C0));
+			if (port->type == MCDE_PORTTYPE_DPI)
+				return -EINVAL;
+			mcde_wfld(MCDE_CTRLC0, FORMTYPE,
+						MCDE_CTRLC0_FORMTYPE_DSI);
+			mcde_wfld(MCDE_CTRLC0, FORMID, get_dsi_formid(port));
+			mcde_wfld(MCDE_CTRLC0, FIFOWTRMRK,
+					get_output_fifo_size(MCDE_FIFO_C0));
+			break;
+		case MCDE_FIFO_C1:
+			mcde_wreg(MCDE_CHNL0MUXING_V2 + chnl->id *
+				MCDE_CHNL0MUXING_V2_GROUPOFFSET,
+				MCDE_CHNL0MUXING_V2_FIFO_ID_ENUM(FIFO_C1));
+			if (port->type == MCDE_PORTTYPE_DPI)
+				return -EINVAL;
+			mcde_wfld(MCDE_CTRLC1, FORMTYPE,
+						MCDE_CTRLC1_FORMTYPE_DSI);
+			mcde_wfld(MCDE_CTRLC1, FORMID, get_dsi_formid(port));
+			mcde_wfld(MCDE_CTRLC1, FIFOWTRMRK,
+					get_output_fifo_size(MCDE_FIFO_C1));
+			break;
+		default:
+			return -EINVAL;
+		}
+	} else if (hardware_version == MCDE_CHIP_VERSION_1_0_4) {
+		switch (chnl->fifo) {
+		case MCDE_FIFO_A:
+			/* only channel A is supported */
+			if (chnl->id != 0)
+				return -EINVAL;
+
+			if (port->type == MCDE_PORTTYPE_DSI) {
+				if (port->link == 1 && port->ifc == 0)
+					return -EINVAL;
+				if (port->link == 0 && port->ifc == 1)
+					return -EINVAL;
+				mcde_wfld(MCDE_CR, DSI0_EN_V3, true);
+
+			} else if (port->type == MCDE_PORTTYPE_DPI) {
+				mcde_wfld(MCDE_CR, DPI_EN_V3, true);
+			}
+			mcde_wfld(MCDE_CTRLA, FIFOWTRMRK,
+				get_output_fifo_size(MCDE_FIFO_A));
+			break;
+		case MCDE_FIFO_B:
+			if (port->type != MCDE_PORTTYPE_DSI)
+				return -EINVAL;
+			/* only channel B is supported */
+			if (chnl->id != 1)
+				return -EINVAL;
+
+			if (port->link == 0 && port->ifc == 0)
+				return -EINVAL;
+			if (port->link == 1 && port->ifc == 0)
+				return -EINVAL;
+
+			mcde_wfld(MCDE_CR, DSI1_EN_V3, true);
+			mcde_wfld(MCDE_CTRLB, FIFOWTRMRK,
+				get_output_fifo_size(MCDE_FIFO_B));
+
+			break;
+		default:
+			return -EINVAL;
+		}
+	}
+
+	/* Formatter */
+	if (port->type == MCDE_PORTTYPE_DSI) {
+		int i = 0;
+		u8 idx;
+		u8 lnk = port->link;
+
+		if (hardware_version == MCDE_CHIP_VERSION_1_0_4)
+			idx = chnl->id;
+		else
+			idx = 2 * port->link + port->ifc;
+
+		dsi_wfld(lnk, DSI_MCTL_MAIN_DATA_CTL, LINK_EN, true);
+		dev_dbg(&mcde_dev->dev, "DSI%d LINK_EN\n", lnk);
+
+		if (port->sync_src == MCDE_SYNCSRC_TE_POLLING) {
+			if (hardware_version == MCDE_CHIP_VERSION_3_0_5) {
+				dev_err(&mcde_dev->dev,
+				"DSI TE polling is not supported on this HW\n");
+				return -EINVAL;
+			}
+
+			/* Enable DSI TE polling */
+			dsi_te_poll_req(chnl);
+
+			/* Set timer to detect non TE answer */
+			dsi_te_poll_set_timer(chnl,
+					DSI_TE_NO_ANSWER_TIMEOUT_INIT);
+		} else {
+			dsi_wfld(lnk, DSI_MCTL_MAIN_DATA_CTL, BTA_EN, true);
+			dsi_wfld(lnk, DSI_MCTL_MAIN_DATA_CTL, READ_EN, true);
+			dsi_wfld(lnk, DSI_MCTL_MAIN_DATA_CTL, REG_TE_EN, true);
+		}
+
+		if (hardware_version == MCDE_CHIP_VERSION_3_0_5) {
+			if (port->phy.dsi.data_lanes_swap) {
+				dev_warn(&mcde_dev->dev,
+				"DSI %d data lane remap not available!\n",
+				lnk);
+				return -EINVAL;
+			}
+		} else
+			dsi_wfld(lnk, DSI_MCTL_MAIN_DATA_CTL, DLX_REMAP_EN,
+					port->phy.dsi.data_lanes_swap);
+
+		dsi_wreg(lnk, DSI_MCTL_DPHY_STATIC,
+			DSI_MCTL_DPHY_STATIC_UI_X4(port->phy.dsi.ui));
+		dsi_wreg(lnk, DSI_DPHY_LANES_TRIM,
+			DSI_DPHY_LANES_TRIM_DPHY_SPECS_90_81B_ENUM(0_90));
+		dsi_wreg(lnk, DSI_MCTL_DPHY_TIMEOUT,
+			DSI_MCTL_DPHY_TIMEOUT_CLK_DIV(0xf) |
+			DSI_MCTL_DPHY_TIMEOUT_HSTX_TO_VAL(0x3fff) |
+			DSI_MCTL_DPHY_TIMEOUT_LPRX_TO_VAL(0x3fff));
+		dsi_wreg(lnk, DSI_MCTL_MAIN_PHY_CTL,
+			DSI_MCTL_MAIN_PHY_CTL_WAIT_BURST_TIME(0xf) |
+			DSI_MCTL_MAIN_PHY_CTL_LANE2_EN(true) |
+			DSI_MCTL_MAIN_PHY_CTL_CLK_CONTINUOUS(
+				port->phy.dsi.clk_cont));
+		dsi_wreg(lnk, DSI_MCTL_ULPOUT_TIME,
+			DSI_MCTL_ULPOUT_TIME_CKLANE_ULPOUT_TIME(1) |
+			DSI_MCTL_ULPOUT_TIME_DATA_ULPOUT_TIME(1));
+		/* TODO: make enum */
+		dsi_wfld(lnk, DSI_CMD_MODE_CTL, ARB_MODE, false);
+		/* TODO: make enum */
+		dsi_wfld(lnk, DSI_CMD_MODE_CTL, ARB_PRI, port->ifc == 1);
+		dsi_wreg(lnk, DSI_MCTL_MAIN_EN,
+			DSI_MCTL_MAIN_EN_PLL_START(true) |
+			DSI_MCTL_MAIN_EN_CKLANE_EN(true) |
+			DSI_MCTL_MAIN_EN_DAT1_EN(true) |
+			DSI_MCTL_MAIN_EN_DAT2_EN(port->phy.dsi.num_data_lanes
+				== 2) |
+			DSI_MCTL_MAIN_EN_IF1_EN(port->ifc == 0) |
+			DSI_MCTL_MAIN_EN_IF2_EN(port->ifc == 1));
+		while (dsi_rfld(lnk, DSI_MCTL_MAIN_STS, CLKLANE_READY) == 0 ||
+			dsi_rfld(lnk, DSI_MCTL_MAIN_STS, DAT1_READY) == 0 ||
+			dsi_rfld(lnk, DSI_MCTL_MAIN_STS, DAT2_READY) == 0) {
+			mdelay(1);
+			if (i++ == 10) {
+				dev_warn(&mcde_dev->dev,
+					"DSI lane not ready (link=%d)!\n", lnk);
+				return -EINVAL;
+			}
+		}
+
+		mcde_wreg(MCDE_DSIVID0CONF0 +
+			idx * MCDE_DSIVID0CONF0_GROUPOFFSET,
+			MCDE_DSIVID0CONF0_BLANKING(0) |
+			MCDE_DSIVID0CONF0_VID_MODE(
+				port->mode == MCDE_PORTMODE_VID) |
+			MCDE_DSIVID0CONF0_CMD8(true) |
+			MCDE_DSIVID0CONF0_BIT_SWAP(false) |
+			MCDE_DSIVID0CONF0_BYTE_SWAP(false) |
+			MCDE_DSIVID0CONF0_DCSVID_NOTGEN(true));
+
+		if (port->mode == MCDE_PORTMODE_CMD) {
+			if (port->ifc == DSI_VIDEO_MODE)
+				dsi_wfld(port->link, DSI_CMD_MODE_CTL, IF1_ID,
+					port->phy.dsi.virt_id);
+			else if (port->ifc == DSI_CMD_MODE)
+				dsi_wfld(port->link, DSI_CMD_MODE_CTL, IF2_ID,
+					port->phy.dsi.virt_id);
+		}
+	}
+
+	mcde_wfld(MCDE_CR, MCDEEN, true);
+	chnl->formatter_updated = true;
+
+	dev_vdbg(&mcde_dev->dev, "Static registers setup, chnl=%d\n", chnl->id);
+
+	return 0;
+}
+
+/* REVIEW: Make update_* an mcde_rectangle? */
+static void update_overlay_registers(u8 idx, struct ovly_regs *regs,
+			struct mcde_port *port, enum mcde_fifo fifo,
+			u16 update_x, u16 update_y, u16 update_w,
+			u16 update_h, s16 stride, bool interlaced,
+			enum mcde_display_rotation rotation)
+{
+	/* TODO: fix clipping for small overlay */
+	u32 lmrgn = (regs->cropx + update_x) * regs->bits_per_pixel;
+	u32 tmrgn = (regs->cropy + update_y) * stride;
+	u32 ppl = regs->ppl - update_x;
+	u32 lpf = regs->lpf - update_y;
+	s32 ljinc = stride;
+	u32 pixelfetchwtrmrklevel;
+	u8  nr_of_bufs = 1;
+	u32 fifo_size;
+
+	/* TODO: disable if everything clipped */
+	if (!regs->enabled) {
+		u32 temp;
+		temp = mcde_rreg(MCDE_OVL0CR + idx * MCDE_OVL0CR_GROUPOFFSET);
+		mcde_wreg(MCDE_OVL0CR + idx * MCDE_OVL0CR_GROUPOFFSET,
+			(temp & ~MCDE_OVL0CR_OVLEN_MASK) |
+			MCDE_OVL0CR_OVLEN(false));
+		return;
+	}
+
+	if (rotation == MCDE_DISPLAY_ROT_180_CCW) {
+		ljinc = -ljinc;
+		tmrgn += stride * (regs->lpf - 1) / 8;
+	}
+
+	/*
+	* TODO: Preferably most of this is done in some apply function instead
+	* of every update. Problem is however that at overlay apply
+	* there is no port type info available (and the question is
+	* whether it is appropriate to add a port type there).
+	* Note that lpf has a dependency on update_y.
+	*/
+	if (port->type == MCDE_PORTTYPE_DPI && port->phy.dpi.tv_mode)
+		/* REVIEW: Why not for DSI? enable in regs? */
+		regs->col_conv = MCDE_OVL0CR_COLCCTRL_ENABLED_NO_SAT;
+	else if (port->type == MCDE_PORTTYPE_DSI) {
+		if (port->pixel_format == MCDE_PORTPIXFMT_DSI_YCBCR422)
+			regs->col_conv = MCDE_OVL0CR_COLCCTRL_ENABLED_NO_SAT;
+		else
+			regs->col_conv = MCDE_OVL0CR_COLCCTRL_DISABLED;
+		if (interlaced) {
+			nr_of_bufs = 2;
+			lpf = lpf / 2;
+			ljinc *= 2;
+		}
+	}
+
+	fifo_size = get_output_fifo_size(fifo);
+
+	if (port->hdmi_sdtv_switch == SDTV_SWITCH)
+		/* TODO: check if these wtrmrk levels work for HDMI as well. */
+		pixelfetchwtrmrklevel = MCDE_PIXFETCH_SMALL_WTRMRKLVL;
+	else {
+		if ((fifo == MCDE_FIFO_A || fifo == MCDE_FIFO_B) &&
+				regs->ppl >= fifo_size * 2)
+			pixelfetchwtrmrklevel = MCDE_PIXFETCH_LARGE_WTRMRKLVL;
+		else
+			pixelfetchwtrmrklevel = MCDE_PIXFETCH_MEDIUM_WTRMRKLVL;
+	}
+
+	if (regs->reset_buf_id) {
+		u32 sel_mod = MCDE_EXTSRC0CR_SEL_MOD_SOFTWARE_SEL;
+		if (port->update_auto_trig && port->type == MCDE_PORTTYPE_DSI) {
+			switch (port->sync_src) {
+			case MCDE_SYNCSRC_OFF:
+				sel_mod = MCDE_EXTSRC0CR_SEL_MOD_SOFTWARE_SEL;
+				break;
+			case MCDE_SYNCSRC_TE0:
+			case MCDE_SYNCSRC_TE1:
+			case MCDE_SYNCSRC_TE_POLLING:
+			default:
+				sel_mod = MCDE_EXTSRC0CR_SEL_MOD_AUTO_TOGGLE;
+				break;
+			}
+		} else if (port->type == MCDE_PORTTYPE_DPI) {
+			sel_mod = port->update_auto_trig ?
+					MCDE_EXTSRC0CR_SEL_MOD_AUTO_TOGGLE :
+					MCDE_EXTSRC0CR_SEL_MOD_SOFTWARE_SEL;
+		}
+
+		regs->reset_buf_id = false;
+		mcde_wreg(MCDE_EXTSRC0CONF + idx * MCDE_EXTSRC0CONF_GROUPOFFSET,
+			MCDE_EXTSRC0CONF_BUF_ID(0) |
+			MCDE_EXTSRC0CONF_BUF_NB(nr_of_bufs) |
+			MCDE_EXTSRC0CONF_PRI_OVLID(idx) |
+			MCDE_EXTSRC0CONF_BPP(regs->bpp) |
+			MCDE_EXTSRC0CONF_BGR(regs->bgr) |
+			MCDE_EXTSRC0CONF_BEBO(regs->bebo) |
+			MCDE_EXTSRC0CONF_BEPO(false));
+		mcde_wreg(MCDE_EXTSRC0CR + idx * MCDE_EXTSRC0CR_GROUPOFFSET,
+			MCDE_EXTSRC0CR_SEL_MOD(sel_mod) |
+			MCDE_EXTSRC0CR_MULTIOVL_CTRL_ENUM(PRIMARY) |
+			MCDE_EXTSRC0CR_FS_DIV_DISABLE(false) |
+			MCDE_EXTSRC0CR_FORCE_FS_DIV(false));
+		mcde_wreg(MCDE_OVL0CR + idx * MCDE_OVL0CR_GROUPOFFSET,
+			MCDE_OVL0CR_OVLEN(true) |
+		MCDE_OVL0CR_COLCCTRL(regs->col_conv) |
+			MCDE_OVL0CR_CKEYGEN(false) |
+			MCDE_OVL0CR_ALPHAPMEN(false) |
+			MCDE_OVL0CR_OVLF(false) |
+			MCDE_OVL0CR_OVLR(false) |
+			MCDE_OVL0CR_OVLB(false) |
+			MCDE_OVL0CR_FETCH_ROPC(0) |
+			MCDE_OVL0CR_STBPRIO(0) |
+			MCDE_OVL0CR_BURSTSIZE_ENUM(HW_8W) |
+			/* TODO: enum, get from ovly */
+			MCDE_OVL0CR_MAXOUTSTANDING_ENUM(8_REQ) |
+			/* TODO: _HW_8W, calculate? */
+			MCDE_OVL0CR_ROTBURSTSIZE_ENUM(HW_8W));
+		mcde_wreg(MCDE_OVL0CONF + idx * MCDE_OVL0CONF_GROUPOFFSET,
+			MCDE_OVL0CONF_PPL(ppl) |
+			MCDE_OVL0CONF_EXTSRC_ID(idx) |
+			MCDE_OVL0CONF_LPF(lpf));
+		mcde_wreg(MCDE_OVL0CONF2 + idx * MCDE_OVL0CONF2_GROUPOFFSET,
+			MCDE_OVL0CONF2_BP(regs->alpha_source) |
+			MCDE_OVL0CONF2_ALPHAVALUE(regs->alpha_value) |
+			MCDE_OVL0CONF2_OPQ(regs->opq) |
+			MCDE_OVL0CONF2_PIXOFF(lmrgn & 63) |
+			MCDE_OVL0CONF2_PIXELFETCHERWATERMARKLEVEL(
+				pixelfetchwtrmrklevel));
+		mcde_wreg(MCDE_OVL0LJINC + idx * MCDE_OVL0LJINC_GROUPOFFSET,
+			ljinc);
+		mcde_wreg(MCDE_OVL0CROP + idx * MCDE_OVL0CROP_GROUPOFFSET,
+			MCDE_OVL0CROP_TMRGN(tmrgn) |
+			MCDE_OVL0CROP_LMRGN(lmrgn >> 6));
+		mcde_wreg(MCDE_OVL0COMP + idx * MCDE_OVL0COMP_GROUPOFFSET,
+			MCDE_OVL0COMP_XPOS(regs->xpos) |
+			MCDE_OVL0COMP_CH_ID(regs->ch_id) |
+			MCDE_OVL0COMP_YPOS(regs->ypos) |
+			MCDE_OVL0COMP_Z(regs->z));
+	}
+
+	dev_vdbg(&mcde_dev->dev, "Overlay registers setup, idx=%d\n", idx);
+}
+
+static void update_overlay_address_registers(u8 idx, struct ovly_regs *regs)
+{
+	mcde_wreg(MCDE_EXTSRC0A0 + idx * MCDE_EXTSRC0A0_GROUPOFFSET,
+		regs->baseaddress0);
+	mcde_wreg(MCDE_EXTSRC0A1 + idx * MCDE_EXTSRC0A1_GROUPOFFSET,
+		regs->baseaddress1);
+}
+
+static void do_softwaretrig(struct mcde_chnl_state *chnl)
+{
+	/*
+	* For main and secondary display,
+	* FLOWEN has to be set before a SOFTWARE TRIG
+	* Otherwise not overlay interrupt is triggerd
+	* However FLOWEN must not be triggered before SOFTWARE TRIG
+	* if rotation is enabled
+	*/
+	if (hardware_version == MCDE_CHIP_VERSION_3_0_8)
+		enable_channel(chnl);
+	else if ((!is_channel_enabled(chnl) && !chnl->regs.roten))
+		enable_channel(chnl);
+
+	mcde_wreg(MCDE_CHNL0SYNCHSW +
+		chnl->id * MCDE_CHNL0SYNCHSW_GROUPOFFSET,
+		MCDE_CHNL0SYNCHSW_SW_TRIG(true));
+
+	if (hardware_version == MCDE_CHIP_VERSION_3_0_8)
+		disable_flow(chnl);
+	else
+		enable_channel(chnl);
+}
+
+static void disable_flow(struct mcde_chnl_state *chnl)
+{
+	switch (chnl->id) {
+	case MCDE_CHNL_A:
+		mcde_wfld(MCDE_CRA0, FLOEN, false);
+		break;
+	case MCDE_CHNL_B:
+		mcde_wfld(MCDE_CRB0, FLOEN, false);
+		break;
+	case MCDE_CHNL_C0:
+		mcde_wfld(MCDE_CRC, C1EN, false);
+		break;
+	case MCDE_CHNL_C1:
+		mcde_wfld(MCDE_CRC, C2EN, false);
+		break;
+	}
+}
+#define MCDE_FLOWEN_MAX_TRIAL 60
+
+static void disable_channel(struct mcde_chnl_state *chnl)
+{
+	int i;
+	const struct mcde_port *port = &chnl->port;
+
+	dev_vdbg(&mcde_dev->dev, "%s\n", __func__);
+
+	chnl->disable_software_trig = true;
+
+	if (port->type == MCDE_PORTTYPE_DSI) {
+		dsi_wfld(port->link, DSI_MCTL_MAIN_PHY_CTL, CLK_CONTINUOUS,
+			false);
+		if (port->sync_src == MCDE_SYNCSRC_TE_POLLING)
+			del_timer(&chnl->dsi_te_timer);
+	}
+
+	if (chnl->port.update_auto_trig &&
+			chnl->port.sync_src == MCDE_SYNCSRC_OFF &&
+			chnl->port.type == MCDE_PORTTYPE_DSI) {
+		del_timer(&chnl->auto_sync_timer);
+		chnl->continous_running = false;
+	}
+
+	switch (chnl->id) {
+	case MCDE_CHNL_A:
+		mcde_wfld(MCDE_CRA0, FLOEN, false);
+		wait_for_channel(chnl);
+		for (i = 0; i < MCDE_FLOWEN_MAX_TRIAL; i++) {
+			msleep(1);
+			if (!mcde_rfld(MCDE_CRA0, FLOEN)) {
+				dev_vdbg(&mcde_dev->dev,
+					"Flow (A) disable after >= %d ms\n", i);
+				goto break_switch;
+			}
+		}
+		dev_warn(&mcde_dev->dev, "%s: channel A timeout\n", __func__);
+		break;
+	case MCDE_CHNL_B:
+		mcde_wfld(MCDE_CRB0, FLOEN, false);
+		wait_for_channel(chnl);
+		for (i = 0; i < MCDE_FLOWEN_MAX_TRIAL; i++) {
+			msleep(1);
+			if (!mcde_rfld(MCDE_CRB0, FLOEN)) {
+				dev_vdbg(&mcde_dev->dev,
+				"Flow (B) disable after >= %d ms\n", i);
+				goto break_switch;
+			}
+		}
+		dev_warn(&mcde_dev->dev, "%s: channel B timeout\n", __func__);
+		break;
+	case MCDE_CHNL_C0:
+		mcde_wfld(MCDE_CRC, C1EN, false);
+		wait_for_channel(chnl);
+		for (i = 0; i < MCDE_FLOWEN_MAX_TRIAL; i++) {
+			msleep(1);
+			if (!mcde_rfld(MCDE_CRC, C1EN)) {
+				dev_vdbg(&mcde_dev->dev,
+				"Flow (C1) disable after >= %d ms\n", i);
+				goto break_switch;
+			}
+		}
+		dev_warn(&mcde_dev->dev, "%s: channel C0 timeout\n", __func__);
+		break;
+	case MCDE_CHNL_C1:
+		mcde_wfld(MCDE_CRC, C2EN, false);
+		wait_for_channel(chnl);
+		for (i = 0; i < MCDE_FLOWEN_MAX_TRIAL; i++) {
+			msleep(1);
+			if (!mcde_rfld(MCDE_CRC, C2EN)) {
+				dev_vdbg(&mcde_dev->dev,
+				"Flow (C2) disable after >= %d ms\n", i);
+				goto break_switch;
+			}
+		}
+		dev_warn(&mcde_dev->dev, "%s: channel C1 timeout\n", __func__);
+		break;
+	}
+break_switch:
+	chnl->continous_running = false;
+}
+
+static void enable_channel(struct mcde_chnl_state *chnl)
+{
+	const struct mcde_port *port = &chnl->port;
+	int i;
+
+	dev_vdbg(&mcde_dev->dev, "%s\n", __func__);
+
+	if (port->type == MCDE_PORTTYPE_DSI)
+		dsi_wfld(port->link, DSI_MCTL_MAIN_PHY_CTL, CLK_CONTINUOUS,
+				port->phy.dsi.clk_cont);
+
+	switch (chnl->id) {
+	case MCDE_CHNL_A:
+		mcde_wfld(MCDE_CRA0, FLOEN, true);
+		for (i = 0; i < MCDE_FLOWEN_MAX_TRIAL; i++) {
+			if (mcde_rfld(MCDE_CRA0, FLOEN)) {
+				dev_vdbg(&mcde_dev->dev,
+					"Flow (A) enable after >= %d ms\n", i);
+				return;
+			}
+			msleep(1);
+		}
+		break;
+	case MCDE_CHNL_B:
+		mcde_wfld(MCDE_CRB0, FLOEN, true);
+		for (i = 0; i < MCDE_FLOWEN_MAX_TRIAL; i++) {
+			if (mcde_rfld(MCDE_CRB0, FLOEN)) {
+				dev_vdbg(&mcde_dev->dev,
+					"Flow (B) enable after >= %d ms\n", i);
+				return;
+			}
+			msleep(1);
+		}
+		break;
+	case MCDE_CHNL_C0:
+		mcde_wfld(MCDE_CRC, C1EN, true);
+		for (i = 0; i < MCDE_FLOWEN_MAX_TRIAL; i++) {
+			if (mcde_rfld(MCDE_CRC, C1EN)) {
+				dev_vdbg(&mcde_dev->dev,
+					"Flow (C1) enable after >= %d ms\n", i);
+				return;
+			}
+			msleep(1);
+		}
+		mcde_wfld(MCDE_CRC, POWEREN, true);
+		break;
+	case MCDE_CHNL_C1:
+		mcde_wfld(MCDE_CRC, C2EN, true);
+		for (i = 0; i < MCDE_FLOWEN_MAX_TRIAL; i++) {
+			if (mcde_rfld(MCDE_CRC, C2EN)) {
+				dev_vdbg(&mcde_dev->dev,
+					"Flow (C2) enable after >= %d ms\n", i);
+				return;
+			}
+			msleep(1);
+		}
+		mcde_wfld(MCDE_CRC, POWEREN, true);
+		break;
+	}
+}
+#undef MCDE_FLOWEN_MAX_TRIAL
+
+static int is_channel_enabled(struct mcde_chnl_state *chnl)
+{
+	switch (chnl->id) {
+	case MCDE_CHNL_A:
+		return mcde_rfld(MCDE_CRA0, FLOEN);
+	case MCDE_CHNL_B:
+		return mcde_rfld(MCDE_CRB0, FLOEN);
+	case MCDE_CHNL_C0:
+		return mcde_rfld(MCDE_CRC, C1EN);
+	case MCDE_CHNL_C1:
+		return mcde_rfld(MCDE_CRC, C2EN);
+	}
+	return 0;
+}
+
+static void watchdog_auto_sync_timer_function(unsigned long arg)
+{
+	int i;
+	for (i = 0; i < num_channels; i++) {
+		struct mcde_chnl_state *chnl = &channels[i];
+		if (chnl->port.update_auto_trig &&
+				chnl->port.sync_src == MCDE_SYNCSRC_OFF &&
+				chnl->port.type == MCDE_PORTTYPE_DSI &&
+				chnl->continous_running) {
+			mcde_wreg(MCDE_CHNL0SYNCHSW +
+				chnl->id
+				* MCDE_CHNL0SYNCHSW_GROUPOFFSET,
+				MCDE_CHNL0SYNCHSW_SW_TRIG(true));
+			mod_timer(&chnl->auto_sync_timer,
+				jiffies +
+				msecs_to_jiffies(MCDE_AUTO_SYNC_WATCHDOG
+								* 1000));
+		}
+	}
+}
+
+static void work_sleep_function(struct work_struct *ptr)
+{
+	dev_vdbg(&mcde_dev->dev, "%s\n", __func__);
+	if (mutex_trylock(&mcde_hw_lock) == 1) {
+		if (mcde_dynamic_power_management)
+			(void)disable_mcde_hw(false);
+		mutex_unlock(&mcde_hw_lock);
+	}
+}
+
+/* TODO get from register */
+#define MCDE_CLK_FREQ_MHZ 160
+
+void update_channel_registers(enum mcde_chnl chnl_id, struct chnl_regs *regs,
+				struct mcde_port *port, enum mcde_fifo fifo,
+				struct mcde_video_mode *video_mode)
+{
+	u8 idx = chnl_id;
+	u32 out_synch_src = MCDE_CHNL0SYNCHMOD_OUT_SYNCH_SRC_FORMATTER;
+	u32 src_synch = MCDE_CHNL0SYNCHMOD_SRC_SYNCH_SOFTWARE;
+
+	dev_vdbg(&mcde_dev->dev, "%s\n", __func__);
+
+	/* Channel */
+	if (port->update_auto_trig && port->type == MCDE_PORTTYPE_DSI) {
+		switch (port->sync_src) {
+		case MCDE_SYNCSRC_TE0:
+			out_synch_src = MCDE_CHNL0SYNCHMOD_OUT_SYNCH_SRC_VSYNC0;
+			src_synch = MCDE_CHNL0SYNCHMOD_SRC_SYNCH_OUTPUT;
+			break;
+		case MCDE_SYNCSRC_OFF:
+			src_synch = MCDE_CHNL0SYNCHMOD_SRC_SYNCH_SOFTWARE;
+			break;
+		case MCDE_SYNCSRC_TE1:
+		default:
+			out_synch_src = MCDE_CHNL0SYNCHMOD_OUT_SYNCH_SRC_VSYNC1;
+			src_synch = MCDE_CHNL0SYNCHMOD_SRC_SYNCH_OUTPUT;
+			break;
+		case MCDE_SYNCSRC_TE_POLLING:
+			src_synch = MCDE_CHNL0SYNCHMOD_SRC_SYNCH_OUTPUT;
+			break;
+		}
+	} else if (port->type == MCDE_PORTTYPE_DPI) {
+		src_synch = port->update_auto_trig ?
+					MCDE_CHNL0SYNCHMOD_SRC_SYNCH_OUTPUT :
+					MCDE_CHNL0SYNCHMOD_SRC_SYNCH_SOFTWARE;
+	}
+
+	mcde_wreg(MCDE_CHNL0CONF + idx * MCDE_CHNL0CONF_GROUPOFFSET,
+		MCDE_CHNL0CONF_PPL(regs->ppl-1) |
+		MCDE_CHNL0CONF_LPF(regs->lpf-1));
+	mcde_wreg(MCDE_CHNL0STAT + idx * MCDE_CHNL0STAT_GROUPOFFSET,
+		MCDE_CHNL0STAT_CHNLBLBCKGND_EN(false) |
+		MCDE_CHNL0STAT_CHNLRD(true));
+	mcde_wreg(MCDE_CHNL0SYNCHMOD +
+		idx * MCDE_CHNL0SYNCHMOD_GROUPOFFSET,
+		MCDE_CHNL0SYNCHMOD_SRC_SYNCH(src_synch) |
+		MCDE_CHNL0SYNCHMOD_OUT_SYNCH_SRC(out_synch_src));
+	mcde_wreg(MCDE_CHNL0BCKGNDCOL + idx * MCDE_CHNL0BCKGNDCOL_GROUPOFFSET,
+		MCDE_CHNL0BCKGNDCOL_B(0) |
+		MCDE_CHNL0BCKGNDCOL_G(0) |
+		MCDE_CHNL0BCKGNDCOL_R(0));
+
+	if (chnl_id == MCDE_CHNL_A || chnl_id == MCDE_CHNL_B) {
+		u32 mcde_crx0;
+		u32 mcde_crx1;
+		u32 mcde_pal0x;
+		u32 mcde_pal1x;
+		if (chnl_id == MCDE_CHNL_A) {
+			mcde_crx0 = MCDE_CRA0;
+			mcde_crx1 = MCDE_CRA1;
+			mcde_pal0x = MCDE_PAL0A;
+			mcde_pal1x = MCDE_PAL1A;
+		} else {
+			mcde_crx0 = MCDE_CRB0;
+			mcde_crx1 = MCDE_CRB1;
+			mcde_pal0x = MCDE_PAL0B;
+			mcde_pal1x = MCDE_PAL1B;
+		}
+		mcde_wreg_fld(mcde_crx0, MCDE_CRA0_ROTEN_MASK,
+				MCDE_CRA0_ROTEN_SHIFT, regs->roten);
+		mcde_wreg_fld(mcde_crx0, MCDE_CRA0_PALEN_MASK,
+				MCDE_CRA0_PALEN_SHIFT, regs->palette_enable);
+		mcde_wreg(mcde_crx1,
+			MCDE_CRA1_PCD(regs->pcd) |
+			MCDE_CRA1_CLKSEL(regs->clksel) |
+			MCDE_CRA1_CDWIN(regs->cdwin) |
+			MCDE_CRA1_OUTBPP(bpp2outbpp(regs->bpp)) |
+			MCDE_CRA1_BCD(regs->bcd) |
+			MCDE_CRA1_CLKTYPE(regs->internal_clk)
+		);
+		if (regs->palette_enable) {
+			int i;
+			for (i = 0; i < 256; i++) {
+				mcde_wreg(mcde_pal0x,
+					MCDE_PAL0A_GREEN(regs->map_g(i)) |
+					MCDE_PAL0A_BLUE(regs->map_b(i)));
+				mcde_wreg(mcde_pal1x,
+					MCDE_PAL1A_RED(regs->map_r(i)));
+			}
+		}
+	}
+
+	/* Formatter */
+	if (port->type == MCDE_PORTTYPE_DSI) {
+		u8 fidx;
+		u32 temp, packet;
+		/* pkt_div is used to avoid underflow in output fifo for
+		 * large packets */
+		u32 pkt_div = 1;
+		u32 dsi_delay0 = 0;
+		u32 screen_ppl, screen_lpf;
+
+		if (hardware_version == MCDE_CHIP_VERSION_1_0_4)
+			fidx = chnl_id;
+		else
+			fidx = 2 * port->link + port->ifc;
+
+		screen_ppl = video_mode->xres;
+		screen_lpf = video_mode->yres;
+
+		if (screen_ppl == SCREEN_PPL_HIGH) {
+			pkt_div = (screen_ppl - 1) /
+					get_output_fifo_size(fifo) + 1;
+		} else {
+			pkt_div = screen_ppl /
+					(get_output_fifo_size(fifo) * 2) + 1;
+		}
+
+		if (video_mode->interlaced)
+			screen_lpf /= 2;
+
+		/* pkt_delay_progressive = pixelclock * htot /
+		 * (1E12 / 160E6) / pkt_div */
+		dsi_delay0 = (video_mode->pixclock + 1) *
+			(video_mode->xres + video_mode->hbp +
+				video_mode->hfp) /
+			(1000000 / MCDE_CLK_FREQ_MHZ) / pkt_div;
+		temp = mcde_rreg(MCDE_DSIVID0CONF0 +
+			fidx * MCDE_DSIVID0CONF0_GROUPOFFSET);
+		mcde_wreg(MCDE_DSIVID0CONF0 +
+			fidx * MCDE_DSIVID0CONF0_GROUPOFFSET,
+			(temp & ~MCDE_DSIVID0CONF0_PACKING_MASK) |
+			MCDE_DSIVID0CONF0_PACKING(regs->dsipacking));
+		/* 1==CMD8 */
+		packet = ((screen_ppl / pkt_div * regs->bpp) >> 3) + 1;
+		mcde_wreg(MCDE_DSIVID0FRAME +
+			fidx * MCDE_DSIVID0FRAME_GROUPOFFSET,
+			MCDE_DSIVID0FRAME_FRAME(packet * pkt_div * screen_lpf));
+		mcde_wreg(MCDE_DSIVID0PKT + fidx * MCDE_DSIVID0PKT_GROUPOFFSET,
+			MCDE_DSIVID0PKT_PACKET(packet));
+		mcde_wreg(MCDE_DSIVID0SYNC +
+			fidx * MCDE_DSIVID0SYNC_GROUPOFFSET,
+			MCDE_DSIVID0SYNC_SW(0) |
+			MCDE_DSIVID0SYNC_DMA(0));
+		mcde_wreg(MCDE_DSIVID0CMDW +
+			fidx * MCDE_DSIVID0CMDW_GROUPOFFSET,
+			MCDE_DSIVID0CMDW_CMDW_START(DCS_CMD_WRITE_START) |
+			MCDE_DSIVID0CMDW_CMDW_CONTINUE(DCS_CMD_WRITE_CONTINUE));
+		mcde_wreg(MCDE_DSIVID0DELAY0 +
+			fidx * MCDE_DSIVID0DELAY0_GROUPOFFSET,
+			MCDE_DSIVID0DELAY0_INTPKTDEL(dsi_delay0));
+		mcde_wreg(MCDE_DSIVID0DELAY1 +
+			fidx * MCDE_DSIVID0DELAY1_GROUPOFFSET,
+			MCDE_DSIVID0DELAY1_TEREQDEL(0) |
+			MCDE_DSIVID0DELAY1_FRAMESTARTDEL(0));
+	}
+
+	if (regs->roten) {
+		/* TODO: Allocate memory in ESRAM instead of
+				static allocations. */
+		mcde_wreg(MCDE_ROTADD0A + chnl_id * MCDE_ROTADD0A_GROUPOFFSET,
+			regs->rotbuf1);
+		mcde_wreg(MCDE_ROTADD1A + chnl_id * MCDE_ROTADD1A_GROUPOFFSET,
+			regs->rotbuf2);
+
+		mcde_wreg(MCDE_ROTACONF + chnl_id * MCDE_ROTACONF_GROUPOFFSET,
+			MCDE_ROTACONF_ROTBURSTSIZE_ENUM(8W) |
+			MCDE_ROTACONF_ROTBURSTSIZE_HW(1) |
+			MCDE_ROTACONF_ROTDIR(regs->rotdir) |
+			MCDE_ROTACONF_STRIP_WIDTH_ENUM(16PIX) |
+			MCDE_ROTACONF_RD_MAXOUT_ENUM(4_REQ) |
+			MCDE_ROTACONF_WR_MAXOUT_ENUM(8_REQ));
+	}
+
+	/* Blending */
+	if (chnl_id == MCDE_CHNL_A) {
+		mcde_wfld(MCDE_CRA0, BLENDEN, regs->blend_en);
+		mcde_wfld(MCDE_CRA0, BLENDCTRL, regs->blend_ctrl);
+		mcde_wfld(MCDE_CRA0, ALPHABLEND, regs->alpha_blend);
+	} else if (chnl_id == MCDE_CHNL_B) {
+		mcde_wfld(MCDE_CRB0, BLENDEN, regs->blend_en);
+		mcde_wfld(MCDE_CRB0, BLENDCTRL, regs->blend_ctrl);
+		mcde_wfld(MCDE_CRB0, ALPHABLEND, regs->alpha_blend);
+	}
+
+	dev_vdbg(&mcde_dev->dev, "Channel registers setup, chnl=%d\n", chnl_id);
+}
+
+static int enable_mcde_hw(void)
+{
+	int ret;
+	int i;
+
+	dev_vdbg(&mcde_dev->dev, "%s\n", __func__);
+
+	cancel_delayed_work(&hw_timeout_work);
+
+	schedule_delayed_work(&hw_timeout_work,
+					msecs_to_jiffies(MCDE_SLEEP_WATCHDOG));
+
+	if (mcde_is_enabled)
+		return 0;
+
+	ret = enable_clocks_and_power(mcde_dev);
+	if (ret < 0) {
+		dev_dbg(&mcde_dev->dev,
+			"%s: Enable clocks and power failed\n"
+						, __func__);
+		cancel_delayed_work(&hw_timeout_work);
+		return -EINVAL;
+	}
+
+	ret = request_irq(mcde_irq, mcde_irq_handler, 0, "mcde",
+							&mcde_dev->dev);
+	if (ret) {
+		dev_dbg(&mcde_dev->dev, "Failed to request irq (irq=%d)\n",
+								mcde_irq);
+		cancel_delayed_work(&hw_timeout_work);
+		return -EINVAL;
+	}
+
+	update_mcde_registers();
+
+	/* update hardware with same settings as before power down*/
+	for (i = 0; i < num_channels; i++) {
+		struct mcde_chnl_state *chnl = &channels[i];
+		if (chnl->enabled) {
+			(void)update_channel_static_registers(chnl);
+			update_channel_registers(chnl->id, &chnl->regs,
+				&chnl->port, chnl->fifo,
+				&chnl->vmode);
+			if (chnl->ovly0)
+				update_overlay_registers(chnl->ovly0->idx,
+					&chnl->ovly0->regs,
+					&chnl->port, chnl->fifo,
+					chnl->regs.x, chnl->regs.y,
+					chnl->regs.ppl, chnl->regs.lpf,
+					chnl->ovly0->stride,
+					chnl->vmode.interlaced,
+					chnl->rotation);
+			if (chnl->ovly1)
+				update_overlay_registers(chnl->ovly1->idx,
+					&chnl->ovly1->regs,
+					&chnl->port, chnl->fifo,
+					chnl->regs.x, chnl->regs.y,
+					chnl->regs.ppl, chnl->regs.lpf,
+					chnl->ovly1->stride,
+					chnl->vmode.interlaced,
+					chnl->rotation);
+		}
+	}
+
+	mcde_is_enabled = true;
+	return 0;
+}
+
+
+/* DSI */
+
+int mcde_dsi_dcs_write(struct mcde_chnl_state *chnl, u8 cmd, u8* data, int len)
+{
+	int i;
+	u32 wrdat[4] = { 0, 0, 0, 0 };
+	u32 settings;
+	u8 link = chnl->port.link;
+	u8 virt_id = chnl->port.phy.dsi.virt_id;
+	u32 ok;
+	u32 error;
+
+	/* REVIEW: One command at a time */
+	/* REVIEW: Allow read/write on unreserved ports */
+	if (len > MCDE_MAX_DCS_WRITE || chnl->port.type != MCDE_PORTTYPE_DSI)
+		return -EINVAL;
+
+	mutex_lock(&mcde_hw_lock);
+
+	if (enable_mcde_hw()) {
+		mutex_unlock(&mcde_hw_lock);
+		return -EINVAL;
+	}
+	if (!chnl->formatter_updated)
+		(void)update_channel_static_registers(chnl);
+
+	wrdat[0] = cmd;
+	for (i = 1; i <= len; i++)
+		wrdat[i>>2] |= ((u32)data[i-1] << ((i & 3) * 8));
+
+	settings = DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_NAT_ENUM(WRITE) |
+		DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_LONGNOTSHORT(len > 1) |
+		DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_ID(virt_id) |
+		DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_SIZE(len+1) |
+		DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_LP_EN(true);
+	if (len == 0)
+		settings |= DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_HEAD_ENUM(
+			DCS_SHORT_WRITE_0);
+	else if (len == 1)
+		settings |= DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_HEAD_ENUM(
+			DCS_SHORT_WRITE_1);
+	else
+		settings |= DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_HEAD_ENUM(
+			DCS_LONG_WRITE);
+
+	dsi_wreg(link, DSI_DIRECT_CMD_MAIN_SETTINGS, settings);
+	dsi_wreg(link, DSI_DIRECT_CMD_WRDAT0, wrdat[0]);
+	if (len >  3)
+		dsi_wreg(link, DSI_DIRECT_CMD_WRDAT1, wrdat[1]);
+	if (len >  7)
+		dsi_wreg(link, DSI_DIRECT_CMD_WRDAT2, wrdat[2]);
+	if (len > 11)
+		dsi_wreg(link, DSI_DIRECT_CMD_WRDAT3, wrdat[3]);
+	dsi_wreg(link, DSI_DIRECT_CMD_STS_CLR, ~0);
+	dsi_wreg(link, DSI_DIRECT_CMD_SEND, true);
+
+	/* TODO: irq wait and error check */
+	mdelay(10);
+
+	ok = dsi_rreg(link, DSI_DIRECT_CMD_STS);
+	error = dsi_rreg(link, DSI_CMD_MODE_STS);
+	dev_vdbg(&mcde_dev->dev, "DSI Write ok %x error %x\n", ok, error);
+
+	dsi_wreg(link, DSI_CMD_MODE_STS_CLR, ~0);
+	dsi_wreg(link, DSI_DIRECT_CMD_STS_CLR, ~0);
+
+	mutex_unlock(&mcde_hw_lock);
+
+	return 0;
+}
+
+int mcde_dsi_dcs_read(struct mcde_chnl_state *chnl, u8 cmd, u8* data, int *len)
+{
+	int ret = 0;
+	u8 link = chnl->port.link;
+	u8 virt_id = chnl->port.phy.dsi.virt_id;
+	u32 settings;
+	int wait = 100;
+	bool error, ok;
+
+	if (*len > MCDE_MAX_DCS_READ || chnl->port.type != MCDE_PORTTYPE_DSI)
+		return -EINVAL;
+
+	mutex_lock(&mcde_hw_lock);
+
+	if (enable_mcde_hw()) {
+		mutex_unlock(&mcde_hw_lock);
+		return -EINVAL;
+	}
+	if (!chnl->formatter_updated)
+		(void)update_channel_static_registers(chnl);
+
+	dsi_wfld(link, DSI_MCTL_MAIN_DATA_CTL, BTA_EN, true);
+	dsi_wfld(link, DSI_MCTL_MAIN_DATA_CTL, READ_EN, true);
+	settings = DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_NAT_ENUM(READ) |
+		DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_LONGNOTSHORT(false) |
+		DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_ID(virt_id) |
+		DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_SIZE(1) |
+		DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_LP_EN(true) |
+		DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_HEAD_ENUM(DCS_READ);
+	dsi_wreg(link, DSI_DIRECT_CMD_MAIN_SETTINGS, settings);
+	dsi_wreg(link, DSI_DIRECT_CMD_WRDAT0, cmd);
+	dsi_wreg(link, DSI_DIRECT_CMD_STS_CLR, ~0);
+	dsi_wreg(link, DSI_DIRECT_CMD_RD_STS_CLR, ~0);
+	dsi_wreg(link, DSI_DIRECT_CMD_SEND, true);
+
+	/* TODO */
+	while (wait-- && !(error = dsi_rfld(link, DSI_DIRECT_CMD_STS,
+		READ_COMPLETED_WITH_ERR)) && !(ok = dsi_rfld(link,
+		DSI_DIRECT_CMD_STS, READ_COMPLETED)))
+		mdelay(10);
+
+	if (ok) {
+		int rdsize;
+		u32 rddat;
+
+		rdsize = dsi_rfld(link, DSI_DIRECT_CMD_RD_PROPERTY, RD_SIZE);
+		rddat = dsi_rreg(link, DSI_DIRECT_CMD_RDDAT);
+		if (rdsize < *len)
+			pr_err("DCS incomplete read %d<%d (%.8X)\n",
+				rdsize, *len, rddat);/* REVIEW: dev_dbg */
+		*len = min(*len, rdsize);
+		memcpy(data, &rddat, *len);
+	} else {
+		pr_err("DCS read failed, err=%d, sts=%X\n",
+			error, dsi_rreg(link, DSI_DIRECT_CMD_STS));
+		ret = -EIO;
+	}
+
+	dsi_wreg(link, DSI_CMD_MODE_STS_CLR, ~0);
+	dsi_wreg(link, DSI_DIRECT_CMD_STS_CLR, ~0);
+
+	mutex_unlock(&mcde_hw_lock);
+
+	return ret;
+}
+
+static void dsi_te_poll_req(struct mcde_chnl_state *chnl)
+{
+	u8 lnk = chnl->port.link;
+	const struct mcde_port *port = &chnl->port;
+
+	dsi_wfld(lnk, DSI_MCTL_MAIN_DATA_CTL, REG_TE_EN, false);
+	if (port->ifc == 0)
+		dsi_wfld(lnk, DSI_MCTL_MAIN_DATA_CTL, IF1_TE_EN, true);
+	if (port->ifc == 1)
+		dsi_wfld(lnk, DSI_MCTL_MAIN_DATA_CTL, IF2_TE_EN, true);
+	dsi_wfld(lnk, DSI_MCTL_MAIN_DATA_CTL, BTA_EN, true);
+	dsi_wfld(lnk, DSI_MCTL_MAIN_DATA_CTL, READ_EN, true);
+	dsi_wfld(lnk, DSI_MCTL_MAIN_DATA_CTL, HOST_EOT_GEN, true);
+	dsi_wfld(lnk, DSI_CMD_MODE_CTL, TE_TIMEOUT, 0x3FF);
+	dsi_wfld(lnk, DSI_MCTL_MAIN_DATA_CTL, TE_POLLING_EN, true);
+}
+
+static void dsi_te_poll_set_timer(struct mcde_chnl_state *chnl,
+		unsigned int timeout)
+{
+	mod_timer(&chnl->dsi_te_timer,
+			jiffies +
+			msecs_to_jiffies(timeout));
+}
+
+static void dsi_te_timer_function(unsigned long arg)
+{
+	struct mcde_chnl_state *chnl;
+	u8 lnk;
+
+	if (arg >= num_channels) {
+		dev_err(&mcde_dev->dev, "%s invalid arg:%ld\n", __func__, arg);
+		return;
+	}
+
+	chnl = &channels[arg];
+
+	if (mcde_is_enabled && chnl->enabled && chnl->formatter_updated) {
+		lnk = chnl->port.link;
+		/* No TE answer; force stop */
+		dsi_wfld(lnk, DSI_MCTL_MAIN_PHY_CTL, FORCE_STOP_MODE, true);
+		udelay(20);
+		dsi_wfld(lnk, DSI_MCTL_MAIN_PHY_CTL, FORCE_STOP_MODE, false);
+		dev_info(&mcde_dev->dev, "DSI%d force stop\n", lnk);
+		dsi_te_poll_set_timer(chnl, DSI_TE_NO_ANSWER_TIMEOUT);
+	} else {
+		dev_info(&mcde_dev->dev, "1:DSI force stop\n");
+	}
+}
+
+static void dsi_te_request(struct mcde_chnl_state *chnl)
+{
+	u8 link = chnl->port.link;
+	u8 virt_id = chnl->port.phy.dsi.virt_id;
+	u32 settings;
+
+	dev_vdbg(&mcde_dev->dev, "Request BTA TE, chnl=%d\n",
+		chnl->id);
+
+	dsi_wfld(link, DSI_MCTL_MAIN_DATA_CTL, BTA_EN, true);
+	dsi_wfld(link, DSI_MCTL_MAIN_DATA_CTL, REG_TE_EN, true);
+	dsi_wfld(link, DSI_CMD_MODE_CTL, TE_TIMEOUT, 0x3FF);
+	settings = DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_NAT_ENUM(TE_REQ) |
+		DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_LONGNOTSHORT(false) |
+		DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_ID(virt_id) |
+		DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_SIZE(2) |
+		DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_LP_EN(true) |
+		DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_HEAD_ENUM(DCS_SHORT_WRITE_1);
+	dsi_wreg(link, DSI_DIRECT_CMD_MAIN_SETTINGS, settings);
+	dsi_wreg(link, DSI_DIRECT_CMD_WRDAT0, DCS_CMD_SET_TEAR_ON);
+	dsi_wreg(link, DSI_DIRECT_CMD_STS_CLR,
+		DSI_DIRECT_CMD_STS_CLR_TE_RECEIVED_CLR(true));
+	dsi_wfld(link, DSI_DIRECT_CMD_STS_CTL, TE_RECEIVED_EN, true);
+	dsi_wreg(link, DSI_CMD_MODE_STS_CLR,
+		DSI_CMD_MODE_STS_CLR_ERR_NO_TE_CLR(true));
+	dsi_wfld(link, DSI_CMD_MODE_STS_CTL, ERR_NO_TE_EN, true);
+	dsi_wreg(link, DSI_DIRECT_CMD_SEND, true);
+}
+
+/* MCDE channels */
+static struct mcde_chnl_state *_mcde_chnl_get(enum mcde_chnl chnl_id,
+	enum mcde_fifo fifo, const struct mcde_port *port)
+{
+	int i;
+	struct mcde_chnl_state *chnl = NULL;
+	enum mcde_chnl_path path;
+	const struct chnl_config *cfg = NULL;
+
+	/* Allocate channel */
+	for (i = 0; i < num_channels; i++) {
+		if (chnl_id == channels[i].id)
+			chnl = &channels[i];
+	}
+	if (!chnl) {
+		dev_dbg(&mcde_dev->dev, "Invalid channel, chnl=%d\n", chnl_id);
+		return ERR_PTR(-EINVAL);
+	}
+	if (chnl->reserved) {
+		dev_dbg(&mcde_dev->dev, "Channel in use, chnl=%d\n", chnl_id);
+		return ERR_PTR(-EBUSY);
+	}
+
+	if (hardware_version == MCDE_CHIP_VERSION_3_0_5) {
+		path = MCDE_CHNLPATH(chnl->id, fifo, port->type,
+						port->ifc, port->link);
+		for (i = 0; i < ARRAY_SIZE(chnl_configs); i++)
+			if (chnl_configs[i].path == path) {
+				cfg = &chnl_configs[i];
+				break;
+			}
+		if (cfg == NULL) {
+			dev_dbg(&mcde_dev->dev, "Invalid config, chnl=%d,"
+					" path=0x%.8X\n", chnl_id, path);
+			return ERR_PTR(-EINVAL);
+		} else {
+			dev_info(&mcde_dev->dev, "Config, chnl=%d,"
+					" path=0x%.8X\n", chnl_id, path);
+		}
+	}
+	/* TODO: verify that cfg is ok to activate (check other chnl cfgs) */
+
+	chnl->cfg = cfg;
+	chnl->port = *port;
+	chnl->fifo = fifo;
+	chnl->formatter_updated = false;
+	chnl->pix_fmt = port->pixel_format;
+
+	chnl->blend_en = true;
+	chnl->blend_ctrl = MCDE_CRA0_BLENDCTRL_SOURCE;
+	chnl->alpha_blend = 0xFF;
+
+	_mcde_chnl_apply(chnl);
+	chnl->reserved = true;
+
+	return chnl;
+}
+
+static int _mcde_chnl_apply(struct mcde_chnl_state *chnl)
+{
+	bool roten = false;
+	u8 rotdir = 0;
+
+	if (chnl->rotation == MCDE_DISPLAY_ROT_90_CCW) {
+		roten = true;
+		rotdir = MCDE_ROTACONF_ROTDIR_CCW;
+	} else if (chnl->rotation == MCDE_DISPLAY_ROT_90_CW) {
+		roten = true;
+		rotdir = MCDE_ROTACONF_ROTDIR_CW;
+	}
+	/* REVIEW: 180 deg? */
+
+	chnl->regs.bpp = portfmt2bpp(chnl->pix_fmt);
+	chnl->regs.synchronized_update = chnl->synchronized_update;
+	chnl->regs.roten = roten;
+	chnl->regs.rotdir = rotdir;
+	chnl->regs.rotbuf1 = chnl->rotbuf1;
+	chnl->regs.rotbuf2 = chnl->rotbuf2;
+	chnl->regs.palette_enable = chnl->palette_enable;
+	chnl->regs.map_r = chnl->map_r;
+	chnl->regs.map_g = chnl->map_g;
+	chnl->regs.map_b = chnl->map_b;
+	if (chnl->port.type == MCDE_PORTTYPE_DSI) {
+		chnl->regs.clksel = MCDE_CRA1_CLKSEL_166MHZ;
+		chnl->regs.dsipacking = portfmt2dsipacking(chnl->pix_fmt);
+	} else if (chnl->port.type == MCDE_PORTTYPE_DPI) {
+		if (chnl->port.phy.dpi.tv_mode) {
+			chnl->regs.internal_clk = false;
+			chnl->regs.bcd = true;
+			if (chnl->id == MCDE_CHNL_A)
+				chnl->regs.clksel = MCDE_CRA1_CLKSEL_EXT_TV1;
+			else
+				chnl->regs.clksel = MCDE_CRA1_CLKSEL_EXT_TV2;
+		} else {
+			chnl->regs.internal_clk = true;
+			chnl->regs.clksel = MCDE_CRA1_CLKSEL_LCD;
+			chnl->regs.cdwin = portfmt2cdwin(chnl->pix_fmt);
+			chnl->regs.bcd = (chnl->port.phy.dpi.clock_div < 2);
+			if (!chnl->regs.bcd)
+				chnl->regs.pcd =
+					chnl->port.phy.dpi.clock_div - 2;
+		}
+		dpi_video_mode_apply(chnl);
+	}
+
+	chnl->regs.blend_ctrl = chnl->blend_ctrl;
+	chnl->regs.blend_en = chnl->blend_en;
+	chnl->regs.alpha_blend = chnl->alpha_blend;
+
+
+	chnl->transactionid++;
+
+	dev_vdbg(&mcde_dev->dev, "Channel applied, chnl=%d\n", chnl->id);
+	return 0;
+}
+
+static void chnl_update_registers(struct mcde_chnl_state *chnl)
+{
+	/* REVIEW: Move content to update_channel_register */
+	/* and remove this one */
+	if (chnl->port.type == MCDE_PORTTYPE_DPI)
+		update_dpi_registers(chnl->id, &chnl->tv_regs);
+	if (chnl->id == MCDE_CHNL_A || chnl->id == MCDE_CHNL_B)
+		update_col_registers(chnl->id, &chnl->col_regs);
+	update_channel_registers(chnl->id, &chnl->regs, &chnl->port,
+						chnl->fifo, &chnl->vmode);
+
+	chnl->transactionid_regs = chnl->transactionid;
+}
+
+static void chnl_update_continous(struct mcde_chnl_state *chnl)
+{
+	if (!chnl->continous_running) {
+		if (chnl->transactionid_regs < chnl->transactionid)
+			chnl_update_registers(chnl);
+		if (chnl->port.sync_src == MCDE_SYNCSRC_TE0)
+			mcde_wfld(MCDE_CRC, SYCEN0, true);
+		else if (chnl->port.sync_src == MCDE_SYNCSRC_TE1) {
+			if (hardware_version == MCDE_CHIP_VERSION_3_0_8)
+				mcde_wfld(MCDE_VSCRC1, VSSEL, 1);
+
+			mcde_wfld(MCDE_CRC, SYCEN1, true);
+		}
+		chnl->continous_running = true;
+
+		/*
+		* For main and secondary display,
+		* FLOWEN has to be set before a SOFTWARE TRIG
+		* Otherwise not overlay interrupt is triggerd
+		*/
+		enable_channel(chnl);
+
+		if (chnl->port.type == MCDE_PORTTYPE_DSI &&
+				chnl->port.sync_src == MCDE_SYNCSRC_OFF) {
+			chnl->disable_software_trig = false;
+			if (hardware_version == MCDE_CHIP_VERSION_3_0_8) {
+				mcde_wreg(MCDE_CHNL0SYNCHSW +
+				chnl->id * MCDE_CHNL0SYNCHSW_GROUPOFFSET,
+					MCDE_CHNL0SYNCHSW_SW_TRIG(true));
+				disable_flow(chnl);
+			}
+			mod_timer(&chnl->auto_sync_timer,
+					jiffies +
+			msecs_to_jiffies(MCDE_AUTO_SYNC_WATCHDOG * 1000));
+		}
+	}
+}
+
+static void chnl_update_non_continous(struct mcde_chnl_state *chnl)
+{
+	/* Commit settings to registers */
+	wait_for_channel(chnl);
+	if (chnl->transactionid_regs < chnl->transactionid)
+		chnl_update_registers(chnl);
+
+	/* TODO: look at port sync source and synched_update */
+	if (chnl->regs.synchronized_update &&
+			chnl->power_mode == MCDE_DISPLAY_PM_ON) {
+		if (chnl->port.type == MCDE_PORTTYPE_DSI &&
+			chnl->port.sync_src == MCDE_SYNCSRC_BTA) {
+			if (hardware_version == MCDE_CHIP_VERSION_3_0_8)
+				enable_channel(chnl);
+			while (dsi_rfld(chnl->port.link, DSI_CMD_MODE_STS,
+				CSM_RUNNING)) {
+				cpu_relax();
+				udelay(100);
+			}
+			dsi_te_request(chnl);
+		}
+	} else {
+		do_softwaretrig(chnl);
+		dev_vdbg(&mcde_dev->dev, "Channel update (no sync), chnl=%d\n",
+			chnl->id);
+	}
+
+}
+
+static void chnl_update_overlay(struct mcde_chnl_state *chnl,
+						struct mcde_ovly_state *ovly)
+{
+	if (!ovly || (ovly->transactionid_regs >= ovly->transactionid &&
+			chnl->transactionid_regs >= chnl->transactionid))
+		return;
+
+	update_overlay_address_registers(ovly->idx, &ovly->regs);
+	if (ovly->regs.reset_buf_id) {
+		if (!chnl->continous_running)
+			wait_for_overlay(ovly);
+
+		update_overlay_registers(ovly->idx, &ovly->regs, &chnl->port,
+			chnl->fifo, chnl->regs.x, chnl->regs.y,
+			chnl->regs.ppl, chnl->regs.lpf, ovly->stride,
+			chnl->vmode.interlaced, chnl->rotation);
+		ovly->transactionid_regs = ovly->transactionid;
+	} else if (chnl->continous_running) {
+		ovly->transactionid_regs = ovly->transactionid;
+		wait_for_overlay(ovly);
+	}
+}
+
+static int _mcde_chnl_update(struct mcde_chnl_state *chnl,
+					struct mcde_rectangle *update_area)
+{
+	dev_vdbg(&mcde_dev->dev, "%s\n", __func__);
+
+	/* TODO: lock & make wait->trig async */
+	if (!chnl->enabled || !update_area
+			|| (update_area->w == 0 && update_area->h == 0)) {
+		return -EINVAL;
+	}
+
+	chnl->regs.x   = update_area->x;
+	chnl->regs.y   = update_area->y;
+	/* TODO Crop against video_mode.xres and video_mode.yres */
+	chnl->regs.ppl = update_area->w;
+	chnl->regs.lpf = update_area->h;
+	if (chnl->port.type == MCDE_PORTTYPE_DPI &&
+						chnl->port.phy.dpi.tv_mode) {
+		/* subtract border */
+		chnl->regs.ppl -= chnl->tv_regs.dho + chnl->tv_regs.alw;
+		/* subtract double borders, ie. for both fields */
+		chnl->regs.lpf -= 2 * (chnl->tv_regs.dvo + chnl->tv_regs.bsl);
+	} else if (chnl->port.type == MCDE_PORTTYPE_DSI &&
+			chnl->vmode.interlaced)
+		chnl->regs.lpf /= 2;
+
+	chnl_update_overlay(chnl, chnl->ovly0);
+	chnl_update_overlay(chnl, chnl->ovly1);
+
+	if (chnl->port.update_auto_trig)
+		chnl_update_continous(chnl);
+	else
+		chnl_update_non_continous(chnl);
+
+	dev_vdbg(&mcde_dev->dev, "Channel updated, chnl=%d\n", chnl->id);
+	return 0;
+}
+
+/* API entry points */
+/* MCDE channels */
+struct mcde_chnl_state *mcde_chnl_get(enum mcde_chnl chnl_id,
+			enum mcde_fifo fifo, const struct mcde_port *port)
+{
+	struct mcde_chnl_state *chnl;
+
+	dev_vdbg(&mcde_dev->dev, "%s\n", __func__);
+	chnl = _mcde_chnl_get(chnl_id, fifo, port);
+	dev_vdbg(&mcde_dev->dev, "%s exit\n", __func__);
+
+	return chnl;
+}
+
+int mcde_chnl_set_pixel_format(struct mcde_chnl_state *chnl,
+					enum mcde_port_pix_fmt pix_fmt)
+{
+	dev_vdbg(&mcde_dev->dev, "%s\n", __func__);
+
+	if (!chnl->reserved)
+		return -EINVAL;
+	chnl->pix_fmt = pix_fmt;
+
+	dev_vdbg(&mcde_dev->dev, "%s exit\n", __func__);
+
+	return 0;
+}
+
+int mcde_chnl_set_palette(struct mcde_chnl_state *chnl,
+					struct mcde_palette_table *palette)
+{
+	dev_vdbg(&mcde_dev->dev, "%s\n", __func__);
+
+	if (!chnl->reserved)
+		return -EINVAL;
+	if (palette != NULL) {
+		chnl->map_r = palette->map_col_ch0;
+		chnl->map_g = palette->map_col_ch1;
+		chnl->map_b = palette->map_col_ch2;
+		chnl->palette_enable = true;
+	} else {
+		chnl->map_r = NULL;
+		chnl->map_g = NULL;
+		chnl->map_b = NULL;
+		chnl->palette_enable = false;
+	}
+
+	dev_vdbg(&mcde_dev->dev, "%s exit\n", __func__);
+	return 0;
+}
+
+void mcde_chnl_set_col_convert(struct mcde_chnl_state *chnl,
+					struct mcde_col_convert *col_convert)
+{
+	dev_vdbg(&mcde_dev->dev, "%s\n", __func__);
+
+	chnl->col_regs.y_red     = col_convert->matrix[0][0];
+	chnl->col_regs.y_green   = col_convert->matrix[0][1];
+	chnl->col_regs.y_blue    = col_convert->matrix[0][2];
+	chnl->col_regs.cb_red    = col_convert->matrix[1][0];
+	chnl->col_regs.cb_green  = col_convert->matrix[1][1];
+	chnl->col_regs.cb_blue   = col_convert->matrix[1][2];
+	chnl->col_regs.cr_red    = col_convert->matrix[2][0];
+	chnl->col_regs.cr_green  = col_convert->matrix[2][1];
+	chnl->col_regs.cr_blue   = col_convert->matrix[2][2];
+	chnl->col_regs.off_red   = col_convert->offset[0];
+	chnl->col_regs.off_green = col_convert->offset[1];
+	chnl->col_regs.off_blue  = col_convert->offset[2];
+
+	dev_vdbg(&mcde_dev->dev, "%s exit\n", __func__);
+}
+
+int mcde_chnl_set_video_mode(struct mcde_chnl_state *chnl,
+					struct mcde_video_mode *vmode)
+{
+	dev_vdbg(&mcde_dev->dev, "%s\n", __func__);
+
+	if (chnl == NULL || vmode == NULL)
+		return -EINVAL;
+
+	chnl->vmode = *vmode;
+
+	dev_vdbg(&mcde_dev->dev, "%s exit\n", __func__);
+
+	return 0;
+}
+EXPORT_SYMBOL(mcde_chnl_set_video_mode);
+
+int mcde_chnl_set_rotation(struct mcde_chnl_state *chnl,
+		enum mcde_display_rotation rotation, u32 rotbuf1, u32 rotbuf2)
+{
+	dev_vdbg(&mcde_dev->dev, "%s\n", __func__);
+
+	if (!chnl->reserved)
+		return -EINVAL;
+
+	if (chnl->id != MCDE_CHNL_A && chnl->id != MCDE_CHNL_B)
+		return -EINVAL;
+
+	chnl->rotation = rotation;
+	chnl->rotbuf1  = rotbuf1;
+	chnl->rotbuf2  = rotbuf2;
+
+	dev_vdbg(&mcde_dev->dev, "%s exit\n", __func__);
+
+	return 0;
+}
+
+int mcde_chnl_enable_synchronized_update(struct mcde_chnl_state *chnl,
+								bool enable)
+{
+	dev_vdbg(&mcde_dev->dev, "%s\n", __func__);
+	if (!chnl->reserved)
+		return -EINVAL;
+
+	chnl->synchronized_update = enable;
+
+	dev_vdbg(&mcde_dev->dev, "%s exit\n", __func__);
+
+	return 0;
+}
+
+int mcde_chnl_set_power_mode(struct mcde_chnl_state *chnl,
+				enum mcde_display_power_mode power_mode)
+{
+	dev_vdbg(&mcde_dev->dev, "%s\n", __func__);
+
+	if (!chnl->reserved)
+		return -EINVAL;
+
+	chnl->power_mode = power_mode;
+
+	dev_vdbg(&mcde_dev->dev, "%s exit\n", __func__);
+
+	return 0;
+}
+
+int mcde_chnl_apply(struct mcde_chnl_state *chnl)
+{
+	int ret ;
+
+	dev_vdbg(&mcde_dev->dev, "%s\n", __func__);
+
+	if (!chnl->reserved)
+		return -EINVAL;
+
+	mutex_lock(&mcde_hw_lock);
+	ret = _mcde_chnl_apply(chnl);
+	mutex_unlock(&mcde_hw_lock);
+
+	dev_vdbg(&mcde_dev->dev, "%s exit with ret %d\n", __func__, ret);
+
+	return ret;
+}
+
+int mcde_chnl_update(struct mcde_chnl_state *chnl,
+					struct mcde_rectangle *update_area)
+{
+	int ret;
+
+	dev_vdbg(&mcde_dev->dev, "%s\n", __func__);
+
+	if (!chnl->reserved)
+		return -EINVAL;
+
+	mutex_lock(&mcde_hw_lock);
+	enable_mcde_hw();
+	if (!chnl->formatter_updated)
+		(void)update_channel_static_registers(chnl);
+	ret = _mcde_chnl_update(chnl, update_area);
+	mutex_unlock(&mcde_hw_lock);
+
+	dev_vdbg(&mcde_dev->dev, "%s exit with ret %d\n", __func__, ret);
+
+	return ret;
+}
+
+void mcde_chnl_put(struct mcde_chnl_state *chnl)
+{
+	dev_vdbg(&mcde_dev->dev, "%s\n", __func__);
+
+	chnl->reserved = false;
+
+	dev_vdbg(&mcde_dev->dev, "%s exit\n", __func__);
+}
+
+void mcde_chnl_stop_flow(struct mcde_chnl_state *chnl)
+{
+	dev_vdbg(&mcde_dev->dev, "%s\n", __func__);
+
+	mutex_lock(&mcde_hw_lock);
+	if (mcde_is_enabled && chnl->enabled)
+		disable_channel(chnl);
+	mutex_unlock(&mcde_hw_lock);
+
+	dev_vdbg(&mcde_dev->dev, "%s exit\n", __func__);
+}
+
+void mcde_chnl_enable(struct mcde_chnl_state *chnl)
+{
+	dev_vdbg(&mcde_dev->dev, "%s\n", __func__);
+
+	mutex_lock(&mcde_hw_lock);
+	chnl->enabled = true;
+	mutex_unlock(&mcde_hw_lock);
+
+	dev_vdbg(&mcde_dev->dev, "%s exit\n", __func__);
+}
+
+void mcde_chnl_disable(struct mcde_chnl_state *chnl)
+{
+	dev_vdbg(&mcde_dev->dev, "%s\n", __func__);
+
+	mutex_lock(&mcde_hw_lock);
+	cancel_delayed_work(&hw_timeout_work);
+	if (!chnl->enabled)
+		return;
+	chnl->enabled = false;
+	if (mcde_is_enabled && chnl->formatter_updated
+				&& chnl->port.type == MCDE_PORTTYPE_DSI) {
+		u8 counter = 10;
+		/*
+		* Wait for CSM_RUNNING,
+		* all data sent for display
+		*/
+		while (dsi_rfld(chnl->port.link,
+			DSI_CMD_MODE_STS, CSM_RUNNING)
+					&& counter--) {
+			cpu_relax();
+			udelay(100);
+		}
+	}
+	(void)disable_mcde_hw(false);
+	mutex_unlock(&mcde_hw_lock);
+
+	dev_vdbg(&mcde_dev->dev, "%s exit\n", __func__);
+}
+
+/* MCDE overlays */
+struct mcde_ovly_state *mcde_ovly_get(struct mcde_chnl_state *chnl)
+{
+	struct mcde_ovly_state *ovly;
+
+	if (!chnl->reserved)
+		return ERR_PTR(-EINVAL);
+
+	if (!chnl->ovly0->inuse)
+		ovly = chnl->ovly0;
+	else if (chnl->ovly1 && !chnl->ovly1->inuse)
+		ovly = chnl->ovly1;
+	else
+		ovly = ERR_PTR(-EBUSY);
+
+	if (!IS_ERR(ovly)) {
+		ovly->inuse = true;
+		ovly->paddr = 0;
+		ovly->stride = 0;
+		ovly->pix_fmt = MCDE_OVLYPIXFMT_RGB565;
+		ovly->src_x = 0;
+		ovly->src_y = 0;
+		ovly->dst_x = 0;
+		ovly->dst_y = 0;
+		ovly->dst_z = 0;
+		ovly->w = 0;
+		ovly->h = 0;
+		ovly->alpha_value = 0xFF;
+		ovly->alpha_source = MCDE_OVL1CONF2_BP_PER_PIXEL_ALPHA;
+		mcde_ovly_apply(ovly);
+	}
+
+	return ovly;
+}
+
+void mcde_ovly_put(struct mcde_ovly_state *ovly)
+{
+	if (!ovly->inuse)
+		return;
+	if (ovly->regs.enabled) {
+		ovly->paddr = 0;
+		mcde_ovly_apply(ovly);/* REVIEW: API call calling API call! */
+	}
+	ovly->inuse = false;
+}
+
+void mcde_ovly_set_source_buf(struct mcde_ovly_state *ovly, u32 paddr)
+{
+	if (!ovly->inuse)
+		return;
+
+	ovly->paddr = paddr;
+}
+
+void mcde_ovly_set_source_info(struct mcde_ovly_state *ovly,
+	u32 stride, enum mcde_ovly_pix_fmt pix_fmt)
+{
+	if (!ovly->inuse)
+		return;
+
+	ovly->stride = stride;
+	ovly->pix_fmt = pix_fmt;
+}
+
+void mcde_ovly_set_source_area(struct mcde_ovly_state *ovly,
+	u16 x, u16 y, u16 w, u16 h)
+{
+	if (!ovly->inuse)
+		return;
+
+	ovly->src_x = x;
+	ovly->src_y = y;
+	ovly->w = w;
+	ovly->h = h;
+}
+
+void mcde_ovly_set_dest_pos(struct mcde_ovly_state *ovly, u16 x, u16 y, u8 z)
+{
+	if (!ovly->inuse)
+		return;
+
+	ovly->dst_x = x;
+	ovly->dst_y = y;
+	ovly->dst_z = z;
+}
+
+void mcde_ovly_apply(struct mcde_ovly_state *ovly)
+{
+	if (!ovly->inuse)
+		return;
+
+	mutex_lock(&mcde_hw_lock);
+
+	ovly->regs.ch_id = ovly->chnl->id;
+	ovly->regs.enabled = ovly->paddr != 0;
+	ovly->regs.baseaddress0 = ovly->paddr;
+	ovly->regs.baseaddress1 = ovly->regs.baseaddress0 + ovly->stride;
+	/*TODO set to true if interlaced *//* REVIEW: Video mode interlaced? */
+	ovly->regs.reset_buf_id = !ovly->chnl->continous_running;
+	switch (ovly->pix_fmt) {/* REVIEW: Extract to table */
+	case MCDE_OVLYPIXFMT_RGB565:
+		ovly->regs.bits_per_pixel = 16;
+		ovly->regs.bpp = MCDE_EXTSRC0CONF_BPP_RGB565;
+		ovly->regs.bgr = false;
+		ovly->regs.bebo = false;
+		ovly->regs.opq = true;
+		break;
+	case MCDE_OVLYPIXFMT_RGBA5551:
+		ovly->regs.bits_per_pixel = 16;
+		ovly->regs.bpp = MCDE_EXTSRC0CONF_BPP_IRGB1555;
+		ovly->regs.bgr = false;
+		ovly->regs.bebo = false;
+		ovly->regs.opq = false;
+		break;
+	case MCDE_OVLYPIXFMT_RGBA4444:
+		ovly->regs.bits_per_pixel = 16;
+		ovly->regs.bpp = MCDE_EXTSRC0CONF_BPP_ARGB4444;
+		ovly->regs.bgr = false;
+		ovly->regs.bebo = false;
+		ovly->regs.opq = false;
+		break;
+	case MCDE_OVLYPIXFMT_RGB888:
+		ovly->regs.bits_per_pixel = 24;
+		ovly->regs.bpp = MCDE_EXTSRC0CONF_BPP_RGB888;
+		ovly->regs.bgr = false;
+		ovly->regs.bebo = false;
+		ovly->regs.opq = true;
+		break;
+	case MCDE_OVLYPIXFMT_RGBX8888:
+		ovly->regs.bits_per_pixel = 32;
+		ovly->regs.bpp = MCDE_EXTSRC0CONF_BPP_XRGB8888;
+		ovly->regs.bgr = false;
+		ovly->regs.bebo = true;
+		ovly->regs.opq = true;
+		break;
+	case MCDE_OVLYPIXFMT_RGBA8888:
+		ovly->regs.bits_per_pixel = 32;
+		ovly->regs.bpp = MCDE_EXTSRC0CONF_BPP_ARGB8888;
+		ovly->regs.bgr = false;
+		ovly->regs.bebo = false;
+		ovly->regs.opq = false;
+		break;
+	case MCDE_OVLYPIXFMT_YCbCr422:
+		ovly->regs.bits_per_pixel = 16;
+		ovly->regs.bpp = MCDE_EXTSRC0CONF_BPP_YCBCR422;
+		ovly->regs.bgr = false;
+		ovly->regs.bebo = false;
+		ovly->regs.opq = true;
+		break;
+	default:
+		break;
+	}
+
+	ovly->regs.ppl = ovly->w;
+	ovly->regs.lpf = ovly->h;
+	ovly->regs.cropx = ovly->src_x;
+	ovly->regs.cropy = ovly->src_y;
+	ovly->regs.xpos = ovly->dst_x;
+	ovly->regs.ypos = ovly->dst_y;
+	ovly->regs.z = ovly->dst_z > 0; /* 0 or 1 */
+	ovly->regs.col_conv = MCDE_OVL0CR_COLCCTRL_DISABLED;
+	ovly->regs.alpha_source = ovly->alpha_source;
+	ovly->regs.alpha_value = ovly->alpha_value;
+
+	if (ovly->regs.enabled)
+		ovly->transactionid = ++ovly->chnl->transactionid;
+
+	mutex_unlock(&mcde_hw_lock);
+
+	dev_vdbg(&mcde_dev->dev, "Overlay applied, chnl=%d\n", ovly->chnl->id);
+}
+
+static int init_clocks_and_power(struct platform_device *pdev)
+{
+	int ret = 0;
+	struct mcde_platform_data *pdata = pdev->dev.platform_data;
+
+#ifdef CONFIG_REGULATOR
+	if (pdata->regulator_mcde_epod_id) {
+		regulator_mcde_epod = regulator_get(&pdev->dev,
+				pdata->regulator_mcde_epod_id);
+		if (IS_ERR(regulator_mcde_epod)) {
+			ret = PTR_ERR(regulator_mcde_epod);
+			dev_warn(&pdev->dev,
+				"%s: Failed to get regulator '%s'\n",
+				__func__, pdata->regulator_mcde_epod_id);
+			regulator_mcde_epod = NULL;
+			return ret;
+		}
+	} else {
+		dev_dbg(&pdev->dev, "%s: No regulator id supplied\n",
+								__func__);
+		return -EINVAL;
+	}
+
+	if (pdata->regulator_esram_epod_id) {
+		regulator_esram_epod = regulator_get(&pdev->dev,
+				pdata->regulator_esram_epod_id);
+		if (IS_ERR(regulator_esram_epod)) {
+			ret = PTR_ERR(regulator_esram_epod);
+			dev_warn(&pdev->dev,
+				"%s: Failed to get regulator '%s'\n",
+				__func__, pdata->regulator_esram_epod_id);
+			regulator_esram_epod = NULL;
+			goto regulator_esram_err;
+		}
+	} else {
+		dev_dbg(&pdev->dev, "%s: No regulator id supplied\n",
+								__func__);
+	}
+
+	if (pdata->regulator_vana_id) {
+		regulator_vana = regulator_get(&pdev->dev,
+				pdata->regulator_vana_id);
+		if (IS_ERR(regulator_vana)) {
+			ret = PTR_ERR(regulator_vana);
+			dev_warn(&pdev->dev,
+				"%s: Failed to get regulator '%s'\n",
+				__func__, pdata->regulator_vana_id);
+			regulator_vana = NULL;
+			goto regulator_vana_err;
+		}
+	} else {
+		dev_dbg(&pdev->dev, "%s: No regulator id supplied\n",
+								__func__);
+		ret = -EINVAL;
+		goto regulator_vana_err;
+	}
+#endif
+
+	clock_dsi = clk_get(&pdev->dev, pdata->clock_dsi_id);
+	if (IS_ERR(clock_dsi)) {
+		ret = PTR_ERR(clock_dsi);
+		dev_warn(&pdev->dev, "%s: Failed to get clock '%s'\n",
+					__func__, pdata->clock_dsi_id);
+		goto clk_dsi_err;
+	}
+
+	clock_dsi_lp = clk_get(&pdev->dev, pdata->clock_dsi_lp_id);
+	if (IS_ERR(clock_dsi_lp)) {
+		ret = PTR_ERR(clock_dsi_lp);
+		dev_warn(&pdev->dev, "%s: Failed to get clock '%s'\n",
+					__func__, pdata->clock_dsi_lp_id);
+		goto clk_dsi_lp_err;
+	}
+
+	clock_dpi = clk_get(&pdev->dev, pdata->clock_dpi_id);
+	if (IS_ERR(clock_dpi)) {
+		ret = PTR_ERR(clock_dpi);
+		dev_warn(&pdev->dev, "%s: Failed to get clock '%s'\n",
+					__func__, pdata->clock_dpi_id);
+		goto clk_dpi_err;
+	}
+
+	clock_mcde = clk_get(&pdev->dev, pdata->clock_mcde_id);
+	if (IS_ERR(clock_mcde)) {
+		ret = PTR_ERR(clock_mcde);
+		dev_warn(&pdev->dev, "%s: Failed to get clock '%s'\n",
+					__func__, pdata->clock_mcde_id);
+		goto clk_mcde_err;
+	}
+
+	return ret;
+
+clk_mcde_err:
+	clk_put(clock_dpi);
+clk_dpi_err:
+	clk_put(clock_dsi_lp);
+clk_dsi_lp_err:
+	clk_put(clock_dsi);
+clk_dsi_err:
+#ifdef CONFIG_REGULATOR
+	if (regulator_vana)
+		regulator_put(regulator_vana);
+regulator_vana_err:
+	if (regulator_esram_epod)
+		regulator_put(regulator_esram_epod);
+regulator_esram_err:
+	if (regulator_mcde_epod)
+		regulator_put(regulator_mcde_epod);
+#endif
+	return ret;
+}
+
+static void remove_clocks_and_power(struct platform_device *pdev)
+{
+	/* REVIEW: Release only if exist */
+	/* REVIEW: Remove make sure MCDE is done */
+	clk_put(clock_dpi);
+	clk_put(clock_dsi_lp);
+	clk_put(clock_dsi);
+	clk_put(clock_mcde);
+#ifdef CONFIG_REGULATOR
+	if (regulator_vana)
+		regulator_put(regulator_vana);
+	if (regulator_mcde_epod)
+		regulator_put(regulator_mcde_epod);
+	if (regulator_esram_epod)
+		regulator_put(regulator_esram_epod);
+#endif
+}
+
+static int __devinit mcde_probe(struct platform_device *pdev)
+{
+	int ret = 0;
+	int i;
+	struct resource *res;
+	struct mcde_platform_data *pdata = pdev->dev.platform_data;
+	u8 major_version;
+	u8 minor_version;
+	u8 development_version;
+
+	if (!pdata) {
+		dev_dbg(&pdev->dev, "No platform data\n");
+		return -EINVAL;
+	}
+
+	num_dsilinks = pdata->num_dsilinks;
+	mcde_dev = pdev;
+
+	num_channels = pdata->num_channels;
+	num_overlays = pdata->num_overlays;
+
+	channels = kzalloc(num_channels * sizeof(struct mcde_chnl_state),
+								GFP_KERNEL);
+	if (!channels) {
+		ret = -ENOMEM;
+		goto failed_channels_alloc;
+	}
+
+	overlays = kzalloc(num_overlays * sizeof(struct mcde_ovly_state),
+								GFP_KERNEL);
+	if (!overlays) {
+		ret = -ENOMEM;
+		goto failed_overlays_alloc;
+	}
+
+	dsiio = kzalloc(num_dsilinks * sizeof(*dsiio), GFP_KERNEL);
+	if (!dsiio) {
+		ret = -ENOMEM;
+		goto failed_dsi_alloc;
+	}
+
+	/* Hook up irq */
+	mcde_irq = platform_get_irq(pdev, 0);
+	if (mcde_irq <= 0) {
+		dev_dbg(&pdev->dev, "No irq defined\n");
+		ret = -EINVAL;
+		goto failed_irq_get;
+	}
+
+	/* Map I/O */
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	if (!res) {
+		dev_dbg(&pdev->dev, "No MCDE io defined\n");
+		ret = -EINVAL;
+		goto failed_get_mcde_io;
+	}
+	mcdeio = ioremap(res->start, res->end - res->start + 1);
+	if (!mcdeio) {
+		dev_dbg(&pdev->dev, "MCDE iomap failed\n");
+		ret = -EINVAL;
+		goto failed_map_mcde_io;
+	}
+	dev_info(&pdev->dev, "MCDE iomap: 0x%.8X->0x%.8X\n",
+		(u32)res->start, (u32)mcdeio);
+	for (i = 0; i < num_dsilinks; i++) {
+		res = platform_get_resource(pdev, IORESOURCE_MEM, 1+i);
+		if (!res) {
+			dev_dbg(&pdev->dev, "No DSI%d io defined\n", i);
+			ret = -EINVAL;
+			goto failed_get_dsi_io;
+		}
+		dsiio[i] = ioremap(res->start, res->end - res->start + 1);
+		if (!dsiio[i]) {
+			dev_dbg(&pdev->dev, "MCDE DSI%d iomap failed\n", i);
+			ret = -EINVAL;
+			goto failed_map_dsi_io;
+		}
+		dev_info(&pdev->dev, "MCDE DSI%d iomap: 0x%.8X->0x%.8X\n",
+			i, (u32)res->start, (u32)dsiio[i]);
+	}
+
+	ret = init_clocks_and_power(pdev);
+	if (ret < 0) {
+		dev_warn(&pdev->dev, "%s: init_clocks_and_power failed\n"
+					, __func__);
+		goto failed_init_clocks;
+	}
+
+	INIT_DELAYED_WORK_DEFERRABLE(&hw_timeout_work, work_sleep_function);
+
+	ret = enable_clocks_and_power(mcde_dev);
+	if (ret < 0) {
+		dev_dbg(&mcde_dev->dev,
+			"%s: Enable clocks and power failed\n"
+						, __func__);
+		goto failed_enable_clocks;
+	}
+
+	update_mcde_registers();
+	mcde_is_enabled = true;
+
+	ret = request_irq(mcde_irq, mcde_irq_handler, 0, "mcde",
+							&mcde_dev->dev);
+	if (ret) {
+		dev_dbg(&mcde_dev->dev, "Failed to request irq (irq=%d)\n",
+								mcde_irq);
+		goto failed_request_irq;
+	}
+
+	schedule_delayed_work(&hw_timeout_work,
+					msecs_to_jiffies(MCDE_SLEEP_WATCHDOG));
+
+
+	major_version = MCDE_REG2VAL(MCDE_PID, MAJOR_VERSION,
+							mcde_rreg(MCDE_PID));
+	minor_version = MCDE_REG2VAL(MCDE_PID, MINOR_VERSION,
+							mcde_rreg(MCDE_PID));
+	development_version = MCDE_REG2VAL(MCDE_PID, DEVELOPMENT_VERSION,
+							mcde_rreg(MCDE_PID));
+
+	dev_info(&mcde_dev->dev, "MCDE HW revision %u.%u.%u.%u\n",
+			major_version, minor_version, development_version,
+					mcde_rfld(MCDE_PID, METALFIX_VERSION));
+
+	if (major_version == 3 && minor_version == 0 &&
+					development_version >= 8) {
+		hardware_version = MCDE_CHIP_VERSION_3_0_8;
+		dev_info(&mcde_dev->dev, "V2 HW\n");
+	} else if (major_version == 3 && minor_version == 0 &&
+					development_version >= 5) {
+		hardware_version = MCDE_CHIP_VERSION_3_0_5;
+		dev_info(&mcde_dev->dev, "V1 HW\n");
+	} else if (major_version == 1 && minor_version == 0 &&
+					development_version >= 4) {
+		hardware_version = MCDE_CHIP_VERSION_1_0_4;
+		mcde_dynamic_power_management = false;
+		dev_info(&mcde_dev->dev, "V1_U5500 HW\n");
+	} else {
+		dev_err(&mcde_dev->dev, "Unsupported HW version\n");
+		ret = -ENOTSUPP;
+		goto failed_hardware_version;
+	}
+
+
+	for (i = 0; i < num_overlays; i++)
+		overlays[i].idx = i;
+
+	if (hardware_version == MCDE_CHIP_VERSION_1_0_4) {
+		channels[0].ovly0 = &overlays[0];
+		channels[0].ovly1 = &overlays[1];
+		channels[1].ovly0 = &overlays[2];
+		channels[1].ovly1 = NULL;
+	} else {
+		channels[0].ovly0 = &overlays[0];
+		channels[0].ovly1 = &overlays[1];
+		channels[1].ovly0 = &overlays[2];
+		channels[1].ovly1 = &overlays[3];
+		channels[2].ovly0 = &overlays[4];
+		channels[2].ovly1 = NULL;
+		channels[3].ovly0 = &overlays[5];
+		channels[3].ovly1 = NULL;
+	}
+
+	for (i = 0; i < num_channels; i++) {
+		channels[i].id = i;
+
+		channels[i].ovly0->chnl = &channels[i];
+		if (channels[i].ovly1)
+			channels[i].ovly1->chnl = &channels[i];
+
+		init_waitqueue_head(&channels[i].waitq_hw);
+		init_timer(&channels[i].auto_sync_timer);
+		channels[i].auto_sync_timer.function =
+					watchdog_auto_sync_timer_function;
+		init_timer(&channels[i].dsi_te_timer);
+		channels[i].dsi_te_timer.function =
+					dsi_te_timer_function;
+		channels[i].dsi_te_timer.data = i;
+	}
+
+	for (i = 0; i < num_overlays; i++)
+		init_waitqueue_head(&overlays[i].waitq_hw);
+
+	return 0;
+
+failed_hardware_version:
+	free_irq(mcde_irq, &pdev->dev);
+failed_request_irq:
+	disable_mcde_hw(true);
+failed_enable_clocks:
+	remove_clocks_and_power(pdev);
+failed_init_clocks:
+failed_map_dsi_io:
+failed_get_dsi_io:
+	for (i = 0; i < num_dsilinks; i++) {
+		if (dsiio[i])
+			iounmap(dsiio[i]);
+	}
+	iounmap(mcdeio);
+failed_map_mcde_io:
+failed_get_mcde_io:
+failed_irq_get:
+	kfree(dsiio);
+	dsiio = NULL;
+failed_dsi_alloc:
+	kfree(overlays);
+	overlays = NULL;
+failed_overlays_alloc:
+	kfree(channels);
+	channels = NULL;
+failed_channels_alloc:
+	return ret;
+}
+
+
+static int __devexit mcde_remove(struct platform_device *pdev)
+{
+	struct mcde_chnl_state *chnl = &channels[0];
+
+	for (; chnl < &channels[num_channels]; chnl++) {
+		if (del_timer(&chnl->auto_sync_timer))
+			dev_vdbg(&mcde_dev->dev,
+				"%s timer could not be stopped\n"
+				, __func__);
+		if (del_timer(&chnl->dsi_te_timer))
+			dev_vdbg(&mcde_dev->dev,
+				"%s dsi timer could not be stopped\n"
+				, __func__);
+	}
+
+	remove_clocks_and_power(pdev);
+	return 0;
+}
+
+#if !defined(CONFIG_HAS_EARLYSUSPEND) && defined(CONFIG_PM)
+static int mcde_resume(struct platform_device *pdev)
+{
+	dev_vdbg(&mcde_dev->dev, "%s\n", __func__);
+
+	mutex_lock(&mcde_hw_lock);
+
+	if (enable_mcde_hw()) {
+		mutex_unlock(&mcde_hw_lock);
+		return -EINVAL;
+	}
+
+	mutex_unlock(&mcde_hw_lock);
+	return 0;
+}
+
+static int mcde_suspend(struct platform_device *pdev, pm_message_t state)
+{
+	int ret;
+
+	dev_vdbg(&mcde_dev->dev, "%s\n", __func__);
+
+	mutex_lock(&mcde_hw_lock);
+
+	cancel_delayed_work(&hw_timeout_work);
+
+	if (!mcde_is_enabled) {
+		mutex_unlock(&mcde_hw_lock);
+		return 0;
+	}
+	(void)disable_mcde_hw(true);
+
+	mutex_unlock(&mcde_hw_lock);
+
+	return ret;
+}
+#endif
+
+static struct platform_driver mcde_driver = {
+	.probe = mcde_probe,
+	.remove = mcde_remove,
+#if !defined(CONFIG_HAS_EARLYSUSPEND) && defined(CONFIG_PM)
+	.suspend = mcde_suspend,
+	.resume = mcde_resume,
+#else
+	.suspend = NULL,
+	.resume = NULL,
+#endif
+	.driver = {
+		.name	= "mcde",
+	},
+};
+
+int __init mcde_init(void)
+{
+	mutex_init(&mcde_hw_lock);
+
+	return platform_driver_register(&mcde_driver);
+}
+
+void mcde_exit(void)
+{
+	/* REVIEW: shutdown MCDE? */
+	platform_driver_unregister(&mcde_driver);
+}
diff --git a/drivers/video/mcde/mcde_mod.c b/drivers/video/mcde/mcde_mod.c
new file mode 100644
index 00000000000..60df0d4965f
--- /dev/null
+++ b/drivers/video/mcde/mcde_mod.c
@@ -0,0 +1,69 @@
+/*
+ * Copyright (C) ST-Ericsson AB 2010
+ *
+ * ST-Ericsson MCDE driver
+ *
+ * Author: Marcus Lorentzon <marcus.xm.lorentzon@stericsson.com>
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+#include <linux/init.h>
+#include <linux/module.h>
+
+#include <video/mcde.h>
+#include <video/mcde_fb.h>
+#include <video/mcde_dss.h>
+#include <video/mcde_display.h>
+
+/* Module init */
+
+static int __init mcde_subsystem_init(void)
+{
+	int ret;
+	pr_info("MCDE subsystem init begin\n");
+
+	/* MCDE module init sequence */
+	ret = mcde_init();
+	if (ret)
+		goto mcde_failed;
+	ret = mcde_display_init();
+	if (ret)
+		goto mcde_display_failed;
+	ret = mcde_dss_init();
+	if (ret)
+		goto mcde_dss_failed;
+	ret = mcde_fb_init();
+	if (ret)
+		goto mcde_fb_failed;
+	pr_info("MCDE subsystem init done\n");
+
+	goto done;
+mcde_fb_failed:
+	mcde_dss_exit();
+mcde_dss_failed:
+	mcde_display_exit();
+mcde_display_failed:
+	mcde_exit();
+mcde_failed:
+done:
+	return ret;
+}
+#ifdef MODULE
+module_init(mcde_subsystem_init);
+#else
+fs_initcall(mcde_subsystem_init);
+#endif
+
+static void __exit mcde_module_exit(void)
+{
+	mcde_exit();
+	mcde_display_exit();
+	mcde_dss_exit();
+}
+module_exit(mcde_module_exit);
+
+MODULE_AUTHOR("Marcus Lorentzon <marcus.xm.lorentzon@stericsson.com>");
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("ST-Ericsson MCDE driver");
+
diff --git a/drivers/video/mcde/mcde_regs.h b/drivers/video/mcde/mcde_regs.h
new file mode 100644
index 00000000000..7f28c26360b
--- /dev/null
+++ b/drivers/video/mcde/mcde_regs.h
@@ -0,0 +1,5315 @@
+
+#define MCDE_VAL2REG(__reg, __fld, __val) \
+	(((__val) << __reg##_##__fld##_SHIFT) & __reg##_##__fld##_MASK)
+#define MCDE_REG2VAL(__reg, __fld, __val) \
+	(((__val) & __reg##_##__fld##_MASK) >> __reg##_##__fld##_SHIFT)
+
+#define MCDE_CR 0x00000000
+#define MCDE_CR_DSICMD2_EN_V1_SHIFT 0
+#define MCDE_CR_DSICMD2_EN_V1_MASK 0x00000001
+#define MCDE_CR_DSICMD2_EN_V1(__x) \
+	MCDE_VAL2REG(MCDE_CR, DSICMD2_EN_V1, __x)
+#define MCDE_CR_DSICMD1_EN_V1_SHIFT 1
+#define MCDE_CR_DSICMD1_EN_V1_MASK 0x00000002
+#define MCDE_CR_DSICMD1_EN_V1(__x) \
+	MCDE_VAL2REG(MCDE_CR, DSICMD1_EN_V1, __x)
+#define MCDE_CR_DSI0_EN_V3_SHIFT 0
+#define MCDE_CR_DSI0_EN_V3_MASK 0x00000001
+#define MCDE_CR_DSI0_EN_V3(__x) \
+	MCDE_VAL2REG(MCDE_CR, DSI0_EN_V3, __x)
+#define MCDE_CR_DSI1_EN_V3_SHIFT 1
+#define MCDE_CR_DSI1_EN_V3_MASK 0x00000002
+#define MCDE_CR_DSI1_EN_V3(__x) \
+	MCDE_VAL2REG(MCDE_CR, DSI1_EN_V3, __x)
+#define MCDE_CR_DSICMD0_EN_V1_SHIFT 2
+#define MCDE_CR_DSICMD0_EN_V1_MASK 0x00000004
+#define MCDE_CR_DSICMD0_EN_V1(__x) \
+	MCDE_VAL2REG(MCDE_CR, DSICMD0_EN_V1, __x)
+#define MCDE_CR_DSIVID2_EN_V1_SHIFT 3
+#define MCDE_CR_DSIVID2_EN_V1_MASK 0x00000008
+#define MCDE_CR_DSIVID2_EN_V1(__x) \
+	MCDE_VAL2REG(MCDE_CR, DSIVID2_EN_V1, __x)
+#define MCDE_CR_DSIVID1_EN_V1_SHIFT 4
+#define MCDE_CR_DSIVID1_EN_V1_MASK 0x00000010
+#define MCDE_CR_DSIVID1_EN_V1(__x) \
+	MCDE_VAL2REG(MCDE_CR, DSIVID1_EN_V1, __x)
+#define MCDE_CR_DSIVID0_EN_V1_SHIFT 5
+#define MCDE_CR_DSIVID0_EN_V1_MASK 0x00000020
+#define MCDE_CR_DSIVID0_EN_V1(__x) \
+	MCDE_VAL2REG(MCDE_CR, DSIVID0_EN_V1, __x)
+#define MCDE_CR_DBIC1_EN_V1_SHIFT 6
+#define MCDE_CR_DBIC1_EN_V1_MASK 0x00000040
+#define MCDE_CR_DBIC1_EN_V1(__x) \
+	MCDE_VAL2REG(MCDE_CR, DBIC1_EN_V1, __x)
+#define MCDE_CR_DBIC0_EN_V1_SHIFT 7
+#define MCDE_CR_DBIC0_EN_V1_MASK 0x00000080
+#define MCDE_CR_DBIC0_EN_V1(__x) \
+	MCDE_VAL2REG(MCDE_CR, DBIC0_EN_V1, __x)
+#define MCDE_CR_DBI_EN_V3_SHIFT 7
+#define MCDE_CR_DBI_EN_V3_MASK 0x00000080
+#define MCDE_CR_DBI_EN_V3(__x) \
+	MCDE_VAL2REG(MCDE_CR, DBI_EN_V3, __x)
+#define MCDE_CR_DPIB_EN_V1_SHIFT 8
+#define MCDE_CR_DPIB_EN_V1_MASK 0x00000100
+#define MCDE_CR_DPIB_EN_V1(__x) \
+	MCDE_VAL2REG(MCDE_CR, DPIB_EN_V1, __x)
+#define MCDE_CR_DPIA_EN_V1_SHIFT 9
+#define MCDE_CR_DPIA_EN_V1_MASK 0x00000200
+#define MCDE_CR_DPIA_EN_V1(__x) \
+	MCDE_VAL2REG(MCDE_CR, DPIA_EN_V1, __x)
+#define MCDE_CR_DPI_EN_V3_SHIFT 9
+#define MCDE_CR_DPI_EN_V3_MASK 0x00000200
+#define MCDE_CR_DPI_EN_V3(__x) \
+	MCDE_VAL2REG(MCDE_CR, DPI_EN_V3, __x)
+#define MCDE_CR_IFIFOCTRLEN_SHIFT 15
+#define MCDE_CR_IFIFOCTRLEN_MASK 0x00008000
+#define MCDE_CR_IFIFOCTRLEN(__x) \
+	MCDE_VAL2REG(MCDE_CR, IFIFOCTRLEN, __x)
+#define MCDE_CR_F01MUX_V1_SHIFT 16
+#define MCDE_CR_F01MUX_V1_MASK 0x00010000
+#define MCDE_CR_F01MUX_V1(__x) \
+	MCDE_VAL2REG(MCDE_CR, F01MUX_V1, __x)
+#define MCDE_CR_FABMUX_V1_SHIFT 17
+#define MCDE_CR_FABMUX_V1_MASK 0x00020000
+#define MCDE_CR_FABMUX_V1(__x) \
+	MCDE_VAL2REG(MCDE_CR, FABMUX_V1, __x)
+#define MCDE_CR_AUTOCLKG_EN_SHIFT 30
+#define MCDE_CR_AUTOCLKG_EN_MASK 0x40000000
+#define MCDE_CR_AUTOCLKG_EN(__x) \
+	MCDE_VAL2REG(MCDE_CR, AUTOCLKG_EN, __x)
+#define MCDE_CR_MCDEEN_SHIFT 31
+#define MCDE_CR_MCDEEN_MASK 0x80000000
+#define MCDE_CR_MCDEEN(__x) \
+	MCDE_VAL2REG(MCDE_CR, MCDEEN, __x)
+#define MCDE_CONF0 0x00000004
+#define MCDE_CONF0_SYNCMUX0_SHIFT 0
+#define MCDE_CONF0_SYNCMUX0_MASK 0x00000001
+#define MCDE_CONF0_SYNCMUX0(__x) \
+	MCDE_VAL2REG(MCDE_CONF0, SYNCMUX0, __x)
+#define MCDE_CONF0_SYNCMUX1_SHIFT 1
+#define MCDE_CONF0_SYNCMUX1_MASK 0x00000002
+#define MCDE_CONF0_SYNCMUX1(__x) \
+	MCDE_VAL2REG(MCDE_CONF0, SYNCMUX1, __x)
+#define MCDE_CONF0_SYNCMUX2_SHIFT 2
+#define MCDE_CONF0_SYNCMUX2_MASK 0x00000004
+#define MCDE_CONF0_SYNCMUX2(__x) \
+	MCDE_VAL2REG(MCDE_CONF0, SYNCMUX2, __x)
+#define MCDE_CONF0_SYNCMUX3_SHIFT 3
+#define MCDE_CONF0_SYNCMUX3_MASK 0x00000008
+#define MCDE_CONF0_SYNCMUX3(__x) \
+	MCDE_VAL2REG(MCDE_CONF0, SYNCMUX3, __x)
+#define MCDE_CONF0_SYNCMUX4_SHIFT 4
+#define MCDE_CONF0_SYNCMUX4_MASK 0x00000010
+#define MCDE_CONF0_SYNCMUX4(__x) \
+	MCDE_VAL2REG(MCDE_CONF0, SYNCMUX4, __x)
+#define MCDE_CONF0_SYNCMUX5_SHIFT 5
+#define MCDE_CONF0_SYNCMUX5_MASK 0x00000020
+#define MCDE_CONF0_SYNCMUX5(__x) \
+	MCDE_VAL2REG(MCDE_CONF0, SYNCMUX5, __x)
+#define MCDE_CONF0_SYNCMUX6_SHIFT 6
+#define MCDE_CONF0_SYNCMUX6_MASK 0x00000040
+#define MCDE_CONF0_SYNCMUX6(__x) \
+	MCDE_VAL2REG(MCDE_CONF0, SYNCMUX6, __x)
+#define MCDE_CONF0_SYNCMUX7_SHIFT 7
+#define MCDE_CONF0_SYNCMUX7_MASK 0x00000080
+#define MCDE_CONF0_SYNCMUX7(__x) \
+	MCDE_VAL2REG(MCDE_CONF0, SYNCMUX7, __x)
+#define MCDE_CONF0_SWAP_A_C0_V1_SHIFT 8
+#define MCDE_CONF0_SWAP_A_C0_V1_MASK 0x00000100
+#define MCDE_CONF0_SWAP_A_C0_V1(__x) \
+	MCDE_VAL2REG(MCDE_CONF0, SWAP_A_C0_V1, __x)
+#define MCDE_CONF0_SWAP_B_C1_V1_SHIFT 9
+#define MCDE_CONF0_SWAP_B_C1_V1_MASK 0x00000200
+#define MCDE_CONF0_SWAP_B_C1_V1(__x) \
+	MCDE_VAL2REG(MCDE_CONF0, SWAP_B_C1_V1, __x)
+#define MCDE_CONF0_FSYNCTRLA_V1_SHIFT 10
+#define MCDE_CONF0_FSYNCTRLA_V1_MASK 0x00000400
+#define MCDE_CONF0_FSYNCTRLA_V1(__x) \
+	MCDE_VAL2REG(MCDE_CONF0, FSYNCTRLA_V1, __x)
+#define MCDE_CONF0_FSYNCTRLB_V1_SHIFT 11
+#define MCDE_CONF0_FSYNCTRLB_V1_MASK 0x00000800
+#define MCDE_CONF0_FSYNCTRLB_V1(__x) \
+	MCDE_VAL2REG(MCDE_CONF0, FSYNCTRLB_V1, __x)
+#define MCDE_CONF0_IFIFOCTRLWTRMRKLVL_SHIFT 12
+#define MCDE_CONF0_IFIFOCTRLWTRMRKLVL_MASK 0x00007000
+#define MCDE_CONF0_IFIFOCTRLWTRMRKLVL(__x) \
+	MCDE_VAL2REG(MCDE_CONF0, IFIFOCTRLWTRMRKLVL, __x)
+#define MCDE_CONF0_OUTMUX0_SHIFT 16
+#define MCDE_CONF0_OUTMUX0_MASK 0x00070000
+#define MCDE_CONF0_OUTMUX0(__x) \
+	MCDE_VAL2REG(MCDE_CONF0, OUTMUX0, __x)
+#define MCDE_CONF0_OUTMUX1_SHIFT 19
+#define MCDE_CONF0_OUTMUX1_MASK 0x00380000
+#define MCDE_CONF0_OUTMUX1(__x) \
+	MCDE_VAL2REG(MCDE_CONF0, OUTMUX1, __x)
+#define MCDE_CONF0_OUTMUX2_SHIFT 22
+#define MCDE_CONF0_OUTMUX2_MASK 0x01C00000
+#define MCDE_CONF0_OUTMUX2(__x) \
+	MCDE_VAL2REG(MCDE_CONF0, OUTMUX2, __x)
+#define MCDE_CONF0_OUTMUX3_SHIFT 25
+#define MCDE_CONF0_OUTMUX3_MASK 0x0E000000
+#define MCDE_CONF0_OUTMUX3(__x) \
+	MCDE_VAL2REG(MCDE_CONF0, OUTMUX3, __x)
+#define MCDE_CONF0_OUTMUX4_SHIFT 28
+#define MCDE_CONF0_OUTMUX4_MASK 0x70000000
+#define MCDE_CONF0_OUTMUX4(__x) \
+	MCDE_VAL2REG(MCDE_CONF0, OUTMUX4, __x)
+#define MCDE_SSP 0x00000008
+#define MCDE_SSP_SSPDATA_SHIFT 0
+#define MCDE_SSP_SSPDATA_MASK 0x000000FF
+#define MCDE_SSP_SSPDATA(__x) \
+	MCDE_VAL2REG(MCDE_SSP, SSPDATA, __x)
+#define MCDE_SSP_SSPCMD_SHIFT 8
+#define MCDE_SSP_SSPCMD_MASK 0x00000100
+#define MCDE_SSP_SSPCMD_DATA 0
+#define MCDE_SSP_SSPCMD_COMMAND 1
+#define MCDE_SSP_SSPCMD_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_SSP, SSPCMD, MCDE_SSP_SSPCMD_##__x)
+#define MCDE_SSP_SSPCMD(__x) \
+	MCDE_VAL2REG(MCDE_SSP, SSPCMD, __x)
+#define MCDE_SSP_SSPEN_SHIFT 16
+#define MCDE_SSP_SSPEN_MASK 0x00010000
+#define MCDE_SSP_SSPEN(__x) \
+	MCDE_VAL2REG(MCDE_SSP, SSPEN, __x)
+#define MCDE_AIS 0x00000100
+#define MCDE_AIS_MCDEPPI_SHIFT 0
+#define MCDE_AIS_MCDEPPI_MASK 0x00000001
+#define MCDE_AIS_MCDEPPI(__x) \
+	MCDE_VAL2REG(MCDE_AIS, MCDEPPI, __x)
+#define MCDE_AIS_MCDEOVLI_SHIFT 1
+#define MCDE_AIS_MCDEOVLI_MASK 0x00000002
+#define MCDE_AIS_MCDEOVLI(__x) \
+	MCDE_VAL2REG(MCDE_AIS, MCDEOVLI, __x)
+#define MCDE_AIS_MCDECHNLI_SHIFT 2
+#define MCDE_AIS_MCDECHNLI_MASK 0x00000004
+#define MCDE_AIS_MCDECHNLI(__x) \
+	MCDE_VAL2REG(MCDE_AIS, MCDECHNLI, __x)
+#define MCDE_AIS_MCDEERRI_SHIFT 3
+#define MCDE_AIS_MCDEERRI_MASK 0x00000008
+#define MCDE_AIS_MCDEERRI(__x) \
+	MCDE_VAL2REG(MCDE_AIS, MCDEERRI, __x)
+#define MCDE_AIS_DSI0AI_SHIFT 4
+#define MCDE_AIS_DSI0AI_MASK 0x00000010
+#define MCDE_AIS_DSI0AI(__x) \
+	MCDE_VAL2REG(MCDE_AIS, DSI0AI, __x)
+#define MCDE_AIS_DSI1AI_SHIFT 5
+#define MCDE_AIS_DSI1AI_MASK 0x00000020
+#define MCDE_AIS_DSI1AI(__x) \
+	MCDE_VAL2REG(MCDE_AIS, DSI1AI, __x)
+#define MCDE_AIS_DSI2AI_SHIFT 6
+#define MCDE_AIS_DSI2AI_MASK 0x00000040
+#define MCDE_AIS_DSI2AI(__x) \
+	MCDE_VAL2REG(MCDE_AIS, DSI2AI, __x)
+#define MCDE_IMSCPP 0x00000104
+#define MCDE_IMSCPP_VCMPAIM_SHIFT 0
+#define MCDE_IMSCPP_VCMPAIM_MASK 0x00000001
+#define MCDE_IMSCPP_VCMPAIM(__x) \
+	MCDE_VAL2REG(MCDE_IMSCPP, VCMPAIM, __x)
+#define MCDE_IMSCPP_VCMPBIM_SHIFT 1
+#define MCDE_IMSCPP_VCMPBIM_MASK 0x00000002
+#define MCDE_IMSCPP_VCMPBIM(__x) \
+	MCDE_VAL2REG(MCDE_IMSCPP, VCMPBIM, __x)
+#define MCDE_IMSCPP_VSCC0IM_SHIFT 2
+#define MCDE_IMSCPP_VSCC0IM_MASK 0x00000004
+#define MCDE_IMSCPP_VSCC0IM(__x) \
+	MCDE_VAL2REG(MCDE_IMSCPP, VSCC0IM, __x)
+#define MCDE_IMSCPP_VSCC1IM_SHIFT 3
+#define MCDE_IMSCPP_VSCC1IM_MASK 0x00000008
+#define MCDE_IMSCPP_VSCC1IM(__x) \
+	MCDE_VAL2REG(MCDE_IMSCPP, VSCC1IM, __x)
+#define MCDE_IMSCPP_VCMPC0IM_SHIFT 4
+#define MCDE_IMSCPP_VCMPC0IM_MASK 0x00000010
+#define MCDE_IMSCPP_VCMPC0IM(__x) \
+	MCDE_VAL2REG(MCDE_IMSCPP, VCMPC0IM, __x)
+#define MCDE_IMSCPP_VCMPC1IM_SHIFT 5
+#define MCDE_IMSCPP_VCMPC1IM_MASK 0x00000020
+#define MCDE_IMSCPP_VCMPC1IM(__x) \
+	MCDE_VAL2REG(MCDE_IMSCPP, VCMPC1IM, __x)
+#define MCDE_IMSCPP_ROTFDIM_B_SHIFT 6
+#define MCDE_IMSCPP_ROTFDIM_B_MASK 0x00000040
+#define MCDE_IMSCPP_ROTFDIM_B(__x) \
+	MCDE_VAL2REG(MCDE_IMSCPP, ROTFDIM_B, __x)
+#define MCDE_IMSCPP_ROTFDIM_A_SHIFT 7
+#define MCDE_IMSCPP_ROTFDIM_A_MASK 0x00000080
+#define MCDE_IMSCPP_ROTFDIM_A(__x) \
+	MCDE_VAL2REG(MCDE_IMSCPP, ROTFDIM_A, __x)
+#define MCDE_IMSCOVL 0x00000108
+#define MCDE_IMSCOVL_OVLRDIM_SHIFT 0
+#define MCDE_IMSCOVL_OVLRDIM_MASK 0x0000FFFF
+#define MCDE_IMSCOVL_OVLRDIM(__x) \
+	MCDE_VAL2REG(MCDE_IMSCOVL, OVLRDIM, __x)
+#define MCDE_IMSCOVL_OVLFDIM_SHIFT 16
+#define MCDE_IMSCOVL_OVLFDIM_MASK 0xFFFF0000
+#define MCDE_IMSCOVL_OVLFDIM(__x) \
+	MCDE_VAL2REG(MCDE_IMSCOVL, OVLFDIM, __x)
+#define MCDE_IMSCCHNL 0x0000010C
+#define MCDE_IMSCCHNL_CHNLRDIM_SHIFT 0
+#define MCDE_IMSCCHNL_CHNLRDIM_MASK 0x0000FFFF
+#define MCDE_IMSCCHNL_CHNLRDIM(__x) \
+	MCDE_VAL2REG(MCDE_IMSCCHNL, CHNLRDIM, __x)
+#define MCDE_IMSCCHNL_CHNLAIM_SHIFT 16
+#define MCDE_IMSCCHNL_CHNLAIM_MASK 0xFFFF0000
+#define MCDE_IMSCCHNL_CHNLAIM(__x) \
+	MCDE_VAL2REG(MCDE_IMSCCHNL, CHNLAIM, __x)
+#define MCDE_IMSCERR 0x00000110
+#define MCDE_IMSCERR_FUAIM_SHIFT 0
+#define MCDE_IMSCERR_FUAIM_MASK 0x00000001
+#define MCDE_IMSCERR_FUAIM(__x) \
+	MCDE_VAL2REG(MCDE_IMSCERR, FUAIM, __x)
+#define MCDE_IMSCERR_FUBIM_SHIFT 1
+#define MCDE_IMSCERR_FUBIM_MASK 0x00000002
+#define MCDE_IMSCERR_FUBIM(__x) \
+	MCDE_VAL2REG(MCDE_IMSCERR, FUBIM, __x)
+#define MCDE_IMSCERR_SCHBLCKDIM_SHIFT 2
+#define MCDE_IMSCERR_SCHBLCKDIM_MASK 0x00000004
+#define MCDE_IMSCERR_SCHBLCKDIM(__x) \
+	MCDE_VAL2REG(MCDE_IMSCERR, SCHBLCKDIM, __x)
+#define MCDE_IMSCERR_ROTAFEIM_WRITE_SHIFT 3
+#define MCDE_IMSCERR_ROTAFEIM_WRITE_MASK 0x00000008
+#define MCDE_IMSCERR_ROTAFEIM_WRITE(__x) \
+	MCDE_VAL2REG(MCDE_IMSCERR, ROTAFEIM_WRITE, __x)
+#define MCDE_IMSCERR_ROTAFEIM_READ_SHIFT 4
+#define MCDE_IMSCERR_ROTAFEIM_READ_MASK 0x00000010
+#define MCDE_IMSCERR_ROTAFEIM_READ(__x) \
+	MCDE_VAL2REG(MCDE_IMSCERR, ROTAFEIM_READ, __x)
+#define MCDE_IMSCERR_ROTBFEIM_WRITE_SHIFT 5
+#define MCDE_IMSCERR_ROTBFEIM_WRITE_MASK 0x00000020
+#define MCDE_IMSCERR_ROTBFEIM_WRITE(__x) \
+	MCDE_VAL2REG(MCDE_IMSCERR, ROTBFEIM_WRITE, __x)
+#define MCDE_IMSCERR_ROTBFEIM_READ_SHIFT 6
+#define MCDE_IMSCERR_ROTBFEIM_READ_MASK 0x00000040
+#define MCDE_IMSCERR_ROTBFEIM_READ(__x) \
+	MCDE_VAL2REG(MCDE_IMSCERR, ROTBFEIM_READ, __x)
+#define MCDE_IMSCERR_FUC0IM_SHIFT 7
+#define MCDE_IMSCERR_FUC0IM_MASK 0x00000080
+#define MCDE_IMSCERR_FUC0IM(__x) \
+	MCDE_VAL2REG(MCDE_IMSCERR, FUC0IM, __x)
+#define MCDE_IMSCERR_FUC1IM_SHIFT 8
+#define MCDE_IMSCERR_FUC1IM_MASK 0x00000100
+#define MCDE_IMSCERR_FUC1IM(__x) \
+	MCDE_VAL2REG(MCDE_IMSCERR, FUC1IM, __x)
+#define MCDE_IMSCERR_OVLFERRIM_SHIFT 16
+#define MCDE_IMSCERR_OVLFERRIM_MASK 0xFFFF0000
+#define MCDE_IMSCERR_OVLFERRIM(__x) \
+	MCDE_VAL2REG(MCDE_IMSCERR, OVLFERRIM, __x)
+#define MCDE_RISPP 0x00000114
+#define MCDE_RISPP_VCMPARIS_SHIFT 0
+#define MCDE_RISPP_VCMPARIS_MASK 0x00000001
+#define MCDE_RISPP_VCMPARIS(__x) \
+	MCDE_VAL2REG(MCDE_RISPP, VCMPARIS, __x)
+#define MCDE_RISPP_VCMPBRIS_SHIFT 1
+#define MCDE_RISPP_VCMPBRIS_MASK 0x00000002
+#define MCDE_RISPP_VCMPBRIS(__x) \
+	MCDE_VAL2REG(MCDE_RISPP, VCMPBRIS, __x)
+#define MCDE_RISPP_VSCC0RIS_SHIFT 2
+#define MCDE_RISPP_VSCC0RIS_MASK 0x00000004
+#define MCDE_RISPP_VSCC0RIS(__x) \
+	MCDE_VAL2REG(MCDE_RISPP, VSCC0RIS, __x)
+#define MCDE_RISPP_VSCC1RIS_SHIFT 3
+#define MCDE_RISPP_VSCC1RIS_MASK 0x00000008
+#define MCDE_RISPP_VSCC1RIS(__x) \
+	MCDE_VAL2REG(MCDE_RISPP, VSCC1RIS, __x)
+#define MCDE_RISPP_VCMPC0RIS_SHIFT 4
+#define MCDE_RISPP_VCMPC0RIS_MASK 0x00000010
+#define MCDE_RISPP_VCMPC0RIS(__x) \
+	MCDE_VAL2REG(MCDE_RISPP, VCMPC0RIS, __x)
+#define MCDE_RISPP_VCMPC1RIS_SHIFT 5
+#define MCDE_RISPP_VCMPC1RIS_MASK 0x00000020
+#define MCDE_RISPP_VCMPC1RIS(__x) \
+	MCDE_VAL2REG(MCDE_RISPP, VCMPC1RIS, __x)
+#define MCDE_RISPP_ROTFDRIS_B_SHIFT 6
+#define MCDE_RISPP_ROTFDRIS_B_MASK 0x00000040
+#define MCDE_RISPP_ROTFDRIS_B(__x) \
+	MCDE_VAL2REG(MCDE_RISPP, ROTFDRIS_B, __x)
+#define MCDE_RISPP_ROTFDRIS_A_SHIFT 7
+#define MCDE_RISPP_ROTFDRIS_A_MASK 0x00000080
+#define MCDE_RISPP_ROTFDRIS_A(__x) \
+	MCDE_VAL2REG(MCDE_RISPP, ROTFDRIS_A, __x)
+#define MCDE_RISOVL 0x00000118
+#define MCDE_RISOVL_OVLRDRIS_SHIFT 0
+#define MCDE_RISOVL_OVLRDRIS_MASK 0x0000FFFF
+#define MCDE_RISOVL_OVLRDRIS(__x) \
+	MCDE_VAL2REG(MCDE_RISOVL, OVLRDRIS, __x)
+#define MCDE_RISOVL_OVLFDRIS_SHIFT 16
+#define MCDE_RISOVL_OVLFDRIS_MASK 0xFFFF0000
+#define MCDE_RISOVL_OVLFDRIS(__x) \
+	MCDE_VAL2REG(MCDE_RISOVL, OVLFDRIS, __x)
+#define MCDE_RISCHNL 0x0000011C
+#define MCDE_RISCHNL_CHNLRDRIS_SHIFT 0
+#define MCDE_RISCHNL_CHNLRDRIS_MASK 0x0000FFFF
+#define MCDE_RISCHNL_CHNLRDRIS(__x) \
+	MCDE_VAL2REG(MCDE_RISCHNL, CHNLRDRIS, __x)
+#define MCDE_RISCHNL_CHNLARIS_SHIFT 16
+#define MCDE_RISCHNL_CHNLARIS_MASK 0xFFFF0000
+#define MCDE_RISCHNL_CHNLARIS(__x) \
+	MCDE_VAL2REG(MCDE_RISCHNL, CHNLARIS, __x)
+#define MCDE_RISERR 0x00000120
+#define MCDE_RISERR_FUARIS_SHIFT 0
+#define MCDE_RISERR_FUARIS_MASK 0x00000001
+#define MCDE_RISERR_FUARIS(__x) \
+	MCDE_VAL2REG(MCDE_RISERR, FUARIS, __x)
+#define MCDE_RISERR_FUBRIS_SHIFT 1
+#define MCDE_RISERR_FUBRIS_MASK 0x00000002
+#define MCDE_RISERR_FUBRIS(__x) \
+	MCDE_VAL2REG(MCDE_RISERR, FUBRIS, __x)
+#define MCDE_RISERR_SCHBLCKDRIS_SHIFT 2
+#define MCDE_RISERR_SCHBLCKDRIS_MASK 0x00000004
+#define MCDE_RISERR_SCHBLCKDRIS(__x) \
+	MCDE_VAL2REG(MCDE_RISERR, SCHBLCKDRIS, __x)
+#define MCDE_RISERR_ROTAFERIS_WRITE_SHIFT 3
+#define MCDE_RISERR_ROTAFERIS_WRITE_MASK 0x00000008
+#define MCDE_RISERR_ROTAFERIS_WRITE(__x) \
+	MCDE_VAL2REG(MCDE_RISERR, ROTAFERIS_WRITE, __x)
+#define MCDE_RISERR_ROTAFERIS_READ_SHIFT 4
+#define MCDE_RISERR_ROTAFERIS_READ_MASK 0x00000010
+#define MCDE_RISERR_ROTAFERIS_READ(__x) \
+	MCDE_VAL2REG(MCDE_RISERR, ROTAFERIS_READ, __x)
+#define MCDE_RISERR_ROTBFERIS_WRITE_SHIFT 5
+#define MCDE_RISERR_ROTBFERIS_WRITE_MASK 0x00000020
+#define MCDE_RISERR_ROTBFERIS_WRITE(__x) \
+	MCDE_VAL2REG(MCDE_RISERR, ROTBFERIS_WRITE, __x)
+#define MCDE_RISERR_ROTBFERIS_READ_SHIFT 6
+#define MCDE_RISERR_ROTBFERIS_READ_MASK 0x00000040
+#define MCDE_RISERR_ROTBFERIS_READ(__x) \
+	MCDE_VAL2REG(MCDE_RISERR, ROTBFERIS_READ, __x)
+#define MCDE_RISERR_FUC0RIS_SHIFT 7
+#define MCDE_RISERR_FUC0RIS_MASK 0x00000080
+#define MCDE_RISERR_FUC0RIS(__x) \
+	MCDE_VAL2REG(MCDE_RISERR, FUC0RIS, __x)
+#define MCDE_RISERR_FUC1RIS_SHIFT 8
+#define MCDE_RISERR_FUC1RIS_MASK 0x00000100
+#define MCDE_RISERR_FUC1RIS(__x) \
+	MCDE_VAL2REG(MCDE_RISERR, FUC1RIS, __x)
+#define MCDE_RISERR_OVLFERRRIS_SHIFT 16
+#define MCDE_RISERR_OVLFERRRIS_MASK 0xFFFF0000
+#define MCDE_RISERR_OVLFERRRIS(__x) \
+	MCDE_VAL2REG(MCDE_RISERR, OVLFERRRIS, __x)
+#define MCDE_MISPP 0x00000124
+#define MCDE_MISPP_VCMPAMIS_SHIFT 0
+#define MCDE_MISPP_VCMPAMIS_MASK 0x00000001
+#define MCDE_MISPP_VCMPAMIS(__x) \
+	MCDE_VAL2REG(MCDE_MISPP, VCMPAMIS, __x)
+#define MCDE_MISPP_VCMPBMIS_SHIFT 1
+#define MCDE_MISPP_VCMPBMIS_MASK 0x00000002
+#define MCDE_MISPP_VCMPBMIS(__x) \
+	MCDE_VAL2REG(MCDE_MISPP, VCMPBMIS, __x)
+#define MCDE_MISPP_VSCC0MIS_SHIFT 2
+#define MCDE_MISPP_VSCC0MIS_MASK 0x00000004
+#define MCDE_MISPP_VSCC0MIS(__x) \
+	MCDE_VAL2REG(MCDE_MISPP, VSCC0MIS, __x)
+#define MCDE_MISPP_VSCC1MIS_SHIFT 3
+#define MCDE_MISPP_VSCC1MIS_MASK 0x00000008
+#define MCDE_MISPP_VSCC1MIS(__x) \
+	MCDE_VAL2REG(MCDE_MISPP, VSCC1MIS, __x)
+#define MCDE_MISPP_VCMPC0MIS_SHIFT 4
+#define MCDE_MISPP_VCMPC0MIS_MASK 0x00000010
+#define MCDE_MISPP_VCMPC0MIS(__x) \
+	MCDE_VAL2REG(MCDE_MISPP, VCMPC0MIS, __x)
+#define MCDE_MISPP_VCMPC1MIS_SHIFT 5
+#define MCDE_MISPP_VCMPC1MIS_MASK 0x00000020
+#define MCDE_MISPP_VCMPC1MIS(__x) \
+	MCDE_VAL2REG(MCDE_MISPP, VCMPC1MIS, __x)
+#define MCDE_MISPP_ROTFDMIS_A_SHIFT 6
+#define MCDE_MISPP_ROTFDMIS_A_MASK 0x00000040
+#define MCDE_MISPP_ROTFDMIS_A(__x) \
+	MCDE_VAL2REG(MCDE_MISPP, ROTFDMIS_A, __x)
+#define MCDE_MISPP_ROTFDMIS_B_SHIFT 7
+#define MCDE_MISPP_ROTFDMIS_B_MASK 0x00000080
+#define MCDE_MISPP_ROTFDMIS_B(__x) \
+	MCDE_VAL2REG(MCDE_MISPP, ROTFDMIS_B, __x)
+#define MCDE_MISOVL 0x00000128
+#define MCDE_MISOVL_OVLRDMIS_SHIFT 0
+#define MCDE_MISOVL_OVLRDMIS_MASK 0x0000FFFF
+#define MCDE_MISOVL_OVLRDMIS(__x) \
+	MCDE_VAL2REG(MCDE_MISOVL, OVLRDMIS, __x)
+#define MCDE_MISOVL_OVLFDMIS_SHIFT 16
+#define MCDE_MISOVL_OVLFDMIS_MASK 0xFFFF0000
+#define MCDE_MISOVL_OVLFDMIS(__x) \
+	MCDE_VAL2REG(MCDE_MISOVL, OVLFDMIS, __x)
+#define MCDE_MISCHNL 0x0000012C
+#define MCDE_MISCHNL_CHNLRDMIS_SHIFT 0
+#define MCDE_MISCHNL_CHNLRDMIS_MASK 0x0000FFFF
+#define MCDE_MISCHNL_CHNLRDMIS(__x) \
+	MCDE_VAL2REG(MCDE_MISCHNL, CHNLRDMIS, __x)
+#define MCDE_MISCHNL_CHNLAMIS_SHIFT 16
+#define MCDE_MISCHNL_CHNLAMIS_MASK 0xFFFF0000
+#define MCDE_MISCHNL_CHNLAMIS(__x) \
+	MCDE_VAL2REG(MCDE_MISCHNL, CHNLAMIS, __x)
+#define MCDE_MISERR 0x00000130
+#define MCDE_MISERR_FUAMIS_SHIFT 0
+#define MCDE_MISERR_FUAMIS_MASK 0x00000001
+#define MCDE_MISERR_FUAMIS(__x) \
+	MCDE_VAL2REG(MCDE_MISERR, FUAMIS, __x)
+#define MCDE_MISERR_FUBMIS_SHIFT 1
+#define MCDE_MISERR_FUBMIS_MASK 0x00000002
+#define MCDE_MISERR_FUBMIS(__x) \
+	MCDE_VAL2REG(MCDE_MISERR, FUBMIS, __x)
+#define MCDE_MISERR_SCHBLCKDMIS_SHIFT 2
+#define MCDE_MISERR_SCHBLCKDMIS_MASK 0x00000004
+#define MCDE_MISERR_SCHBLCKDMIS(__x) \
+	MCDE_VAL2REG(MCDE_MISERR, SCHBLCKDMIS, __x)
+#define MCDE_MISERR_ROTAFEMIS_WRITE_SHIFT 3
+#define MCDE_MISERR_ROTAFEMIS_WRITE_MASK 0x00000008
+#define MCDE_MISERR_ROTAFEMIS_WRITE(__x) \
+	MCDE_VAL2REG(MCDE_MISERR, ROTAFEMIS_WRITE, __x)
+#define MCDE_MISERR_ROTAFEMIS_READ_SHIFT 4
+#define MCDE_MISERR_ROTAFEMIS_READ_MASK 0x00000010
+#define MCDE_MISERR_ROTAFEMIS_READ(__x) \
+	MCDE_VAL2REG(MCDE_MISERR, ROTAFEMIS_READ, __x)
+#define MCDE_MISERR_ROTBFEMIS_WRITE_SHIFT 5
+#define MCDE_MISERR_ROTBFEMIS_WRITE_MASK 0x00000020
+#define MCDE_MISERR_ROTBFEMIS_WRITE(__x) \
+	MCDE_VAL2REG(MCDE_MISERR, ROTBFEMIS_WRITE, __x)
+#define MCDE_MISERR_ROTBFEMIS_READ_SHIFT 6
+#define MCDE_MISERR_ROTBFEMIS_READ_MASK 0x00000040
+#define MCDE_MISERR_ROTBFEMIS_READ(__x) \
+	MCDE_VAL2REG(MCDE_MISERR, ROTBFEMIS_READ, __x)
+#define MCDE_MISERR_FUC0MIS_SHIFT 7
+#define MCDE_MISERR_FUC0MIS_MASK 0x00000080
+#define MCDE_MISERR_FUC0MIS(__x) \
+	MCDE_VAL2REG(MCDE_MISERR, FUC0MIS, __x)
+#define MCDE_MISERR_FUC1MIS_SHIFT 8
+#define MCDE_MISERR_FUC1MIS_MASK 0x00000100
+#define MCDE_MISERR_FUC1MIS(__x) \
+	MCDE_VAL2REG(MCDE_MISERR, FUC1MIS, __x)
+#define MCDE_MISERR_OVLFERMIS_SHIFT 16
+#define MCDE_MISERR_OVLFERMIS_MASK 0xFFFF0000
+#define MCDE_MISERR_OVLFERMIS(__x) \
+	MCDE_VAL2REG(MCDE_MISERR, OVLFERMIS, __x)
+#define MCDE_SISPP 0x00000134
+#define MCDE_SISPP_VCMPASIS_SHIFT 0
+#define MCDE_SISPP_VCMPASIS_MASK 0x00000001
+#define MCDE_SISPP_VCMPASIS(__x) \
+	MCDE_VAL2REG(MCDE_SISPP, VCMPASIS, __x)
+#define MCDE_SISPP_VCMPBSIS_SHIFT 1
+#define MCDE_SISPP_VCMPBSIS_MASK 0x00000002
+#define MCDE_SISPP_VCMPBSIS(__x) \
+	MCDE_VAL2REG(MCDE_SISPP, VCMPBSIS, __x)
+#define MCDE_SISPP_VSCC0SIS_SHIFT 2
+#define MCDE_SISPP_VSCC0SIS_MASK 0x00000004
+#define MCDE_SISPP_VSCC0SIS(__x) \
+	MCDE_VAL2REG(MCDE_SISPP, VSCC0SIS, __x)
+#define MCDE_SISPP_VSCC1SIS_SHIFT 3
+#define MCDE_SISPP_VSCC1SIS_MASK 0x00000008
+#define MCDE_SISPP_VSCC1SIS(__x) \
+	MCDE_VAL2REG(MCDE_SISPP, VSCC1SIS, __x)
+#define MCDE_SISPP_VCMPC0SIS_SHIFT 4
+#define MCDE_SISPP_VCMPC0SIS_MASK 0x00000010
+#define MCDE_SISPP_VCMPC0SIS(__x) \
+	MCDE_VAL2REG(MCDE_SISPP, VCMPC0SIS, __x)
+#define MCDE_SISPP_VCMPC1SIS_SHIFT 5
+#define MCDE_SISPP_VCMPC1SIS_MASK 0x00000020
+#define MCDE_SISPP_VCMPC1SIS(__x) \
+	MCDE_VAL2REG(MCDE_SISPP, VCMPC1SIS, __x)
+#define MCDE_SISPP_ROTFDSIS_A_SHIFT 6
+#define MCDE_SISPP_ROTFDSIS_A_MASK 0x00000040
+#define MCDE_SISPP_ROTFDSIS_A(__x) \
+	MCDE_VAL2REG(MCDE_SISPP, ROTFDSIS_A, __x)
+#define MCDE_SISPP_ROTFDSIS_B_SHIFT 7
+#define MCDE_SISPP_ROTFDSIS_B_MASK 0x00000080
+#define MCDE_SISPP_ROTFDSIS_B(__x) \
+	MCDE_VAL2REG(MCDE_SISPP, ROTFDSIS_B, __x)
+#define MCDE_SISOVL 0x00000138
+#define MCDE_SISOVL_OVLRDSIS_SHIFT 0
+#define MCDE_SISOVL_OVLRDSIS_MASK 0x0000FFFF
+#define MCDE_SISOVL_OVLRDSIS(__x) \
+	MCDE_VAL2REG(MCDE_SISOVL, OVLRDSIS, __x)
+#define MCDE_SISOVL_OVLFDSIS_SHIFT 16
+#define MCDE_SISOVL_OVLFDSIS_MASK 0xFFFF0000
+#define MCDE_SISOVL_OVLFDSIS(__x) \
+	MCDE_VAL2REG(MCDE_SISOVL, OVLFDSIS, __x)
+#define MCDE_SISCHNL 0x0000013C
+#define MCDE_SISCHNL_CHNLRDSIS_SHIFT 0
+#define MCDE_SISCHNL_CHNLRDSIS_MASK 0x0000FFFF
+#define MCDE_SISCHNL_CHNLRDSIS(__x) \
+	MCDE_VAL2REG(MCDE_SISCHNL, CHNLRDSIS, __x)
+#define MCDE_SISCHNL_CHNLASIS_SHIFT 16
+#define MCDE_SISCHNL_CHNLASIS_MASK 0xFFFF0000
+#define MCDE_SISCHNL_CHNLASIS(__x) \
+	MCDE_VAL2REG(MCDE_SISCHNL, CHNLASIS, __x)
+#define MCDE_SISERR 0x00000140
+#define MCDE_SISERR_FUASIS_SHIFT 0
+#define MCDE_SISERR_FUASIS_MASK 0x00000001
+#define MCDE_SISERR_FUASIS(__x) \
+	MCDE_VAL2REG(MCDE_SISERR, FUASIS, __x)
+#define MCDE_SISERR_FUBSIS_SHIFT 1
+#define MCDE_SISERR_FUBSIS_MASK 0x00000002
+#define MCDE_SISERR_FUBSIS(__x) \
+	MCDE_VAL2REG(MCDE_SISERR, FUBSIS, __x)
+#define MCDE_SISERR_SCHBLCKDSIS_SHIFT 2
+#define MCDE_SISERR_SCHBLCKDSIS_MASK 0x00000004
+#define MCDE_SISERR_SCHBLCKDSIS(__x) \
+	MCDE_VAL2REG(MCDE_SISERR, SCHBLCKDSIS, __x)
+#define MCDE_SISERR_ROTAFESIS_WRITE_SHIFT 3
+#define MCDE_SISERR_ROTAFESIS_WRITE_MASK 0x00000008
+#define MCDE_SISERR_ROTAFESIS_WRITE(__x) \
+	MCDE_VAL2REG(MCDE_SISERR, ROTAFESIS_WRITE, __x)
+#define MCDE_SISERR_ROTAFESIS_READ_SHIFT 4
+#define MCDE_SISERR_ROTAFESIS_READ_MASK 0x00000010
+#define MCDE_SISERR_ROTAFESIS_READ(__x) \
+	MCDE_VAL2REG(MCDE_SISERR, ROTAFESIS_READ, __x)
+#define MCDE_SISERR_ROTBFESIS_WRITE_SHIFT 5
+#define MCDE_SISERR_ROTBFESIS_WRITE_MASK 0x00000020
+#define MCDE_SISERR_ROTBFESIS_WRITE(__x) \
+	MCDE_VAL2REG(MCDE_SISERR, ROTBFESIS_WRITE, __x)
+#define MCDE_SISERR_ROTBFESIS_READ_SHIFT 6
+#define MCDE_SISERR_ROTBFESIS_READ_MASK 0x00000040
+#define MCDE_SISERR_ROTBFESIS_READ(__x) \
+	MCDE_VAL2REG(MCDE_SISERR, ROTBFESIS_READ, __x)
+#define MCDE_SISERR_FUC0SIS_SHIFT 7
+#define MCDE_SISERR_FUC0SIS_MASK 0x00000080
+#define MCDE_SISERR_FUC0SIS(__x) \
+	MCDE_VAL2REG(MCDE_SISERR, FUC0SIS, __x)
+#define MCDE_SISERR_FUC1SIS_SHIFT 8
+#define MCDE_SISERR_FUC1SIS_MASK 0x00000100
+#define MCDE_SISERR_FUC1SIS(__x) \
+	MCDE_VAL2REG(MCDE_SISERR, FUC1SIS, __x)
+#define MCDE_SISERR_OVLFERSIS_SHIFT 16
+#define MCDE_SISERR_OVLFERSIS_MASK 0xFFFF0000
+#define MCDE_SISERR_OVLFERSIS(__x) \
+	MCDE_VAL2REG(MCDE_SISERR, OVLFERSIS, __x)
+#define MCDE_PID 0x000001FC
+#define MCDE_PID_METALFIX_VERSION_SHIFT 0
+#define MCDE_PID_METALFIX_VERSION_MASK 0x000000FF
+#define MCDE_PID_METALFIX_VERSION(__x) \
+	MCDE_VAL2REG(MCDE_PID, METALFIX_VERSION, __x)
+#define MCDE_PID_DEVELOPMENT_VERSION_SHIFT 8
+#define MCDE_PID_DEVELOPMENT_VERSION_MASK 0x0000FF00
+#define MCDE_PID_DEVELOPMENT_VERSION(__x) \
+	MCDE_VAL2REG(MCDE_PID, DEVELOPMENT_VERSION, __x)
+#define MCDE_PID_MINOR_VERSION_SHIFT 16
+#define MCDE_PID_MINOR_VERSION_MASK 0x00FF0000
+#define MCDE_PID_MINOR_VERSION(__x) \
+	MCDE_VAL2REG(MCDE_PID, MINOR_VERSION, __x)
+#define MCDE_PID_MAJOR_VERSION_SHIFT 24
+#define MCDE_PID_MAJOR_VERSION_MASK 0xFF000000
+#define MCDE_PID_MAJOR_VERSION(__x) \
+	MCDE_VAL2REG(MCDE_PID, MAJOR_VERSION, __x)
+#define MCDE_EXTSRC0A0 0x00000200
+#define MCDE_EXTSRC0A0_GROUPOFFSET 0x20
+#define MCDE_EXTSRC0A0_BASEADDRESS0_SHIFT 3
+#define MCDE_EXTSRC0A0_BASEADDRESS0_MASK 0xFFFFFFF8
+#define MCDE_EXTSRC0A0_BASEADDRESS0(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC0A0, BASEADDRESS0, __x)
+#define MCDE_EXTSRC1A0 0x00000220
+#define MCDE_EXTSRC1A0_BASEADDRESS0_SHIFT 3
+#define MCDE_EXTSRC1A0_BASEADDRESS0_MASK 0xFFFFFFF8
+#define MCDE_EXTSRC1A0_BASEADDRESS0(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC1A0, BASEADDRESS0, __x)
+#define MCDE_EXTSRC2A0 0x00000240
+#define MCDE_EXTSRC2A0_BASEADDRESS0_SHIFT 3
+#define MCDE_EXTSRC2A0_BASEADDRESS0_MASK 0xFFFFFFF8
+#define MCDE_EXTSRC2A0_BASEADDRESS0(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC2A0, BASEADDRESS0, __x)
+#define MCDE_EXTSRC3A0 0x00000260
+#define MCDE_EXTSRC3A0_BASEADDRESS0_SHIFT 3
+#define MCDE_EXTSRC3A0_BASEADDRESS0_MASK 0xFFFFFFF8
+#define MCDE_EXTSRC3A0_BASEADDRESS0(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC3A0, BASEADDRESS0, __x)
+#define MCDE_EXTSRC4A0 0x00000280
+#define MCDE_EXTSRC4A0_BASEADDRESS0_SHIFT 3
+#define MCDE_EXTSRC4A0_BASEADDRESS0_MASK 0xFFFFFFF8
+#define MCDE_EXTSRC4A0_BASEADDRESS0(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC4A0, BASEADDRESS0, __x)
+#define MCDE_EXTSRC5A0 0x000002A0
+#define MCDE_EXTSRC5A0_BASEADDRESS0_SHIFT 3
+#define MCDE_EXTSRC5A0_BASEADDRESS0_MASK 0xFFFFFFF8
+#define MCDE_EXTSRC5A0_BASEADDRESS0(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC5A0, BASEADDRESS0, __x)
+#define MCDE_EXTSRC6A0 0x000002C0
+#define MCDE_EXTSRC6A0_BASEADDRESS0_SHIFT 3
+#define MCDE_EXTSRC6A0_BASEADDRESS0_MASK 0xFFFFFFF8
+#define MCDE_EXTSRC6A0_BASEADDRESS0(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC6A0, BASEADDRESS0, __x)
+#define MCDE_EXTSRC7A0 0x000002E0
+#define MCDE_EXTSRC7A0_BASEADDRESS0_SHIFT 3
+#define MCDE_EXTSRC7A0_BASEADDRESS0_MASK 0xFFFFFFF8
+#define MCDE_EXTSRC7A0_BASEADDRESS0(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC7A0, BASEADDRESS0, __x)
+#define MCDE_EXTSRC8A0 0x00000300
+#define MCDE_EXTSRC8A0_BASEADDRESS0_SHIFT 3
+#define MCDE_EXTSRC8A0_BASEADDRESS0_MASK 0xFFFFFFF8
+#define MCDE_EXTSRC8A0_BASEADDRESS0(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC8A0, BASEADDRESS0, __x)
+#define MCDE_EXTSRC9A0 0x00000320
+#define MCDE_EXTSRC9A0_BASEADDRESS0_SHIFT 3
+#define MCDE_EXTSRC9A0_BASEADDRESS0_MASK 0xFFFFFFF8
+#define MCDE_EXTSRC9A0_BASEADDRESS0(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC9A0, BASEADDRESS0, __x)
+#define MCDE_EXTSRC0A1 0x00000204
+#define MCDE_EXTSRC0A1_GROUPOFFSET 0x20
+#define MCDE_EXTSRC0A1_BASEADDRESS1_SHIFT 3
+#define MCDE_EXTSRC0A1_BASEADDRESS1_MASK 0xFFFFFFF8
+#define MCDE_EXTSRC0A1_BASEADDRESS1(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC0A1, BASEADDRESS1, __x)
+#define MCDE_EXTSRC1A1 0x00000224
+#define MCDE_EXTSRC1A1_BASEADDRESS1_SHIFT 3
+#define MCDE_EXTSRC1A1_BASEADDRESS1_MASK 0xFFFFFFF8
+#define MCDE_EXTSRC1A1_BASEADDRESS1(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC1A1, BASEADDRESS1, __x)
+#define MCDE_EXTSRC2A1 0x00000244
+#define MCDE_EXTSRC2A1_BASEADDRESS1_SHIFT 3
+#define MCDE_EXTSRC2A1_BASEADDRESS1_MASK 0xFFFFFFF8
+#define MCDE_EXTSRC2A1_BASEADDRESS1(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC2A1, BASEADDRESS1, __x)
+#define MCDE_EXTSRC3A1 0x00000264
+#define MCDE_EXTSRC3A1_BASEADDRESS1_SHIFT 3
+#define MCDE_EXTSRC3A1_BASEADDRESS1_MASK 0xFFFFFFF8
+#define MCDE_EXTSRC3A1_BASEADDRESS1(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC3A1, BASEADDRESS1, __x)
+#define MCDE_EXTSRC4A1 0x00000284
+#define MCDE_EXTSRC4A1_BASEADDRESS1_SHIFT 3
+#define MCDE_EXTSRC4A1_BASEADDRESS1_MASK 0xFFFFFFF8
+#define MCDE_EXTSRC4A1_BASEADDRESS1(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC4A1, BASEADDRESS1, __x)
+#define MCDE_EXTSRC5A1 0x000002A4
+#define MCDE_EXTSRC5A1_BASEADDRESS1_SHIFT 3
+#define MCDE_EXTSRC5A1_BASEADDRESS1_MASK 0xFFFFFFF8
+#define MCDE_EXTSRC5A1_BASEADDRESS1(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC5A1, BASEADDRESS1, __x)
+#define MCDE_EXTSRC6A1 0x000002C4
+#define MCDE_EXTSRC6A1_BASEADDRESS1_SHIFT 3
+#define MCDE_EXTSRC6A1_BASEADDRESS1_MASK 0xFFFFFFF8
+#define MCDE_EXTSRC6A1_BASEADDRESS1(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC6A1, BASEADDRESS1, __x)
+#define MCDE_EXTSRC7A1 0x000002E4
+#define MCDE_EXTSRC7A1_BASEADDRESS1_SHIFT 3
+#define MCDE_EXTSRC7A1_BASEADDRESS1_MASK 0xFFFFFFF8
+#define MCDE_EXTSRC7A1_BASEADDRESS1(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC7A1, BASEADDRESS1, __x)
+#define MCDE_EXTSRC8A1 0x00000304
+#define MCDE_EXTSRC8A1_BASEADDRESS1_SHIFT 3
+#define MCDE_EXTSRC8A1_BASEADDRESS1_MASK 0xFFFFFFF8
+#define MCDE_EXTSRC8A1_BASEADDRESS1(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC8A1, BASEADDRESS1, __x)
+#define MCDE_EXTSRC9A1 0x00000324
+#define MCDE_EXTSRC9A1_BASEADDRESS1_SHIFT 3
+#define MCDE_EXTSRC9A1_BASEADDRESS1_MASK 0xFFFFFFF8
+#define MCDE_EXTSRC9A1_BASEADDRESS1(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC9A1, BASEADDRESS1, __x)
+#define MCDE_EXTSRC6A2 0x000002C8
+#define MCDE_EXTSRC6A2_BASEADDRESS2_SHIFT 3
+#define MCDE_EXTSRC6A2_BASEADDRESS2_MASK 0xFFFFFFF8
+#define MCDE_EXTSRC6A2_BASEADDRESS2(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC6A2, BASEADDRESS2, __x)
+#define MCDE_EXTSRC0CONF 0x0000020C
+#define MCDE_EXTSRC0CONF_GROUPOFFSET 0x20
+#define MCDE_EXTSRC0CONF_BUF_ID_SHIFT 0
+#define MCDE_EXTSRC0CONF_BUF_ID_MASK 0x00000003
+#define MCDE_EXTSRC0CONF_BUF_ID(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC0CONF, BUF_ID, __x)
+#define MCDE_EXTSRC0CONF_BUF_NB_SHIFT 2
+#define MCDE_EXTSRC0CONF_BUF_NB_MASK 0x0000000C
+#define MCDE_EXTSRC0CONF_BUF_NB(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC0CONF, BUF_NB, __x)
+#define MCDE_EXTSRC0CONF_PRI_OVLID_SHIFT 4
+#define MCDE_EXTSRC0CONF_PRI_OVLID_MASK 0x000000F0
+#define MCDE_EXTSRC0CONF_PRI_OVLID(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC0CONF, PRI_OVLID, __x)
+#define MCDE_EXTSRC0CONF_BPP_SHIFT 8
+#define MCDE_EXTSRC0CONF_BPP_MASK 0x00000F00
+#define MCDE_EXTSRC0CONF_BPP_1BPP_PAL 0
+#define MCDE_EXTSRC0CONF_BPP_2BPP_PAL 1
+#define MCDE_EXTSRC0CONF_BPP_4BPP_PAL 2
+#define MCDE_EXTSRC0CONF_BPP_8BPP_PAL 3
+#define MCDE_EXTSRC0CONF_BPP_RGB444 4
+#define MCDE_EXTSRC0CONF_BPP_ARGB4444 5
+#define MCDE_EXTSRC0CONF_BPP_IRGB1555 6
+#define MCDE_EXTSRC0CONF_BPP_RGB565 7
+#define MCDE_EXTSRC0CONF_BPP_RGB888 8
+#define MCDE_EXTSRC0CONF_BPP_XRGB8888 9
+#define MCDE_EXTSRC0CONF_BPP_ARGB8888 10
+#define MCDE_EXTSRC0CONF_BPP_YCBCR422 11
+#define MCDE_EXTSRC0CONF_BPP_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC0CONF, BPP, MCDE_EXTSRC0CONF_BPP_##__x)
+#define MCDE_EXTSRC0CONF_BPP(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC0CONF, BPP, __x)
+#define MCDE_EXTSRC0CONF_BGR_SHIFT 12
+#define MCDE_EXTSRC0CONF_BGR_MASK 0x00001000
+#define MCDE_EXTSRC0CONF_BGR_RGB 0
+#define MCDE_EXTSRC0CONF_BGR_BGR 1
+#define MCDE_EXTSRC0CONF_BGR_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC0CONF, BGR, MCDE_EXTSRC0CONF_BGR_##__x)
+#define MCDE_EXTSRC0CONF_BGR(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC0CONF, BGR, __x)
+#define MCDE_EXTSRC0CONF_BEBO_SHIFT 13
+#define MCDE_EXTSRC0CONF_BEBO_MASK 0x00002000
+#define MCDE_EXTSRC0CONF_BEBO_LITTLE_ENDIAN 0
+#define MCDE_EXTSRC0CONF_BEBO_BIG_ENDIAN 1
+#define MCDE_EXTSRC0CONF_BEBO_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC0CONF, BEBO, MCDE_EXTSRC0CONF_BEBO_##__x)
+#define MCDE_EXTSRC0CONF_BEBO(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC0CONF, BEBO, __x)
+#define MCDE_EXTSRC0CONF_BEPO_SHIFT 14
+#define MCDE_EXTSRC0CONF_BEPO_MASK 0x00004000
+#define MCDE_EXTSRC0CONF_BEPO_LITTLE_ENDIAN 0
+#define MCDE_EXTSRC0CONF_BEPO_BIG_ENDIAN 1
+#define MCDE_EXTSRC0CONF_BEPO_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC0CONF, BEPO, MCDE_EXTSRC0CONF_BEPO_##__x)
+#define MCDE_EXTSRC0CONF_BEPO(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC0CONF, BEPO, __x)
+#define MCDE_EXTSRC1CONF 0x0000022C
+#define MCDE_EXTSRC1CONF_BUF_ID_SHIFT 0
+#define MCDE_EXTSRC1CONF_BUF_ID_MASK 0x00000003
+#define MCDE_EXTSRC1CONF_BUF_ID(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC1CONF, BUF_ID, __x)
+#define MCDE_EXTSRC1CONF_BUF_NB_SHIFT 2
+#define MCDE_EXTSRC1CONF_BUF_NB_MASK 0x0000000C
+#define MCDE_EXTSRC1CONF_BUF_NB(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC1CONF, BUF_NB, __x)
+#define MCDE_EXTSRC1CONF_PRI_OVLID_SHIFT 4
+#define MCDE_EXTSRC1CONF_PRI_OVLID_MASK 0x000000F0
+#define MCDE_EXTSRC1CONF_PRI_OVLID(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC1CONF, PRI_OVLID, __x)
+#define MCDE_EXTSRC1CONF_BPP_SHIFT 8
+#define MCDE_EXTSRC1CONF_BPP_MASK 0x00000F00
+#define MCDE_EXTSRC1CONF_BPP_1BPP_PAL 0
+#define MCDE_EXTSRC1CONF_BPP_2BPP_PAL 1
+#define MCDE_EXTSRC1CONF_BPP_4BPP_PAL 2
+#define MCDE_EXTSRC1CONF_BPP_8BPP_PAL 3
+#define MCDE_EXTSRC1CONF_BPP_RGB444 4
+#define MCDE_EXTSRC1CONF_BPP_ARGB4444 5
+#define MCDE_EXTSRC1CONF_BPP_IRGB1555 6
+#define MCDE_EXTSRC1CONF_BPP_RGB565 7
+#define MCDE_EXTSRC1CONF_BPP_RGB888 8
+#define MCDE_EXTSRC1CONF_BPP_XRGB8888 9
+#define MCDE_EXTSRC1CONF_BPP_ARGB8888 10
+#define MCDE_EXTSRC1CONF_BPP_YCBCR422 11
+#define MCDE_EXTSRC1CONF_BPP_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC1CONF, BPP, MCDE_EXTSRC1CONF_BPP_##__x)
+#define MCDE_EXTSRC1CONF_BPP(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC1CONF, BPP, __x)
+#define MCDE_EXTSRC1CONF_BGR_SHIFT 12
+#define MCDE_EXTSRC1CONF_BGR_MASK 0x00001000
+#define MCDE_EXTSRC1CONF_BGR_RGB 0
+#define MCDE_EXTSRC1CONF_BGR_BGR 1
+#define MCDE_EXTSRC1CONF_BGR_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC1CONF, BGR, MCDE_EXTSRC1CONF_BGR_##__x)
+#define MCDE_EXTSRC1CONF_BGR(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC1CONF, BGR, __x)
+#define MCDE_EXTSRC1CONF_BEBO_SHIFT 13
+#define MCDE_EXTSRC1CONF_BEBO_MASK 0x00002000
+#define MCDE_EXTSRC1CONF_BEBO_LITTLE_ENDIAN 0
+#define MCDE_EXTSRC1CONF_BEBO_BIG_ENDIAN 1
+#define MCDE_EXTSRC1CONF_BEBO_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC1CONF, BEBO, MCDE_EXTSRC1CONF_BEBO_##__x)
+#define MCDE_EXTSRC1CONF_BEBO(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC1CONF, BEBO, __x)
+#define MCDE_EXTSRC1CONF_BEPO_SHIFT 14
+#define MCDE_EXTSRC1CONF_BEPO_MASK 0x00004000
+#define MCDE_EXTSRC1CONF_BEPO_LITTLE_ENDIAN 0
+#define MCDE_EXTSRC1CONF_BEPO_BIG_ENDIAN 1
+#define MCDE_EXTSRC1CONF_BEPO_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC1CONF, BEPO, MCDE_EXTSRC1CONF_BEPO_##__x)
+#define MCDE_EXTSRC1CONF_BEPO(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC1CONF, BEPO, __x)
+#define MCDE_EXTSRC2CONF 0x0000024C
+#define MCDE_EXTSRC2CONF_BUF_ID_SHIFT 0
+#define MCDE_EXTSRC2CONF_BUF_ID_MASK 0x00000003
+#define MCDE_EXTSRC2CONF_BUF_ID(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC2CONF, BUF_ID, __x)
+#define MCDE_EXTSRC2CONF_BUF_NB_SHIFT 2
+#define MCDE_EXTSRC2CONF_BUF_NB_MASK 0x0000000C
+#define MCDE_EXTSRC2CONF_BUF_NB(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC2CONF, BUF_NB, __x)
+#define MCDE_EXTSRC2CONF_PRI_OVLID_SHIFT 4
+#define MCDE_EXTSRC2CONF_PRI_OVLID_MASK 0x000000F0
+#define MCDE_EXTSRC2CONF_PRI_OVLID(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC2CONF, PRI_OVLID, __x)
+#define MCDE_EXTSRC2CONF_BPP_SHIFT 8
+#define MCDE_EXTSRC2CONF_BPP_MASK 0x00000F00
+#define MCDE_EXTSRC2CONF_BPP_1BPP_PAL 0
+#define MCDE_EXTSRC2CONF_BPP_2BPP_PAL 1
+#define MCDE_EXTSRC2CONF_BPP_4BPP_PAL 2
+#define MCDE_EXTSRC2CONF_BPP_8BPP_PAL 3
+#define MCDE_EXTSRC2CONF_BPP_RGB444 4
+#define MCDE_EXTSRC2CONF_BPP_ARGB4444 5
+#define MCDE_EXTSRC2CONF_BPP_IRGB1555 6
+#define MCDE_EXTSRC2CONF_BPP_RGB565 7
+#define MCDE_EXTSRC2CONF_BPP_RGB888 8
+#define MCDE_EXTSRC2CONF_BPP_XRGB8888 9
+#define MCDE_EXTSRC2CONF_BPP_ARGB8888 10
+#define MCDE_EXTSRC2CONF_BPP_YCBCR422 11
+#define MCDE_EXTSRC2CONF_BPP_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC2CONF, BPP, MCDE_EXTSRC2CONF_BPP_##__x)
+#define MCDE_EXTSRC2CONF_BPP(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC2CONF, BPP, __x)
+#define MCDE_EXTSRC2CONF_BGR_SHIFT 12
+#define MCDE_EXTSRC2CONF_BGR_MASK 0x00001000
+#define MCDE_EXTSRC2CONF_BGR_RGB 0
+#define MCDE_EXTSRC2CONF_BGR_BGR 1
+#define MCDE_EXTSRC2CONF_BGR_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC2CONF, BGR, MCDE_EXTSRC2CONF_BGR_##__x)
+#define MCDE_EXTSRC2CONF_BGR(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC2CONF, BGR, __x)
+#define MCDE_EXTSRC2CONF_BEBO_SHIFT 13
+#define MCDE_EXTSRC2CONF_BEBO_MASK 0x00002000
+#define MCDE_EXTSRC2CONF_BEBO_LITTLE_ENDIAN 0
+#define MCDE_EXTSRC2CONF_BEBO_BIG_ENDIAN 1
+#define MCDE_EXTSRC2CONF_BEBO_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC2CONF, BEBO, MCDE_EXTSRC2CONF_BEBO_##__x)
+#define MCDE_EXTSRC2CONF_BEBO(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC2CONF, BEBO, __x)
+#define MCDE_EXTSRC2CONF_BEPO_SHIFT 14
+#define MCDE_EXTSRC2CONF_BEPO_MASK 0x00004000
+#define MCDE_EXTSRC2CONF_BEPO_LITTLE_ENDIAN 0
+#define MCDE_EXTSRC2CONF_BEPO_BIG_ENDIAN 1
+#define MCDE_EXTSRC2CONF_BEPO_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC2CONF, BEPO, MCDE_EXTSRC2CONF_BEPO_##__x)
+#define MCDE_EXTSRC2CONF_BEPO(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC2CONF, BEPO, __x)
+#define MCDE_EXTSRC3CONF 0x0000026C
+#define MCDE_EXTSRC3CONF_BUF_ID_SHIFT 0
+#define MCDE_EXTSRC3CONF_BUF_ID_MASK 0x00000003
+#define MCDE_EXTSRC3CONF_BUF_ID(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC3CONF, BUF_ID, __x)
+#define MCDE_EXTSRC3CONF_BUF_NB_SHIFT 2
+#define MCDE_EXTSRC3CONF_BUF_NB_MASK 0x0000000C
+#define MCDE_EXTSRC3CONF_BUF_NB(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC3CONF, BUF_NB, __x)
+#define MCDE_EXTSRC3CONF_PRI_OVLID_SHIFT 4
+#define MCDE_EXTSRC3CONF_PRI_OVLID_MASK 0x000000F0
+#define MCDE_EXTSRC3CONF_PRI_OVLID(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC3CONF, PRI_OVLID, __x)
+#define MCDE_EXTSRC3CONF_BPP_SHIFT 8
+#define MCDE_EXTSRC3CONF_BPP_MASK 0x00000F00
+#define MCDE_EXTSRC3CONF_BPP_1BPP_PAL 0
+#define MCDE_EXTSRC3CONF_BPP_2BPP_PAL 1
+#define MCDE_EXTSRC3CONF_BPP_4BPP_PAL 2
+#define MCDE_EXTSRC3CONF_BPP_8BPP_PAL 3
+#define MCDE_EXTSRC3CONF_BPP_RGB444 4
+#define MCDE_EXTSRC3CONF_BPP_ARGB4444 5
+#define MCDE_EXTSRC3CONF_BPP_IRGB1555 6
+#define MCDE_EXTSRC3CONF_BPP_RGB565 7
+#define MCDE_EXTSRC3CONF_BPP_RGB888 8
+#define MCDE_EXTSRC3CONF_BPP_XRGB8888 9
+#define MCDE_EXTSRC3CONF_BPP_ARGB8888 10
+#define MCDE_EXTSRC3CONF_BPP_YCBCR422 11
+#define MCDE_EXTSRC3CONF_BPP_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC3CONF, BPP, MCDE_EXTSRC3CONF_BPP_##__x)
+#define MCDE_EXTSRC3CONF_BPP(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC3CONF, BPP, __x)
+#define MCDE_EXTSRC3CONF_BGR_SHIFT 12
+#define MCDE_EXTSRC3CONF_BGR_MASK 0x00001000
+#define MCDE_EXTSRC3CONF_BGR_RGB 0
+#define MCDE_EXTSRC3CONF_BGR_BGR 1
+#define MCDE_EXTSRC3CONF_BGR_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC3CONF, BGR, MCDE_EXTSRC3CONF_BGR_##__x)
+#define MCDE_EXTSRC3CONF_BGR(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC3CONF, BGR, __x)
+#define MCDE_EXTSRC3CONF_BEBO_SHIFT 13
+#define MCDE_EXTSRC3CONF_BEBO_MASK 0x00002000
+#define MCDE_EXTSRC3CONF_BEBO_LITTLE_ENDIAN 0
+#define MCDE_EXTSRC3CONF_BEBO_BIG_ENDIAN 1
+#define MCDE_EXTSRC3CONF_BEBO_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC3CONF, BEBO, MCDE_EXTSRC3CONF_BEBO_##__x)
+#define MCDE_EXTSRC3CONF_BEBO(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC3CONF, BEBO, __x)
+#define MCDE_EXTSRC3CONF_BEPO_SHIFT 14
+#define MCDE_EXTSRC3CONF_BEPO_MASK 0x00004000
+#define MCDE_EXTSRC3CONF_BEPO_LITTLE_ENDIAN 0
+#define MCDE_EXTSRC3CONF_BEPO_BIG_ENDIAN 1
+#define MCDE_EXTSRC3CONF_BEPO_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC3CONF, BEPO, MCDE_EXTSRC3CONF_BEPO_##__x)
+#define MCDE_EXTSRC3CONF_BEPO(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC3CONF, BEPO, __x)
+#define MCDE_EXTSRC4CONF 0x0000028C
+#define MCDE_EXTSRC4CONF_BUF_ID_SHIFT 0
+#define MCDE_EXTSRC4CONF_BUF_ID_MASK 0x00000003
+#define MCDE_EXTSRC4CONF_BUF_ID(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC4CONF, BUF_ID, __x)
+#define MCDE_EXTSRC4CONF_BUF_NB_SHIFT 2
+#define MCDE_EXTSRC4CONF_BUF_NB_MASK 0x0000000C
+#define MCDE_EXTSRC4CONF_BUF_NB(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC4CONF, BUF_NB, __x)
+#define MCDE_EXTSRC4CONF_PRI_OVLID_SHIFT 4
+#define MCDE_EXTSRC4CONF_PRI_OVLID_MASK 0x000000F0
+#define MCDE_EXTSRC4CONF_PRI_OVLID(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC4CONF, PRI_OVLID, __x)
+#define MCDE_EXTSRC4CONF_BPP_SHIFT 8
+#define MCDE_EXTSRC4CONF_BPP_MASK 0x00000F00
+#define MCDE_EXTSRC4CONF_BPP_1BPP_PAL 0
+#define MCDE_EXTSRC4CONF_BPP_2BPP_PAL 1
+#define MCDE_EXTSRC4CONF_BPP_4BPP_PAL 2
+#define MCDE_EXTSRC4CONF_BPP_8BPP_PAL 3
+#define MCDE_EXTSRC4CONF_BPP_RGB444 4
+#define MCDE_EXTSRC4CONF_BPP_ARGB4444 5
+#define MCDE_EXTSRC4CONF_BPP_IRGB1555 6
+#define MCDE_EXTSRC4CONF_BPP_RGB565 7
+#define MCDE_EXTSRC4CONF_BPP_RGB888 8
+#define MCDE_EXTSRC4CONF_BPP_XRGB8888 9
+#define MCDE_EXTSRC4CONF_BPP_ARGB8888 10
+#define MCDE_EXTSRC4CONF_BPP_YCBCR422 11
+#define MCDE_EXTSRC4CONF_BPP_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC4CONF, BPP, MCDE_EXTSRC4CONF_BPP_##__x)
+#define MCDE_EXTSRC4CONF_BPP(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC4CONF, BPP, __x)
+#define MCDE_EXTSRC4CONF_BGR_SHIFT 12
+#define MCDE_EXTSRC4CONF_BGR_MASK 0x00001000
+#define MCDE_EXTSRC4CONF_BGR_RGB 0
+#define MCDE_EXTSRC4CONF_BGR_BGR 1
+#define MCDE_EXTSRC4CONF_BGR_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC4CONF, BGR, MCDE_EXTSRC4CONF_BGR_##__x)
+#define MCDE_EXTSRC4CONF_BGR(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC4CONF, BGR, __x)
+#define MCDE_EXTSRC4CONF_BEBO_SHIFT 13
+#define MCDE_EXTSRC4CONF_BEBO_MASK 0x00002000
+#define MCDE_EXTSRC4CONF_BEBO_LITTLE_ENDIAN 0
+#define MCDE_EXTSRC4CONF_BEBO_BIG_ENDIAN 1
+#define MCDE_EXTSRC4CONF_BEBO_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC4CONF, BEBO, MCDE_EXTSRC4CONF_BEBO_##__x)
+#define MCDE_EXTSRC4CONF_BEBO(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC4CONF, BEBO, __x)
+#define MCDE_EXTSRC4CONF_BEPO_SHIFT 14
+#define MCDE_EXTSRC4CONF_BEPO_MASK 0x00004000
+#define MCDE_EXTSRC4CONF_BEPO_LITTLE_ENDIAN 0
+#define MCDE_EXTSRC4CONF_BEPO_BIG_ENDIAN 1
+#define MCDE_EXTSRC4CONF_BEPO_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC4CONF, BEPO, MCDE_EXTSRC4CONF_BEPO_##__x)
+#define MCDE_EXTSRC4CONF_BEPO(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC4CONF, BEPO, __x)
+#define MCDE_EXTSRC5CONF 0x000002AC
+#define MCDE_EXTSRC5CONF_BUF_ID_SHIFT 0
+#define MCDE_EXTSRC5CONF_BUF_ID_MASK 0x00000003
+#define MCDE_EXTSRC5CONF_BUF_ID(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC5CONF, BUF_ID, __x)
+#define MCDE_EXTSRC5CONF_BUF_NB_SHIFT 2
+#define MCDE_EXTSRC5CONF_BUF_NB_MASK 0x0000000C
+#define MCDE_EXTSRC5CONF_BUF_NB(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC5CONF, BUF_NB, __x)
+#define MCDE_EXTSRC5CONF_PRI_OVLID_SHIFT 4
+#define MCDE_EXTSRC5CONF_PRI_OVLID_MASK 0x000000F0
+#define MCDE_EXTSRC5CONF_PRI_OVLID(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC5CONF, PRI_OVLID, __x)
+#define MCDE_EXTSRC5CONF_BPP_SHIFT 8
+#define MCDE_EXTSRC5CONF_BPP_MASK 0x00000F00
+#define MCDE_EXTSRC5CONF_BPP_1BPP_PAL 0
+#define MCDE_EXTSRC5CONF_BPP_2BPP_PAL 1
+#define MCDE_EXTSRC5CONF_BPP_4BPP_PAL 2
+#define MCDE_EXTSRC5CONF_BPP_8BPP_PAL 3
+#define MCDE_EXTSRC5CONF_BPP_RGB444 4
+#define MCDE_EXTSRC5CONF_BPP_ARGB4444 5
+#define MCDE_EXTSRC5CONF_BPP_IRGB1555 6
+#define MCDE_EXTSRC5CONF_BPP_RGB565 7
+#define MCDE_EXTSRC5CONF_BPP_RGB888 8
+#define MCDE_EXTSRC5CONF_BPP_XRGB8888 9
+#define MCDE_EXTSRC5CONF_BPP_ARGB8888 10
+#define MCDE_EXTSRC5CONF_BPP_YCBCR422 11
+#define MCDE_EXTSRC5CONF_BPP_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC5CONF, BPP, MCDE_EXTSRC5CONF_BPP_##__x)
+#define MCDE_EXTSRC5CONF_BPP(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC5CONF, BPP, __x)
+#define MCDE_EXTSRC5CONF_BGR_SHIFT 12
+#define MCDE_EXTSRC5CONF_BGR_MASK 0x00001000
+#define MCDE_EXTSRC5CONF_BGR_RGB 0
+#define MCDE_EXTSRC5CONF_BGR_BGR 1
+#define MCDE_EXTSRC5CONF_BGR_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC5CONF, BGR, MCDE_EXTSRC5CONF_BGR_##__x)
+#define MCDE_EXTSRC5CONF_BGR(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC5CONF, BGR, __x)
+#define MCDE_EXTSRC5CONF_BEBO_SHIFT 13
+#define MCDE_EXTSRC5CONF_BEBO_MASK 0x00002000
+#define MCDE_EXTSRC5CONF_BEBO_LITTLE_ENDIAN 0
+#define MCDE_EXTSRC5CONF_BEBO_BIG_ENDIAN 1
+#define MCDE_EXTSRC5CONF_BEBO_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC5CONF, BEBO, MCDE_EXTSRC5CONF_BEBO_##__x)
+#define MCDE_EXTSRC5CONF_BEBO(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC5CONF, BEBO, __x)
+#define MCDE_EXTSRC5CONF_BEPO_SHIFT 14
+#define MCDE_EXTSRC5CONF_BEPO_MASK 0x00004000
+#define MCDE_EXTSRC5CONF_BEPO_LITTLE_ENDIAN 0
+#define MCDE_EXTSRC5CONF_BEPO_BIG_ENDIAN 1
+#define MCDE_EXTSRC5CONF_BEPO_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC5CONF, BEPO, MCDE_EXTSRC5CONF_BEPO_##__x)
+#define MCDE_EXTSRC5CONF_BEPO(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC5CONF, BEPO, __x)
+#define MCDE_EXTSRC6CONF 0x000002CC
+#define MCDE_EXTSRC6CONF_BUF_ID_SHIFT 0
+#define MCDE_EXTSRC6CONF_BUF_ID_MASK 0x00000003
+#define MCDE_EXTSRC6CONF_BUF_ID(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC6CONF, BUF_ID, __x)
+#define MCDE_EXTSRC6CONF_BUF_NB_SHIFT 2
+#define MCDE_EXTSRC6CONF_BUF_NB_MASK 0x0000000C
+#define MCDE_EXTSRC6CONF_BUF_NB(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC6CONF, BUF_NB, __x)
+#define MCDE_EXTSRC6CONF_PRI_OVLID_SHIFT 4
+#define MCDE_EXTSRC6CONF_PRI_OVLID_MASK 0x000000F0
+#define MCDE_EXTSRC6CONF_PRI_OVLID(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC6CONF, PRI_OVLID, __x)
+#define MCDE_EXTSRC6CONF_BPP_SHIFT 8
+#define MCDE_EXTSRC6CONF_BPP_MASK 0x00000F00
+#define MCDE_EXTSRC6CONF_BPP_1BPP_PAL 0
+#define MCDE_EXTSRC6CONF_BPP_2BPP_PAL 1
+#define MCDE_EXTSRC6CONF_BPP_4BPP_PAL 2
+#define MCDE_EXTSRC6CONF_BPP_8BPP_PAL 3
+#define MCDE_EXTSRC6CONF_BPP_RGB444 4
+#define MCDE_EXTSRC6CONF_BPP_ARGB4444 5
+#define MCDE_EXTSRC6CONF_BPP_IRGB1555 6
+#define MCDE_EXTSRC6CONF_BPP_RGB565 7
+#define MCDE_EXTSRC6CONF_BPP_RGB888 8
+#define MCDE_EXTSRC6CONF_BPP_XRGB8888 9
+#define MCDE_EXTSRC6CONF_BPP_ARGB8888 10
+#define MCDE_EXTSRC6CONF_BPP_YCBCR422 11
+#define MCDE_EXTSRC6CONF_BPP_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC6CONF, BPP, MCDE_EXTSRC6CONF_BPP_##__x)
+#define MCDE_EXTSRC6CONF_BPP(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC6CONF, BPP, __x)
+#define MCDE_EXTSRC6CONF_BGR_SHIFT 12
+#define MCDE_EXTSRC6CONF_BGR_MASK 0x00001000
+#define MCDE_EXTSRC6CONF_BGR_RGB 0
+#define MCDE_EXTSRC6CONF_BGR_BGR 1
+#define MCDE_EXTSRC6CONF_BGR_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC6CONF, BGR, MCDE_EXTSRC6CONF_BGR_##__x)
+#define MCDE_EXTSRC6CONF_BGR(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC6CONF, BGR, __x)
+#define MCDE_EXTSRC6CONF_BEBO_SHIFT 13
+#define MCDE_EXTSRC6CONF_BEBO_MASK 0x00002000
+#define MCDE_EXTSRC6CONF_BEBO_LITTLE_ENDIAN 0
+#define MCDE_EXTSRC6CONF_BEBO_BIG_ENDIAN 1
+#define MCDE_EXTSRC6CONF_BEBO_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC6CONF, BEBO, MCDE_EXTSRC6CONF_BEBO_##__x)
+#define MCDE_EXTSRC6CONF_BEBO(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC6CONF, BEBO, __x)
+#define MCDE_EXTSRC6CONF_BEPO_SHIFT 14
+#define MCDE_EXTSRC6CONF_BEPO_MASK 0x00004000
+#define MCDE_EXTSRC6CONF_BEPO_LITTLE_ENDIAN 0
+#define MCDE_EXTSRC6CONF_BEPO_BIG_ENDIAN 1
+#define MCDE_EXTSRC6CONF_BEPO_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC6CONF, BEPO, MCDE_EXTSRC6CONF_BEPO_##__x)
+#define MCDE_EXTSRC6CONF_BEPO(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC6CONF, BEPO, __x)
+#define MCDE_EXTSRC7CONF 0x000002EC
+#define MCDE_EXTSRC7CONF_BUF_ID_SHIFT 0
+#define MCDE_EXTSRC7CONF_BUF_ID_MASK 0x00000003
+#define MCDE_EXTSRC7CONF_BUF_ID(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC7CONF, BUF_ID, __x)
+#define MCDE_EXTSRC7CONF_BUF_NB_SHIFT 2
+#define MCDE_EXTSRC7CONF_BUF_NB_MASK 0x0000000C
+#define MCDE_EXTSRC7CONF_BUF_NB(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC7CONF, BUF_NB, __x)
+#define MCDE_EXTSRC7CONF_PRI_OVLID_SHIFT 4
+#define MCDE_EXTSRC7CONF_PRI_OVLID_MASK 0x000000F0
+#define MCDE_EXTSRC7CONF_PRI_OVLID(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC7CONF, PRI_OVLID, __x)
+#define MCDE_EXTSRC7CONF_BPP_SHIFT 8
+#define MCDE_EXTSRC7CONF_BPP_MASK 0x00000F00
+#define MCDE_EXTSRC7CONF_BPP_1BPP_PAL 0
+#define MCDE_EXTSRC7CONF_BPP_2BPP_PAL 1
+#define MCDE_EXTSRC7CONF_BPP_4BPP_PAL 2
+#define MCDE_EXTSRC7CONF_BPP_8BPP_PAL 3
+#define MCDE_EXTSRC7CONF_BPP_RGB444 4
+#define MCDE_EXTSRC7CONF_BPP_ARGB4444 5
+#define MCDE_EXTSRC7CONF_BPP_IRGB1555 6
+#define MCDE_EXTSRC7CONF_BPP_RGB565 7
+#define MCDE_EXTSRC7CONF_BPP_RGB888 8
+#define MCDE_EXTSRC7CONF_BPP_XRGB8888 9
+#define MCDE_EXTSRC7CONF_BPP_ARGB8888 10
+#define MCDE_EXTSRC7CONF_BPP_YCBCR422 11
+#define MCDE_EXTSRC7CONF_BPP_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC7CONF, BPP, MCDE_EXTSRC7CONF_BPP_##__x)
+#define MCDE_EXTSRC7CONF_BPP(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC7CONF, BPP, __x)
+#define MCDE_EXTSRC7CONF_BGR_SHIFT 12
+#define MCDE_EXTSRC7CONF_BGR_MASK 0x00001000
+#define MCDE_EXTSRC7CONF_BGR_RGB 0
+#define MCDE_EXTSRC7CONF_BGR_BGR 1
+#define MCDE_EXTSRC7CONF_BGR_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC7CONF, BGR, MCDE_EXTSRC7CONF_BGR_##__x)
+#define MCDE_EXTSRC7CONF_BGR(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC7CONF, BGR, __x)
+#define MCDE_EXTSRC7CONF_BEBO_SHIFT 13
+#define MCDE_EXTSRC7CONF_BEBO_MASK 0x00002000
+#define MCDE_EXTSRC7CONF_BEBO_LITTLE_ENDIAN 0
+#define MCDE_EXTSRC7CONF_BEBO_BIG_ENDIAN 1
+#define MCDE_EXTSRC7CONF_BEBO_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC7CONF, BEBO, MCDE_EXTSRC7CONF_BEBO_##__x)
+#define MCDE_EXTSRC7CONF_BEBO(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC7CONF, BEBO, __x)
+#define MCDE_EXTSRC7CONF_BEPO_SHIFT 14
+#define MCDE_EXTSRC7CONF_BEPO_MASK 0x00004000
+#define MCDE_EXTSRC7CONF_BEPO_LITTLE_ENDIAN 0
+#define MCDE_EXTSRC7CONF_BEPO_BIG_ENDIAN 1
+#define MCDE_EXTSRC7CONF_BEPO_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC7CONF, BEPO, MCDE_EXTSRC7CONF_BEPO_##__x)
+#define MCDE_EXTSRC7CONF_BEPO(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC7CONF, BEPO, __x)
+#define MCDE_EXTSRC8CONF 0x0000030C
+#define MCDE_EXTSRC8CONF_BUF_ID_SHIFT 0
+#define MCDE_EXTSRC8CONF_BUF_ID_MASK 0x00000003
+#define MCDE_EXTSRC8CONF_BUF_ID(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC8CONF, BUF_ID, __x)
+#define MCDE_EXTSRC8CONF_BUF_NB_SHIFT 2
+#define MCDE_EXTSRC8CONF_BUF_NB_MASK 0x0000000C
+#define MCDE_EXTSRC8CONF_BUF_NB(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC8CONF, BUF_NB, __x)
+#define MCDE_EXTSRC8CONF_PRI_OVLID_SHIFT 4
+#define MCDE_EXTSRC8CONF_PRI_OVLID_MASK 0x000000F0
+#define MCDE_EXTSRC8CONF_PRI_OVLID(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC8CONF, PRI_OVLID, __x)
+#define MCDE_EXTSRC8CONF_BPP_SHIFT 8
+#define MCDE_EXTSRC8CONF_BPP_MASK 0x00000F00
+#define MCDE_EXTSRC8CONF_BPP_1BPP_PAL 0
+#define MCDE_EXTSRC8CONF_BPP_2BPP_PAL 1
+#define MCDE_EXTSRC8CONF_BPP_4BPP_PAL 2
+#define MCDE_EXTSRC8CONF_BPP_8BPP_PAL 3
+#define MCDE_EXTSRC8CONF_BPP_RGB444 4
+#define MCDE_EXTSRC8CONF_BPP_ARGB4444 5
+#define MCDE_EXTSRC8CONF_BPP_IRGB1555 6
+#define MCDE_EXTSRC8CONF_BPP_RGB565 7
+#define MCDE_EXTSRC8CONF_BPP_RGB888 8
+#define MCDE_EXTSRC8CONF_BPP_XRGB8888 9
+#define MCDE_EXTSRC8CONF_BPP_ARGB8888 10
+#define MCDE_EXTSRC8CONF_BPP_YCBCR422 11
+#define MCDE_EXTSRC8CONF_BPP_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC8CONF, BPP, MCDE_EXTSRC8CONF_BPP_##__x)
+#define MCDE_EXTSRC8CONF_BPP(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC8CONF, BPP, __x)
+#define MCDE_EXTSRC8CONF_BGR_SHIFT 12
+#define MCDE_EXTSRC8CONF_BGR_MASK 0x00001000
+#define MCDE_EXTSRC8CONF_BGR_RGB 0
+#define MCDE_EXTSRC8CONF_BGR_BGR 1
+#define MCDE_EXTSRC8CONF_BGR_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC8CONF, BGR, MCDE_EXTSRC8CONF_BGR_##__x)
+#define MCDE_EXTSRC8CONF_BGR(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC8CONF, BGR, __x)
+#define MCDE_EXTSRC8CONF_BEBO_SHIFT 13
+#define MCDE_EXTSRC8CONF_BEBO_MASK 0x00002000
+#define MCDE_EXTSRC8CONF_BEBO_LITTLE_ENDIAN 0
+#define MCDE_EXTSRC8CONF_BEBO_BIG_ENDIAN 1
+#define MCDE_EXTSRC8CONF_BEBO_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC8CONF, BEBO, MCDE_EXTSRC8CONF_BEBO_##__x)
+#define MCDE_EXTSRC8CONF_BEBO(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC8CONF, BEBO, __x)
+#define MCDE_EXTSRC8CONF_BEPO_SHIFT 14
+#define MCDE_EXTSRC8CONF_BEPO_MASK 0x00004000
+#define MCDE_EXTSRC8CONF_BEPO_LITTLE_ENDIAN 0
+#define MCDE_EXTSRC8CONF_BEPO_BIG_ENDIAN 1
+#define MCDE_EXTSRC8CONF_BEPO_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC8CONF, BEPO, MCDE_EXTSRC8CONF_BEPO_##__x)
+#define MCDE_EXTSRC8CONF_BEPO(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC8CONF, BEPO, __x)
+#define MCDE_EXTSRC9CONF 0x0000032C
+#define MCDE_EXTSRC9CONF_BUF_ID_SHIFT 0
+#define MCDE_EXTSRC9CONF_BUF_ID_MASK 0x00000003
+#define MCDE_EXTSRC9CONF_BUF_ID(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC9CONF, BUF_ID, __x)
+#define MCDE_EXTSRC9CONF_BUF_NB_SHIFT 2
+#define MCDE_EXTSRC9CONF_BUF_NB_MASK 0x0000000C
+#define MCDE_EXTSRC9CONF_BUF_NB(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC9CONF, BUF_NB, __x)
+#define MCDE_EXTSRC9CONF_PRI_OVLID_SHIFT 4
+#define MCDE_EXTSRC9CONF_PRI_OVLID_MASK 0x000000F0
+#define MCDE_EXTSRC9CONF_PRI_OVLID(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC9CONF, PRI_OVLID, __x)
+#define MCDE_EXTSRC9CONF_BPP_SHIFT 8
+#define MCDE_EXTSRC9CONF_BPP_MASK 0x00000F00
+#define MCDE_EXTSRC9CONF_BPP_1BPP_PAL 0
+#define MCDE_EXTSRC9CONF_BPP_2BPP_PAL 1
+#define MCDE_EXTSRC9CONF_BPP_4BPP_PAL 2
+#define MCDE_EXTSRC9CONF_BPP_8BPP_PAL 3
+#define MCDE_EXTSRC9CONF_BPP_RGB444 4
+#define MCDE_EXTSRC9CONF_BPP_ARGB4444 5
+#define MCDE_EXTSRC9CONF_BPP_IRGB1555 6
+#define MCDE_EXTSRC9CONF_BPP_RGB565 7
+#define MCDE_EXTSRC9CONF_BPP_RGB888 8
+#define MCDE_EXTSRC9CONF_BPP_XRGB8888 9
+#define MCDE_EXTSRC9CONF_BPP_ARGB8888 10
+#define MCDE_EXTSRC9CONF_BPP_YCBCR422 11
+#define MCDE_EXTSRC9CONF_BPP_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC9CONF, BPP, MCDE_EXTSRC9CONF_BPP_##__x)
+#define MCDE_EXTSRC9CONF_BPP(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC9CONF, BPP, __x)
+#define MCDE_EXTSRC9CONF_BGR_SHIFT 12
+#define MCDE_EXTSRC9CONF_BGR_MASK 0x00001000
+#define MCDE_EXTSRC9CONF_BGR_RGB 0
+#define MCDE_EXTSRC9CONF_BGR_BGR 1
+#define MCDE_EXTSRC9CONF_BGR_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC9CONF, BGR, MCDE_EXTSRC9CONF_BGR_##__x)
+#define MCDE_EXTSRC9CONF_BGR(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC9CONF, BGR, __x)
+#define MCDE_EXTSRC9CONF_BEBO_SHIFT 13
+#define MCDE_EXTSRC9CONF_BEBO_MASK 0x00002000
+#define MCDE_EXTSRC9CONF_BEBO_LITTLE_ENDIAN 0
+#define MCDE_EXTSRC9CONF_BEBO_BIG_ENDIAN 1
+#define MCDE_EXTSRC9CONF_BEBO_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC9CONF, BEBO, MCDE_EXTSRC9CONF_BEBO_##__x)
+#define MCDE_EXTSRC9CONF_BEBO(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC9CONF, BEBO, __x)
+#define MCDE_EXTSRC9CONF_BEPO_SHIFT 14
+#define MCDE_EXTSRC9CONF_BEPO_MASK 0x00004000
+#define MCDE_EXTSRC9CONF_BEPO_LITTLE_ENDIAN 0
+#define MCDE_EXTSRC9CONF_BEPO_BIG_ENDIAN 1
+#define MCDE_EXTSRC9CONF_BEPO_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC9CONF, BEPO, MCDE_EXTSRC9CONF_BEPO_##__x)
+#define MCDE_EXTSRC9CONF_BEPO(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC9CONF, BEPO, __x)
+#define MCDE_EXTSRC0CR 0x00000210
+#define MCDE_EXTSRC0CR_GROUPOFFSET 0x20
+#define MCDE_EXTSRC0CR_SEL_MOD_SHIFT 0
+#define MCDE_EXTSRC0CR_SEL_MOD_MASK 0x00000003
+#define MCDE_EXTSRC0CR_SEL_MOD_EXTERNAL_SEL 0
+#define MCDE_EXTSRC0CR_SEL_MOD_AUTO_TOGGLE 1
+#define MCDE_EXTSRC0CR_SEL_MOD_SOFTWARE_SEL 2
+#define MCDE_EXTSRC0CR_SEL_MOD_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC0CR, SEL_MOD, MCDE_EXTSRC0CR_SEL_MOD_##__x)
+#define MCDE_EXTSRC0CR_SEL_MOD(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC0CR, SEL_MOD, __x)
+#define MCDE_EXTSRC0CR_MULTIOVL_CTRL_SHIFT 2
+#define MCDE_EXTSRC0CR_MULTIOVL_CTRL_MASK 0x00000004
+#define MCDE_EXTSRC0CR_MULTIOVL_CTRL_ALL 0
+#define MCDE_EXTSRC0CR_MULTIOVL_CTRL_PRIMARY 1
+#define MCDE_EXTSRC0CR_MULTIOVL_CTRL_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC0CR, MULTIOVL_CTRL, \
+	MCDE_EXTSRC0CR_MULTIOVL_CTRL_##__x)
+#define MCDE_EXTSRC0CR_MULTIOVL_CTRL(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC0CR, MULTIOVL_CTRL, __x)
+#define MCDE_EXTSRC0CR_FS_DIV_DISABLE_SHIFT 3
+#define MCDE_EXTSRC0CR_FS_DIV_DISABLE_MASK 0x00000008
+#define MCDE_EXTSRC0CR_FS_DIV_DISABLE(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC0CR, FS_DIV_DISABLE, __x)
+#define MCDE_EXTSRC0CR_FORCE_FS_DIV_SHIFT 4
+#define MCDE_EXTSRC0CR_FORCE_FS_DIV_MASK 0x00000010
+#define MCDE_EXTSRC0CR_FORCE_FS_DIV(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC0CR, FORCE_FS_DIV, __x)
+#define MCDE_EXTSRC1CR 0x00000230
+#define MCDE_EXTSRC1CR_SEL_MOD_SHIFT 0
+#define MCDE_EXTSRC1CR_SEL_MOD_MASK 0x00000003
+#define MCDE_EXTSRC1CR_SEL_MOD_EXTERNAL_SEL 0
+#define MCDE_EXTSRC1CR_SEL_MOD_AUTO_TOGGLE 1
+#define MCDE_EXTSRC1CR_SEL_MOD_SOFTWARE_SEL 2
+#define MCDE_EXTSRC1CR_SEL_MOD_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC1CR, SEL_MOD, MCDE_EXTSRC1CR_SEL_MOD_##__x)
+#define MCDE_EXTSRC1CR_SEL_MOD(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC1CR, SEL_MOD, __x)
+#define MCDE_EXTSRC1CR_MULTIOVL_CTRL_SHIFT 2
+#define MCDE_EXTSRC1CR_MULTIOVL_CTRL_MASK 0x00000004
+#define MCDE_EXTSRC1CR_MULTIOVL_CTRL_ALL 0
+#define MCDE_EXTSRC1CR_MULTIOVL_CTRL_PRIMARY 1
+#define MCDE_EXTSRC1CR_MULTIOVL_CTRL_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC1CR, MULTIOVL_CTRL, \
+	MCDE_EXTSRC1CR_MULTIOVL_CTRL_##__x)
+#define MCDE_EXTSRC1CR_MULTIOVL_CTRL(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC1CR, MULTIOVL_CTRL, __x)
+#define MCDE_EXTSRC1CR_FS_DIV_DISABLE_SHIFT 3
+#define MCDE_EXTSRC1CR_FS_DIV_DISABLE_MASK 0x00000008
+#define MCDE_EXTSRC1CR_FS_DIV_DISABLE(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC1CR, FS_DIV_DISABLE, __x)
+#define MCDE_EXTSRC1CR_FORCE_FS_DIV_SHIFT 4
+#define MCDE_EXTSRC1CR_FORCE_FS_DIV_MASK 0x00000010
+#define MCDE_EXTSRC1CR_FORCE_FS_DIV(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC1CR, FORCE_FS_DIV, __x)
+#define MCDE_EXTSRC2CR 0x00000250
+#define MCDE_EXTSRC2CR_SEL_MOD_SHIFT 0
+#define MCDE_EXTSRC2CR_SEL_MOD_MASK 0x00000003
+#define MCDE_EXTSRC2CR_SEL_MOD_EXTERNAL_SEL 0
+#define MCDE_EXTSRC2CR_SEL_MOD_AUTO_TOGGLE 1
+#define MCDE_EXTSRC2CR_SEL_MOD_SOFTWARE_SEL 2
+#define MCDE_EXTSRC2CR_SEL_MOD_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC2CR, SEL_MOD, MCDE_EXTSRC2CR_SEL_MOD_##__x)
+#define MCDE_EXTSRC2CR_SEL_MOD(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC2CR, SEL_MOD, __x)
+#define MCDE_EXTSRC2CR_MULTIOVL_CTRL_SHIFT 2
+#define MCDE_EXTSRC2CR_MULTIOVL_CTRL_MASK 0x00000004
+#define MCDE_EXTSRC2CR_MULTIOVL_CTRL_ALL 0
+#define MCDE_EXTSRC2CR_MULTIOVL_CTRL_PRIMARY 1
+#define MCDE_EXTSRC2CR_MULTIOVL_CTRL_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC2CR, MULTIOVL_CTRL, \
+	MCDE_EXTSRC2CR_MULTIOVL_CTRL_##__x)
+#define MCDE_EXTSRC2CR_MULTIOVL_CTRL(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC2CR, MULTIOVL_CTRL, __x)
+#define MCDE_EXTSRC2CR_FS_DIV_DISABLE_SHIFT 3
+#define MCDE_EXTSRC2CR_FS_DIV_DISABLE_MASK 0x00000008
+#define MCDE_EXTSRC2CR_FS_DIV_DISABLE(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC2CR, FS_DIV_DISABLE, __x)
+#define MCDE_EXTSRC2CR_FORCE_FS_DIV_SHIFT 4
+#define MCDE_EXTSRC2CR_FORCE_FS_DIV_MASK 0x00000010
+#define MCDE_EXTSRC2CR_FORCE_FS_DIV(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC2CR, FORCE_FS_DIV, __x)
+#define MCDE_EXTSRC3CR 0x00000270
+#define MCDE_EXTSRC3CR_SEL_MOD_SHIFT 0
+#define MCDE_EXTSRC3CR_SEL_MOD_MASK 0x00000003
+#define MCDE_EXTSRC3CR_SEL_MOD_EXTERNAL_SEL 0
+#define MCDE_EXTSRC3CR_SEL_MOD_AUTO_TOGGLE 1
+#define MCDE_EXTSRC3CR_SEL_MOD_SOFTWARE_SEL 2
+#define MCDE_EXTSRC3CR_SEL_MOD_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC3CR, SEL_MOD, MCDE_EXTSRC3CR_SEL_MOD_##__x)
+#define MCDE_EXTSRC3CR_SEL_MOD(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC3CR, SEL_MOD, __x)
+#define MCDE_EXTSRC3CR_MULTIOVL_CTRL_SHIFT 2
+#define MCDE_EXTSRC3CR_MULTIOVL_CTRL_MASK 0x00000004
+#define MCDE_EXTSRC3CR_MULTIOVL_CTRL_ALL 0
+#define MCDE_EXTSRC3CR_MULTIOVL_CTRL_PRIMARY 1
+#define MCDE_EXTSRC3CR_MULTIOVL_CTRL_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC3CR, MULTIOVL_CTRL, \
+	MCDE_EXTSRC3CR_MULTIOVL_CTRL_##__x)
+#define MCDE_EXTSRC3CR_MULTIOVL_CTRL(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC3CR, MULTIOVL_CTRL, __x)
+#define MCDE_EXTSRC3CR_FS_DIV_DISABLE_SHIFT 3
+#define MCDE_EXTSRC3CR_FS_DIV_DISABLE_MASK 0x00000008
+#define MCDE_EXTSRC3CR_FS_DIV_DISABLE(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC3CR, FS_DIV_DISABLE, __x)
+#define MCDE_EXTSRC3CR_FORCE_FS_DIV_SHIFT 4
+#define MCDE_EXTSRC3CR_FORCE_FS_DIV_MASK 0x00000010
+#define MCDE_EXTSRC3CR_FORCE_FS_DIV(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC3CR, FORCE_FS_DIV, __x)
+#define MCDE_EXTSRC4CR 0x00000290
+#define MCDE_EXTSRC4CR_SEL_MOD_SHIFT 0
+#define MCDE_EXTSRC4CR_SEL_MOD_MASK 0x00000003
+#define MCDE_EXTSRC4CR_SEL_MOD_EXTERNAL_SEL 0
+#define MCDE_EXTSRC4CR_SEL_MOD_AUTO_TOGGLE 1
+#define MCDE_EXTSRC4CR_SEL_MOD_SOFTWARE_SEL 2
+#define MCDE_EXTSRC4CR_SEL_MOD_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC4CR, SEL_MOD, MCDE_EXTSRC4CR_SEL_MOD_##__x)
+#define MCDE_EXTSRC4CR_SEL_MOD(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC4CR, SEL_MOD, __x)
+#define MCDE_EXTSRC4CR_MULTIOVL_CTRL_SHIFT 2
+#define MCDE_EXTSRC4CR_MULTIOVL_CTRL_MASK 0x00000004
+#define MCDE_EXTSRC4CR_MULTIOVL_CTRL_ALL 0
+#define MCDE_EXTSRC4CR_MULTIOVL_CTRL_PRIMARY 1
+#define MCDE_EXTSRC4CR_MULTIOVL_CTRL_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC4CR, MULTIOVL_CTRL, \
+	MCDE_EXTSRC4CR_MULTIOVL_CTRL_##__x)
+#define MCDE_EXTSRC4CR_MULTIOVL_CTRL(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC4CR, MULTIOVL_CTRL, __x)
+#define MCDE_EXTSRC4CR_FS_DIV_DISABLE_SHIFT 3
+#define MCDE_EXTSRC4CR_FS_DIV_DISABLE_MASK 0x00000008
+#define MCDE_EXTSRC4CR_FS_DIV_DISABLE(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC4CR, FS_DIV_DISABLE, __x)
+#define MCDE_EXTSRC4CR_FORCE_FS_DIV_SHIFT 4
+#define MCDE_EXTSRC4CR_FORCE_FS_DIV_MASK 0x00000010
+#define MCDE_EXTSRC4CR_FORCE_FS_DIV(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC4CR, FORCE_FS_DIV, __x)
+#define MCDE_EXTSRC5CR 0x000002B0
+#define MCDE_EXTSRC5CR_SEL_MOD_SHIFT 0
+#define MCDE_EXTSRC5CR_SEL_MOD_MASK 0x00000003
+#define MCDE_EXTSRC5CR_SEL_MOD_EXTERNAL_SEL 0
+#define MCDE_EXTSRC5CR_SEL_MOD_AUTO_TOGGLE 1
+#define MCDE_EXTSRC5CR_SEL_MOD_SOFTWARE_SEL 2
+#define MCDE_EXTSRC5CR_SEL_MOD_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC5CR, SEL_MOD, MCDE_EXTSRC5CR_SEL_MOD_##__x)
+#define MCDE_EXTSRC5CR_SEL_MOD(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC5CR, SEL_MOD, __x)
+#define MCDE_EXTSRC5CR_MULTIOVL_CTRL_SHIFT 2
+#define MCDE_EXTSRC5CR_MULTIOVL_CTRL_MASK 0x00000004
+#define MCDE_EXTSRC5CR_MULTIOVL_CTRL_ALL 0
+#define MCDE_EXTSRC5CR_MULTIOVL_CTRL_PRIMARY 1
+#define MCDE_EXTSRC5CR_MULTIOVL_CTRL_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC5CR, MULTIOVL_CTRL, \
+	MCDE_EXTSRC5CR_MULTIOVL_CTRL_##__x)
+#define MCDE_EXTSRC5CR_MULTIOVL_CTRL(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC5CR, MULTIOVL_CTRL, __x)
+#define MCDE_EXTSRC5CR_FS_DIV_DISABLE_SHIFT 3
+#define MCDE_EXTSRC5CR_FS_DIV_DISABLE_MASK 0x00000008
+#define MCDE_EXTSRC5CR_FS_DIV_DISABLE(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC5CR, FS_DIV_DISABLE, __x)
+#define MCDE_EXTSRC5CR_FORCE_FS_DIV_SHIFT 4
+#define MCDE_EXTSRC5CR_FORCE_FS_DIV_MASK 0x00000010
+#define MCDE_EXTSRC5CR_FORCE_FS_DIV(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC5CR, FORCE_FS_DIV, __x)
+#define MCDE_EXTSRC6CR 0x000002D0
+#define MCDE_EXTSRC6CR_SEL_MOD_SHIFT 0
+#define MCDE_EXTSRC6CR_SEL_MOD_MASK 0x00000003
+#define MCDE_EXTSRC6CR_SEL_MOD_EXTERNAL_SEL 0
+#define MCDE_EXTSRC6CR_SEL_MOD_AUTO_TOGGLE 1
+#define MCDE_EXTSRC6CR_SEL_MOD_SOFTWARE_SEL 2
+#define MCDE_EXTSRC6CR_SEL_MOD_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC6CR, SEL_MOD, MCDE_EXTSRC6CR_SEL_MOD_##__x)
+#define MCDE_EXTSRC6CR_SEL_MOD(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC6CR, SEL_MOD, __x)
+#define MCDE_EXTSRC6CR_MULTIOVL_CTRL_SHIFT 2
+#define MCDE_EXTSRC6CR_MULTIOVL_CTRL_MASK 0x00000004
+#define MCDE_EXTSRC6CR_MULTIOVL_CTRL_ALL 0
+#define MCDE_EXTSRC6CR_MULTIOVL_CTRL_PRIMARY 1
+#define MCDE_EXTSRC6CR_MULTIOVL_CTRL_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC6CR, MULTIOVL_CTRL, \
+	MCDE_EXTSRC6CR_MULTIOVL_CTRL_##__x)
+#define MCDE_EXTSRC6CR_MULTIOVL_CTRL(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC6CR, MULTIOVL_CTRL, __x)
+#define MCDE_EXTSRC6CR_FS_DIV_DISABLE_SHIFT 3
+#define MCDE_EXTSRC6CR_FS_DIV_DISABLE_MASK 0x00000008
+#define MCDE_EXTSRC6CR_FS_DIV_DISABLE(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC6CR, FS_DIV_DISABLE, __x)
+#define MCDE_EXTSRC6CR_FORCE_FS_DIV_SHIFT 4
+#define MCDE_EXTSRC6CR_FORCE_FS_DIV_MASK 0x00000010
+#define MCDE_EXTSRC6CR_FORCE_FS_DIV(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC6CR, FORCE_FS_DIV, __x)
+#define MCDE_EXTSRC7CR 0x000002F0
+#define MCDE_EXTSRC7CR_SEL_MOD_SHIFT 0
+#define MCDE_EXTSRC7CR_SEL_MOD_MASK 0x00000003
+#define MCDE_EXTSRC7CR_SEL_MOD_EXTERNAL_SEL 0
+#define MCDE_EXTSRC7CR_SEL_MOD_AUTO_TOGGLE 1
+#define MCDE_EXTSRC7CR_SEL_MOD_SOFTWARE_SEL 2
+#define MCDE_EXTSRC7CR_SEL_MOD_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC7CR, SEL_MOD, MCDE_EXTSRC7CR_SEL_MOD_##__x)
+#define MCDE_EXTSRC7CR_SEL_MOD(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC7CR, SEL_MOD, __x)
+#define MCDE_EXTSRC7CR_MULTIOVL_CTRL_SHIFT 2
+#define MCDE_EXTSRC7CR_MULTIOVL_CTRL_MASK 0x00000004
+#define MCDE_EXTSRC7CR_MULTIOVL_CTRL_ALL 0
+#define MCDE_EXTSRC7CR_MULTIOVL_CTRL_PRIMARY 1
+#define MCDE_EXTSRC7CR_MULTIOVL_CTRL_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC7CR, MULTIOVL_CTRL, \
+	MCDE_EXTSRC7CR_MULTIOVL_CTRL_##__x)
+#define MCDE_EXTSRC7CR_MULTIOVL_CTRL(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC7CR, MULTIOVL_CTRL, __x)
+#define MCDE_EXTSRC7CR_FS_DIV_DISABLE_SHIFT 3
+#define MCDE_EXTSRC7CR_FS_DIV_DISABLE_MASK 0x00000008
+#define MCDE_EXTSRC7CR_FS_DIV_DISABLE(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC7CR, FS_DIV_DISABLE, __x)
+#define MCDE_EXTSRC7CR_FORCE_FS_DIV_SHIFT 4
+#define MCDE_EXTSRC7CR_FORCE_FS_DIV_MASK 0x00000010
+#define MCDE_EXTSRC7CR_FORCE_FS_DIV(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC7CR, FORCE_FS_DIV, __x)
+#define MCDE_EXTSRC8CR 0x00000310
+#define MCDE_EXTSRC8CR_SEL_MOD_SHIFT 0
+#define MCDE_EXTSRC8CR_SEL_MOD_MASK 0x00000003
+#define MCDE_EXTSRC8CR_SEL_MOD_EXTERNAL_SEL 0
+#define MCDE_EXTSRC8CR_SEL_MOD_AUTO_TOGGLE 1
+#define MCDE_EXTSRC8CR_SEL_MOD_SOFTWARE_SEL 2
+#define MCDE_EXTSRC8CR_SEL_MOD_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC8CR, SEL_MOD, MCDE_EXTSRC8CR_SEL_MOD_##__x)
+#define MCDE_EXTSRC8CR_SEL_MOD(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC8CR, SEL_MOD, __x)
+#define MCDE_EXTSRC8CR_MULTIOVL_CTRL_SHIFT 2
+#define MCDE_EXTSRC8CR_MULTIOVL_CTRL_MASK 0x00000004
+#define MCDE_EXTSRC8CR_MULTIOVL_CTRL_ALL 0
+#define MCDE_EXTSRC8CR_MULTIOVL_CTRL_PRIMARY 1
+#define MCDE_EXTSRC8CR_MULTIOVL_CTRL_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC8CR, MULTIOVL_CTRL, \
+	MCDE_EXTSRC8CR_MULTIOVL_CTRL_##__x)
+#define MCDE_EXTSRC8CR_MULTIOVL_CTRL(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC8CR, MULTIOVL_CTRL, __x)
+#define MCDE_EXTSRC8CR_FS_DIV_DISABLE_SHIFT 3
+#define MCDE_EXTSRC8CR_FS_DIV_DISABLE_MASK 0x00000008
+#define MCDE_EXTSRC8CR_FS_DIV_DISABLE(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC8CR, FS_DIV_DISABLE, __x)
+#define MCDE_EXTSRC8CR_FORCE_FS_DIV_SHIFT 4
+#define MCDE_EXTSRC8CR_FORCE_FS_DIV_MASK 0x00000010
+#define MCDE_EXTSRC8CR_FORCE_FS_DIV(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC8CR, FORCE_FS_DIV, __x)
+#define MCDE_EXTSRC9CR 0x00000330
+#define MCDE_EXTSRC9CR_SEL_MOD_SHIFT 0
+#define MCDE_EXTSRC9CR_SEL_MOD_MASK 0x00000003
+#define MCDE_EXTSRC9CR_SEL_MOD_EXTERNAL_SEL 0
+#define MCDE_EXTSRC9CR_SEL_MOD_AUTO_TOGGLE 1
+#define MCDE_EXTSRC9CR_SEL_MOD_SOFTWARE_SEL 2
+#define MCDE_EXTSRC9CR_SEL_MOD_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC9CR, SEL_MOD, MCDE_EXTSRC9CR_SEL_MOD_##__x)
+#define MCDE_EXTSRC9CR_SEL_MOD(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC9CR, SEL_MOD, __x)
+#define MCDE_EXTSRC9CR_MULTIOVL_CTRL_SHIFT 2
+#define MCDE_EXTSRC9CR_MULTIOVL_CTRL_MASK 0x00000004
+#define MCDE_EXTSRC9CR_MULTIOVL_CTRL_ALL 0
+#define MCDE_EXTSRC9CR_MULTIOVL_CTRL_PRIMARY 1
+#define MCDE_EXTSRC9CR_MULTIOVL_CTRL_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC9CR, MULTIOVL_CTRL, \
+	MCDE_EXTSRC9CR_MULTIOVL_CTRL_##__x)
+#define MCDE_EXTSRC9CR_MULTIOVL_CTRL(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC9CR, MULTIOVL_CTRL, __x)
+#define MCDE_EXTSRC9CR_FS_DIV_DISABLE_SHIFT 3
+#define MCDE_EXTSRC9CR_FS_DIV_DISABLE_MASK 0x00000008
+#define MCDE_EXTSRC9CR_FS_DIV_DISABLE(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC9CR, FS_DIV_DISABLE, __x)
+#define MCDE_EXTSRC9CR_FORCE_FS_DIV_SHIFT 4
+#define MCDE_EXTSRC9CR_FORCE_FS_DIV_MASK 0x00000010
+#define MCDE_EXTSRC9CR_FORCE_FS_DIV(__x) \
+	MCDE_VAL2REG(MCDE_EXTSRC9CR, FORCE_FS_DIV, __x)
+#define MCDE_OVL0CR 0x00000400
+#define MCDE_OVL0CR_GROUPOFFSET 0x20
+#define MCDE_OVL0CR_OVLEN_SHIFT 0
+#define MCDE_OVL0CR_OVLEN_MASK 0x00000001
+#define MCDE_OVL0CR_OVLEN(__x) \
+	MCDE_VAL2REG(MCDE_OVL0CR, OVLEN, __x)
+#define MCDE_OVL0CR_COLCCTRL_SHIFT 1
+#define MCDE_OVL0CR_COLCCTRL_MASK 0x00000006
+#define MCDE_OVL0CR_COLCCTRL_DISABLED 0
+#define MCDE_OVL0CR_COLCCTRL_ENABLED_NO_SAT 1
+#define MCDE_OVL0CR_COLCCTRL_ENABLED_SAT 2
+#define MCDE_OVL0CR_COLCCTRL_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_OVL0CR, COLCCTRL, MCDE_OVL0CR_COLCCTRL_##__x)
+#define MCDE_OVL0CR_COLCCTRL(__x) \
+	MCDE_VAL2REG(MCDE_OVL0CR, COLCCTRL, __x)
+#define MCDE_OVL0CR_CKEYGEN_SHIFT 3
+#define MCDE_OVL0CR_CKEYGEN_MASK 0x00000008
+#define MCDE_OVL0CR_CKEYGEN(__x) \
+	MCDE_VAL2REG(MCDE_OVL0CR, CKEYGEN, __x)
+#define MCDE_OVL0CR_ALPHAPMEN_SHIFT 4
+#define MCDE_OVL0CR_ALPHAPMEN_MASK 0x00000010
+#define MCDE_OVL0CR_ALPHAPMEN(__x) \
+	MCDE_VAL2REG(MCDE_OVL0CR, ALPHAPMEN, __x)
+#define MCDE_OVL0CR_OVLF_SHIFT 5
+#define MCDE_OVL0CR_OVLF_MASK 0x00000020
+#define MCDE_OVL0CR_OVLF(__x) \
+	MCDE_VAL2REG(MCDE_OVL0CR, OVLF, __x)
+#define MCDE_OVL0CR_OVLR_SHIFT 6
+#define MCDE_OVL0CR_OVLR_MASK 0x00000040
+#define MCDE_OVL0CR_OVLR(__x) \
+	MCDE_VAL2REG(MCDE_OVL0CR, OVLR, __x)
+#define MCDE_OVL0CR_OVLB_SHIFT 7
+#define MCDE_OVL0CR_OVLB_MASK 0x00000080
+#define MCDE_OVL0CR_OVLB(__x) \
+	MCDE_VAL2REG(MCDE_OVL0CR, OVLB, __x)
+#define MCDE_OVL0CR_FETCH_ROPC_SHIFT 8
+#define MCDE_OVL0CR_FETCH_ROPC_MASK 0x0000FF00
+#define MCDE_OVL0CR_FETCH_ROPC(__x) \
+	MCDE_VAL2REG(MCDE_OVL0CR, FETCH_ROPC, __x)
+#define MCDE_OVL0CR_STBPRIO_SHIFT 16
+#define MCDE_OVL0CR_STBPRIO_MASK 0x000F0000
+#define MCDE_OVL0CR_STBPRIO(__x) \
+	MCDE_VAL2REG(MCDE_OVL0CR, STBPRIO, __x)
+#define MCDE_OVL0CR_BURSTSIZE_SHIFT 20
+#define MCDE_OVL0CR_BURSTSIZE_MASK 0x00F00000
+#define MCDE_OVL0CR_BURSTSIZE_1W 0
+#define MCDE_OVL0CR_BURSTSIZE_2W 1
+#define MCDE_OVL0CR_BURSTSIZE_4W 2
+#define MCDE_OVL0CR_BURSTSIZE_8W 3
+#define MCDE_OVL0CR_BURSTSIZE_16W 4
+#define MCDE_OVL0CR_BURSTSIZE_HW_1W 8
+#define MCDE_OVL0CR_BURSTSIZE_HW_2W 9
+#define MCDE_OVL0CR_BURSTSIZE_HW_4W 10
+#define MCDE_OVL0CR_BURSTSIZE_HW_8W 11
+#define MCDE_OVL0CR_BURSTSIZE_HW_16W 12
+#define MCDE_OVL0CR_BURSTSIZE_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_OVL0CR, BURSTSIZE, MCDE_OVL0CR_BURSTSIZE_##__x)
+#define MCDE_OVL0CR_BURSTSIZE(__x) \
+	MCDE_VAL2REG(MCDE_OVL0CR, BURSTSIZE, __x)
+#define MCDE_OVL0CR_MAXOUTSTANDING_SHIFT 24
+#define MCDE_OVL0CR_MAXOUTSTANDING_MASK 0x0F000000
+#define MCDE_OVL0CR_MAXOUTSTANDING_1_REQ 0
+#define MCDE_OVL0CR_MAXOUTSTANDING_2_REQ 1
+#define MCDE_OVL0CR_MAXOUTSTANDING_4_REQ 2
+#define MCDE_OVL0CR_MAXOUTSTANDING_8_REQ 3
+#define MCDE_OVL0CR_MAXOUTSTANDING_16_REQ 4
+#define MCDE_OVL0CR_MAXOUTSTANDING_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_OVL0CR, MAXOUTSTANDING, \
+	MCDE_OVL0CR_MAXOUTSTANDING_##__x)
+#define MCDE_OVL0CR_MAXOUTSTANDING(__x) \
+	MCDE_VAL2REG(MCDE_OVL0CR, MAXOUTSTANDING, __x)
+#define MCDE_OVL0CR_ROTBURSTSIZE_SHIFT 28
+#define MCDE_OVL0CR_ROTBURSTSIZE_MASK 0xF0000000
+#define MCDE_OVL0CR_ROTBURSTSIZE_1W 0
+#define MCDE_OVL0CR_ROTBURSTSIZE_2W 1
+#define MCDE_OVL0CR_ROTBURSTSIZE_4W 2
+#define MCDE_OVL0CR_ROTBURSTSIZE_8W 3
+#define MCDE_OVL0CR_ROTBURSTSIZE_16W 4
+#define MCDE_OVL0CR_ROTBURSTSIZE_HW_1W 8
+#define MCDE_OVL0CR_ROTBURSTSIZE_HW_2W 9
+#define MCDE_OVL0CR_ROTBURSTSIZE_HW_4W 10
+#define MCDE_OVL0CR_ROTBURSTSIZE_HW_8W 11
+#define MCDE_OVL0CR_ROTBURSTSIZE_HW_16W 12
+#define MCDE_OVL0CR_ROTBURSTSIZE_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_OVL0CR, ROTBURSTSIZE, MCDE_OVL0CR_ROTBURSTSIZE_##__x)
+#define MCDE_OVL0CR_ROTBURSTSIZE(__x) \
+	MCDE_VAL2REG(MCDE_OVL0CR, ROTBURSTSIZE, __x)
+#define MCDE_OVL1CR 0x00000420
+#define MCDE_OVL1CR_OVLEN_SHIFT 0
+#define MCDE_OVL1CR_OVLEN_MASK 0x00000001
+#define MCDE_OVL1CR_OVLEN(__x) \
+	MCDE_VAL2REG(MCDE_OVL1CR, OVLEN, __x)
+#define MCDE_OVL1CR_COLCCTRL_SHIFT 1
+#define MCDE_OVL1CR_COLCCTRL_MASK 0x00000006
+#define MCDE_OVL1CR_COLCCTRL_DISABLED 0
+#define MCDE_OVL1CR_COLCCTRL_ENABLED_NO_SAT 1
+#define MCDE_OVL1CR_COLCCTRL_ENABLED_SAT 2
+#define MCDE_OVL1CR_COLCCTRL_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_OVL1CR, COLCCTRL, MCDE_OVL1CR_COLCCTRL_##__x)
+#define MCDE_OVL1CR_COLCCTRL(__x) \
+	MCDE_VAL2REG(MCDE_OVL1CR, COLCCTRL, __x)
+#define MCDE_OVL1CR_CKEYGEN_SHIFT 3
+#define MCDE_OVL1CR_CKEYGEN_MASK 0x00000008
+#define MCDE_OVL1CR_CKEYGEN(__x) \
+	MCDE_VAL2REG(MCDE_OVL1CR, CKEYGEN, __x)
+#define MCDE_OVL1CR_ALPHAPMEN_SHIFT 4
+#define MCDE_OVL1CR_ALPHAPMEN_MASK 0x00000010
+#define MCDE_OVL1CR_ALPHAPMEN(__x) \
+	MCDE_VAL2REG(MCDE_OVL1CR, ALPHAPMEN, __x)
+#define MCDE_OVL1CR_OVLF_SHIFT 5
+#define MCDE_OVL1CR_OVLF_MASK 0x00000020
+#define MCDE_OVL1CR_OVLF(__x) \
+	MCDE_VAL2REG(MCDE_OVL1CR, OVLF, __x)
+#define MCDE_OVL1CR_OVLR_SHIFT 6
+#define MCDE_OVL1CR_OVLR_MASK 0x00000040
+#define MCDE_OVL1CR_OVLR(__x) \
+	MCDE_VAL2REG(MCDE_OVL1CR, OVLR, __x)
+#define MCDE_OVL1CR_OVLB_SHIFT 7
+#define MCDE_OVL1CR_OVLB_MASK 0x00000080
+#define MCDE_OVL1CR_OVLB(__x) \
+	MCDE_VAL2REG(MCDE_OVL1CR, OVLB, __x)
+#define MCDE_OVL1CR_FETCH_ROPC_SHIFT 8
+#define MCDE_OVL1CR_FETCH_ROPC_MASK 0x0000FF00
+#define MCDE_OVL1CR_FETCH_ROPC(__x) \
+	MCDE_VAL2REG(MCDE_OVL1CR, FETCH_ROPC, __x)
+#define MCDE_OVL1CR_STBPRIO_SHIFT 16
+#define MCDE_OVL1CR_STBPRIO_MASK 0x000F0000
+#define MCDE_OVL1CR_STBPRIO(__x) \
+	MCDE_VAL2REG(MCDE_OVL1CR, STBPRIO, __x)
+#define MCDE_OVL1CR_BURSTSIZE_SHIFT 20
+#define MCDE_OVL1CR_BURSTSIZE_MASK 0x00F00000
+#define MCDE_OVL1CR_BURSTSIZE_1W 0
+#define MCDE_OVL1CR_BURSTSIZE_2W 1
+#define MCDE_OVL1CR_BURSTSIZE_4W 2
+#define MCDE_OVL1CR_BURSTSIZE_8W 3
+#define MCDE_OVL1CR_BURSTSIZE_16W 4
+#define MCDE_OVL1CR_BURSTSIZE_HW_1W 8
+#define MCDE_OVL1CR_BURSTSIZE_HW_2W 9
+#define MCDE_OVL1CR_BURSTSIZE_HW_4W 10
+#define MCDE_OVL1CR_BURSTSIZE_HW_8W 11
+#define MCDE_OVL1CR_BURSTSIZE_HW_16W 12
+#define MCDE_OVL1CR_BURSTSIZE_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_OVL1CR, BURSTSIZE, MCDE_OVL1CR_BURSTSIZE_##__x)
+#define MCDE_OVL1CR_BURSTSIZE(__x) \
+	MCDE_VAL2REG(MCDE_OVL1CR, BURSTSIZE, __x)
+#define MCDE_OVL1CR_MAXOUTSTANDING_SHIFT 24
+#define MCDE_OVL1CR_MAXOUTSTANDING_MASK 0x0F000000
+#define MCDE_OVL1CR_MAXOUTSTANDING_1_REQ 0
+#define MCDE_OVL1CR_MAXOUTSTANDING_2_REQ 1
+#define MCDE_OVL1CR_MAXOUTSTANDING_4_REQ 2
+#define MCDE_OVL1CR_MAXOUTSTANDING_8_REQ 3
+#define MCDE_OVL1CR_MAXOUTSTANDING_16_REQ 4
+#define MCDE_OVL1CR_MAXOUTSTANDING_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_OVL1CR, MAXOUTSTANDING, \
+	MCDE_OVL1CR_MAXOUTSTANDING_##__x)
+#define MCDE_OVL1CR_MAXOUTSTANDING(__x) \
+	MCDE_VAL2REG(MCDE_OVL1CR, MAXOUTSTANDING, __x)
+#define MCDE_OVL1CR_ROTBURSTSIZE_SHIFT 28
+#define MCDE_OVL1CR_ROTBURSTSIZE_MASK 0xF0000000
+#define MCDE_OVL1CR_ROTBURSTSIZE_1W 0
+#define MCDE_OVL1CR_ROTBURSTSIZE_2W 1
+#define MCDE_OVL1CR_ROTBURSTSIZE_4W 2
+#define MCDE_OVL1CR_ROTBURSTSIZE_8W 3
+#define MCDE_OVL1CR_ROTBURSTSIZE_16W 4
+#define MCDE_OVL1CR_ROTBURSTSIZE_HW_1W 8
+#define MCDE_OVL1CR_ROTBURSTSIZE_HW_2W 9
+#define MCDE_OVL1CR_ROTBURSTSIZE_HW_4W 10
+#define MCDE_OVL1CR_ROTBURSTSIZE_HW_8W 11
+#define MCDE_OVL1CR_ROTBURSTSIZE_HW_16W 12
+#define MCDE_OVL1CR_ROTBURSTSIZE_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_OVL1CR, ROTBURSTSIZE, MCDE_OVL1CR_ROTBURSTSIZE_##__x)
+#define MCDE_OVL1CR_ROTBURSTSIZE(__x) \
+	MCDE_VAL2REG(MCDE_OVL1CR, ROTBURSTSIZE, __x)
+#define MCDE_OVL2CR 0x00000440
+#define MCDE_OVL2CR_OVLEN_SHIFT 0
+#define MCDE_OVL2CR_OVLEN_MASK 0x00000001
+#define MCDE_OVL2CR_OVLEN(__x) \
+	MCDE_VAL2REG(MCDE_OVL2CR, OVLEN, __x)
+#define MCDE_OVL2CR_COLCCTRL_SHIFT 1
+#define MCDE_OVL2CR_COLCCTRL_MASK 0x00000006
+#define MCDE_OVL2CR_COLCCTRL_DISABLED 0
+#define MCDE_OVL2CR_COLCCTRL_ENABLED_NO_SAT 1
+#define MCDE_OVL2CR_COLCCTRL_ENABLED_SAT 2
+#define MCDE_OVL2CR_COLCCTRL_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_OVL2CR, COLCCTRL, MCDE_OVL2CR_COLCCTRL_##__x)
+#define MCDE_OVL2CR_COLCCTRL(__x) \
+	MCDE_VAL2REG(MCDE_OVL2CR, COLCCTRL, __x)
+#define MCDE_OVL2CR_CKEYGEN_SHIFT 3
+#define MCDE_OVL2CR_CKEYGEN_MASK 0x00000008
+#define MCDE_OVL2CR_CKEYGEN(__x) \
+	MCDE_VAL2REG(MCDE_OVL2CR, CKEYGEN, __x)
+#define MCDE_OVL2CR_ALPHAPMEN_SHIFT 4
+#define MCDE_OVL2CR_ALPHAPMEN_MASK 0x00000010
+#define MCDE_OVL2CR_ALPHAPMEN(__x) \
+	MCDE_VAL2REG(MCDE_OVL2CR, ALPHAPMEN, __x)
+#define MCDE_OVL2CR_OVLF_SHIFT 5
+#define MCDE_OVL2CR_OVLF_MASK 0x00000020
+#define MCDE_OVL2CR_OVLF(__x) \
+	MCDE_VAL2REG(MCDE_OVL2CR, OVLF, __x)
+#define MCDE_OVL2CR_OVLR_SHIFT 6
+#define MCDE_OVL2CR_OVLR_MASK 0x00000040
+#define MCDE_OVL2CR_OVLR(__x) \
+	MCDE_VAL2REG(MCDE_OVL2CR, OVLR, __x)
+#define MCDE_OVL2CR_OVLB_SHIFT 7
+#define MCDE_OVL2CR_OVLB_MASK 0x00000080
+#define MCDE_OVL2CR_OVLB(__x) \
+	MCDE_VAL2REG(MCDE_OVL2CR, OVLB, __x)
+#define MCDE_OVL2CR_FETCH_ROPC_SHIFT 8
+#define MCDE_OVL2CR_FETCH_ROPC_MASK 0x0000FF00
+#define MCDE_OVL2CR_FETCH_ROPC(__x) \
+	MCDE_VAL2REG(MCDE_OVL2CR, FETCH_ROPC, __x)
+#define MCDE_OVL2CR_STBPRIO_SHIFT 16
+#define MCDE_OVL2CR_STBPRIO_MASK 0x000F0000
+#define MCDE_OVL2CR_STBPRIO(__x) \
+	MCDE_VAL2REG(MCDE_OVL2CR, STBPRIO, __x)
+#define MCDE_OVL2CR_BURSTSIZE_SHIFT 20
+#define MCDE_OVL2CR_BURSTSIZE_MASK 0x00F00000
+#define MCDE_OVL2CR_BURSTSIZE_1W 0
+#define MCDE_OVL2CR_BURSTSIZE_2W 1
+#define MCDE_OVL2CR_BURSTSIZE_4W 2
+#define MCDE_OVL2CR_BURSTSIZE_8W 3
+#define MCDE_OVL2CR_BURSTSIZE_16W 4
+#define MCDE_OVL2CR_BURSTSIZE_HW_1W 8
+#define MCDE_OVL2CR_BURSTSIZE_HW_2W 9
+#define MCDE_OVL2CR_BURSTSIZE_HW_4W 10
+#define MCDE_OVL2CR_BURSTSIZE_HW_8W 11
+#define MCDE_OVL2CR_BURSTSIZE_HW_16W 12
+#define MCDE_OVL2CR_BURSTSIZE_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_OVL2CR, BURSTSIZE, MCDE_OVL2CR_BURSTSIZE_##__x)
+#define MCDE_OVL2CR_BURSTSIZE(__x) \
+	MCDE_VAL2REG(MCDE_OVL2CR, BURSTSIZE, __x)
+#define MCDE_OVL2CR_MAXOUTSTANDING_SHIFT 24
+#define MCDE_OVL2CR_MAXOUTSTANDING_MASK 0x0F000000
+#define MCDE_OVL2CR_MAXOUTSTANDING_1_REQ 0
+#define MCDE_OVL2CR_MAXOUTSTANDING_2_REQ 1
+#define MCDE_OVL2CR_MAXOUTSTANDING_4_REQ 2
+#define MCDE_OVL2CR_MAXOUTSTANDING_8_REQ 3
+#define MCDE_OVL2CR_MAXOUTSTANDING_16_REQ 4
+#define MCDE_OVL2CR_MAXOUTSTANDING_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_OVL2CR, MAXOUTSTANDING, \
+	MCDE_OVL2CR_MAXOUTSTANDING_##__x)
+#define MCDE_OVL2CR_MAXOUTSTANDING(__x) \
+	MCDE_VAL2REG(MCDE_OVL2CR, MAXOUTSTANDING, __x)
+#define MCDE_OVL2CR_ROTBURSTSIZE_SHIFT 28
+#define MCDE_OVL2CR_ROTBURSTSIZE_MASK 0xF0000000
+#define MCDE_OVL2CR_ROTBURSTSIZE_1W 0
+#define MCDE_OVL2CR_ROTBURSTSIZE_2W 1
+#define MCDE_OVL2CR_ROTBURSTSIZE_4W 2
+#define MCDE_OVL2CR_ROTBURSTSIZE_8W 3
+#define MCDE_OVL2CR_ROTBURSTSIZE_16W 4
+#define MCDE_OVL2CR_ROTBURSTSIZE_HW_1W 8
+#define MCDE_OVL2CR_ROTBURSTSIZE_HW_2W 9
+#define MCDE_OVL2CR_ROTBURSTSIZE_HW_4W 10
+#define MCDE_OVL2CR_ROTBURSTSIZE_HW_8W 11
+#define MCDE_OVL2CR_ROTBURSTSIZE_HW_16W 12
+#define MCDE_OVL2CR_ROTBURSTSIZE_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_OVL2CR, ROTBURSTSIZE, MCDE_OVL2CR_ROTBURSTSIZE_##__x)
+#define MCDE_OVL2CR_ROTBURSTSIZE(__x) \
+	MCDE_VAL2REG(MCDE_OVL2CR, ROTBURSTSIZE, __x)
+#define MCDE_OVL3CR 0x00000460
+#define MCDE_OVL3CR_OVLEN_SHIFT 0
+#define MCDE_OVL3CR_OVLEN_MASK 0x00000001
+#define MCDE_OVL3CR_OVLEN(__x) \
+	MCDE_VAL2REG(MCDE_OVL3CR, OVLEN, __x)
+#define MCDE_OVL3CR_COLCCTRL_SHIFT 1
+#define MCDE_OVL3CR_COLCCTRL_MASK 0x00000006
+#define MCDE_OVL3CR_COLCCTRL_DISABLED 0
+#define MCDE_OVL3CR_COLCCTRL_ENABLED_NO_SAT 1
+#define MCDE_OVL3CR_COLCCTRL_ENABLED_SAT 2
+#define MCDE_OVL3CR_COLCCTRL_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_OVL3CR, COLCCTRL, MCDE_OVL3CR_COLCCTRL_##__x)
+#define MCDE_OVL3CR_COLCCTRL(__x) \
+	MCDE_VAL2REG(MCDE_OVL3CR, COLCCTRL, __x)
+#define MCDE_OVL3CR_CKEYGEN_SHIFT 3
+#define MCDE_OVL3CR_CKEYGEN_MASK 0x00000008
+#define MCDE_OVL3CR_CKEYGEN(__x) \
+	MCDE_VAL2REG(MCDE_OVL3CR, CKEYGEN, __x)
+#define MCDE_OVL3CR_ALPHAPMEN_SHIFT 4
+#define MCDE_OVL3CR_ALPHAPMEN_MASK 0x00000010
+#define MCDE_OVL3CR_ALPHAPMEN(__x) \
+	MCDE_VAL2REG(MCDE_OVL3CR, ALPHAPMEN, __x)
+#define MCDE_OVL3CR_OVLF_SHIFT 5
+#define MCDE_OVL3CR_OVLF_MASK 0x00000020
+#define MCDE_OVL3CR_OVLF(__x) \
+	MCDE_VAL2REG(MCDE_OVL3CR, OVLF, __x)
+#define MCDE_OVL3CR_OVLR_SHIFT 6
+#define MCDE_OVL3CR_OVLR_MASK 0x00000040
+#define MCDE_OVL3CR_OVLR(__x) \
+	MCDE_VAL2REG(MCDE_OVL3CR, OVLR, __x)
+#define MCDE_OVL3CR_OVLB_SHIFT 7
+#define MCDE_OVL3CR_OVLB_MASK 0x00000080
+#define MCDE_OVL3CR_OVLB(__x) \
+	MCDE_VAL2REG(MCDE_OVL3CR, OVLB, __x)
+#define MCDE_OVL3CR_FETCH_ROPC_SHIFT 8
+#define MCDE_OVL3CR_FETCH_ROPC_MASK 0x0000FF00
+#define MCDE_OVL3CR_FETCH_ROPC(__x) \
+	MCDE_VAL2REG(MCDE_OVL3CR, FETCH_ROPC, __x)
+#define MCDE_OVL3CR_STBPRIO_SHIFT 16
+#define MCDE_OVL3CR_STBPRIO_MASK 0x000F0000
+#define MCDE_OVL3CR_STBPRIO(__x) \
+	MCDE_VAL2REG(MCDE_OVL3CR, STBPRIO, __x)
+#define MCDE_OVL3CR_BURSTSIZE_SHIFT 20
+#define MCDE_OVL3CR_BURSTSIZE_MASK 0x00F00000
+#define MCDE_OVL3CR_BURSTSIZE_1W 0
+#define MCDE_OVL3CR_BURSTSIZE_2W 1
+#define MCDE_OVL3CR_BURSTSIZE_4W 2
+#define MCDE_OVL3CR_BURSTSIZE_8W 3
+#define MCDE_OVL3CR_BURSTSIZE_16W 4
+#define MCDE_OVL3CR_BURSTSIZE_HW_1W 8
+#define MCDE_OVL3CR_BURSTSIZE_HW_2W 9
+#define MCDE_OVL3CR_BURSTSIZE_HW_4W 10
+#define MCDE_OVL3CR_BURSTSIZE_HW_8W 11
+#define MCDE_OVL3CR_BURSTSIZE_HW_16W 12
+#define MCDE_OVL3CR_BURSTSIZE_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_OVL3CR, BURSTSIZE, MCDE_OVL3CR_BURSTSIZE_##__x)
+#define MCDE_OVL3CR_BURSTSIZE(__x) \
+	MCDE_VAL2REG(MCDE_OVL3CR, BURSTSIZE, __x)
+#define MCDE_OVL3CR_MAXOUTSTANDING_SHIFT 24
+#define MCDE_OVL3CR_MAXOUTSTANDING_MASK 0x0F000000
+#define MCDE_OVL3CR_MAXOUTSTANDING_1_REQ 0
+#define MCDE_OVL3CR_MAXOUTSTANDING_2_REQ 1
+#define MCDE_OVL3CR_MAXOUTSTANDING_4_REQ 2
+#define MCDE_OVL3CR_MAXOUTSTANDING_8_REQ 3
+#define MCDE_OVL3CR_MAXOUTSTANDING_16_REQ 4
+#define MCDE_OVL3CR_MAXOUTSTANDING_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_OVL3CR, MAXOUTSTANDING, \
+	MCDE_OVL3CR_MAXOUTSTANDING_##__x)
+#define MCDE_OVL3CR_MAXOUTSTANDING(__x) \
+	MCDE_VAL2REG(MCDE_OVL3CR, MAXOUTSTANDING, __x)
+#define MCDE_OVL3CR_ROTBURSTSIZE_SHIFT 28
+#define MCDE_OVL3CR_ROTBURSTSIZE_MASK 0xF0000000
+#define MCDE_OVL3CR_ROTBURSTSIZE_1W 0
+#define MCDE_OVL3CR_ROTBURSTSIZE_2W 1
+#define MCDE_OVL3CR_ROTBURSTSIZE_4W 2
+#define MCDE_OVL3CR_ROTBURSTSIZE_8W 3
+#define MCDE_OVL3CR_ROTBURSTSIZE_16W 4
+#define MCDE_OVL3CR_ROTBURSTSIZE_HW_1W 8
+#define MCDE_OVL3CR_ROTBURSTSIZE_HW_2W 9
+#define MCDE_OVL3CR_ROTBURSTSIZE_HW_4W 10
+#define MCDE_OVL3CR_ROTBURSTSIZE_HW_8W 11
+#define MCDE_OVL3CR_ROTBURSTSIZE_HW_16W 12
+#define MCDE_OVL3CR_ROTBURSTSIZE_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_OVL3CR, ROTBURSTSIZE, MCDE_OVL3CR_ROTBURSTSIZE_##__x)
+#define MCDE_OVL3CR_ROTBURSTSIZE(__x) \
+	MCDE_VAL2REG(MCDE_OVL3CR, ROTBURSTSIZE, __x)
+#define MCDE_OVL4CR 0x00000480
+#define MCDE_OVL4CR_OVLEN_SHIFT 0
+#define MCDE_OVL4CR_OVLEN_MASK 0x00000001
+#define MCDE_OVL4CR_OVLEN(__x) \
+	MCDE_VAL2REG(MCDE_OVL4CR, OVLEN, __x)
+#define MCDE_OVL4CR_COLCCTRL_SHIFT 1
+#define MCDE_OVL4CR_COLCCTRL_MASK 0x00000006
+#define MCDE_OVL4CR_COLCCTRL_DISABLED 0
+#define MCDE_OVL4CR_COLCCTRL_ENABLED_NO_SAT 1
+#define MCDE_OVL4CR_COLCCTRL_ENABLED_SAT 2
+#define MCDE_OVL4CR_COLCCTRL_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_OVL4CR, COLCCTRL, MCDE_OVL4CR_COLCCTRL_##__x)
+#define MCDE_OVL4CR_COLCCTRL(__x) \
+	MCDE_VAL2REG(MCDE_OVL4CR, COLCCTRL, __x)
+#define MCDE_OVL4CR_CKEYGEN_SHIFT 3
+#define MCDE_OVL4CR_CKEYGEN_MASK 0x00000008
+#define MCDE_OVL4CR_CKEYGEN(__x) \
+	MCDE_VAL2REG(MCDE_OVL4CR, CKEYGEN, __x)
+#define MCDE_OVL4CR_ALPHAPMEN_SHIFT 4
+#define MCDE_OVL4CR_ALPHAPMEN_MASK 0x00000010
+#define MCDE_OVL4CR_ALPHAPMEN(__x) \
+	MCDE_VAL2REG(MCDE_OVL4CR, ALPHAPMEN, __x)
+#define MCDE_OVL4CR_OVLF_SHIFT 5
+#define MCDE_OVL4CR_OVLF_MASK 0x00000020
+#define MCDE_OVL4CR_OVLF(__x) \
+	MCDE_VAL2REG(MCDE_OVL4CR, OVLF, __x)
+#define MCDE_OVL4CR_OVLR_SHIFT 6
+#define MCDE_OVL4CR_OVLR_MASK 0x00000040
+#define MCDE_OVL4CR_OVLR(__x) \
+	MCDE_VAL2REG(MCDE_OVL4CR, OVLR, __x)
+#define MCDE_OVL4CR_OVLB_SHIFT 7
+#define MCDE_OVL4CR_OVLB_MASK 0x00000080
+#define MCDE_OVL4CR_OVLB(__x) \
+	MCDE_VAL2REG(MCDE_OVL4CR, OVLB, __x)
+#define MCDE_OVL4CR_FETCH_ROPC_SHIFT 8
+#define MCDE_OVL4CR_FETCH_ROPC_MASK 0x0000FF00
+#define MCDE_OVL4CR_FETCH_ROPC(__x) \
+	MCDE_VAL2REG(MCDE_OVL4CR, FETCH_ROPC, __x)
+#define MCDE_OVL4CR_STBPRIO_SHIFT 16
+#define MCDE_OVL4CR_STBPRIO_MASK 0x000F0000
+#define MCDE_OVL4CR_STBPRIO(__x) \
+	MCDE_VAL2REG(MCDE_OVL4CR, STBPRIO, __x)
+#define MCDE_OVL4CR_BURSTSIZE_SHIFT 20
+#define MCDE_OVL4CR_BURSTSIZE_MASK 0x00F00000
+#define MCDE_OVL4CR_BURSTSIZE_1W 0
+#define MCDE_OVL4CR_BURSTSIZE_2W 1
+#define MCDE_OVL4CR_BURSTSIZE_4W 2
+#define MCDE_OVL4CR_BURSTSIZE_8W 3
+#define MCDE_OVL4CR_BURSTSIZE_16W 4
+#define MCDE_OVL4CR_BURSTSIZE_HW_1W 8
+#define MCDE_OVL4CR_BURSTSIZE_HW_2W 9
+#define MCDE_OVL4CR_BURSTSIZE_HW_4W 10
+#define MCDE_OVL4CR_BURSTSIZE_HW_8W 11
+#define MCDE_OVL4CR_BURSTSIZE_HW_16W 12
+#define MCDE_OVL4CR_BURSTSIZE_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_OVL4CR, BURSTSIZE, MCDE_OVL4CR_BURSTSIZE_##__x)
+#define MCDE_OVL4CR_BURSTSIZE(__x) \
+	MCDE_VAL2REG(MCDE_OVL4CR, BURSTSIZE, __x)
+#define MCDE_OVL4CR_MAXOUTSTANDING_SHIFT 24
+#define MCDE_OVL4CR_MAXOUTSTANDING_MASK 0x0F000000
+#define MCDE_OVL4CR_MAXOUTSTANDING_1_REQ 0
+#define MCDE_OVL4CR_MAXOUTSTANDING_2_REQ 1
+#define MCDE_OVL4CR_MAXOUTSTANDING_4_REQ 2
+#define MCDE_OVL4CR_MAXOUTSTANDING_8_REQ 3
+#define MCDE_OVL4CR_MAXOUTSTANDING_16_REQ 4
+#define MCDE_OVL4CR_MAXOUTSTANDING_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_OVL4CR, MAXOUTSTANDING, \
+	MCDE_OVL4CR_MAXOUTSTANDING_##__x)
+#define MCDE_OVL4CR_MAXOUTSTANDING(__x) \
+	MCDE_VAL2REG(MCDE_OVL4CR, MAXOUTSTANDING, __x)
+#define MCDE_OVL4CR_ROTBURSTSIZE_SHIFT 28
+#define MCDE_OVL4CR_ROTBURSTSIZE_MASK 0xF0000000
+#define MCDE_OVL4CR_ROTBURSTSIZE_1W 0
+#define MCDE_OVL4CR_ROTBURSTSIZE_2W 1
+#define MCDE_OVL4CR_ROTBURSTSIZE_4W 2
+#define MCDE_OVL4CR_ROTBURSTSIZE_8W 3
+#define MCDE_OVL4CR_ROTBURSTSIZE_16W 4
+#define MCDE_OVL4CR_ROTBURSTSIZE_HW_1W 8
+#define MCDE_OVL4CR_ROTBURSTSIZE_HW_2W 9
+#define MCDE_OVL4CR_ROTBURSTSIZE_HW_4W 10
+#define MCDE_OVL4CR_ROTBURSTSIZE_HW_8W 11
+#define MCDE_OVL4CR_ROTBURSTSIZE_HW_16W 12
+#define MCDE_OVL4CR_ROTBURSTSIZE_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_OVL4CR, ROTBURSTSIZE, MCDE_OVL4CR_ROTBURSTSIZE_##__x)
+#define MCDE_OVL4CR_ROTBURSTSIZE(__x) \
+	MCDE_VAL2REG(MCDE_OVL4CR, ROTBURSTSIZE, __x)
+#define MCDE_OVL5CR 0x000004A0
+#define MCDE_OVL5CR_OVLEN_SHIFT 0
+#define MCDE_OVL5CR_OVLEN_MASK 0x00000001
+#define MCDE_OVL5CR_OVLEN(__x) \
+	MCDE_VAL2REG(MCDE_OVL5CR, OVLEN, __x)
+#define MCDE_OVL5CR_COLCCTRL_SHIFT 1
+#define MCDE_OVL5CR_COLCCTRL_MASK 0x00000006
+#define MCDE_OVL5CR_COLCCTRL_DISABLED 0
+#define MCDE_OVL5CR_COLCCTRL_ENABLED_NO_SAT 1
+#define MCDE_OVL5CR_COLCCTRL_ENABLED_SAT 2
+#define MCDE_OVL5CR_COLCCTRL_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_OVL5CR, COLCCTRL, MCDE_OVL5CR_COLCCTRL_##__x)
+#define MCDE_OVL5CR_COLCCTRL(__x) \
+	MCDE_VAL2REG(MCDE_OVL5CR, COLCCTRL, __x)
+#define MCDE_OVL5CR_CKEYGEN_SHIFT 3
+#define MCDE_OVL5CR_CKEYGEN_MASK 0x00000008
+#define MCDE_OVL5CR_CKEYGEN(__x) \
+	MCDE_VAL2REG(MCDE_OVL5CR, CKEYGEN, __x)
+#define MCDE_OVL5CR_ALPHAPMEN_SHIFT 4
+#define MCDE_OVL5CR_ALPHAPMEN_MASK 0x00000010
+#define MCDE_OVL5CR_ALPHAPMEN(__x) \
+	MCDE_VAL2REG(MCDE_OVL5CR, ALPHAPMEN, __x)
+#define MCDE_OVL5CR_OVLF_SHIFT 5
+#define MCDE_OVL5CR_OVLF_MASK 0x00000020
+#define MCDE_OVL5CR_OVLF(__x) \
+	MCDE_VAL2REG(MCDE_OVL5CR, OVLF, __x)
+#define MCDE_OVL5CR_OVLR_SHIFT 6
+#define MCDE_OVL5CR_OVLR_MASK 0x00000040
+#define MCDE_OVL5CR_OVLR(__x) \
+	MCDE_VAL2REG(MCDE_OVL5CR, OVLR, __x)
+#define MCDE_OVL5CR_OVLB_SHIFT 7
+#define MCDE_OVL5CR_OVLB_MASK 0x00000080
+#define MCDE_OVL5CR_OVLB(__x) \
+	MCDE_VAL2REG(MCDE_OVL5CR, OVLB, __x)
+#define MCDE_OVL5CR_FETCH_ROPC_SHIFT 8
+#define MCDE_OVL5CR_FETCH_ROPC_MASK 0x0000FF00
+#define MCDE_OVL5CR_FETCH_ROPC(__x) \
+	MCDE_VAL2REG(MCDE_OVL5CR, FETCH_ROPC, __x)
+#define MCDE_OVL5CR_STBPRIO_SHIFT 16
+#define MCDE_OVL5CR_STBPRIO_MASK 0x000F0000
+#define MCDE_OVL5CR_STBPRIO(__x) \
+	MCDE_VAL2REG(MCDE_OVL5CR, STBPRIO, __x)
+#define MCDE_OVL5CR_BURSTSIZE_SHIFT 20
+#define MCDE_OVL5CR_BURSTSIZE_MASK 0x00F00000
+#define MCDE_OVL5CR_BURSTSIZE_1W 0
+#define MCDE_OVL5CR_BURSTSIZE_2W 1
+#define MCDE_OVL5CR_BURSTSIZE_4W 2
+#define MCDE_OVL5CR_BURSTSIZE_8W 3
+#define MCDE_OVL5CR_BURSTSIZE_16W 4
+#define MCDE_OVL5CR_BURSTSIZE_HW_1W 8
+#define MCDE_OVL5CR_BURSTSIZE_HW_2W 9
+#define MCDE_OVL5CR_BURSTSIZE_HW_4W 10
+#define MCDE_OVL5CR_BURSTSIZE_HW_8W 11
+#define MCDE_OVL5CR_BURSTSIZE_HW_16W 12
+#define MCDE_OVL5CR_BURSTSIZE_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_OVL5CR, BURSTSIZE, MCDE_OVL5CR_BURSTSIZE_##__x)
+#define MCDE_OVL5CR_BURSTSIZE(__x) \
+	MCDE_VAL2REG(MCDE_OVL5CR, BURSTSIZE, __x)
+#define MCDE_OVL5CR_MAXOUTSTANDING_SHIFT 24
+#define MCDE_OVL5CR_MAXOUTSTANDING_MASK 0x0F000000
+#define MCDE_OVL5CR_MAXOUTSTANDING_1_REQ 0
+#define MCDE_OVL5CR_MAXOUTSTANDING_2_REQ 1
+#define MCDE_OVL5CR_MAXOUTSTANDING_4_REQ 2
+#define MCDE_OVL5CR_MAXOUTSTANDING_8_REQ 3
+#define MCDE_OVL5CR_MAXOUTSTANDING_16_REQ 4
+#define MCDE_OVL5CR_MAXOUTSTANDING_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_OVL5CR, MAXOUTSTANDING, \
+	MCDE_OVL5CR_MAXOUTSTANDING_##__x)
+#define MCDE_OVL5CR_MAXOUTSTANDING(__x) \
+	MCDE_VAL2REG(MCDE_OVL5CR, MAXOUTSTANDING, __x)
+#define MCDE_OVL5CR_ROTBURSTSIZE_SHIFT 28
+#define MCDE_OVL5CR_ROTBURSTSIZE_MASK 0xF0000000
+#define MCDE_OVL5CR_ROTBURSTSIZE_1W 0
+#define MCDE_OVL5CR_ROTBURSTSIZE_2W 1
+#define MCDE_OVL5CR_ROTBURSTSIZE_4W 2
+#define MCDE_OVL5CR_ROTBURSTSIZE_8W 3
+#define MCDE_OVL5CR_ROTBURSTSIZE_16W 4
+#define MCDE_OVL5CR_ROTBURSTSIZE_HW_1W 8
+#define MCDE_OVL5CR_ROTBURSTSIZE_HW_2W 9
+#define MCDE_OVL5CR_ROTBURSTSIZE_HW_4W 10
+#define MCDE_OVL5CR_ROTBURSTSIZE_HW_8W 11
+#define MCDE_OVL5CR_ROTBURSTSIZE_HW_16W 12
+#define MCDE_OVL5CR_ROTBURSTSIZE_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_OVL5CR, ROTBURSTSIZE, MCDE_OVL5CR_ROTBURSTSIZE_##__x)
+#define MCDE_OVL5CR_ROTBURSTSIZE(__x) \
+	MCDE_VAL2REG(MCDE_OVL5CR, ROTBURSTSIZE, __x)
+#define MCDE_OVL0CONF 0x00000404
+#define MCDE_OVL0CONF_GROUPOFFSET 0x20
+#define MCDE_OVL0CONF_PPL_SHIFT 0
+#define MCDE_OVL0CONF_PPL_MASK 0x000007FF
+#define MCDE_OVL0CONF_PPL(__x) \
+	MCDE_VAL2REG(MCDE_OVL0CONF, PPL, __x)
+#define MCDE_OVL0CONF_EXTSRC_ID_SHIFT 11
+#define MCDE_OVL0CONF_EXTSRC_ID_MASK 0x00007800
+#define MCDE_OVL0CONF_EXTSRC_ID(__x) \
+	MCDE_VAL2REG(MCDE_OVL0CONF, EXTSRC_ID, __x)
+#define MCDE_OVL0CONF_LPF_SHIFT 16
+#define MCDE_OVL0CONF_LPF_MASK 0x07FF0000
+#define MCDE_OVL0CONF_LPF(__x) \
+	MCDE_VAL2REG(MCDE_OVL0CONF, LPF, __x)
+#define MCDE_OVL1CONF 0x00000424
+#define MCDE_OVL1CONF_PPL_SHIFT 0
+#define MCDE_OVL1CONF_PPL_MASK 0x000007FF
+#define MCDE_OVL1CONF_PPL(__x) \
+	MCDE_VAL2REG(MCDE_OVL1CONF, PPL, __x)
+#define MCDE_OVL1CONF_EXTSRC_ID_SHIFT 11
+#define MCDE_OVL1CONF_EXTSRC_ID_MASK 0x00007800
+#define MCDE_OVL1CONF_EXTSRC_ID(__x) \
+	MCDE_VAL2REG(MCDE_OVL1CONF, EXTSRC_ID, __x)
+#define MCDE_OVL1CONF_LPF_SHIFT 16
+#define MCDE_OVL1CONF_LPF_MASK 0x07FF0000
+#define MCDE_OVL1CONF_LPF(__x) \
+	MCDE_VAL2REG(MCDE_OVL1CONF, LPF, __x)
+#define MCDE_OVL2CONF 0x00000444
+#define MCDE_OVL2CONF_PPL_SHIFT 0
+#define MCDE_OVL2CONF_PPL_MASK 0x000007FF
+#define MCDE_OVL2CONF_PPL(__x) \
+	MCDE_VAL2REG(MCDE_OVL2CONF, PPL, __x)
+#define MCDE_OVL2CONF_EXTSRC_ID_SHIFT 11
+#define MCDE_OVL2CONF_EXTSRC_ID_MASK 0x00007800
+#define MCDE_OVL2CONF_EXTSRC_ID(__x) \
+	MCDE_VAL2REG(MCDE_OVL2CONF, EXTSRC_ID, __x)
+#define MCDE_OVL2CONF_LPF_SHIFT 16
+#define MCDE_OVL2CONF_LPF_MASK 0x07FF0000
+#define MCDE_OVL2CONF_LPF(__x) \
+	MCDE_VAL2REG(MCDE_OVL2CONF, LPF, __x)
+#define MCDE_OVL3CONF 0x00000464
+#define MCDE_OVL3CONF_PPL_SHIFT 0
+#define MCDE_OVL3CONF_PPL_MASK 0x000007FF
+#define MCDE_OVL3CONF_PPL(__x) \
+	MCDE_VAL2REG(MCDE_OVL3CONF, PPL, __x)
+#define MCDE_OVL3CONF_EXTSRC_ID_SHIFT 11
+#define MCDE_OVL3CONF_EXTSRC_ID_MASK 0x00007800
+#define MCDE_OVL3CONF_EXTSRC_ID(__x) \
+	MCDE_VAL2REG(MCDE_OVL3CONF, EXTSRC_ID, __x)
+#define MCDE_OVL3CONF_LPF_SHIFT 16
+#define MCDE_OVL3CONF_LPF_MASK 0x07FF0000
+#define MCDE_OVL3CONF_LPF(__x) \
+	MCDE_VAL2REG(MCDE_OVL3CONF, LPF, __x)
+#define MCDE_OVL4CONF 0x00000484
+#define MCDE_OVL4CONF_PPL_SHIFT 0
+#define MCDE_OVL4CONF_PPL_MASK 0x000007FF
+#define MCDE_OVL4CONF_PPL(__x) \
+	MCDE_VAL2REG(MCDE_OVL4CONF, PPL, __x)
+#define MCDE_OVL4CONF_EXTSRC_ID_SHIFT 11
+#define MCDE_OVL4CONF_EXTSRC_ID_MASK 0x00007800
+#define MCDE_OVL4CONF_EXTSRC_ID(__x) \
+	MCDE_VAL2REG(MCDE_OVL4CONF, EXTSRC_ID, __x)
+#define MCDE_OVL4CONF_LPF_SHIFT 16
+#define MCDE_OVL4CONF_LPF_MASK 0x07FF0000
+#define MCDE_OVL4CONF_LPF(__x) \
+	MCDE_VAL2REG(MCDE_OVL4CONF, LPF, __x)
+#define MCDE_OVL5CONF 0x000004A4
+#define MCDE_OVL5CONF_PPL_SHIFT 0
+#define MCDE_OVL5CONF_PPL_MASK 0x000007FF
+#define MCDE_OVL5CONF_PPL(__x) \
+	MCDE_VAL2REG(MCDE_OVL5CONF, PPL, __x)
+#define MCDE_OVL5CONF_EXTSRC_ID_SHIFT 11
+#define MCDE_OVL5CONF_EXTSRC_ID_MASK 0x00007800
+#define MCDE_OVL5CONF_EXTSRC_ID(__x) \
+	MCDE_VAL2REG(MCDE_OVL5CONF, EXTSRC_ID, __x)
+#define MCDE_OVL5CONF_LPF_SHIFT 16
+#define MCDE_OVL5CONF_LPF_MASK 0x07FF0000
+#define MCDE_OVL5CONF_LPF(__x) \
+	MCDE_VAL2REG(MCDE_OVL5CONF, LPF, __x)
+#define MCDE_OVL0CONF2 0x00000408
+#define MCDE_OVL0CONF2_GROUPOFFSET 0x20
+#define MCDE_OVL0CONF2_BP_SHIFT 0
+#define MCDE_OVL0CONF2_BP_MASK 0x00000001
+#define MCDE_OVL0CONF2_BP_PER_PIXEL_ALPHA 0
+#define MCDE_OVL0CONF2_BP_CONSTANT_ALPHA 1
+#define MCDE_OVL0CONF2_BP_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_OVL0CONF2, BP, MCDE_OVL0CONF2_BP_##__x)
+#define MCDE_OVL0CONF2_BP(__x) \
+	MCDE_VAL2REG(MCDE_OVL0CONF2, BP, __x)
+#define MCDE_OVL0CONF2_ALPHAVALUE_SHIFT 1
+#define MCDE_OVL0CONF2_ALPHAVALUE_MASK 0x000001FE
+#define MCDE_OVL0CONF2_ALPHAVALUE(__x) \
+	MCDE_VAL2REG(MCDE_OVL0CONF2, ALPHAVALUE, __x)
+#define MCDE_OVL0CONF2_OPQ_SHIFT 9
+#define MCDE_OVL0CONF2_OPQ_MASK 0x00000200
+#define MCDE_OVL0CONF2_OPQ(__x) \
+	MCDE_VAL2REG(MCDE_OVL0CONF2, OPQ, __x)
+#define MCDE_OVL0CONF2_PIXOFF_SHIFT 10
+#define MCDE_OVL0CONF2_PIXOFF_MASK 0x0000FC00
+#define MCDE_OVL0CONF2_PIXOFF(__x) \
+	MCDE_VAL2REG(MCDE_OVL0CONF2, PIXOFF, __x)
+#define MCDE_OVL0CONF2_PIXELFETCHERWATERMARKLEVEL_SHIFT 16
+#define MCDE_OVL0CONF2_PIXELFETCHERWATERMARKLEVEL_MASK 0x1FFF0000
+#define MCDE_OVL0CONF2_PIXELFETCHERWATERMARKLEVEL(__x) \
+	MCDE_VAL2REG(MCDE_OVL0CONF2, PIXELFETCHERWATERMARKLEVEL, __x)
+#define MCDE_OVL1CONF2 0x00000428
+#define MCDE_OVL1CONF2_BP_SHIFT 0
+#define MCDE_OVL1CONF2_BP_MASK 0x00000001
+#define MCDE_OVL1CONF2_BP_PER_PIXEL_ALPHA 0
+#define MCDE_OVL1CONF2_BP_CONSTANT_ALPHA 1
+#define MCDE_OVL1CONF2_BP_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_OVL1CONF2, BP, MCDE_OVL1CONF2_BP_##__x)
+#define MCDE_OVL1CONF2_BP(__x) \
+	MCDE_VAL2REG(MCDE_OVL1CONF2, BP, __x)
+#define MCDE_OVL1CONF2_ALPHAVALUE_SHIFT 1
+#define MCDE_OVL1CONF2_ALPHAVALUE_MASK 0x000001FE
+#define MCDE_OVL1CONF2_ALPHAVALUE(__x) \
+	MCDE_VAL2REG(MCDE_OVL1CONF2, ALPHAVALUE, __x)
+#define MCDE_OVL1CONF2_OPQ_SHIFT 9
+#define MCDE_OVL1CONF2_OPQ_MASK 0x00000200
+#define MCDE_OVL1CONF2_OPQ(__x) \
+	MCDE_VAL2REG(MCDE_OVL1CONF2, OPQ, __x)
+#define MCDE_OVL1CONF2_PIXOFF_SHIFT 10
+#define MCDE_OVL1CONF2_PIXOFF_MASK 0x0000FC00
+#define MCDE_OVL1CONF2_PIXOFF(__x) \
+	MCDE_VAL2REG(MCDE_OVL1CONF2, PIXOFF, __x)
+#define MCDE_OVL1CONF2_PIXELFETCHERWATERMARKLEVEL_SHIFT 16
+#define MCDE_OVL1CONF2_PIXELFETCHERWATERMARKLEVEL_MASK 0x1FFF0000
+#define MCDE_OVL1CONF2_PIXELFETCHERWATERMARKLEVEL(__x) \
+	MCDE_VAL2REG(MCDE_OVL1CONF2, PIXELFETCHERWATERMARKLEVEL, __x)
+#define MCDE_OVL2CONF2 0x00000448
+#define MCDE_OVL2CONF2_BP_SHIFT 0
+#define MCDE_OVL2CONF2_BP_MASK 0x00000001
+#define MCDE_OVL2CONF2_BP_PER_PIXEL_ALPHA 0
+#define MCDE_OVL2CONF2_BP_CONSTANT_ALPHA 1
+#define MCDE_OVL2CONF2_BP_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_OVL2CONF2, BP, MCDE_OVL2CONF2_BP_##__x)
+#define MCDE_OVL2CONF2_BP(__x) \
+	MCDE_VAL2REG(MCDE_OVL2CONF2, BP, __x)
+#define MCDE_OVL2CONF2_ALPHAVALUE_SHIFT 1
+#define MCDE_OVL2CONF2_ALPHAVALUE_MASK 0x000001FE
+#define MCDE_OVL2CONF2_ALPHAVALUE(__x) \
+	MCDE_VAL2REG(MCDE_OVL2CONF2, ALPHAVALUE, __x)
+#define MCDE_OVL2CONF2_OPQ_SHIFT 9
+#define MCDE_OVL2CONF2_OPQ_MASK 0x00000200
+#define MCDE_OVL2CONF2_OPQ(__x) \
+	MCDE_VAL2REG(MCDE_OVL2CONF2, OPQ, __x)
+#define MCDE_OVL2CONF2_PIXOFF_SHIFT 10
+#define MCDE_OVL2CONF2_PIXOFF_MASK 0x0000FC00
+#define MCDE_OVL2CONF2_PIXOFF(__x) \
+	MCDE_VAL2REG(MCDE_OVL2CONF2, PIXOFF, __x)
+#define MCDE_OVL2CONF2_PIXELFETCHERWATERMARKLEVEL_SHIFT 16
+#define MCDE_OVL2CONF2_PIXELFETCHERWATERMARKLEVEL_MASK 0x1FFF0000
+#define MCDE_OVL2CONF2_PIXELFETCHERWATERMARKLEVEL(__x) \
+	MCDE_VAL2REG(MCDE_OVL2CONF2, PIXELFETCHERWATERMARKLEVEL, __x)
+#define MCDE_OVL3CONF2 0x00000468
+#define MCDE_OVL3CONF2_BP_SHIFT 0
+#define MCDE_OVL3CONF2_BP_MASK 0x00000001
+#define MCDE_OVL3CONF2_BP_PER_PIXEL_ALPHA 0
+#define MCDE_OVL3CONF2_BP_CONSTANT_ALPHA 1
+#define MCDE_OVL3CONF2_BP_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_OVL3CONF2, BP, MCDE_OVL3CONF2_BP_##__x)
+#define MCDE_OVL3CONF2_BP(__x) \
+	MCDE_VAL2REG(MCDE_OVL3CONF2, BP, __x)
+#define MCDE_OVL3CONF2_ALPHAVALUE_SHIFT 1
+#define MCDE_OVL3CONF2_ALPHAVALUE_MASK 0x000001FE
+#define MCDE_OVL3CONF2_ALPHAVALUE(__x) \
+	MCDE_VAL2REG(MCDE_OVL3CONF2, ALPHAVALUE, __x)
+#define MCDE_OVL3CONF2_OPQ_SHIFT 9
+#define MCDE_OVL3CONF2_OPQ_MASK 0x00000200
+#define MCDE_OVL3CONF2_OPQ(__x) \
+	MCDE_VAL2REG(MCDE_OVL3CONF2, OPQ, __x)
+#define MCDE_OVL3CONF2_PIXOFF_SHIFT 10
+#define MCDE_OVL3CONF2_PIXOFF_MASK 0x0000FC00
+#define MCDE_OVL3CONF2_PIXOFF(__x) \
+	MCDE_VAL2REG(MCDE_OVL3CONF2, PIXOFF, __x)
+#define MCDE_OVL3CONF2_PIXELFETCHERWATERMARKLEVEL_SHIFT 16
+#define MCDE_OVL3CONF2_PIXELFETCHERWATERMARKLEVEL_MASK 0x1FFF0000
+#define MCDE_OVL3CONF2_PIXELFETCHERWATERMARKLEVEL(__x) \
+	MCDE_VAL2REG(MCDE_OVL3CONF2, PIXELFETCHERWATERMARKLEVEL, __x)
+#define MCDE_OVL4CONF2 0x00000488
+#define MCDE_OVL4CONF2_BP_SHIFT 0
+#define MCDE_OVL4CONF2_BP_MASK 0x00000001
+#define MCDE_OVL4CONF2_BP_PER_PIXEL_ALPHA 0
+#define MCDE_OVL4CONF2_BP_CONSTANT_ALPHA 1
+#define MCDE_OVL4CONF2_BP_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_OVL4CONF2, BP, MCDE_OVL4CONF2_BP_##__x)
+#define MCDE_OVL4CONF2_BP(__x) \
+	MCDE_VAL2REG(MCDE_OVL4CONF2, BP, __x)
+#define MCDE_OVL4CONF2_ALPHAVALUE_SHIFT 1
+#define MCDE_OVL4CONF2_ALPHAVALUE_MASK 0x000001FE
+#define MCDE_OVL4CONF2_ALPHAVALUE(__x) \
+	MCDE_VAL2REG(MCDE_OVL4CONF2, ALPHAVALUE, __x)
+#define MCDE_OVL4CONF2_OPQ_SHIFT 9
+#define MCDE_OVL4CONF2_OPQ_MASK 0x00000200
+#define MCDE_OVL4CONF2_OPQ(__x) \
+	MCDE_VAL2REG(MCDE_OVL4CONF2, OPQ, __x)
+#define MCDE_OVL4CONF2_PIXOFF_SHIFT 10
+#define MCDE_OVL4CONF2_PIXOFF_MASK 0x0000FC00
+#define MCDE_OVL4CONF2_PIXOFF(__x) \
+	MCDE_VAL2REG(MCDE_OVL4CONF2, PIXOFF, __x)
+#define MCDE_OVL4CONF2_PIXELFETCHERWATERMARKLEVEL_SHIFT 16
+#define MCDE_OVL4CONF2_PIXELFETCHERWATERMARKLEVEL_MASK 0x1FFF0000
+#define MCDE_OVL4CONF2_PIXELFETCHERWATERMARKLEVEL(__x) \
+	MCDE_VAL2REG(MCDE_OVL4CONF2, PIXELFETCHERWATERMARKLEVEL, __x)
+#define MCDE_OVL5CONF2 0x000004A8
+#define MCDE_OVL5CONF2_BP_SHIFT 0
+#define MCDE_OVL5CONF2_BP_MASK 0x00000001
+#define MCDE_OVL5CONF2_BP_PER_PIXEL_ALPHA 0
+#define MCDE_OVL5CONF2_BP_CONSTANT_ALPHA 1
+#define MCDE_OVL5CONF2_BP_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_OVL5CONF2, BP, MCDE_OVL5CONF2_BP_##__x)
+#define MCDE_OVL5CONF2_BP(__x) \
+	MCDE_VAL2REG(MCDE_OVL5CONF2, BP, __x)
+#define MCDE_OVL5CONF2_ALPHAVALUE_SHIFT 1
+#define MCDE_OVL5CONF2_ALPHAVALUE_MASK 0x000001FE
+#define MCDE_OVL5CONF2_ALPHAVALUE(__x) \
+	MCDE_VAL2REG(MCDE_OVL5CONF2, ALPHAVALUE, __x)
+#define MCDE_OVL5CONF2_OPQ_SHIFT 9
+#define MCDE_OVL5CONF2_OPQ_MASK 0x00000200
+#define MCDE_OVL5CONF2_OPQ(__x) \
+	MCDE_VAL2REG(MCDE_OVL5CONF2, OPQ, __x)
+#define MCDE_OVL5CONF2_PIXOFF_SHIFT 10
+#define MCDE_OVL5CONF2_PIXOFF_MASK 0x0000FC00
+#define MCDE_OVL5CONF2_PIXOFF(__x) \
+	MCDE_VAL2REG(MCDE_OVL5CONF2, PIXOFF, __x)
+#define MCDE_OVL5CONF2_PIXELFETCHERWATERMARKLEVEL_SHIFT 16
+#define MCDE_OVL5CONF2_PIXELFETCHERWATERMARKLEVEL_MASK 0x1FFF0000
+#define MCDE_OVL5CONF2_PIXELFETCHERWATERMARKLEVEL(__x) \
+	MCDE_VAL2REG(MCDE_OVL5CONF2, PIXELFETCHERWATERMARKLEVEL, __x)
+#define MCDE_OVL0LJINC 0x0000040C
+#define MCDE_OVL0LJINC_GROUPOFFSET 0x20
+#define MCDE_OVL0LJINC_LJINC_SHIFT 0
+#define MCDE_OVL0LJINC_LJINC_MASK 0xFFFFFFFF
+#define MCDE_OVL0LJINC_LJINC(__x) \
+	MCDE_VAL2REG(MCDE_OVL0LJINC, LJINC, __x)
+#define MCDE_OVL1LJINC 0x0000042C
+#define MCDE_OVL1LJINC_LJINC_SHIFT 0
+#define MCDE_OVL1LJINC_LJINC_MASK 0xFFFFFFFF
+#define MCDE_OVL1LJINC_LJINC(__x) \
+	MCDE_VAL2REG(MCDE_OVL1LJINC, LJINC, __x)
+#define MCDE_OVL2LJINC 0x0000044C
+#define MCDE_OVL2LJINC_LJINC_SHIFT 0
+#define MCDE_OVL2LJINC_LJINC_MASK 0xFFFFFFFF
+#define MCDE_OVL2LJINC_LJINC(__x) \
+	MCDE_VAL2REG(MCDE_OVL2LJINC, LJINC, __x)
+#define MCDE_OVL3LJINC 0x0000046C
+#define MCDE_OVL3LJINC_LJINC_SHIFT 0
+#define MCDE_OVL3LJINC_LJINC_MASK 0xFFFFFFFF
+#define MCDE_OVL3LJINC_LJINC(__x) \
+	MCDE_VAL2REG(MCDE_OVL3LJINC, LJINC, __x)
+#define MCDE_OVL4LJINC 0x0000048C
+#define MCDE_OVL4LJINC_LJINC_SHIFT 0
+#define MCDE_OVL4LJINC_LJINC_MASK 0xFFFFFFFF
+#define MCDE_OVL4LJINC_LJINC(__x) \
+	MCDE_VAL2REG(MCDE_OVL4LJINC, LJINC, __x)
+#define MCDE_OVL5LJINC 0x000004AC
+#define MCDE_OVL5LJINC_LJINC_SHIFT 0
+#define MCDE_OVL5LJINC_LJINC_MASK 0xFFFFFFFF
+#define MCDE_OVL5LJINC_LJINC(__x) \
+	MCDE_VAL2REG(MCDE_OVL5LJINC, LJINC, __x)
+#define MCDE_OVL0CROP 0x00000410
+#define MCDE_OVL0CROP_GROUPOFFSET 0x20
+#define MCDE_OVL0CROP_TMRGN_SHIFT 0
+#define MCDE_OVL0CROP_TMRGN_MASK 0x003FFFFF
+#define MCDE_OVL0CROP_TMRGN(__x) \
+	MCDE_VAL2REG(MCDE_OVL0CROP, TMRGN, __x)
+#define MCDE_OVL0CROP_LMRGN_SHIFT 22
+#define MCDE_OVL0CROP_LMRGN_MASK 0xFFC00000
+#define MCDE_OVL0CROP_LMRGN(__x) \
+	MCDE_VAL2REG(MCDE_OVL0CROP, LMRGN, __x)
+#define MCDE_OVL1CROP 0x00000430
+#define MCDE_OVL1CROP_TMRGN_SHIFT 0
+#define MCDE_OVL1CROP_TMRGN_MASK 0x003FFFFF
+#define MCDE_OVL1CROP_TMRGN(__x) \
+	MCDE_VAL2REG(MCDE_OVL1CROP, TMRGN, __x)
+#define MCDE_OVL1CROP_LMRGN_SHIFT 22
+#define MCDE_OVL1CROP_LMRGN_MASK 0xFFC00000
+#define MCDE_OVL1CROP_LMRGN(__x) \
+	MCDE_VAL2REG(MCDE_OVL1CROP, LMRGN, __x)
+#define MCDE_OVL2CROP 0x00000450
+#define MCDE_OVL2CROP_TMRGN_SHIFT 0
+#define MCDE_OVL2CROP_TMRGN_MASK 0x003FFFFF
+#define MCDE_OVL2CROP_TMRGN(__x) \
+	MCDE_VAL2REG(MCDE_OVL2CROP, TMRGN, __x)
+#define MCDE_OVL2CROP_LMRGN_SHIFT 22
+#define MCDE_OVL2CROP_LMRGN_MASK 0xFFC00000
+#define MCDE_OVL2CROP_LMRGN(__x) \
+	MCDE_VAL2REG(MCDE_OVL2CROP, LMRGN, __x)
+#define MCDE_OVL3CROP 0x00000470
+#define MCDE_OVL3CROP_TMRGN_SHIFT 0
+#define MCDE_OVL3CROP_TMRGN_MASK 0x003FFFFF
+#define MCDE_OVL3CROP_TMRGN(__x) \
+	MCDE_VAL2REG(MCDE_OVL3CROP, TMRGN, __x)
+#define MCDE_OVL3CROP_LMRGN_SHIFT 22
+#define MCDE_OVL3CROP_LMRGN_MASK 0xFFC00000
+#define MCDE_OVL3CROP_LMRGN(__x) \
+	MCDE_VAL2REG(MCDE_OVL3CROP, LMRGN, __x)
+#define MCDE_OVL4CROP 0x00000490
+#define MCDE_OVL4CROP_TMRGN_SHIFT 0
+#define MCDE_OVL4CROP_TMRGN_MASK 0x003FFFFF
+#define MCDE_OVL4CROP_TMRGN(__x) \
+	MCDE_VAL2REG(MCDE_OVL4CROP, TMRGN, __x)
+#define MCDE_OVL4CROP_LMRGN_SHIFT 22
+#define MCDE_OVL4CROP_LMRGN_MASK 0xFFC00000
+#define MCDE_OVL4CROP_LMRGN(__x) \
+	MCDE_VAL2REG(MCDE_OVL4CROP, LMRGN, __x)
+#define MCDE_OVL5CROP 0x000004B0
+#define MCDE_OVL5CROP_TMRGN_SHIFT 0
+#define MCDE_OVL5CROP_TMRGN_MASK 0x003FFFFF
+#define MCDE_OVL5CROP_TMRGN(__x) \
+	MCDE_VAL2REG(MCDE_OVL5CROP, TMRGN, __x)
+#define MCDE_OVL5CROP_LMRGN_SHIFT 22
+#define MCDE_OVL5CROP_LMRGN_MASK 0xFFC00000
+#define MCDE_OVL5CROP_LMRGN(__x) \
+	MCDE_VAL2REG(MCDE_OVL5CROP, LMRGN, __x)
+#define MCDE_OVL0COMP 0x00000414
+#define MCDE_OVL0COMP_GROUPOFFSET 0x20
+#define MCDE_OVL0COMP_XPOS_SHIFT 0
+#define MCDE_OVL0COMP_XPOS_MASK 0x000007FF
+#define MCDE_OVL0COMP_XPOS(__x) \
+	MCDE_VAL2REG(MCDE_OVL0COMP, XPOS, __x)
+#define MCDE_OVL0COMP_CH_ID_SHIFT 11
+#define MCDE_OVL0COMP_CH_ID_MASK 0x00007800
+#define MCDE_OVL0COMP_CH_ID(__x) \
+	MCDE_VAL2REG(MCDE_OVL0COMP, CH_ID, __x)
+#define MCDE_OVL0COMP_YPOS_SHIFT 16
+#define MCDE_OVL0COMP_YPOS_MASK 0x07FF0000
+#define MCDE_OVL0COMP_YPOS(__x) \
+	MCDE_VAL2REG(MCDE_OVL0COMP, YPOS, __x)
+#define MCDE_OVL0COMP_Z_SHIFT 27
+#define MCDE_OVL0COMP_Z_MASK 0x78000000
+#define MCDE_OVL0COMP_Z(__x) \
+	MCDE_VAL2REG(MCDE_OVL0COMP, Z, __x)
+#define MCDE_OVL1COMP 0x00000434
+#define MCDE_OVL1COMP_XPOS_SHIFT 0
+#define MCDE_OVL1COMP_XPOS_MASK 0x000007FF
+#define MCDE_OVL1COMP_XPOS(__x) \
+	MCDE_VAL2REG(MCDE_OVL1COMP, XPOS, __x)
+#define MCDE_OVL1COMP_CH_ID_SHIFT 11
+#define MCDE_OVL1COMP_CH_ID_MASK 0x00007800
+#define MCDE_OVL1COMP_CH_ID(__x) \
+	MCDE_VAL2REG(MCDE_OVL1COMP, CH_ID, __x)
+#define MCDE_OVL1COMP_YPOS_SHIFT 16
+#define MCDE_OVL1COMP_YPOS_MASK 0x07FF0000
+#define MCDE_OVL1COMP_YPOS(__x) \
+	MCDE_VAL2REG(MCDE_OVL1COMP, YPOS, __x)
+#define MCDE_OVL1COMP_Z_SHIFT 27
+#define MCDE_OVL1COMP_Z_MASK 0x78000000
+#define MCDE_OVL1COMP_Z(__x) \
+	MCDE_VAL2REG(MCDE_OVL1COMP, Z, __x)
+#define MCDE_OVL2COMP 0x00000454
+#define MCDE_OVL2COMP_XPOS_SHIFT 0
+#define MCDE_OVL2COMP_XPOS_MASK 0x000007FF
+#define MCDE_OVL2COMP_XPOS(__x) \
+	MCDE_VAL2REG(MCDE_OVL2COMP, XPOS, __x)
+#define MCDE_OVL2COMP_CH_ID_SHIFT 11
+#define MCDE_OVL2COMP_CH_ID_MASK 0x00007800
+#define MCDE_OVL2COMP_CH_ID(__x) \
+	MCDE_VAL2REG(MCDE_OVL2COMP, CH_ID, __x)
+#define MCDE_OVL2COMP_YPOS_SHIFT 16
+#define MCDE_OVL2COMP_YPOS_MASK 0x07FF0000
+#define MCDE_OVL2COMP_YPOS(__x) \
+	MCDE_VAL2REG(MCDE_OVL2COMP, YPOS, __x)
+#define MCDE_OVL2COMP_Z_SHIFT 27
+#define MCDE_OVL2COMP_Z_MASK 0x78000000
+#define MCDE_OVL2COMP_Z(__x) \
+	MCDE_VAL2REG(MCDE_OVL2COMP, Z, __x)
+#define MCDE_OVL3COMP 0x00000474
+#define MCDE_OVL3COMP_XPOS_SHIFT 0
+#define MCDE_OVL3COMP_XPOS_MASK 0x000007FF
+#define MCDE_OVL3COMP_XPOS(__x) \
+	MCDE_VAL2REG(MCDE_OVL3COMP, XPOS, __x)
+#define MCDE_OVL3COMP_CH_ID_SHIFT 11
+#define MCDE_OVL3COMP_CH_ID_MASK 0x00007800
+#define MCDE_OVL3COMP_CH_ID(__x) \
+	MCDE_VAL2REG(MCDE_OVL3COMP, CH_ID, __x)
+#define MCDE_OVL3COMP_YPOS_SHIFT 16
+#define MCDE_OVL3COMP_YPOS_MASK 0x07FF0000
+#define MCDE_OVL3COMP_YPOS(__x) \
+	MCDE_VAL2REG(MCDE_OVL3COMP, YPOS, __x)
+#define MCDE_OVL3COMP_Z_SHIFT 27
+#define MCDE_OVL3COMP_Z_MASK 0x78000000
+#define MCDE_OVL3COMP_Z(__x) \
+	MCDE_VAL2REG(MCDE_OVL3COMP, Z, __x)
+#define MCDE_OVL4COMP 0x00000494
+#define MCDE_OVL4COMP_XPOS_SHIFT 0
+#define MCDE_OVL4COMP_XPOS_MASK 0x000007FF
+#define MCDE_OVL4COMP_XPOS(__x) \
+	MCDE_VAL2REG(MCDE_OVL4COMP, XPOS, __x)
+#define MCDE_OVL4COMP_CH_ID_SHIFT 11
+#define MCDE_OVL4COMP_CH_ID_MASK 0x00007800
+#define MCDE_OVL4COMP_CH_ID(__x) \
+	MCDE_VAL2REG(MCDE_OVL4COMP, CH_ID, __x)
+#define MCDE_OVL4COMP_YPOS_SHIFT 16
+#define MCDE_OVL4COMP_YPOS_MASK 0x07FF0000
+#define MCDE_OVL4COMP_YPOS(__x) \
+	MCDE_VAL2REG(MCDE_OVL4COMP, YPOS, __x)
+#define MCDE_OVL4COMP_Z_SHIFT 27
+#define MCDE_OVL4COMP_Z_MASK 0x78000000
+#define MCDE_OVL4COMP_Z(__x) \
+	MCDE_VAL2REG(MCDE_OVL4COMP, Z, __x)
+#define MCDE_OVL5COMP 0x000004B4
+#define MCDE_OVL5COMP_XPOS_SHIFT 0
+#define MCDE_OVL5COMP_XPOS_MASK 0x000007FF
+#define MCDE_OVL5COMP_XPOS(__x) \
+	MCDE_VAL2REG(MCDE_OVL5COMP, XPOS, __x)
+#define MCDE_OVL5COMP_CH_ID_SHIFT 11
+#define MCDE_OVL5COMP_CH_ID_MASK 0x00007800
+#define MCDE_OVL5COMP_CH_ID(__x) \
+	MCDE_VAL2REG(MCDE_OVL5COMP, CH_ID, __x)
+#define MCDE_OVL5COMP_YPOS_SHIFT 16
+#define MCDE_OVL5COMP_YPOS_MASK 0x07FF0000
+#define MCDE_OVL5COMP_YPOS(__x) \
+	MCDE_VAL2REG(MCDE_OVL5COMP, YPOS, __x)
+#define MCDE_OVL5COMP_Z_SHIFT 27
+#define MCDE_OVL5COMP_Z_MASK 0x78000000
+#define MCDE_OVL5COMP_Z(__x) \
+	MCDE_VAL2REG(MCDE_OVL5COMP, Z, __x)
+#define MCDE_CHNL0CONF 0x00000600
+#define MCDE_CHNL0CONF_GROUPOFFSET 0x20
+#define MCDE_CHNL0CONF_PPL_SHIFT 0
+#define MCDE_CHNL0CONF_PPL_MASK 0x000007FF
+#define MCDE_CHNL0CONF_PPL(__x) \
+	MCDE_VAL2REG(MCDE_CHNL0CONF, PPL, __x)
+#define MCDE_CHNL0CONF_LPF_SHIFT 16
+#define MCDE_CHNL0CONF_LPF_MASK 0x07FF0000
+#define MCDE_CHNL0CONF_LPF(__x) \
+	MCDE_VAL2REG(MCDE_CHNL0CONF, LPF, __x)
+#define MCDE_CHNL1CONF 0x00000620
+#define MCDE_CHNL1CONF_PPL_SHIFT 0
+#define MCDE_CHNL1CONF_PPL_MASK 0x000007FF
+#define MCDE_CHNL1CONF_PPL(__x) \
+	MCDE_VAL2REG(MCDE_CHNL1CONF, PPL, __x)
+#define MCDE_CHNL1CONF_LPF_SHIFT 16
+#define MCDE_CHNL1CONF_LPF_MASK 0x07FF0000
+#define MCDE_CHNL1CONF_LPF(__x) \
+	MCDE_VAL2REG(MCDE_CHNL1CONF, LPF, __x)
+#define MCDE_CHNL2CONF 0x00000640
+#define MCDE_CHNL2CONF_PPL_SHIFT 0
+#define MCDE_CHNL2CONF_PPL_MASK 0x000007FF
+#define MCDE_CHNL2CONF_PPL(__x) \
+	MCDE_VAL2REG(MCDE_CHNL2CONF, PPL, __x)
+#define MCDE_CHNL2CONF_LPF_SHIFT 16
+#define MCDE_CHNL2CONF_LPF_MASK 0x07FF0000
+#define MCDE_CHNL2CONF_LPF(__x) \
+	MCDE_VAL2REG(MCDE_CHNL2CONF, LPF, __x)
+#define MCDE_CHNL3CONF 0x00000660
+#define MCDE_CHNL3CONF_PPL_SHIFT 0
+#define MCDE_CHNL3CONF_PPL_MASK 0x000007FF
+#define MCDE_CHNL3CONF_PPL(__x) \
+	MCDE_VAL2REG(MCDE_CHNL3CONF, PPL, __x)
+#define MCDE_CHNL3CONF_LPF_SHIFT 16
+#define MCDE_CHNL3CONF_LPF_MASK 0x07FF0000
+#define MCDE_CHNL3CONF_LPF(__x) \
+	MCDE_VAL2REG(MCDE_CHNL3CONF, LPF, __x)
+#define MCDE_CHNL0STAT 0x00000604
+#define MCDE_CHNL0STAT_GROUPOFFSET 0x20
+#define MCDE_CHNL0STAT_CHNLRD_SHIFT 0
+#define MCDE_CHNL0STAT_CHNLRD_MASK 0x00000001
+#define MCDE_CHNL0STAT_CHNLRD(__x) \
+	MCDE_VAL2REG(MCDE_CHNL0STAT, CHNLRD, __x)
+#define MCDE_CHNL0STAT_CHNLA_SHIFT 1
+#define MCDE_CHNL0STAT_CHNLA_MASK 0x00000002
+#define MCDE_CHNL0STAT_CHNLA(__x) \
+	MCDE_VAL2REG(MCDE_CHNL0STAT, CHNLA, __x)
+#define MCDE_CHNL0STAT_CHNLBLBCKGND_EN_SHIFT 16
+#define MCDE_CHNL0STAT_CHNLBLBCKGND_EN_MASK 0x00010000
+#define MCDE_CHNL0STAT_CHNLBLBCKGND_EN(__x) \
+	MCDE_VAL2REG(MCDE_CHNL0STAT, CHNLBLBCKGND_EN, __x)
+#define MCDE_CHNL1STAT 0x00000624
+#define MCDE_CHNL1STAT_CHNLRD_SHIFT 0
+#define MCDE_CHNL1STAT_CHNLRD_MASK 0x00000001
+#define MCDE_CHNL1STAT_CHNLRD(__x) \
+	MCDE_VAL2REG(MCDE_CHNL1STAT, CHNLRD, __x)
+#define MCDE_CHNL1STAT_CHNLA_SHIFT 1
+#define MCDE_CHNL1STAT_CHNLA_MASK 0x00000002
+#define MCDE_CHNL1STAT_CHNLA(__x) \
+	MCDE_VAL2REG(MCDE_CHNL1STAT, CHNLA, __x)
+#define MCDE_CHNL1STAT_CHNLBLBCKGND_EN_SHIFT 16
+#define MCDE_CHNL1STAT_CHNLBLBCKGND_EN_MASK 0x00010000
+#define MCDE_CHNL1STAT_CHNLBLBCKGND_EN(__x) \
+	MCDE_VAL2REG(MCDE_CHNL1STAT, CHNLBLBCKGND_EN, __x)
+#define MCDE_CHNL2STAT 0x00000644
+#define MCDE_CHNL2STAT_CHNLRD_SHIFT 0
+#define MCDE_CHNL2STAT_CHNLRD_MASK 0x00000001
+#define MCDE_CHNL2STAT_CHNLRD(__x) \
+	MCDE_VAL2REG(MCDE_CHNL2STAT, CHNLRD, __x)
+#define MCDE_CHNL2STAT_CHNLA_SHIFT 1
+#define MCDE_CHNL2STAT_CHNLA_MASK 0x00000002
+#define MCDE_CHNL2STAT_CHNLA(__x) \
+	MCDE_VAL2REG(MCDE_CHNL2STAT, CHNLA, __x)
+#define MCDE_CHNL2STAT_CHNLBLBCKGND_EN_SHIFT 16
+#define MCDE_CHNL2STAT_CHNLBLBCKGND_EN_MASK 0x00010000
+#define MCDE_CHNL2STAT_CHNLBLBCKGND_EN(__x) \
+	MCDE_VAL2REG(MCDE_CHNL2STAT, CHNLBLBCKGND_EN, __x)
+#define MCDE_CHNL3STAT 0x00000664
+#define MCDE_CHNL3STAT_CHNLRD_SHIFT 0
+#define MCDE_CHNL3STAT_CHNLRD_MASK 0x00000001
+#define MCDE_CHNL3STAT_CHNLRD(__x) \
+	MCDE_VAL2REG(MCDE_CHNL3STAT, CHNLRD, __x)
+#define MCDE_CHNL3STAT_CHNLA_SHIFT 1
+#define MCDE_CHNL3STAT_CHNLA_MASK 0x00000002
+#define MCDE_CHNL3STAT_CHNLA(__x) \
+	MCDE_VAL2REG(MCDE_CHNL3STAT, CHNLA, __x)
+#define MCDE_CHNL3STAT_CHNLBLBCKGND_EN_SHIFT 16
+#define MCDE_CHNL3STAT_CHNLBLBCKGND_EN_MASK 0x00010000
+#define MCDE_CHNL3STAT_CHNLBLBCKGND_EN(__x) \
+	MCDE_VAL2REG(MCDE_CHNL3STAT, CHNLBLBCKGND_EN, __x)
+#define MCDE_CHNL0SYNCHMOD 0x00000608
+#define MCDE_CHNL0SYNCHMOD_GROUPOFFSET 0x20
+#define MCDE_CHNL0SYNCHMOD_SRC_SYNCH_SHIFT 0
+#define MCDE_CHNL0SYNCHMOD_SRC_SYNCH_MASK 0x00000003
+#define MCDE_CHNL0SYNCHMOD_SRC_SYNCH_OUTPUT 0
+#define MCDE_CHNL0SYNCHMOD_SRC_SYNCH_AUTO 1
+#define MCDE_CHNL0SYNCHMOD_SRC_SYNCH_SOFTWARE 2
+#define MCDE_CHNL0SYNCHMOD_SRC_SYNCH_EXTERNAL 3
+#define MCDE_CHNL0SYNCHMOD_SRC_SYNCH_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_CHNL0SYNCHMOD, SRC_SYNCH, \
+	MCDE_CHNL0SYNCHMOD_SRC_SYNCH_##__x)
+#define MCDE_CHNL0SYNCHMOD_SRC_SYNCH(__x) \
+	MCDE_VAL2REG(MCDE_CHNL0SYNCHMOD, SRC_SYNCH, __x)
+#define MCDE_CHNL0SYNCHMOD_OUT_SYNCH_SRC_SHIFT 2
+#define MCDE_CHNL0SYNCHMOD_OUT_SYNCH_SRC_MASK 0x0000001C
+#define MCDE_CHNL0SYNCHMOD_OUT_SYNCH_SRC_FORMATTER 0
+#define MCDE_CHNL0SYNCHMOD_OUT_SYNCH_SRC_VSYNC0 1
+#define MCDE_CHNL0SYNCHMOD_OUT_SYNCH_SRC_VSYNC1 2
+#define MCDE_CHNL0SYNCHMOD_OUT_SYNCH_SRC_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_CHNL0SYNCHMOD, OUT_SYNCH_SRC, \
+	MCDE_CHNL0SYNCHMOD_OUT_SYNCH_SRC_##__x)
+#define MCDE_CHNL0SYNCHMOD_OUT_SYNCH_SRC(__x) \
+	MCDE_VAL2REG(MCDE_CHNL0SYNCHMOD, OUT_SYNCH_SRC, __x)
+#define MCDE_CHNL1SYNCHMOD 0x00000628
+#define MCDE_CHNL1SYNCHMOD_SRC_SYNCH_SHIFT 0
+#define MCDE_CHNL1SYNCHMOD_SRC_SYNCH_MASK 0x00000003
+#define MCDE_CHNL1SYNCHMOD_SRC_SYNCH_OUTPUT 0
+#define MCDE_CHNL1SYNCHMOD_SRC_SYNCH_AUTO 1
+#define MCDE_CHNL1SYNCHMOD_SRC_SYNCH_SOFTWARE 2
+#define MCDE_CHNL1SYNCHMOD_SRC_SYNCH_EXTERNAL 3
+#define MCDE_CHNL1SYNCHMOD_SRC_SYNCH_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_CHNL1SYNCHMOD, SRC_SYNCH, \
+	MCDE_CHNL1SYNCHMOD_SRC_SYNCH_##__x)
+#define MCDE_CHNL1SYNCHMOD_SRC_SYNCH(__x) \
+	MCDE_VAL2REG(MCDE_CHNL1SYNCHMOD, SRC_SYNCH, __x)
+#define MCDE_CHNL1SYNCHMOD_OUT_SYNCH_SRC_SHIFT 2
+#define MCDE_CHNL1SYNCHMOD_OUT_SYNCH_SRC_MASK 0x0000001C
+#define MCDE_CHNL1SYNCHMOD_OUT_SYNCH_SRC_FORMATTER 0
+#define MCDE_CHNL1SYNCHMOD_OUT_SYNCH_SRC_VSYNC0 1
+#define MCDE_CHNL1SYNCHMOD_OUT_SYNCH_SRC_VSYNC1 2
+#define MCDE_CHNL1SYNCHMOD_OUT_SYNCH_SRC_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_CHNL1SYNCHMOD, OUT_SYNCH_SRC, \
+	MCDE_CHNL1SYNCHMOD_OUT_SYNCH_SRC_##__x)
+#define MCDE_CHNL1SYNCHMOD_OUT_SYNCH_SRC(__x) \
+	MCDE_VAL2REG(MCDE_CHNL1SYNCHMOD, OUT_SYNCH_SRC, __x)
+#define MCDE_CHNL2SYNCHMOD 0x00000648
+#define MCDE_CHNL2SYNCHMOD_SRC_SYNCH_SHIFT 0
+#define MCDE_CHNL2SYNCHMOD_SRC_SYNCH_MASK 0x00000003
+#define MCDE_CHNL2SYNCHMOD_SRC_SYNCH_OUTPUT 0
+#define MCDE_CHNL2SYNCHMOD_SRC_SYNCH_AUTO 1
+#define MCDE_CHNL2SYNCHMOD_SRC_SYNCH_SOFTWARE 2
+#define MCDE_CHNL2SYNCHMOD_SRC_SYNCH_EXTERNAL 3
+#define MCDE_CHNL2SYNCHMOD_SRC_SYNCH_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_CHNL2SYNCHMOD, SRC_SYNCH, \
+	MCDE_CHNL2SYNCHMOD_SRC_SYNCH_##__x)
+#define MCDE_CHNL2SYNCHMOD_SRC_SYNCH(__x) \
+	MCDE_VAL2REG(MCDE_CHNL2SYNCHMOD, SRC_SYNCH, __x)
+#define MCDE_CHNL2SYNCHMOD_OUT_SYNCH_SRC_SHIFT 2
+#define MCDE_CHNL2SYNCHMOD_OUT_SYNCH_SRC_MASK 0x0000001C
+#define MCDE_CHNL2SYNCHMOD_OUT_SYNCH_SRC_FORMATTER 0
+#define MCDE_CHNL2SYNCHMOD_OUT_SYNCH_SRC_VSYNC0 1
+#define MCDE_CHNL2SYNCHMOD_OUT_SYNCH_SRC_VSYNC1 2
+#define MCDE_CHNL2SYNCHMOD_OUT_SYNCH_SRC_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_CHNL2SYNCHMOD, OUT_SYNCH_SRC, \
+	MCDE_CHNL2SYNCHMOD_OUT_SYNCH_SRC_##__x)
+#define MCDE_CHNL2SYNCHMOD_OUT_SYNCH_SRC(__x) \
+	MCDE_VAL2REG(MCDE_CHNL2SYNCHMOD, OUT_SYNCH_SRC, __x)
+#define MCDE_CHNL3SYNCHMOD 0x00000668
+#define MCDE_CHNL3SYNCHMOD_SRC_SYNCH_SHIFT 0
+#define MCDE_CHNL3SYNCHMOD_SRC_SYNCH_MASK 0x00000003
+#define MCDE_CHNL3SYNCHMOD_SRC_SYNCH_OUTPUT 0
+#define MCDE_CHNL3SYNCHMOD_SRC_SYNCH_AUTO 1
+#define MCDE_CHNL3SYNCHMOD_SRC_SYNCH_SOFTWARE 2
+#define MCDE_CHNL3SYNCHMOD_SRC_SYNCH_EXTERNAL 3
+#define MCDE_CHNL3SYNCHMOD_SRC_SYNCH_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_CHNL3SYNCHMOD, SRC_SYNCH, \
+	MCDE_CHNL3SYNCHMOD_SRC_SYNCH_##__x)
+#define MCDE_CHNL3SYNCHMOD_SRC_SYNCH(__x) \
+	MCDE_VAL2REG(MCDE_CHNL3SYNCHMOD, SRC_SYNCH, __x)
+#define MCDE_CHNL3SYNCHMOD_OUT_SYNCH_SRC_SHIFT 2
+#define MCDE_CHNL3SYNCHMOD_OUT_SYNCH_SRC_MASK 0x0000001C
+#define MCDE_CHNL3SYNCHMOD_OUT_SYNCH_SRC_FORMATTER 0
+#define MCDE_CHNL3SYNCHMOD_OUT_SYNCH_SRC_VSYNC0 1
+#define MCDE_CHNL3SYNCHMOD_OUT_SYNCH_SRC_VSYNC1 2
+#define MCDE_CHNL3SYNCHMOD_OUT_SYNCH_SRC_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_CHNL3SYNCHMOD, OUT_SYNCH_SRC, \
+	MCDE_CHNL3SYNCHMOD_OUT_SYNCH_SRC_##__x)
+#define MCDE_CHNL3SYNCHMOD_OUT_SYNCH_SRC(__x) \
+	MCDE_VAL2REG(MCDE_CHNL3SYNCHMOD, OUT_SYNCH_SRC, __x)
+#define MCDE_CHNL0SYNCHSW 0x0000060C
+#define MCDE_CHNL0SYNCHSW_GROUPOFFSET 0x20
+#define MCDE_CHNL0SYNCHSW_SW_TRIG_SHIFT 0
+#define MCDE_CHNL0SYNCHSW_SW_TRIG_MASK 0x00000001
+#define MCDE_CHNL0SYNCHSW_SW_TRIG(__x) \
+	MCDE_VAL2REG(MCDE_CHNL0SYNCHSW, SW_TRIG, __x)
+#define MCDE_CHNL1SYNCHSW 0x0000062C
+#define MCDE_CHNL1SYNCHSW_SW_TRIG_SHIFT 0
+#define MCDE_CHNL1SYNCHSW_SW_TRIG_MASK 0x00000001
+#define MCDE_CHNL1SYNCHSW_SW_TRIG(__x) \
+	MCDE_VAL2REG(MCDE_CHNL1SYNCHSW, SW_TRIG, __x)
+#define MCDE_CHNL2SYNCHSW 0x0000064C
+#define MCDE_CHNL2SYNCHSW_SW_TRIG_SHIFT 0
+#define MCDE_CHNL2SYNCHSW_SW_TRIG_MASK 0x00000001
+#define MCDE_CHNL2SYNCHSW_SW_TRIG(__x) \
+	MCDE_VAL2REG(MCDE_CHNL2SYNCHSW, SW_TRIG, __x)
+#define MCDE_CHNL3SYNCHSW 0x0000066C
+#define MCDE_CHNL3SYNCHSW_SW_TRIG_SHIFT 0
+#define MCDE_CHNL3SYNCHSW_SW_TRIG_MASK 0x00000001
+#define MCDE_CHNL3SYNCHSW_SW_TRIG(__x) \
+	MCDE_VAL2REG(MCDE_CHNL3SYNCHSW, SW_TRIG, __x)
+#define MCDE_CHNL0BCKGNDCOL 0x00000610
+#define MCDE_CHNL0BCKGNDCOL_GROUPOFFSET 0x20
+#define MCDE_CHNL0BCKGNDCOL_B_SHIFT 0
+#define MCDE_CHNL0BCKGNDCOL_B_MASK 0x000000FF
+#define MCDE_CHNL0BCKGNDCOL_B(__x) \
+	MCDE_VAL2REG(MCDE_CHNL0BCKGNDCOL, B, __x)
+#define MCDE_CHNL0BCKGNDCOL_G_SHIFT 8
+#define MCDE_CHNL0BCKGNDCOL_G_MASK 0x0000FF00
+#define MCDE_CHNL0BCKGNDCOL_G(__x) \
+	MCDE_VAL2REG(MCDE_CHNL0BCKGNDCOL, G, __x)
+#define MCDE_CHNL0BCKGNDCOL_R_SHIFT 16
+#define MCDE_CHNL0BCKGNDCOL_R_MASK 0x00FF0000
+#define MCDE_CHNL0BCKGNDCOL_R(__x) \
+	MCDE_VAL2REG(MCDE_CHNL0BCKGNDCOL, R, __x)
+#define MCDE_CHNL1BCKGNDCOL 0x00000630
+#define MCDE_CHNL1BCKGNDCOL_B_SHIFT 0
+#define MCDE_CHNL1BCKGNDCOL_B_MASK 0x000000FF
+#define MCDE_CHNL1BCKGNDCOL_B(__x) \
+	MCDE_VAL2REG(MCDE_CHNL1BCKGNDCOL, B, __x)
+#define MCDE_CHNL1BCKGNDCOL_G_SHIFT 8
+#define MCDE_CHNL1BCKGNDCOL_G_MASK 0x0000FF00
+#define MCDE_CHNL1BCKGNDCOL_G(__x) \
+	MCDE_VAL2REG(MCDE_CHNL1BCKGNDCOL, G, __x)
+#define MCDE_CHNL1BCKGNDCOL_R_SHIFT 16
+#define MCDE_CHNL1BCKGNDCOL_R_MASK 0x00FF0000
+#define MCDE_CHNL1BCKGNDCOL_R(__x) \
+	MCDE_VAL2REG(MCDE_CHNL1BCKGNDCOL, R, __x)
+#define MCDE_CHNL2BCKGNDCOL 0x00000650
+#define MCDE_CHNL2BCKGNDCOL_B_SHIFT 0
+#define MCDE_CHNL2BCKGNDCOL_B_MASK 0x000000FF
+#define MCDE_CHNL2BCKGNDCOL_B(__x) \
+	MCDE_VAL2REG(MCDE_CHNL2BCKGNDCOL, B, __x)
+#define MCDE_CHNL2BCKGNDCOL_G_SHIFT 8
+#define MCDE_CHNL2BCKGNDCOL_G_MASK 0x0000FF00
+#define MCDE_CHNL2BCKGNDCOL_G(__x) \
+	MCDE_VAL2REG(MCDE_CHNL2BCKGNDCOL, G, __x)
+#define MCDE_CHNL2BCKGNDCOL_R_SHIFT 16
+#define MCDE_CHNL2BCKGNDCOL_R_MASK 0x00FF0000
+#define MCDE_CHNL2BCKGNDCOL_R(__x) \
+	MCDE_VAL2REG(MCDE_CHNL2BCKGNDCOL, R, __x)
+#define MCDE_CHNL3BCKGNDCOL 0x00000670
+#define MCDE_CHNL3BCKGNDCOL_B_SHIFT 0
+#define MCDE_CHNL3BCKGNDCOL_B_MASK 0x000000FF
+#define MCDE_CHNL3BCKGNDCOL_B(__x) \
+	MCDE_VAL2REG(MCDE_CHNL3BCKGNDCOL, B, __x)
+#define MCDE_CHNL3BCKGNDCOL_G_SHIFT 8
+#define MCDE_CHNL3BCKGNDCOL_G_MASK 0x0000FF00
+#define MCDE_CHNL3BCKGNDCOL_G(__x) \
+	MCDE_VAL2REG(MCDE_CHNL3BCKGNDCOL, G, __x)
+#define MCDE_CHNL3BCKGNDCOL_R_SHIFT 16
+#define MCDE_CHNL3BCKGNDCOL_R_MASK 0x00FF0000
+#define MCDE_CHNL3BCKGNDCOL_R(__x) \
+	MCDE_VAL2REG(MCDE_CHNL3BCKGNDCOL, R, __x)
+#define MCDE_CHNL0PRIO_V1 0x00000614
+#define MCDE_CHNL0PRIO_V1_GROUPOFFSET 0x20
+#define MCDE_CHNL0PRIO_V1_CHNLPRIO_SHIFT 0
+#define MCDE_CHNL0PRIO_V1_CHNLPRIO_MASK 0x0000000F
+#define MCDE_CHNL0PRIO_V1_CHNLPRIO(__x) \
+	MCDE_VAL2REG(MCDE_CHNL0PRIO_V1, CHNLPRIO, __x)
+#define MCDE_CHNL1PRIO_V1 0x00000634
+#define MCDE_CHNL1PRIO_V1_CHNLPRIO_SHIFT 0
+#define MCDE_CHNL1PRIO_V1_CHNLPRIO_MASK 0x0000000F
+#define MCDE_CHNL1PRIO_V1_CHNLPRIO(__x) \
+	MCDE_VAL2REG(MCDE_CHNL1PRIO_V1, CHNLPRIO, __x)
+#define MCDE_CHNL2PRIO_V1 0x00000654
+#define MCDE_CHNL2PRIO_V1_CHNLPRIO_SHIFT 0
+#define MCDE_CHNL2PRIO_V1_CHNLPRIO_MASK 0x0000000F
+#define MCDE_CHNL2PRIO_V1_CHNLPRIO(__x) \
+	MCDE_VAL2REG(MCDE_CHNL2PRIO_V1, CHNLPRIO, __x)
+#define MCDE_CHNL3PRIO_V1 0x00000674
+#define MCDE_CHNL3PRIO_V1_CHNLPRIO_SHIFT 0
+#define MCDE_CHNL3PRIO_V1_CHNLPRIO_MASK 0x0000000F
+#define MCDE_CHNL3PRIO_V1_CHNLPRIO(__x) \
+	MCDE_VAL2REG(MCDE_CHNL3PRIO_V1, CHNLPRIO, __x)
+#define MCDE_CHNL0MUXING_V2 0x00000614
+#define MCDE_CHNL0MUXING_V2_GROUPOFFSET 0x20
+#define MCDE_CHNL0MUXING_V2_FIFO_ID_SHIFT 0
+#define MCDE_CHNL0MUXING_V2_FIFO_ID_MASK 0x00000007
+#define MCDE_CHNL0MUXING_V2_FIFO_ID_FIFO_A 0
+#define MCDE_CHNL0MUXING_V2_FIFO_ID_FIFO_B 1
+#define MCDE_CHNL0MUXING_V2_FIFO_ID_FIFO_C0 2
+#define MCDE_CHNL0MUXING_V2_FIFO_ID_FIFO_C1 3
+#define MCDE_CHNL0MUXING_V2_FIFO_ID_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_CHNL0MUXING_V2, FIFO_ID, \
+	MCDE_CHNL0MUXING_V2_FIFO_ID_##__x)
+#define MCDE_CHNL0MUXING_V2_FIFO_ID(__x) \
+	MCDE_VAL2REG(MCDE_CHNL0MUXING_V2, FIFO_ID, __x)
+#define MCDE_CHNL1MUXING_V2 0x00000634
+#define MCDE_CHNL1MUXING_V2_FIFO_ID_SHIFT 0
+#define MCDE_CHNL1MUXING_V2_FIFO_ID_MASK 0x00000007
+#define MCDE_CHNL1MUXING_V2_FIFO_ID_FIFO_A 0
+#define MCDE_CHNL1MUXING_V2_FIFO_ID_FIFO_B 1
+#define MCDE_CHNL1MUXING_V2_FIFO_ID_FIFO_C0 2
+#define MCDE_CHNL1MUXING_V2_FIFO_ID_FIFO_C1 3
+#define MCDE_CHNL1MUXING_V2_FIFO_ID_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_CHNL1MUXING_V2, FIFO_ID, \
+	MCDE_CHNL1MUXING_V2_FIFO_ID_##__x)
+#define MCDE_CHNL1MUXING_V2_FIFO_ID(__x) \
+	MCDE_VAL2REG(MCDE_CHNL1MUXING_V2, FIFO_ID, __x)
+#define MCDE_CHNL2MUXING_V2 0x00000654
+#define MCDE_CHNL2MUXING_V2_FIFO_ID_SHIFT 0
+#define MCDE_CHNL2MUXING_V2_FIFO_ID_MASK 0x00000007
+#define MCDE_CHNL2MUXING_V2_FIFO_ID_FIFO_A 0
+#define MCDE_CHNL2MUXING_V2_FIFO_ID_FIFO_B 1
+#define MCDE_CHNL2MUXING_V2_FIFO_ID_FIFO_C0 2
+#define MCDE_CHNL2MUXING_V2_FIFO_ID_FIFO_C1 3
+#define MCDE_CHNL2MUXING_V2_FIFO_ID_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_CHNL2MUXING_V2, FIFO_ID, \
+	MCDE_CHNL2MUXING_V2_FIFO_ID_##__x)
+#define MCDE_CHNL2MUXING_V2_FIFO_ID(__x) \
+	MCDE_VAL2REG(MCDE_CHNL2MUXING_V2, FIFO_ID, __x)
+#define MCDE_CHNL3MUXING_V2 0x00000674
+#define MCDE_CHNL3MUXING_V2_FIFO_ID_SHIFT 0
+#define MCDE_CHNL3MUXING_V2_FIFO_ID_MASK 0x00000007
+#define MCDE_CHNL3MUXING_V2_FIFO_ID_FIFO_A 0
+#define MCDE_CHNL3MUXING_V2_FIFO_ID_FIFO_B 1
+#define MCDE_CHNL3MUXING_V2_FIFO_ID_FIFO_C0 2
+#define MCDE_CHNL3MUXING_V2_FIFO_ID_FIFO_C1 3
+#define MCDE_CHNL3MUXING_V2_FIFO_ID_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_CHNL3MUXING_V2, FIFO_ID, \
+	MCDE_CHNL3MUXING_V2_FIFO_ID_##__x)
+#define MCDE_CHNL3MUXING_V2_FIFO_ID(__x) \
+	MCDE_VAL2REG(MCDE_CHNL3MUXING_V2, FIFO_ID, __x)
+#define MCDE_CRA0 0x00000800
+#define MCDE_CRA0_GROUPOFFSET 0x200
+#define MCDE_CRA0_FLOEN_SHIFT 0
+#define MCDE_CRA0_FLOEN_MASK 0x00000001
+#define MCDE_CRA0_FLOEN(__x) \
+	MCDE_VAL2REG(MCDE_CRA0, FLOEN, __x)
+#define MCDE_CRA0_POWEREN_SHIFT 1
+#define MCDE_CRA0_POWEREN_MASK 0x00000002
+#define MCDE_CRA0_POWEREN(__x) \
+	MCDE_VAL2REG(MCDE_CRA0, POWEREN, __x)
+#define MCDE_CRA0_BLENDEN_SHIFT 2
+#define MCDE_CRA0_BLENDEN_MASK 0x00000004
+#define MCDE_CRA0_BLENDEN(__x) \
+	MCDE_VAL2REG(MCDE_CRA0, BLENDEN, __x)
+#define MCDE_CRA0_AFLICKEN_SHIFT 3
+#define MCDE_CRA0_AFLICKEN_MASK 0x00000008
+#define MCDE_CRA0_AFLICKEN(__x) \
+	MCDE_VAL2REG(MCDE_CRA0, AFLICKEN, __x)
+#define MCDE_CRA0_PALEN_SHIFT 4
+#define MCDE_CRA0_PALEN_MASK 0x00000010
+#define MCDE_CRA0_PALEN(__x) \
+	MCDE_VAL2REG(MCDE_CRA0, PALEN, __x)
+#define MCDE_CRA0_DITHEN_SHIFT 5
+#define MCDE_CRA0_DITHEN_MASK 0x00000020
+#define MCDE_CRA0_DITHEN(__x) \
+	MCDE_VAL2REG(MCDE_CRA0, DITHEN, __x)
+#define MCDE_CRA0_GAMEN_SHIFT 6
+#define MCDE_CRA0_GAMEN_MASK 0x00000040
+#define MCDE_CRA0_GAMEN(__x) \
+	MCDE_VAL2REG(MCDE_CRA0, GAMEN, __x)
+#define MCDE_CRA0_KEYCTRL_SHIFT 7
+#define MCDE_CRA0_KEYCTRL_MASK 0x00000380
+#define MCDE_CRA0_KEYCTRL_OFF 0
+#define MCDE_CRA0_KEYCTRL_ALPHA_RGB 1
+#define MCDE_CRA0_KEYCTRL_RGB 2
+#define MCDE_CRA0_KEYCTRL_FALPHA_FRGB 4
+#define MCDE_CRA0_KEYCTRL_FRGB 5
+#define MCDE_CRA0_KEYCTRL_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_CRA0, KEYCTRL, MCDE_CRA0_KEYCTRL_##__x)
+#define MCDE_CRA0_KEYCTRL(__x) \
+	MCDE_VAL2REG(MCDE_CRA0, KEYCTRL, __x)
+#define MCDE_CRA0_BLENDCTRL_SHIFT 10
+#define MCDE_CRA0_BLENDCTRL_MASK 0x00000400
+#define MCDE_CRA0_BLENDCTRL_SOURCE 0
+#define MCDE_CRA0_BLENDCTRL_CONSTANT 1
+#define MCDE_CRA0_BLENDCTRL_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_CRA0, BLENDCTRL, MCDE_CRA0_BLENDCTRL_##__x)
+#define MCDE_CRA0_BLENDCTRL(__x) \
+	MCDE_VAL2REG(MCDE_CRA0, BLENDCTRL, __x)
+#define MCDE_CRA0_FLICKMODE_SHIFT 11
+#define MCDE_CRA0_FLICKMODE_MASK 0x00001800
+#define MCDE_CRA0_FLICKMODE_FORCE_FILTER_0 0
+#define MCDE_CRA0_FLICKMODE_ADAPTIVE 1
+#define MCDE_CRA0_FLICKMODE_TEST_MODE 2
+#define MCDE_CRA0_FLICKMODE_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_CRA0, FLICKMODE, MCDE_CRA0_FLICKMODE_##__x)
+#define MCDE_CRA0_FLICKMODE(__x) \
+	MCDE_VAL2REG(MCDE_CRA0, FLICKMODE, __x)
+#define MCDE_CRA0_FLOCKFORMAT_SHIFT 13
+#define MCDE_CRA0_FLOCKFORMAT_MASK 0x00002000
+#define MCDE_CRA0_FLOCKFORMAT_YCBCR 0
+#define MCDE_CRA0_FLOCKFORMAT_RGB 1
+#define MCDE_CRA0_FLOCKFORMAT_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_CRA0, FLOCKFORMAT, MCDE_CRA0_FLOCKFORMAT_##__x)
+#define MCDE_CRA0_FLOCKFORMAT(__x) \
+	MCDE_VAL2REG(MCDE_CRA0, FLOCKFORMAT, __x)
+#define MCDE_CRA0_PALMODE_SHIFT 14
+#define MCDE_CRA0_PALMODE_MASK 0x00004000
+#define MCDE_CRA0_PALMODE_PALETTE 0
+#define MCDE_CRA0_PALMODE_GAMMA 1
+#define MCDE_CRA0_PALMODE(__x) \
+	MCDE_VAL2REG(MCDE_CRA0, PALMODE, __x)
+#define MCDE_CRA0_OLEDEN_SHIFT 15
+#define MCDE_CRA0_OLEDEN_MASK 0x00008000
+#define MCDE_CRA0_OLEDEN(__x) \
+	MCDE_VAL2REG(MCDE_CRA0, OLEDEN, __x)
+#define MCDE_CRA0_ALPHABLEND_SHIFT 16
+#define MCDE_CRA0_ALPHABLEND_MASK 0x00FF0000
+#define MCDE_CRA0_ALPHABLEND(__x) \
+	MCDE_VAL2REG(MCDE_CRA0, ALPHABLEND, __x)
+#define MCDE_CRA0_ROTEN_SHIFT 24
+#define MCDE_CRA0_ROTEN_MASK 0x01000000
+#define MCDE_CRA0_ROTEN(__x) \
+	MCDE_VAL2REG(MCDE_CRA0, ROTEN, __x)
+#define MCDE_CRA0_ROTBURSTSIZE_V1_SHIFT 25
+#define MCDE_CRA0_ROTBURSTSIZE_V1_MASK 0x0E000000
+#define MCDE_CRA0_ROTBURSTSIZE_V1_1W 0
+#define MCDE_CRA0_ROTBURSTSIZE_V1_2W 1
+#define MCDE_CRA0_ROTBURSTSIZE_V1_4W 2
+#define MCDE_CRA0_ROTBURSTSIZE_V1_8W 3
+#define MCDE_CRA0_ROTBURSTSIZE_V1_16W 4
+#define MCDE_CRA0_ROTBURSTSIZE_V1_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_CRA0, ROTBURSTSIZE_V1, \
+	MCDE_CRA0_ROTBURSTSIZE_V1_##__x)
+#define MCDE_CRA0_ROTBURSTSIZE_V1(__x) \
+	MCDE_VAL2REG(MCDE_CRA0, ROTBURSTSIZE_V1, __x)
+#define MCDE_CRA0_ROTBURSTSIZE_HW_V1_SHIFT 28
+#define MCDE_CRA0_ROTBURSTSIZE_HW_V1_MASK 0x10000000
+#define MCDE_CRA0_ROTBURSTSIZE_HW_V1(__x) \
+	MCDE_VAL2REG(MCDE_CRA0, ROTBURSTSIZE_HW_V1, __x)
+#define MCDE_CRB0 0x00000A00
+#define MCDE_CRB0_FLOEN_SHIFT 0
+#define MCDE_CRB0_FLOEN_MASK 0x00000001
+#define MCDE_CRB0_FLOEN(__x) \
+	MCDE_VAL2REG(MCDE_CRB0, FLOEN, __x)
+#define MCDE_CRB0_POWEREN_SHIFT 1
+#define MCDE_CRB0_POWEREN_MASK 0x00000002
+#define MCDE_CRB0_POWEREN(__x) \
+	MCDE_VAL2REG(MCDE_CRB0, POWEREN, __x)
+#define MCDE_CRB0_BLENDEN_SHIFT 2
+#define MCDE_CRB0_BLENDEN_MASK 0x00000004
+#define MCDE_CRB0_BLENDEN(__x) \
+	MCDE_VAL2REG(MCDE_CRB0, BLENDEN, __x)
+#define MCDE_CRB0_AFLICKEN_SHIFT 3
+#define MCDE_CRB0_AFLICKEN_MASK 0x00000008
+#define MCDE_CRB0_AFLICKEN(__x) \
+	MCDE_VAL2REG(MCDE_CRB0, AFLICKEN, __x)
+#define MCDE_CRB0_PALEN_SHIFT 4
+#define MCDE_CRB0_PALEN_MASK 0x00000010
+#define MCDE_CRB0_PALEN(__x) \
+	MCDE_VAL2REG(MCDE_CRB0, PALEN, __x)
+#define MCDE_CRB0_DITHEN_SHIFT 5
+#define MCDE_CRB0_DITHEN_MASK 0x00000020
+#define MCDE_CRB0_DITHEN(__x) \
+	MCDE_VAL2REG(MCDE_CRB0, DITHEN, __x)
+#define MCDE_CRB0_GAMEN_SHIFT 6
+#define MCDE_CRB0_GAMEN_MASK 0x00000040
+#define MCDE_CRB0_GAMEN(__x) \
+	MCDE_VAL2REG(MCDE_CRB0, GAMEN, __x)
+#define MCDE_CRB0_KEYCTRL_SHIFT 7
+#define MCDE_CRB0_KEYCTRL_MASK 0x00000380
+#define MCDE_CRB0_KEYCTRL_OFF 0
+#define MCDE_CRB0_KEYCTRL_ALPHA_RGB 1
+#define MCDE_CRB0_KEYCTRL_RGB 2
+#define MCDE_CRB0_KEYCTRL_FALPHA_FRGB 4
+#define MCDE_CRB0_KEYCTRL_FRGB 5
+#define MCDE_CRB0_KEYCTRL_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_CRB0, KEYCTRL, MCDE_CRB0_KEYCTRL_##__x)
+#define MCDE_CRB0_KEYCTRL(__x) \
+	MCDE_VAL2REG(MCDE_CRB0, KEYCTRL, __x)
+#define MCDE_CRB0_BLENDCTRL_SHIFT 10
+#define MCDE_CRB0_BLENDCTRL_MASK 0x00000400
+#define MCDE_CRB0_BLENDCTRL_SOURCE 0
+#define MCDE_CRB0_BLENDCTRL_CONSTANT 1
+#define MCDE_CRB0_BLENDCTRL_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_CRB0, BLENDCTRL, MCDE_CRB0_BLENDCTRL_##__x)
+#define MCDE_CRB0_BLENDCTRL(__x) \
+	MCDE_VAL2REG(MCDE_CRB0, BLENDCTRL, __x)
+#define MCDE_CRB0_FLICKMODE_SHIFT 11
+#define MCDE_CRB0_FLICKMODE_MASK 0x00001800
+#define MCDE_CRB0_FLICKMODE_FORCE_FILTER_0 0
+#define MCDE_CRB0_FLICKMODE_ADAPTIVE 1
+#define MCDE_CRB0_FLICKMODE_TEST_MODE 2
+#define MCDE_CRB0_FLICKMODE_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_CRB0, FLICKMODE, MCDE_CRB0_FLICKMODE_##__x)
+#define MCDE_CRB0_FLICKMODE(__x) \
+	MCDE_VAL2REG(MCDE_CRB0, FLICKMODE, __x)
+#define MCDE_CRB0_FLOCKFORMAT_SHIFT 13
+#define MCDE_CRB0_FLOCKFORMAT_MASK 0x00002000
+#define MCDE_CRB0_FLOCKFORMAT_YCBCR 0
+#define MCDE_CRB0_FLOCKFORMAT_RGB 1
+#define MCDE_CRB0_FLOCKFORMAT_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_CRB0, FLOCKFORMAT, MCDE_CRB0_FLOCKFORMAT_##__x)
+#define MCDE_CRB0_FLOCKFORMAT(__x) \
+	MCDE_VAL2REG(MCDE_CRB0, FLOCKFORMAT, __x)
+#define MCDE_CRB0_PALMODE_SHIFT 14
+#define MCDE_CRB0_PALMODE_MASK 0x00004000
+#define MCDE_CRB0_PALMODE_PALETTE 0
+#define MCDE_CRB0_PALMODE_GAMMA 1
+#define MCDE_CRB0_PALMODE(__x) \
+	MCDE_VAL2REG(MCDE_CRB0, PALMODE, __x)
+#define MCDE_CRB0_OLEDEN_SHIFT 15
+#define MCDE_CRB0_OLEDEN_MASK 0x00008000
+#define MCDE_CRB0_OLEDEN(__x) \
+	MCDE_VAL2REG(MCDE_CRB0, OLEDEN, __x)
+#define MCDE_CRB0_ALPHABLEND_SHIFT 16
+#define MCDE_CRB0_ALPHABLEND_MASK 0x00FF0000
+#define MCDE_CRB0_ALPHABLEND(__x) \
+	MCDE_VAL2REG(MCDE_CRB0, ALPHABLEND, __x)
+#define MCDE_CRB0_ROTEN_SHIFT 24
+#define MCDE_CRB0_ROTEN_MASK 0x01000000
+#define MCDE_CRB0_ROTEN(__x) \
+	MCDE_VAL2REG(MCDE_CRB0, ROTEN, __x)
+#define MCDE_CRB0_ROTBURSTSIZE_V1_SHIFT 25
+#define MCDE_CRB0_ROTBURSTSIZE_V1_MASK 0x0E000000
+#define MCDE_CRB0_ROTBURSTSIZE_V1_1W 0
+#define MCDE_CRB0_ROTBURSTSIZE_V1_2W 1
+#define MCDE_CRB0_ROTBURSTSIZE_V1_4W 2
+#define MCDE_CRB0_ROTBURSTSIZE_V1_8W 3
+#define MCDE_CRB0_ROTBURSTSIZE_V1_16W 4
+#define MCDE_CRB0_ROTBURSTSIZE_V1_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_CRB0, ROTBURSTSIZE_V1, \
+	MCDE_CRB0_ROTBURSTSIZE_V1_##__x)
+#define MCDE_CRB0_ROTBURSTSIZE_V1(__x) \
+	MCDE_VAL2REG(MCDE_CRB0, ROTBURSTSIZE_V1, __x)
+#define MCDE_CRB0_ROTBURSTSIZE_HW_V1_SHIFT 28
+#define MCDE_CRB0_ROTBURSTSIZE_HW_V1_MASK 0x10000000
+#define MCDE_CRB0_ROTBURSTSIZE_HW_V1(__x) \
+	MCDE_VAL2REG(MCDE_CRB0, ROTBURSTSIZE_HW_V1, __x)
+#define MCDE_CRA1 0x00000804
+#define MCDE_CRA1_GROUPOFFSET 0x200
+#define MCDE_CRA1_PCD_SHIFT 0
+#define MCDE_CRA1_PCD_MASK 0x000003FF
+#define MCDE_CRA1_PCD(__x) \
+	MCDE_VAL2REG(MCDE_CRA1, PCD, __x)
+#define MCDE_CRA1_CLKSEL_SHIFT 10
+#define MCDE_CRA1_CLKSEL_MASK 0x00001C00
+#define MCDE_CRA1_CLKSEL_LCD 0
+#define MCDE_CRA1_CLKSEL_HDMI 1
+#define MCDE_CRA1_CLKSEL_TV 2
+#define MCDE_CRA1_CLKSEL_EXT_TV1 3
+#define MCDE_CRA1_CLKSEL_EXT_TV2 4
+#define MCDE_CRA1_CLKSEL_166MHZ 5
+#define MCDE_CRA1_CLKSEL_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_CRA1, CLKSEL, MCDE_CRA1_CLKSEL_##__x)
+#define MCDE_CRA1_CLKSEL(__x) \
+	MCDE_VAL2REG(MCDE_CRA1, CLKSEL, __x)
+#define MCDE_CRA1_CDWIN_SHIFT 13
+#define MCDE_CRA1_CDWIN_MASK 0x0001E000
+#define MCDE_CRA1_CDWIN_8BPP_C1 0
+#define MCDE_CRA1_CDWIN_12BPP_C1 1
+#define MCDE_CRA1_CDWIN_12BPP_C2 2
+#define MCDE_CRA1_CDWIN_16BPP_C1 3
+#define MCDE_CRA1_CDWIN_16BPP_C2 4
+#define MCDE_CRA1_CDWIN_16BPP_C3 5
+#define MCDE_CRA1_CDWIN_18BPP_C1 6
+#define MCDE_CRA1_CDWIN_18BPP_C2 7
+#define MCDE_CRA1_CDWIN_24BPP 8
+#define MCDE_CRA1_CDWIN_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_CRA1, CDWIN, MCDE_CRA1_CDWIN_##__x)
+#define MCDE_CRA1_CDWIN(__x) \
+	MCDE_VAL2REG(MCDE_CRA1, CDWIN, __x)
+#define MCDE_CRA1_OUTBPP_SHIFT 25
+#define MCDE_CRA1_OUTBPP_MASK 0x1E000000
+#define MCDE_CRA1_OUTBPP_MONO1 0
+#define MCDE_CRA1_OUTBPP_MONO2 1
+#define MCDE_CRA1_OUTBPP_MONO4 2
+#define MCDE_CRA1_OUTBPP_MONO8 3
+#define MCDE_CRA1_OUTBPP_8BPP 4
+#define MCDE_CRA1_OUTBPP_12BPP 5
+#define MCDE_CRA1_OUTBPP_15BPP 6
+#define MCDE_CRA1_OUTBPP_16BPP 7
+#define MCDE_CRA1_OUTBPP_18BPP 8
+#define MCDE_CRA1_OUTBPP_24BPP 9
+#define MCDE_CRA1_OUTBPP_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_CRA1, OUTBPP, MCDE_CRA1_OUTBPP_##__x)
+#define MCDE_CRA1_OUTBPP(__x) \
+	MCDE_VAL2REG(MCDE_CRA1, OUTBPP, __x)
+#define MCDE_CRA1_BCD_SHIFT 29
+#define MCDE_CRA1_BCD_MASK 0x20000000
+#define MCDE_CRA1_BCD(__x) \
+	MCDE_VAL2REG(MCDE_CRA1, BCD, __x)
+#define MCDE_CRA1_CLKTYPE_SHIFT 30
+#define MCDE_CRA1_CLKTYPE_MASK 0x40000000
+#define MCDE_CRA1_CLKTYPE_EXTERNAL 0
+#define MCDE_CRA1_CLKTYPE_INTERNAL 1
+#define MCDE_CRA1_CLKTYPE_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_CRA1, CLKTYPE, MCDE_CRA1_CLKTYPE_##__x)
+#define MCDE_CRA1_CLKTYPE(__x) \
+	MCDE_VAL2REG(MCDE_CRA1, CLKTYPE, __x)
+#define MCDE_CRA1_TEFFECTEN_V1_SHIFT 31
+#define MCDE_CRA1_TEFFECTEN_V1_MASK 0x80000000
+#define MCDE_CRA1_TEFFECTEN_V1(__x) \
+	MCDE_VAL2REG(MCDE_CRA1, TEFFECTEN_V1, __x)
+#define MCDE_CRB1 0x00000A04
+#define MCDE_CRB1_PCD_SHIFT 0
+#define MCDE_CRB1_PCD_MASK 0x000003FF
+#define MCDE_CRB1_PCD(__x) \
+	MCDE_VAL2REG(MCDE_CRB1, PCD, __x)
+#define MCDE_CRB1_CLKSEL_SHIFT 10
+#define MCDE_CRB1_CLKSEL_MASK 0x00001C00
+#define MCDE_CRB1_CLKSEL_LCD 0
+#define MCDE_CRB1_CLKSEL_HDMI 1
+#define MCDE_CRB1_CLKSEL_TV 2
+#define MCDE_CRB1_CLKSEL_EXT_TV1 3
+#define MCDE_CRB1_CLKSEL_EXT_TV2 4
+#define MCDE_CRB1_CLKSEL_166MHZ 5
+#define MCDE_CRB1_CLKSEL_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_CRB1, CLKSEL, MCDE_CRB1_CLKSEL_##__x)
+#define MCDE_CRB1_CLKSEL(__x) \
+	MCDE_VAL2REG(MCDE_CRB1, CLKSEL, __x)
+#define MCDE_CRB1_CDWIN_SHIFT 13
+#define MCDE_CRB1_CDWIN_MASK 0x0001E000
+#define MCDE_CRB1_CDWIN_8BPP_C1 0
+#define MCDE_CRB1_CDWIN_12BPP_C1 1
+#define MCDE_CRB1_CDWIN_12BPP_C2 2
+#define MCDE_CRB1_CDWIN_16BPP_C1 3
+#define MCDE_CRB1_CDWIN_16BPP_C2 4
+#define MCDE_CRB1_CDWIN_16BPP_C3 5
+#define MCDE_CRB1_CDWIN_18BPP_C1 6
+#define MCDE_CRB1_CDWIN_18BPP_C2 7
+#define MCDE_CRB1_CDWIN_24BPP 8
+#define MCDE_CRB1_CDWIN_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_CRB1, CDWIN, MCDE_CRB1_CDWIN_##__x)
+#define MCDE_CRB1_CDWIN(__x) \
+	MCDE_VAL2REG(MCDE_CRB1, CDWIN, __x)
+#define MCDE_CRB1_OUTBPP_SHIFT 25
+#define MCDE_CRB1_OUTBPP_MASK 0x1E000000
+#define MCDE_CRB1_OUTBPP_MONO1 0
+#define MCDE_CRB1_OUTBPP_MONO2 1
+#define MCDE_CRB1_OUTBPP_MONO4 2
+#define MCDE_CRB1_OUTBPP_MONO8 3
+#define MCDE_CRB1_OUTBPP_8BPP 4
+#define MCDE_CRB1_OUTBPP_12BPP 5
+#define MCDE_CRB1_OUTBPP_15BPP 6
+#define MCDE_CRB1_OUTBPP_16BPP 7
+#define MCDE_CRB1_OUTBPP_18BPP 8
+#define MCDE_CRB1_OUTBPP_24BPP 9
+#define MCDE_CRB1_OUTBPP_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_CRB1, OUTBPP, MCDE_CRB1_OUTBPP_##__x)
+#define MCDE_CRB1_OUTBPP(__x) \
+	MCDE_VAL2REG(MCDE_CRB1, OUTBPP, __x)
+#define MCDE_CRB1_BCD_SHIFT 29
+#define MCDE_CRB1_BCD_MASK 0x20000000
+#define MCDE_CRB1_BCD(__x) \
+	MCDE_VAL2REG(MCDE_CRB1, BCD, __x)
+#define MCDE_CRB1_CLKTYPE_SHIFT 30
+#define MCDE_CRB1_CLKTYPE_MASK 0x40000000
+#define MCDE_CRB1_CLKTYPE_EXTERNAL 0
+#define MCDE_CRB1_CLKTYPE_INTERNAL 1
+#define MCDE_CRB1_CLKTYPE_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_CRB1, CLKTYPE, MCDE_CRB1_CLKTYPE_##__x)
+#define MCDE_CRB1_CLKTYPE(__x) \
+	MCDE_VAL2REG(MCDE_CRB1, CLKTYPE, __x)
+#define MCDE_CRB1_TEFFECTEN_V1_SHIFT 31
+#define MCDE_CRB1_TEFFECTEN_V1_MASK 0x80000000
+#define MCDE_CRB1_TEFFECTEN_V1(__x) \
+	MCDE_VAL2REG(MCDE_CRB1, TEFFECTEN_V1, __x)
+#define MCDE_COLKEYA 0x00000808
+#define MCDE_COLKEYA_GROUPOFFSET 0x200
+#define MCDE_COLKEYA_KEYB_SHIFT 0
+#define MCDE_COLKEYA_KEYB_MASK 0x000000FF
+#define MCDE_COLKEYA_KEYB(__x) \
+	MCDE_VAL2REG(MCDE_COLKEYA, KEYB, __x)
+#define MCDE_COLKEYA_KEYG_SHIFT 8
+#define MCDE_COLKEYA_KEYG_MASK 0x0000FF00
+#define MCDE_COLKEYA_KEYG(__x) \
+	MCDE_VAL2REG(MCDE_COLKEYA, KEYG, __x)
+#define MCDE_COLKEYA_KEYR_SHIFT 16
+#define MCDE_COLKEYA_KEYR_MASK 0x00FF0000
+#define MCDE_COLKEYA_KEYR(__x) \
+	MCDE_VAL2REG(MCDE_COLKEYA, KEYR, __x)
+#define MCDE_COLKEYA_KEYA_SHIFT 24
+#define MCDE_COLKEYA_KEYA_MASK 0xFF000000
+#define MCDE_COLKEYA_KEYA(__x) \
+	MCDE_VAL2REG(MCDE_COLKEYA, KEYA, __x)
+#define MCDE_COLKEYB 0x00000A08
+#define MCDE_COLKEYB_KEYB_SHIFT 0
+#define MCDE_COLKEYB_KEYB_MASK 0x000000FF
+#define MCDE_COLKEYB_KEYB(__x) \
+	MCDE_VAL2REG(MCDE_COLKEYB, KEYB, __x)
+#define MCDE_COLKEYB_KEYG_SHIFT 8
+#define MCDE_COLKEYB_KEYG_MASK 0x0000FF00
+#define MCDE_COLKEYB_KEYG(__x) \
+	MCDE_VAL2REG(MCDE_COLKEYB, KEYG, __x)
+#define MCDE_COLKEYB_KEYR_SHIFT 16
+#define MCDE_COLKEYB_KEYR_MASK 0x00FF0000
+#define MCDE_COLKEYB_KEYR(__x) \
+	MCDE_VAL2REG(MCDE_COLKEYB, KEYR, __x)
+#define MCDE_COLKEYB_KEYA_SHIFT 24
+#define MCDE_COLKEYB_KEYA_MASK 0xFF000000
+#define MCDE_COLKEYB_KEYA(__x) \
+	MCDE_VAL2REG(MCDE_COLKEYB, KEYA, __x)
+#define MCDE_FCOLKEYA 0x0000080C
+#define MCDE_FCOLKEYA_GROUPOFFSET 0x200
+#define MCDE_FCOLKEYA_FKEYB_SHIFT 0
+#define MCDE_FCOLKEYA_FKEYB_MASK 0x000000FF
+#define MCDE_FCOLKEYA_FKEYB(__x) \
+	MCDE_VAL2REG(MCDE_FCOLKEYA, FKEYB, __x)
+#define MCDE_FCOLKEYA_FKEYG_SHIFT 8
+#define MCDE_FCOLKEYA_FKEYG_MASK 0x0000FF00
+#define MCDE_FCOLKEYA_FKEYG(__x) \
+	MCDE_VAL2REG(MCDE_FCOLKEYA, FKEYG, __x)
+#define MCDE_FCOLKEYA_FKEYR_SHIFT 16
+#define MCDE_FCOLKEYA_FKEYR_MASK 0x00FF0000
+#define MCDE_FCOLKEYA_FKEYR(__x) \
+	MCDE_VAL2REG(MCDE_FCOLKEYA, FKEYR, __x)
+#define MCDE_FCOLKEYA_FKEYA_SHIFT 24
+#define MCDE_FCOLKEYA_FKEYA_MASK 0xFF000000
+#define MCDE_FCOLKEYA_FKEYA(__x) \
+	MCDE_VAL2REG(MCDE_FCOLKEYA, FKEYA, __x)
+#define MCDE_FCOLKEYB 0x00000A0C
+#define MCDE_FCOLKEYB_FKEYB_SHIFT 0
+#define MCDE_FCOLKEYB_FKEYB_MASK 0x000000FF
+#define MCDE_FCOLKEYB_FKEYB(__x) \
+	MCDE_VAL2REG(MCDE_FCOLKEYB, FKEYB, __x)
+#define MCDE_FCOLKEYB_FKEYG_SHIFT 8
+#define MCDE_FCOLKEYB_FKEYG_MASK 0x0000FF00
+#define MCDE_FCOLKEYB_FKEYG(__x) \
+	MCDE_VAL2REG(MCDE_FCOLKEYB, FKEYG, __x)
+#define MCDE_FCOLKEYB_FKEYR_SHIFT 16
+#define MCDE_FCOLKEYB_FKEYR_MASK 0x00FF0000
+#define MCDE_FCOLKEYB_FKEYR(__x) \
+	MCDE_VAL2REG(MCDE_FCOLKEYB, FKEYR, __x)
+#define MCDE_FCOLKEYB_FKEYA_SHIFT 24
+#define MCDE_FCOLKEYB_FKEYA_MASK 0xFF000000
+#define MCDE_FCOLKEYB_FKEYA(__x) \
+	MCDE_VAL2REG(MCDE_FCOLKEYB, FKEYA, __x)
+#define MCDE_RGBCONV1A 0x00000810
+#define MCDE_RGBCONV1A_GROUPOFFSET 0x200
+#define MCDE_RGBCONV1A_YR_GREEN_SHIFT 0
+#define MCDE_RGBCONV1A_YR_GREEN_MASK 0x000007FF
+#define MCDE_RGBCONV1A_YR_GREEN(__x) \
+	MCDE_VAL2REG(MCDE_RGBCONV1A, YR_GREEN, __x)
+#define MCDE_RGBCONV1A_YR_RED_SHIFT 16
+#define MCDE_RGBCONV1A_YR_RED_MASK 0x07FF0000
+#define MCDE_RGBCONV1A_YR_RED(__x) \
+	MCDE_VAL2REG(MCDE_RGBCONV1A, YR_RED, __x)
+#define MCDE_RGBCONV1B 0x00000A10
+#define MCDE_RGBCONV1B_YR_GREEN_SHIFT 0
+#define MCDE_RGBCONV1B_YR_GREEN_MASK 0x000007FF
+#define MCDE_RGBCONV1B_YR_GREEN(__x) \
+	MCDE_VAL2REG(MCDE_RGBCONV1B, YR_GREEN, __x)
+#define MCDE_RGBCONV1B_YR_RED_SHIFT 16
+#define MCDE_RGBCONV1B_YR_RED_MASK 0x07FF0000
+#define MCDE_RGBCONV1B_YR_RED(__x) \
+	MCDE_VAL2REG(MCDE_RGBCONV1B, YR_RED, __x)
+#define MCDE_RGBCONV2A 0x00000814
+#define MCDE_RGBCONV2A_GROUPOFFSET 0x200
+#define MCDE_RGBCONV2A_CR_RED_SHIFT 0
+#define MCDE_RGBCONV2A_CR_RED_MASK 0x000007FF
+#define MCDE_RGBCONV2A_CR_RED(__x) \
+	MCDE_VAL2REG(MCDE_RGBCONV2A, CR_RED, __x)
+#define MCDE_RGBCONV2A_YR_BLUE_SHIFT 16
+#define MCDE_RGBCONV2A_YR_BLUE_MASK 0x07FF0000
+#define MCDE_RGBCONV2A_YR_BLUE(__x) \
+	MCDE_VAL2REG(MCDE_RGBCONV2A, YR_BLUE, __x)
+#define MCDE_RGBCONV2B 0x00000A14
+#define MCDE_RGBCONV2B_CR_RED_SHIFT 0
+#define MCDE_RGBCONV2B_CR_RED_MASK 0x000007FF
+#define MCDE_RGBCONV2B_CR_RED(__x) \
+	MCDE_VAL2REG(MCDE_RGBCONV2B, CR_RED, __x)
+#define MCDE_RGBCONV2B_YR_BLUE_SHIFT 16
+#define MCDE_RGBCONV2B_YR_BLUE_MASK 0x07FF0000
+#define MCDE_RGBCONV2B_YR_BLUE(__x) \
+	MCDE_VAL2REG(MCDE_RGBCONV2B, YR_BLUE, __x)
+#define MCDE_RGBCONV3A 0x00000818
+#define MCDE_RGBCONV3A_GROUPOFFSET 0x200
+#define MCDE_RGBCONV3A_CR_BLUE_SHIFT 0
+#define MCDE_RGBCONV3A_CR_BLUE_MASK 0x000007FF
+#define MCDE_RGBCONV3A_CR_BLUE(__x) \
+	MCDE_VAL2REG(MCDE_RGBCONV3A, CR_BLUE, __x)
+#define MCDE_RGBCONV3A_CR_GREEN_SHIFT 16
+#define MCDE_RGBCONV3A_CR_GREEN_MASK 0x07FF0000
+#define MCDE_RGBCONV3A_CR_GREEN(__x) \
+	MCDE_VAL2REG(MCDE_RGBCONV3A, CR_GREEN, __x)
+#define MCDE_RGBCONV3B 0x00000A18
+#define MCDE_RGBCONV3B_CR_BLUE_SHIFT 0
+#define MCDE_RGBCONV3B_CR_BLUE_MASK 0x000007FF
+#define MCDE_RGBCONV3B_CR_BLUE(__x) \
+	MCDE_VAL2REG(MCDE_RGBCONV3B, CR_BLUE, __x)
+#define MCDE_RGBCONV3B_CR_GREEN_SHIFT 16
+#define MCDE_RGBCONV3B_CR_GREEN_MASK 0x07FF0000
+#define MCDE_RGBCONV3B_CR_GREEN(__x) \
+	MCDE_VAL2REG(MCDE_RGBCONV3B, CR_GREEN, __x)
+#define MCDE_RGBCONV4A 0x0000081C
+#define MCDE_RGBCONV4A_GROUPOFFSET 0x200
+#define MCDE_RGBCONV4A_CB_GREEN_SHIFT 0
+#define MCDE_RGBCONV4A_CB_GREEN_MASK 0x000007FF
+#define MCDE_RGBCONV4A_CB_GREEN(__x) \
+	MCDE_VAL2REG(MCDE_RGBCONV4A, CB_GREEN, __x)
+#define MCDE_RGBCONV4A_CB_RED_SHIFT 16
+#define MCDE_RGBCONV4A_CB_RED_MASK 0x07FF0000
+#define MCDE_RGBCONV4A_CB_RED(__x) \
+	MCDE_VAL2REG(MCDE_RGBCONV4A, CB_RED, __x)
+#define MCDE_RGBCONV4B 0x00000A1C
+#define MCDE_RGBCONV4B_CB_GREEN_SHIFT 0
+#define MCDE_RGBCONV4B_CB_GREEN_MASK 0x000007FF
+#define MCDE_RGBCONV4B_CB_GREEN(__x) \
+	MCDE_VAL2REG(MCDE_RGBCONV4B, CB_GREEN, __x)
+#define MCDE_RGBCONV4B_CB_RED_SHIFT 16
+#define MCDE_RGBCONV4B_CB_RED_MASK 0x07FF0000
+#define MCDE_RGBCONV4B_CB_RED(__x) \
+	MCDE_VAL2REG(MCDE_RGBCONV4B, CB_RED, __x)
+#define MCDE_RGBCONV5A 0x00000820
+#define MCDE_RGBCONV5A_GROUPOFFSET 0x200
+#define MCDE_RGBCONV5A_OFF_RED_SHIFT 0
+#define MCDE_RGBCONV5A_OFF_RED_MASK 0x000007FF
+#define MCDE_RGBCONV5A_OFF_RED(__x) \
+	MCDE_VAL2REG(MCDE_RGBCONV5A, OFF_RED, __x)
+#define MCDE_RGBCONV5A_CB_BLUE_SHIFT 16
+#define MCDE_RGBCONV5A_CB_BLUE_MASK 0x07FF0000
+#define MCDE_RGBCONV5A_CB_BLUE(__x) \
+	MCDE_VAL2REG(MCDE_RGBCONV5A, CB_BLUE, __x)
+#define MCDE_RGBCONV5B 0x00000A20
+#define MCDE_RGBCONV5B_OFF_RED_SHIFT 0
+#define MCDE_RGBCONV5B_OFF_RED_MASK 0x000007FF
+#define MCDE_RGBCONV5B_OFF_RED(__x) \
+	MCDE_VAL2REG(MCDE_RGBCONV5B, OFF_RED, __x)
+#define MCDE_RGBCONV5B_CB_BLUE_SHIFT 16
+#define MCDE_RGBCONV5B_CB_BLUE_MASK 0x07FF0000
+#define MCDE_RGBCONV5B_CB_BLUE(__x) \
+	MCDE_VAL2REG(MCDE_RGBCONV5B, CB_BLUE, __x)
+#define MCDE_RGBCONV6A 0x00000824
+#define MCDE_RGBCONV6A_GROUPOFFSET 0x200
+#define MCDE_RGBCONV6A_OFF_BLUE_SHIFT 0
+#define MCDE_RGBCONV6A_OFF_BLUE_MASK 0x000007FF
+#define MCDE_RGBCONV6A_OFF_BLUE(__x) \
+	MCDE_VAL2REG(MCDE_RGBCONV6A, OFF_BLUE, __x)
+#define MCDE_RGBCONV6A_OFF_GREEN_SHIFT 16
+#define MCDE_RGBCONV6A_OFF_GREEN_MASK 0x07FF0000
+#define MCDE_RGBCONV6A_OFF_GREEN(__x) \
+	MCDE_VAL2REG(MCDE_RGBCONV6A, OFF_GREEN, __x)
+#define MCDE_RGBCONV6B 0x00000A24
+#define MCDE_RGBCONV6B_OFF_BLUE_SHIFT 0
+#define MCDE_RGBCONV6B_OFF_BLUE_MASK 0x000007FF
+#define MCDE_RGBCONV6B_OFF_BLUE(__x) \
+	MCDE_VAL2REG(MCDE_RGBCONV6B, OFF_BLUE, __x)
+#define MCDE_RGBCONV6B_OFF_GREEN_SHIFT 16
+#define MCDE_RGBCONV6B_OFF_GREEN_MASK 0x07FF0000
+#define MCDE_RGBCONV6B_OFF_GREEN(__x) \
+	MCDE_VAL2REG(MCDE_RGBCONV6B, OFF_GREEN, __x)
+#define MCDE_FFCOEF0 0x00000828
+#define MCDE_FFCOEF0_COEFF0_N1_SHIFT 0
+#define MCDE_FFCOEF0_COEFF0_N1_MASK 0x000000FF
+#define MCDE_FFCOEF0_COEFF0_N1(__x) \
+	MCDE_VAL2REG(MCDE_FFCOEF0, COEFF0_N1, __x)
+#define MCDE_FFCOEF0_COEFF0_N2_SHIFT 8
+#define MCDE_FFCOEF0_COEFF0_N2_MASK 0x0000FF00
+#define MCDE_FFCOEF0_COEFF0_N2(__x) \
+	MCDE_VAL2REG(MCDE_FFCOEF0, COEFF0_N2, __x)
+#define MCDE_FFCOEF0_COEFF0_N3_SHIFT 16
+#define MCDE_FFCOEF0_COEFF0_N3_MASK 0x00FF0000
+#define MCDE_FFCOEF0_COEFF0_N3(__x) \
+	MCDE_VAL2REG(MCDE_FFCOEF0, COEFF0_N3, __x)
+#define MCDE_FFCOEF0_T0_SHIFT 24
+#define MCDE_FFCOEF0_T0_MASK 0x0F000000
+#define MCDE_FFCOEF0_T0(__x) \
+	MCDE_VAL2REG(MCDE_FFCOEF0, T0, __x)
+#define MCDE_FFCOEF1 0x0000082C
+#define MCDE_FFCOEF1_COEFF1_N1_SHIFT 0
+#define MCDE_FFCOEF1_COEFF1_N1_MASK 0x000000FF
+#define MCDE_FFCOEF1_COEFF1_N1(__x) \
+	MCDE_VAL2REG(MCDE_FFCOEF1, COEFF1_N1, __x)
+#define MCDE_FFCOEF1_COEFF1_N2_SHIFT 8
+#define MCDE_FFCOEF1_COEFF1_N2_MASK 0x0000FF00
+#define MCDE_FFCOEF1_COEFF1_N2(__x) \
+	MCDE_VAL2REG(MCDE_FFCOEF1, COEFF1_N2, __x)
+#define MCDE_FFCOEF1_COEFF1_N3_SHIFT 16
+#define MCDE_FFCOEF1_COEFF1_N3_MASK 0x00FF0000
+#define MCDE_FFCOEF1_COEFF1_N3(__x) \
+	MCDE_VAL2REG(MCDE_FFCOEF1, COEFF1_N3, __x)
+#define MCDE_FFCOEF1_T1_SHIFT 24
+#define MCDE_FFCOEF1_T1_MASK 0x0F000000
+#define MCDE_FFCOEF1_T1(__x) \
+	MCDE_VAL2REG(MCDE_FFCOEF1, T1, __x)
+#define MCDE_FFCOEF2 0x00000830
+#define MCDE_FFCOEF2_COEFF2_N1_SHIFT 0
+#define MCDE_FFCOEF2_COEFF2_N1_MASK 0x000000FF
+#define MCDE_FFCOEF2_COEFF2_N1(__x) \
+	MCDE_VAL2REG(MCDE_FFCOEF2, COEFF2_N1, __x)
+#define MCDE_FFCOEF2_COEFF2_N2_SHIFT 8
+#define MCDE_FFCOEF2_COEFF2_N2_MASK 0x0000FF00
+#define MCDE_FFCOEF2_COEFF2_N2(__x) \
+	MCDE_VAL2REG(MCDE_FFCOEF2, COEFF2_N2, __x)
+#define MCDE_FFCOEF2_COEFF2_N3_SHIFT 16
+#define MCDE_FFCOEF2_COEFF2_N3_MASK 0x00FF0000
+#define MCDE_FFCOEF2_COEFF2_N3(__x) \
+	MCDE_VAL2REG(MCDE_FFCOEF2, COEFF2_N3, __x)
+#define MCDE_FFCOEF2_T2_SHIFT 24
+#define MCDE_FFCOEF2_T2_MASK 0x0F000000
+#define MCDE_FFCOEF2_T2(__x) \
+	MCDE_VAL2REG(MCDE_FFCOEF2, T2, __x)
+#define MCDE_MCDE_WDATAA_V2 0x00000834
+#define MCDE_MCDE_WDATAA_V2_GROUPOFFSET 0x200
+#define MCDE_MCDE_WDATAA_V2_DC_SHIFT 24
+#define MCDE_MCDE_WDATAA_V2_DC_MASK 0x01000000
+#define MCDE_MCDE_WDATAA_V2_DC(__x) \
+	MCDE_VAL2REG(MCDE_MCDE_WDATAA_V2, DC, __x)
+#define MCDE_MCDE_WDATAA_V2_DATAVALUE_SHIFT 0
+#define MCDE_MCDE_WDATAA_V2_DATAVALUE_MASK 0x00FFFFFF
+#define MCDE_MCDE_WDATAA_V2_DATAVALUE(__x) \
+	MCDE_VAL2REG(MCDE_MCDE_WDATAA_V2, DATAVALUE, __x)
+#define MCDE_MCDE_WDATAB_V2 0x00000A34
+#define MCDE_MCDE_WDATAB_V2_DC_SHIFT 24
+#define MCDE_MCDE_WDATAB_V2_DC_MASK 0x01000000
+#define MCDE_MCDE_WDATAB_V2_DC(__x) \
+	MCDE_VAL2REG(MCDE_MCDE_WDATAB_V2, DC, __x)
+#define MCDE_MCDE_WDATAB_V2_DATAVALUE_SHIFT 0
+#define MCDE_MCDE_WDATAB_V2_DATAVALUE_MASK 0x00FFFFFF
+#define MCDE_MCDE_WDATAB_V2_DATAVALUE(__x) \
+	MCDE_VAL2REG(MCDE_MCDE_WDATAB_V2, DATAVALUE, __x)
+#define MCDE_TVCRA 0x00000838
+#define MCDE_TVCRA_GROUPOFFSET 0x200
+#define MCDE_TVCRA_SEL_MOD_SHIFT 0
+#define MCDE_TVCRA_SEL_MOD_MASK 0x00000001
+#define MCDE_TVCRA_SEL_MOD_LCD 0
+#define MCDE_TVCRA_SEL_MOD_TV 1
+#define MCDE_TVCRA_SEL_MOD_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_TVCRA, SEL_MOD, MCDE_TVCRA_SEL_MOD_##__x)
+#define MCDE_TVCRA_SEL_MOD(__x) \
+	MCDE_VAL2REG(MCDE_TVCRA, SEL_MOD, __x)
+#define MCDE_TVCRA_INTEREN_SHIFT 1
+#define MCDE_TVCRA_INTEREN_MASK 0x00000002
+#define MCDE_TVCRA_INTEREN(__x) \
+	MCDE_VAL2REG(MCDE_TVCRA, INTEREN, __x)
+#define MCDE_TVCRA_IFIELD_SHIFT 2
+#define MCDE_TVCRA_IFIELD_MASK 0x00000004
+#define MCDE_TVCRA_IFIELD(__x) \
+	MCDE_VAL2REG(MCDE_TVCRA, IFIELD, __x)
+#define MCDE_TVCRA_TVMODE_SHIFT 3
+#define MCDE_TVCRA_TVMODE_MASK 0x00000038
+#define MCDE_TVCRA_TVMODE_SDTV_656P 0
+#define MCDE_TVCRA_TVMODE_HDTV_480P 1
+#define MCDE_TVCRA_TVMODE_HDTV_720P 2
+#define MCDE_TVCRA_TVMODE_SDTV_656P_LE 3
+#define MCDE_TVCRA_TVMODE_SDTV_656P_BE 4
+#define MCDE_TVCRA_TVMODE_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_TVCRA, TVMODE, MCDE_TVCRA_TVMODE_##__x)
+#define MCDE_TVCRA_TVMODE(__x) \
+	MCDE_VAL2REG(MCDE_TVCRA, TVMODE, __x)
+#define MCDE_TVCRA_SDTVMODE_SHIFT 6
+#define MCDE_TVCRA_SDTVMODE_MASK 0x000000C0
+#define MCDE_TVCRA_SDTVMODE_Y0CBY1CR 0
+#define MCDE_TVCRA_SDTVMODE_CBY0CRY1 1
+#define MCDE_TVCRA_SDTVMODE_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_TVCRA, SDTVMODE, MCDE_TVCRA_SDTVMODE_##__x)
+#define MCDE_TVCRA_SDTVMODE(__x) \
+	MCDE_VAL2REG(MCDE_TVCRA, SDTVMODE, __x)
+#define MCDE_TVCRA_AVRGEN_SHIFT 8
+#define MCDE_TVCRA_AVRGEN_MASK 0x00000100
+#define MCDE_TVCRA_AVRGEN(__x) \
+	MCDE_VAL2REG(MCDE_TVCRA, AVRGEN, __x)
+#define MCDE_TVCRA_CKINV_SHIFT 9
+#define MCDE_TVCRA_CKINV_MASK 0x00000200
+#define MCDE_TVCRA_CKINV(__x) \
+	MCDE_VAL2REG(MCDE_TVCRA, CKINV, __x)
+#define MCDE_TVCRB 0x00000A38
+#define MCDE_TVCRB_SEL_MOD_SHIFT 0
+#define MCDE_TVCRB_SEL_MOD_MASK 0x00000001
+#define MCDE_TVCRB_SEL_MOD_LCD 0
+#define MCDE_TVCRB_SEL_MOD_TV 1
+#define MCDE_TVCRB_SEL_MOD_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_TVCRB, SEL_MOD, MCDE_TVCRB_SEL_MOD_##__x)
+#define MCDE_TVCRB_SEL_MOD(__x) \
+	MCDE_VAL2REG(MCDE_TVCRB, SEL_MOD, __x)
+#define MCDE_TVCRB_INTEREN_SHIFT 1
+#define MCDE_TVCRB_INTEREN_MASK 0x00000002
+#define MCDE_TVCRB_INTEREN(__x) \
+	MCDE_VAL2REG(MCDE_TVCRB, INTEREN, __x)
+#define MCDE_TVCRB_IFIELD_SHIFT 2
+#define MCDE_TVCRB_IFIELD_MASK 0x00000004
+#define MCDE_TVCRB_IFIELD(__x) \
+	MCDE_VAL2REG(MCDE_TVCRB, IFIELD, __x)
+#define MCDE_TVCRB_TVMODE_SHIFT 3
+#define MCDE_TVCRB_TVMODE_MASK 0x00000038
+#define MCDE_TVCRB_TVMODE_SDTV_656P 0
+#define MCDE_TVCRB_TVMODE_HDTV_480P 1
+#define MCDE_TVCRB_TVMODE_HDTV_720P 2
+#define MCDE_TVCRB_TVMODE_SDTV_656P_LE 3
+#define MCDE_TVCRB_TVMODE_SDTV_656P_BE 4
+#define MCDE_TVCRB_TVMODE_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_TVCRB, TVMODE, MCDE_TVCRB_TVMODE_##__x)
+#define MCDE_TVCRB_TVMODE(__x) \
+	MCDE_VAL2REG(MCDE_TVCRB, TVMODE, __x)
+#define MCDE_TVCRB_SDTVMODE_SHIFT 6
+#define MCDE_TVCRB_SDTVMODE_MASK 0x000000C0
+#define MCDE_TVCRB_SDTVMODE_Y0CBY1CR 0
+#define MCDE_TVCRB_SDTVMODE_CBY0CRY1 1
+#define MCDE_TVCRB_SDTVMODE_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_TVCRB, SDTVMODE, MCDE_TVCRB_SDTVMODE_##__x)
+#define MCDE_TVCRB_SDTVMODE(__x) \
+	MCDE_VAL2REG(MCDE_TVCRB, SDTVMODE, __x)
+#define MCDE_TVCRB_AVRGEN_SHIFT 8
+#define MCDE_TVCRB_AVRGEN_MASK 0x00000100
+#define MCDE_TVCRB_AVRGEN(__x) \
+	MCDE_VAL2REG(MCDE_TVCRB, AVRGEN, __x)
+#define MCDE_TVCRB_CKINV_SHIFT 9
+#define MCDE_TVCRB_CKINV_MASK 0x00000200
+#define MCDE_TVCRB_CKINV(__x) \
+	MCDE_VAL2REG(MCDE_TVCRB, CKINV, __x)
+#define MCDE_TVBL1A 0x0000083C
+#define MCDE_TVBL1A_GROUPOFFSET 0x200
+#define MCDE_TVBL1A_BEL1_SHIFT 0
+#define MCDE_TVBL1A_BEL1_MASK 0x000007FF
+#define MCDE_TVBL1A_BEL1(__x) \
+	MCDE_VAL2REG(MCDE_TVBL1A, BEL1, __x)
+#define MCDE_TVBL1A_BSL1_SHIFT 16
+#define MCDE_TVBL1A_BSL1_MASK 0x07FF0000
+#define MCDE_TVBL1A_BSL1(__x) \
+	MCDE_VAL2REG(MCDE_TVBL1A, BSL1, __x)
+#define MCDE_TVBL1B 0x00000A3C
+#define MCDE_TVBL1B_BEL1_SHIFT 0
+#define MCDE_TVBL1B_BEL1_MASK 0x000007FF
+#define MCDE_TVBL1B_BEL1(__x) \
+	MCDE_VAL2REG(MCDE_TVBL1B, BEL1, __x)
+#define MCDE_TVBL1B_BSL1_SHIFT 16
+#define MCDE_TVBL1B_BSL1_MASK 0x07FF0000
+#define MCDE_TVBL1B_BSL1(__x) \
+	MCDE_VAL2REG(MCDE_TVBL1B, BSL1, __x)
+#define MCDE_TVISLA 0x00000840
+#define MCDE_TVISLA_GROUPOFFSET 0x200
+#define MCDE_TVISLA_FSL1_SHIFT 0
+#define MCDE_TVISLA_FSL1_MASK 0x000007FF
+#define MCDE_TVISLA_FSL1(__x) \
+	MCDE_VAL2REG(MCDE_TVISLA, FSL1, __x)
+#define MCDE_TVISLA_FSL2_SHIFT 16
+#define MCDE_TVISLA_FSL2_MASK 0x07FF0000
+#define MCDE_TVISLA_FSL2(__x) \
+	MCDE_VAL2REG(MCDE_TVISLA, FSL2, __x)
+#define MCDE_TVISLB 0x00000A40
+#define MCDE_TVISLB_FSL1_SHIFT 0
+#define MCDE_TVISLB_FSL1_MASK 0x000007FF
+#define MCDE_TVISLB_FSL1(__x) \
+	MCDE_VAL2REG(MCDE_TVISLB, FSL1, __x)
+#define MCDE_TVISLB_FSL2_SHIFT 16
+#define MCDE_TVISLB_FSL2_MASK 0x07FF0000
+#define MCDE_TVISLB_FSL2(__x) \
+	MCDE_VAL2REG(MCDE_TVISLB, FSL2, __x)
+#define MCDE_TVDVOA 0x00000844
+#define MCDE_TVDVOA_GROUPOFFSET 0x200
+#define MCDE_TVDVOA_DVO1_SHIFT 0
+#define MCDE_TVDVOA_DVO1_MASK 0x000007FF
+#define MCDE_TVDVOA_DVO1(__x) \
+	MCDE_VAL2REG(MCDE_TVDVOA, DVO1, __x)
+#define MCDE_TVDVOA_DVO2_SHIFT 16
+#define MCDE_TVDVOA_DVO2_MASK 0x07FF0000
+#define MCDE_TVDVOA_DVO2(__x) \
+	MCDE_VAL2REG(MCDE_TVDVOA, DVO2, __x)
+#define MCDE_TVDVOB 0x00000A44
+#define MCDE_TVDVOB_DVO1_SHIFT 0
+#define MCDE_TVDVOB_DVO1_MASK 0x000007FF
+#define MCDE_TVDVOB_DVO1(__x) \
+	MCDE_VAL2REG(MCDE_TVDVOB, DVO1, __x)
+#define MCDE_TVDVOB_DVO2_SHIFT 16
+#define MCDE_TVDVOB_DVO2_MASK 0x07FF0000
+#define MCDE_TVDVOB_DVO2(__x) \
+	MCDE_VAL2REG(MCDE_TVDVOB, DVO2, __x)
+#define MCDE_TVTIM1A 0x0000084C
+#define MCDE_TVTIM1A_GROUPOFFSET 0x200
+#define MCDE_TVTIM1A_DHO_SHIFT 0
+#define MCDE_TVTIM1A_DHO_MASK 0x000007FF
+#define MCDE_TVTIM1A_DHO(__x) \
+	MCDE_VAL2REG(MCDE_TVTIM1A, DHO, __x)
+#define MCDE_TVTIM1B 0x00000A4C
+#define MCDE_TVTIM1B_DHO_SHIFT 0
+#define MCDE_TVTIM1B_DHO_MASK 0x000007FF
+#define MCDE_TVTIM1B_DHO(__x) \
+	MCDE_VAL2REG(MCDE_TVTIM1B, DHO, __x)
+#define MCDE_TVLBALWA 0x00000850
+#define MCDE_TVLBALWA_GROUPOFFSET 0x200
+#define MCDE_TVLBALWA_LBW_SHIFT 0
+#define MCDE_TVLBALWA_LBW_MASK 0x000007FF
+#define MCDE_TVLBALWA_LBW(__x) \
+	MCDE_VAL2REG(MCDE_TVLBALWA, LBW, __x)
+#define MCDE_TVLBALWA_ALW_SHIFT 16
+#define MCDE_TVLBALWA_ALW_MASK 0x07FF0000
+#define MCDE_TVLBALWA_ALW(__x) \
+	MCDE_VAL2REG(MCDE_TVLBALWA, ALW, __x)
+#define MCDE_TVLBALWB 0x00000A50
+#define MCDE_TVLBALWB_LBW_SHIFT 0
+#define MCDE_TVLBALWB_LBW_MASK 0x000007FF
+#define MCDE_TVLBALWB_LBW(__x) \
+	MCDE_VAL2REG(MCDE_TVLBALWB, LBW, __x)
+#define MCDE_TVLBALWB_ALW_SHIFT 16
+#define MCDE_TVLBALWB_ALW_MASK 0x07FF0000
+#define MCDE_TVLBALWB_ALW(__x) \
+	MCDE_VAL2REG(MCDE_TVLBALWB, ALW, __x)
+#define MCDE_TVBL2A 0x00000854
+#define MCDE_TVBL2A_GROUPOFFSET 0x200
+#define MCDE_TVBL2A_BEL2_SHIFT 0
+#define MCDE_TVBL2A_BEL2_MASK 0x000007FF
+#define MCDE_TVBL2A_BEL2(__x) \
+	MCDE_VAL2REG(MCDE_TVBL2A, BEL2, __x)
+#define MCDE_TVBL2A_BSL2_SHIFT 16
+#define MCDE_TVBL2A_BSL2_MASK 0x07FF0000
+#define MCDE_TVBL2A_BSL2(__x) \
+	MCDE_VAL2REG(MCDE_TVBL2A, BSL2, __x)
+#define MCDE_TVBL2B 0x00000A54
+#define MCDE_TVBL2B_BEL2_SHIFT 0
+#define MCDE_TVBL2B_BEL2_MASK 0x000007FF
+#define MCDE_TVBL2B_BEL2(__x) \
+	MCDE_VAL2REG(MCDE_TVBL2B, BEL2, __x)
+#define MCDE_TVBL2B_BSL2_SHIFT 16
+#define MCDE_TVBL2B_BSL2_MASK 0x07FF0000
+#define MCDE_TVBL2B_BSL2(__x) \
+	MCDE_VAL2REG(MCDE_TVBL2B, BSL2, __x)
+#define MCDE_TVBLUA 0x00000858
+#define MCDE_TVBLUA_GROUPOFFSET 0x200
+#define MCDE_TVBLUA_TVBLU_SHIFT 0
+#define MCDE_TVBLUA_TVBLU_MASK 0x000000FF
+#define MCDE_TVBLUA_TVBLU(__x) \
+	MCDE_VAL2REG(MCDE_TVBLUA, TVBLU, __x)
+#define MCDE_TVBLUA_TVBCB_SHIFT 8
+#define MCDE_TVBLUA_TVBCB_MASK 0x0000FF00
+#define MCDE_TVBLUA_TVBCB(__x) \
+	MCDE_VAL2REG(MCDE_TVBLUA, TVBCB, __x)
+#define MCDE_TVBLUA_TVBCR_SHIFT 16
+#define MCDE_TVBLUA_TVBCR_MASK 0x00FF0000
+#define MCDE_TVBLUA_TVBCR(__x) \
+	MCDE_VAL2REG(MCDE_TVBLUA, TVBCR, __x)
+#define MCDE_TVBLUB 0x00000A58
+#define MCDE_TVBLUB_TVBLU_SHIFT 0
+#define MCDE_TVBLUB_TVBLU_MASK 0x000000FF
+#define MCDE_TVBLUB_TVBLU(__x) \
+	MCDE_VAL2REG(MCDE_TVBLUB, TVBLU, __x)
+#define MCDE_TVBLUB_TVBCB_SHIFT 8
+#define MCDE_TVBLUB_TVBCB_MASK 0x0000FF00
+#define MCDE_TVBLUB_TVBCB(__x) \
+	MCDE_VAL2REG(MCDE_TVBLUB, TVBCB, __x)
+#define MCDE_TVBLUB_TVBCR_SHIFT 16
+#define MCDE_TVBLUB_TVBCR_MASK 0x00FF0000
+#define MCDE_TVBLUB_TVBCR(__x) \
+	MCDE_VAL2REG(MCDE_TVBLUB, TVBCR, __x)
+#define MCDE_LCDTIM1A 0x00000860
+#define MCDE_LCDTIM1A_GROUPOFFSET 0x200
+#define MCDE_LCDTIM1A_IVP_SHIFT 19
+#define MCDE_LCDTIM1A_IVP_MASK 0x00080000
+#define MCDE_LCDTIM1A_IVP(__x) \
+	MCDE_VAL2REG(MCDE_LCDTIM1A, IVP, __x)
+#define MCDE_LCDTIM1A_IVS_SHIFT 20
+#define MCDE_LCDTIM1A_IVS_MASK 0x00100000
+#define MCDE_LCDTIM1A_IVS(__x) \
+	MCDE_VAL2REG(MCDE_LCDTIM1A, IVS, __x)
+#define MCDE_LCDTIM1A_IHS_SHIFT 21
+#define MCDE_LCDTIM1A_IHS_MASK 0x00200000
+#define MCDE_LCDTIM1A_IHS(__x) \
+	MCDE_VAL2REG(MCDE_LCDTIM1A, IHS, __x)
+#define MCDE_LCDTIM1A_IPC_SHIFT 22
+#define MCDE_LCDTIM1A_IPC_MASK 0x00400000
+#define MCDE_LCDTIM1A_IPC(__x) \
+	MCDE_VAL2REG(MCDE_LCDTIM1A, IPC, __x)
+#define MCDE_LCDTIM1A_IOE_SHIFT 23
+#define MCDE_LCDTIM1A_IOE_MASK 0x00800000
+#define MCDE_LCDTIM1A_IOE(__x) \
+	MCDE_VAL2REG(MCDE_LCDTIM1A, IOE, __x)
+#define MCDE_LCDTIM1B 0x00000A60
+#define MCDE_LCDTIM1B_IVP_SHIFT 19
+#define MCDE_LCDTIM1B_IVP_MASK 0x00080000
+#define MCDE_LCDTIM1B_IVP(__x) \
+	MCDE_VAL2REG(MCDE_LCDTIM1B, IVP, __x)
+#define MCDE_LCDTIM1B_IVS_SHIFT 20
+#define MCDE_LCDTIM1B_IVS_MASK 0x00100000
+#define MCDE_LCDTIM1B_IVS(__x) \
+	MCDE_VAL2REG(MCDE_LCDTIM1B, IVS, __x)
+#define MCDE_LCDTIM1B_IHS_SHIFT 21
+#define MCDE_LCDTIM1B_IHS_MASK 0x00200000
+#define MCDE_LCDTIM1B_IHS(__x) \
+	MCDE_VAL2REG(MCDE_LCDTIM1B, IHS, __x)
+#define MCDE_LCDTIM1B_IPC_SHIFT 22
+#define MCDE_LCDTIM1B_IPC_MASK 0x00400000
+#define MCDE_LCDTIM1B_IPC(__x) \
+	MCDE_VAL2REG(MCDE_LCDTIM1B, IPC, __x)
+#define MCDE_LCDTIM1B_IOE_SHIFT 23
+#define MCDE_LCDTIM1B_IOE_MASK 0x00800000
+#define MCDE_LCDTIM1B_IOE(__x) \
+	MCDE_VAL2REG(MCDE_LCDTIM1B, IOE, __x)
+#define MCDE_DITCTRLA 0x00000864
+#define MCDE_DITCTRLA_GROUPOFFSET 0x200
+#define MCDE_DITCTRLA_TEMP_SHIFT 0
+#define MCDE_DITCTRLA_TEMP_MASK 0x00000001
+#define MCDE_DITCTRLA_TEMP(__x) \
+	MCDE_VAL2REG(MCDE_DITCTRLA, TEMP, __x)
+#define MCDE_DITCTRLA_COMP_SHIFT 1
+#define MCDE_DITCTRLA_COMP_MASK 0x00000002
+#define MCDE_DITCTRLA_COMP(__x) \
+	MCDE_VAL2REG(MCDE_DITCTRLA, COMP, __x)
+#define MCDE_DITCTRLA_MASK_SHIFT 4
+#define MCDE_DITCTRLA_MASK_MASK 0x00000010
+#define MCDE_DITCTRLA_MASK(__x) \
+	MCDE_VAL2REG(MCDE_DITCTRLA, MASK, __x)
+#define MCDE_DITCTRLA_FOFFX_SHIFT 5
+#define MCDE_DITCTRLA_FOFFX_MASK 0x000003E0
+#define MCDE_DITCTRLA_FOFFX(__x) \
+	MCDE_VAL2REG(MCDE_DITCTRLA, FOFFX, __x)
+#define MCDE_DITCTRLA_FOFFY_SHIFT 10
+#define MCDE_DITCTRLA_FOFFY_MASK 0x00007C00
+#define MCDE_DITCTRLA_FOFFY(__x) \
+	MCDE_VAL2REG(MCDE_DITCTRLA, FOFFY, __x)
+#define MCDE_DITCTRLB 0x00000A64
+#define MCDE_DITCTRLB_TEMP_SHIFT 0
+#define MCDE_DITCTRLB_TEMP_MASK 0x00000001
+#define MCDE_DITCTRLB_TEMP(__x) \
+	MCDE_VAL2REG(MCDE_DITCTRLB, TEMP, __x)
+#define MCDE_DITCTRLB_COMP_SHIFT 1
+#define MCDE_DITCTRLB_COMP_MASK 0x00000002
+#define MCDE_DITCTRLB_COMP(__x) \
+	MCDE_VAL2REG(MCDE_DITCTRLB, COMP, __x)
+#define MCDE_DITCTRLB_MASK_SHIFT 4
+#define MCDE_DITCTRLB_MASK_MASK 0x00000010
+#define MCDE_DITCTRLB_MASK(__x) \
+	MCDE_VAL2REG(MCDE_DITCTRLB, MASK, __x)
+#define MCDE_DITCTRLB_FOFFX_SHIFT 5
+#define MCDE_DITCTRLB_FOFFX_MASK 0x000003E0
+#define MCDE_DITCTRLB_FOFFX(__x) \
+	MCDE_VAL2REG(MCDE_DITCTRLB, FOFFX, __x)
+#define MCDE_DITCTRLB_FOFFY_SHIFT 10
+#define MCDE_DITCTRLB_FOFFY_MASK 0x00007C00
+#define MCDE_DITCTRLB_FOFFY(__x) \
+	MCDE_VAL2REG(MCDE_DITCTRLB, FOFFY, __x)
+#define MCDE_DITOFFA 0x00000868
+#define MCDE_DITOFFA_GROUPOFFSET 0x200
+#define MCDE_DITOFFA_XG_SHIFT 0
+#define MCDE_DITOFFA_XG_MASK 0x0000001F
+#define MCDE_DITOFFA_XG(__x) \
+	MCDE_VAL2REG(MCDE_DITOFFA, XG, __x)
+#define MCDE_DITOFFA_YG_SHIFT 8
+#define MCDE_DITOFFA_YG_MASK 0x00001F00
+#define MCDE_DITOFFA_YG(__x) \
+	MCDE_VAL2REG(MCDE_DITOFFA, YG, __x)
+#define MCDE_DITOFFA_XB_SHIFT 16
+#define MCDE_DITOFFA_XB_MASK 0x001F0000
+#define MCDE_DITOFFA_XB(__x) \
+	MCDE_VAL2REG(MCDE_DITOFFA, XB, __x)
+#define MCDE_DITOFFA_YB_SHIFT 24
+#define MCDE_DITOFFA_YB_MASK 0x1F000000
+#define MCDE_DITOFFA_YB(__x) \
+	MCDE_VAL2REG(MCDE_DITOFFA, YB, __x)
+#define MCDE_DITOFFB 0x00000A68
+#define MCDE_DITOFFB_XG_SHIFT 0
+#define MCDE_DITOFFB_XG_MASK 0x0000001F
+#define MCDE_DITOFFB_XG(__x) \
+	MCDE_VAL2REG(MCDE_DITOFFB, XG, __x)
+#define MCDE_DITOFFB_YG_SHIFT 8
+#define MCDE_DITOFFB_YG_MASK 0x00001F00
+#define MCDE_DITOFFB_YG(__x) \
+	MCDE_VAL2REG(MCDE_DITOFFB, YG, __x)
+#define MCDE_DITOFFB_XB_SHIFT 16
+#define MCDE_DITOFFB_XB_MASK 0x001F0000
+#define MCDE_DITOFFB_XB(__x) \
+	MCDE_VAL2REG(MCDE_DITOFFB, XB, __x)
+#define MCDE_DITOFFB_YB_SHIFT 24
+#define MCDE_DITOFFB_YB_MASK 0x1F000000
+#define MCDE_DITOFFB_YB(__x) \
+	MCDE_VAL2REG(MCDE_DITOFFB, YB, __x)
+#define MCDE_PAL0A 0x0000086C
+#define MCDE_PAL0A_GROUPOFFSET 0x200
+#define MCDE_PAL0A_BLUE_SHIFT 0
+#define MCDE_PAL0A_BLUE_MASK 0x00000FFF
+#define MCDE_PAL0A_BLUE(__x) \
+	MCDE_VAL2REG(MCDE_PAL0A, BLUE, __x)
+#define MCDE_PAL0A_GREEN_SHIFT 16
+#define MCDE_PAL0A_GREEN_MASK 0x0FFF0000
+#define MCDE_PAL0A_GREEN(__x) \
+	MCDE_VAL2REG(MCDE_PAL0A, GREEN, __x)
+#define MCDE_PAL0B 0x00000A6C
+#define MCDE_PAL0B_BLUE_SHIFT 0
+#define MCDE_PAL0B_BLUE_MASK 0x00000FFF
+#define MCDE_PAL0B_BLUE(__x) \
+	MCDE_VAL2REG(MCDE_PAL0B, BLUE, __x)
+#define MCDE_PAL0B_GREEN_SHIFT 16
+#define MCDE_PAL0B_GREEN_MASK 0x0FFF0000
+#define MCDE_PAL0B_GREEN(__x) \
+	MCDE_VAL2REG(MCDE_PAL0B, GREEN, __x)
+#define MCDE_PAL1A 0x00000870
+#define MCDE_PAL1A_GROUPOFFSET 0x200
+#define MCDE_PAL1A_RED_SHIFT 0
+#define MCDE_PAL1A_RED_MASK 0x00000FFF
+#define MCDE_PAL1A_RED(__x) \
+	MCDE_VAL2REG(MCDE_PAL1A, RED, __x)
+#define MCDE_PAL1B 0x00000A70
+#define MCDE_PAL1B_RED_SHIFT 0
+#define MCDE_PAL1B_RED_MASK 0x00000FFF
+#define MCDE_PAL1B_RED(__x) \
+	MCDE_VAL2REG(MCDE_PAL1B, RED, __x)
+#define MCDE_ROTADD0A 0x00000874
+#define MCDE_ROTADD0A_GROUPOFFSET 0x200
+#define MCDE_ROTADD0A_ROTADD0_SHIFT 3
+#define MCDE_ROTADD0A_ROTADD0_MASK 0xFFFFFFF8
+#define MCDE_ROTADD0A_ROTADD0(__x) \
+	MCDE_VAL2REG(MCDE_ROTADD0A, ROTADD0, __x)
+#define MCDE_ROTADD0B 0x00000A74
+#define MCDE_ROTADD0B_ROTADD0_SHIFT 3
+#define MCDE_ROTADD0B_ROTADD0_MASK 0xFFFFFFF8
+#define MCDE_ROTADD0B_ROTADD0(__x) \
+	MCDE_VAL2REG(MCDE_ROTADD0B, ROTADD0, __x)
+#define MCDE_ROTADD1A 0x00000878
+#define MCDE_ROTADD1A_GROUPOFFSET 0x200
+#define MCDE_ROTADD1A_ROTADD1_SHIFT 3
+#define MCDE_ROTADD1A_ROTADD1_MASK 0xFFFFFFF8
+#define MCDE_ROTADD1A_ROTADD1(__x) \
+	MCDE_VAL2REG(MCDE_ROTADD1A, ROTADD1, __x)
+#define MCDE_ROTADD1B 0x00000A78
+#define MCDE_ROTADD1B_ROTADD1_SHIFT 3
+#define MCDE_ROTADD1B_ROTADD1_MASK 0xFFFFFFF8
+#define MCDE_ROTADD1B_ROTADD1(__x) \
+	MCDE_VAL2REG(MCDE_ROTADD1B, ROTADD1, __x)
+#define MCDE_ROTACONF 0x0000087C
+#define MCDE_ROTACONF_GROUPOFFSET 0x200
+#define MCDE_ROTACONF_ROTBURSTSIZE_SHIFT 0
+#define MCDE_ROTACONF_ROTBURSTSIZE_MASK 0x00000003
+#define MCDE_ROTACONF_ROTBURSTSIZE_1W 0
+#define MCDE_ROTACONF_ROTBURSTSIZE_2W 1
+#define MCDE_ROTACONF_ROTBURSTSIZE_4W 2
+#define MCDE_ROTACONF_ROTBURSTSIZE_8W 3
+#define MCDE_ROTACONF_ROTBURSTSIZE_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_ROTACONF, ROTBURSTSIZE, \
+	MCDE_ROTACONF_ROTBURSTSIZE_##__x)
+#define MCDE_ROTACONF_ROTBURSTSIZE(__x) \
+	MCDE_VAL2REG(MCDE_ROTACONF, ROTBURSTSIZE, __x)
+#define MCDE_ROTACONF_ROTBURSTSIZE_HW_SHIFT 2
+#define MCDE_ROTACONF_ROTBURSTSIZE_HW_MASK 0x00000004
+#define MCDE_ROTACONF_ROTBURSTSIZE_HW(__x) \
+	MCDE_VAL2REG(MCDE_ROTACONF, ROTBURSTSIZE_HW, __x)
+#define MCDE_ROTACONF_ROTDIR_SHIFT 3
+#define MCDE_ROTACONF_ROTDIR_MASK 0x00000008
+#define MCDE_ROTACONF_ROTDIR_CCW 0
+#define MCDE_ROTACONF_ROTDIR_CW 1
+#define MCDE_ROTACONF_ROTDIR_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_ROTACONF, ROTDIR, MCDE_ROTACONF_ROTDIR_##__x)
+#define MCDE_ROTACONF_ROTDIR(__x) \
+	MCDE_VAL2REG(MCDE_ROTACONF, ROTDIR, __x)
+#define MCDE_ROTACONF_WR_MAXOUT_SHIFT 4
+#define MCDE_ROTACONF_WR_MAXOUT_MASK 0x00000030
+#define MCDE_ROTACONF_WR_MAXOUT_1_REQ 0
+#define MCDE_ROTACONF_WR_MAXOUT_2_REQ 1
+#define MCDE_ROTACONF_WR_MAXOUT_4_REQ 2
+#define MCDE_ROTACONF_WR_MAXOUT_8_REQ 3
+#define MCDE_ROTACONF_WR_MAXOUT_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_ROTACONF, WR_MAXOUT, MCDE_ROTACONF_WR_MAXOUT_##__x)
+#define MCDE_ROTACONF_WR_MAXOUT(__x) \
+	MCDE_VAL2REG(MCDE_ROTACONF, WR_MAXOUT, __x)
+#define MCDE_ROTACONF_RD_MAXOUT_SHIFT 6
+#define MCDE_ROTACONF_RD_MAXOUT_MASK 0x000000C0
+#define MCDE_ROTACONF_RD_MAXOUT_1_REQ 0
+#define MCDE_ROTACONF_RD_MAXOUT_2_REQ 1
+#define MCDE_ROTACONF_RD_MAXOUT_4_REQ 2
+#define MCDE_ROTACONF_RD_MAXOUT_8_REQ 3
+#define MCDE_ROTACONF_RD_MAXOUT_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_ROTACONF, RD_MAXOUT, MCDE_ROTACONF_RD_MAXOUT_##__x)
+#define MCDE_ROTACONF_RD_MAXOUT(__x) \
+	MCDE_VAL2REG(MCDE_ROTACONF, RD_MAXOUT, __x)
+#define MCDE_ROTACONF_STRIP_WIDTH_SHIFT 8
+#define MCDE_ROTACONF_STRIP_WIDTH_MASK 0x00007F00
+#define MCDE_ROTACONF_STRIP_WIDTH_2PIX 0
+#define MCDE_ROTACONF_STRIP_WIDTH_4PIX 1
+#define MCDE_ROTACONF_STRIP_WIDTH_8PIX 2
+#define MCDE_ROTACONF_STRIP_WIDTH_16PIX 3
+#define MCDE_ROTACONF_STRIP_WIDTH_32PIX 4
+#define MCDE_ROTACONF_STRIP_WIDTH_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_ROTACONF, STRIP_WIDTH, \
+	MCDE_ROTACONF_STRIP_WIDTH_##__x)
+#define MCDE_ROTACONF_STRIP_WIDTH(__x) \
+	MCDE_VAL2REG(MCDE_ROTACONF, STRIP_WIDTH, __x)
+#define MCDE_ROTACONF_SINGLE_BUF_SHIFT 15
+#define MCDE_ROTACONF_SINGLE_BUF_MASK 0x00008000
+#define MCDE_ROTACONF_SINGLE_BUF(__x) \
+	MCDE_VAL2REG(MCDE_ROTACONF, SINGLE_BUF, __x)
+#define MCDE_ROTACONF_WR_ROPC_SHIFT 16
+#define MCDE_ROTACONF_WR_ROPC_MASK 0x00FF0000
+#define MCDE_ROTACONF_WR_ROPC(__x) \
+	MCDE_VAL2REG(MCDE_ROTACONF, WR_ROPC, __x)
+#define MCDE_ROTACONF_RD_ROPC_SHIFT 24
+#define MCDE_ROTACONF_RD_ROPC_MASK 0xFF000000
+#define MCDE_ROTACONF_RD_ROPC(__x) \
+	MCDE_VAL2REG(MCDE_ROTACONF, RD_ROPC, __x)
+#define MCDE_ROTBCONF 0x00000A7C
+#define MCDE_ROTBCONF_ROTBURSTSIZE_SHIFT 0
+#define MCDE_ROTBCONF_ROTBURSTSIZE_MASK 0x00000003
+#define MCDE_ROTBCONF_ROTBURSTSIZE_1W 0
+#define MCDE_ROTBCONF_ROTBURSTSIZE_2W 1
+#define MCDE_ROTBCONF_ROTBURSTSIZE_4W 2
+#define MCDE_ROTBCONF_ROTBURSTSIZE_8W 3
+#define MCDE_ROTBCONF_ROTBURSTSIZE_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_ROTBCONF, ROTBURSTSIZE, \
+	MCDE_ROTBCONF_ROTBURSTSIZE_##__x)
+#define MCDE_ROTBCONF_ROTBURSTSIZE(__x) \
+	MCDE_VAL2REG(MCDE_ROTBCONF, ROTBURSTSIZE, __x)
+#define MCDE_ROTBCONF_ROTBURSTSIZE_HW_SHIFT 2
+#define MCDE_ROTBCONF_ROTBURSTSIZE_HW_MASK 0x00000004
+#define MCDE_ROTBCONF_ROTBURSTSIZE_HW(__x) \
+	MCDE_VAL2REG(MCDE_ROTBCONF, ROTBURSTSIZE_HW, __x)
+#define MCDE_ROTBCONF_ROTDIR_SHIFT 3
+#define MCDE_ROTBCONF_ROTDIR_MASK 0x00000008
+#define MCDE_ROTBCONF_ROTDIR_CCW 0
+#define MCDE_ROTBCONF_ROTDIR_CW 1
+#define MCDE_ROTBCONF_ROTDIR_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_ROTBCONF, ROTDIR, MCDE_ROTBCONF_ROTDIR_##__x)
+#define MCDE_ROTBCONF_ROTDIR(__x) \
+	MCDE_VAL2REG(MCDE_ROTBCONF, ROTDIR, __x)
+#define MCDE_ROTBCONF_WR_MAXOUT_SHIFT 4
+#define MCDE_ROTBCONF_WR_MAXOUT_MASK 0x00000030
+#define MCDE_ROTBCONF_WR_MAXOUT_1_REQ 0
+#define MCDE_ROTBCONF_WR_MAXOUT_2_REQ 1
+#define MCDE_ROTBCONF_WR_MAXOUT_4_REQ 2
+#define MCDE_ROTBCONF_WR_MAXOUT_8_REQ 3
+#define MCDE_ROTBCONF_WR_MAXOUT_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_ROTBCONF, WR_MAXOUT, MCDE_ROTBCONF_WR_MAXOUT_##__x)
+#define MCDE_ROTBCONF_WR_MAXOUT(__x) \
+	MCDE_VAL2REG(MCDE_ROTBCONF, WR_MAXOUT, __x)
+#define MCDE_ROTBCONF_RD_MAXOUT_SHIFT 6
+#define MCDE_ROTBCONF_RD_MAXOUT_MASK 0x000000C0
+#define MCDE_ROTBCONF_RD_MAXOUT_1_REQ 0
+#define MCDE_ROTBCONF_RD_MAXOUT_2_REQ 1
+#define MCDE_ROTBCONF_RD_MAXOUT_4_REQ 2
+#define MCDE_ROTBCONF_RD_MAXOUT_8_REQ 3
+#define MCDE_ROTBCONF_RD_MAXOUT_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_ROTBCONF, RD_MAXOUT, MCDE_ROTBCONF_RD_MAXOUT_##__x)
+#define MCDE_ROTBCONF_RD_MAXOUT(__x) \
+	MCDE_VAL2REG(MCDE_ROTBCONF, RD_MAXOUT, __x)
+#define MCDE_ROTBCONF_STRIP_WIDTH_SHIFT 8
+#define MCDE_ROTBCONF_STRIP_WIDTH_MASK 0x00007F00
+#define MCDE_ROTBCONF_STRIP_WIDTH_2PIX 0
+#define MCDE_ROTBCONF_STRIP_WIDTH_4PIX 1
+#define MCDE_ROTBCONF_STRIP_WIDTH_8PIX 2
+#define MCDE_ROTBCONF_STRIP_WIDTH_16PIX 3
+#define MCDE_ROTBCONF_STRIP_WIDTH_32PIX 4
+#define MCDE_ROTBCONF_STRIP_WIDTH_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_ROTBCONF, STRIP_WIDTH, \
+	MCDE_ROTBCONF_STRIP_WIDTH_##__x)
+#define MCDE_ROTBCONF_STRIP_WIDTH(__x) \
+	MCDE_VAL2REG(MCDE_ROTBCONF, STRIP_WIDTH, __x)
+#define MCDE_ROTBCONF_SINGLE_BUF_SHIFT 15
+#define MCDE_ROTBCONF_SINGLE_BUF_MASK 0x00008000
+#define MCDE_ROTBCONF_SINGLE_BUF(__x) \
+	MCDE_VAL2REG(MCDE_ROTBCONF, SINGLE_BUF, __x)
+#define MCDE_ROTBCONF_WR_ROPC_SHIFT 16
+#define MCDE_ROTBCONF_WR_ROPC_MASK 0x00FF0000
+#define MCDE_ROTBCONF_WR_ROPC(__x) \
+	MCDE_VAL2REG(MCDE_ROTBCONF, WR_ROPC, __x)
+#define MCDE_ROTBCONF_RD_ROPC_SHIFT 24
+#define MCDE_ROTBCONF_RD_ROPC_MASK 0xFF000000
+#define MCDE_ROTBCONF_RD_ROPC(__x) \
+	MCDE_VAL2REG(MCDE_ROTBCONF, RD_ROPC, __x)
+#define MCDE_SYNCHCONFA 0x00000880
+#define MCDE_SYNCHCONFA_GROUPOFFSET 0x200
+#define MCDE_SYNCHCONFA_HWREQVEVENT_SHIFT 0
+#define MCDE_SYNCHCONFA_HWREQVEVENT_MASK 0x00000003
+#define MCDE_SYNCHCONFA_HWREQVEVENT_VSYNC 0
+#define MCDE_SYNCHCONFA_HWREQVEVENT_BACK_PORCH 1
+#define MCDE_SYNCHCONFA_HWREQVEVENT_ACTIVE_VIDEO 2
+#define MCDE_SYNCHCONFA_HWREQVEVENT_FRONT_PORCH 3
+#define MCDE_SYNCHCONFA_HWREQVEVENT_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_SYNCHCONFA, HWREQVEVENT, \
+	MCDE_SYNCHCONFA_HWREQVEVENT_##__x)
+#define MCDE_SYNCHCONFA_HWREQVEVENT(__x) \
+	MCDE_VAL2REG(MCDE_SYNCHCONFA, HWREQVEVENT, __x)
+#define MCDE_SYNCHCONFA_HWREQVCNT_SHIFT 2
+#define MCDE_SYNCHCONFA_HWREQVCNT_MASK 0x0000FFFC
+#define MCDE_SYNCHCONFA_HWREQVCNT(__x) \
+	MCDE_VAL2REG(MCDE_SYNCHCONFA, HWREQVCNT, __x)
+#define MCDE_SYNCHCONFA_SWINTVEVENT_SHIFT 16
+#define MCDE_SYNCHCONFA_SWINTVEVENT_MASK 0x00030000
+#define MCDE_SYNCHCONFA_SWINTVEVENT_VSYNC 0
+#define MCDE_SYNCHCONFA_SWINTVEVENT_BACK_PORCH 1
+#define MCDE_SYNCHCONFA_SWINTVEVENT_ACTIVE_VIDEO 2
+#define MCDE_SYNCHCONFA_SWINTVEVENT_FRONT_PORCH 3
+#define MCDE_SYNCHCONFA_SWINTVEVENT_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_SYNCHCONFA, SWINTVEVENT, \
+	MCDE_SYNCHCONFA_SWINTVEVENT_##__x)
+#define MCDE_SYNCHCONFA_SWINTVEVENT(__x) \
+	MCDE_VAL2REG(MCDE_SYNCHCONFA, SWINTVEVENT, __x)
+#define MCDE_SYNCHCONFA_SWINTVCNT_SHIFT 18
+#define MCDE_SYNCHCONFA_SWINTVCNT_MASK 0xFFFC0000
+#define MCDE_SYNCHCONFA_SWINTVCNT(__x) \
+	MCDE_VAL2REG(MCDE_SYNCHCONFA, SWINTVCNT, __x)
+#define MCDE_SYNCHCONFB 0x00000A80
+#define MCDE_SYNCHCONFB_HWREQVEVENT_SHIFT 0
+#define MCDE_SYNCHCONFB_HWREQVEVENT_MASK 0x00000003
+#define MCDE_SYNCHCONFB_HWREQVEVENT_VSYNC 0
+#define MCDE_SYNCHCONFB_HWREQVEVENT_BACK_PORCH 1
+#define MCDE_SYNCHCONFB_HWREQVEVENT_ACTIVE_VIDEO 2
+#define MCDE_SYNCHCONFB_HWREQVEVENT_FRONT_PORCH 3
+#define MCDE_SYNCHCONFB_HWREQVEVENT_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_SYNCHCONFB, HWREQVEVENT, \
+	MCDE_SYNCHCONFB_HWREQVEVENT_##__x)
+#define MCDE_SYNCHCONFB_HWREQVEVENT(__x) \
+	MCDE_VAL2REG(MCDE_SYNCHCONFB, HWREQVEVENT, __x)
+#define MCDE_SYNCHCONFB_HWREQVCNT_SHIFT 2
+#define MCDE_SYNCHCONFB_HWREQVCNT_MASK 0x0000FFFC
+#define MCDE_SYNCHCONFB_HWREQVCNT(__x) \
+	MCDE_VAL2REG(MCDE_SYNCHCONFB, HWREQVCNT, __x)
+#define MCDE_SYNCHCONFB_SWINTVEVENT_SHIFT 16
+#define MCDE_SYNCHCONFB_SWINTVEVENT_MASK 0x00030000
+#define MCDE_SYNCHCONFB_SWINTVEVENT_VSYNC 0
+#define MCDE_SYNCHCONFB_SWINTVEVENT_BACK_PORCH 1
+#define MCDE_SYNCHCONFB_SWINTVEVENT_ACTIVE_VIDEO 2
+#define MCDE_SYNCHCONFB_SWINTVEVENT_FRONT_PORCH 3
+#define MCDE_SYNCHCONFB_SWINTVEVENT_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_SYNCHCONFB, SWINTVEVENT, \
+	MCDE_SYNCHCONFB_SWINTVEVENT_##__x)
+#define MCDE_SYNCHCONFB_SWINTVEVENT(__x) \
+	MCDE_VAL2REG(MCDE_SYNCHCONFB, SWINTVEVENT, __x)
+#define MCDE_SYNCHCONFB_SWINTVCNT_SHIFT 18
+#define MCDE_SYNCHCONFB_SWINTVCNT_MASK 0xFFFC0000
+#define MCDE_SYNCHCONFB_SWINTVCNT(__x) \
+	MCDE_VAL2REG(MCDE_SYNCHCONFB, SWINTVCNT, __x)
+#define MCDE_CTRLA 0x00000884
+#define MCDE_CTRLA_GROUPOFFSET 0x200
+#define MCDE_CTRLA_FIFOWTRMRK_SHIFT 0
+#define MCDE_CTRLA_FIFOWTRMRK_MASK 0x000003FF
+#define MCDE_CTRLA_FIFOWTRMRK(__x) \
+	MCDE_VAL2REG(MCDE_CTRLA, FIFOWTRMRK, __x)
+#define MCDE_CTRLA_FIFOEMPTY_SHIFT 12
+#define MCDE_CTRLA_FIFOEMPTY_MASK 0x00001000
+#define MCDE_CTRLA_FIFOEMPTY(__x) \
+	MCDE_VAL2REG(MCDE_CTRLA, FIFOEMPTY, __x)
+#define MCDE_CTRLA_FIFOFULL_SHIFT 13
+#define MCDE_CTRLA_FIFOFULL_MASK 0x00002000
+#define MCDE_CTRLA_FIFOFULL(__x) \
+	MCDE_VAL2REG(MCDE_CTRLA, FIFOFULL, __x)
+#define MCDE_CTRLA_FORMID_SHIFT 16
+#define MCDE_CTRLA_FORMID_MASK 0x00070000
+#define MCDE_CTRLA_FORMID_DSI0VID 0
+#define MCDE_CTRLA_FORMID_DSI0CMD 1
+#define MCDE_CTRLA_FORMID_DSI1VID 2
+#define MCDE_CTRLA_FORMID_DSI1CMD 3
+#define MCDE_CTRLA_FORMID_DSI2VID 4
+#define MCDE_CTRLA_FORMID_DSI2CMD 5
+#define MCDE_CTRLA_FORMID_DPIA 0
+#define MCDE_CTRLA_FORMID_DPIB 1
+#define MCDE_CTRLA_FORMID_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_CTRLA, FORMID, MCDE_CTRLA_FORMID_##__x)
+#define MCDE_CTRLA_FORMID(__x) \
+	MCDE_VAL2REG(MCDE_CTRLA, FORMID, __x)
+#define MCDE_CTRLA_FORMTYPE_SHIFT 20
+#define MCDE_CTRLA_FORMTYPE_MASK 0x00700000
+#define MCDE_CTRLA_FORMTYPE_DPITV 0
+#define MCDE_CTRLA_FORMTYPE_DBI 1
+#define MCDE_CTRLA_FORMTYPE_DSI 2
+#define MCDE_CTRLA_FORMTYPE_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_CTRLA, FORMTYPE, MCDE_CTRLA_FORMTYPE_##__x)
+#define MCDE_CTRLA_FORMTYPE(__x) \
+	MCDE_VAL2REG(MCDE_CTRLA, FORMTYPE, __x)
+#define MCDE_CTRLB 0x00000A84
+#define MCDE_CTRLB_FIFOWTRMRK_SHIFT 0
+#define MCDE_CTRLB_FIFOWTRMRK_MASK 0x000003FF
+#define MCDE_CTRLB_FIFOWTRMRK(__x) \
+	MCDE_VAL2REG(MCDE_CTRLB, FIFOWTRMRK, __x)
+#define MCDE_CTRLB_FIFOEMPTY_SHIFT 12
+#define MCDE_CTRLB_FIFOEMPTY_MASK 0x00001000
+#define MCDE_CTRLB_FIFOEMPTY(__x) \
+	MCDE_VAL2REG(MCDE_CTRLB, FIFOEMPTY, __x)
+#define MCDE_CTRLB_FIFOFULL_SHIFT 13
+#define MCDE_CTRLB_FIFOFULL_MASK 0x00002000
+#define MCDE_CTRLB_FIFOFULL(__x) \
+	MCDE_VAL2REG(MCDE_CTRLB, FIFOFULL, __x)
+#define MCDE_CTRLB_FORMID_SHIFT 16
+#define MCDE_CTRLB_FORMID_MASK 0x00070000
+#define MCDE_CTRLB_FORMID_DSI0VID 0
+#define MCDE_CTRLB_FORMID_DSI0CMD 1
+#define MCDE_CTRLB_FORMID_DSI1VID 2
+#define MCDE_CTRLB_FORMID_DSI1CMD 3
+#define MCDE_CTRLB_FORMID_DSI2VID 4
+#define MCDE_CTRLB_FORMID_DSI2CMD 5
+#define MCDE_CTRLB_FORMID_DPIA 0
+#define MCDE_CTRLB_FORMID_DPIB 1
+#define MCDE_CTRLB_FORMID_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_CTRLB, FORMID, MCDE_CTRLB_FORMID_##__x)
+#define MCDE_CTRLB_FORMID(__x) \
+	MCDE_VAL2REG(MCDE_CTRLB, FORMID, __x)
+#define MCDE_CTRLB_FORMTYPE_SHIFT 20
+#define MCDE_CTRLB_FORMTYPE_MASK 0x00700000
+#define MCDE_CTRLB_FORMTYPE_DPITV 0
+#define MCDE_CTRLB_FORMTYPE_DBI 1
+#define MCDE_CTRLB_FORMTYPE_DSI 2
+#define MCDE_CTRLB_FORMTYPE_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_CTRLB, FORMTYPE, MCDE_CTRLB_FORMTYPE_##__x)
+#define MCDE_CTRLB_FORMTYPE(__x) \
+	MCDE_VAL2REG(MCDE_CTRLB, FORMTYPE, __x)
+#define MCDE_GAM0A 0x00000888
+#define MCDE_GAM0A_GROUPOFFSET 0x200
+#define MCDE_GAM0A_BLUE_SHIFT 0
+#define MCDE_GAM0A_BLUE_MASK 0x00FFFFFF
+#define MCDE_GAM0A_BLUE(__x) \
+	MCDE_VAL2REG(MCDE_GAM0A, BLUE, __x)
+#define MCDE_GAM0B 0x00000A88
+#define MCDE_GAM0B_BLUE_SHIFT 0
+#define MCDE_GAM0B_BLUE_MASK 0x00FFFFFF
+#define MCDE_GAM0B_BLUE(__x) \
+	MCDE_VAL2REG(MCDE_GAM0B, BLUE, __x)
+#define MCDE_GAM1A 0x0000088C
+#define MCDE_GAM1A_GROUPOFFSET 0x200
+#define MCDE_GAM1A_GREEN_SHIFT 0
+#define MCDE_GAM1A_GREEN_MASK 0x00FFFFFF
+#define MCDE_GAM1A_GREEN(__x) \
+	MCDE_VAL2REG(MCDE_GAM1A, GREEN, __x)
+#define MCDE_GAM1B 0x00000A8C
+#define MCDE_GAM1B_GREEN_SHIFT 0
+#define MCDE_GAM1B_GREEN_MASK 0x00FFFFFF
+#define MCDE_GAM1B_GREEN(__x) \
+	MCDE_VAL2REG(MCDE_GAM1B, GREEN, __x)
+#define MCDE_GAM2A 0x00000890
+#define MCDE_GAM2A_GROUPOFFSET 0x200
+#define MCDE_GAM2A_RED_SHIFT 0
+#define MCDE_GAM2A_RED_MASK 0x00FFFFFF
+#define MCDE_GAM2A_RED(__x) \
+	MCDE_VAL2REG(MCDE_GAM2A, RED, __x)
+#define MCDE_GAM2B 0x00000A90
+#define MCDE_GAM2B_RED_SHIFT 0
+#define MCDE_GAM2B_RED_MASK 0x00FFFFFF
+#define MCDE_GAM2B_RED(__x) \
+	MCDE_VAL2REG(MCDE_GAM2B, RED, __x)
+#define MCDE_OLEDCONV1A 0x00000894
+#define MCDE_OLEDCONV1A_GROUPOFFSET 0x200
+#define MCDE_OLEDCONV1A_ALPHA_RED_SHIFT 0
+#define MCDE_OLEDCONV1A_ALPHA_RED_MASK 0x00003FFF
+#define MCDE_OLEDCONV1A_ALPHA_RED(__x) \
+	MCDE_VAL2REG(MCDE_OLEDCONV1A, ALPHA_RED, __x)
+#define MCDE_OLEDCONV1A_ALPHA_GREEN_SHIFT 16
+#define MCDE_OLEDCONV1A_ALPHA_GREEN_MASK 0x3FFF0000
+#define MCDE_OLEDCONV1A_ALPHA_GREEN(__x) \
+	MCDE_VAL2REG(MCDE_OLEDCONV1A, ALPHA_GREEN, __x)
+#define MCDE_OLEDCONV1B 0x00000A94
+#define MCDE_OLEDCONV1B_ALPHA_RED_SHIFT 0
+#define MCDE_OLEDCONV1B_ALPHA_RED_MASK 0x00003FFF
+#define MCDE_OLEDCONV1B_ALPHA_RED(__x) \
+	MCDE_VAL2REG(MCDE_OLEDCONV1B, ALPHA_RED, __x)
+#define MCDE_OLEDCONV1B_ALPHA_GREEN_SHIFT 16
+#define MCDE_OLEDCONV1B_ALPHA_GREEN_MASK 0x3FFF0000
+#define MCDE_OLEDCONV1B_ALPHA_GREEN(__x) \
+	MCDE_VAL2REG(MCDE_OLEDCONV1B, ALPHA_GREEN, __x)
+#define MCDE_OLEDCONV2A 0x00000898
+#define MCDE_OLEDCONV2A_GROUPOFFSET 0x200
+#define MCDE_OLEDCONV2A_ALPHA_BLUE_SHIFT 0
+#define MCDE_OLEDCONV2A_ALPHA_BLUE_MASK 0x00003FFF
+#define MCDE_OLEDCONV2A_ALPHA_BLUE(__x) \
+	MCDE_VAL2REG(MCDE_OLEDCONV2A, ALPHA_BLUE, __x)
+#define MCDE_OLEDCONV2A_BETA_RED_SHIFT 16
+#define MCDE_OLEDCONV2A_BETA_RED_MASK 0x3FFF0000
+#define MCDE_OLEDCONV2A_BETA_RED(__x) \
+	MCDE_VAL2REG(MCDE_OLEDCONV2A, BETA_RED, __x)
+#define MCDE_OLEDCONV2B 0x00000A98
+#define MCDE_OLEDCONV2B_ALPHA_BLUE_SHIFT 0
+#define MCDE_OLEDCONV2B_ALPHA_BLUE_MASK 0x00003FFF
+#define MCDE_OLEDCONV2B_ALPHA_BLUE(__x) \
+	MCDE_VAL2REG(MCDE_OLEDCONV2B, ALPHA_BLUE, __x)
+#define MCDE_OLEDCONV2B_BETA_RED_SHIFT 16
+#define MCDE_OLEDCONV2B_BETA_RED_MASK 0x3FFF0000
+#define MCDE_OLEDCONV2B_BETA_RED(__x) \
+	MCDE_VAL2REG(MCDE_OLEDCONV2B, BETA_RED, __x)
+#define MCDE_OLEDCONV3A 0x0000089C
+#define MCDE_OLEDCONV3A_GROUPOFFSET 0x200
+#define MCDE_OLEDCONV3A_BETA_GREEN_SHIFT 0
+#define MCDE_OLEDCONV3A_BETA_GREEN_MASK 0x00003FFF
+#define MCDE_OLEDCONV3A_BETA_GREEN(__x) \
+	MCDE_VAL2REG(MCDE_OLEDCONV3A, BETA_GREEN, __x)
+#define MCDE_OLEDCONV3A_BETA_BLUE_SHIFT 16
+#define MCDE_OLEDCONV3A_BETA_BLUE_MASK 0x3FFF0000
+#define MCDE_OLEDCONV3A_BETA_BLUE(__x) \
+	MCDE_VAL2REG(MCDE_OLEDCONV3A, BETA_BLUE, __x)
+#define MCDE_OLEDCONV3B 0x00000A9C
+#define MCDE_OLEDCONV3B_BETA_GREEN_SHIFT 0
+#define MCDE_OLEDCONV3B_BETA_GREEN_MASK 0x00003FFF
+#define MCDE_OLEDCONV3B_BETA_GREEN(__x) \
+	MCDE_VAL2REG(MCDE_OLEDCONV3B, BETA_GREEN, __x)
+#define MCDE_OLEDCONV3B_BETA_BLUE_SHIFT 16
+#define MCDE_OLEDCONV3B_BETA_BLUE_MASK 0x3FFF0000
+#define MCDE_OLEDCONV3B_BETA_BLUE(__x) \
+	MCDE_VAL2REG(MCDE_OLEDCONV3B, BETA_BLUE, __x)
+#define MCDE_OLEDCONV4A 0x000008A0
+#define MCDE_OLEDCONV4A_GROUPOFFSET 0x200
+#define MCDE_OLEDCONV4A_GAMMA_RED_SHIFT 0
+#define MCDE_OLEDCONV4A_GAMMA_RED_MASK 0x00003FFF
+#define MCDE_OLEDCONV4A_GAMMA_RED(__x) \
+	MCDE_VAL2REG(MCDE_OLEDCONV4A, GAMMA_RED, __x)
+#define MCDE_OLEDCONV4A_GAMMA_GREEN_SHIFT 16
+#define MCDE_OLEDCONV4A_GAMMA_GREEN_MASK 0x3FFF0000
+#define MCDE_OLEDCONV4A_GAMMA_GREEN(__x) \
+	MCDE_VAL2REG(MCDE_OLEDCONV4A, GAMMA_GREEN, __x)
+#define MCDE_OLEDCONV4B 0x00000AA0
+#define MCDE_OLEDCONV4B_GAMMA_RED_SHIFT 0
+#define MCDE_OLEDCONV4B_GAMMA_RED_MASK 0x00003FFF
+#define MCDE_OLEDCONV4B_GAMMA_RED(__x) \
+	MCDE_VAL2REG(MCDE_OLEDCONV4B, GAMMA_RED, __x)
+#define MCDE_OLEDCONV4B_GAMMA_GREEN_SHIFT 16
+#define MCDE_OLEDCONV4B_GAMMA_GREEN_MASK 0x3FFF0000
+#define MCDE_OLEDCONV4B_GAMMA_GREEN(__x) \
+	MCDE_VAL2REG(MCDE_OLEDCONV4B, GAMMA_GREEN, __x)
+#define MCDE_OLEDCONV5A 0x000008A4
+#define MCDE_OLEDCONV5A_GROUPOFFSET 0x200
+#define MCDE_OLEDCONV5A_GAMMA_BLUE_SHIFT 0
+#define MCDE_OLEDCONV5A_GAMMA_BLUE_MASK 0x00003FFF
+#define MCDE_OLEDCONV5A_GAMMA_BLUE(__x) \
+	MCDE_VAL2REG(MCDE_OLEDCONV5A, GAMMA_BLUE, __x)
+#define MCDE_OLEDCONV5A_OFF_RED_SHIFT 16
+#define MCDE_OLEDCONV5A_OFF_RED_MASK 0x3FFF0000
+#define MCDE_OLEDCONV5A_OFF_RED(__x) \
+	MCDE_VAL2REG(MCDE_OLEDCONV5A, OFF_RED, __x)
+#define MCDE_OLEDCONV5B 0x00000AA4
+#define MCDE_OLEDCONV5B_GAMMA_BLUE_SHIFT 0
+#define MCDE_OLEDCONV5B_GAMMA_BLUE_MASK 0x00003FFF
+#define MCDE_OLEDCONV5B_GAMMA_BLUE(__x) \
+	MCDE_VAL2REG(MCDE_OLEDCONV5B, GAMMA_BLUE, __x)
+#define MCDE_OLEDCONV5B_OFF_RED_SHIFT 16
+#define MCDE_OLEDCONV5B_OFF_RED_MASK 0x3FFF0000
+#define MCDE_OLEDCONV5B_OFF_RED(__x) \
+	MCDE_VAL2REG(MCDE_OLEDCONV5B, OFF_RED, __x)
+#define MCDE_OLEDCONV6A 0x000008A8
+#define MCDE_OLEDCONV6A_GROUPOFFSET 0x200
+#define MCDE_OLEDCONV6A_OFF_GREEN_SHIFT 0
+#define MCDE_OLEDCONV6A_OFF_GREEN_MASK 0x00003FFF
+#define MCDE_OLEDCONV6A_OFF_GREEN(__x) \
+	MCDE_VAL2REG(MCDE_OLEDCONV6A, OFF_GREEN, __x)
+#define MCDE_OLEDCONV6A_OFF_BLUE_SHIFT 16
+#define MCDE_OLEDCONV6A_OFF_BLUE_MASK 0x3FFF0000
+#define MCDE_OLEDCONV6A_OFF_BLUE(__x) \
+	MCDE_VAL2REG(MCDE_OLEDCONV6A, OFF_BLUE, __x)
+#define MCDE_OLEDCONV6B 0x00000AA8
+#define MCDE_OLEDCONV6B_OFF_GREEN_SHIFT 0
+#define MCDE_OLEDCONV6B_OFF_GREEN_MASK 0x00003FFF
+#define MCDE_OLEDCONV6B_OFF_GREEN(__x) \
+	MCDE_VAL2REG(MCDE_OLEDCONV6B, OFF_GREEN, __x)
+#define MCDE_OLEDCONV6B_OFF_BLUE_SHIFT 16
+#define MCDE_OLEDCONV6B_OFF_BLUE_MASK 0x3FFF0000
+#define MCDE_OLEDCONV6B_OFF_BLUE(__x) \
+	MCDE_VAL2REG(MCDE_OLEDCONV6B, OFF_BLUE, __x)
+#define MCDE_CRC 0x00000C00
+#define MCDE_CRC_FLOEN_SHIFT 0
+#define MCDE_CRC_FLOEN_MASK 0x00000001
+#define MCDE_CRC_FLOEN(__x) \
+	MCDE_VAL2REG(MCDE_CRC, FLOEN, __x)
+#define MCDE_CRC_POWEREN_SHIFT 1
+#define MCDE_CRC_POWEREN_MASK 0x00000002
+#define MCDE_CRC_POWEREN(__x) \
+	MCDE_VAL2REG(MCDE_CRC, POWEREN, __x)
+#define MCDE_CRC_C1EN_SHIFT 2
+#define MCDE_CRC_C1EN_MASK 0x00000004
+#define MCDE_CRC_C1EN(__x) \
+	MCDE_VAL2REG(MCDE_CRC, C1EN, __x)
+#define MCDE_CRC_C2EN_SHIFT 3
+#define MCDE_CRC_C2EN_MASK 0x00000008
+#define MCDE_CRC_C2EN(__x) \
+	MCDE_VAL2REG(MCDE_CRC, C2EN, __x)
+#define MCDE_CRC_WMLVL1_SHIFT 4
+#define MCDE_CRC_WMLVL1_MASK 0x00000010
+#define MCDE_CRC_WMLVL1(__x) \
+	MCDE_VAL2REG(MCDE_CRC, WMLVL1, __x)
+#define MCDE_CRC_WMLVL2_SHIFT 5
+#define MCDE_CRC_WMLVL2_MASK 0x00000020
+#define MCDE_CRC_WMLVL2(__x) \
+	MCDE_VAL2REG(MCDE_CRC, WMLVL2, __x)
+#define MCDE_CRC_SYNCSEL_SHIFT 6
+#define MCDE_CRC_SYNCSEL_MASK 0x00000040
+#define MCDE_CRC_SYNCSEL(__x) \
+	MCDE_VAL2REG(MCDE_CRC, SYNCSEL, __x)
+#define MCDE_CRC_SYCEN0_SHIFT 7
+#define MCDE_CRC_SYCEN0_MASK 0x00000080
+#define MCDE_CRC_SYCEN0(__x) \
+	MCDE_VAL2REG(MCDE_CRC, SYCEN0, __x)
+#define MCDE_CRC_SYCEN1_SHIFT 8
+#define MCDE_CRC_SYCEN1_MASK 0x00000100
+#define MCDE_CRC_SYCEN1(__x) \
+	MCDE_VAL2REG(MCDE_CRC, SYCEN1, __x)
+#define MCDE_CRC_SIZE1_SHIFT 9
+#define MCDE_CRC_SIZE1_MASK 0x00000200
+#define MCDE_CRC_SIZE1(__x) \
+	MCDE_VAL2REG(MCDE_CRC, SIZE1, __x)
+#define MCDE_CRC_SIZE2_SHIFT 10
+#define MCDE_CRC_SIZE2_MASK 0x00000400
+#define MCDE_CRC_SIZE2(__x) \
+	MCDE_VAL2REG(MCDE_CRC, SIZE2, __x)
+#define MCDE_CRC_INBAND1_SHIFT 11
+#define MCDE_CRC_INBAND1_MASK 0x00000800
+#define MCDE_CRC_INBAND1(__x) \
+	MCDE_VAL2REG(MCDE_CRC, INBAND1, __x)
+#define MCDE_CRC_INBAND2_SHIFT 12
+#define MCDE_CRC_INBAND2_MASK 0x00001000
+#define MCDE_CRC_INBAND2(__x) \
+	MCDE_VAL2REG(MCDE_CRC, INBAND2, __x)
+#define MCDE_CRC_CLKSEL_SHIFT 13
+#define MCDE_CRC_CLKSEL_MASK 0x00006000
+#define MCDE_CRC_CLKSEL_166MHz 0
+#define MCDE_CRC_CLKSEL_48MHz 1
+#define MCDE_CRC_CLKSEL_LCD 2
+#define MCDE_CRC_CLKSEL_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_CRC, CLKSEL, MCDE_CRC_CLKSEL_##__x)
+#define MCDE_CRC_CLKSEL(__x) \
+	MCDE_VAL2REG(MCDE_CRC, CLKSEL, __x)
+#define MCDE_CRC_YUVCONVC1EN_SHIFT 15
+#define MCDE_CRC_YUVCONVC1EN_MASK 0x00008000
+#define MCDE_CRC_YUVCONVC1EN(__x) \
+	MCDE_VAL2REG(MCDE_CRC, YUVCONVC1EN, __x)
+#define MCDE_CRC_CS1EN_SHIFT 16
+#define MCDE_CRC_CS1EN_MASK 0x00010000
+#define MCDE_CRC_CS1EN(__x) \
+	MCDE_VAL2REG(MCDE_CRC, CS1EN, __x)
+#define MCDE_CRC_CS2EN_SHIFT 17
+#define MCDE_CRC_CS2EN_MASK 0x00020000
+#define MCDE_CRC_CS2EN(__x) \
+	MCDE_VAL2REG(MCDE_CRC, CS2EN, __x)
+#define MCDE_CRC_RESEN_SHIFT 18
+#define MCDE_CRC_RESEN_MASK 0x00040000
+#define MCDE_CRC_RESEN(__x) \
+	MCDE_VAL2REG(MCDE_CRC, RESEN, __x)
+#define MCDE_CRC_CS1POL_SHIFT 19
+#define MCDE_CRC_CS1POL_MASK 0x00080000
+#define MCDE_CRC_CS1POL(__x) \
+	MCDE_VAL2REG(MCDE_CRC, CS1POL, __x)
+#define MCDE_CRC_CS2POL_SHIFT 20
+#define MCDE_CRC_CS2POL_MASK 0x00100000
+#define MCDE_CRC_CS2POL(__x) \
+	MCDE_VAL2REG(MCDE_CRC, CS2POL, __x)
+#define MCDE_CRC_CD1POL_SHIFT 21
+#define MCDE_CRC_CD1POL_MASK 0x00200000
+#define MCDE_CRC_CD1POL(__x) \
+	MCDE_VAL2REG(MCDE_CRC, CD1POL, __x)
+#define MCDE_CRC_CD2POL_SHIFT 22
+#define MCDE_CRC_CD2POL_MASK 0x00400000
+#define MCDE_CRC_CD2POL(__x) \
+	MCDE_VAL2REG(MCDE_CRC, CD2POL, __x)
+#define MCDE_CRC_WR1POL_SHIFT 23
+#define MCDE_CRC_WR1POL_MASK 0x00800000
+#define MCDE_CRC_WR1POL(__x) \
+	MCDE_VAL2REG(MCDE_CRC, WR1POL, __x)
+#define MCDE_CRC_WR2POL_SHIFT 24
+#define MCDE_CRC_WR2POL_MASK 0x01000000
+#define MCDE_CRC_WR2POL(__x) \
+	MCDE_VAL2REG(MCDE_CRC, WR2POL, __x)
+#define MCDE_CRC_RD1POL_SHIFT 25
+#define MCDE_CRC_RD1POL_MASK 0x02000000
+#define MCDE_CRC_RD1POL(__x) \
+	MCDE_VAL2REG(MCDE_CRC, RD1POL, __x)
+#define MCDE_CRC_RD2POL_SHIFT 26
+#define MCDE_CRC_RD2POL_MASK 0x04000000
+#define MCDE_CRC_RD2POL(__x) \
+	MCDE_VAL2REG(MCDE_CRC, RD2POL, __x)
+#define MCDE_CRC_RES1POL_SHIFT 27
+#define MCDE_CRC_RES1POL_MASK 0x08000000
+#define MCDE_CRC_RES1POL(__x) \
+	MCDE_VAL2REG(MCDE_CRC, RES1POL, __x)
+#define MCDE_CRC_RES2POL_SHIFT 28
+#define MCDE_CRC_RES2POL_MASK 0x10000000
+#define MCDE_CRC_RES2POL(__x) \
+	MCDE_VAL2REG(MCDE_CRC, RES2POL, __x)
+#define MCDE_CRC_SYNCCTRL_SHIFT 29
+#define MCDE_CRC_SYNCCTRL_MASK 0x60000000
+#define MCDE_CRC_SYNCCTRL_OFF 0
+#define MCDE_CRC_SYNCCTRL_C0 1
+#define MCDE_CRC_SYNCCTRL_C1 2
+#define MCDE_CRC_SYNCCTRL_PING_PONG 3
+#define MCDE_CRC_SYNCCTRL_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_CRC, SYNCCTRL, MCDE_CRC_SYNCCTRL_##__x)
+#define MCDE_CRC_SYNCCTRL(__x) \
+	MCDE_VAL2REG(MCDE_CRC, SYNCCTRL, __x)
+#define MCDE_CRC_CLAMPC1EN_SHIFT 31
+#define MCDE_CRC_CLAMPC1EN_MASK 0x80000000
+#define MCDE_CRC_CLAMPC1EN(__x) \
+	MCDE_VAL2REG(MCDE_CRC, CLAMPC1EN, __x)
+#define MCDE_PBCCRC0 0x00000C04
+#define MCDE_PBCCRC0_GROUPOFFSET 0x4
+#define MCDE_PBCCRC0_BSCM_SHIFT 0
+#define MCDE_PBCCRC0_BSCM_MASK 0x00000007
+#define MCDE_PBCCRC0_BSCM_1_8BIT 0
+#define MCDE_PBCCRC0_BSCM_2_8BIT 1
+#define MCDE_PBCCRC0_BSCM_3_8BIT 2
+#define MCDE_PBCCRC0_BSCM_1_16BIT 3
+#define MCDE_PBCCRC0_BSCM_2_16BIT 4
+#define MCDE_PBCCRC0_BSCM_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_PBCCRC0, BSCM, MCDE_PBCCRC0_BSCM_##__x)
+#define MCDE_PBCCRC0_BSCM(__x) \
+	MCDE_VAL2REG(MCDE_PBCCRC0, BSCM, __x)
+#define MCDE_PBCCRC0_BSDM_SHIFT 3
+#define MCDE_PBCCRC0_BSDM_MASK 0x00000038
+#define MCDE_PBCCRC0_BSDM_1_8BIT 0
+#define MCDE_PBCCRC0_BSDM_2_8BIT 1
+#define MCDE_PBCCRC0_BSDM_3_8BIT 2
+#define MCDE_PBCCRC0_BSDM_1_16BIT 3
+#define MCDE_PBCCRC0_BSDM_2_16BIT 4
+#define MCDE_PBCCRC0_BSDM_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_PBCCRC0, BSDM, MCDE_PBCCRC0_BSDM_##__x)
+#define MCDE_PBCCRC0_BSDM(__x) \
+	MCDE_VAL2REG(MCDE_PBCCRC0, BSDM, __x)
+#define MCDE_PBCCRC0_PDM_SHIFT 6
+#define MCDE_PBCCRC0_PDM_MASK 0x000000C0
+#define MCDE_PBCCRC0_PDM_NORMAL 0
+#define MCDE_PBCCRC0_PDM_16_TO_32 1
+#define MCDE_PBCCRC0_PDM_24_TO_32_RIGHT 2
+#define MCDE_PBCCRC0_PDM_24_TO_32_LEFT 3
+#define MCDE_PBCCRC0_PDM_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_PBCCRC0, PDM, MCDE_PBCCRC0_PDM_##__x)
+#define MCDE_PBCCRC0_PDM(__x) \
+	MCDE_VAL2REG(MCDE_PBCCRC0, PDM, __x)
+#define MCDE_PBCCRC0_PDCTRL_SHIFT 12
+#define MCDE_PBCCRC0_PDCTRL_MASK 0x00001000
+#define MCDE_PBCCRC0_PDCTRL(__x) \
+	MCDE_VAL2REG(MCDE_PBCCRC0, PDCTRL, __x)
+#define MCDE_PBCCRC0_BPP_SHIFT 13
+#define MCDE_PBCCRC0_BPP_MASK 0x0000E000
+#define MCDE_PBCCRC0_BPP_8BPP 0
+#define MCDE_PBCCRC0_BPP_12BPP 1
+#define MCDE_PBCCRC0_BPP_15BPP 2
+#define MCDE_PBCCRC0_BPP_16BPP 3
+#define MCDE_PBCCRC0_BPP_18BPP 4
+#define MCDE_PBCCRC0_BPP_24BPP 5
+#define MCDE_PBCCRC0_BPP(__x) \
+	MCDE_VAL2REG(MCDE_PBCCRC0, BPP, __x)
+#define MCDE_PBCCRC1 0x00000C08
+#define MCDE_PBCCRC1_BSCM_SHIFT 0
+#define MCDE_PBCCRC1_BSCM_MASK 0x00000007
+#define MCDE_PBCCRC1_BSCM_1_8BIT 0
+#define MCDE_PBCCRC1_BSCM_2_8BIT 1
+#define MCDE_PBCCRC1_BSCM_3_8BIT 2
+#define MCDE_PBCCRC1_BSCM_1_16BIT 3
+#define MCDE_PBCCRC1_BSCM_2_16BIT 4
+#define MCDE_PBCCRC1_BSCM_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_PBCCRC1, BSCM, MCDE_PBCCRC1_BSCM_##__x)
+#define MCDE_PBCCRC1_BSCM(__x) \
+	MCDE_VAL2REG(MCDE_PBCCRC1, BSCM, __x)
+#define MCDE_PBCCRC1_BSDM_SHIFT 3
+#define MCDE_PBCCRC1_BSDM_MASK 0x00000038
+#define MCDE_PBCCRC1_BSDM_1_8BIT 0
+#define MCDE_PBCCRC1_BSDM_2_8BIT 1
+#define MCDE_PBCCRC1_BSDM_3_8BIT 2
+#define MCDE_PBCCRC1_BSDM_1_16BIT 3
+#define MCDE_PBCCRC1_BSDM_2_16BIT 4
+#define MCDE_PBCCRC1_BSDM_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_PBCCRC1, BSDM, MCDE_PBCCRC1_BSDM_##__x)
+#define MCDE_PBCCRC1_BSDM(__x) \
+	MCDE_VAL2REG(MCDE_PBCCRC1, BSDM, __x)
+#define MCDE_PBCCRC1_PDM_SHIFT 6
+#define MCDE_PBCCRC1_PDM_MASK 0x000000C0
+#define MCDE_PBCCRC1_PDM_NORMAL 0
+#define MCDE_PBCCRC1_PDM_16_TO_32 1
+#define MCDE_PBCCRC1_PDM_24_TO_32_RIGHT 2
+#define MCDE_PBCCRC1_PDM_24_TO_32_LEFT 3
+#define MCDE_PBCCRC1_PDM_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_PBCCRC1, PDM, MCDE_PBCCRC1_PDM_##__x)
+#define MCDE_PBCCRC1_PDM(__x) \
+	MCDE_VAL2REG(MCDE_PBCCRC1, PDM, __x)
+#define MCDE_PBCCRC1_PDCTRL_SHIFT 12
+#define MCDE_PBCCRC1_PDCTRL_MASK 0x00001000
+#define MCDE_PBCCRC1_PDCTRL(__x) \
+	MCDE_VAL2REG(MCDE_PBCCRC1, PDCTRL, __x)
+#define MCDE_PBCCRC1_BPP_SHIFT 13
+#define MCDE_PBCCRC1_BPP_MASK 0x0000E000
+#define MCDE_PBCCRC1_BPP_8BPP 0
+#define MCDE_PBCCRC1_BPP_12BPP 1
+#define MCDE_PBCCRC1_BPP_15BPP 2
+#define MCDE_PBCCRC1_BPP_16BPP 3
+#define MCDE_PBCCRC1_BPP_18BPP 4
+#define MCDE_PBCCRC1_BPP_24BPP 5
+#define MCDE_PBCCRC1_BPP(__x) \
+	MCDE_VAL2REG(MCDE_PBCCRC1, BPP, __x)
+#define MCDE_PBCBMRC00 0x00000C0C
+#define MCDE_PBCBMRC00_GROUPOFFSET 0x4
+#define MCDE_PBCBMRC00_MUXI_SHIFT 0
+#define MCDE_PBCBMRC00_MUXI_MASK 0xFFFFFFFF
+#define MCDE_PBCBMRC00_MUXI(__x) \
+	MCDE_VAL2REG(MCDE_PBCBMRC00, MUXI, __x)
+#define MCDE_PBCBMRC01 0x00000C10
+#define MCDE_PBCBMRC01_MUXI_SHIFT 0
+#define MCDE_PBCBMRC01_MUXI_MASK 0xFFFFFFFF
+#define MCDE_PBCBMRC01_MUXI(__x) \
+	MCDE_VAL2REG(MCDE_PBCBMRC01, MUXI, __x)
+#define MCDE_PBCBMRC02 0x00000C14
+#define MCDE_PBCBMRC02_MUXI_SHIFT 0
+#define MCDE_PBCBMRC02_MUXI_MASK 0xFFFFFFFF
+#define MCDE_PBCBMRC02_MUXI(__x) \
+	MCDE_VAL2REG(MCDE_PBCBMRC02, MUXI, __x)
+#define MCDE_PBCBMRC03 0x00000C18
+#define MCDE_PBCBMRC03_MUXI_SHIFT 0
+#define MCDE_PBCBMRC03_MUXI_MASK 0xFFFFFFFF
+#define MCDE_PBCBMRC03_MUXI(__x) \
+	MCDE_VAL2REG(MCDE_PBCBMRC03, MUXI, __x)
+#define MCDE_PBCBMRC04 0x00000C1C
+#define MCDE_PBCBMRC04_MUXI_SHIFT 0
+#define MCDE_PBCBMRC04_MUXI_MASK 0xFFFFFFFF
+#define MCDE_PBCBMRC04_MUXI(__x) \
+	MCDE_VAL2REG(MCDE_PBCBMRC04, MUXI, __x)
+#define MCDE_PBCBMRC10 0x00000C20
+#define MCDE_PBCBMRC10_MUXI_SHIFT 0
+#define MCDE_PBCBMRC10_MUXI_MASK 0xFFFFFFFF
+#define MCDE_PBCBMRC10_MUXI(__x) \
+	MCDE_VAL2REG(MCDE_PBCBMRC10, MUXI, __x)
+#define MCDE_PBCBMRC11 0x00000C24
+#define MCDE_PBCBMRC11_MUXI_SHIFT 0
+#define MCDE_PBCBMRC11_MUXI_MASK 0xFFFFFFFF
+#define MCDE_PBCBMRC11_MUXI(__x) \
+	MCDE_VAL2REG(MCDE_PBCBMRC11, MUXI, __x)
+#define MCDE_PBCBMRC12 0x00000C28
+#define MCDE_PBCBMRC12_MUXI_SHIFT 0
+#define MCDE_PBCBMRC12_MUXI_MASK 0xFFFFFFFF
+#define MCDE_PBCBMRC12_MUXI(__x) \
+	MCDE_VAL2REG(MCDE_PBCBMRC12, MUXI, __x)
+#define MCDE_PBCBMRC13 0x00000C2C
+#define MCDE_PBCBMRC13_MUXI_SHIFT 0
+#define MCDE_PBCBMRC13_MUXI_MASK 0xFFFFFFFF
+#define MCDE_PBCBMRC13_MUXI(__x) \
+	MCDE_VAL2REG(MCDE_PBCBMRC13, MUXI, __x)
+#define MCDE_PBCBMRC14 0x00000C30
+#define MCDE_PBCBMRC14_MUXI_SHIFT 0
+#define MCDE_PBCBMRC14_MUXI_MASK 0xFFFFFFFF
+#define MCDE_PBCBMRC14_MUXI(__x) \
+	MCDE_VAL2REG(MCDE_PBCBMRC14, MUXI, __x)
+#define MCDE_PBCBCRC00 0x00000C34
+#define MCDE_PBCBCRC00_GROUPOFFSET 0x4
+#define MCDE_PBCBCRC00_CTLI_SHIFT 0
+#define MCDE_PBCBCRC00_CTLI_MASK 0xFFFFFFFF
+#define MCDE_PBCBCRC00_CTLI(__x) \
+	MCDE_VAL2REG(MCDE_PBCBCRC00, CTLI, __x)
+#define MCDE_PBCBCRC10 0x00000C38
+#define MCDE_PBCBCRC10_CTLI_SHIFT 0
+#define MCDE_PBCBCRC10_CTLI_MASK 0xFFFFFFFF
+#define MCDE_PBCBCRC10_CTLI(__x) \
+	MCDE_VAL2REG(MCDE_PBCBCRC10, CTLI, __x)
+#define MCDE_PBCBCRC01 0x00000C48
+#define MCDE_PBCBCRC01_GROUPOFFSET 0x4
+#define MCDE_PBCBCRC01_CTLI_SHIFT 0
+#define MCDE_PBCBCRC01_CTLI_MASK 0xFFFFFFFF
+#define MCDE_PBCBCRC01_CTLI(__x) \
+	MCDE_VAL2REG(MCDE_PBCBCRC01, CTLI, __x)
+#define MCDE_PBCBCRC11 0x00000C4C
+#define MCDE_PBCBCRC11_CTLI_SHIFT 0
+#define MCDE_PBCBCRC11_CTLI_MASK 0xFFFFFFFF
+#define MCDE_PBCBCRC11_CTLI(__x) \
+	MCDE_VAL2REG(MCDE_PBCBCRC11, CTLI, __x)
+#define MCDE_VSCRC0 0x00000C5C
+#define MCDE_VSCRC0_GROUPOFFSET 0x4
+#define MCDE_VSCRC0_VSPMIN_SHIFT 0
+#define MCDE_VSCRC0_VSPMIN_MASK 0x00000FFF
+#define MCDE_VSCRC0_VSPMIN(__x) \
+	MCDE_VAL2REG(MCDE_VSCRC0, VSPMIN, __x)
+#define MCDE_VSCRC0_VSPMAX_SHIFT 12
+#define MCDE_VSCRC0_VSPMAX_MASK 0x00FFF000
+#define MCDE_VSCRC0_VSPMAX(__x) \
+	MCDE_VAL2REG(MCDE_VSCRC0, VSPMAX, __x)
+#define MCDE_VSCRC0_VSPDIV_SHIFT 24
+#define MCDE_VSCRC0_VSPDIV_MASK 0x07000000
+#define MCDE_VSCRC0_VSPDIV(__x) \
+	MCDE_VAL2REG(MCDE_VSCRC0, VSPDIV, __x)
+#define MCDE_VSCRC0_VSPOL_SHIFT 27
+#define MCDE_VSCRC0_VSPOL_MASK 0x08000000
+#define MCDE_VSCRC0_VSPOL_ACTIVE_HIGH 0
+#define MCDE_VSCRC0_VSPOL_ACTIVE_LOW 1
+#define MCDE_VSCRC0_VSPOL_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_VSCRC0, VSPOL, MCDE_VSCRC0_VSPOL_##__x)
+#define MCDE_VSCRC0_VSPOL(__x) \
+	MCDE_VAL2REG(MCDE_VSCRC0, VSPOL, __x)
+#define MCDE_VSCRC0_VSSEL_SHIFT 28
+#define MCDE_VSCRC0_VSSEL_MASK 0x10000000
+#define MCDE_VSCRC0_VSSEL_VSYNC 0
+#define MCDE_VSCRC0_VSSEL_HSYNC 1
+#define MCDE_VSCRC0_VSSEL_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_VSCRC0, VSSEL, MCDE_VSCRC0_VSSEL_##__x)
+#define MCDE_VSCRC0_VSSEL(__x) \
+	MCDE_VAL2REG(MCDE_VSCRC0, VSSEL, __x)
+#define MCDE_VSCRC0_VSDBL_SHIFT 29
+#define MCDE_VSCRC0_VSDBL_MASK 0xE0000000
+#define MCDE_VSCRC0_VSDBL(__x) \
+	MCDE_VAL2REG(MCDE_VSCRC0, VSDBL, __x)
+#define MCDE_VSCRC1 0x00000C60
+#define MCDE_VSCRC1_VSPMIN_SHIFT 0
+#define MCDE_VSCRC1_VSPMIN_MASK 0x00000FFF
+#define MCDE_VSCRC1_VSPMIN(__x) \
+	MCDE_VAL2REG(MCDE_VSCRC1, VSPMIN, __x)
+#define MCDE_VSCRC1_VSPMAX_SHIFT 12
+#define MCDE_VSCRC1_VSPMAX_MASK 0x00FFF000
+#define MCDE_VSCRC1_VSPMAX(__x) \
+	MCDE_VAL2REG(MCDE_VSCRC1, VSPMAX, __x)
+#define MCDE_VSCRC1_VSPDIV_SHIFT 24
+#define MCDE_VSCRC1_VSPDIV_MASK 0x07000000
+#define MCDE_VSCRC1_VSPDIV(__x) \
+	MCDE_VAL2REG(MCDE_VSCRC1, VSPDIV, __x)
+#define MCDE_VSCRC1_VSPOL_SHIFT 27
+#define MCDE_VSCRC1_VSPOL_MASK 0x08000000
+#define MCDE_VSCRC1_VSPOL_ACTIVE_HIGH 0
+#define MCDE_VSCRC1_VSPOL_ACTIVE_LOW 1
+#define MCDE_VSCRC1_VSPOL_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_VSCRC1, VSPOL, MCDE_VSCRC1_VSPOL_##__x)
+#define MCDE_VSCRC1_VSPOL(__x) \
+	MCDE_VAL2REG(MCDE_VSCRC1, VSPOL, __x)
+#define MCDE_VSCRC1_VSSEL_SHIFT 28
+#define MCDE_VSCRC1_VSSEL_MASK 0x10000000
+#define MCDE_VSCRC1_VSSEL_VSYNC 0
+#define MCDE_VSCRC1_VSSEL_HSYNC 1
+#define MCDE_VSCRC1_VSSEL_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_VSCRC1, VSSEL, MCDE_VSCRC1_VSSEL_##__x)
+#define MCDE_VSCRC1_VSSEL(__x) \
+	MCDE_VAL2REG(MCDE_VSCRC1, VSSEL, __x)
+#define MCDE_VSCRC1_VSDBL_SHIFT 29
+#define MCDE_VSCRC1_VSDBL_MASK 0xE0000000
+#define MCDE_VSCRC1_VSDBL(__x) \
+	MCDE_VAL2REG(MCDE_VSCRC1, VSDBL, __x)
+#define MCDE_SCTRC 0x00000C64
+#define MCDE_SCTRC_SYNCDELC0_SHIFT 0
+#define MCDE_SCTRC_SYNCDELC0_MASK 0x000000FF
+#define MCDE_SCTRC_SYNCDELC0(__x) \
+	MCDE_VAL2REG(MCDE_SCTRC, SYNCDELC0, __x)
+#define MCDE_SCTRC_SYNCDELC1_SHIFT 8
+#define MCDE_SCTRC_SYNCDELC1_MASK 0x0000FF00
+#define MCDE_SCTRC_SYNCDELC1(__x) \
+	MCDE_VAL2REG(MCDE_SCTRC, SYNCDELC1, __x)
+#define MCDE_SCTRC_TRDELC_SHIFT 16
+#define MCDE_SCTRC_TRDELC_MASK 0x0FFF0000
+#define MCDE_SCTRC_TRDELC(__x) \
+	MCDE_VAL2REG(MCDE_SCTRC, TRDELC, __x)
+#define MCDE_SCSRC 0x00000C68
+#define MCDE_SCSRC_VSTAC0_SHIFT 0
+#define MCDE_SCSRC_VSTAC0_MASK 0x00000001
+#define MCDE_SCSRC_VSTAC0(__x) \
+	MCDE_VAL2REG(MCDE_SCSRC, VSTAC0, __x)
+#define MCDE_SCSRC_VSTAC1_SHIFT 1
+#define MCDE_SCSRC_VSTAC1_MASK 0x00000002
+#define MCDE_SCSRC_VSTAC1(__x) \
+	MCDE_VAL2REG(MCDE_SCSRC, VSTAC1, __x)
+#define MCDE_BCNR0 0x00000C6C
+#define MCDE_BCNR0_GROUPOFFSET 0x4
+#define MCDE_BCNR0_BCN_SHIFT 0
+#define MCDE_BCNR0_BCN_MASK 0x000000FF
+#define MCDE_BCNR0_BCN(__x) \
+	MCDE_VAL2REG(MCDE_BCNR0, BCN, __x)
+#define MCDE_BCNR1 0x00000C70
+#define MCDE_BCNR1_BCN_SHIFT 0
+#define MCDE_BCNR1_BCN_MASK 0x000000FF
+#define MCDE_BCNR1_BCN(__x) \
+	MCDE_VAL2REG(MCDE_BCNR1, BCN, __x)
+#define MCDE_CSCDTR0 0x00000C74
+#define MCDE_CSCDTR0_GROUPOFFSET 0x4
+#define MCDE_CSCDTR0_CSACT_SHIFT 0
+#define MCDE_CSCDTR0_CSACT_MASK 0x000000FF
+#define MCDE_CSCDTR0_CSACT(__x) \
+	MCDE_VAL2REG(MCDE_CSCDTR0, CSACT, __x)
+#define MCDE_CSCDTR0_CSDEACT_SHIFT 8
+#define MCDE_CSCDTR0_CSDEACT_MASK 0x0000FF00
+#define MCDE_CSCDTR0_CSDEACT(__x) \
+	MCDE_VAL2REG(MCDE_CSCDTR0, CSDEACT, __x)
+#define MCDE_CSCDTR0_CDACT_SHIFT 16
+#define MCDE_CSCDTR0_CDACT_MASK 0x00FF0000
+#define MCDE_CSCDTR0_CDACT(__x) \
+	MCDE_VAL2REG(MCDE_CSCDTR0, CDACT, __x)
+#define MCDE_CSCDTR0_CDDEACT_SHIFT 24
+#define MCDE_CSCDTR0_CDDEACT_MASK 0xFF000000
+#define MCDE_CSCDTR0_CDDEACT(__x) \
+	MCDE_VAL2REG(MCDE_CSCDTR0, CDDEACT, __x)
+#define MCDE_CSCDTR1 0x00000C78
+#define MCDE_CSCDTR1_CSACT_SHIFT 0
+#define MCDE_CSCDTR1_CSACT_MASK 0x000000FF
+#define MCDE_CSCDTR1_CSACT(__x) \
+	MCDE_VAL2REG(MCDE_CSCDTR1, CSACT, __x)
+#define MCDE_CSCDTR1_CSDEACT_SHIFT 8
+#define MCDE_CSCDTR1_CSDEACT_MASK 0x0000FF00
+#define MCDE_CSCDTR1_CSDEACT(__x) \
+	MCDE_VAL2REG(MCDE_CSCDTR1, CSDEACT, __x)
+#define MCDE_CSCDTR1_CDACT_SHIFT 16
+#define MCDE_CSCDTR1_CDACT_MASK 0x00FF0000
+#define MCDE_CSCDTR1_CDACT(__x) \
+	MCDE_VAL2REG(MCDE_CSCDTR1, CDACT, __x)
+#define MCDE_CSCDTR1_CDDEACT_SHIFT 24
+#define MCDE_CSCDTR1_CDDEACT_MASK 0xFF000000
+#define MCDE_CSCDTR1_CDDEACT(__x) \
+	MCDE_VAL2REG(MCDE_CSCDTR1, CDDEACT, __x)
+#define MCDE_RDWRTR0 0x00000C7C
+#define MCDE_RDWRTR0_GROUPOFFSET 0x4
+#define MCDE_RDWRTR0_RWACT_SHIFT 0
+#define MCDE_RDWRTR0_RWACT_MASK 0x000000FF
+#define MCDE_RDWRTR0_RWACT(__x) \
+	MCDE_VAL2REG(MCDE_RDWRTR0, RWACT, __x)
+#define MCDE_RDWRTR0_RWDEACT_SHIFT 8
+#define MCDE_RDWRTR0_RWDEACT_MASK 0x0000FF00
+#define MCDE_RDWRTR0_RWDEACT(__x) \
+	MCDE_VAL2REG(MCDE_RDWRTR0, RWDEACT, __x)
+#define MCDE_RDWRTR0_MOTINT_SHIFT 16
+#define MCDE_RDWRTR0_MOTINT_MASK 0x00010000
+#define MCDE_RDWRTR0_MOTINT(__x) \
+	MCDE_VAL2REG(MCDE_RDWRTR0, MOTINT, __x)
+#define MCDE_RDWRTR1 0x00000C80
+#define MCDE_RDWRTR1_RWACT_SHIFT 0
+#define MCDE_RDWRTR1_RWACT_MASK 0x000000FF
+#define MCDE_RDWRTR1_RWACT(__x) \
+	MCDE_VAL2REG(MCDE_RDWRTR1, RWACT, __x)
+#define MCDE_RDWRTR1_RWDEACT_SHIFT 8
+#define MCDE_RDWRTR1_RWDEACT_MASK 0x0000FF00
+#define MCDE_RDWRTR1_RWDEACT(__x) \
+	MCDE_VAL2REG(MCDE_RDWRTR1, RWDEACT, __x)
+#define MCDE_RDWRTR1_MOTINT_SHIFT 16
+#define MCDE_RDWRTR1_MOTINT_MASK 0x00010000
+#define MCDE_RDWRTR1_MOTINT(__x) \
+	MCDE_VAL2REG(MCDE_RDWRTR1, MOTINT, __x)
+#define MCDE_DOTR0 0x00000C84
+#define MCDE_DOTR0_GROUPOFFSET 0x4
+#define MCDE_DOTR0_DOACT_SHIFT 0
+#define MCDE_DOTR0_DOACT_MASK 0x000000FF
+#define MCDE_DOTR0_DOACT(__x) \
+	MCDE_VAL2REG(MCDE_DOTR0, DOACT, __x)
+#define MCDE_DOTR0_DODEACT_SHIFT 8
+#define MCDE_DOTR0_DODEACT_MASK 0x0000FF00
+#define MCDE_DOTR0_DODEACT(__x) \
+	MCDE_VAL2REG(MCDE_DOTR0, DODEACT, __x)
+#define MCDE_DOTR1 0x00000C88
+#define MCDE_DOTR1_DOACT_SHIFT 0
+#define MCDE_DOTR1_DOACT_MASK 0x000000FF
+#define MCDE_DOTR1_DOACT(__x) \
+	MCDE_VAL2REG(MCDE_DOTR1, DOACT, __x)
+#define MCDE_DOTR1_DODEACT_SHIFT 8
+#define MCDE_DOTR1_DODEACT_MASK 0x0000FF00
+#define MCDE_DOTR1_DODEACT(__x) \
+	MCDE_VAL2REG(MCDE_DOTR1, DODEACT, __x)
+#define MCDE_WCMDC0_V1 0x00000C8C
+#define MCDE_WCMDC0_V1_GROUPOFFSET 0x4
+#define MCDE_WCMDC0_V1_COMMANDVALUE_SHIFT 0
+#define MCDE_WCMDC0_V1_COMMANDVALUE_MASK 0x00FFFFFF
+#define MCDE_WCMDC0_V1_COMMANDVALUE(__x) \
+	MCDE_VAL2REG(MCDE_WCMDC0_V1, COMMANDVALUE, __x)
+#define MCDE_WCMDC1_V1 0x00000C90
+#define MCDE_WCMDC1_V1_COMMANDVALUE_SHIFT 0
+#define MCDE_WCMDC1_V1_COMMANDVALUE_MASK 0x00FFFFFF
+#define MCDE_WCMDC1_V1_COMMANDVALUE(__x) \
+	MCDE_VAL2REG(MCDE_WCMDC1_V1, COMMANDVALUE, __x)
+#define MCDE_WDATADC0 0x00000C94
+#define MCDE_WDATADC0_GROUPOFFSET 0x4
+#define MCDE_WDATADC0_DATAVALUE_SHIFT 0
+#define MCDE_WDATADC0_DATAVALUE_MASK 0x00FFFFFF
+#define MCDE_WDATADC0_DATAVALUE(__x) \
+	MCDE_VAL2REG(MCDE_WDATADC0, DATAVALUE, __x)
+#define MCDE_WDATADC1 0x00000C98
+#define MCDE_WDATADC1_DATAVALUE_SHIFT 0
+#define MCDE_WDATADC1_DATAVALUE_MASK 0x00FFFFFF
+#define MCDE_WDATADC1_DATAVALUE(__x) \
+	MCDE_VAL2REG(MCDE_WDATADC1, DATAVALUE, __x)
+#define MCDE_RDATADC0 0x00000C9C
+#define MCDE_RDATADC0_GROUPOFFSET 0x4
+#define MCDE_RDATADC0_DATAREADFROMDISPLAYMODULE_SHIFT 0
+#define MCDE_RDATADC0_DATAREADFROMDISPLAYMODULE_MASK 0x0000FFFF
+#define MCDE_RDATADC0_DATAREADFROMDISPLAYMODULE(__x) \
+	MCDE_VAL2REG(MCDE_RDATADC0, DATAREADFROMDISPLAYMODULE, __x)
+#define MCDE_RDATADC0_STARTREAD_SHIFT 16
+#define MCDE_RDATADC0_STARTREAD_MASK 0x00010000
+#define MCDE_RDATADC0_STARTREAD(__x) \
+	MCDE_VAL2REG(MCDE_RDATADC0, STARTREAD, __x)
+#define MCDE_RDATADC1 0x00000CA0
+#define MCDE_RDATADC1_DATAREADFROMDISPLAYMODULE_SHIFT 0
+#define MCDE_RDATADC1_DATAREADFROMDISPLAYMODULE_MASK 0x0000FFFF
+#define MCDE_RDATADC1_DATAREADFROMDISPLAYMODULE(__x) \
+	MCDE_VAL2REG(MCDE_RDATADC1, DATAREADFROMDISPLAYMODULE, __x)
+#define MCDE_RDATADC1_STARTREAD_SHIFT 16
+#define MCDE_RDATADC1_STARTREAD_MASK 0x00010000
+#define MCDE_RDATADC1_STARTREAD(__x) \
+	MCDE_VAL2REG(MCDE_RDATADC1, STARTREAD, __x)
+#define MCDE_STATC_V1 0x00000CA4
+#define MCDE_STATC_V1_STATBUSY0_SHIFT 0
+#define MCDE_STATC_V1_STATBUSY0_MASK 0x00000001
+#define MCDE_STATC_V1_STATBUSY0(__x) \
+	MCDE_VAL2REG(MCDE_STATC_V1, STATBUSY0, __x)
+#define MCDE_STATC_V1_FIFOEMPTY0_SHIFT 1
+#define MCDE_STATC_V1_FIFOEMPTY0_MASK 0x00000002
+#define MCDE_STATC_V1_FIFOEMPTY0(__x) \
+	MCDE_VAL2REG(MCDE_STATC_V1, FIFOEMPTY0, __x)
+#define MCDE_STATC_V1_FIFOFULL0_SHIFT 2
+#define MCDE_STATC_V1_FIFOFULL0_MASK 0x00000004
+#define MCDE_STATC_V1_FIFOFULL0(__x) \
+	MCDE_VAL2REG(MCDE_STATC_V1, FIFOFULL0, __x)
+#define MCDE_STATC_V1_FIFOCMDEMPTY0_SHIFT 3
+#define MCDE_STATC_V1_FIFOCMDEMPTY0_MASK 0x00000008
+#define MCDE_STATC_V1_FIFOCMDEMPTY0(__x) \
+	MCDE_VAL2REG(MCDE_STATC_V1, FIFOCMDEMPTY0, __x)
+#define MCDE_STATC_V1_FIFOCMDFULL0_SHIFT 4
+#define MCDE_STATC_V1_FIFOCMDFULL0_MASK 0x00000010
+#define MCDE_STATC_V1_FIFOCMDFULL0(__x) \
+	MCDE_VAL2REG(MCDE_STATC_V1, FIFOCMDFULL0, __x)
+#define MCDE_STATC_V1_STATBUSY1_SHIFT 5
+#define MCDE_STATC_V1_STATBUSY1_MASK 0x00000020
+#define MCDE_STATC_V1_STATBUSY1(__x) \
+	MCDE_VAL2REG(MCDE_STATC_V1, STATBUSY1, __x)
+#define MCDE_STATC_V1_FIFOEMPTY1_SHIFT 6
+#define MCDE_STATC_V1_FIFOEMPTY1_MASK 0x00000040
+#define MCDE_STATC_V1_FIFOEMPTY1(__x) \
+	MCDE_VAL2REG(MCDE_STATC_V1, FIFOEMPTY1, __x)
+#define MCDE_STATC_V1_FIFOFULL1_SHIFT 7
+#define MCDE_STATC_V1_FIFOFULL1_MASK 0x00000080
+#define MCDE_STATC_V1_FIFOFULL1(__x) \
+	MCDE_VAL2REG(MCDE_STATC_V1, FIFOFULL1, __x)
+#define MCDE_STATC_V1_FIFOCMDEMPTY1_SHIFT 8
+#define MCDE_STATC_V1_FIFOCMDEMPTY1_MASK 0x00000100
+#define MCDE_STATC_V1_FIFOCMDEMPTY1(__x) \
+	MCDE_VAL2REG(MCDE_STATC_V1, FIFOCMDEMPTY1, __x)
+#define MCDE_STATC_V1_FIFOCMDFULL1_SHIFT 9
+#define MCDE_STATC_V1_FIFOCMDFULL1_MASK 0x00000200
+#define MCDE_STATC_V1_FIFOCMDFULL1(__x) \
+	MCDE_VAL2REG(MCDE_STATC_V1, FIFOCMDFULL1, __x)
+#define MCDE_CTRLC0 0x00000CA8
+#define MCDE_CTRLC0_GROUPOFFSET 0x4
+#define MCDE_CTRLC0_FIFOWTRMRK_SHIFT 0
+#define MCDE_CTRLC0_FIFOWTRMRK_MASK 0x000000FF
+#define MCDE_CTRLC0_FIFOWTRMRK(__x) \
+	MCDE_VAL2REG(MCDE_CTRLC0, FIFOWTRMRK, __x)
+#define MCDE_CTRLC0_FIFOEMPTY_SHIFT 12
+#define MCDE_CTRLC0_FIFOEMPTY_MASK 0x00001000
+#define MCDE_CTRLC0_FIFOEMPTY(__x) \
+	MCDE_VAL2REG(MCDE_CTRLC0, FIFOEMPTY, __x)
+#define MCDE_CTRLC0_FIFOFULL_SHIFT 13
+#define MCDE_CTRLC0_FIFOFULL_MASK 0x00002000
+#define MCDE_CTRLC0_FIFOFULL(__x) \
+	MCDE_VAL2REG(MCDE_CTRLC0, FIFOFULL, __x)
+#define MCDE_CTRLC0_FORMID_SHIFT 16
+#define MCDE_CTRLC0_FORMID_MASK 0x00070000
+#define MCDE_CTRLC0_FORMID_DSI0VID 0
+#define MCDE_CTRLC0_FORMID_DSI0CMD 1
+#define MCDE_CTRLC0_FORMID_DSI1VID 2
+#define MCDE_CTRLC0_FORMID_DSI1CMD 3
+#define MCDE_CTRLC0_FORMID_DSI2VID 4
+#define MCDE_CTRLC0_FORMID_DSI2CMD 5
+#define MCDE_CTRLC0_FORMID_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_CTRLC0, FORMID, MCDE_CTRLC0_FORMID_##__x)
+#define MCDE_CTRLC0_FORMID(__x) \
+	MCDE_VAL2REG(MCDE_CTRLC0, FORMID, __x)
+#define MCDE_CTRLC0_FORMTYPE_SHIFT 20
+#define MCDE_CTRLC0_FORMTYPE_MASK 0x00700000
+#define MCDE_CTRLC0_FORMTYPE_DPITV 0
+#define MCDE_CTRLC0_FORMTYPE_DBI 1
+#define MCDE_CTRLC0_FORMTYPE_DSI 2
+#define MCDE_CTRLC0_FORMTYPE_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_CTRLC0, FORMTYPE, MCDE_CTRLC0_FORMTYPE_##__x)
+#define MCDE_CTRLC0_FORMTYPE(__x) \
+	MCDE_VAL2REG(MCDE_CTRLC0, FORMTYPE, __x)
+#define MCDE_CTRLC1 0x00000CAC
+#define MCDE_CTRLC1_FIFOWTRMRK_SHIFT 0
+#define MCDE_CTRLC1_FIFOWTRMRK_MASK 0x000000FF
+#define MCDE_CTRLC1_FIFOWTRMRK(__x) \
+	MCDE_VAL2REG(MCDE_CTRLC1, FIFOWTRMRK, __x)
+#define MCDE_CTRLC1_FIFOEMPTY_SHIFT 12
+#define MCDE_CTRLC1_FIFOEMPTY_MASK 0x00001000
+#define MCDE_CTRLC1_FIFOEMPTY(__x) \
+	MCDE_VAL2REG(MCDE_CTRLC1, FIFOEMPTY, __x)
+#define MCDE_CTRLC1_FIFOFULL_SHIFT 13
+#define MCDE_CTRLC1_FIFOFULL_MASK 0x00002000
+#define MCDE_CTRLC1_FIFOFULL(__x) \
+	MCDE_VAL2REG(MCDE_CTRLC1, FIFOFULL, __x)
+#define MCDE_CTRLC1_FORMID_SHIFT 16
+#define MCDE_CTRLC1_FORMID_MASK 0x00070000
+#define MCDE_CTRLC1_FORMID_DSI0VID 0
+#define MCDE_CTRLC1_FORMID_DSI0CMD 1
+#define MCDE_CTRLC1_FORMID_DSI1VID 2
+#define MCDE_CTRLC1_FORMID_DSI1CMD 3
+#define MCDE_CTRLC1_FORMID_DSI2VID 4
+#define MCDE_CTRLC1_FORMID_DSI2CMD 5
+#define MCDE_CTRLC1_FORMID_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_CTRLC1, FORMID, MCDE_CTRLC1_FORMID_##__x)
+#define MCDE_CTRLC1_FORMID(__x) \
+	MCDE_VAL2REG(MCDE_CTRLC1, FORMID, __x)
+#define MCDE_CTRLC1_FORMTYPE_SHIFT 20
+#define MCDE_CTRLC1_FORMTYPE_MASK 0x00700000
+#define MCDE_CTRLC1_FORMTYPE_DPITV 0
+#define MCDE_CTRLC1_FORMTYPE_DBI 1
+#define MCDE_CTRLC1_FORMTYPE_DSI 2
+#define MCDE_CTRLC1_FORMTYPE_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_CTRLC1, FORMTYPE, MCDE_CTRLC1_FORMTYPE_##__x)
+#define MCDE_CTRLC1_FORMTYPE(__x) \
+	MCDE_VAL2REG(MCDE_CTRLC1, FORMTYPE, __x)
+#define MCDE_DSIVID0CONF0 0x00000E00
+#define MCDE_DSIVID0CONF0_GROUPOFFSET 0x20
+#define MCDE_DSIVID0CONF0_BLANKING_SHIFT 0
+#define MCDE_DSIVID0CONF0_BLANKING_MASK 0x000000FF
+#define MCDE_DSIVID0CONF0_BLANKING(__x) \
+	MCDE_VAL2REG(MCDE_DSIVID0CONF0, BLANKING, __x)
+#define MCDE_DSIVID0CONF0_VID_MODE_SHIFT 12
+#define MCDE_DSIVID0CONF0_VID_MODE_MASK 0x00001000
+#define MCDE_DSIVID0CONF0_VID_MODE_CMD 0
+#define MCDE_DSIVID0CONF0_VID_MODE_VID 1
+#define MCDE_DSIVID0CONF0_VID_MODE_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_DSIVID0CONF0, VID_MODE, \
+	MCDE_DSIVID0CONF0_VID_MODE_##__x)
+#define MCDE_DSIVID0CONF0_VID_MODE(__x) \
+	MCDE_VAL2REG(MCDE_DSIVID0CONF0, VID_MODE, __x)
+#define MCDE_DSIVID0CONF0_CMD8_SHIFT 13
+#define MCDE_DSIVID0CONF0_CMD8_MASK 0x00002000
+#define MCDE_DSIVID0CONF0_CMD8(__x) \
+	MCDE_VAL2REG(MCDE_DSIVID0CONF0, CMD8, __x)
+#define MCDE_DSIVID0CONF0_BIT_SWAP_SHIFT 16
+#define MCDE_DSIVID0CONF0_BIT_SWAP_MASK 0x00010000
+#define MCDE_DSIVID0CONF0_BIT_SWAP(__x) \
+	MCDE_VAL2REG(MCDE_DSIVID0CONF0, BIT_SWAP, __x)
+#define MCDE_DSIVID0CONF0_BYTE_SWAP_SHIFT 17
+#define MCDE_DSIVID0CONF0_BYTE_SWAP_MASK 0x00020000
+#define MCDE_DSIVID0CONF0_BYTE_SWAP(__x) \
+	MCDE_VAL2REG(MCDE_DSIVID0CONF0, BYTE_SWAP, __x)
+#define MCDE_DSIVID0CONF0_DCSVID_NOTGEN_SHIFT 18
+#define MCDE_DSIVID0CONF0_DCSVID_NOTGEN_MASK 0x00040000
+#define MCDE_DSIVID0CONF0_DCSVID_NOTGEN(__x) \
+	MCDE_VAL2REG(MCDE_DSIVID0CONF0, DCSVID_NOTGEN, __x)
+#define MCDE_DSIVID0CONF0_PACKING_SHIFT 20
+#define MCDE_DSIVID0CONF0_PACKING_MASK 0x00700000
+#define MCDE_DSIVID0CONF0_PACKING_RGB565 0
+#define MCDE_DSIVID0CONF0_PACKING_RGB666 1
+#define MCDE_DSIVID0CONF0_PACKING_RGB888 2
+#define MCDE_DSIVID0CONF0_PACKING_BGR888 3
+#define MCDE_DSIVID0CONF0_PACKING_HDTV 4
+#define MCDE_DSIVID0CONF0_PACKING_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_DSIVID0CONF0, PACKING, \
+	MCDE_DSIVID0CONF0_PACKING_##__x)
+#define MCDE_DSIVID0CONF0_PACKING(__x) \
+	MCDE_VAL2REG(MCDE_DSIVID0CONF0, PACKING, __x)
+#define MCDE_DSICMD0CONF0 0x00000E20
+#define MCDE_DSICMD0CONF0_BLANKING_SHIFT 0
+#define MCDE_DSICMD0CONF0_BLANKING_MASK 0x000000FF
+#define MCDE_DSICMD0CONF0_BLANKING(__x) \
+	MCDE_VAL2REG(MCDE_DSICMD0CONF0, BLANKING, __x)
+#define MCDE_DSICMD0CONF0_VID_MODE_SHIFT 12
+#define MCDE_DSICMD0CONF0_VID_MODE_MASK 0x00001000
+#define MCDE_DSICMD0CONF0_VID_MODE_CMD 0
+#define MCDE_DSICMD0CONF0_VID_MODE_VID 1
+#define MCDE_DSICMD0CONF0_VID_MODE_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_DSICMD0CONF0, VID_MODE, \
+	MCDE_DSICMD0CONF0_VID_MODE_##__x)
+#define MCDE_DSICMD0CONF0_VID_MODE(__x) \
+	MCDE_VAL2REG(MCDE_DSICMD0CONF0, VID_MODE, __x)
+#define MCDE_DSICMD0CONF0_CMD8_SHIFT 13
+#define MCDE_DSICMD0CONF0_CMD8_MASK 0x00002000
+#define MCDE_DSICMD0CONF0_CMD8(__x) \
+	MCDE_VAL2REG(MCDE_DSICMD0CONF0, CMD8, __x)
+#define MCDE_DSICMD0CONF0_BIT_SWAP_SHIFT 16
+#define MCDE_DSICMD0CONF0_BIT_SWAP_MASK 0x00010000
+#define MCDE_DSICMD0CONF0_BIT_SWAP(__x) \
+	MCDE_VAL2REG(MCDE_DSICMD0CONF0, BIT_SWAP, __x)
+#define MCDE_DSICMD0CONF0_BYTE_SWAP_SHIFT 17
+#define MCDE_DSICMD0CONF0_BYTE_SWAP_MASK 0x00020000
+#define MCDE_DSICMD0CONF0_BYTE_SWAP(__x) \
+	MCDE_VAL2REG(MCDE_DSICMD0CONF0, BYTE_SWAP, __x)
+#define MCDE_DSICMD0CONF0_DCSVID_NOTGEN_SHIFT 18
+#define MCDE_DSICMD0CONF0_DCSVID_NOTGEN_MASK 0x00040000
+#define MCDE_DSICMD0CONF0_DCSVID_NOTGEN(__x) \
+	MCDE_VAL2REG(MCDE_DSICMD0CONF0, DCSVID_NOTGEN, __x)
+#define MCDE_DSICMD0CONF0_PACKING_SHIFT 20
+#define MCDE_DSICMD0CONF0_PACKING_MASK 0x00700000
+#define MCDE_DSICMD0CONF0_PACKING_RGB565 0
+#define MCDE_DSICMD0CONF0_PACKING_RGB666 1
+#define MCDE_DSICMD0CONF0_PACKING_RGB888 2
+#define MCDE_DSICMD0CONF0_PACKING_BGR888 3
+#define MCDE_DSICMD0CONF0_PACKING_HDTV 4
+#define MCDE_DSICMD0CONF0_PACKING_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_DSICMD0CONF0, PACKING, \
+	MCDE_DSICMD0CONF0_PACKING_##__x)
+#define MCDE_DSICMD0CONF0_PACKING(__x) \
+	MCDE_VAL2REG(MCDE_DSICMD0CONF0, PACKING, __x)
+#define MCDE_DSIVID1CONF0 0x00000E40
+#define MCDE_DSIVID1CONF0_BLANKING_SHIFT 0
+#define MCDE_DSIVID1CONF0_BLANKING_MASK 0x000000FF
+#define MCDE_DSIVID1CONF0_BLANKING(__x) \
+	MCDE_VAL2REG(MCDE_DSIVID1CONF0, BLANKING, __x)
+#define MCDE_DSIVID1CONF0_VID_MODE_SHIFT 12
+#define MCDE_DSIVID1CONF0_VID_MODE_MASK 0x00001000
+#define MCDE_DSIVID1CONF0_VID_MODE_CMD 0
+#define MCDE_DSIVID1CONF0_VID_MODE_VID 1
+#define MCDE_DSIVID1CONF0_VID_MODE_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_DSIVID1CONF0, VID_MODE, \
+	MCDE_DSIVID1CONF0_VID_MODE_##__x)
+#define MCDE_DSIVID1CONF0_VID_MODE(__x) \
+	MCDE_VAL2REG(MCDE_DSIVID1CONF0, VID_MODE, __x)
+#define MCDE_DSIVID1CONF0_CMD8_SHIFT 13
+#define MCDE_DSIVID1CONF0_CMD8_MASK 0x00002000
+#define MCDE_DSIVID1CONF0_CMD8(__x) \
+	MCDE_VAL2REG(MCDE_DSIVID1CONF0, CMD8, __x)
+#define MCDE_DSIVID1CONF0_BIT_SWAP_SHIFT 16
+#define MCDE_DSIVID1CONF0_BIT_SWAP_MASK 0x00010000
+#define MCDE_DSIVID1CONF0_BIT_SWAP(__x) \
+	MCDE_VAL2REG(MCDE_DSIVID1CONF0, BIT_SWAP, __x)
+#define MCDE_DSIVID1CONF0_BYTE_SWAP_SHIFT 17
+#define MCDE_DSIVID1CONF0_BYTE_SWAP_MASK 0x00020000
+#define MCDE_DSIVID1CONF0_BYTE_SWAP(__x) \
+	MCDE_VAL2REG(MCDE_DSIVID1CONF0, BYTE_SWAP, __x)
+#define MCDE_DSIVID1CONF0_DCSVID_NOTGEN_SHIFT 18
+#define MCDE_DSIVID1CONF0_DCSVID_NOTGEN_MASK 0x00040000
+#define MCDE_DSIVID1CONF0_DCSVID_NOTGEN(__x) \
+	MCDE_VAL2REG(MCDE_DSIVID1CONF0, DCSVID_NOTGEN, __x)
+#define MCDE_DSIVID1CONF0_PACKING_SHIFT 20
+#define MCDE_DSIVID1CONF0_PACKING_MASK 0x00700000
+#define MCDE_DSIVID1CONF0_PACKING_RGB565 0
+#define MCDE_DSIVID1CONF0_PACKING_RGB666 1
+#define MCDE_DSIVID1CONF0_PACKING_RGB888 2
+#define MCDE_DSIVID1CONF0_PACKING_BGR888 3
+#define MCDE_DSIVID1CONF0_PACKING_HDTV 4
+#define MCDE_DSIVID1CONF0_PACKING_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_DSIVID1CONF0, PACKING, \
+	MCDE_DSIVID1CONF0_PACKING_##__x)
+#define MCDE_DSIVID1CONF0_PACKING(__x) \
+	MCDE_VAL2REG(MCDE_DSIVID1CONF0, PACKING, __x)
+#define MCDE_DSICMD1CONF0 0x00000E60
+#define MCDE_DSICMD1CONF0_BLANKING_SHIFT 0
+#define MCDE_DSICMD1CONF0_BLANKING_MASK 0x000000FF
+#define MCDE_DSICMD1CONF0_BLANKING(__x) \
+	MCDE_VAL2REG(MCDE_DSICMD1CONF0, BLANKING, __x)
+#define MCDE_DSICMD1CONF0_VID_MODE_SHIFT 12
+#define MCDE_DSICMD1CONF0_VID_MODE_MASK 0x00001000
+#define MCDE_DSICMD1CONF0_VID_MODE_CMD 0
+#define MCDE_DSICMD1CONF0_VID_MODE_VID 1
+#define MCDE_DSICMD1CONF0_VID_MODE_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_DSICMD1CONF0, VID_MODE, \
+	MCDE_DSICMD1CONF0_VID_MODE_##__x)
+#define MCDE_DSICMD1CONF0_VID_MODE(__x) \
+	MCDE_VAL2REG(MCDE_DSICMD1CONF0, VID_MODE, __x)
+#define MCDE_DSICMD1CONF0_CMD8_SHIFT 13
+#define MCDE_DSICMD1CONF0_CMD8_MASK 0x00002000
+#define MCDE_DSICMD1CONF0_CMD8(__x) \
+	MCDE_VAL2REG(MCDE_DSICMD1CONF0, CMD8, __x)
+#define MCDE_DSICMD1CONF0_BIT_SWAP_SHIFT 16
+#define MCDE_DSICMD1CONF0_BIT_SWAP_MASK 0x00010000
+#define MCDE_DSICMD1CONF0_BIT_SWAP(__x) \
+	MCDE_VAL2REG(MCDE_DSICMD1CONF0, BIT_SWAP, __x)
+#define MCDE_DSICMD1CONF0_BYTE_SWAP_SHIFT 17
+#define MCDE_DSICMD1CONF0_BYTE_SWAP_MASK 0x00020000
+#define MCDE_DSICMD1CONF0_BYTE_SWAP(__x) \
+	MCDE_VAL2REG(MCDE_DSICMD1CONF0, BYTE_SWAP, __x)
+#define MCDE_DSICMD1CONF0_DCSVID_NOTGEN_SHIFT 18
+#define MCDE_DSICMD1CONF0_DCSVID_NOTGEN_MASK 0x00040000
+#define MCDE_DSICMD1CONF0_DCSVID_NOTGEN(__x) \
+	MCDE_VAL2REG(MCDE_DSICMD1CONF0, DCSVID_NOTGEN, __x)
+#define MCDE_DSICMD1CONF0_PACKING_SHIFT 20
+#define MCDE_DSICMD1CONF0_PACKING_MASK 0x00700000
+#define MCDE_DSICMD1CONF0_PACKING_RGB565 0
+#define MCDE_DSICMD1CONF0_PACKING_RGB666 1
+#define MCDE_DSICMD1CONF0_PACKING_RGB888 2
+#define MCDE_DSICMD1CONF0_PACKING_BGR888 3
+#define MCDE_DSICMD1CONF0_PACKING_HDTV 4
+#define MCDE_DSICMD1CONF0_PACKING_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_DSICMD1CONF0, PACKING, \
+	MCDE_DSICMD1CONF0_PACKING_##__x)
+#define MCDE_DSICMD1CONF0_PACKING(__x) \
+	MCDE_VAL2REG(MCDE_DSICMD1CONF0, PACKING, __x)
+#define MCDE_DSIVID2CONF0 0x00000E80
+#define MCDE_DSIVID2CONF0_BLANKING_SHIFT 0
+#define MCDE_DSIVID2CONF0_BLANKING_MASK 0x000000FF
+#define MCDE_DSIVID2CONF0_BLANKING(__x) \
+	MCDE_VAL2REG(MCDE_DSIVID2CONF0, BLANKING, __x)
+#define MCDE_DSIVID2CONF0_VID_MODE_SHIFT 12
+#define MCDE_DSIVID2CONF0_VID_MODE_MASK 0x00001000
+#define MCDE_DSIVID2CONF0_VID_MODE_CMD 0
+#define MCDE_DSIVID2CONF0_VID_MODE_VID 1
+#define MCDE_DSIVID2CONF0_VID_MODE_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_DSIVID2CONF0, VID_MODE, \
+	MCDE_DSIVID2CONF0_VID_MODE_##__x)
+#define MCDE_DSIVID2CONF0_VID_MODE(__x) \
+	MCDE_VAL2REG(MCDE_DSIVID2CONF0, VID_MODE, __x)
+#define MCDE_DSIVID2CONF0_CMD8_SHIFT 13
+#define MCDE_DSIVID2CONF0_CMD8_MASK 0x00002000
+#define MCDE_DSIVID2CONF0_CMD8(__x) \
+	MCDE_VAL2REG(MCDE_DSIVID2CONF0, CMD8, __x)
+#define MCDE_DSIVID2CONF0_BIT_SWAP_SHIFT 16
+#define MCDE_DSIVID2CONF0_BIT_SWAP_MASK 0x00010000
+#define MCDE_DSIVID2CONF0_BIT_SWAP(__x) \
+	MCDE_VAL2REG(MCDE_DSIVID2CONF0, BIT_SWAP, __x)
+#define MCDE_DSIVID2CONF0_BYTE_SWAP_SHIFT 17
+#define MCDE_DSIVID2CONF0_BYTE_SWAP_MASK 0x00020000
+#define MCDE_DSIVID2CONF0_BYTE_SWAP(__x) \
+	MCDE_VAL2REG(MCDE_DSIVID2CONF0, BYTE_SWAP, __x)
+#define MCDE_DSIVID2CONF0_DCSVID_NOTGEN_SHIFT 18
+#define MCDE_DSIVID2CONF0_DCSVID_NOTGEN_MASK 0x00040000
+#define MCDE_DSIVID2CONF0_DCSVID_NOTGEN(__x) \
+	MCDE_VAL2REG(MCDE_DSIVID2CONF0, DCSVID_NOTGEN, __x)
+#define MCDE_DSIVID2CONF0_PACKING_SHIFT 20
+#define MCDE_DSIVID2CONF0_PACKING_MASK 0x00700000
+#define MCDE_DSIVID2CONF0_PACKING_RGB565 0
+#define MCDE_DSIVID2CONF0_PACKING_RGB666 1
+#define MCDE_DSIVID2CONF0_PACKING_RGB888 2
+#define MCDE_DSIVID2CONF0_PACKING_BGR888 3
+#define MCDE_DSIVID2CONF0_PACKING_HDTV 4
+#define MCDE_DSIVID2CONF0_PACKING_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_DSIVID2CONF0, PACKING, \
+	MCDE_DSIVID2CONF0_PACKING_##__x)
+#define MCDE_DSIVID2CONF0_PACKING(__x) \
+	MCDE_VAL2REG(MCDE_DSIVID2CONF0, PACKING, __x)
+#define MCDE_DSICMD2CONF0 0x00000EA0
+#define MCDE_DSICMD2CONF0_BLANKING_SHIFT 0
+#define MCDE_DSICMD2CONF0_BLANKING_MASK 0x000000FF
+#define MCDE_DSICMD2CONF0_BLANKING(__x) \
+	MCDE_VAL2REG(MCDE_DSICMD2CONF0, BLANKING, __x)
+#define MCDE_DSICMD2CONF0_VID_MODE_SHIFT 12
+#define MCDE_DSICMD2CONF0_VID_MODE_MASK 0x00001000
+#define MCDE_DSICMD2CONF0_VID_MODE_CMD 0
+#define MCDE_DSICMD2CONF0_VID_MODE_VID 1
+#define MCDE_DSICMD2CONF0_VID_MODE_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_DSICMD2CONF0, VID_MODE, \
+	MCDE_DSICMD2CONF0_VID_MODE_##__x)
+#define MCDE_DSICMD2CONF0_VID_MODE(__x) \
+	MCDE_VAL2REG(MCDE_DSICMD2CONF0, VID_MODE, __x)
+#define MCDE_DSICMD2CONF0_CMD8_SHIFT 13
+#define MCDE_DSICMD2CONF0_CMD8_MASK 0x00002000
+#define MCDE_DSICMD2CONF0_CMD8(__x) \
+	MCDE_VAL2REG(MCDE_DSICMD2CONF0, CMD8, __x)
+#define MCDE_DSICMD2CONF0_BIT_SWAP_SHIFT 16
+#define MCDE_DSICMD2CONF0_BIT_SWAP_MASK 0x00010000
+#define MCDE_DSICMD2CONF0_BIT_SWAP(__x) \
+	MCDE_VAL2REG(MCDE_DSICMD2CONF0, BIT_SWAP, __x)
+#define MCDE_DSICMD2CONF0_BYTE_SWAP_SHIFT 17
+#define MCDE_DSICMD2CONF0_BYTE_SWAP_MASK 0x00020000
+#define MCDE_DSICMD2CONF0_BYTE_SWAP(__x) \
+	MCDE_VAL2REG(MCDE_DSICMD2CONF0, BYTE_SWAP, __x)
+#define MCDE_DSICMD2CONF0_DCSVID_NOTGEN_SHIFT 18
+#define MCDE_DSICMD2CONF0_DCSVID_NOTGEN_MASK 0x00040000
+#define MCDE_DSICMD2CONF0_DCSVID_NOTGEN(__x) \
+	MCDE_VAL2REG(MCDE_DSICMD2CONF0, DCSVID_NOTGEN, __x)
+#define MCDE_DSICMD2CONF0_PACKING_SHIFT 20
+#define MCDE_DSICMD2CONF0_PACKING_MASK 0x00700000
+#define MCDE_DSICMD2CONF0_PACKING_RGB565 0
+#define MCDE_DSICMD2CONF0_PACKING_RGB666 1
+#define MCDE_DSICMD2CONF0_PACKING_RGB888 2
+#define MCDE_DSICMD2CONF0_PACKING_BGR888 3
+#define MCDE_DSICMD2CONF0_PACKING_HDTV 4
+#define MCDE_DSICMD2CONF0_PACKING_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_DSICMD2CONF0, PACKING, \
+	MCDE_DSICMD2CONF0_PACKING_##__x)
+#define MCDE_DSICMD2CONF0_PACKING(__x) \
+	MCDE_VAL2REG(MCDE_DSICMD2CONF0, PACKING, __x)
+#define MCDE_DSIVID0FRAME 0x00000E04
+#define MCDE_DSIVID0FRAME_GROUPOFFSET 0x20
+#define MCDE_DSIVID0FRAME_FRAME_SHIFT 0
+#define MCDE_DSIVID0FRAME_FRAME_MASK 0x00FFFFFF
+#define MCDE_DSIVID0FRAME_FRAME(__x) \
+	MCDE_VAL2REG(MCDE_DSIVID0FRAME, FRAME, __x)
+#define MCDE_DSICMD0FRAME 0x00000E24
+#define MCDE_DSICMD0FRAME_FRAME_SHIFT 0
+#define MCDE_DSICMD0FRAME_FRAME_MASK 0x00FFFFFF
+#define MCDE_DSICMD0FRAME_FRAME(__x) \
+	MCDE_VAL2REG(MCDE_DSICMD0FRAME, FRAME, __x)
+#define MCDE_DSIVID1FRAME 0x00000E44
+#define MCDE_DSIVID1FRAME_FRAME_SHIFT 0
+#define MCDE_DSIVID1FRAME_FRAME_MASK 0x00FFFFFF
+#define MCDE_DSIVID1FRAME_FRAME(__x) \
+	MCDE_VAL2REG(MCDE_DSIVID1FRAME, FRAME, __x)
+#define MCDE_DSICMD1FRAME 0x00000E64
+#define MCDE_DSICMD1FRAME_FRAME_SHIFT 0
+#define MCDE_DSICMD1FRAME_FRAME_MASK 0x00FFFFFF
+#define MCDE_DSICMD1FRAME_FRAME(__x) \
+	MCDE_VAL2REG(MCDE_DSICMD1FRAME, FRAME, __x)
+#define MCDE_DSIVID2FRAME 0x00000E84
+#define MCDE_DSIVID2FRAME_FRAME_SHIFT 0
+#define MCDE_DSIVID2FRAME_FRAME_MASK 0x00FFFFFF
+#define MCDE_DSIVID2FRAME_FRAME(__x) \
+	MCDE_VAL2REG(MCDE_DSIVID2FRAME, FRAME, __x)
+#define MCDE_DSICMD2FRAME 0x00000EA4
+#define MCDE_DSICMD2FRAME_FRAME_SHIFT 0
+#define MCDE_DSICMD2FRAME_FRAME_MASK 0x00FFFFFF
+#define MCDE_DSICMD2FRAME_FRAME(__x) \
+	MCDE_VAL2REG(MCDE_DSICMD2FRAME, FRAME, __x)
+#define MCDE_DSIVID0PKT 0x00000E08
+#define MCDE_DSIVID0PKT_GROUPOFFSET 0x20
+#define MCDE_DSIVID0PKT_PACKET_SHIFT 0
+#define MCDE_DSIVID0PKT_PACKET_MASK 0x0000FFFF
+#define MCDE_DSIVID0PKT_PACKET(__x) \
+	MCDE_VAL2REG(MCDE_DSIVID0PKT, PACKET, __x)
+#define MCDE_DSICMD0PKT 0x00000E28
+#define MCDE_DSICMD0PKT_PACKET_SHIFT 0
+#define MCDE_DSICMD0PKT_PACKET_MASK 0x0000FFFF
+#define MCDE_DSICMD0PKT_PACKET(__x) \
+	MCDE_VAL2REG(MCDE_DSICMD0PKT, PACKET, __x)
+#define MCDE_DSIVID1PKT 0x00000E48
+#define MCDE_DSIVID1PKT_PACKET_SHIFT 0
+#define MCDE_DSIVID1PKT_PACKET_MASK 0x0000FFFF
+#define MCDE_DSIVID1PKT_PACKET(__x) \
+	MCDE_VAL2REG(MCDE_DSIVID1PKT, PACKET, __x)
+#define MCDE_DSICMD1PKT 0x00000E68
+#define MCDE_DSICMD1PKT_PACKET_SHIFT 0
+#define MCDE_DSICMD1PKT_PACKET_MASK 0x0000FFFF
+#define MCDE_DSICMD1PKT_PACKET(__x) \
+	MCDE_VAL2REG(MCDE_DSICMD1PKT, PACKET, __x)
+#define MCDE_DSIVID2PKT 0x00000E88
+#define MCDE_DSIVID2PKT_PACKET_SHIFT 0
+#define MCDE_DSIVID2PKT_PACKET_MASK 0x0000FFFF
+#define MCDE_DSIVID2PKT_PACKET(__x) \
+	MCDE_VAL2REG(MCDE_DSIVID2PKT, PACKET, __x)
+#define MCDE_DSICMD2PKT 0x00000EA8
+#define MCDE_DSICMD2PKT_PACKET_SHIFT 0
+#define MCDE_DSICMD2PKT_PACKET_MASK 0x0000FFFF
+#define MCDE_DSICMD2PKT_PACKET(__x) \
+	MCDE_VAL2REG(MCDE_DSICMD2PKT, PACKET, __x)
+#define MCDE_DSIVID0SYNC 0x00000E0C
+#define MCDE_DSIVID0SYNC_GROUPOFFSET 0x20
+#define MCDE_DSIVID0SYNC_DMA_SHIFT 0
+#define MCDE_DSIVID0SYNC_DMA_MASK 0x00000FFF
+#define MCDE_DSIVID0SYNC_DMA(__x) \
+	MCDE_VAL2REG(MCDE_DSIVID0SYNC, DMA, __x)
+#define MCDE_DSIVID0SYNC_SW_SHIFT 16
+#define MCDE_DSIVID0SYNC_SW_MASK 0x0FFF0000
+#define MCDE_DSIVID0SYNC_SW(__x) \
+	MCDE_VAL2REG(MCDE_DSIVID0SYNC, SW, __x)
+#define MCDE_DSICMD0SYNC 0x00000E2C
+#define MCDE_DSICMD0SYNC_DMA_SHIFT 0
+#define MCDE_DSICMD0SYNC_DMA_MASK 0x00000FFF
+#define MCDE_DSICMD0SYNC_DMA(__x) \
+	MCDE_VAL2REG(MCDE_DSICMD0SYNC, DMA, __x)
+#define MCDE_DSICMD0SYNC_SW_SHIFT 16
+#define MCDE_DSICMD0SYNC_SW_MASK 0x0FFF0000
+#define MCDE_DSICMD0SYNC_SW(__x) \
+	MCDE_VAL2REG(MCDE_DSICMD0SYNC, SW, __x)
+#define MCDE_DSIVID1SYNC 0x00000E4C
+#define MCDE_DSIVID1SYNC_DMA_SHIFT 0
+#define MCDE_DSIVID1SYNC_DMA_MASK 0x00000FFF
+#define MCDE_DSIVID1SYNC_DMA(__x) \
+	MCDE_VAL2REG(MCDE_DSIVID1SYNC, DMA, __x)
+#define MCDE_DSIVID1SYNC_SW_SHIFT 16
+#define MCDE_DSIVID1SYNC_SW_MASK 0x0FFF0000
+#define MCDE_DSIVID1SYNC_SW(__x) \
+	MCDE_VAL2REG(MCDE_DSIVID1SYNC, SW, __x)
+#define MCDE_DSICMD1SYNC 0x00000E6C
+#define MCDE_DSICMD1SYNC_DMA_SHIFT 0
+#define MCDE_DSICMD1SYNC_DMA_MASK 0x00000FFF
+#define MCDE_DSICMD1SYNC_DMA(__x) \
+	MCDE_VAL2REG(MCDE_DSICMD1SYNC, DMA, __x)
+#define MCDE_DSICMD1SYNC_SW_SHIFT 16
+#define MCDE_DSICMD1SYNC_SW_MASK 0x0FFF0000
+#define MCDE_DSICMD1SYNC_SW(__x) \
+	MCDE_VAL2REG(MCDE_DSICMD1SYNC, SW, __x)
+#define MCDE_DSIVID2SYNC 0x00000E8C
+#define MCDE_DSIVID2SYNC_DMA_SHIFT 0
+#define MCDE_DSIVID2SYNC_DMA_MASK 0x00000FFF
+#define MCDE_DSIVID2SYNC_DMA(__x) \
+	MCDE_VAL2REG(MCDE_DSIVID2SYNC, DMA, __x)
+#define MCDE_DSIVID2SYNC_SW_SHIFT 16
+#define MCDE_DSIVID2SYNC_SW_MASK 0x0FFF0000
+#define MCDE_DSIVID2SYNC_SW(__x) \
+	MCDE_VAL2REG(MCDE_DSIVID2SYNC, SW, __x)
+#define MCDE_DSICMD2SYNC 0x00000EAC
+#define MCDE_DSICMD2SYNC_DMA_SHIFT 0
+#define MCDE_DSICMD2SYNC_DMA_MASK 0x00000FFF
+#define MCDE_DSICMD2SYNC_DMA(__x) \
+	MCDE_VAL2REG(MCDE_DSICMD2SYNC, DMA, __x)
+#define MCDE_DSICMD2SYNC_SW_SHIFT 16
+#define MCDE_DSICMD2SYNC_SW_MASK 0x0FFF0000
+#define MCDE_DSICMD2SYNC_SW(__x) \
+	MCDE_VAL2REG(MCDE_DSICMD2SYNC, SW, __x)
+#define MCDE_DSIVID0CMDW 0x00000E10
+#define MCDE_DSIVID0CMDW_GROUPOFFSET 0x20
+#define MCDE_DSIVID0CMDW_CMDW_CONTINUE_SHIFT 0
+#define MCDE_DSIVID0CMDW_CMDW_CONTINUE_MASK 0x0000FFFF
+#define MCDE_DSIVID0CMDW_CMDW_CONTINUE(__x) \
+	MCDE_VAL2REG(MCDE_DSIVID0CMDW, CMDW_CONTINUE, __x)
+#define MCDE_DSIVID0CMDW_CMDW_START_SHIFT 16
+#define MCDE_DSIVID0CMDW_CMDW_START_MASK 0xFFFF0000
+#define MCDE_DSIVID0CMDW_CMDW_START(__x) \
+	MCDE_VAL2REG(MCDE_DSIVID0CMDW, CMDW_START, __x)
+#define MCDE_DSICMD0CMDW 0x00000E30
+#define MCDE_DSICMD0CMDW_CMDW_CONTINUE_SHIFT 0
+#define MCDE_DSICMD0CMDW_CMDW_CONTINUE_MASK 0x0000FFFF
+#define MCDE_DSICMD0CMDW_CMDW_CONTINUE(__x) \
+	MCDE_VAL2REG(MCDE_DSICMD0CMDW, CMDW_CONTINUE, __x)
+#define MCDE_DSICMD0CMDW_CMDW_START_SHIFT 16
+#define MCDE_DSICMD0CMDW_CMDW_START_MASK 0xFFFF0000
+#define MCDE_DSICMD0CMDW_CMDW_START(__x) \
+	MCDE_VAL2REG(MCDE_DSICMD0CMDW, CMDW_START, __x)
+#define MCDE_DSIVID1CMDW 0x00000E50
+#define MCDE_DSIVID1CMDW_CMDW_CONTINUE_SHIFT 0
+#define MCDE_DSIVID1CMDW_CMDW_CONTINUE_MASK 0x0000FFFF
+#define MCDE_DSIVID1CMDW_CMDW_CONTINUE(__x) \
+	MCDE_VAL2REG(MCDE_DSIVID1CMDW, CMDW_CONTINUE, __x)
+#define MCDE_DSIVID1CMDW_CMDW_START_SHIFT 16
+#define MCDE_DSIVID1CMDW_CMDW_START_MASK 0xFFFF0000
+#define MCDE_DSIVID1CMDW_CMDW_START(__x) \
+	MCDE_VAL2REG(MCDE_DSIVID1CMDW, CMDW_START, __x)
+#define MCDE_DSICMD1CMDW 0x00000E70
+#define MCDE_DSICMD1CMDW_CMDW_CONTINUE_SHIFT 0
+#define MCDE_DSICMD1CMDW_CMDW_CONTINUE_MASK 0x0000FFFF
+#define MCDE_DSICMD1CMDW_CMDW_CONTINUE(__x) \
+	MCDE_VAL2REG(MCDE_DSICMD1CMDW, CMDW_CONTINUE, __x)
+#define MCDE_DSICMD1CMDW_CMDW_START_SHIFT 16
+#define MCDE_DSICMD1CMDW_CMDW_START_MASK 0xFFFF0000
+#define MCDE_DSICMD1CMDW_CMDW_START(__x) \
+	MCDE_VAL2REG(MCDE_DSICMD1CMDW, CMDW_START, __x)
+#define MCDE_DSIVID2CMDW 0x00000E90
+#define MCDE_DSIVID2CMDW_CMDW_CONTINUE_SHIFT 0
+#define MCDE_DSIVID2CMDW_CMDW_CONTINUE_MASK 0x0000FFFF
+#define MCDE_DSIVID2CMDW_CMDW_CONTINUE(__x) \
+	MCDE_VAL2REG(MCDE_DSIVID2CMDW, CMDW_CONTINUE, __x)
+#define MCDE_DSIVID2CMDW_CMDW_START_SHIFT 16
+#define MCDE_DSIVID2CMDW_CMDW_START_MASK 0xFFFF0000
+#define MCDE_DSIVID2CMDW_CMDW_START(__x) \
+	MCDE_VAL2REG(MCDE_DSIVID2CMDW, CMDW_START, __x)
+#define MCDE_DSICMD2CMDW 0x00000EB0
+#define MCDE_DSICMD2CMDW_CMDW_CONTINUE_SHIFT 0
+#define MCDE_DSICMD2CMDW_CMDW_CONTINUE_MASK 0x0000FFFF
+#define MCDE_DSICMD2CMDW_CMDW_CONTINUE(__x) \
+	MCDE_VAL2REG(MCDE_DSICMD2CMDW, CMDW_CONTINUE, __x)
+#define MCDE_DSICMD2CMDW_CMDW_START_SHIFT 16
+#define MCDE_DSICMD2CMDW_CMDW_START_MASK 0xFFFF0000
+#define MCDE_DSICMD2CMDW_CMDW_START(__x) \
+	MCDE_VAL2REG(MCDE_DSICMD2CMDW, CMDW_START, __x)
+#define MCDE_DSIVID0DELAY0 0x00000E14
+#define MCDE_DSIVID0DELAY0_GROUPOFFSET 0x20
+#define MCDE_DSIVID0DELAY0_INTPKTDEL_SHIFT 0
+#define MCDE_DSIVID0DELAY0_INTPKTDEL_MASK 0x0000FFFF
+#define MCDE_DSIVID0DELAY0_INTPKTDEL(__x) \
+	MCDE_VAL2REG(MCDE_DSIVID0DELAY0, INTPKTDEL, __x)
+#define MCDE_DSICMD0DELAY0 0x00000E34
+#define MCDE_DSICMD0DELAY0_INTPKTDEL_SHIFT 0
+#define MCDE_DSICMD0DELAY0_INTPKTDEL_MASK 0x0000FFFF
+#define MCDE_DSICMD0DELAY0_INTPKTDEL(__x) \
+	MCDE_VAL2REG(MCDE_DSICMD0DELAY0, INTPKTDEL, __x)
+#define MCDE_DSIVID1DELAY0 0x00000E54
+#define MCDE_DSIVID1DELAY0_INTPKTDEL_SHIFT 0
+#define MCDE_DSIVID1DELAY0_INTPKTDEL_MASK 0x0000FFFF
+#define MCDE_DSIVID1DELAY0_INTPKTDEL(__x) \
+	MCDE_VAL2REG(MCDE_DSIVID1DELAY0, INTPKTDEL, __x)
+#define MCDE_DSICMD1DELAY0 0x00000E74
+#define MCDE_DSICMD1DELAY0_INTPKTDEL_SHIFT 0
+#define MCDE_DSICMD1DELAY0_INTPKTDEL_MASK 0x0000FFFF
+#define MCDE_DSICMD1DELAY0_INTPKTDEL(__x) \
+	MCDE_VAL2REG(MCDE_DSICMD1DELAY0, INTPKTDEL, __x)
+#define MCDE_DSIVID2DELAY0 0x00000E94
+#define MCDE_DSIVID2DELAY0_INTPKTDEL_SHIFT 0
+#define MCDE_DSIVID2DELAY0_INTPKTDEL_MASK 0x0000FFFF
+#define MCDE_DSIVID2DELAY0_INTPKTDEL(__x) \
+	MCDE_VAL2REG(MCDE_DSIVID2DELAY0, INTPKTDEL, __x)
+#define MCDE_DSICMD2DELAY0 0x00000EB4
+#define MCDE_DSICMD2DELAY0_INTPKTDEL_SHIFT 0
+#define MCDE_DSICMD2DELAY0_INTPKTDEL_MASK 0x0000FFFF
+#define MCDE_DSICMD2DELAY0_INTPKTDEL(__x) \
+	MCDE_VAL2REG(MCDE_DSICMD2DELAY0, INTPKTDEL, __x)
+#define MCDE_DSIVID0DELAY1 0x00000E18
+#define MCDE_DSIVID0DELAY1_GROUPOFFSET 0x20
+#define MCDE_DSIVID0DELAY1_TEREQDEL_SHIFT 0
+#define MCDE_DSIVID0DELAY1_TEREQDEL_MASK 0x00000FFF
+#define MCDE_DSIVID0DELAY1_TEREQDEL(__x) \
+	MCDE_VAL2REG(MCDE_DSIVID0DELAY1, TEREQDEL, __x)
+#define MCDE_DSIVID0DELAY1_FRAMESTARTDEL_SHIFT 16
+#define MCDE_DSIVID0DELAY1_FRAMESTARTDEL_MASK 0x00FF0000
+#define MCDE_DSIVID0DELAY1_FRAMESTARTDEL(__x) \
+	MCDE_VAL2REG(MCDE_DSIVID0DELAY1, FRAMESTARTDEL, __x)
+#define MCDE_DSICMD0DELAY1 0x00000E38
+#define MCDE_DSICMD0DELAY1_TEREQDEL_SHIFT 0
+#define MCDE_DSICMD0DELAY1_TEREQDEL_MASK 0x00000FFF
+#define MCDE_DSICMD0DELAY1_TEREQDEL(__x) \
+	MCDE_VAL2REG(MCDE_DSICMD0DELAY1, TEREQDEL, __x)
+#define MCDE_DSICMD0DELAY1_FRAMESTARTDEL_SHIFT 16
+#define MCDE_DSICMD0DELAY1_FRAMESTARTDEL_MASK 0x00FF0000
+#define MCDE_DSICMD0DELAY1_FRAMESTARTDEL(__x) \
+	MCDE_VAL2REG(MCDE_DSICMD0DELAY1, FRAMESTARTDEL, __x)
+#define MCDE_DSIVID1DELAY1 0x00000E58
+#define MCDE_DSIVID1DELAY1_TEREQDEL_SHIFT 0
+#define MCDE_DSIVID1DELAY1_TEREQDEL_MASK 0x00000FFF
+#define MCDE_DSIVID1DELAY1_TEREQDEL(__x) \
+	MCDE_VAL2REG(MCDE_DSIVID1DELAY1, TEREQDEL, __x)
+#define MCDE_DSIVID1DELAY1_FRAMESTARTDEL_SHIFT 16
+#define MCDE_DSIVID1DELAY1_FRAMESTARTDEL_MASK 0x00FF0000
+#define MCDE_DSIVID1DELAY1_FRAMESTARTDEL(__x) \
+	MCDE_VAL2REG(MCDE_DSIVID1DELAY1, FRAMESTARTDEL, __x)
+#define MCDE_DSICMD1DELAY1 0x00000E78
+#define MCDE_DSICMD1DELAY1_TEREQDEL_SHIFT 0
+#define MCDE_DSICMD1DELAY1_TEREQDEL_MASK 0x00000FFF
+#define MCDE_DSICMD1DELAY1_TEREQDEL(__x) \
+	MCDE_VAL2REG(MCDE_DSICMD1DELAY1, TEREQDEL, __x)
+#define MCDE_DSICMD1DELAY1_FRAMESTARTDEL_SHIFT 16
+#define MCDE_DSICMD1DELAY1_FRAMESTARTDEL_MASK 0x00FF0000
+#define MCDE_DSICMD1DELAY1_FRAMESTARTDEL(__x) \
+	MCDE_VAL2REG(MCDE_DSICMD1DELAY1, FRAMESTARTDEL, __x)
+#define MCDE_DSIVID2DELAY1 0x00000E98
+#define MCDE_DSIVID2DELAY1_TEREQDEL_SHIFT 0
+#define MCDE_DSIVID2DELAY1_TEREQDEL_MASK 0x00000FFF
+#define MCDE_DSIVID2DELAY1_TEREQDEL(__x) \
+	MCDE_VAL2REG(MCDE_DSIVID2DELAY1, TEREQDEL, __x)
+#define MCDE_DSIVID2DELAY1_FRAMESTARTDEL_SHIFT 16
+#define MCDE_DSIVID2DELAY1_FRAMESTARTDEL_MASK 0x00FF0000
+#define MCDE_DSIVID2DELAY1_FRAMESTARTDEL(__x) \
+	MCDE_VAL2REG(MCDE_DSIVID2DELAY1, FRAMESTARTDEL, __x)
+#define MCDE_DSICMD2DELAY1 0x00000EB8
+#define MCDE_DSICMD2DELAY1_TEREQDEL_SHIFT 0
+#define MCDE_DSICMD2DELAY1_TEREQDEL_MASK 0x00000FFF
+#define MCDE_DSICMD2DELAY1_TEREQDEL(__x) \
+	MCDE_VAL2REG(MCDE_DSICMD2DELAY1, TEREQDEL, __x)
+#define MCDE_DSICMD2DELAY1_FRAMESTARTDEL_SHIFT 16
+#define MCDE_DSICMD2DELAY1_FRAMESTARTDEL_MASK 0x00FF0000
+#define MCDE_DSICMD2DELAY1_FRAMESTARTDEL(__x) \
+	MCDE_VAL2REG(MCDE_DSICMD2DELAY1, FRAMESTARTDEL, __x)
-- 
cgit v1.2.3


From aaab20c549dcdcd3b2caeb357579506995386fa4 Mon Sep 17 00:00:00 2001
From: "Mathieu J. Poirier" <mathieu.poirier@linaro.org>
Date: Wed, 30 Mar 2011 14:52:57 -0600
Subject: Moving from ioctl to unlocked_ioctl in av8100

 av8100.c: Simply re-using av8100_ioctl()
 hdmi.c: Following other drivers conversion to unlocked_ioctl

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
---
 drivers/video/av8100/av8100.c |  9 ++++-----
 drivers/video/av8100/hdmi.c   | 18 +++++++++++++++---
 2 files changed, 19 insertions(+), 8 deletions(-)

diff --git a/drivers/video/av8100/av8100.c b/drivers/video/av8100/av8100.c
index 6bacded36df..3bb3e08a724 100644
--- a/drivers/video/av8100/av8100.c
+++ b/drivers/video/av8100/av8100.c
@@ -252,8 +252,8 @@ static const struct color_conversion_cmd *get_color_transform_cmd(
 				enum av8100_color_transform transform);
 static int av8100_open(struct inode *inode, struct file *filp);
 static int av8100_release(struct inode *inode, struct file *filp);
-static int av8100_ioctl(struct inode *inode, struct file *file,
-	unsigned int cmd, unsigned long arg);
+static long av8100_ioctl(struct file *file,
+				unsigned int cmd, unsigned long arg);
 static int __devinit av8100_probe(struct i2c_client *i2cClient,
 	const struct i2c_device_id *id);
 static int __devexit av8100_remove(struct i2c_client *i2cClient);
@@ -272,8 +272,7 @@ static const struct file_operations av8100_fops = {
 	.owner =    THIS_MODULE,
 	.open =     av8100_open,
 	.release =  av8100_release,
-	//.ioctl is no longer in use - needs fixing
-	//.ioctl = av8100_ioctl
+	.unlocked_ioctl = av8100_ioctl
 };
 
 static struct miscdevice av8100_miscdev = {
@@ -3475,7 +3474,7 @@ static int av8100_release(struct inode *inode, struct file *filp)
 	return 0;
 }
 
-static int av8100_ioctl(struct inode *inode, struct file *file,
+static long av8100_ioctl(struct file *file,
 				unsigned int cmd, unsigned long arg)
 {
 	return 0;
diff --git a/drivers/video/av8100/hdmi.c b/drivers/video/av8100/hdmi.c
index 0c7468a09a1..66ba66769b8 100644
--- a/drivers/video/av8100/hdmi.c
+++ b/drivers/video/av8100/hdmi.c
@@ -23,6 +23,7 @@
 #include "hdmi_loc.h"
 #include <linux/slab.h>
 #include <linux/sched.h>
+#include <linux/smp_lock.h>
 
 #define SYSFS_EVENT_FILENAME "evread"
 
@@ -1633,7 +1634,7 @@ static int hdmi_release(struct inode *inode, struct file *filp)
 }
 
 /* ioctl */
-static int hdmi_ioctl(struct inode *inode, struct file *file,
+static int hdmi_ioctl(struct file *file,
 		       unsigned int cmd, unsigned long arg)
 {
 	u8 value = 0;
@@ -2025,6 +2026,18 @@ ioc_hdcploadaes_err:
 	return 0;
 }
 
+static long hdmi_unlocked_ioctl(struct file *file, unsigned int cmd, 
+							unsigned long arg)
+{
+	int ret;
+
+	lock_kernel();
+	ret = hdmi_ioctl(file, cmd, arg);
+	unlock_kernel();
+
+	return ret;
+}
+
 static unsigned int
 hdmi_poll(struct file *filp, poll_table *wait)
 {
@@ -2048,8 +2061,7 @@ static const struct file_operations hdmi_fops = {
 	.owner =    THIS_MODULE,
 	.open =     hdmi_open,
 	.release =  hdmi_release,
-	//.ioctl is no longer in use - needs fixing
-	//.ioctl = hdmi_ioctl,
+	.unlocked_ioctl = hdmi_unlocked_ioctl,
 	.poll = hdmi_poll
 };
 
-- 
cgit v1.2.3


From d6b1fbfda432275bef4a616593ab30c37b1f60e7 Mon Sep 17 00:00:00 2001
From: Philippe Langlais <philippe.langlais@stericsson.com>
Date: Tue, 11 Oct 2011 11:27:54 +0200
Subject: mcde: mach-ux500: boards merge from GLK 2.6.35

Signed-off-by: Philippe Langlais <philippe.langlais@stericsson.com>
---
 arch/arm/mach-ux500/mcde.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-ux500/mcde.c b/arch/arm/mach-ux500/mcde.c
index fe3b80f0961..e3514d1761b 100644
--- a/arch/arm/mach-ux500/mcde.c
+++ b/arch/arm/mach-ux500/mcde.c
@@ -53,12 +53,12 @@ static struct resource mcde_resources[] = {
 
 static int mcde_platform_enable(void)
 {
-	return prcmu_enable_mcde();
+	return prcmu_enable_dsipll();
 }
 
 static int mcde_platform_disable(void)
 {
-	return prcmu_disable_mcde();
+	return prcmu_disable_dsipll();
 }
 
 static void dev_release_noop(struct device *dev)
-- 
cgit v1.2.3


From 48349909caa096be381320a0e9dd29c3a0b01329 Mon Sep 17 00:00:00 2001
From: Philippe Langlais <philippe.langlais@stericsson.com>
Date: Tue, 11 Oct 2011 11:57:45 +0200
Subject: mcde: mach-ux500: u5500 alignment with 2.6.35

---
 arch/arm/mach-ux500/board-u5500-mcde.c | 277 +++++++++++++++++++++++++++++++++
 1 file changed, 277 insertions(+)
 create mode 100644 arch/arm/mach-ux500/board-u5500-mcde.c

diff --git a/arch/arm/mach-ux500/board-u5500-mcde.c b/arch/arm/mach-ux500/board-u5500-mcde.c
new file mode 100644
index 00000000000..38811d5db1f
--- /dev/null
+++ b/arch/arm/mach-ux500/board-u5500-mcde.c
@@ -0,0 +1,277 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2010
+ *
+ * Author: Marcus Lorentzon <marcus.xm.lorentzon@stericsson.com>
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+#include <linux/platform_device.h>
+#include <linux/kernel.h>
+#include <linux/gpio.h>
+#include <linux/delay.h>
+#include <video/mcde_display.h>
+#include <video/mcde_display-generic_dsi.h>
+#include <video/mcde_fb.h>
+#include <video/mcde_dss.h>
+
+#define DSI_UNIT_INTERVAL_0	0xB
+
+#define PRIMARY_DISPLAY_ID	0
+
+static bool rotate_main = true;
+static int display_initialized_during_boot;
+
+static int __init startup_graphics_setup(char *str)
+{
+
+	if (get_option(&str, &display_initialized_during_boot) != 1)
+		display_initialized_during_boot = 0;
+
+	switch (display_initialized_during_boot) {
+	case 1:
+		pr_info("Startup graphics support\n");
+		break;
+	case 0:
+	default:
+		pr_info("No startup graphics supported\n");
+		break;
+	};
+
+	return 1;
+}
+__setup("startup_graphics=", startup_graphics_setup);
+
+#ifdef CONFIG_DISPLAY_GENERIC_DSI_PRIMARY
+static struct mcde_port port0 = {
+	.type = MCDE_PORTTYPE_DSI,
+	.mode = MCDE_PORTMODE_CMD,
+	.pixel_format = MCDE_PORTPIXFMT_DSI_24BPP,
+	.ifc = DSI_VIDEO_MODE,
+	.link = 0,
+#ifdef CONFIG_DISPLAY_GENERIC_DSI_PRIMARY_AUTO_SYNC
+	.sync_src = MCDE_SYNCSRC_OFF,
+	.update_auto_trig = true,
+#else
+	.sync_src = MCDE_SYNCSRC_BTA,
+	.update_auto_trig = false,
+#endif
+	.phy = {
+		.dsi = {
+			.virt_id = 0,
+			.num_data_lanes = 2,
+			.ui = DSI_UNIT_INTERVAL_0,
+			.clk_cont = false,
+			.data_lanes_swap = false,
+		},
+	},
+};
+
+struct mcde_display_generic_platform_data generic_display0_pdata = {
+	.reset_gpio = 226,
+	.reset_delay = 10,
+	.sleep_out_delay = 140,
+#ifdef CONFIG_REGULATOR
+	.regulator_id = "ldo-h",
+	.min_supply_voltage = 2500000, /* 2.5V */
+	.max_supply_voltage = 2700000 /* 2.7V */
+#endif
+};
+
+struct mcde_display_device generic_display0 = {
+	.name = "mcde_disp_generic",
+	.id = PRIMARY_DISPLAY_ID,
+	.port = &port0,
+	.chnl_id = MCDE_CHNL_A,
+	.fifo = MCDE_FIFO_A,
+	.default_pixel_format = MCDE_OVLYPIXFMT_RGB565,
+	.native_x_res = 864,
+	.native_y_res = 480,
+#ifdef CONFIG_DISPLAY_GENERIC_DSI_PRIMARY_VSYNC
+	.synchronized_update = true,
+#else
+	.synchronized_update = false,
+#endif
+	/* TODO: Remove rotation buffers once ESRAM driver is completed */
+	.rotbuf1 = U5500_ESRAM_BASE,
+	.rotbuf2 = U5500_ESRAM_BASE + 0x10000,
+	.dev = {
+		.platform_data = &generic_display0_pdata,
+	},
+};
+#endif /* CONFIG_DISPLAY_GENERIC_DSI_PRIMARY */
+
+static struct fb_info *fbs[2] = { NULL, NULL};
+static struct mcde_display_device *displays[2] = { NULL, NULL };
+/*
+* This function will create the framebuffer for the display that is registered.
+*/
+static int display_postregistered_callback(struct notifier_block *nb,
+	unsigned long event, void *dev)
+{
+	struct mcde_display_device *ddev = dev;
+	u16 width, height;
+	u16 virtual_width, virtual_height;
+	u32 rotate = FB_ROTATE_UR;
+
+	if (event != MCDE_DSS_EVENT_DISPLAY_REGISTERED)
+		return 0;
+
+	if (ddev->id < PRIMARY_DISPLAY_ID || ddev->id >= ARRAY_SIZE(fbs))
+		return 0;
+
+	mcde_dss_get_native_resolution(ddev, &width, &height);
+
+	if (ddev->id == PRIMARY_DISPLAY_ID && rotate_main) {
+		swap(width, height);
+		rotate = FB_ROTATE_CW;
+	}
+
+	virtual_width = width;
+	virtual_height = height * 2;
+#ifdef CONFIG_DISPLAY_GENERIC_DSI_PRIMARY_AUTO_SYNC
+	if (ddev->id == PRIMARY_DISPLAY_ID)
+		virtual_height = height;
+#endif
+
+	/* Create frame buffer */
+	fbs[ddev->id] = mcde_fb_create(ddev,
+		width, height,
+		virtual_width, virtual_height,
+		ddev->default_pixel_format,
+		rotate);
+
+	if (IS_ERR(fbs[ddev->id]))
+		pr_warning("Failed to create fb for display %s\n", ddev->name);
+	else
+		pr_info("Framebuffer created (%s)\n", ddev->name);
+
+	return 0;
+}
+
+static struct notifier_block display_nb = {
+	.notifier_call = display_postregistered_callback,
+};
+
+/*
+* This function is used to refresh the display (lcd, hdmi, tvout) with black
+* when the framebuffer is registered.
+* The main display will not be updated if startup graphics is displayed
+* from u-boot.
+*/
+#ifdef CONFIG_DISPLAY_GENERIC_DSI_PRIMARY_AUTO_SYNC
+static int framebuffer_postregistered_callback(struct notifier_block *nb,
+	unsigned long event, void *data)
+{
+	int ret = 0;
+	struct fb_event *event_data = data;
+	struct fb_info *info;
+	struct fb_var_screeninfo var;
+	struct fb_fix_screeninfo fix;
+	struct mcde_fb *mfb;
+	u8 *addr;
+	int i;
+
+	if (event != FB_EVENT_FB_REGISTERED)
+		return 0;
+
+	if (!event_data)
+		return 0;
+
+	info = event_data->info;
+	mfb = to_mcde_fb(info);
+	var = info->var;
+	fix = info->fix;
+	addr = ioremap(fix.smem_start,
+			var.yres_virtual * fix.line_length);
+	memset(addr, 0x00, var.yres_virtual * fix.line_length);
+	/* Apply overlay info */
+	for (i = 0; i < mfb->num_ovlys; i++) {
+		struct mcde_overlay *ovly = mfb->ovlys[i];
+		struct mcde_overlay_info ovly_info;
+		struct mcde_fb *mfb = to_mcde_fb(info);
+		memset(&ovly_info, 0, sizeof(ovly_info));
+		ovly_info.paddr = fix.smem_start +
+			fix.line_length * var.yoffset;
+		if (ovly_info.paddr + fix.line_length * var.yres
+			 > fix.smem_start + fix.smem_len)
+			ovly_info.paddr = fix.smem_start;
+		ovly_info.fmt = mfb->pix_fmt;
+		ovly_info.stride = fix.line_length;
+		ovly_info.w = var.xres;
+		ovly_info.h = var.yres;
+		ovly_info.dirty.w = var.xres;
+		ovly_info.dirty.h = var.yres;
+		(void) mcde_dss_apply_overlay(ovly, &ovly_info);
+		ret = mcde_dss_update_overlay(ovly);
+		if (ret)
+			break;
+	}
+
+	return ret;
+}
+#else
+static int framebuffer_postregistered_callback(struct notifier_block *nb,
+	unsigned long event, void *data)
+{
+	int ret = 0;
+	struct fb_event *event_data = data;
+	struct fb_info *info;
+	struct fb_var_screeninfo var;
+	struct fb_fix_screeninfo fix;
+	struct mcde_fb *mfb;
+	u8 *addr;
+
+	if (event != FB_EVENT_FB_REGISTERED)
+		return 0;
+
+	if (!event_data)
+		return 0;
+
+	info = event_data->info;
+	mfb = to_mcde_fb(info);
+	if (mfb->id == 0 && display_initialized_during_boot)
+		goto out;
+
+	var = info->var;
+	fix = info->fix;
+	addr = ioremap(fix.smem_start,
+			var.yres_virtual * fix.line_length);
+	memset(addr, 0x00, var.yres_virtual * fix.line_length);
+	var.yoffset = var.yoffset ? 0 : var.yres;
+	if (info->fbops->fb_pan_display)
+		ret = info->fbops->fb_pan_display(&var, info);
+out:
+	return ret;
+}
+#endif
+
+
+static struct notifier_block framebuffer_nb = {
+	.notifier_call = framebuffer_postregistered_callback,
+};
+
+int __init init_display_devices_u5500(void)
+{
+	int ret;
+
+	ret = fb_register_client(&framebuffer_nb);
+	if (ret)
+		pr_warning("Failed to register framebuffer notifier\n");
+
+	ret = mcde_dss_register_notifier(&display_nb);
+	if (ret)
+		pr_warning("Failed to register dss notifier\n");
+
+#ifdef CONFIG_DISPLAY_GENERIC_PRIMARY
+	if (display_initialized_during_boot)
+		generic_display0.power_mode = MCDE_DISPLAY_PM_STANDBY;
+	ret = mcde_display_device_register(&generic_display0);
+	if (ret)
+		pr_warning("Failed to register generic display device 0\n");
+	displays[0] = &generic_display0;
+#endif
+	return ret;
+}
+
+module_init(init_display_devices_u5500);
-- 
cgit v1.2.3


From 71bf721523e1fd0062feebf4928e07d313ccb0e3 Mon Sep 17 00:00:00 2001
From: Philippe Langlais <philippe.langlais@stericsson.com>
Date: Wed, 19 Oct 2011 14:21:06 +0200
Subject: video: mcde: Fix Kconfig to match the ux500 update

Change the dependencies of MCDE Kconfigs to match the
mach-ux500 update.
Change name of the regulators used by the mcde driver to
match the mach-ux500 update.
Added the EGPIO used by mcde.

Signed-off-by: Robert Marklund <robert.marklund@stericsson.com>
---
 arch/arm/mach-ux500/Kconfig-arch         | 148 +++++++++++++++++++++++++++++++
 arch/arm/mach-ux500/board-mop500-mcde.c  |  27 +++---
 arch/arm/mach-ux500/board-u5500-mcde.c   |  12 +--
 drivers/video/mcde/display-generic_dsi.c |   2 +-
 4 files changed, 169 insertions(+), 20 deletions(-)
 create mode 100644 arch/arm/mach-ux500/Kconfig-arch

diff --git a/arch/arm/mach-ux500/Kconfig-arch b/arch/arm/mach-ux500/Kconfig-arch
new file mode 100644
index 00000000000..596399284ad
--- /dev/null
+++ b/arch/arm/mach-ux500/Kconfig-arch
@@ -0,0 +1,148 @@
+config U8500_SECURE
+	bool "Support for running in Secure mode"
+	default n
+	help
+		Build the kernel to run in Secure mode.
+
+#Configuration for MCDE setup
+
+if FB_MCDE
+
+menu "Display selection"
+
+config DISPLAY_GENERIC_PRIMARY
+	bool "Generic primary display support"
+	depends on (MACH_U8500 || MACH_U5500)
+	default y
+
+choice
+	prompt "Display port type"
+	depends on DISPLAY_GENERIC_PRIMARY
+	default DISPLAY_GENERIC_DSI_PRIMARY
+	help
+	  Select the kind of display port used for the primary display
+
+config DISPLAY_GENERIC_DSI_PRIMARY
+	bool "DSI display"
+	select MCDE_DISPLAY_GENERIC_DSI
+	help
+	  Say yes here when using a DSI display
+
+config MCDE_DISPLAY_DPI_PRIMARY
+	bool "DPI display"
+	select MCDE_DISPLAY_DPI
+	depends on MACH_U8500
+	help
+	  Say yes here when using a DPI display
+
+endchoice
+
+choice
+	prompt "Color depth"
+	depends on DISPLAY_GENERIC_PRIMARY
+	default MCDE_DISPLAY_PRIMARY_16BPP
+	help
+	  Select color depth for primary display
+
+config MCDE_DISPLAY_PRIMARY_16BPP
+	bool "16 bpp"
+	help
+	  16 bpp color depth
+
+config MCDE_DISPLAY_PRIMARY_32BPP
+	bool "32 bpp"
+	help
+	  32 bpp color depth
+
+endchoice
+
+choice DISPLAY_GENERIC_DSI_PRIMARY_ROTATION
+	prompt "Enable main display rotation"
+	depends on DISPLAY_GENERIC_DSI_PRIMARY
+	default DISPLAY_GENERIC_DSI_PRIMARY_ROTATION_90
+	help
+	  Set rotation of main display
+
+config DISPLAY_GENERIC_DSI_PRIMARY_ROTATION_0
+	bool "0 degrees"
+config DISPLAY_GENERIC_DSI_PRIMARY_ROTATION_90
+	bool "90 degrees"
+config DISPLAY_GENERIC_DSI_PRIMARY_ROTATION_180
+	bool "180 degrees"
+config DISPLAY_GENERIC_DSI_PRIMARY_ROTATION_270
+	bool "270 degrees"
+endchoice
+
+config DISPLAY_GENERIC_DSI_PRIMARY_ROTATION_ANGLE
+	int
+	depends on DISPLAY_GENERIC_DSI_PRIMARY
+	default "0" if DISPLAY_GENERIC_DSI_PRIMARY_ROTATION_0
+	default "90" if DISPLAY_GENERIC_DSI_PRIMARY_ROTATION_90
+	default "180" if DISPLAY_GENERIC_DSI_PRIMARY_ROTATION_180
+	default "270" if DISPLAY_GENERIC_DSI_PRIMARY_ROTATION_270
+
+config DISPLAY_SONY_SY35560_DSI_PRIMARY
+	bool "Sony SY35560 primary display support"
+	depends on MACH_U8500_PDP
+	select MCDE_DISPLAY_SONY_SY35560_DSI
+	default y
+	help
+	  Say yes here if main display exists
+
+config DISPLAY_GENERIC_DSI_PRIMARY_VSYNC
+	bool "Enable v-sync for primary display"
+	depends on DISPLAY_GENERIC_DSI_PRIMARY || DISPLAY_SONY_SY35560_DSI_PRIMARY
+	default n
+	help
+	  Say yes to enable v-sync for primary display
+
+config DISPLAY_GENERIC_DSI_PRIMARY_AUTO_SYNC
+	bool "Enable auto sync for primary display"
+	depends on DISPLAY_GENERIC_DSI_PRIMARY
+	default n
+	help
+	  Say yes to enable auto sync for primary display
+
+config SONY_SY35560_ENABLE_ESD_CHECK
+	bool "Enable esd status check for primary display"
+	depends on DISPLAY_SONY_SY35560_DSI_PRIMARY
+	default n
+	help
+	  Say yes to enable esd status check for primary display
+
+config DISPLAY_GENERIC_DSI_SECONDARY
+	bool "Sub display support"
+	depends on MACH_U8500
+	select MCDE_DISPLAY_GENERIC_DSI
+	help
+	  Say yes here if sub display exists
+
+config DISPLAY_GENERIC_DSI_SECONDARY_VSYNC
+	bool "Enable v-sync for secondary display"
+	depends on DISPLAY_GENERIC_DSI_SECONDARY
+	help
+	  Say yes to enable v-sync for secondary display
+
+config DISPLAY_GENERIC_DSI_SECONDARY_AUTO_SYNC
+	bool "Enable auto sync for secondary display"
+	depends on DISPLAY_GENERIC_DSI_SECONDARY
+	help
+	  Say yes to enable auto sync for secondary display
+
+config DISPLAY_AB8500_TERTIARY
+	bool "AB8500 TVout display support"
+	depends on MACH_U8500 && !AV8100_SDTV
+	select MCDE_DISPLAY_AB8500_DENC
+	help
+	  Say yes here if tv out support
+
+config DISPLAY_AV8100_TERTIARY
+	bool "AV8100 HDMI/CVBS display support"
+	depends on MACH_U8500
+	select MCDE_DISPLAY_AV8100
+	help
+	  Say yes here if HDMI output support
+
+endmenu
+
+endif
diff --git a/arch/arm/mach-ux500/board-mop500-mcde.c b/arch/arm/mach-ux500/board-mop500-mcde.c
index 59bc22c01d1..97778a4b426 100644
--- a/arch/arm/mach-ux500/board-mop500-mcde.c
+++ b/arch/arm/mach-ux500/board-mop500-mcde.c
@@ -23,6 +23,7 @@
 #include "pins-db8500.h"
 #include "pins.h"
 #include "board-mop500.h"
+#include "asm/mach-types.h"
 
 
 #define DSI_UNIT_INTERVAL_0	0x9
@@ -91,16 +92,16 @@ static struct mcde_port port0 = {
 	},
 };
 
-struct mcde_display_generic_platform_data generic_display0_pdata = {
+struct mcde_display_generic_platform_data mop500_generic_display0_pdata = {
 	.reset_delay = 1,
 #ifdef CONFIG_REGULATOR
-	.regulator_id = "v-display",
+	.regulator_id = "vaux12v5",
 	.min_supply_voltage = 2500000, /* 2.5V */
 	.max_supply_voltage = 2700000 /* 2.7V */
 #endif
 };
 
-struct mcde_display_device generic_display0 = {
+struct mcde_display_device mop500_generic_display0 = {
 	.name = "mcde_disp_generic",
 	.id = PRIMARY_DISPLAY_ID,
 	.port = &port0,
@@ -118,7 +119,7 @@ struct mcde_display_device generic_display0 = {
 	.rotbuf1 = U8500_ESRAM_BASE + 0x20000 * 4,
 	.rotbuf2 = U8500_ESRAM_BASE + 0x20000 * 4 + 0x10000,
 	.dev = {
-		.platform_data = &generic_display0_pdata,
+		.platform_data = &mop500_generic_display0_pdata,
 	},
 };
 #endif /* CONFIG_DISPLAY_GENERIC_DSI_PRIMARY */
@@ -195,7 +196,7 @@ static struct mcde_port port0 = {
 	},
 };
 
-struct mcde_display_dpi_platform_data generic_display0_pdata = {0};
+struct mcde_display_dpi_platform_data mop500_generic_display0_pdata = {0};
 static struct ux500_pins *dpi_pins;
 
 static int dpi_display_platform_enable(struct mcde_display_device *ddev)
@@ -230,7 +231,7 @@ static int dpi_display_platform_disable(struct mcde_display_device *ddev)
 
 }
 
-struct mcde_display_device generic_display0 = {
+struct mcde_display_device mop500_generic_display0 = {
 	.name = "mcde_display_dpi",
 	.id = 0,
 	.port = &port0,
@@ -245,7 +246,7 @@ struct mcde_display_device generic_display0 = {
 	.native_y_res = 480,
 	/* .synchronized_update: Don't care: port is set to update_auto_trig */
 	.dev = {
-		.platform_data = &generic_display0_pdata,
+		.platform_data = &mop500_generic_display0_pdata,
 	},
 	.platform_enable = dpi_display_platform_enable,
 	.platform_disable = dpi_display_platform_disable,
@@ -610,9 +611,9 @@ int __init init_display_devices(void)
 
 #ifdef CONFIG_DISPLAY_GENERIC_PRIMARY
 	if (machine_is_hrefv60())
-		generic_display0_pdata.reset_gpio = HREFV60_DISP1_RST_GPIO;
+		mop500_generic_display0_pdata.reset_gpio = HREFV60_DISP1_RST_GPIO;
 	else
-		generic_display0_pdata.reset_gpio = EGPIO_PIN_15;
+		mop500_generic_display0_pdata.reset_gpio = GPIO_MCDE_RESET;
 
 #ifdef CONFIG_DISPLAY_GENERIC_DSI_PRIMARY_VSYNC
 	i2c0 = i2c_get_adapter(0);
@@ -626,16 +627,16 @@ int __init init_display_devices(void)
 		i2c_put_adapter(i2c0);
 
 		/* ret == 0 => U8500 UIB connected */
-		generic_display0.synchronized_update = (ret == 0);
+		mop500_generic_display0.synchronized_update = (ret == 0);
 	}
 #endif
 
 	if (display_initialized_during_boot)
-		generic_display0.power_mode = MCDE_DISPLAY_PM_STANDBY;
-	ret = mcde_display_device_register(&generic_display0);
+		mop500_generic_display0.power_mode = MCDE_DISPLAY_PM_STANDBY;
+	ret = mcde_display_device_register(&mop500_generic_display0);
 	if (ret)
 		pr_warning("Failed to register generic display device 0\n");
-	displays[0] = &generic_display0;
+	displays[0] = &mop500_generic_display0;
 #endif
 
 #ifdef CONFIG_DISPLAY_GENERIC_DSI_SECONDARY
diff --git a/arch/arm/mach-ux500/board-u5500-mcde.c b/arch/arm/mach-ux500/board-u5500-mcde.c
index 38811d5db1f..8d755b2ec80 100644
--- a/arch/arm/mach-ux500/board-u5500-mcde.c
+++ b/arch/arm/mach-ux500/board-u5500-mcde.c
@@ -67,7 +67,7 @@ static struct mcde_port port0 = {
 	},
 };
 
-struct mcde_display_generic_platform_data generic_display0_pdata = {
+struct mcde_display_generic_platform_data u5500_generic_display0_pdata = {
 	.reset_gpio = 226,
 	.reset_delay = 10,
 	.sleep_out_delay = 140,
@@ -78,7 +78,7 @@ struct mcde_display_generic_platform_data generic_display0_pdata = {
 #endif
 };
 
-struct mcde_display_device generic_display0 = {
+struct mcde_display_device u5500_generic_display0 = {
 	.name = "mcde_disp_generic",
 	.id = PRIMARY_DISPLAY_ID,
 	.port = &port0,
@@ -96,7 +96,7 @@ struct mcde_display_device generic_display0 = {
 	.rotbuf1 = U5500_ESRAM_BASE,
 	.rotbuf2 = U5500_ESRAM_BASE + 0x10000,
 	.dev = {
-		.platform_data = &generic_display0_pdata,
+		.platform_data = &u5500_generic_display0_pdata,
 	},
 };
 #endif /* CONFIG_DISPLAY_GENERIC_DSI_PRIMARY */
@@ -265,11 +265,11 @@ int __init init_display_devices_u5500(void)
 
 #ifdef CONFIG_DISPLAY_GENERIC_PRIMARY
 	if (display_initialized_during_boot)
-		generic_display0.power_mode = MCDE_DISPLAY_PM_STANDBY;
-	ret = mcde_display_device_register(&generic_display0);
+		u5500_generic_display0.power_mode = MCDE_DISPLAY_PM_STANDBY;
+	ret = mcde_display_device_register(&u5500_generic_display0);
 	if (ret)
 		pr_warning("Failed to register generic display device 0\n");
-	displays[0] = &generic_display0;
+	displays[0] = &u5500_generic_display0;
 #endif
 	return ret;
 }
diff --git a/drivers/video/mcde/display-generic_dsi.c b/drivers/video/mcde/display-generic_dsi.c
index 9bb5babda5f..452da92f64a 100644
--- a/drivers/video/mcde/display-generic_dsi.c
+++ b/drivers/video/mcde/display-generic_dsi.c
@@ -164,7 +164,7 @@ static int __devinit generic_probe(struct mcde_display_device *dev)
 				!pdata->reset_high);
 		}
 		if (pdata->regulator_id) {
-			pdata->regulator = regulator_get(NULL,
+			pdata->regulator = regulator_get(&dev->dev,
 				pdata->regulator_id);
 			if (IS_ERR(pdata->regulator)) {
 				ret = PTR_ERR(pdata->regulator);
-- 
cgit v1.2.3


From 546c8beb24e322e0916e6524e067cb1ed7e068c7 Mon Sep 17 00:00:00 2001
From: Philippe Langlais <philippe.langlais@stericsson.com>
Date: Wed, 19 Oct 2011 14:21:39 +0200
Subject: video: mcde: Fix mcde GPIO and device creation

Fix so that the GPIO is defined in the right place.
Fix so only one device is created when both the u5500 and
u8500 is defined.

Signed-off-by: Robert Marklund <robert.marklund@stericsson.com>
---
 arch/arm/mach-ux500/board-mop500-mcde.c | 12 +++++++-----
 arch/arm/mach-ux500/board-u5500-mcde.c  |  6 +++++-
 2 files changed, 12 insertions(+), 6 deletions(-)

diff --git a/arch/arm/mach-ux500/board-mop500-mcde.c b/arch/arm/mach-ux500/board-mop500-mcde.c
index 97778a4b426..c44bc2f87f6 100644
--- a/arch/arm/mach-ux500/board-mop500-mcde.c
+++ b/arch/arm/mach-ux500/board-mop500-mcde.c
@@ -11,6 +11,7 @@
 #include <linux/gpio.h>
 #include <linux/mfd/ab8500/denc.h>
 #include <linux/workqueue.h>
+#include <asm/mach-types.h>
 #include <video/av8100.h>
 #include <video/mcde_display.h>
 #include <video/mcde_display-generic_dsi.h>
@@ -23,8 +24,6 @@
 #include "pins-db8500.h"
 #include "pins.h"
 #include "board-mop500.h"
-#include "asm/mach-types.h"
-
 
 #define DSI_UNIT_INTERVAL_0	0x9
 #define DSI_UNIT_INTERVAL_1	0x9
@@ -595,12 +594,15 @@ static struct notifier_block framebuffer_nb = {
 
 int __init init_display_devices(void)
 {
-	int ret;
+	int ret = 0;
 
 #ifdef CONFIG_DISPLAY_GENERIC_DSI_PRIMARY_VSYNC
 	struct i2c_adapter *i2c0;
 #endif
 
+	if (!(machine_is_u8500() || machine_is_snowball()))
+		return ret;
+
 	ret = fb_register_client(&framebuffer_nb);
 	if (ret)
 		pr_warning("Failed to register framebuffer notifier\n");
@@ -613,7 +615,7 @@ int __init init_display_devices(void)
 	if (machine_is_hrefv60())
 		mop500_generic_display0_pdata.reset_gpio = HREFV60_DISP1_RST_GPIO;
 	else
-		mop500_generic_display0_pdata.reset_gpio = GPIO_MCDE_RESET;
+		mop500_generic_display0_pdata.reset_gpio = MOP500_DISP1_RST_GPIO;
 
 #ifdef CONFIG_DISPLAY_GENERIC_DSI_PRIMARY_VSYNC
 	i2c0 = i2c_get_adapter(0);
@@ -643,7 +645,7 @@ int __init init_display_devices(void)
 	if (machine_is_hrefv60())
 		generic_subdisplay_pdata.reset_gpio = HREFV60_DISP2_RST_GPIO;
 	else
-		generic_subdisplay_pdata.reset_gpio = EGPIO_PIN_14;
+		generic_subdisplay_pdata.reset_gpio = MOP500_DISP2_RST_GPIO;
 	ret = mcde_display_device_register(&generic_subdisplay);
 	if (ret)
 		pr_warning("Failed to register generic sub display device\n");
diff --git a/arch/arm/mach-ux500/board-u5500-mcde.c b/arch/arm/mach-ux500/board-u5500-mcde.c
index 8d755b2ec80..714ee15a643 100644
--- a/arch/arm/mach-ux500/board-u5500-mcde.c
+++ b/arch/arm/mach-ux500/board-u5500-mcde.c
@@ -10,6 +10,7 @@
 #include <linux/kernel.h>
 #include <linux/gpio.h>
 #include <linux/delay.h>
+#include <asm/mach-types.h>
 #include <video/mcde_display.h>
 #include <video/mcde_display-generic_dsi.h>
 #include <video/mcde_fb.h>
@@ -253,7 +254,10 @@ static struct notifier_block framebuffer_nb = {
 
 int __init init_display_devices_u5500(void)
 {
-	int ret;
+	int ret = 0;
+
+	if (!machine_is_u5500())
+		return ret;
 
 	ret = fb_register_client(&framebuffer_nb);
 	if (ret)
-- 
cgit v1.2.3


From 7d179b5a8dbd7c9ddd62820cf35091be88dcc878 Mon Sep 17 00:00:00 2001
From: Jimmy Rubin <jimmy.rubin@stericsson.com>
Date: Thu, 10 Feb 2011 08:03:37 +0100
Subject: video: mcde: Fix for overlay handling

Changes handling of channel and overlay registers
in enable_mcde_hw.
Changes how overlays are disabled.

ST-Ericsson ID: ER323826

Change-Id: I376da1e3c7af2f24e694343828b1d6bffdf2f0c8
Signed-off-by: Jimmy Rubin <jimmy.rubin@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/15212
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
Reviewed-by: Dan JOHANSSON <dan.johansson@stericsson.com>
---
 drivers/video/mcde/mcde_hw.c | 68 +++++++++++++++++++++-----------------------
 1 file changed, 32 insertions(+), 36 deletions(-)

diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index 3b0c3bcd4dc..6bf773b63ab 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -1412,16 +1412,6 @@ static void update_overlay_registers(u8 idx, struct ovly_regs *regs,
 	u8  nr_of_bufs = 1;
 	u32 fifo_size;
 
-	/* TODO: disable if everything clipped */
-	if (!regs->enabled) {
-		u32 temp;
-		temp = mcde_rreg(MCDE_OVL0CR + idx * MCDE_OVL0CR_GROUPOFFSET);
-		mcde_wreg(MCDE_OVL0CR + idx * MCDE_OVL0CR_GROUPOFFSET,
-			(temp & ~MCDE_OVL0CR_OVLEN_MASK) |
-			MCDE_OVL0CR_OVLEN(false));
-		return;
-	}
-
 	if (rotation == MCDE_DISPLAY_ROT_180_CCW) {
 		ljinc = -ljinc;
 		tmrgn += stride * (regs->lpf - 1) / 8;
@@ -1497,7 +1487,7 @@ static void update_overlay_registers(u8 idx, struct ovly_regs *regs,
 			MCDE_EXTSRC0CR_FS_DIV_DISABLE(false) |
 			MCDE_EXTSRC0CR_FORCE_FS_DIV(false));
 		mcde_wreg(MCDE_OVL0CR + idx * MCDE_OVL0CR_GROUPOFFSET,
-			MCDE_OVL0CR_OVLEN(true) |
+			MCDE_OVL0CR_OVLEN(regs->enabled) |
 		MCDE_OVL0CR_COLCCTRL(regs->col_conv) |
 			MCDE_OVL0CR_CKEYGEN(false) |
 			MCDE_OVL0CR_ALPHAPMEN(false) |
@@ -2005,28 +1995,25 @@ static int enable_mcde_hw(void)
 	for (i = 0; i < num_channels; i++) {
 		struct mcde_chnl_state *chnl = &channels[i];
 		if (chnl->enabled) {
-			(void)update_channel_static_registers(chnl);
-			update_channel_registers(chnl->id, &chnl->regs,
-				&chnl->port, chnl->fifo,
-				&chnl->vmode);
-			if (chnl->ovly0)
-				update_overlay_registers(chnl->ovly0->idx,
-					&chnl->ovly0->regs,
-					&chnl->port, chnl->fifo,
-					chnl->regs.x, chnl->regs.y,
-					chnl->regs.ppl, chnl->regs.lpf,
-					chnl->ovly0->stride,
-					chnl->vmode.interlaced,
-					chnl->rotation);
-			if (chnl->ovly1)
-				update_overlay_registers(chnl->ovly1->idx,
-					&chnl->ovly1->regs,
-					&chnl->port, chnl->fifo,
-					chnl->regs.x, chnl->regs.y,
-					chnl->regs.ppl, chnl->regs.lpf,
-					chnl->ovly1->stride,
-					chnl->vmode.interlaced,
-					chnl->rotation);
+			if (chnl->ovly0 && chnl->ovly0->inuse) {
+				if (chnl->ovly0->regs.enabled) {
+					chnl->ovly0->transactionid =
+							++chnl->transactionid;
+					chnl->ovly0->regs.reset_buf_id = true;
+				 } else {
+					chnl->transactionid++;
+				}
+			}
+			if (chnl->ovly1 && chnl->ovly1->inuse) {
+				if (chnl->ovly1->regs.enabled) {
+					chnl->ovly1->transactionid =
+							++chnl->transactionid;
+					chnl->ovly1->regs.reset_buf_id = true;
+				} else {
+					chnl->transactionid++;
+				}
+			}
+			chnl->transactionid++;
 		}
 	}
 
@@ -2724,8 +2711,6 @@ void mcde_chnl_disable(struct mcde_chnl_state *chnl)
 
 	mutex_lock(&mcde_hw_lock);
 	cancel_delayed_work(&hw_timeout_work);
-	if (!chnl->enabled)
-		return;
 	chnl->enabled = false;
 	if (mcde_is_enabled && chnl->formatter_updated
 				&& chnl->port.type == MCDE_PORTTYPE_DSI) {
@@ -2752,6 +2737,8 @@ struct mcde_ovly_state *mcde_ovly_get(struct mcde_chnl_state *chnl)
 {
 	struct mcde_ovly_state *ovly;
 
+	dev_vdbg(&mcde_dev->dev, "%s\n", __func__);
+
 	if (!chnl->reserved)
 		return ERR_PTR(-EINVAL);
 
@@ -2776,6 +2763,10 @@ struct mcde_ovly_state *mcde_ovly_get(struct mcde_chnl_state *chnl)
 		ovly->h = 0;
 		ovly->alpha_value = 0xFF;
 		ovly->alpha_source = MCDE_OVL1CONF2_BP_PER_PIXEL_ALPHA;
+		/* Reset transactionids */
+		ovly->transactionid = 0;
+		ovly->transactionid_regs = 0;
+		ovly->transactionid_hw = 0;
 		mcde_ovly_apply(ovly);
 	}
 
@@ -2784,6 +2775,8 @@ struct mcde_ovly_state *mcde_ovly_get(struct mcde_chnl_state *chnl)
 
 void mcde_ovly_put(struct mcde_ovly_state *ovly)
 {
+	dev_vdbg(&mcde_dev->dev, "%s\n", __func__);
+
 	if (!ovly->inuse)
 		return;
 	if (ovly->regs.enabled) {
@@ -2913,10 +2906,13 @@ void mcde_ovly_apply(struct mcde_ovly_state *ovly)
 
 	if (ovly->regs.enabled)
 		ovly->transactionid = ++ovly->chnl->transactionid;
+	else
+		ovly->chnl->transactionid++;
 
 	mutex_unlock(&mcde_hw_lock);
 
-	dev_vdbg(&mcde_dev->dev, "Overlay applied, chnl=%d\n", ovly->chnl->id);
+	dev_vdbg(&mcde_dev->dev, "Overlay applied, idx=%d chnl=%d\n",
+						ovly->idx, ovly->chnl->id);
 }
 
 static int init_clocks_and_power(struct platform_device *pdev)
-- 
cgit v1.2.3


From 165b943533ecb476e57b95fb2e969aeeca1cdcc2 Mon Sep 17 00:00:00 2001
From: Per Persson <per.xb.persson@stericsson.com>
Date: Wed, 9 Mar 2011 08:10:51 +0100
Subject: video: mcde: Fix memory allocation failure

Use hwmem_kmap instead of ioremap.

ST-Ericsson ID: ER 324769, AP 325234

Change-Id: Iab7cfc16c53cc4628d75024e579e7b430bbdf93d
Signed-off-by: Per Persson <per.xb.persson@stericsson.com>
---
 arch/arm/mach-ux500/board-mop500-mcde.c | 11 +----------
 drivers/video/mcde/mcde_fb.c            | 11 +++++++++--
 2 files changed, 10 insertions(+), 12 deletions(-)

diff --git a/arch/arm/mach-ux500/board-mop500-mcde.c b/arch/arm/mach-ux500/board-mop500-mcde.c
index c44bc2f87f6..ca10a7e5b92 100644
--- a/arch/arm/mach-ux500/board-mop500-mcde.c
+++ b/arch/arm/mach-ux500/board-mop500-mcde.c
@@ -508,7 +508,6 @@ static int framebuffer_postregistered_callback(struct notifier_block *nb,
 	struct fb_var_screeninfo var;
 	struct fb_fix_screeninfo fix;
 	struct mcde_fb *mfb;
-	u8 *addr;
 	int i;
 
 	if (event != FB_EVENT_FB_REGISTERED)
@@ -521,10 +520,7 @@ static int framebuffer_postregistered_callback(struct notifier_block *nb,
 	mfb = to_mcde_fb(info);
 	var = info->var;
 	fix = info->fix;
-	addr = ioremap(fix.smem_start,
-			var.yres_virtual * fix.line_length);
-	memset(addr, 0x00,
-			var.yres_virtual * fix.line_length);
+
 	/* Apply overlay info */
 	for (i = 0; i < mfb->num_ovlys; i++) {
 		struct mcde_overlay *ovly = mfb->ovlys[i];
@@ -560,7 +556,6 @@ static int framebuffer_postregistered_callback(struct notifier_block *nb,
 	struct fb_var_screeninfo var;
 	struct fb_fix_screeninfo fix;
 	struct mcde_fb *mfb;
-	u8 *addr;
 
 	if (event != FB_EVENT_FB_REGISTERED)
 		return 0;
@@ -575,10 +570,6 @@ static int framebuffer_postregistered_callback(struct notifier_block *nb,
 
 	var = info->var;
 	fix = info->fix;
-	addr = ioremap(fix.smem_start,
-			var.yres_virtual * fix.line_length);
-	memset(addr, 0x00,
-			var.yres_virtual * fix.line_length);
 	var.yoffset = var.yoffset ? 0 : var.yres;
 	if (info->fbops->fb_pan_display)
 		ret = info->fbops->fb_pan_display(&var, info);
diff --git a/drivers/video/mcde/mcde_fb.c b/drivers/video/mcde/mcde_fb.c
index dadb9cf918e..ae21f46b0a1 100644
--- a/drivers/video/mcde/mcde_fb.c
+++ b/drivers/video/mcde/mcde_fb.c
@@ -210,7 +210,7 @@ static int reallocate_fb_mem(struct fb_info *fbi, u32 size)
 {
 	struct mcde_fb *mfb = to_mcde_fb(fbi);
 	dma_addr_t paddr;
-	void __iomem *vaddr;
+	void *vaddr;
 	struct hwmem_alloc *alloc;
 	int name;
 
@@ -242,13 +242,19 @@ static int reallocate_fb_mem(struct fb_info *fbi, u32 size)
 		}
 
 		if (mfb->alloc) {
+			hwmem_kunmap(mfb->alloc);
 			hwmem_unpin(mfb->alloc);
 			hwmem_release(mfb->alloc);
 		}
 
 		(void)hwmem_pin(alloc, &paddr, NULL);
 
-		vaddr = ioremap(paddr, size);
+		vaddr = hwmem_kmap(alloc);
+		if (vaddr == NULL) {
+			hwmem_unpin(alloc);
+			hwmem_release(alloc);
+			return -ENOMEM;
+		}
 
 		mfb->alloc = alloc;
 		mfb->alloc_name = name;
@@ -272,6 +278,7 @@ static void free_fb_mem(struct fb_info *fbi)
 	struct mcde_fb *mfb = to_mcde_fb(fbi);
 
 	if (mfb->alloc) {
+		hwmem_kunmap(mfb->alloc);
 		hwmem_unpin(mfb->alloc);
 		hwmem_release(mfb->alloc);
 		mfb->alloc = NULL;
-- 
cgit v1.2.3


From 72d9c08062d219f178ae65521da5186c9c371a36 Mon Sep 17 00:00:00 2001
From: Per Persson <per.xb.persson@stericsson.com>
Date: Wed, 9 Mar 2011 14:32:26 +0100
Subject: video: av8100: Request inputclk only if inputclk_id is valid.

ST-Ericsson ID: ER 327932

Change-Id: Idf50a3de8b686ab23fcb88f4d556f0f2e01c0558
Signed-off-by: Per Persson <per.xb.persson@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/17971
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Reviewed-by: Dan JOHANSSON <dan.johansson@stericsson.com>
---
 drivers/video/av8100/av8100.c | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/drivers/video/av8100/av8100.c b/drivers/video/av8100/av8100.c
index 3bb3e08a724..1db66172e0d 100644
--- a/drivers/video/av8100/av8100.c
+++ b/drivers/video/av8100/av8100.c
@@ -3544,11 +3544,13 @@ static int __devinit av8100_probe(struct i2c_client *i2cClient,
 	}
 
 	/* Get clock resource */
-	av8100_globals->inputclk = clk_get(NULL, pdata->inputclk_id);
-	if (IS_ERR(av8100_globals->inputclk)) {
-		av8100_globals->inputclk = NULL;
-		dev_warn(av8100dev, "%s: Failed to get clock '%s'\n",
+	if (pdata->inputclk_id) {
+		av8100_globals->inputclk = clk_get(NULL, pdata->inputclk_id);
+		if (IS_ERR(av8100_globals->inputclk)) {
+			av8100_globals->inputclk = NULL;
+			dev_warn(av8100dev, "%s: Failed to get clock '%s'\n",
 					__func__, pdata->inputclk_id);
+		}
 	}
 
 	av8100_set_state(AV8100_OPMODE_SHUTDOWN);
-- 
cgit v1.2.3


From 42401f9aad6efc32edb56b54da17ebf7a6d02956 Mon Sep 17 00:00:00 2001
From: Per Persson <per.xb.persson@stericsson.com>
Date: Thu, 10 Mar 2011 16:08:09 +0100
Subject: video: mcde: Correct behaviour for 720x480 resolution

Add an extra dsi_delay0 when 720x480.

ST-Ericsson ID: ER 327665

Change-Id: Ic6de688b52c9df69f91efdd2b0c5b1d17b6e0621
Signed-off-by: Per Persson <per.xb.persson@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/18102
Reviewed-by: Dan JOHANSSON <dan.johansson@stericsson.com>
---
 drivers/video/mcde/mcde_hw.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index 6bf773b63ab..b1f98ba1cae 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -45,6 +45,9 @@ static void dsi_te_timer_function(unsigned long value);
 #define OVLY_TIMEOUT 100
 #define CHNL_TIMEOUT 100
 #define SCREEN_PPL_HIGH 1920
+#define SCREEN_PPL_CEA2 720
+#define SCREEN_LPF_CEA2 480
+#define DSI_DELAY0_CEA2_ADD 10
 
 #define MCDE_SLEEP_WATCHDOG 500
 #define DSI_TE_NO_ANSWER_TIMEOUT_INIT 2500
@@ -1895,6 +1898,11 @@ void update_channel_registers(enum mcde_chnl chnl_id, struct chnl_regs *regs,
 			(video_mode->xres + video_mode->hbp +
 				video_mode->hfp) /
 			(1000000 / MCDE_CLK_FREQ_MHZ) / pkt_div;
+
+		if ((screen_ppl == SCREEN_PPL_CEA2) &&
+				(screen_lpf == SCREEN_LPF_CEA2))
+			dsi_delay0 += DSI_DELAY0_CEA2_ADD;
+
 		temp = mcde_rreg(MCDE_DSIVID0CONF0 +
 			fidx * MCDE_DSIVID0CONF0_GROUPOFFSET);
 		mcde_wreg(MCDE_DSIVID0CONF0 +
-- 
cgit v1.2.3


From 9a1ae1c710f8e181c5e2b9d64f65f43b6473c413 Mon Sep 17 00:00:00 2001
From: Philippe Langlais <philippe.langlais@stericsson.com>
Date: Tue, 11 Oct 2011 15:19:03 +0200
Subject: drivers: video: add regulator for CVBS out

- Adds a regulator that is used for CVBS TV out by AB8500 DENC and
  AV8100 DENC.  The regulator is for the switch at the AV connector that
  switches between video out and mic in.

ST-Ericsson ID: AP 322391
Linux-next: ST-Ericsson ID: ER 282779

ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: Ie7a821b8d3965aa65384b4393e3083ef406c8282
Signed-off-by: Marcel Tunnissen <Marcel.Tuennissen@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/16819
Tested-by: Marcel TUNNISSEN <marcel.tuennissen@stericsson.com>
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
Reviewed-by: Robert FEKETE <robert.fekete@stericsson.com>

Conflicts:

	arch/arm/mach-ux500/board-mop500-regulators.c
	arch/arm/mach-ux500/board-pdp-mcde.c

Conflicts:

	arch/arm/mach-ux500/board-mop500-regulators.c
	drivers/mfd/ab8500-denc.c
---
 arch/arm/mach-ux500/board-mop500-mcde.c |  8 +--
 arch/arm/mach-ux500/board-mop500-mcde.h | 24 +++++++++
 drivers/video/mcde/display-ab8500.c     | 86 ++++++++++++++++++++++++---------
 drivers/video/mcde/display-av8100.c     | 55 +++++++++++++++++++++
 include/video/mcde_display-ab8500.h     |  3 +-
 include/video/mcde_display-av8100.h     |  1 +
 6 files changed, 150 insertions(+), 27 deletions(-)
 create mode 100644 arch/arm/mach-ux500/board-mop500-mcde.h

diff --git a/arch/arm/mach-ux500/board-mop500-mcde.c b/arch/arm/mach-ux500/board-mop500-mcde.c
index ca10a7e5b92..5d8f0f9058b 100644
--- a/arch/arm/mach-ux500/board-mop500-mcde.c
+++ b/arch/arm/mach-ux500/board-mop500-mcde.c
@@ -270,7 +270,8 @@ static struct mcde_port port_tvout1 = {
 };
 
 static struct ab8500_display_platform_data ab8500_display_pdata = {
-	.denc_regulator_id = "v-tvout",
+	.nr_regulators = 2,
+	.regulator_id  = {"v-tvout", "v-ab8500-AV-switch"},
 	.rgb_2_yCbCr_transform = {
 		.matrix = {
 			{0x42, 0x81, 0x19},
@@ -321,7 +322,7 @@ failed:
 	return res;
 }
 
-static struct mcde_display_device tvout_ab8500_display = {
+struct mcde_display_device tvout_ab8500_display = {
 	.name = "mcde_tv_ab8500",
 	.id = TERTIARY_DISPLAY_ID,
 	.port = &port_tvout1,
@@ -381,6 +382,7 @@ struct mcde_display_hdmi_platform_data av8100_hdmi_pdata = {
 	.reset_gpio = 0,
 	.reset_delay = 1,
 	.regulator_id = NULL, /* TODO: "display_main" */
+	.cvbs_regulator_id = "v-av8100-AV-switch",
 	.ddb_id = 1,
 	.rgb_2_yCbCr_transform = {
 		.matrix = {
@@ -392,7 +394,7 @@ struct mcde_display_hdmi_platform_data av8100_hdmi_pdata = {
 	}
 };
 
-static struct mcde_display_device av8100_hdmi = {
+struct mcde_display_device av8100_hdmi = {
 	.name = "av8100_hdmi",
 	.id = TERTIARY_DISPLAY_ID,
 	.port = &port2,
diff --git a/arch/arm/mach-ux500/board-mop500-mcde.h b/arch/arm/mach-ux500/board-mop500-mcde.h
new file mode 100644
index 00000000000..38094b81b34
--- /dev/null
+++ b/arch/arm/mach-ux500/board-mop500-mcde.h
@@ -0,0 +1,24 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2011
+ *
+ * License Terms: GNU General Public License v2
+ *
+ * Author: Marcel Tunnissen <marcel.tuennissen@stericsson.com> for ST-Ericsson
+ *
+ * MOP500 board specific initialization for regulators
+ */
+
+#ifndef __BOARD_MOP500_MCDE_H
+#define __BOARD_MOP500_MCDE_H
+
+#include <video/mcde_display.h>
+
+#ifdef CONFIG_DISPLAY_AB8500_TERTIARY
+extern struct mcde_display_device tvout_ab8500_display;
+#endif
+
+#ifdef CONFIG_DISPLAY_AV8100_TERTIARY
+extern struct mcde_display_device av8100_hdmi;
+#endif
+
+#endif /* __BOARD_MOP500_MCDE_H */
diff --git a/drivers/video/mcde/display-ab8500.c b/drivers/video/mcde/display-ab8500.c
index fa6b3208781..538a0e2346d 100644
--- a/drivers/video/mcde/display-ab8500.c
+++ b/drivers/video/mcde/display-ab8500.c
@@ -23,7 +23,8 @@
 struct display_driver_data {
 	struct ab8500_denc_conf denc_conf;
 	struct platform_device *denc_dev;
-	struct regulator *denc_regulator;
+	int nr_regulators;
+	struct regulator **regulator;
 };
 
 static int try_video_mode(struct mcde_display_device *ddev,
@@ -38,6 +39,7 @@ static int display_update(struct mcde_display_device *ddev);
 static int __devinit ab8500_probe(struct mcde_display_device *ddev)
 {
 	int ret = 0;
+	int i;
 	struct ab8500_display_platform_data *pdata = ddev->dev.platform_data;
 	struct display_driver_data *driver_data;
 
@@ -66,17 +68,24 @@ static int __devinit ab8500_probe(struct mcde_display_device *ddev)
 		goto dev_get_failed;
 	}
 
-	if (pdata->denc_regulator_id) {
-		driver_data->denc_regulator = regulator_get(&ddev->dev,
-						pdata->denc_regulator_id);
-		if (IS_ERR(driver_data->denc_regulator)) {
-			ret = PTR_ERR(driver_data->denc_regulator);
+	driver_data->regulator = kzalloc(pdata->nr_regulators *
+					sizeof(struct regulator *), GFP_KERNEL);
+	if (!driver_data->regulator) {
+		dev_err(&ddev->dev, "Failed to allocate regulator list\n");
+		ret = -ENOMEM;
+		goto reg_alloc_failed;
+	}
+	for (i = 0; i < pdata->nr_regulators; i++) {
+		driver_data->regulator[i] = regulator_get(&ddev->dev,
+						pdata->regulator_id[i]);
+		if (IS_ERR(driver_data->regulator[i])) {
+			ret = PTR_ERR(driver_data->regulator[i]);
 			dev_warn(&ddev->dev, "%s:Failed to get regulator %s\n",
-					__func__, pdata->denc_regulator_id);
-			driver_data->denc_regulator = NULL;
+					__func__, pdata->regulator_id[i]);
 			goto regulator_get_failed;
 		}
 	}
+	driver_data->nr_regulators = pdata->nr_regulators;
 
 	dev_set_drvdata(&ddev->dev, driver_data);
 
@@ -90,9 +99,14 @@ static int __devinit ab8500_probe(struct mcde_display_device *ddev)
 	return 0;
 
 regulator_get_failed:
+	for (i--; i >= 0; i--)
+		regulator_put(driver_data->regulator[i]);
+	kfree(driver_data->regulator);
+	driver_data->regulator = NULL;
+reg_alloc_failed:
 	ab8500_denc_put_device(driver_data->denc_dev);
 dev_get_failed:
-	kzfree(driver_data);
+	kfree(driver_data);
 	return ret;
 }
 
@@ -103,10 +117,16 @@ static int __devexit ab8500_remove(struct mcde_display_device *ddev)
 
 	ddev->set_power_mode(ddev, MCDE_DISPLAY_PM_OFF);
 
-	if (driver_data->denc_regulator)
-		regulator_put(driver_data->denc_regulator);
+	if (driver_data->regulator) {
+		int i;
+		for (i = driver_data->nr_regulators - 1; i >= 0; i--)
+			regulator_put(driver_data->regulator[i]);
+		kfree(driver_data->regulator);
+		driver_data->regulator = NULL;
+		driver_data->nr_regulators = 0;
+	}
 	ab8500_denc_put_device(driver_data->denc_dev);
-	kzfree(driver_data);
+	kfree(driver_data);
 	return 0;
 }
 
@@ -306,6 +326,7 @@ static int set_power_mode(struct mcde_display_device *ddev,
 	enum mcde_display_power_mode power_mode)
 {
 	int ret;
+	int i;
 	struct display_driver_data *driver_data = dev_get_drvdata(&ddev->dev);
 	AB8500_DISP_TRACE;
 
@@ -318,10 +339,14 @@ static int set_power_mode(struct mcde_display_device *ddev,
 			if (ret)
 				goto error;
 		}
-		if (driver_data->denc_regulator) {
-			ret = regulator_enable(driver_data->denc_regulator);
-			if (ret != 0)
-				goto error;
+		if (driver_data->regulator) {
+			for (i = 0; i < driver_data->nr_regulators; i++) {
+				ret = regulator_enable(
+						driver_data->regulator[i]);
+				if (ret)
+					goto off_to_standby_failed;
+				dev_dbg(&ddev->dev, "regulator %d on\n", i);
+			}
 		}
 		ab8500_denc_power_up(driver_data->denc_dev);
 		ab8500_denc_reset(driver_data->denc_dev, true);
@@ -343,23 +368,38 @@ static int set_power_mode(struct mcde_display_device *ddev,
 	/* STANDBY -> OFF */
 	if (ddev->power_mode == MCDE_DISPLAY_PM_STANDBY &&
 					power_mode == MCDE_DISPLAY_PM_OFF) {
+		bool error = false;
 		dev_dbg(&ddev->dev, "standby -> off\n");
-		memset(&(ddev->video_mode), 0, sizeof(struct mcde_video_mode));
-		if (driver_data->denc_regulator) {
-			ret = regulator_disable(driver_data->denc_regulator);
-			if (ret != 0)
-				goto error;
+		if (driver_data->regulator) {
+			for (i = 0; i < driver_data->nr_regulators; i++) {
+				ret = regulator_disable(
+						driver_data->regulator[i]);
+				/* continue in case of an error */
+				error |= (ret != 0);
+				dev_dbg(&ddev->dev, "regulator %d off\n", i);
+			}
 		}
 		if (ddev->platform_disable) {
 			ret = ddev->platform_disable(ddev);
-			if (ret)
-				goto error;
+			error |= (ret != 0);
+		}
+		if (error) {
+			/* the latest error code is returned */
+			goto error;
 		}
+		memset(&(ddev->video_mode), 0, sizeof(struct mcde_video_mode));
 		ab8500_denc_power_down(driver_data->denc_dev);
 		ddev->power_mode = MCDE_DISPLAY_PM_OFF;
 	}
 
 	return 0;
+
+	/* In case of an error, try to leave in off-state */
+off_to_standby_failed:
+	for (i--; i >= 0; i--)
+		regulator_disable(driver_data->regulator[i]);
+	ddev->platform_disable(ddev);
+
 error:
 	dev_err(&ddev->dev, "Failed to set power mode");
 	return ret;
diff --git a/drivers/video/mcde/display-av8100.c b/drivers/video/mcde/display-av8100.c
index 009ff6e9696..567a7d0d1f4 100644
--- a/drivers/video/mcde/display-av8100.c
+++ b/drivers/video/mcde/display-av8100.c
@@ -12,14 +12,21 @@
 #include <linux/kernel.h>
 #include <linux/device.h>
 #include <linux/delay.h>
+#include <linux/err.h>
 #include <linux/gpio.h>
 #include <linux/io.h>
+#include <linux/slab.h>
 
 #include <video/mcde_display.h>
 #include <video/mcde_display-av8100.h>
 #include <video/av8100.h>
 #include <video/hdmi.h>
 
+struct display_driver_data {
+	struct regulator *cvbs_regulator;
+	bool cvbs_regulator_enabled;
+};
+
 static int hdmi_try_video_mode(
 	struct mcde_display_device *ddev, struct mcde_video_mode *video_mode);
 static int hdmi_set_video_mode(
@@ -734,6 +741,7 @@ static int hdmi_on_first_update(struct mcde_display_device *dev)
 static int hdmi_set_power_mode(struct mcde_display_device *ddev,
 	enum mcde_display_power_mode power_mode)
 {
+	struct display_driver_data *driver_data = dev_get_drvdata(&ddev->dev);
 	int ret = 0;
 
 	/* OFF -> STANDBY */
@@ -744,6 +752,17 @@ static int hdmi_set_power_mode(struct mcde_display_device *ddev,
 			if (ret)
 				return ret;
 		}
+		/*
+		 * the regulator for analog TV out is only enabled here,
+		 * this means that one needs to switch to the OFF state
+		 * to be able to switch from HDMI to CVBS.
+		 */
+		if (ddev->port->hdmi_sdtv_switch == SDTV_SWITCH) {
+			ret = regulator_enable(driver_data->cvbs_regulator);
+			if (ret)
+				return ret;
+			driver_data->cvbs_regulator_enabled = true;
+		}
 		ddev->power_mode = MCDE_DISPLAY_PM_STANDBY;
 	}
 	/* STANDBY -> ON */
@@ -771,6 +790,12 @@ static int hdmi_set_power_mode(struct mcde_display_device *ddev,
 			if (ret)
 				return ret;
 		}
+		if (driver_data->cvbs_regulator_enabled) {
+			ret = regulator_disable(driver_data->cvbs_regulator);
+			if (ret)
+				return ret;
+			driver_data->cvbs_regulator_enabled = false;
+		}
 		ddev->power_mode = MCDE_DISPLAY_PM_OFF;
 	}
 
@@ -782,6 +807,8 @@ set_power_and_exit:
 
 static int __devinit hdmi_probe(struct mcde_display_device *dev)
 {
+	int ret = 0;
+	struct display_driver_data *driver_data;
 	struct mcde_display_hdmi_platform_data *pdata =
 		dev->dev.platform_data;
 
@@ -796,6 +823,13 @@ static int __devinit hdmi_probe(struct mcde_display_device *dev)
 		return -EINVAL;
 	}
 
+	driver_data = (struct display_driver_data *)
+		kzalloc(sizeof(struct display_driver_data), GFP_KERNEL);
+	if (!driver_data) {
+		dev_err(&dev->dev, "Failed to allocate driver data\n");
+		return -ENOMEM;
+	}
+
 	/* DSI use clock continous mode if AV8100_CHIPVER_1 > 1 */
 	if (av8100_ver_get() > AV8100_CHIPVER_1)
 		dev->port->phy.dsi.clk_cont = true;
@@ -813,13 +847,31 @@ static int __devinit hdmi_probe(struct mcde_display_device *dev)
 		dev_info(&dev->dev,
 			"Unable to create hdmisdtvswitch attr\n");
 
+	if (pdata->cvbs_regulator_id) {
+		driver_data->cvbs_regulator = regulator_get(&dev->dev,
+						pdata->cvbs_regulator_id);
+		if (IS_ERR(driver_data->cvbs_regulator)) {
+			ret = PTR_ERR(driver_data->cvbs_regulator);
+			dev_warn(&dev->dev, "%s:Failed to get regulator %s\n",
+				__func__, pdata->cvbs_regulator_id);
+			driver_data->cvbs_regulator = NULL;
+			goto av_regulator_get_failed;
+		}
+	}
+
+	dev_set_drvdata(&dev->dev, driver_data);
 	dev_info(&dev->dev, "HDMI display probed\n");
 
 	return 0;
+
+av_regulator_get_failed:
+	kfree(driver_data);
+	return ret;
 }
 
 static int __devexit hdmi_remove(struct mcde_display_device *dev)
 {
+	struct display_driver_data *driver_data = dev_get_drvdata(&dev->dev);
 	struct mcde_display_hdmi_platform_data *pdata =
 		dev->dev.platform_data;
 
@@ -828,6 +880,9 @@ static int __devexit hdmi_remove(struct mcde_display_device *dev)
 
 	dev->set_power_mode(dev, MCDE_DISPLAY_PM_OFF);
 
+	if (driver_data->cvbs_regulator)
+		regulator_put(driver_data->cvbs_regulator);
+	kfree(driver_data);
 	if (pdata->hdmi_platform_enable) {
 		if (pdata->regulator)
 			regulator_put(pdata->regulator);
diff --git a/include/video/mcde_display-ab8500.h b/include/video/mcde_display-ab8500.h
index ce0633313f1..336fe441f42 100644
--- a/include/video/mcde_display-ab8500.h
+++ b/include/video/mcde_display-ab8500.h
@@ -15,8 +15,9 @@
 
 struct ab8500_display_platform_data {
 	/* Platform info */
-	const char *denc_regulator_id;
 	struct mcde_col_convert rgb_2_yCbCr_transform;
+	int nr_regulators;
+	const char *regulator_id[];
 };
 
 #endif /* __DISPLAY_AB8500__H__*/
diff --git a/include/video/mcde_display-av8100.h b/include/video/mcde_display-av8100.h
index 79e806a8391..c508ebf1f17 100644
--- a/include/video/mcde_display-av8100.h
+++ b/include/video/mcde_display-av8100.h
@@ -26,6 +26,7 @@ struct mcde_display_hdmi_platform_data {
 	int reset_gpio;
 	bool reset_high;
 	const char *regulator_id;
+	const char *cvbs_regulator_id;
 	int reset_delay; /* ms */
 	u32 ddb_id;
 	struct mcde_col_convert rgb_2_yCbCr_transform;
-- 
cgit v1.2.3


From 98e49903e923c1cfc697e2a555c294299702fb3c Mon Sep 17 00:00:00 2001
From: Marcel Tunnissen <Marcel.Tuennissen@stericsson.com>
Date: Thu, 10 Mar 2011 09:28:55 +0100
Subject: video: mcde: Add missing line for CVBS TV out

Fixes that one line is missing for the AB8500 MCDE display.

ST-Ericsson ID: ER 326380
Linux-next: ST-Ericsson ID: ER 282779

ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: Icd88391d8e96c5789f142ddaedcbce202f2c5347
Signed-off-by: Marcel Tunnissen <Marcel.Tuennissen@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/18040
Tested-by: Marcel TUNNISSEN <marcel.tuennissen@stericsson.com>
Reviewed-by: Jonas ABERG <jonas.aberg@stericsson.com>
---
 drivers/video/mcde/mcde_hw.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index b1f98ba1cae..7b15e2f0e80 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -725,7 +725,7 @@ static void update_dpi_registers(enum mcde_chnl chnl_id, struct tv_regs *regs)
 	mcde_wreg(MCDE_TVCRA + idx * MCDE_TVCRA_GROUPOFFSET,
 			MCDE_TVCRA_SEL_MOD(regs->sel_mode_tv)             |
 			MCDE_TVCRA_INTEREN(regs->interlaced_en)           |
-			MCDE_TVCRA_IFIELD(1)                              |
+			MCDE_TVCRA_IFIELD(0)                              |
 			MCDE_TVCRA_TVMODE(regs->tv_mode)                  |
 			MCDE_TVCRA_SDTVMODE(MCDE_TVCRA_SDTVMODE_Y0CBY1CR) |
 			MCDE_TVCRA_CKINV(regs->inv_clk)                   |
-- 
cgit v1.2.3


From 482ccde6012a4fff2864f0473ed1c85cea89c1ea Mon Sep 17 00:00:00 2001
From: Marcel Tunnissen <Marcel.Tuennissen@stericsson.com>
Date: Tue, 8 Mar 2011 13:08:45 +0100
Subject: video: mcde: add support to change av8100 port

Adds support for changing the input pixel format of AV8100 dynamically.

ST-Ericsson ID: AP 322393
Linux-next: ST-Ericsson ID: ER 282779

ST-Ericsson FOSS-OUT ID: Trivial

Depends-On: Ie7a821b8d3965aa65384b4393e3083ef406c8282
Change-Id: I026697638bcf87aff5b54346a80a3fcfb9073ae9
Signed-off-by: Marcel Tunnissen <Marcel.Tuennissen@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/17937
Reviewed-by: Dan JOHANSSON <dan.johansson@stericsson.com>
Tested-by: Marcel TUNNISSEN <marcel.tuennissen@stericsson.com>
---
 drivers/video/mcde/display-av8100.c | 66 +++++++++++++++++++++++++++++++++++--
 drivers/video/mcde/mcde_hw.c        | 12 +++----
 2 files changed, 69 insertions(+), 9 deletions(-)

diff --git a/drivers/video/mcde/display-av8100.c b/drivers/video/mcde/display-av8100.c
index 567a7d0d1f4..b8d6c8806b5 100644
--- a/drivers/video/mcde/display-av8100.c
+++ b/drivers/video/mcde/display-av8100.c
@@ -25,12 +25,15 @@
 struct display_driver_data {
 	struct regulator *cvbs_regulator;
 	bool cvbs_regulator_enabled;
+	bool update_port_pixel_format;
 };
 
 static int hdmi_try_video_mode(
 	struct mcde_display_device *ddev, struct mcde_video_mode *video_mode);
 static int hdmi_set_video_mode(
 	struct mcde_display_device *ddev, struct mcde_video_mode *video_mode);
+static int hdmi_set_pixel_format(
+	struct mcde_display_device *ddev, enum mcde_ovly_pix_fmt format);
 
 static ssize_t store_hdmisdtvswitch(struct device *dev,
 		struct device_attribute *attr, const char *buf, size_t count);
@@ -49,18 +52,62 @@ static ssize_t store_hdmisdtvswitch(struct device *dev,
 			mdev->port->hdmi_sdtv_switch = HDMI_SWITCH;
 			mdev->native_x_res = NATIVE_XRES_HDMI;
 			mdev->native_y_res = NATIVE_YRES_HDMI;
-			mdev->video_mode.force_update = true;
 		} else {
 			dev_dbg(dev, "hdmi/sdtv switch = sdtv\n");
 			mdev->port->hdmi_sdtv_switch = SDTV_SWITCH;
 			mdev->native_x_res = NATIVE_XRES_SDTV;
 			mdev->native_y_res = NATIVE_YRES_SDTV;
-			mdev->video_mode.force_update = true;
 		}
+		/* implicitely read by a memcmp in dss */
+		mdev->video_mode.force_update = true;
+	}
+
+	return count;
+}
+
+static ssize_t store_input_pixel_format(struct device *dev,
+		struct device_attribute *attr, const char *buf, size_t count)
+{
+	struct mcde_display_device *ddev = to_mcde_display_device(dev);
+	struct display_driver_data *driver_data = dev_get_drvdata(&ddev->dev);
+
+	dev_dbg(dev, "%s\n", __func__);
+	if (count > 0) {
+		unsigned long input;
+		if (strict_strtoul(buf, 10, &input) != 0)
+			return -EINVAL;
+		switch (input) {
+		/* intentional fall through */
+		case MCDE_PORTPIXFMT_DSI_16BPP:
+		case MCDE_PORTPIXFMT_DSI_18BPP:
+		case MCDE_PORTPIXFMT_DSI_18BPP_PACKED:
+		case MCDE_PORTPIXFMT_DSI_24BPP:
+		case MCDE_PORTPIXFMT_DSI_YCBCR422:
+			ddev->port->pixel_format = input;
+			break;
+		default:
+			dev_warn(&ddev->dev, "invalid format (%ld)\n",
+								input);
+			return -EINVAL;
+			break;
+		}
+		/* implicitely read by a memcmp in dss */
+		ddev->video_mode.force_update = true;
+		driver_data->update_port_pixel_format = true;
 	}
 
 	return count;
 }
+static ssize_t show_input_pixel_format(struct device *dev,
+				struct device_attribute *attr, char *buf)
+{
+	struct mcde_display_device *ddev = to_mcde_display_device(dev);
+
+	return sprintf(buf, "%d\n", ddev->port->pixel_format);
+}
+
+static DEVICE_ATTR(input_pixel_format, S_IRUGO | S_IWUSR,
+			show_input_pixel_format, store_input_pixel_format);
 
 /* Supported HDMI modes */
 static struct mcde_video_mode video_modes_supp_hdmi[] = {
@@ -304,6 +351,7 @@ static int hdmi_set_video_mode(
 	bool update = 0;
 	union av8100_configuration av8100_config;
 	struct mcde_display_hdmi_platform_data *pdata = dev->dev.platform_data;
+	struct display_driver_data *driver_data = dev_get_drvdata(&dev->dev);
 	struct av8100_status status;
 
 	/* TODO check video_mode_params */
@@ -312,7 +360,7 @@ static int hdmi_set_video_mode(
 		return -EINVAL;
 	}
 
-	dev_vdbg(&dev->dev, "%s:\n", __func__);
+	dev_dbg(&dev->dev, "%s:\n", __func__);
 	dev_vdbg(&dev->dev, "%s:xres:%d yres:%d hbp:%d hfp:%d vbp1:%d vfp1:%d "
 		"vbp2:%d vfp2:%d interlaced:%d\n", __func__,
 		video_mode->xres,
@@ -325,6 +373,11 @@ static int hdmi_set_video_mode(
 		video_mode->vfp2,
 		video_mode->interlaced);
 
+	if (driver_data->update_port_pixel_format) {
+		hdmi_set_pixel_format(dev, dev->pixel_format);
+		driver_data->update_port_pixel_format = false;
+	}
+
 	memset(&(dev->video_mode), 0, sizeof(struct mcde_video_mode));
 	memcpy(&(dev->video_mode), video_mode, sizeof(struct mcde_video_mode));
 
@@ -640,6 +693,7 @@ static int hdmi_set_pixel_format(
 {
 	int ret;
 
+	dev_dbg(&ddev->dev, "%s\n", __func__);
 	ddev->pixel_format = format;
 	mcde_chnl_stop_flow(ddev->chnl_state);
 	ret = mcde_chnl_set_pixel_format(ddev->chnl_state,
@@ -660,6 +714,8 @@ static int hdmi_set_pixel_format(
 			.map_col_ch2 = *map_yv,
 		};
 		ret = mcde_chnl_set_palette(ddev->chnl_state, &palette);
+	} else {
+		ret = mcde_chnl_set_palette(ddev->chnl_state, NULL);
 	}
 
 	ddev->update_flags |= UPDATE_FLAG_PIXEL_FORMAT;
@@ -846,6 +902,9 @@ static int __devinit hdmi_probe(struct mcde_display_device *dev)
 	if (device_create_file(&dev->dev, &dev_attr_hdmisdtvswitch))
 		dev_info(&dev->dev,
 			"Unable to create hdmisdtvswitch attr\n");
+	if (device_create_file(&dev->dev, &dev_attr_input_pixel_format))
+		dev_info(&dev->dev,
+			"Unable to create input_pixel_format attr\n");
 
 	if (pdata->cvbs_regulator_id) {
 		driver_data->cvbs_regulator = regulator_get(&dev->dev,
@@ -876,6 +935,7 @@ static int __devexit hdmi_remove(struct mcde_display_device *dev)
 		dev->dev.platform_data;
 
 	/* Remove sysfs file */
+	device_remove_file(&dev->dev, &dev_attr_input_pixel_format);
 	device_remove_file(&dev->dev, &dev_attr_hdmisdtvswitch);
 
 	dev->set_power_mode(dev, MCDE_DISPLAY_PM_OFF);
diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index 7b15e2f0e80..10420180fe4 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -262,7 +262,6 @@ struct mcde_chnl_state {
 	u16 (*map_b)(u8);
 	bool palette_enable;
 	bool synchronized_update;
-	enum mcde_port_pix_fmt pix_fmt;
 	struct mcde_video_mode vmode;
 	enum mcde_display_rotation rotation;
 	u32 rotbuf1;
@@ -2292,7 +2291,6 @@ static struct mcde_chnl_state *_mcde_chnl_get(enum mcde_chnl chnl_id,
 	chnl->port = *port;
 	chnl->fifo = fifo;
 	chnl->formatter_updated = false;
-	chnl->pix_fmt = port->pixel_format;
 
 	chnl->blend_en = true;
 	chnl->blend_ctrl = MCDE_CRA0_BLENDCTRL_SOURCE;
@@ -2318,7 +2316,7 @@ static int _mcde_chnl_apply(struct mcde_chnl_state *chnl)
 	}
 	/* REVIEW: 180 deg? */
 
-	chnl->regs.bpp = portfmt2bpp(chnl->pix_fmt);
+	chnl->regs.bpp = portfmt2bpp(chnl->port.pixel_format);
 	chnl->regs.synchronized_update = chnl->synchronized_update;
 	chnl->regs.roten = roten;
 	chnl->regs.rotdir = rotdir;
@@ -2330,7 +2328,8 @@ static int _mcde_chnl_apply(struct mcde_chnl_state *chnl)
 	chnl->regs.map_b = chnl->map_b;
 	if (chnl->port.type == MCDE_PORTTYPE_DSI) {
 		chnl->regs.clksel = MCDE_CRA1_CLKSEL_166MHZ;
-		chnl->regs.dsipacking = portfmt2dsipacking(chnl->pix_fmt);
+		chnl->regs.dsipacking =
+				portfmt2dsipacking(chnl->port.pixel_format);
 	} else if (chnl->port.type == MCDE_PORTTYPE_DPI) {
 		if (chnl->port.phy.dpi.tv_mode) {
 			chnl->regs.internal_clk = false;
@@ -2342,7 +2341,8 @@ static int _mcde_chnl_apply(struct mcde_chnl_state *chnl)
 		} else {
 			chnl->regs.internal_clk = true;
 			chnl->regs.clksel = MCDE_CRA1_CLKSEL_LCD;
-			chnl->regs.cdwin = portfmt2cdwin(chnl->pix_fmt);
+			chnl->regs.cdwin =
+					portfmt2cdwin(chnl->port.pixel_format);
 			chnl->regs.bcd = (chnl->port.phy.dpi.clock_div < 2);
 			if (!chnl->regs.bcd)
 				chnl->regs.pcd =
@@ -2525,7 +2525,7 @@ int mcde_chnl_set_pixel_format(struct mcde_chnl_state *chnl,
 
 	if (!chnl->reserved)
 		return -EINVAL;
-	chnl->pix_fmt = pix_fmt;
+	chnl->port.pixel_format = pix_fmt;
 
 	dev_vdbg(&mcde_dev->dev, "%s exit\n", __func__);
 
-- 
cgit v1.2.3


From 016a558d80804141450aafc5983c80eacef070fb Mon Sep 17 00:00:00 2001
From: Marcel Tunnissen <Marcel.Tuennissen@stericsson.com>
Date: Thu, 10 Mar 2011 09:19:12 +0100
Subject: video: mcde: Fix field swap for CVBS by AV8100

Fixes the problem that the interlaced fields are swapped sometimes after
configuring CVBS out through AV8100.

ST-Ericsson ID: ER 323997
Linux-next: ST-Ericsson ID: ER 282779

ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I1ff10612f05fce1cdd1d991b50513a93153730e4
Signed-off-by: Marcel Tunnissen <Marcel.Tuennissen@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/18327
Tested-by: Marcel TUNNISSEN <marcel.tuennissen@stericsson.com>
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Reviewed-by: Dan JOHANSSON <dan.johansson@stericsson.com>
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
---
 drivers/video/mcde/display-av8100.c | 141 ++++++++++++++++--------------------
 1 file changed, 61 insertions(+), 80 deletions(-)

diff --git a/drivers/video/mcde/display-av8100.c b/drivers/video/mcde/display-av8100.c
index b8d6c8806b5..163af1c3361 100644
--- a/drivers/video/mcde/display-av8100.c
+++ b/drivers/video/mcde/display-av8100.c
@@ -348,7 +348,6 @@ static int hdmi_set_video_mode(
 	struct mcde_display_device *dev, struct mcde_video_mode *video_mode)
 {
 	int ret;
-	bool update = 0;
 	union av8100_configuration av8100_config;
 	struct mcde_display_hdmi_platform_data *pdata = dev->dev.platform_data;
 	struct display_driver_data *driver_data = dev_get_drvdata(&dev->dev);
@@ -437,15 +436,35 @@ static int hdmi_set_video_mode(
 		return -EFAULT;
 	}
 
-	/* Set HDMI mode to OFF */
-	av8100_config.hdmi_format.hdmi_mode = AV8100_HDMI_OFF;
-	av8100_config.hdmi_format.dvi_format = AV8100_DVI_CTRL_CTL0;
-	av8100_config.hdmi_format.hdmi_format = AV8100_HDMI;
-	if (av8100_conf_prep(AV8100_COMMAND_HDMI, &av8100_config))
+	/*
+	 * Don't look at dev->port->hdmi_sdtv_switch; it states only which
+	 * one should be started, not which one is currently working
+	 */
+	if (av8100_conf_get(AV8100_COMMAND_HDMI, &av8100_config))
 		return -EFAULT;
+	if (av8100_config.hdmi_format.hdmi_mode == AV8100_HDMI_ON) {
+		/* Set HDMI mode to OFF */
+		av8100_config.hdmi_format.hdmi_mode = AV8100_HDMI_OFF;
+		av8100_config.hdmi_format.dvi_format = AV8100_DVI_CTRL_CTL0;
+		av8100_config.hdmi_format.hdmi_format = AV8100_HDMI;
+		if (av8100_conf_prep(AV8100_COMMAND_HDMI, &av8100_config))
+			return -EFAULT;
 
-	if (av8100_conf_w(AV8100_COMMAND_HDMI, NULL, NULL, I2C_INTERFACE))
+		if (av8100_conf_w(AV8100_COMMAND_HDMI, NULL, NULL,
+								I2C_INTERFACE))
+			return -EFAULT;
+	}
+	if (av8100_conf_get(AV8100_COMMAND_DENC, &av8100_config))
 		return -EFAULT;
+	if (av8100_config.denc_format.enable) {
+		/* Turn off DENC */
+		av8100_config.denc_format.enable = 0;
+		if (av8100_conf_prep(AV8100_COMMAND_DENC, &av8100_config))
+			return -EFAULT;
+		if (av8100_conf_w(AV8100_COMMAND_DENC, NULL, NULL,
+								I2C_INTERFACE))
+			return -EFAULT;
+	}
 
 	/* Get current av8100 video output format */
 	ret = av8100_conf_get(AV8100_COMMAND_VIDEO_OUTPUT_FORMAT,
@@ -618,55 +637,6 @@ static int hdmi_set_video_mode(
 		return ret;
 	}
 
-	/* Get current av8100 video denc settings format */
-	ret = av8100_conf_get(AV8100_COMMAND_DENC,
-		&av8100_config);
-	if (ret) {
-		dev_err(&dev->dev, "%s:av8100_conf_get "
-				"AV8100_COMMAND_DENC failed\n", __func__);
-		return ret;
-	}
-
-	if (dev->port->hdmi_sdtv_switch == SDTV_SWITCH) {
-		update = true;
-		if (dev->video_mode.yres == NATIVE_YRES_SDTV) {
-			av8100_config.denc_format.standard_selection =
-					AV8100_PAL_BDGHI;
-			av8100_config.denc_format.cvbs_video_format  =
-					AV8100_CVBS_625;
-		} else {
-			av8100_config.denc_format.standard_selection =
-					AV8100_NTSC_M;
-			av8100_config.denc_format.cvbs_video_format  =
-					AV8100_CVBS_525;
-		}
-	} else
-		update = (av8100_config.denc_format.enable != 0);
-
-	if (update) {
-		if (dev->port->hdmi_sdtv_switch == SDTV_SWITCH)
-			av8100_config.denc_format.enable = 1;
-		else
-			av8100_config.denc_format.enable = 0;
-
-		ret = av8100_conf_prep(AV8100_COMMAND_DENC,
-			&av8100_config);
-		if (ret) {
-			dev_err(&dev->dev, "%s:av8100_conf_prep "
-				"AV8100_COMMAND_DENC failed\n", __func__);
-			return ret;
-		}
-
-		/* TODO: prepare depending on OUT fmt */
-		ret = av8100_conf_w(AV8100_COMMAND_DENC,
-			NULL, NULL, I2C_INTERFACE);
-		if (ret) {
-			dev_err(&dev->dev, "%s:av8100_conf_w "
-				"AV8100_COMMAND_DENC failed\n", __func__);
-			return ret;
-		}
-	}
-
 	dev->update_flags |= UPDATE_FLAG_VIDEO_MODE;
 	dev->first_update = true;
 
@@ -748,31 +718,36 @@ static int hdmi_on_first_update(struct mcde_display_device *dev)
 
 	dev->first_update = false;
 
-	/* Get current av8100 video denc settings format */
-	ret = av8100_conf_get(AV8100_COMMAND_DENC,
-		&av8100_config);
-	if (ret) {
-		dev_err(&dev->dev, "%s:av8100_conf_get "
-				"AV8100_COMMAND_DENC failed\n", __func__);
-		return ret;
-	}
-
 	/*
+	 * Prepare HDMI configuration
 	 * Avoid simultaneous output of DENC and HDMI.
 	 * Only one of them should be enabled.
+	 * Note HDMI and DENC are always turned off in set_video_mode.
 	 */
-	if (av8100_config.denc_format.enable)
-		av8100_config.hdmi_format.hdmi_mode = AV8100_HDMI_OFF;
-	else
+	if (dev->port->hdmi_sdtv_switch == SDTV_SWITCH) {
+		av8100_config.denc_format.enable = 1;
+		if (dev->video_mode.yres == NATIVE_YRES_SDTV) {
+			av8100_config.denc_format.standard_selection =
+					AV8100_PAL_BDGHI;
+			av8100_config.denc_format.cvbs_video_format  =
+					AV8100_CVBS_625;
+		} else {
+			av8100_config.denc_format.standard_selection =
+					AV8100_NTSC_M;
+			av8100_config.denc_format.cvbs_video_format  =
+					AV8100_CVBS_525;
+		}
+		ret = av8100_conf_prep(AV8100_COMMAND_DENC, &av8100_config);
+	} else {
 		av8100_config.hdmi_format.hdmi_mode = AV8100_HDMI_ON;
+		av8100_config.hdmi_format.hdmi_format = AV8100_HDMI;
+		av8100_config.hdmi_format.dvi_format = AV8100_DVI_CTRL_CTL0;
+		ret = av8100_conf_prep(AV8100_COMMAND_HDMI, &av8100_config);
+	}
 
-	av8100_config.hdmi_format.hdmi_format = AV8100_HDMI;
-	av8100_config.hdmi_format.dvi_format = AV8100_DVI_CTRL_CTL0;
-
-	ret = av8100_conf_prep(AV8100_COMMAND_HDMI, &av8100_config);
 	if (ret) {
 		dev_err(&dev->dev, "%s:av8100_conf_prep "
-			"AV8100_COMMAND_HDMI failed\n", __func__);
+			"AV8100_COMMAND_HDMI/DENC failed\n", __func__);
 		return ret;
 	}
 
@@ -784,11 +759,16 @@ static int hdmi_on_first_update(struct mcde_display_device *dev)
 		return ret;
 	}
 
-	ret = av8100_conf_w(AV8100_COMMAND_HDMI, NULL,
-		NULL, I2C_INTERFACE);
+	if (dev->port->hdmi_sdtv_switch == SDTV_SWITCH)
+		ret = av8100_conf_w(AV8100_COMMAND_DENC, NULL, NULL,
+								I2C_INTERFACE);
+	else
+		ret = av8100_conf_w(AV8100_COMMAND_HDMI, NULL, NULL,
+								I2C_INTERFACE);
 	if (ret) {
 		dev_err(&dev->dev, "%s:av8100_conf_w "
-			"AV8100_COMMAND_HDMI failed\n", __func__);
+			"AV8100_COMMAND_HDMI/DENC failed\n", __func__);
+		return ret;
 	}
 
 	return ret;
@@ -802,7 +782,7 @@ static int hdmi_set_power_mode(struct mcde_display_device *ddev,
 
 	/* OFF -> STANDBY */
 	if (ddev->power_mode == MCDE_DISPLAY_PM_OFF &&
-		power_mode != MCDE_DISPLAY_PM_OFF) {
+					power_mode != MCDE_DISPLAY_PM_OFF) {
 		if (ddev->platform_enable) {
 			ret = ddev->platform_enable(ddev);
 			if (ret)
@@ -823,19 +803,20 @@ static int hdmi_set_power_mode(struct mcde_display_device *ddev,
 	}
 	/* STANDBY -> ON */
 	if (ddev->power_mode == MCDE_DISPLAY_PM_STANDBY &&
-		power_mode == MCDE_DISPLAY_PM_ON) {
+				power_mode == MCDE_DISPLAY_PM_ON) {
+
 		ddev->power_mode = MCDE_DISPLAY_PM_ON;
 		goto set_power_and_exit;
 	}
 	/* ON -> STANDBY */
 	else if (ddev->power_mode == MCDE_DISPLAY_PM_ON &&
-		power_mode <= MCDE_DISPLAY_PM_STANDBY) {
+				power_mode <= MCDE_DISPLAY_PM_STANDBY) {
 		ddev->power_mode = MCDE_DISPLAY_PM_STANDBY;
 	}
 
 	/* STANDBY -> OFF */
 	if (ddev->power_mode == MCDE_DISPLAY_PM_STANDBY &&
-		power_mode == MCDE_DISPLAY_PM_OFF) {
+				power_mode == MCDE_DISPLAY_PM_OFF) {
 		memset(&(ddev->video_mode), 0, sizeof(struct mcde_video_mode));
 		ret = av8100_powerdown();
 		if (ret)
-- 
cgit v1.2.3


From 1ee9ad0854b3caae744b79295c5d36e0d87e1b92 Mon Sep 17 00:00:00 2001
From: Philippe Langlais <philippe.langlais@stericsson.com>
Date: Tue, 11 Oct 2011 09:23:21 +0100
Subject: Porting b2r2 portion of video driver from .35 to .38

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
---
 drivers/video/Kconfig                            |    1 +
 drivers/video/Makefile                           |    1 +
 drivers/video/b2r2/Kconfig                       |  134 +
 drivers/video/b2r2/Makefile                      |   15 +
 drivers/video/b2r2/b2r2_core.c                   | 2666 ++++++++++++++++++
 drivers/video/b2r2/b2r2_core.h                   |  222 ++
 drivers/video/b2r2/b2r2_debug.c                  |  343 +++
 drivers/video/b2r2/b2r2_debug.h                  |  104 +
 drivers/video/b2r2/b2r2_filters.c                |  372 +++
 drivers/video/b2r2/b2r2_filters.h                |   71 +
 drivers/video/b2r2/b2r2_generic.c                | 2839 +++++++++++++++++++
 drivers/video/b2r2/b2r2_generic.h                |   51 +
 drivers/video/b2r2/b2r2_global.h                 |  119 +
 drivers/video/b2r2/b2r2_hw.h                     |  637 +++++
 drivers/video/b2r2/b2r2_input_validation.c       |  400 +++
 drivers/video/b2r2/b2r2_input_validation.h       |   28 +
 drivers/video/b2r2/b2r2_internal.h               |  360 +++
 drivers/video/b2r2/b2r2_kernel_if.c              |   37 +
 drivers/video/b2r2/b2r2_mem_alloc.c              |  726 +++++
 drivers/video/b2r2/b2r2_mem_alloc.h              |  140 +
 drivers/video/b2r2/b2r2_node_gen.c               |   80 +
 drivers/video/b2r2/b2r2_node_split.c             | 3283 ++++++++++++++++++++++
 drivers/video/b2r2/b2r2_node_split.h             |  121 +
 drivers/video/b2r2/b2r2_profiler/Makefile        |    3 +
 drivers/video/b2r2/b2r2_profiler/b2r2_profiler.c |  258 ++
 drivers/video/b2r2/b2r2_profiler_api.h           |   66 +
 drivers/video/b2r2/b2r2_profiler_socket.c        |  105 +
 drivers/video/b2r2/b2r2_profiler_socket.h        |   22 +
 drivers/video/b2r2/b2r2_structures.h             |  226 ++
 drivers/video/b2r2/b2r2_timing.c                 |   22 +
 drivers/video/b2r2/b2r2_timing.h                 |   22 +
 drivers/video/b2r2/b2r2_utils.c                  |  361 +++
 drivers/video/b2r2/b2r2_utils.h                  |   51 +
 include/video/b2r2_blt.h                         |  581 ++++
 34 files changed, 14467 insertions(+)
 create mode 100644 drivers/video/b2r2/Kconfig
 create mode 100644 drivers/video/b2r2/Makefile
 create mode 100644 drivers/video/b2r2/b2r2_core.c
 create mode 100644 drivers/video/b2r2/b2r2_core.h
 create mode 100644 drivers/video/b2r2/b2r2_debug.c
 create mode 100644 drivers/video/b2r2/b2r2_debug.h
 create mode 100644 drivers/video/b2r2/b2r2_filters.c
 create mode 100644 drivers/video/b2r2/b2r2_filters.h
 create mode 100644 drivers/video/b2r2/b2r2_generic.c
 create mode 100644 drivers/video/b2r2/b2r2_generic.h
 create mode 100644 drivers/video/b2r2/b2r2_global.h
 create mode 100644 drivers/video/b2r2/b2r2_hw.h
 create mode 100644 drivers/video/b2r2/b2r2_input_validation.c
 create mode 100644 drivers/video/b2r2/b2r2_input_validation.h
 create mode 100644 drivers/video/b2r2/b2r2_internal.h
 create mode 100644 drivers/video/b2r2/b2r2_kernel_if.c
 create mode 100644 drivers/video/b2r2/b2r2_mem_alloc.c
 create mode 100644 drivers/video/b2r2/b2r2_mem_alloc.h
 create mode 100644 drivers/video/b2r2/b2r2_node_gen.c
 create mode 100644 drivers/video/b2r2/b2r2_node_split.c
 create mode 100644 drivers/video/b2r2/b2r2_node_split.h
 create mode 100644 drivers/video/b2r2/b2r2_profiler/Makefile
 create mode 100644 drivers/video/b2r2/b2r2_profiler/b2r2_profiler.c
 create mode 100644 drivers/video/b2r2/b2r2_profiler_api.h
 create mode 100644 drivers/video/b2r2/b2r2_profiler_socket.c
 create mode 100644 drivers/video/b2r2/b2r2_profiler_socket.h
 create mode 100644 drivers/video/b2r2/b2r2_structures.h
 create mode 100644 drivers/video/b2r2/b2r2_timing.c
 create mode 100644 drivers/video/b2r2/b2r2_timing.h
 create mode 100644 drivers/video/b2r2/b2r2_utils.c
 create mode 100644 drivers/video/b2r2/b2r2_utils.h
 create mode 100644 include/video/b2r2_blt.h

diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index d1901fd219b..93a7c86171e 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -2418,6 +2418,7 @@ source "drivers/video/omap2/Kconfig"
 source "drivers/video/exynos/Kconfig"
 source "drivers/video/backlight/Kconfig"
 source "drivers/video/av8100/Kconfig"
+source "drivers/video/b2r2/Kconfig"
 
 if VT
 	source "drivers/video/console/Kconfig"
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index edaf6b8d921..3a4ad2ebe33 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -141,6 +141,7 @@ obj-$(CONFIG_FB_OMAP)             += omap/
 obj-y                             += omap2/
 obj-$(CONFIG_FB_MCDE)		  += mcde/
 obj-$(CONFIG_AV8100)		  += av8100/
+obj-y				  += b2r2/
 obj-$(CONFIG_XEN_FBDEV_FRONTEND)  += xen-fbfront.o
 obj-$(CONFIG_FB_CARMINE)          += carminefb.o
 obj-$(CONFIG_FB_MB862XX)	  += mb862xx/
diff --git a/drivers/video/b2r2/Kconfig b/drivers/video/b2r2/Kconfig
new file mode 100644
index 00000000000..8cc81876de7
--- /dev/null
+++ b/drivers/video/b2r2/Kconfig
@@ -0,0 +1,134 @@
+config FB_B2R2
+	tristate "B2R2 engine support"
+	default n
+	help
+	  B2R2 engine does various bit-blitting operations,post-processor operations
+	  and various compositions.
+
+config B2R2_PLUG_CONF
+	bool "B2R2 bus plug configuration"
+	depends on FB_B2R2
+	default n
+	help
+	  Configures how B2R2 access the memory bus. Enabling this will increase
+	  the performance of B2R2 at the cost of using the bus more heavily.
+
+	  If this is set to 'n', the hardware defaults will be used.
+
+choice
+	prompt "Opcode size"
+	depends on B2R2_PLUG_CONF
+	default B2R2_OPSIZE_64
+
+	config B2R2_OPSIZE_8
+		bool "8 bytes"
+	config B2R2_OPSIZE_16
+		bool "16 bytes"
+	config B2R2_OPSIZE_32
+		bool "32 bytes"
+	config B2R2_OPSIZE_64
+		bool "64 bytes"
+
+endchoice
+
+choice
+	prompt "Chunk size"
+	depends on B2R2_PLUG_CONF
+	default B2R2_CHSIZE_128
+
+	config B2R2_CHSIZE_1
+		bool "1 op"
+	config B2R2_CHSIZE_2
+		bool "2 ops"
+	config B2R2_CHSIZE_4
+		bool "4 ops"
+	config B2R2_CHSIZE_8
+		bool "8 ops"
+	config B2R2_CHSIZE_16
+		bool "16 ops"
+	config B2R2_CHSIZE_32
+		bool "32 ops"
+	config B2R2_CHSIZE_64
+		bool "64 ops"
+	config B2R2_CHSIZE_128
+		bool "128 ops"
+endchoice
+
+choice
+	prompt "Message size"
+	depends on B2R2_PLUG_CONF
+	default B2R2_MGSIZE_128
+
+	config B2R2_MGSIZE_1
+		bool "1 chunk"
+	config B2R2_MGSIZE_2
+		bool "2 chunks"
+	config B2R2_MGSIZE_4
+		bool "4 chunks"
+	config B2R2_MGSIZE_8
+		bool "8 s"
+	config B2R2_MGSIZE_16
+		bool "16 chunks"
+	config B2R2_MGSIZE_32
+		bool "32 chunks"
+	config B2R2_MGSIZE_64
+		bool "64 chunks"
+	config B2R2_MGSIZE_128
+		bool "128 chunks"
+endchoice
+
+choice
+	prompt "Page size"
+	depends on B2R2_PLUG_CONF
+	default B2R2_PGSIZE_256
+
+	config B2R2_PGSIZE_64
+		bool "64 bytes"
+	config B2R2_PGSIZE_128
+		bool "128 bytes"
+	config B2R2_PGSIZE_256
+		bool "256 bytes"
+endchoice
+
+config B2R2_DEBUG
+	bool "B2R2 debugging"
+	default n
+	depends on FB_B2R2
+	help
+	  Enable debugging features for the B2R2 driver.
+
+config B2R2_PROFILER
+	tristate "B2R2 profiler"
+	default n
+	depends on FB_B2R2
+	help
+	  Enables the profiler for the B2R2 driver.
+
+	  It is recommended to build this as a module, since the configuration
+	  of filters etc. is done at load time.
+
+config B2R2_GENERIC
+	bool "B2R2 generic path"
+	default y
+	depends on FB_B2R2
+	help
+	  Enables support for the generic path in the B2R2 driver. This path should
+	  be used when there is no optimized implementation for a request.
+
+choice
+	prompt "Generic usage mode"
+	depends on B2R2_GENERIC
+	default B2R2_GENERIC_FALLBACK
+
+	config B2R2_GENERIC_FALLBACK
+		bool "Fallback"
+		help
+		  The optimized path will be used for all supported operations, and the
+		  generic path will be used as a fallback for the ones not implemented.
+
+	config B2R2_GENERIC_ONLY
+		bool "Always"
+		help
+		  The generic path will be used for all operations.
+
+endchoice
diff --git a/drivers/video/b2r2/Makefile b/drivers/video/b2r2/Makefile
new file mode 100644
index 00000000000..0150ad6f761
--- /dev/null
+++ b/drivers/video/b2r2/Makefile
@@ -0,0 +1,15 @@
+# Make file for compiling and loadable module B2R2
+
+obj-$(CONFIG_FB_B2R2) += b2r2.o
+
+b2r2-objs = b2r2_blt_main.o b2r2_core.o b2r2_mem_alloc.o b2r2_generic.o b2r2_node_gen.o b2r2_node_split.o b2r2_profiler_socket.o b2r2_timing.o b2r2_filters.o b2r2_utils.o b2r2_input_validation.o
+
+ifdef CONFIG_B2R2_DEBUG
+b2r2-objs += b2r2_debug.o
+endif
+
+ifeq ($(CONFIG_FB_B2R2),m)
+obj-y += b2r2_kernel_if.o
+endif
+
+obj-$(CONFIG_B2R2_PROFILER) += b2r2_profiler/
diff --git a/drivers/video/b2r2/b2r2_core.c b/drivers/video/b2r2/b2r2_core.c
new file mode 100644
index 00000000000..7a11a301d11
--- /dev/null
+++ b/drivers/video/b2r2/b2r2_core.c
@@ -0,0 +1,2666 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2010
+ *
+ * ST-Ericsson B2R2 core driver
+ *
+ * Author: Robert Fekete <robert.fekete@stericsson.com>
+ * Author: Paul Wannback
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+
+/*
+ * TODO: Clock address from platform data
+ * Platform data should have string id instead of numbers
+ * b2r2_remove, some type of runtime problem when kernel hacking
+ * debug features on
+ *
+ * Is there already a priority list in kernel?
+ * Is it possible to handle clock using clock framework?
+ * uTimeOut, use mdelay instead?
+ * Measure performance
+ *
+ * Exchange our home-cooked ref count with kernel kref? See
+ *    http://lwn.net/Articles/336224/
+ *
+ * B2R2:
+ * Source fill 2 bug
+ * Check with Symbian?
+ */
+
+/* include file */
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/wait.h>
+#include <linux/sched.h>
+#include <linux/uaccess.h>
+#include <linux/platform_device.h>
+#include <linux/io.h>
+#include <linux/interrupt.h>
+#include <linux/delay.h>
+#ifdef CONFIG_DEBUG_FS
+#include <linux/debugfs.h>
+#endif
+#include <linux/jiffies.h>
+#include <linux/timer.h>
+#include <linux/clk.h>
+#include <linux/regulator/consumer.h>
+#include <linux/slab.h>
+#include <linux/err.h>
+
+#include "b2r2_core.h"
+#include "b2r2_global.h"
+#include "b2r2_structures.h"
+#include "b2r2_internal.h"
+#include "b2r2_profiler_api.h"
+#include "b2r2_timing.h"
+#include "b2r2_debug.h"
+
+/**
+ * B2R2_DRIVER_TIMEOUT_VALUE - Busy loop timeout after soft reset
+ */
+#define B2R2_DRIVER_TIMEOUT_VALUE (1500)
+
+/**
+ * B2R2_CLK_FLAG - Value to write into clock reg to turn clock on
+ */
+#define B2R2_CLK_FLAG (0x125)
+
+/**
+ * DEBUG_CHECK_ADDREF_RELEASE - Define this to enable addref / release debug
+ */
+#define DEBUG_CHECK_ADDREF_RELEASE 1
+
+#ifdef CONFIG_DEBUG_FS
+/**
+ * HANDLE_TIMEOUTED_JOBS - Define this to check jobs for timeout and cancel them
+ */
+#define HANDLE_TIMEOUTED_JOBS 1
+#endif
+
+/**
+ * B2R2_CLOCK_ALWAYS_ON - Define this to disable power save clock turn off
+ */
+/* #define B2R2_CLOCK_ALWAYS_ON 1 */
+
+/**
+ * START_SENTINEL - Watch guard to detect job overwrites
+ */
+#define START_SENTINEL 0xBABEDEEA
+
+/**
+ * STOP_SENTINEL - Watch guard to detect job overwrites
+ */
+#define END_SENTINEL 0xDADBDCDD
+
+/**
+ * B2R2_CORE_LOWEST_PRIO - Lowest prio allowed
+ */
+#define B2R2_CORE_LOWEST_PRIO -19
+/**
+ * B2R2_CORE_HIGHEST_PRIO - Highest prio allowed
+ */
+#define B2R2_CORE_HIGHEST_PRIO 20
+
+
+/**
+ * B2R2 Hardware defines below
+ */
+
+/* - BLT_AQ_CTL */
+#define	B2R2_AQ_Enab			(0x80000000)
+#define B2R2_AQ_PRIOR_0 		(0x0)
+#define	B2R2_AQ_PRIOR_1 		(0x1)
+#define	B2R2_AQ_PRIOR_2			(0x2)
+#define	B2R2_AQ_PRIOR_3			(0x3)
+#define B2R2_AQ_NODE_REPEAT_INT	(0x100000)
+#define B2R2_AQ_STOP_INT		(0x200000)
+#define B2R2_AQ_LNA_REACH_INT	(0x400000)
+#define B2R2_AQ_COMPLETED_INT	(0x800000)
+
+/* - BLT_CTL */
+#define	B2R2BLT_CTLGLOBAL_soft_reset	(0x80000000)
+#define	B2R2BLT_CTLStep_By_Step		(0x20000000)
+#define	B2R2BLT_CTLBig_not_little	(0x10000000)
+#define	B2R2BLT_CTLMask			(0xb0000000)
+#define	B2R2BLT_CTLTestMask		(0xb0000000)
+#define	B2R2BLT_CTLInitialValue		(0x0)
+#define	B2R2BLT_CTLAccessType		(INITIAL_TEST)
+#define	B2R2BLT_CTL			(0xa00)
+
+/* - BLT_ITS */
+#define	B2R2BLT_ITSRLD_ERROR		(0x80000000)
+#define	B2R2BLT_ITSAQ4_Node_Notif	(0x8000000)
+#define	B2R2BLT_ITSAQ4_Node_repeat	(0x4000000)
+#define	B2R2BLT_ITSAQ4_Stopped		(0x2000000)
+#define	B2R2BLT_ITSAQ4_LNA_Reached	(0x1000000)
+#define	B2R2BLT_ITSAQ3_Node_Notif	(0x800000)
+#define	B2R2BLT_ITSAQ3_Node_repeat	(0x400000)
+#define	B2R2BLT_ITSAQ3_Stopped		(0x200000)
+#define	B2R2BLT_ITSAQ3_LNA_Reached	(0x100000)
+#define	B2R2BLT_ITSAQ2_Node_Notif	(0x80000)
+#define	B2R2BLT_ITSAQ2_Node_repeat	(0x40000)
+#define	B2R2BLT_ITSAQ2_Stopped		(0x20000)
+#define	B2R2BLT_ITSAQ2_LNA_Reached	(0x10000)
+#define	B2R2BLT_ITSAQ1_Node_Notif	(0x8000)
+#define	B2R2BLT_ITSAQ1_Node_repeat	(0x4000)
+#define	B2R2BLT_ITSAQ1_Stopped		(0x2000)
+#define	B2R2BLT_ITSAQ1_LNA_Reached	(0x1000)
+#define	B2R2BLT_ITSCQ2_Repaced		(0x80)
+#define	B2R2BLT_ITSCQ2_Node_Notif	(0x40)
+#define	B2R2BLT_ITSCQ2_retriggered	(0x20)
+#define	B2R2BLT_ITSCQ2_completed	(0x10)
+#define	B2R2BLT_ITSCQ1_Repaced		(0x8)
+#define	B2R2BLT_ITSCQ1_Node_Notif	(0x4)
+#define	B2R2BLT_ITSCQ1_retriggered	(0x2)
+#define	B2R2BLT_ITSCQ1_completed	(0x1)
+#define	B2R2BLT_ITSMask			(0x8ffff0ff)
+#define	B2R2BLT_ITSTestMask		(0x8ffff0ff)
+#define	B2R2BLT_ITSInitialValue		(0x0)
+#define	B2R2BLT_ITSAccessType		(INITIAL_TEST)
+#define	B2R2BLT_ITS			(0xa04)
+
+/* - BLT_STA1 */
+#define	B2R2BLT_STA1BDISP_IDLE		(0x1)
+#define	B2R2BLT_STA1Mask		(0x1)
+#define	B2R2BLT_STA1TestMask		(0x1)
+#define	B2R2BLT_STA1InitialValue	(0x1)
+#define	B2R2BLT_STA1AccessType		(INITIAL_TEST)
+#define	B2R2BLT_STA1			(0xa08)
+
+
+#ifdef DEBUG_CHECK_ADDREF_RELEASE
+
+/**
+ * struct addref_release - Represents one addref or release. Used
+ *                         to debug addref / release problems
+ *
+ * @addref: true if this represents an addref else it represents
+ *          a release.
+ * @job: The job that was referenced
+ * @caller: The caller of the addref or release
+ * @ref_count: The job reference count after addref / release
+ */
+struct addref_release {
+	bool addref;
+	struct b2r2_core_job *job;
+	const char *caller;
+	int ref_count;
+};
+
+#endif
+
+/**
+ * struct b2r2_core - Administration data for B2R2 core
+ *
+ * @lock: Spin lock protecting the b2r2_core structure and the B2R2 HW
+ * @hw: B2R2 registers memory mapped
+ * @pmu_b2r2_clock: Control of B2R2 clock
+ * @log_dev: Device used for logging via dev_... functions
+ *
+ * @prio_queue: Queue of jobs sorted in priority order
+ * @active_jobs: Array containing pointer to zero or one job per queue
+ * @n_active_jobs: Number of active jobs
+ * @jiffies_last_active: jiffie value when adding last active job
+ * @jiffies_last_irq: jiffie value when last irq occured
+ * @timeout_work: Work structure for timeout work
+ *
+ * @next_job_id: Contains the job id that will be assigned to the next
+ *               added job.
+ *
+ * @clock_request_count: When non-zero, clock is on
+ * @clock_off_timer: Kernel timer to handle delayed turn off of clock
+ *
+ * @work_queue: Work queue to handle done jobs (callbacks) and timeouts in
+ *              non-interrupt context.
+ *
+ * @stat_n_irq: Number of interrupts (statistics)
+ * @stat_n_jobs_added: Number of jobs added (statistics)
+ * @stat_n_jobs_removed: Number of jobs removed (statistics)
+ * @stat_n_jobs_in_prio_list: Number of jobs in prio list (statistics)
+ *
+ * @debugfs_root_dir: Root directory for B2R2 debugfs
+ *
+ * @ar: Circular array of addref / release debug structs
+ * @ar_write: Where next write will occur
+ * @ar_read: First valid place to read. When ar_read == ar_write then
+ *           the array is empty.
+ */
+struct b2r2_core {
+	spinlock_t       lock;
+
+	struct b2r2_memory_map *hw;
+
+	u8 op_size;
+	u8 ch_size;
+	u8 pg_size;
+	u8 mg_size;
+	u16 min_req_time;
+	int irq;
+
+	struct device *log_dev;
+
+	struct list_head prio_queue;
+
+	struct b2r2_core_job *active_jobs[B2R2_CORE_QUEUE_NO_OF];
+	unsigned long    n_active_jobs;
+
+	unsigned long    jiffies_last_active;
+	unsigned long    jiffies_last_irq;
+#ifdef HANDLE_TIMEOUTED_JOBS
+	struct delayed_work     timeout_work;
+#endif
+	int              next_job_id;
+
+	unsigned long    clock_request_count;
+	struct timer_list clock_off_timer;
+
+	struct workqueue_struct *work_queue;
+
+	/* Statistics */
+	unsigned long    stat_n_irq;
+	unsigned long    stat_n_jobs_added;
+	unsigned long    stat_n_jobs_removed;
+
+	unsigned long    stat_n_jobs_in_prio_list;
+
+#ifdef CONFIG_DEBUG_FS
+	struct dentry *debugfs_root_dir;
+	struct dentry *debugfs_regs_dir;
+#endif
+
+#ifdef DEBUG_CHECK_ADDREF_RELEASE
+	/* Tracking release bug...*/
+	struct addref_release ar[100];
+	int ar_write;
+	int ar_read;
+#endif
+
+	/* Power management variables */
+	struct mutex domain_lock;
+	struct delayed_work domain_disable_work;
+
+	/*
+	 * We need to keep track of both the number of domain_enable/disable()
+	 * calls and whether the power was actually turned off, since the
+	 * power off is done in a delayed job.
+	 */
+	bool domain_enabled;
+	int domain_request_count;
+
+	struct clk *b2r2_clock;
+	struct regulator *b2r2_reg;
+};
+
+/**
+ * b2r2_core - Administration data for B2R2 core (singleton)
+ */
+static struct b2r2_core   b2r2_core;
+
+/* Local functions */
+static void check_prio_list(bool atomic);
+static void  clear_interrupts(void);
+static void trigger_job(struct b2r2_core_job *job);
+static void exit_job_list(struct list_head *job_list);
+static int get_next_job_id(void);
+static void job_work_function(struct work_struct *ptr);
+static void init_job(struct b2r2_core_job *job);
+static void insert_into_prio_list(struct b2r2_core_job *job);
+static struct b2r2_core_job *find_job_in_list(
+	int job_id,
+	struct list_head *list);
+static struct b2r2_core_job *find_job_in_active_jobs(int job_id);
+static struct b2r2_core_job *find_tag_in_list(
+	int tag,
+	struct list_head *list);
+static struct b2r2_core_job *find_tag_in_active_jobs(int tag);
+
+static int domain_enable(void);
+static void domain_disable(void);
+
+static void stop_queue(enum b2r2_core_queue queue);
+
+#ifdef HANDLE_TIMEOUTED_JOBS
+static void printk_regs(void);
+static int hw_reset(void);
+static void timeout_work_function(struct work_struct *ptr);
+#endif
+
+static void reset_hw_timer(struct b2r2_core_job *job);
+static void start_hw_timer(struct b2r2_core_job *job);
+static void stop_hw_timer(struct b2r2_core_job *job);
+
+static int init_hw(void);
+static void exit_hw(void);
+
+/* Tracking release bug... */
+#ifdef DEBUG_CHECK_ADDREF_RELEASE
+/**
+ * ar_add() - Adds an addref or a release to the array
+ *
+ * @job: The job that has been referenced
+ * @caller: The caller of addref / release
+ * @addref: true if it is an addref else false for release
+ */
+void ar_add(struct b2r2_core_job *job, const char *caller, bool addref)
+{
+	b2r2_core.ar[b2r2_core.ar_write].addref = addref;
+	b2r2_core.ar[b2r2_core.ar_write].job = job;
+	b2r2_core.ar[b2r2_core.ar_write].caller = caller;
+	b2r2_core.ar[b2r2_core.ar_write].ref_count = job->ref_count;
+	b2r2_core.ar_write = (b2r2_core.ar_write + 1) %
+		ARRAY_SIZE(b2r2_core.ar);
+	if (b2r2_core.ar_write == b2r2_core.ar_read)
+		b2r2_core.ar_read = (b2r2_core.ar_read + 1) %
+			ARRAY_SIZE(b2r2_core.ar);
+}
+
+/**
+ * sprintf_ar() - Writes all addref / release to a string buffer
+ *
+ * @buf: Receiving character bufefr
+ * @job: Which job to write or NULL for all
+ *
+ * NOTE! No buffer size check!!
+ */
+char *sprintf_ar(char *buf, struct b2r2_core_job *job)
+{
+	int i;
+	int size = 0;
+
+	for (i = b2r2_core.ar_read;
+	     i != b2r2_core.ar_write;
+	     i = (i + 1) % ARRAY_SIZE(b2r2_core.ar)) {
+		struct addref_release *ar = &b2r2_core.ar[i];
+		if (!job || job == ar->job)
+			size += sprintf(buf + size,
+					"%s on %p from %s, ref = %d\n",
+					ar->addref ? "addref" : "release",
+					ar->job, ar->caller, ar->ref_count);
+	}
+
+	return buf;
+}
+
+/**
+ * printk_ar() - Writes all addref / release using dev_info
+ *
+ * @job: Which job to write or NULL for all
+ */
+void printk_ar(struct b2r2_core_job *job)
+{
+	int i;
+
+	for (i = b2r2_core.ar_read;
+	     i != b2r2_core.ar_write;
+	     i = (i + 1) % ARRAY_SIZE(b2r2_core.ar)) {
+		struct addref_release *ar = &b2r2_core.ar[i];
+		if (!job || job == ar->job)
+			b2r2_log_info("%s on %p from %s,"
+				 " ref = %d\n",
+				 ar->addref ? "addref" : "release",
+				 ar->job, ar->caller, ar->ref_count);
+	}
+}
+#endif
+
+/**
+ * internal_job_addref() - Increments the reference count for a job
+ *
+ * @job: Which job to increment reference count for
+ * @caller: Name of function calling addref (for debug)
+ *
+ * Note that b2r2_core.lock _must_ be held
+ */
+static void internal_job_addref(struct b2r2_core_job *job, const char *caller)
+{
+	u32 ref_count;
+
+	b2r2_log_info("%s (%p) (from %s)\n",
+		__func__, job, caller);
+
+	/* Sanity checks */
+	BUG_ON(job == NULL);
+
+	if (job->start_sentinel != START_SENTINEL ||
+	    job->end_sentinel != END_SENTINEL ||
+	    job->ref_count == 0 || job->ref_count > 10)	{
+		b2r2_log_info(
+			 "%s: (%p) start=%X end=%X ref_count=%d\n",
+			 __func__, job, job->start_sentinel,
+			 job->end_sentinel, job->ref_count);
+
+	/* Something is wrong, print the addref / release array */
+#ifdef DEBUG_CHECK_ADDREF_RELEASE
+		printk_ar(NULL);
+#endif
+	}
+
+
+	BUG_ON(job->start_sentinel != START_SENTINEL);
+	BUG_ON(job->end_sentinel != END_SENTINEL);
+
+	/* Do the actual reference count increment */
+	ref_count = ++job->ref_count;
+
+#ifdef DEBUG_CHECK_ADDREF_RELEASE
+	/* Keep track of addref / release */
+	ar_add(job, caller, true);
+#endif
+
+	b2r2_log_info("%s called from %s (%p): Ref Count is %d\n",
+		__func__, caller, job, job->ref_count);
+}
+
+/**
+ * internal_job_release() - Decrements the reference count for a job
+ *
+ * @job: Which job to decrement reference count for
+ * @caller: Name of function calling release (for debug)
+ *
+ * Returns true if job_release should be called by caller
+ * (reference count reached zero).
+ *
+ * Note that b2r2_core.lock _must_ be held
+ */
+bool internal_job_release(struct b2r2_core_job *job, const char *caller)
+{
+	u32 ref_count;
+	bool call_release = false;
+
+	b2r2_log_info("%s (%p) (from %s)\n",
+		__func__, job, caller);
+
+	/* Sanity checks */
+	BUG_ON(job == NULL);
+
+	if (job->start_sentinel != START_SENTINEL ||
+	    job->end_sentinel != END_SENTINEL ||
+	    job->ref_count == 0 || job->ref_count > 10) {
+		b2r2_log_info(
+			 "%s: (%p) start=%X end=%X ref_count=%d\n",
+			 __func__, job, job->start_sentinel,
+			 job->end_sentinel, job->ref_count);
+
+#ifdef DEBUG_CHECK_ADDREF_RELEASE
+		printk_ar(NULL);
+#endif
+	}
+
+
+	BUG_ON(job->start_sentinel != START_SENTINEL);
+	BUG_ON(job->end_sentinel != END_SENTINEL);
+
+	BUG_ON(job->ref_count == 0 || job->ref_count > 10);
+
+	/* Do the actual decrement */
+	ref_count = --job->ref_count;
+#ifdef DEBUG_CHECK_ADDREF_RELEASE
+	ar_add(job, caller, false);
+#endif
+	b2r2_log_info("%s called from %s (%p) Ref Count is %d\n",
+		__func__, caller, job, ref_count);
+
+	if (!ref_count && job->release) {
+		call_release = true;
+		/* Job will now cease to exist */
+		job->start_sentinel = 0xFFFFFFFF;
+		job->end_sentinel = 0xFFFFFFFF;
+	}
+	return call_release;
+}
+
+
+
+/* Exported functions */
+
+/* b2r2_core.lock _must_ _NOT_ be held when calling this function */
+void b2r2_core_job_addref(struct b2r2_core_job *job, const char *caller)
+{
+	unsigned long flags;
+	spin_lock_irqsave(&b2r2_core.lock, flags);
+	internal_job_addref(job, caller);
+	spin_unlock_irqrestore(&b2r2_core.lock, flags);
+}
+
+/* b2r2_core.lock _must_ _NOT_ be held when calling this function */
+void b2r2_core_job_release(struct b2r2_core_job *job, const char *caller)
+{
+	unsigned long flags;
+	bool call_release = false;
+	spin_lock_irqsave(&b2r2_core.lock, flags);
+	call_release = internal_job_release(job, caller);
+	spin_unlock_irqrestore(&b2r2_core.lock, flags);
+
+	if (call_release)
+		job->release(job);
+}
+
+/* b2r2_core.lock _must_ _NOT_ be held when calling this function */
+int b2r2_core_job_add(struct b2r2_core_job *job)
+{
+	unsigned long flags;
+
+	b2r2_log_info("%s (%p)\n", __func__, job);
+
+	/* Enable B2R2 */
+	domain_enable();
+
+	spin_lock_irqsave(&b2r2_core.lock, flags);
+	b2r2_core.stat_n_jobs_added++;
+
+	/* Initialise internal job data */
+	init_job(job);
+
+	/* Initial reference, should be released by caller of this function */
+	job->ref_count = 1;
+
+	/* Insert job into prio list */
+	insert_into_prio_list(job);
+
+	/* Check if we can dispatch job */
+	check_prio_list(false);
+	spin_unlock_irqrestore(&b2r2_core.lock, flags);
+
+	return 0;
+}
+
+/* b2r2_core.lock _must_ _NOT_ be held when calling this function */
+struct b2r2_core_job *b2r2_core_job_find(int job_id)
+{
+	unsigned long flags;
+	struct b2r2_core_job *job;
+
+	b2r2_log_info("%s (%d)\n", __func__, job_id);
+
+	spin_lock_irqsave(&b2r2_core.lock, flags);
+	/* Look through prio queue */
+	job = find_job_in_list(job_id, &b2r2_core.prio_queue);
+
+	if (!job)
+		job = find_job_in_active_jobs(job_id);
+
+	spin_unlock_irqrestore(&b2r2_core.lock, flags);
+
+	return job;
+}
+
+/* b2r2_core.lock _must_ _NOT_ be held when calling this function */
+struct b2r2_core_job *b2r2_core_job_find_first_with_tag(int tag)
+{
+	unsigned long flags;
+	struct b2r2_core_job *job;
+
+	b2r2_log_info("%s (%d)\n", __func__, tag);
+
+	spin_lock_irqsave(&b2r2_core.lock, flags);
+	/* Look through prio queue */
+	job = find_tag_in_list(tag, &b2r2_core.prio_queue);
+
+	if (!job)
+		job = find_tag_in_active_jobs(tag);
+
+	spin_unlock_irqrestore(&b2r2_core.lock, flags);
+
+	return job;
+}
+
+/**
+ * is_job_done() - Spin lock protected check if job is done
+ *
+ * @job: Job to check
+ *
+ * Returns true if job is done or cancelled
+ *
+ * b2r2_core.lock must _NOT_ be held when calling this function
+ */
+static bool is_job_done(struct b2r2_core_job *job)
+{
+	unsigned long flags;
+	bool job_is_done;
+
+	spin_lock_irqsave(&b2r2_core.lock, flags);
+	job_is_done =
+		job->job_state != B2R2_CORE_JOB_QUEUED &&
+		job->job_state != B2R2_CORE_JOB_RUNNING;
+	spin_unlock_irqrestore(&b2r2_core.lock, flags);
+
+	return job_is_done;
+}
+
+/* b2r2_core.lock _must_ _NOT_ be held when calling this function */
+int b2r2_core_job_wait(struct b2r2_core_job *job)
+{
+	int ret = 0;
+
+	b2r2_log_info("%s (%p)\n", __func__, job);
+	/* Check that we have the job */
+	if (job->job_state == B2R2_CORE_JOB_IDLE) {
+		/* Never or not queued */
+		b2r2_log_info("%s: Job not queued\n", __func__);
+		return -ENOENT;
+	}
+
+	/* Wait for the job to be done */
+	ret = wait_event_interruptible(
+		job->event,
+		is_job_done(job));
+
+	if (ret)
+		b2r2_log_warn(
+			 "%s: wait_event_interruptible returns %d, state is %d",
+			 __func__, ret, job->job_state);
+	return ret;
+}
+
+/**
+ * cancel_job() - Cancels a job (removes it from prio list or active jobs) and
+ *                calls the job callback
+ *
+ * @job: Job to cancel
+ *
+ * Returns true if the job was found and cancelled
+ *
+ * b2r2_core.lock must be held when calling this function
+ */
+static bool cancel_job(struct b2r2_core_job *job)
+{
+	bool found_job = false;
+	bool job_was_active = false;
+
+	/* Remove from prio list */
+	if (job->job_state == B2R2_CORE_JOB_QUEUED) {
+		list_del_init(&job->list);
+		found_job = true;
+	}
+
+	/* Remove from active jobs */
+	if (!found_job) {
+		if (b2r2_core.n_active_jobs > 0) {
+			int i;
+
+			/* Look for timeout:ed jobs and put them in tmp list */
+			for (i = 0;
+			     i < ARRAY_SIZE(b2r2_core.active_jobs);
+			     i++) {
+				if (b2r2_core.active_jobs[i] == job) {
+					stop_queue((enum b2r2_core_queue)i);
+					stop_hw_timer(job);
+					b2r2_core.active_jobs[i] = NULL;
+					b2r2_core.n_active_jobs--;
+					found_job = true;
+					job_was_active = true;
+				}
+			}
+		}
+	}
+
+
+	/* Handle done list & callback */
+	if (found_job) {
+		/* Job is canceled */
+		job->job_state = B2R2_CORE_JOB_CANCELED;
+
+		queue_work(b2r2_core.work_queue, &job->work);
+
+		/* Statistics */
+		if (!job_was_active)
+			b2r2_core.stat_n_jobs_in_prio_list--;
+
+	}
+
+	return found_job;
+}
+
+/* b2r2_core.lock _must_ _NOT_ be held when calling this function */
+int b2r2_core_job_cancel(struct b2r2_core_job *job)
+{
+	unsigned long flags;
+	int ret = 0;
+
+	b2r2_log_info("%s (%p) (%d)\n", __func__,
+		job, job->job_state);
+	/* Check that we have the job */
+	if (job->job_state == B2R2_CORE_JOB_IDLE) {
+		/* Never or not queued */
+		b2r2_log_info("%s: Job not queued\n", __func__);
+		return -ENOENT;
+	}
+
+	/* Remove from prio list */
+	spin_lock_irqsave(&b2r2_core.lock, flags);
+	cancel_job(job);
+	spin_unlock_irqrestore(&b2r2_core.lock, flags);
+
+	return ret;
+}
+
+/* LOCAL FUNCTIONS BELOW */
+
+#define B2R2_DOMAIN_DISABLE_TIMEOUT (HZ/100)
+
+static void domain_disable_work_function(struct work_struct *work)
+{
+	if (!mutex_trylock(&b2r2_core.domain_lock))
+		return;
+
+	if (b2r2_core.domain_request_count == 0) {
+		exit_hw();
+		clk_disable(b2r2_core.b2r2_clock);
+		regulator_disable(b2r2_core.b2r2_reg);
+		b2r2_core.domain_enabled = false;
+	}
+
+	mutex_unlock(&b2r2_core.domain_lock);
+}
+
+#define B2R2_REGULATOR_RETRY_COUNT 10
+
+static int domain_enable(void)
+{
+	mutex_lock(&b2r2_core.domain_lock);
+	b2r2_core.domain_request_count++;
+
+	if (!b2r2_core.domain_enabled) {
+		int retry = 0;
+		int ret;
+
+again:
+		/*
+		 * Since regulator_enable() may sleep we have to handle
+		 * interrupts.
+		 */
+		ret = regulator_enable(b2r2_core.b2r2_reg);
+		if ((ret == -EAGAIN) &&
+				((retry++) < B2R2_REGULATOR_RETRY_COUNT))
+			goto again;
+		else if (ret < 0)
+			goto regulator_enable_failed;
+
+		clk_enable(b2r2_core.b2r2_clock);
+		if (init_hw() < 0)
+			goto init_hw_failed;
+		b2r2_core.domain_enabled = true;
+	}
+
+	mutex_unlock(&b2r2_core.domain_lock);
+
+	return 0;
+
+init_hw_failed:
+	b2r2_log_err("%s: Could not initialize hardware!\n", __func__);
+
+	clk_disable(b2r2_core.b2r2_clock);
+
+	if (regulator_disable(b2r2_core.b2r2_reg) < 0)
+		b2r2_log_err("%s: regulator_disable failed!\n", __func__);
+
+regulator_enable_failed:
+	b2r2_core.domain_request_count--;
+	mutex_unlock(&b2r2_core.domain_lock);
+
+	return -EFAULT;
+}
+
+static void domain_disable(void)
+{
+	mutex_lock(&b2r2_core.domain_lock);
+
+	if (b2r2_core.domain_request_count == 0) {
+		b2r2_log_err("%s: Unbalanced domain_disable()\n", __func__);
+	} else {
+		b2r2_core.domain_request_count--;
+
+		/* Cancel any existing work */
+		cancel_delayed_work_sync(&b2r2_core.domain_disable_work);
+
+		/* Add a work to disable the power and clock after a delay */
+		queue_delayed_work(b2r2_core.work_queue,
+				&b2r2_core.domain_disable_work,
+				B2R2_DOMAIN_DISABLE_TIMEOUT);
+	}
+
+	mutex_unlock(&b2r2_core.domain_lock);
+}
+
+/**
+ * stop_queue() - Stops the specified queue.
+ */
+static void stop_queue(enum b2r2_core_queue queue)
+{
+	/* TODO: Implement! If this function is not implemented canceled jobs will
+	use b2r2 which is a waste of resources. Not stopping jobs will also screw up
+	the hardware timing, the job the canceled job intrerrupted (if any) will be
+	billed for the time between the point where the job is cancelled and when it
+	stops. */
+}
+
+/**
+ * exit_job_list() - Empties a job queue by canceling the jobs
+ *
+ * b2r2_core.lock _must_ be held when calling this function
+ */
+static void exit_job_list(struct list_head *job_queue)
+{
+	while (!list_empty(job_queue)) {
+		struct b2r2_core_job *job =
+			list_entry(job_queue->next,
+				   struct b2r2_core_job,
+				   list);
+		/* Add reference to prevent job from disappearing
+		   in the middle of our work, released below */
+		internal_job_addref(job, __func__);
+
+		cancel_job(job);
+
+		/* Matching release to addref above */
+		internal_job_release(job, __func__);
+
+	}
+}
+
+/**
+ * get_next_job_id() - Return a new job id.
+ */
+static int get_next_job_id(void)
+{
+	int job_id;
+
+	if (b2r2_core.next_job_id < 1)
+		b2r2_core.next_job_id = 1;
+	job_id = b2r2_core.next_job_id++;
+
+	return job_id;
+}
+
+/**
+ * job_work_function() - Work queue function that calls callback(s) and
+ *                       checks if B2R2 can accept a new job
+ *
+ * @ptr: Pointer to work struct (embedded in struct b2r2_core_job)
+ */
+static void job_work_function(struct work_struct *ptr)
+{
+	unsigned long flags;
+	struct b2r2_core_job    *job = container_of(
+		ptr, struct b2r2_core_job, work);
+
+	/* Disable B2R2 */
+	domain_disable();
+
+	/* Release resources */
+	if (job->release_resources)
+		job->release_resources(job, false);
+
+	spin_lock_irqsave(&b2r2_core.lock, flags);
+
+	/* Dispatch a new job if possible */
+	check_prio_list(false);
+
+	spin_unlock_irqrestore(&b2r2_core.lock, flags);
+
+	/* Tell the client */
+	if (job->callback)
+		job->callback(job);
+
+	/* Drop our reference, matches the
+	   addref in handle_queue_event or b2r2_core_job_cancel */
+	b2r2_core_job_release(job, __func__);
+}
+
+#ifdef HANDLE_TIMEOUTED_JOBS
+/**
+ * timeout_work_function() - Work queue function that checks for
+ *                           timeout:ed jobs. B2R2 might silently refuse
+ *                           to execute some jobs, i.e. SRC2 fill
+ *
+ * @ptr: Pointer to work struct (embedded in struct b2r2_core)
+ *
+ */
+static void timeout_work_function(struct work_struct *ptr)
+{
+	unsigned long flags;
+	struct list_head job_list;
+
+	INIT_LIST_HEAD(&job_list);
+
+	/* Cancel all jobs if too long time since last irq */
+	spin_lock_irqsave(&b2r2_core.lock, flags);
+	if (b2r2_core.n_active_jobs > 0) {
+		unsigned long diff =
+			(long) jiffies - (long) b2r2_core.jiffies_last_irq;
+		if (diff > HZ/2) {
+			/* Active jobs and more than a second since last irq! */
+			int i;
+
+			/* Look for timeout:ed jobs and put them in tmp list. It's
+			important that the application queues are killed in order
+			of decreasing priority */
+			for (i = 0;
+			     i < ARRAY_SIZE(b2r2_core.active_jobs);
+			     i++) {
+				struct b2r2_core_job *job =
+					b2r2_core.active_jobs[i];
+
+				if (job) {
+					stop_hw_timer(job);
+
+					b2r2_core.active_jobs[i] = NULL;
+					b2r2_core.n_active_jobs--;
+					list_add_tail(&job->list,
+						      &job_list);
+				}
+			}
+
+			/* Print the B2R2 register and reset B2R2 */
+			printk_regs();
+			hw_reset();
+		}
+	}
+	spin_unlock_irqrestore(&b2r2_core.lock, flags);
+
+	/* Handle timeout:ed jobs */
+	spin_lock_irqsave(&b2r2_core.lock, flags);
+	while (!list_empty(&job_list)) {
+		struct b2r2_core_job *job =
+			list_entry(job_list.next,
+				   struct b2r2_core_job,
+				   list);
+
+		b2r2_log_warn("%s: Job timeout\n", __func__);
+
+		list_del_init(&job->list);
+
+		/* Job is cancelled */
+		job->job_state = B2R2_CORE_JOB_CANCELED;
+
+		/* Handle done */
+		wake_up_interruptible(&job->event);
+
+		/* Job callbacks handled via work queue */
+		queue_work(b2r2_core.work_queue, &job->work);
+	}
+
+	/* Requeue delayed work */
+	if (b2r2_core.n_active_jobs)
+		queue_delayed_work(
+			b2r2_core.work_queue,
+			&b2r2_core.timeout_work, HZ/2);
+
+	spin_unlock_irqrestore(&b2r2_core.lock, flags);
+}
+#endif
+
+/**
+ * reset_hw_timer() - Resets a job's hardware timer. Must be called before
+ *                    the timer is used.
+ *
+ * @job: Pointer to job struct
+ *
+ * b2r2_core.lock _must_ be held when calling this function
+ */
+static void reset_hw_timer(struct b2r2_core_job *job)
+{
+	job->nsec_active_in_hw = 0;
+}
+
+/**
+ * start_hw_timer() - Times how long a job spends in hardware (active).
+ *                    Should be called immediatly before starting the
+ *                    hardware.
+ *
+ * @job: Pointer to job struct
+ *
+ * b2r2_core.lock _must_ be held when calling this function
+ */
+static void start_hw_timer(struct b2r2_core_job *job)
+{
+	job->hw_start_time = b2r2_get_curr_nsec();
+}
+
+/**
+ * stop_hw_timer() - Times how long a job spends in hardware (active).
+ *                   Should be called immediatly after the hardware has
+ *                   finished.
+ *
+ * @job: Pointer to job struct
+ *
+ * b2r2_core.lock _must_ be held when calling this function
+ */
+static void stop_hw_timer(struct b2r2_core_job *job)
+{
+	/* Assumes only app queues are used, which is the case right now. */
+	/* Not 100% accurate. When a higher prio job interrupts a lower prio job it does
+	so after the current node of the low prio job has finished. Currently we can not
+	sense when the actual switch takes place so the time reported for a job that
+	interrupts a lower prio job will on average contain the time it takes to process
+	half a node in the lower prio job in addition to the time it takes to process the
+	job's own nodes. This could possibly be solved by adding node notifications but
+	that would involve a significant amount of work and consume system resources due
+	to the extra interrupts. */
+	/* If a job takes more than ~2s (absolute time, including idleing in the hardware)
+	the state of the hardware timer will be corrupted and it will not report valid
+	values until b2r2 becomes idle (no active jobs on any queues). The maximum length
+	can possibly be increased by using 64 bit integers. */
+
+	int i;
+
+	u32 stop_time_raw = b2r2_get_curr_nsec();
+	/* We'll add an offset to all positions in time to make the current time equal to
+	0xFFFFFFFF. This way we can compare positions in time to each other without having
+	to wory about wrapping (so long as all positions in time are in the past). */
+	u32 stop_time = 0xFFFFFFFF;
+	u32 time_pos_offset = 0xFFFFFFFF - stop_time_raw;
+	u32 nsec_in_hw = stop_time - (job->hw_start_time + time_pos_offset);
+	job->nsec_active_in_hw += (s32)nsec_in_hw;
+
+	/* Check if we have delayed the start of higher prio jobs. Can happen as queue
+	switching only can be done between nodes. */
+	for (i = (int)job->queue - 1; i >= (int)B2R2_CORE_QUEUE_AQ1; i--) {
+		struct b2r2_core_job *queue_active_job = b2r2_core.active_jobs[i];
+		if (NULL == queue_active_job)
+			continue;
+
+		queue_active_job->hw_start_time = stop_time_raw;
+	}
+
+	/* Check if the job has stolen time from lower prio jobs */
+	for (i = (int)job->queue + 1; i < B2R2_NUM_APPLICATIONS_QUEUES; i++) {
+		struct b2r2_core_job *queue_active_job = b2r2_core.active_jobs[i];
+		u32 queue_active_job_hw_start_time;
+
+		if (NULL == queue_active_job)
+			continue;
+
+		queue_active_job_hw_start_time = queue_active_job->hw_start_time + time_pos_offset;
+
+		if (queue_active_job_hw_start_time < stop_time) {
+			u32 queue_active_job_nsec_in_hw = stop_time - queue_active_job_hw_start_time;
+			u32 num_stolen_nsec = min(queue_active_job_nsec_in_hw, nsec_in_hw);
+
+			queue_active_job->nsec_active_in_hw -= (s32)num_stolen_nsec;
+
+			nsec_in_hw -= num_stolen_nsec;
+			stop_time -= num_stolen_nsec;
+		}
+
+		if (0 == nsec_in_hw)
+			break;
+	}
+}
+
+/**
+ * init_job() - Initializes a job structure from filled in client data.
+ *              Reference count will be set to 1
+ *
+ * @job: Job to initialize
+ */
+static void init_job(struct b2r2_core_job *job)
+{
+	job->start_sentinel = START_SENTINEL;
+	job->end_sentinel = END_SENTINEL;
+
+	/* Get a job id*/
+	job->job_id = get_next_job_id();
+
+	/* Job is idle, never queued */
+	job->job_state = B2R2_CORE_JOB_IDLE;
+
+	/* Initialize internal data */
+	INIT_LIST_HEAD(&job->list);
+	init_waitqueue_head(&job->event);
+	INIT_WORK(&job->work, job_work_function);
+
+	/* Map given prio to B2R2 queues */
+	if (job->prio < B2R2_CORE_LOWEST_PRIO)
+		job->prio = B2R2_CORE_LOWEST_PRIO;
+	else if (job->prio > B2R2_CORE_HIGHEST_PRIO)
+		job->prio = B2R2_CORE_HIGHEST_PRIO;
+
+	if (job->prio > 10) {
+		job->queue = B2R2_CORE_QUEUE_AQ1;
+		job->interrupt_context =
+			(B2R2BLT_ITSAQ1_LNA_Reached);
+		job->control = (B2R2_AQ_Enab | B2R2_AQ_PRIOR_3);
+	} else if (job->prio > 0) {
+		job->queue = B2R2_CORE_QUEUE_AQ2;
+		job->interrupt_context =
+			(B2R2BLT_ITSAQ2_LNA_Reached);
+		job->control = (B2R2_AQ_Enab | B2R2_AQ_PRIOR_2);
+	} else if (job->prio > -10) {
+		job->queue = B2R2_CORE_QUEUE_AQ3;
+		job->interrupt_context =
+			(B2R2BLT_ITSAQ3_LNA_Reached);
+		job->control = (B2R2_AQ_Enab | B2R2_AQ_PRIOR_1);
+	} else {
+		job->queue = B2R2_CORE_QUEUE_AQ4;
+		job->interrupt_context =
+			(B2R2BLT_ITSAQ4_LNA_Reached);
+		job->control = (B2R2_AQ_Enab | B2R2_AQ_PRIOR_0);
+	}
+}
+
+/**
+ * clear_interrupts() - Disables all interrupts
+ *
+ * b2r2_core.lock must be held
+ */
+static void  clear_interrupts(void)
+{
+	writel(0x0, &b2r2_core.hw->BLT_ITM0);
+	writel(0x0, &b2r2_core.hw->BLT_ITM1);
+	writel(0x0, &b2r2_core.hw->BLT_ITM2);
+	writel(0x0, &b2r2_core.hw->BLT_ITM3);
+}
+
+/**
+ * insert_into_prio_list() - Inserts the job into the sorted list of jobs.
+ *                           The list is sorted by priority.
+ *
+ * @job: Job to insert
+ *
+ * b2r2_core.lock must be held
+ */
+static void insert_into_prio_list(struct b2r2_core_job *job)
+{
+	/* Ref count is increased when job put in list,
+	   should be released when job is removed from list */
+	internal_job_addref(job, __func__);
+
+	b2r2_core.stat_n_jobs_in_prio_list++;
+
+	/* Sort in the job */
+	if (list_empty(&b2r2_core.prio_queue))
+		list_add_tail(&job->list, &b2r2_core.prio_queue);
+	else {
+		struct b2r2_core_job *first_job =
+			list_entry(b2r2_core.prio_queue.next,
+				   struct b2r2_core_job, list);
+		struct b2r2_core_job *last_job =
+			list_entry(b2r2_core.prio_queue.prev,
+				   struct b2r2_core_job, list);
+
+		/* High prio job? */
+		if (job->prio > first_job->prio)
+			/* Insert first */
+			list_add(&job->list, &b2r2_core.prio_queue);
+		else if (job->prio <= last_job->prio)
+			/* Insert last */
+			list_add_tail(&job->list, &b2r2_core.prio_queue);
+		else {
+			/* We need to find where to put it */
+			struct list_head *ptr;
+
+			list_for_each(ptr, &b2r2_core.prio_queue) {
+				struct b2r2_core_job *list_job =
+					list_entry(ptr, struct b2r2_core_job,
+						   list);
+				if (job->prio > list_job->prio) {
+					/* Add before */
+					list_add_tail(&job->list,
+						      &list_job->list);
+					break;
+				}
+			}
+		}
+	}
+	/* The job is now queued */
+	job->job_state = B2R2_CORE_JOB_QUEUED;
+}
+
+/**
+ * check_prio_list() - Checks if the first job(s) in the prio list can
+ *                     be dispatched to B2R2
+ *
+ * @atomic: true if in atomic context (i.e. interrupt context)
+ *
+ * b2r2_core.lock must be held
+ */
+static void check_prio_list(bool atomic)
+{
+	bool dispatched_job;
+	int n_dispatched = 0;
+
+	/* Do we have anything in our prio list? */
+	do {
+		dispatched_job = false;
+		if (!list_empty(&b2r2_core.prio_queue)) {
+			/* The first job waiting */
+			struct b2r2_core_job *job =
+				list_first_entry(&b2r2_core.prio_queue,
+						 struct b2r2_core_job,
+						 list);
+
+			/* Is the B2R2 queue available? */
+			if (b2r2_core.active_jobs[job->queue] == NULL) {
+				/* Can we acquire resources? */
+				if (!job->acquire_resources ||
+				    job->acquire_resources(job, atomic) == 0) {
+					/* Ok to dispatch job */
+
+					/* Remove from list */
+					list_del_init(&job->list);
+
+					/* The job is now active */
+					b2r2_core.active_jobs[job->queue] = job;
+					b2r2_core.n_active_jobs++;
+					job->jiffies = jiffies;
+					b2r2_core.jiffies_last_active =
+						jiffies;
+
+					/* Kick off B2R2 */
+					trigger_job(job);
+
+					dispatched_job = true;
+					n_dispatched++;
+
+#ifdef HANDLE_TIMEOUTED_JOBS
+					/* Check in one half second
+					   if it hangs */
+					queue_delayed_work(
+						b2r2_core.work_queue,
+						&b2r2_core.timeout_work,
+						HZ/2);
+#endif
+				} else {
+					/* No resources */
+					if (!atomic &&
+					    b2r2_core.n_active_jobs == 0) {
+						b2r2_log_warn(
+							"%s: No resource",
+							__func__);
+						cancel_job(job);
+					}
+				}
+			}
+		}
+	} while (dispatched_job);
+
+	b2r2_core.stat_n_jobs_in_prio_list -= n_dispatched;
+}
+
+/**
+ * find_job_in_list() - Finds job with job_id in list
+ *
+ * @jobid: Job id to find
+ * @list: List to find job id in
+ *
+ * Reference count will be incremented for found job.
+ *
+ * b2r2_core.lock must be held
+ */
+static struct b2r2_core_job *find_job_in_list(int job_id,
+					      struct list_head *list)
+{
+	struct list_head *ptr;
+
+	list_for_each(ptr, list) {
+		struct b2r2_core_job *job =
+			list_entry(ptr, struct b2r2_core_job, list);
+		if (job->job_id == job_id) {
+			/* Increase reference count, should be released by
+			   the caller of b2r2_core_job_find */
+			internal_job_addref(job, __func__);
+			return job;
+		}
+	}
+	return NULL;
+}
+
+/**
+ * find_job_in_active_jobs() - Finds job in active job queues
+ *
+ * @jobid: Job id to find
+ *
+ * Reference count will be incremented for found job.
+ *
+ * b2r2_core.lock must be held
+ */
+static struct b2r2_core_job *find_job_in_active_jobs(int job_id)
+{
+	int i;
+	struct b2r2_core_job *found_job = NULL;
+
+	if (b2r2_core.n_active_jobs) {
+		for (i = 0; i < ARRAY_SIZE(b2r2_core.active_jobs); i++) {
+			struct b2r2_core_job *job = b2r2_core.active_jobs[i];
+
+			if (job && job->job_id == job_id) {
+				internal_job_addref(job, __func__);
+				found_job = job;
+				break;
+			}
+		}
+	}
+	return found_job;
+}
+
+/**
+ * find_tag_in_list() - Finds first job with tag in list
+ *
+ * @tag: Tag to find
+ * @list: List to find job id in
+ *
+ * Reference count will be incremented for found job.
+ *
+ * b2r2_core.lock must be held
+ */
+static struct b2r2_core_job *find_tag_in_list(int tag, struct list_head *list)
+{
+	struct list_head *ptr;
+
+	list_for_each(ptr, list) {
+		struct b2r2_core_job *job =
+			list_entry(ptr, struct b2r2_core_job, list);
+		if (job->tag == tag) {
+			/* Increase reference count, should be released by
+			   the caller of b2r2_core_job_find */
+			internal_job_addref(job, __func__);
+			return job;
+		}
+	}
+	return NULL;
+}
+
+/**
+ * find_tag_in_active_jobs() - Finds job with tag in active job queues
+ *
+ * @tag: Tag to find
+ *
+ * Reference count will be incremented for found job.
+ *
+ * b2r2_core.lock must be held
+ */
+static struct b2r2_core_job *find_tag_in_active_jobs(int tag)
+{
+	int i;
+	struct b2r2_core_job *found_job = NULL;
+
+	if (b2r2_core.n_active_jobs) {
+		for (i = 0; i < ARRAY_SIZE(b2r2_core.active_jobs); i++) {
+			struct b2r2_core_job *job = b2r2_core.active_jobs[i];
+
+			if (job && job->tag == tag) {
+				internal_job_addref(job, __func__);
+				found_job = job;
+				break;
+			}
+		}
+	}
+	return found_job;
+}
+
+
+#ifdef HANDLE_TIMEOUTED_JOBS
+/**
+ * hw_reset() - Resets B2R2 hardware
+ *
+ * b2r2_core.lock must be held
+ */
+static int hw_reset(void)
+{
+	u32 uTimeOut = B2R2_DRIVER_TIMEOUT_VALUE;
+
+	/* Tell B2R2 to reset */
+	writel(readl(&b2r2_core.hw->BLT_CTL) | B2R2BLT_CTLGLOBAL_soft_reset,
+		&b2r2_core.hw->BLT_CTL);
+	writel(0x00000000, &b2r2_core.hw->BLT_CTL);
+
+	b2r2_log_info("wait for B2R2 to be idle..\n");
+
+	/** Wait for B2R2 to be idle (on a timeout rather than while loop) */
+	while ((uTimeOut > 0) &&
+	       ((readl(&b2r2_core.hw->BLT_STA1) &
+		 B2R2BLT_STA1BDISP_IDLE) == 0x0))
+		uTimeOut--;
+
+	if (uTimeOut == 0) {
+		b2r2_log_warn(
+			 "error-> after software reset B2R2 is not idle\n");
+		return -EAGAIN;
+	}
+
+	return 0;
+
+}
+#endif
+
+/**
+ * trigger_job() - Put job in B2R2 HW queue
+ *
+ * @job: Job to trigger
+ *
+ * b2r2_core.lock must be held
+ */
+static void trigger_job(struct b2r2_core_job *job)
+{
+	/* Debug prints */
+	b2r2_log_info("queue 0x%x \n", job->queue);
+	b2r2_log_info("BLT TRIG_IP 0x%x (first node)\n",
+		job->first_node_address);
+	b2r2_log_info("BLT LNA_CTL 0x%x (last node)\n",
+		job->last_node_address);
+	b2r2_log_info("BLT TRIG_CTL 0x%x \n", job->control);
+	b2r2_log_info("BLT PACE_CTL 0x%x \n", job->pace_control);
+
+	reset_hw_timer(job);
+	job->job_state = B2R2_CORE_JOB_RUNNING;
+
+	/* Enable interrupt */
+	writel(readl(&b2r2_core.hw->BLT_ITM0) | job->interrupt_context,
+		&b2r2_core.hw->BLT_ITM0);
+
+	writel(min_t(u8, max_t(u8, b2r2_core.op_size, B2R2_PLUG_OPCODE_SIZE_8),
+				B2R2_PLUG_OPCODE_SIZE_64),
+			&b2r2_core.hw->PLUGS1_OP2);
+	writel(min_t(u8, b2r2_core.ch_size, B2R2_PLUG_CHUNK_SIZE_128),
+			&b2r2_core.hw->PLUGS1_CHZ);
+	writel(min_t(u8, b2r2_core.mg_size, B2R2_PLUG_MESSAGE_SIZE_128) |
+				(b2r2_core.min_req_time << 16),
+			&b2r2_core.hw->PLUGS1_MSZ);
+	writel(min_t(u8, b2r2_core.pg_size, B2R2_PLUG_PAGE_SIZE_256),
+			&b2r2_core.hw->PLUGS1_PGZ);
+
+	writel(min_t(u8, max_t(u8, b2r2_core.op_size, B2R2_PLUG_OPCODE_SIZE_8),
+				B2R2_PLUG_OPCODE_SIZE_64),
+			&b2r2_core.hw->PLUGS2_OP2);
+	writel(min_t(u8, b2r2_core.ch_size, B2R2_PLUG_CHUNK_SIZE_128),
+			&b2r2_core.hw->PLUGS2_CHZ);
+	writel(min_t(u8, b2r2_core.mg_size, B2R2_PLUG_MESSAGE_SIZE_128) |
+				(b2r2_core.min_req_time << 16),
+			&b2r2_core.hw->PLUGS2_MSZ);
+	writel(min_t(u8, b2r2_core.pg_size, B2R2_PLUG_PAGE_SIZE_256),
+			&b2r2_core.hw->PLUGS2_PGZ);
+
+	writel(min_t(u8, max_t(u8, b2r2_core.op_size, B2R2_PLUG_OPCODE_SIZE_8),
+				B2R2_PLUG_OPCODE_SIZE_64),
+			&b2r2_core.hw->PLUGS3_OP2);
+	writel(min_t(u8, b2r2_core.ch_size, B2R2_PLUG_CHUNK_SIZE_128),
+			&b2r2_core.hw->PLUGS3_CHZ);
+	writel(min_t(u8, b2r2_core.mg_size, B2R2_PLUG_MESSAGE_SIZE_128) |
+				(b2r2_core.min_req_time << 16),
+			&b2r2_core.hw->PLUGS3_MSZ);
+	writel(min_t(u8, b2r2_core.pg_size, B2R2_PLUG_PAGE_SIZE_256),
+			&b2r2_core.hw->PLUGS3_PGZ);
+
+	writel(min_t(u8, max_t(u8, b2r2_core.op_size, B2R2_PLUG_OPCODE_SIZE_8),
+				B2R2_PLUG_OPCODE_SIZE_64),
+			&b2r2_core.hw->PLUGT_OP2);
+	writel(min_t(u8, b2r2_core.ch_size, B2R2_PLUG_CHUNK_SIZE_128),
+			&b2r2_core.hw->PLUGT_CHZ);
+	writel(min_t(u8, b2r2_core.mg_size, B2R2_PLUG_MESSAGE_SIZE_128) |
+				(b2r2_core.min_req_time << 16),
+			&b2r2_core.hw->PLUGT_MSZ);
+	writel(min_t(u8, b2r2_core.pg_size, B2R2_PLUG_PAGE_SIZE_256),
+			&b2r2_core.hw->PLUGT_PGZ);
+
+	/* B2R2 kicks off when LNA is written, LNA write must be last! */
+	switch (job->queue) {
+	case B2R2_CORE_QUEUE_CQ1:
+		writel(job->first_node_address, &b2r2_core.hw->BLT_CQ1_TRIG_IP);
+		writel(job->control, &b2r2_core.hw->BLT_CQ1_TRIG_CTL);
+		writel(job->pace_control, &b2r2_core.hw->BLT_CQ1_PACE_CTL);
+		break;
+
+	case B2R2_CORE_QUEUE_CQ2:
+		writel(job->first_node_address, &b2r2_core.hw->BLT_CQ2_TRIG_IP);
+		writel(job->control, &b2r2_core.hw->BLT_CQ2_TRIG_CTL);
+		writel(job->pace_control, &b2r2_core.hw->BLT_CQ2_PACE_CTL);
+		break;
+
+	case B2R2_CORE_QUEUE_AQ1:
+		writel(job->control, &b2r2_core.hw->BLT_AQ1_CTL);
+		writel(job->first_node_address, &b2r2_core.hw->BLT_AQ1_IP);
+		wmb();
+		start_hw_timer(job);
+		writel(job->last_node_address, &b2r2_core.hw->BLT_AQ1_LNA);
+		break;
+
+	case B2R2_CORE_QUEUE_AQ2:
+		writel(job->control, &b2r2_core.hw->BLT_AQ2_CTL);
+		writel(job->first_node_address, &b2r2_core.hw->BLT_AQ2_IP);
+		wmb();
+		start_hw_timer(job);
+		writel(job->last_node_address, &b2r2_core.hw->BLT_AQ2_LNA);
+		break;
+
+	case B2R2_CORE_QUEUE_AQ3:
+		writel(job->control, &b2r2_core.hw->BLT_AQ3_CTL);
+		writel(job->first_node_address, &b2r2_core.hw->BLT_AQ3_IP);
+		wmb();
+		start_hw_timer(job);
+		writel(job->last_node_address, &b2r2_core.hw->BLT_AQ3_LNA);
+		break;
+
+	case B2R2_CORE_QUEUE_AQ4:
+		writel(job->control, &b2r2_core.hw->BLT_AQ4_CTL);
+		writel(job->first_node_address, &b2r2_core.hw->BLT_AQ4_IP);
+		wmb();
+		start_hw_timer(job);
+		writel(job->last_node_address, &b2r2_core.hw->BLT_AQ4_LNA);
+		break;
+
+		/** Handle the default case */
+	default:
+		break;
+
+	} /* end switch */
+
+}
+
+/**
+ * handle_queue_event() - Handles interrupt event for specified B2R2 queue
+ *
+ * @queue: Queue to handle event for
+ *
+ * b2r2_core.lock must be held
+ */
+static void handle_queue_event(enum b2r2_core_queue queue)
+{
+	struct b2r2_core_job *job;
+
+	job = b2r2_core.active_jobs[queue];
+	if (job) {
+		if (job->job_state != B2R2_CORE_JOB_RUNNING)
+			/* Should be running
+			   Severe error. TBD */
+			b2r2_log_warn(
+				 "%s: Job is not running", __func__);
+
+		stop_hw_timer(job);
+
+		/* Remove from queue */
+		BUG_ON(b2r2_core.n_active_jobs == 0);
+		b2r2_core.active_jobs[queue] = NULL;
+		b2r2_core.n_active_jobs--;
+	}
+
+	if (!job) {
+		/* No job, error?  */
+		b2r2_log_warn("%s: No job", __func__);
+		return;
+	}
+
+
+	/* Atomic context release resources, release resources will
+	   be called again later from process context (work queue) */
+	if (job->release_resources)
+		job->release_resources(job, true);
+
+	/* Job is done */
+	job->job_state = B2R2_CORE_JOB_DONE;
+
+	/* Handle done */
+	wake_up_interruptible(&job->event);
+
+	/* Dispatch to work queue to handle callbacks */
+	queue_work(b2r2_core.work_queue, &job->work);
+}
+
+/**
+ * process_events() - Handles interrupt events
+ *
+ * @status: Contents of the B2R2 ITS register
+ */
+static void process_events(u32 status)
+{
+	u32 mask = 0xF;
+	u32 disable_itm_mask = 0;
+
+	b2r2_log_info("Enters process_events \n");
+	b2r2_log_info("status 0x%x \n", status);
+
+	/* Composition queue 1 */
+	if (status & mask) {
+		handle_queue_event(B2R2_CORE_QUEUE_CQ1);
+		disable_itm_mask |= mask;
+	}
+	mask <<= 4;
+
+	/* Composition queue 2 */
+	if (status & mask) {
+		handle_queue_event(B2R2_CORE_QUEUE_CQ2);
+		disable_itm_mask |= mask;
+	}
+	mask <<= 8;
+
+	/* Application queue 1 */
+	if (status & mask) {
+		handle_queue_event(B2R2_CORE_QUEUE_AQ1);
+		disable_itm_mask |= mask;
+	}
+	mask <<= 4;
+
+	/* Application queue 2 */
+	if (status & mask) {
+		handle_queue_event(B2R2_CORE_QUEUE_AQ2);
+		disable_itm_mask |= mask;
+	}
+	mask <<= 4;
+
+	/* Application queue 3 */
+	if (status & mask) {
+		handle_queue_event(B2R2_CORE_QUEUE_AQ3);
+		disable_itm_mask |= mask;
+	}
+	mask <<= 4;
+
+	/* Application queue 4 */
+	if (status & mask) {
+		handle_queue_event(B2R2_CORE_QUEUE_AQ4);
+		disable_itm_mask |= mask;
+	}
+
+	/* Clear received interrupt flags */
+	writel(status, &b2r2_core.hw->BLT_ITS);
+	/* Disable handled interrupts */
+	writel(readl(&b2r2_core.hw->BLT_ITM0) & ~disable_itm_mask,
+		 &b2r2_core.hw->BLT_ITM0);
+
+	b2r2_log_info("Returns process_events \n");
+}
+
+/**
+ * b2r2_irq_handler() - B2R2 interrupt handler
+ *
+ * @irq: Interrupt number (not used)
+ * @x: ??? (Not used)
+ */
+static irqreturn_t b2r2_irq_handler(int irq, void *x)
+{
+	unsigned long flags;
+
+	/* Spin lock is need in irq handler (SMP) */
+	spin_lock_irqsave(&b2r2_core.lock, flags);
+
+	/* Make sure that we have a clock */
+
+	/* Remember time for last irq (for timeout mgmt) */
+	b2r2_core.jiffies_last_irq = jiffies;
+	b2r2_core.stat_n_irq++;
+
+	/* Handle the interrupt(s) */
+	process_events(readl(&b2r2_core.hw->BLT_ITS));
+
+	/* Check if we can dispatch new jobs */
+	check_prio_list(true);
+
+	spin_unlock_irqrestore(&b2r2_core.lock, flags);
+
+	return IRQ_HANDLED;
+}
+
+
+#ifdef CONFIG_DEBUG_FS
+/**
+ * struct debugfs_reg - Represents one B2R2 register in debugfs
+ *
+ * @name: Register name
+ * @offset: Byte offset in B2R2 for register
+ */
+struct debugfs_reg {
+	const char name[30];
+	u32        offset;
+};
+
+/**
+ * debugfs_regs - Array of B2R2 debugfs registers
+ */
+static const struct debugfs_reg debugfs_regs[] = {
+	{"BLT_SSBA17", offsetof(struct b2r2_memory_map, BLT_SSBA17)},
+	{"BLT_SSBA18", offsetof(struct b2r2_memory_map, BLT_SSBA18)},
+	{"BLT_SSBA19", offsetof(struct b2r2_memory_map, BLT_SSBA19)},
+	{"BLT_SSBA20", offsetof(struct b2r2_memory_map, BLT_SSBA20)},
+	{"BLT_SSBA21", offsetof(struct b2r2_memory_map, BLT_SSBA21)},
+	{"BLT_SSBA22", offsetof(struct b2r2_memory_map, BLT_SSBA22)},
+	{"BLT_SSBA23", offsetof(struct b2r2_memory_map, BLT_SSBA23)},
+	{"BLT_SSBA24", offsetof(struct b2r2_memory_map, BLT_SSBA24)},
+	{"BLT_STBA5", offsetof(struct b2r2_memory_map, BLT_STBA5)},
+	{"BLT_STBA6", offsetof(struct b2r2_memory_map, BLT_STBA6)},
+	{"BLT_STBA7", offsetof(struct b2r2_memory_map, BLT_STBA7)},
+	{"BLT_STBA8", offsetof(struct b2r2_memory_map, BLT_STBA8)},
+	{"BLT_CTL", offsetof(struct b2r2_memory_map, BLT_CTL)},
+	{"BLT_ITS", offsetof(struct b2r2_memory_map, BLT_ITS)},
+	{"BLT_STA1", offsetof(struct b2r2_memory_map, BLT_STA1)},
+	{"BLT_SSBA1", offsetof(struct b2r2_memory_map, BLT_SSBA1)},
+	{"BLT_SSBA2", offsetof(struct b2r2_memory_map, BLT_SSBA2)},
+	{"BLT_SSBA3", offsetof(struct b2r2_memory_map, BLT_SSBA3)},
+	{"BLT_SSBA4", offsetof(struct b2r2_memory_map, BLT_SSBA4)},
+	{"BLT_SSBA5", offsetof(struct b2r2_memory_map, BLT_SSBA5)},
+	{"BLT_SSBA6", offsetof(struct b2r2_memory_map, BLT_SSBA6)},
+	{"BLT_SSBA7", offsetof(struct b2r2_memory_map, BLT_SSBA7)},
+	{"BLT_SSBA8", offsetof(struct b2r2_memory_map, BLT_SSBA8)},
+	{"BLT_STBA1", offsetof(struct b2r2_memory_map, BLT_STBA1)},
+	{"BLT_STBA2", offsetof(struct b2r2_memory_map, BLT_STBA2)},
+	{"BLT_STBA3", offsetof(struct b2r2_memory_map, BLT_STBA3)},
+	{"BLT_STBA4", offsetof(struct b2r2_memory_map, BLT_STBA4)},
+	{"BLT_CQ1_TRIG_IP", offsetof(struct b2r2_memory_map, BLT_CQ1_TRIG_IP)},
+	{"BLT_CQ1_TRIG_CTL", offsetof(struct b2r2_memory_map,
+				      BLT_CQ1_TRIG_CTL)},
+	{"BLT_CQ1_PACE_CTL", offsetof(struct b2r2_memory_map,
+				      BLT_CQ1_PACE_CTL)},
+	{"BLT_CQ1_IP", offsetof(struct b2r2_memory_map, BLT_CQ1_IP)},
+	{"BLT_CQ2_TRIG_IP", offsetof(struct b2r2_memory_map, BLT_CQ2_TRIG_IP)},
+	{"BLT_CQ2_TRIG_CTL", offsetof(struct b2r2_memory_map,
+				      BLT_CQ2_TRIG_CTL)},
+	{"BLT_CQ2_PACE_CTL", offsetof(struct b2r2_memory_map,
+				      BLT_CQ2_PACE_CTL)},
+	{"BLT_CQ2_IP", offsetof(struct b2r2_memory_map, BLT_CQ2_IP)},
+	{"BLT_AQ1_CTL", offsetof(struct b2r2_memory_map, BLT_AQ1_CTL)},
+	{"BLT_AQ1_IP", offsetof(struct b2r2_memory_map, BLT_AQ1_IP)},
+	{"BLT_AQ1_LNA", offsetof(struct b2r2_memory_map, BLT_AQ1_LNA)},
+	{"BLT_AQ1_STA", offsetof(struct b2r2_memory_map, BLT_AQ1_STA)},
+	{"BLT_AQ2_CTL", offsetof(struct b2r2_memory_map, BLT_AQ2_CTL)},
+	{"BLT_AQ2_IP", offsetof(struct b2r2_memory_map, BLT_AQ2_IP)},
+	{"BLT_AQ2_LNA", offsetof(struct b2r2_memory_map, BLT_AQ2_LNA)},
+	{"BLT_AQ2_STA", offsetof(struct b2r2_memory_map, BLT_AQ2_STA)},
+	{"BLT_AQ3_CTL", offsetof(struct b2r2_memory_map, BLT_AQ3_CTL)},
+	{"BLT_AQ3_IP", offsetof(struct b2r2_memory_map, BLT_AQ3_IP)},
+	{"BLT_AQ3_LNA", offsetof(struct b2r2_memory_map, BLT_AQ3_LNA)},
+	{"BLT_AQ3_STA", offsetof(struct b2r2_memory_map, BLT_AQ3_STA)},
+	{"BLT_AQ4_CTL", offsetof(struct b2r2_memory_map, BLT_AQ4_CTL)},
+	{"BLT_AQ4_IP", offsetof(struct b2r2_memory_map, BLT_AQ4_IP)},
+	{"BLT_AQ4_LNA", offsetof(struct b2r2_memory_map, BLT_AQ4_LNA)},
+	{"BLT_AQ4_STA", offsetof(struct b2r2_memory_map, BLT_AQ4_STA)},
+	{"BLT_SSBA9", offsetof(struct b2r2_memory_map, BLT_SSBA9)},
+	{"BLT_SSBA10", offsetof(struct b2r2_memory_map, BLT_SSBA10)},
+	{"BLT_SSBA11", offsetof(struct b2r2_memory_map, BLT_SSBA11)},
+	{"BLT_SSBA12", offsetof(struct b2r2_memory_map, BLT_SSBA12)},
+	{"BLT_SSBA13", offsetof(struct b2r2_memory_map, BLT_SSBA13)},
+	{"BLT_SSBA14", offsetof(struct b2r2_memory_map, BLT_SSBA14)},
+	{"BLT_SSBA15", offsetof(struct b2r2_memory_map, BLT_SSBA15)},
+	{"BLT_SSBA16", offsetof(struct b2r2_memory_map, BLT_SSBA16)},
+	{"BLT_SGA1", offsetof(struct b2r2_memory_map, BLT_SGA1)},
+	{"BLT_SGA2", offsetof(struct b2r2_memory_map, BLT_SGA2)},
+	{"BLT_ITM0", offsetof(struct b2r2_memory_map, BLT_ITM0)},
+	{"BLT_ITM1", offsetof(struct b2r2_memory_map, BLT_ITM1)},
+	{"BLT_ITM2", offsetof(struct b2r2_memory_map, BLT_ITM2)},
+	{"BLT_ITM3", offsetof(struct b2r2_memory_map, BLT_ITM3)},
+	{"BLT_DFV2", offsetof(struct b2r2_memory_map, BLT_DFV2)},
+	{"BLT_DFV1", offsetof(struct b2r2_memory_map, BLT_DFV1)},
+	{"BLT_PRI", offsetof(struct b2r2_memory_map, BLT_PRI)},
+	{"PLUGS1_OP2", offsetof(struct b2r2_memory_map, PLUGS1_OP2)},
+	{"PLUGS1_CHZ", offsetof(struct b2r2_memory_map, PLUGS1_CHZ)},
+	{"PLUGS1_MSZ", offsetof(struct b2r2_memory_map, PLUGS1_MSZ)},
+	{"PLUGS1_PGZ", offsetof(struct b2r2_memory_map, PLUGS1_PGZ)},
+	{"PLUGS2_OP2", offsetof(struct b2r2_memory_map, PLUGS2_OP2)},
+	{"PLUGS2_CHZ", offsetof(struct b2r2_memory_map, PLUGS2_CHZ)},
+	{"PLUGS2_MSZ", offsetof(struct b2r2_memory_map, PLUGS2_MSZ)},
+	{"PLUGS2_PGZ", offsetof(struct b2r2_memory_map, PLUGS2_PGZ)},
+	{"PLUGS3_OP2", offsetof(struct b2r2_memory_map, PLUGS3_OP2)},
+	{"PLUGS3_CHZ", offsetof(struct b2r2_memory_map, PLUGS3_CHZ)},
+	{"PLUGS3_MSZ", offsetof(struct b2r2_memory_map, PLUGS3_MSZ)},
+	{"PLUGS3_PGZ", offsetof(struct b2r2_memory_map, PLUGS3_PGZ)},
+	{"PLUGT_OP2", offsetof(struct b2r2_memory_map, PLUGT_OP2)},
+	{"PLUGT_CHZ", offsetof(struct b2r2_memory_map, PLUGT_CHZ)},
+	{"PLUGT_MSZ", offsetof(struct b2r2_memory_map, PLUGT_MSZ)},
+	{"PLUGT_PGZ", offsetof(struct b2r2_memory_map, PLUGT_PGZ)},
+	{"BLT_NIP", offsetof(struct b2r2_memory_map, BLT_NIP)},
+	{"BLT_CIC", offsetof(struct b2r2_memory_map, BLT_CIC)},
+	{"BLT_INS", offsetof(struct b2r2_memory_map, BLT_INS)},
+	{"BLT_ACK", offsetof(struct b2r2_memory_map, BLT_ACK)},
+	{"BLT_TBA", offsetof(struct b2r2_memory_map, BLT_TBA)},
+	{"BLT_TTY", offsetof(struct b2r2_memory_map, BLT_TTY)},
+	{"BLT_TXY", offsetof(struct b2r2_memory_map, BLT_TXY)},
+	{"BLT_TSZ", offsetof(struct b2r2_memory_map, BLT_TSZ)},
+	{"BLT_S1CF", offsetof(struct b2r2_memory_map, BLT_S1CF)},
+	{"BLT_S2CF", offsetof(struct b2r2_memory_map, BLT_S2CF)},
+	{"BLT_S1BA", offsetof(struct b2r2_memory_map, BLT_S1BA)},
+	{"BLT_S1TY", offsetof(struct b2r2_memory_map, BLT_S1TY)},
+	{"BLT_S1XY", offsetof(struct b2r2_memory_map, BLT_S1XY)},
+	{"BLT_S2BA", offsetof(struct b2r2_memory_map, BLT_S2BA)},
+	{"BLT_S2TY", offsetof(struct b2r2_memory_map, BLT_S2TY)},
+	{"BLT_S2XY", offsetof(struct b2r2_memory_map, BLT_S2XY)},
+	{"BLT_S2SZ", offsetof(struct b2r2_memory_map, BLT_S2SZ)},
+	{"BLT_S3BA", offsetof(struct b2r2_memory_map, BLT_S3BA)},
+	{"BLT_S3TY", offsetof(struct b2r2_memory_map, BLT_S3TY)},
+	{"BLT_S3XY", offsetof(struct b2r2_memory_map, BLT_S3XY)},
+	{"BLT_S3SZ", offsetof(struct b2r2_memory_map, BLT_S3SZ)},
+	{"BLT_CWO", offsetof(struct b2r2_memory_map, BLT_CWO)},
+	{"BLT_CWS", offsetof(struct b2r2_memory_map, BLT_CWS)},
+	{"BLT_CCO", offsetof(struct b2r2_memory_map, BLT_CCO)},
+	{"BLT_CML", offsetof(struct b2r2_memory_map, BLT_CML)},
+	{"BLT_FCTL", offsetof(struct b2r2_memory_map, BLT_FCTL)},
+	{"BLT_PMK", offsetof(struct b2r2_memory_map, BLT_PMK)},
+	{"BLT_RSF", offsetof(struct b2r2_memory_map, BLT_RSF)},
+	{"BLT_RZI", offsetof(struct b2r2_memory_map, BLT_RZI)},
+	{"BLT_HFP", offsetof(struct b2r2_memory_map, BLT_HFP)},
+	{"BLT_VFP", offsetof(struct b2r2_memory_map, BLT_VFP)},
+	{"BLT_Y_RSF", offsetof(struct b2r2_memory_map, BLT_Y_RSF)},
+	{"BLT_Y_RZI", offsetof(struct b2r2_memory_map, BLT_Y_RZI)},
+	{"BLT_Y_HFP", offsetof(struct b2r2_memory_map, BLT_Y_HFP)},
+	{"BLT_Y_VFP", offsetof(struct b2r2_memory_map, BLT_Y_VFP)},
+	{"BLT_KEY1", offsetof(struct b2r2_memory_map, BLT_KEY1)},
+	{"BLT_KEY2", offsetof(struct b2r2_memory_map, BLT_KEY2)},
+	{"BLT_SAR", offsetof(struct b2r2_memory_map, BLT_SAR)},
+	{"BLT_USR", offsetof(struct b2r2_memory_map, BLT_USR)},
+	{"BLT_IVMX0", offsetof(struct b2r2_memory_map, BLT_IVMX0)},
+	{"BLT_IVMX1", offsetof(struct b2r2_memory_map, BLT_IVMX1)},
+	{"BLT_IVMX2", offsetof(struct b2r2_memory_map, BLT_IVMX2)},
+	{"BLT_IVMX3", offsetof(struct b2r2_memory_map, BLT_IVMX3)},
+	{"BLT_OVMX0", offsetof(struct b2r2_memory_map, BLT_OVMX0)},
+	{"BLT_OVMX1", offsetof(struct b2r2_memory_map, BLT_OVMX1)},
+	{"BLT_OVMX2", offsetof(struct b2r2_memory_map, BLT_OVMX2)},
+	{"BLT_OVMX3", offsetof(struct b2r2_memory_map, BLT_OVMX3)},
+	{"BLT_VC1R", offsetof(struct b2r2_memory_map, BLT_VC1R)},
+	{"BLT_Y_HFC0", offsetof(struct b2r2_memory_map, BLT_Y_HFC0)},
+	{"BLT_Y_HFC1", offsetof(struct b2r2_memory_map, BLT_Y_HFC1)},
+	{"BLT_Y_HFC2", offsetof(struct b2r2_memory_map, BLT_Y_HFC2)},
+	{"BLT_Y_HFC3", offsetof(struct b2r2_memory_map, BLT_Y_HFC3)},
+	{"BLT_Y_HFC4", offsetof(struct b2r2_memory_map, BLT_Y_HFC4)},
+	{"BLT_Y_HFC5", offsetof(struct b2r2_memory_map, BLT_Y_HFC5)},
+	{"BLT_Y_HFC6", offsetof(struct b2r2_memory_map, BLT_Y_HFC6)},
+	{"BLT_Y_HFC7", offsetof(struct b2r2_memory_map, BLT_Y_HFC7)},
+	{"BLT_Y_HFC8", offsetof(struct b2r2_memory_map, BLT_Y_HFC8)},
+	{"BLT_Y_HFC9", offsetof(struct b2r2_memory_map, BLT_Y_HFC9)},
+	{"BLT_Y_HFC10", offsetof(struct b2r2_memory_map, BLT_Y_HFC10)},
+	{"BLT_Y_HFC11", offsetof(struct b2r2_memory_map, BLT_Y_HFC11)},
+	{"BLT_Y_HFC12", offsetof(struct b2r2_memory_map, BLT_Y_HFC12)},
+	{"BLT_Y_HFC13", offsetof(struct b2r2_memory_map, BLT_Y_HFC13)},
+	{"BLT_Y_HFC14", offsetof(struct b2r2_memory_map, BLT_Y_HFC14)},
+	{"BLT_Y_HFC15", offsetof(struct b2r2_memory_map, BLT_Y_HFC15)},
+	{"BLT_Y_VFC0", offsetof(struct b2r2_memory_map, BLT_Y_VFC0)},
+	{"BLT_Y_VFC1", offsetof(struct b2r2_memory_map, BLT_Y_VFC1)},
+	{"BLT_Y_VFC2", offsetof(struct b2r2_memory_map, BLT_Y_VFC2)},
+	{"BLT_Y_VFC3", offsetof(struct b2r2_memory_map, BLT_Y_VFC3)},
+	{"BLT_Y_VFC4", offsetof(struct b2r2_memory_map, BLT_Y_VFC4)},
+	{"BLT_Y_VFC5", offsetof(struct b2r2_memory_map, BLT_Y_VFC5)},
+	{"BLT_Y_VFC6", offsetof(struct b2r2_memory_map, BLT_Y_VFC6)},
+	{"BLT_Y_VFC7", offsetof(struct b2r2_memory_map, BLT_Y_VFC7)},
+	{"BLT_Y_VFC8", offsetof(struct b2r2_memory_map, BLT_Y_VFC8)},
+	{"BLT_Y_VFC9", offsetof(struct b2r2_memory_map, BLT_Y_VFC9)},
+	{"BLT_HFC0", offsetof(struct b2r2_memory_map, BLT_HFC0)},
+	{"BLT_HFC1", offsetof(struct b2r2_memory_map, BLT_HFC1)},
+	{"BLT_HFC2", offsetof(struct b2r2_memory_map, BLT_HFC2)},
+	{"BLT_HFC3", offsetof(struct b2r2_memory_map, BLT_HFC3)},
+	{"BLT_HFC4", offsetof(struct b2r2_memory_map, BLT_HFC4)},
+	{"BLT_HFC5", offsetof(struct b2r2_memory_map, BLT_HFC5)},
+	{"BLT_HFC6", offsetof(struct b2r2_memory_map, BLT_HFC6)},
+	{"BLT_HFC7", offsetof(struct b2r2_memory_map, BLT_HFC7)},
+	{"BLT_HFC8", offsetof(struct b2r2_memory_map, BLT_HFC8)},
+	{"BLT_HFC9", offsetof(struct b2r2_memory_map, BLT_HFC9)},
+	{"BLT_HFC10", offsetof(struct b2r2_memory_map, BLT_HFC10)},
+	{"BLT_HFC11", offsetof(struct b2r2_memory_map, BLT_HFC11)},
+	{"BLT_HFC12", offsetof(struct b2r2_memory_map, BLT_HFC12)},
+	{"BLT_HFC13", offsetof(struct b2r2_memory_map, BLT_HFC13)},
+	{"BLT_HFC14", offsetof(struct b2r2_memory_map, BLT_HFC14)},
+	{"BLT_HFC15", offsetof(struct b2r2_memory_map, BLT_HFC15)},
+	{"BLT_VFC0", offsetof(struct b2r2_memory_map, BLT_VFC0)},
+	{"BLT_VFC1", offsetof(struct b2r2_memory_map, BLT_VFC1)},
+	{"BLT_VFC2", offsetof(struct b2r2_memory_map, BLT_VFC2)},
+	{"BLT_VFC3", offsetof(struct b2r2_memory_map, BLT_VFC3)},
+	{"BLT_VFC4", offsetof(struct b2r2_memory_map, BLT_VFC4)},
+	{"BLT_VFC5", offsetof(struct b2r2_memory_map, BLT_VFC5)},
+	{"BLT_VFC6", offsetof(struct b2r2_memory_map, BLT_VFC6)},
+	{"BLT_VFC7", offsetof(struct b2r2_memory_map, BLT_VFC7)},
+	{"BLT_VFC8", offsetof(struct b2r2_memory_map, BLT_VFC8)},
+	{"BLT_VFC9", offsetof(struct b2r2_memory_map, BLT_VFC9)},
+};
+
+#ifdef HANDLE_TIMEOUTED_JOBS
+/**
+ * printk_regs() - Print B2R2 registers to printk
+ */
+static void printk_regs(void)
+{
+#ifdef CONFIG_B2R2_DEBUG
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(debugfs_regs); i++) {
+		unsigned long value = readl(
+			(unsigned long *) (((u8 *) b2r2_core.hw) +
+					   debugfs_regs[i].offset));
+		b2r2_log_regdump("%s: %08lX\n",
+			 debugfs_regs[i].name,
+			 value);
+	}
+#endif
+}
+#endif
+
+/**
+ * debugfs_b2r2_reg_read() - Implements debugfs read for B2R2 register
+ *
+ * @filp: File pointer
+ * @buf: User space buffer
+ * @count: Number of bytes to read
+ * @f_pos: File position
+ *
+ * Returns number of bytes read or negative error code
+ */
+static int debugfs_b2r2_reg_read(struct file *filp, char __user *buf,
+				 size_t count, loff_t *f_pos)
+{
+	size_t dev_size;
+	int ret = 0;
+
+	unsigned long value;
+	char *Buf = kmalloc(sizeof(char) * 4096, GFP_KERNEL);
+
+	if (Buf == NULL) {
+		ret = -ENOMEM;
+		goto out;
+	}
+
+	/* Read from B2R2 */
+	value = readl((unsigned long *) (((u8 *) b2r2_core.hw) +
+					 (u32) filp->f_dentry->
+					 d_inode->i_private));
+
+	/* Build the string */
+	dev_size = sprintf(Buf, "%8lX\n", value);
+
+	/* No more to read if offset != 0 */
+	if (*f_pos > dev_size)
+		goto out;
+
+	if (*f_pos + count > dev_size)
+		count = dev_size - *f_pos;
+
+	/* Return it to user space */
+	if (copy_to_user(buf, Buf, count))
+		ret = -EINVAL;
+	*f_pos += count;
+	ret = count;
+
+out:
+	if (Buf != NULL)
+		kfree(Buf);
+	return ret;
+}
+
+/**
+ * debugfs_b2r2_reg_write() - Implements debugfs write for B2R2 register
+ *
+ * @filp: File pointer
+ * @buf: User space buffer
+ * @count: Number of bytes to write
+ * @f_pos: File position
+ *
+ * Returns number of bytes written or negative error code
+ */
+static int debugfs_b2r2_reg_write(struct file *filp, const char __user *buf,
+				  size_t count, loff_t *f_pos)
+{
+	char Buf[80];
+	u32 reg_value;
+	int ret = 0;
+
+	/* Adjust count */
+	if (count >= sizeof(Buf))
+		count = sizeof(Buf) - 1;
+	/* Get it from user space */
+	if (copy_from_user(Buf, buf, count))
+		return -EINVAL;
+	Buf[count] = 0;
+	/* Convert from hex string */
+	if (sscanf(Buf, "%8lX", (unsigned long *) &reg_value) != 1)
+		return -EINVAL;
+
+	writel(reg_value, (u32 *) (((u8 *) b2r2_core.hw) +
+			(u32) filp->f_dentry->d_inode->i_private));
+
+	*f_pos += count;
+	ret = count;
+
+	return ret;
+}
+
+/**
+ * debugfs_b2r2_reg_fops() - File operations for B2R2 register debugfs
+ */
+static const struct file_operations debugfs_b2r2_reg_fops = {
+	.owner = THIS_MODULE,
+	.read  = debugfs_b2r2_reg_read,
+	.write = debugfs_b2r2_reg_write,
+};
+
+/**
+ * debugfs_b2r2_regs_read() - Implements debugfs read for B2R2 register dump
+ *
+ * @filp: File pointer
+ * @buf: User space buffer
+ * @count: Number of bytes to read
+ * @f_pos: File position
+ *
+ * Returns number of bytes written or negative error code
+ */
+static int debugfs_b2r2_regs_read(struct file *filp, char __user *buf,
+				  size_t count, loff_t *f_pos)
+{
+	size_t dev_size = 0;
+	int ret = 0;
+	int i;
+	char *Buf = kmalloc(sizeof(char) * 4096, GFP_KERNEL);
+
+	if (Buf == NULL) {
+		ret = -ENOMEM;
+		goto out;
+	}
+
+	/* Build a giant string containing all registers */
+	for (i = 0; i < ARRAY_SIZE(debugfs_regs); i++) {
+		unsigned long value =
+			readl((unsigned long *) (((u8 *) b2r2_core.hw) +
+						 debugfs_regs[i].offset));
+		dev_size += sprintf(Buf + dev_size, "%s: %08lX\n",
+				    debugfs_regs[i].name,
+				    value);
+	}
+
+	/* No more to read if offset != 0 */
+	if (*f_pos > dev_size)
+		goto out;
+
+	if (*f_pos + count > dev_size)
+		count = dev_size - *f_pos;
+
+	if (copy_to_user(buf, Buf, count))
+		ret = -EINVAL;
+	*f_pos += count;
+	ret = count;
+
+out:
+	if (Buf != NULL)
+		kfree(Buf);
+	return ret;
+}
+
+/**
+ * debugfs_b2r2_regs_fops() - File operations for B2R2 register dump debugfs
+ */
+static const struct file_operations debugfs_b2r2_regs_fops = {
+	.owner = THIS_MODULE,
+	.read  = debugfs_b2r2_regs_read,
+};
+
+/**
+ * debugfs_b2r2_stat_read() - Implements debugfs read for B2R2 statistics
+ *
+ * @filp: File pointer
+ * @buf: User space buffer
+ * @count: Number of bytes to read
+ * @f_pos: File position
+ *
+ * Returns number of bytes read or negative error code
+ */
+static int debugfs_b2r2_stat_read(struct file *filp, char __user *buf,
+				  size_t count, loff_t *f_pos)
+{
+	size_t dev_size = 0;
+	int ret = 0;
+	int i = 0;
+	char *Buf = kmalloc(sizeof(char) * 4096, GFP_KERNEL);
+
+	if (Buf == NULL) {
+		ret = -ENOMEM;
+		goto out;
+	}
+
+	/* Build a string containing all statistics */
+	dev_size += sprintf(Buf + dev_size, "Interrupts: %lu\n",
+			    b2r2_core.stat_n_irq);
+	dev_size += sprintf(Buf + dev_size, "Added jobs: %lu\n",
+			    b2r2_core.stat_n_jobs_added);
+	dev_size += sprintf(Buf + dev_size, "Removed jobs: %lu\n",
+			    b2r2_core.stat_n_jobs_removed);
+	dev_size += sprintf(Buf + dev_size, "Jobs in prio list: %lu\n",
+			    b2r2_core.stat_n_jobs_in_prio_list);
+	dev_size += sprintf(Buf + dev_size, "Active jobs: %lu\n",
+			    b2r2_core.n_active_jobs);
+	for (i = 0; i < ARRAY_SIZE(b2r2_core.active_jobs); i++)
+		dev_size += sprintf(Buf + dev_size, "Job in queue %d: %p\n",
+				    i, b2r2_core.active_jobs[i]);
+	dev_size += sprintf(Buf + dev_size, "Clock requests: %lu\n",
+			    b2r2_core.clock_request_count);
+
+	/* No more to read if offset != 0 */
+	if (*f_pos > dev_size)
+		goto out;
+
+	if (*f_pos + count > dev_size)
+		count = dev_size - *f_pos;
+
+	if (copy_to_user(buf, Buf, count))
+		ret = -EINVAL;
+	*f_pos += count;
+	ret = count;
+
+out:
+	if (Buf != NULL)
+		kfree(Buf);
+	return ret;
+}
+
+/**
+ * debugfs_b2r2_stat_fops() - File operations for B2R2 statistics debugfs
+ */
+static const struct file_operations debugfs_b2r2_stat_fops = {
+	.owner = THIS_MODULE,
+	.read  = debugfs_b2r2_stat_read,
+};
+
+
+/**
+ * debugfs_b2r2_clock_read() - Implements debugfs read for
+ *                             PMU B2R2 clock register
+ * @filp: File pointer
+ * @buf: User space buffer
+ * @count: Number of bytes to read
+ * @f_pos: File position
+ *
+ * Returns number of bytes read or negative error code
+ */
+static int debugfs_b2r2_clock_read(struct file *filp, char __user *buf,
+				   size_t count, loff_t *f_pos)
+{
+	/* 10 characters hex number + newline + string terminator; */
+	char Buf[10+2];
+	size_t dev_size;
+	int ret = 0;
+
+	unsigned long value = clk_get_rate(b2r2_core.b2r2_clock);
+
+	dev_size = sprintf(Buf, "%#010lX\n", value);
+
+	/* No more to read if offset != 0 */
+	if (*f_pos > dev_size)
+		goto out;
+
+	if (*f_pos + count > dev_size)
+		count = dev_size - *f_pos;
+
+	if (copy_to_user(buf, Buf, count))
+		ret = -EINVAL;
+	*f_pos += count;
+	ret = count;
+
+out:
+	return ret;
+}
+
+/**
+ * debugfs_b2r2_clock_write() - Implements debugfs write for
+ *                              PMU B2R2 clock register
+ * @filp: File pointer
+ * @buf: User space buffer
+ * @count: Number of bytes to write
+ * @f_pos: File position
+ *
+ * Returns number of bytes written or negative error code
+ */
+static int debugfs_b2r2_clock_write(struct file *filp, const char __user *buf,
+				    size_t count, loff_t *f_pos)
+{
+	char Buf[80];
+	u32 reg_value;
+	int ret = 0;
+
+	if (count >= sizeof(Buf))
+		count = sizeof(Buf) - 1;
+	if (copy_from_user(Buf, buf, count))
+		return -EINVAL;
+	Buf[count] = 0;
+	if (sscanf(Buf, "%8lX", (unsigned long *) &reg_value) != 1)
+		return -EINVAL;
+
+	/*not working yet*/
+	/*clk_set_rate(b2r2_core.b2r2_clock, (unsigned long) reg_value);*/
+
+	*f_pos += count;
+	ret = count;
+
+	return ret;
+}
+
+/**
+ * debugfs_b2r2_clock_fops() - File operations for PMU B2R2 clock debugfs
+ */
+static const struct file_operations debugfs_b2r2_clock_fops = {
+	.owner = THIS_MODULE,
+	.read  = debugfs_b2r2_clock_read,
+	.write = debugfs_b2r2_clock_write,
+};
+
+#endif
+
+/**
+ *
+ * init_hw() - B2R2 Hardware reset & initiliaze
+ *
+ * @pdev: B2R2 platform device
+ *
+ * 1)Register interrupt handler
+ *
+ * 2)B2R2 Register map
+ *
+ * 3)For resetting B2R2 hardware,write to B2R2 Control register the
+ * B2R2BLT_CTLGLOBAL_soft_reset and then polling for on
+ * B2R2 status register for B2R2BLT_STA1BDISP_IDLE flag.
+ *
+ * 4)Wait for B2R2 hardware to be idle (on a timeout rather than while loop)
+ *
+ * 5)Driver status reset
+ *
+ * 6)Recover from any error without any leaks.
+ *
+ */
+static int init_hw(void)
+{
+	int result = 0;
+	u32 uTimeOut = B2R2_DRIVER_TIMEOUT_VALUE;
+
+	/* Put B2R2 into reset */
+	clear_interrupts();
+
+	writel(readl(&b2r2_core.hw->BLT_CTL) | B2R2BLT_CTLGLOBAL_soft_reset,
+		&b2r2_core.hw->BLT_CTL);
+
+
+	/* Set up interrupt handler */
+	result = request_irq(b2r2_core.irq, b2r2_irq_handler, 0,
+			     "b2r2-interrupt", 0);
+	if (result) {
+		b2r2_log_err("%s: failed to register IRQ for B2R2\n", __func__);
+		goto b2r2_init_request_irq_failed;
+	}
+
+	b2r2_log_info("do a global reset..\n");
+
+	/* Release reset */
+	writel(0x00000000, &b2r2_core.hw->BLT_CTL);
+
+	b2r2_log_info("wait for B2R2 to be idle..\n");
+
+	/** Wait for B2R2 to be idle (on a timeout rather than while loop) */
+	while ((uTimeOut > 0) &&
+	       ((readl(&b2r2_core.hw->BLT_STA1) &
+		 B2R2BLT_STA1BDISP_IDLE) == 0x0))
+		uTimeOut--;
+	if (uTimeOut == 0) {
+		b2r2_log_err(
+			 "%s: B2R2 not idle after SW reset\n", __func__);
+		result = -EAGAIN;
+		goto b2r2_core_init_hw_timeout;
+	}
+
+#ifdef CONFIG_DEBUG_FS
+	/* Register debug fs files for register access */
+	if (b2r2_core.debugfs_root_dir && !b2r2_core.debugfs_regs_dir) {
+		int i;
+		b2r2_core.debugfs_regs_dir = debugfs_create_dir("regs",
+				b2r2_core.debugfs_root_dir);
+		debugfs_create_file("all", 0666, b2r2_core.debugfs_regs_dir,
+				0, &debugfs_b2r2_regs_fops);
+		/* Create debugfs entries for all static registers */
+		for (i = 0; i < ARRAY_SIZE(debugfs_regs); i++)
+			debugfs_create_file(debugfs_regs[i].name, 0666,
+					b2r2_core.debugfs_regs_dir,
+					(void *) debugfs_regs[i].offset,
+					&debugfs_b2r2_reg_fops);
+	}
+#endif
+
+	b2r2_log_info("%s ended..\n", __func__);
+	return result;
+
+/** Recover from any error without any leaks */
+
+b2r2_core_init_hw_timeout:
+
+	/** Free B2R2 interrupt handler */
+
+	free_irq(b2r2_core.irq, 0);
+
+b2r2_init_request_irq_failed:
+
+	if (b2r2_core.hw)
+		iounmap(b2r2_core.hw);
+	b2r2_core.hw = NULL;
+
+	return result;
+
+}
+
+
+/**
+ * exit_hw() - B2R2 Hardware exit
+ *
+ * b2r2_core.lock _must_ NOT be held
+ */
+static void exit_hw(void)
+{
+	unsigned long flags;
+
+	b2r2_log_info("%s started..\n", __func__);
+
+#ifdef CONFIG_DEBUG_FS
+	/* Unregister our debugfs entries */
+	if (b2r2_core.debugfs_regs_dir) {
+		debugfs_remove_recursive(b2r2_core.debugfs_regs_dir);
+		b2r2_core.debugfs_regs_dir = NULL;
+	}
+#endif
+	b2r2_log_debug("%s: locking b2r2_core.lock\n", __func__);
+	spin_lock_irqsave(&b2r2_core.lock, flags);
+
+	/* Cancel all pending jobs */
+	b2r2_log_debug("%s: canceling pending jobs\n", __func__);
+	exit_job_list(&b2r2_core.prio_queue);
+
+	/* Soft reset B2R2 (Close all DMA,
+	   reset all state to idle, reset regs)*/
+	b2r2_log_debug("%s: putting b2r2 in reset\n", __func__);
+	writel(readl(&b2r2_core.hw->BLT_CTL) | B2R2BLT_CTLGLOBAL_soft_reset,
+		&b2r2_core.hw->BLT_CTL);
+
+	b2r2_log_debug("%s: clearing interrupts\n", __func__);
+	clear_interrupts();
+
+	/** Free B2R2 interrupt handler */
+	b2r2_log_debug("%s: freeing interrupt handler\n", __func__);
+	free_irq(b2r2_core.irq, 0);
+
+	b2r2_log_debug("%s: unlocking b2r2_core.lock\n", __func__);
+	spin_unlock_irqrestore(&b2r2_core.lock, flags);
+
+	b2r2_log_info("%s ended...\n", __func__);
+}
+
+/**
+ * b2r2_probe() - This routine loads the B2R2 core driver
+ *
+ * @pdev: platform device.
+ */
+static int b2r2_probe(struct platform_device *pdev)
+{
+	int ret = 0;
+	struct resource *res;
+
+	BUG_ON(pdev == NULL);
+
+	ret = b2r2_debug_init(&pdev->dev);
+	if (ret < 0) {
+		dev_err(b2r2_core.log_dev, "b2r2_debug_init failed\n");
+		goto b2r2_probe_debug_init_failed;
+	}
+
+	b2r2_core.log_dev = &pdev->dev;
+	b2r2_log_info("init started.\n");
+
+	/* Init spin locks */
+	spin_lock_init(&b2r2_core.lock);
+
+	/* Init job queues */
+	INIT_LIST_HEAD(&b2r2_core.prio_queue);
+
+#ifdef HANDLE_TIMEOUTED_JOBS
+	/* Create work queue for callbacks & timeout */
+	INIT_DELAYED_WORK(&b2r2_core.timeout_work, timeout_work_function);
+#endif
+
+	/* Work queue for callbacks and timeout management */
+	b2r2_core.work_queue = create_workqueue("B2R2");
+	if (!b2r2_core.work_queue) {
+		ret = -ENOMEM;
+		goto b2r2_probe_no_work_queue;
+	}
+
+	/* Get the clock for B2R2 */
+	b2r2_core.b2r2_clock = clk_get(&pdev->dev, "b2r2");
+	if (IS_ERR(b2r2_core.b2r2_clock)) {
+		ret = PTR_ERR(b2r2_core.b2r2_clock);
+		b2r2_log_err("clk_get b2r2 failed\n");
+		goto b2r2_probe_no_clk;
+	}
+
+	/* Get the B2R2 regulator */
+	b2r2_core.b2r2_reg = regulator_get(&pdev->dev, "vsupply");
+	if (IS_ERR(b2r2_core.b2r2_reg)) {
+		ret = PTR_ERR(b2r2_core.b2r2_reg);
+		b2r2_log_err("regulator_get vsupply failed (dev_name=%s)\n",
+				dev_name(&pdev->dev));
+		goto b2r2_probe_no_reg;
+	}
+
+	/* Init power management */
+	mutex_init(&b2r2_core.domain_lock);
+	INIT_DELAYED_WORK_DEFERRABLE(&b2r2_core.domain_disable_work,
+			domain_disable_work_function);
+	b2r2_core.domain_enabled = false;
+
+	/* Map B2R2 into kernel virtual memory space */
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	if (res == NULL)
+		goto b2r2_probe_no_res;
+
+	/* Hook up irq */
+	b2r2_core.irq = platform_get_irq(pdev, 0);
+	if (b2r2_core.irq <= 0) {
+		b2r2_log_info("%s: Failed to request irq (irq=%d)\n", __func__,
+								b2r2_core.irq);
+		goto b2r2_failed_irq_get;
+	}
+
+	b2r2_core.hw = (struct b2r2_memory_map *) ioremap(res->start,
+			 res->end - res->start + 1);
+	if (b2r2_core.hw == NULL) {
+
+		b2r2_log_info("%s: ioremap failed\n", __func__);
+		ret = -ENOMEM;
+		goto b2r2_probe_ioremap_failed;
+	}
+
+	dev_dbg(b2r2_core.log_dev,
+		"b2r2 structure address %p\n",
+		b2r2_core.hw);
+
+	/* Initialize b2r2_blt module. FIXME: Module of it's own
+	   or perhaps a dedicated module init c file? */
+	ret = b2r2_blt_module_init();
+	if (ret < 0) {
+		b2r2_log_err("b2r2_blt_module_init failed\n");
+		goto b2r2_probe_blt_init_fail;
+	}
+
+	b2r2_core.op_size = B2R2_PLUG_OPCODE_SIZE_DEFAULT;
+	b2r2_core.ch_size = B2R2_PLUG_CHUNK_SIZE_DEFAULT;
+	b2r2_core.pg_size = B2R2_PLUG_PAGE_SIZE_DEFAULT;
+	b2r2_core.mg_size = B2R2_PLUG_MESSAGE_SIZE_DEFAULT;
+	b2r2_core.min_req_time = 0;
+
+#ifdef CONFIG_DEBUG_FS
+	b2r2_core.debugfs_root_dir = debugfs_create_dir("b2r2", NULL);
+	debugfs_create_file("stat", 0666, b2r2_core.debugfs_root_dir,
+			0, &debugfs_b2r2_stat_fops);
+	debugfs_create_file("clock", 0666, b2r2_core.debugfs_root_dir,
+			0, &debugfs_b2r2_clock_fops);
+
+	debugfs_create_u8("op_size", 0666, b2r2_core.debugfs_root_dir,
+			&b2r2_core.op_size);
+	debugfs_create_u8("ch_size", 0666, b2r2_core.debugfs_root_dir,
+			&b2r2_core.ch_size);
+	debugfs_create_u8("pg_size", 0666, b2r2_core.debugfs_root_dir,
+			&b2r2_core.pg_size);
+	debugfs_create_u8("mg_size", 0666, b2r2_core.debugfs_root_dir,
+			&b2r2_core.mg_size);
+	debugfs_create_u16("min_req_time", 0666, b2r2_core.debugfs_root_dir,
+			&b2r2_core.min_req_time);
+#endif
+
+	b2r2_log_info("init done.\n");
+
+	return ret;
+
+/** Recover from any error if something fails */
+b2r2_probe_blt_init_fail:
+b2r2_probe_ioremap_failed:
+b2r2_failed_irq_get:
+b2r2_probe_no_res:
+	regulator_put(b2r2_core.b2r2_reg);
+b2r2_probe_no_reg:
+	clk_put(b2r2_core.b2r2_clock);
+b2r2_probe_no_clk:
+	destroy_workqueue(b2r2_core.work_queue);
+	b2r2_core.work_queue = NULL;
+b2r2_probe_no_work_queue:
+
+	b2r2_log_info("init done with errors.\n");
+b2r2_probe_debug_init_failed:
+
+	return ret;
+
+}
+
+
+
+/**
+ * b2r2_remove - This routine unloads b2r2 driver
+ *
+ * @pdev: platform device.
+ */
+static int b2r2_remove(struct platform_device *pdev)
+{
+	unsigned long flags;
+
+	BUG_ON(pdev == NULL);
+
+	b2r2_log_info("%s started\n", __func__);
+
+#ifdef CONFIG_DEBUG_FS
+	debugfs_remove_recursive(b2r2_core.debugfs_root_dir);
+#endif
+
+	/* Flush B2R2 work queue (call all callbacks) */
+	flush_workqueue(b2r2_core.work_queue);
+
+	/* Exit b2r2 blt module */
+	b2r2_blt_module_exit();
+
+#ifdef HANDLE_TIMEOUTED_JOBS
+	cancel_delayed_work(&b2r2_core.timeout_work);
+#endif
+
+	/* Flush B2R2 work queue (call all callbacks for
+	   cancelled jobs) */
+	flush_workqueue(b2r2_core.work_queue);
+
+	/* Make sure the power is turned off */
+	cancel_delayed_work_sync(&b2r2_core.domain_disable_work);
+
+	/** Unmap B2R2 registers */
+	b2r2_log_info("unmap b2r2 registers..\n");
+	if (b2r2_core.hw) {
+		iounmap(b2r2_core.hw);
+
+		b2r2_core.hw = NULL;
+	}
+
+	destroy_workqueue(b2r2_core.work_queue);
+
+	spin_lock_irqsave(&b2r2_core.lock, flags);
+	b2r2_core.work_queue = NULL;
+	spin_unlock_irqrestore(&b2r2_core.lock, flags);
+
+	/* Return the clock */
+	clk_put(b2r2_core.b2r2_clock);
+	regulator_put(b2r2_core.b2r2_reg);
+
+	b2r2_log_info("%s ended\n", __func__);
+
+	b2r2_core.log_dev = NULL;
+
+	b2r2_debug_exit();
+
+	return 0;
+
+}
+/**
+ * b2r2_suspend() - This routine puts the B2R2 device in to sustend state.
+ * @pdev: platform device.
+ *
+ * This routine stores the current state of the b2r2 device and puts in to suspend state.
+ *
+ */
+int b2r2_suspend(struct platform_device *pdev, pm_message_t state)
+{
+	b2r2_log_info("%s\n", __func__);
+
+	/* Flush B2R2 work queue (call all callbacks) */
+	flush_workqueue(b2r2_core.work_queue);
+
+#ifdef HANDLE_TIMEOUTED_JOBS
+	cancel_delayed_work(&b2r2_core.timeout_work);
+#endif
+
+	/* Flush B2R2 work queue (call all callbacks for
+	   cancelled jobs) */
+	flush_workqueue(b2r2_core.work_queue);
+
+	/* Make sure power is turned off */
+	cancel_delayed_work_sync(&b2r2_core.domain_disable_work);
+
+	return 0;
+}
+
+
+/**
+ * b2r2_resume() - This routine resumes the B2R2 device from sustend state.
+ * @pdev: platform device.
+ *
+ * This routine restore back the current state of the b2r2 device resumes.
+ *
+ */
+int b2r2_resume(struct platform_device *pdev)
+{
+	b2r2_log_info("%s\n", __func__);
+
+	return 0;
+}
+
+/**
+ * struct platform_b2r2_driver - Platform driver configuration for the
+ * B2R2 core driver
+ */
+static struct platform_driver platform_b2r2_driver = {
+	.remove = b2r2_remove,
+	.driver = {
+		.name	= "b2r2",
+	},
+	/** TODO implement power mgmt functions */
+	.suspend = b2r2_suspend,
+	.resume =  b2r2_resume,
+};
+
+
+/**
+ * b2r2_init() - Module init function for the B2R2 core module
+ */
+static int __init b2r2_init(void)
+{
+	printk(KERN_INFO "%s\n", __func__);
+	return platform_driver_probe(&platform_b2r2_driver, b2r2_probe);
+}
+module_init(b2r2_init);
+
+/**
+ * b2r2_exit() - Module exit function for the B2R2 core module
+ */
+static void __exit b2r2_exit(void)
+{
+	printk(KERN_INFO "%s\n", __func__);
+	platform_driver_unregister(&platform_b2r2_driver);
+	return;
+}
+module_exit(b2r2_exit);
+
+
+/** Module is having GPL license */
+
+MODULE_LICENSE("GPL");
+
+/** Module author & discription */
+
+MODULE_AUTHOR("Robert Fekete (robert.fekete@stericsson.com)");
+MODULE_DESCRIPTION("B2R2 Core driver");
diff --git a/drivers/video/b2r2/b2r2_core.h b/drivers/video/b2r2/b2r2_core.h
new file mode 100644
index 00000000000..2f958751694
--- /dev/null
+++ b/drivers/video/b2r2/b2r2_core.h
@@ -0,0 +1,222 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2010
+ *
+ * ST-Ericsson B2R2 core driver
+ *
+ * Author: Robert Fekete <robert.fekete@stericsson.com>
+ * Author: Paul Wannback
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+
+#ifndef __B2R2_CORE_H__
+#define __B2R2_CORE_H__
+
+#include <linux/types.h>
+#include <linux/spinlock.h>
+#include <linux/wait.h>
+#include <linux/workqueue.h>
+
+/**
+ * enum b2r2_core_queue - Indicates the B2R2 queue that the job belongs to
+ *
+ * @B2R2_CORE_QUEUE_AQ1: Application queue 1
+ * @B2R2_CORE_QUEUE_AQ2: Application queue 2
+ * @B2R2_CORE_QUEUE_AQ3: Application queue 3
+ * @B2R2_CORE_QUEUE_AQ4: Application queue 4
+ * @B2R2_CORE_QUEUE_CQ1: Composition queue 1
+ * @B2R2_CORE_QUEUE_CQ2: Composition queue 2
+ * @B2R2_CORE_QUEUE_NO_OF: Number of queues
+ */
+enum b2r2_core_queue {
+	B2R2_CORE_QUEUE_AQ1 = 0,
+	B2R2_CORE_QUEUE_AQ2,
+	B2R2_CORE_QUEUE_AQ3,
+	B2R2_CORE_QUEUE_AQ4,
+	B2R2_CORE_QUEUE_CQ1,
+	B2R2_CORE_QUEUE_CQ2,
+	B2R2_CORE_QUEUE_NO_OF,
+};
+
+#define B2R2_NUM_APPLICATIONS_QUEUES 4
+
+/**
+ * enum b2r2_core_job_state - Indicates the current state of the job
+ *
+ * @B2R2_CORE_JOB_IDLE: Never queued
+ * @B2R2_CORE_JOB_QUEUED: In queue but not started yet
+ * @B2R2_CORE_JOB_RUNNING: Running, executed by B2R2
+ * @B2R2_CORE_JOB_DONE: Completed
+ * @B2R2_CORE_JOB_CANCELED: Canceled
+ */
+enum b2r2_core_job_state {
+	B2R2_CORE_JOB_IDLE = 0,
+	B2R2_CORE_JOB_QUEUED,
+	B2R2_CORE_JOB_RUNNING,
+	B2R2_CORE_JOB_DONE,
+	B2R2_CORE_JOB_CANCELED,
+};
+
+/**
+ * struct b2r2_core_job - Represents a B2R2 core job
+ *
+ * @start_sentinel: Memory overwrite guard
+ *
+ * @tag: Client value. Used by b2r2_core_job_find_first_with_tag().
+ * @prio: Job priority, from -19 up to 20. Mapped to the
+ *        B2R2 application queues. Filled in by the client.
+ * @first_node_address: Physical address of the first node. Filled
+ *                      in by the client.
+ * @last_node_address: Physical address of the last node. Filled
+ *                     in by the client.
+ *
+ * @callback: Function that will be called when the job is done.
+ * @acquire_resources: Function that allocates the resources needed
+ *                     to execute the job (i.e. SRAM alloc). Must not
+ *                     sleep if atomic, should fail with negative error code
+ *                     if resources not available.
+ * @release_resources: Function that releases the resources previously
+ *                     allocated by acquire_resources (i.e. SRAM alloc).
+ * @release: Function that will be called when the reference count reaches
+ *           zero.
+ *
+ * @job_id: Unique id for this job, assigned by B2R2 core
+ * @job_state: The current state of the job
+ * @jiffies: Number of jiffies needed for this request
+ *
+ * @list: List entry element for internal list management
+ * @event: Wait queue event to wait for job done
+ * @work: Work queue structure, for callback implementation
+ *
+ * @queue: The queue that this job shall be submitted to
+ * @control: B2R2 Queue control
+ * @pace_control: For composition queue only
+ * @interrupt_context: Context for interrupt
+ *
+ * @end_sentinel: Memory overwrite guard
+ */
+struct b2r2_core_job {
+	u32 start_sentinel;
+
+	/* Data to be filled in by client */
+	int tag;
+	int prio;
+	u32 first_node_address;
+	u32 last_node_address;
+	void (*callback)(struct b2r2_core_job *);
+	int (*acquire_resources)(struct b2r2_core_job *,
+		bool atomic);
+	void (*release_resources)(struct b2r2_core_job *,
+		bool atomic);
+	void (*release)(struct b2r2_core_job *);
+
+	/* Output data, do not modify */
+	int  job_id;
+	enum b2r2_core_job_state job_state;
+	unsigned long jiffies;
+
+	/* Data below is internal to b2r2_core, do not modify */
+
+	/* Reference counting */
+	u32 ref_count;
+
+	/* Internal data */
+	struct list_head  list;
+	wait_queue_head_t event;
+	struct work_struct work;
+
+	/* B2R2 HW data */
+	enum b2r2_core_queue queue;
+	u32 control;
+	u32 pace_control;
+	u32 interrupt_context;
+
+	/* Timing data */
+	u32 hw_start_time;
+	s32 nsec_active_in_hw;
+
+	u32 end_sentinel;
+};
+
+/**
+ * b2r2_core_job_add() - Adds a job to B2R2 job queues
+ *
+ * The job reference count will be increased after this function
+ * has been called and b2r2_core_job_release() must be called to
+ * release the reference. The job callback function will be always
+ * be called after the job is done or cancelled.
+ *
+ * @job: Job to be added
+ *
+ * Returns 0 if OK else negative error code
+ *
+ */
+int b2r2_core_job_add(struct b2r2_core_job *job);
+
+/**
+ * b2r2_core_job_wait() - Waits for an added job to be done.
+ *
+ * @job: Job to wait for
+ *
+ * Returns 0 if job done else negative error code
+ *
+ */
+int b2r2_core_job_wait(struct b2r2_core_job *job);
+
+/**
+ * b2r2_core_job_cancel() - Cancel an already added job.
+ *
+ * @job: Job to cancel
+ *
+ * Returns 0 if job cancelled or done else negative error code
+ *
+ */
+int b2r2_core_job_cancel(struct b2r2_core_job *job);
+
+/**
+ * b2r2_core_job_find() - Finds job with given job id
+ *
+ * Reference count will be increased for the found job
+ *
+ * @job_id: Job id to find
+ *
+ * Returns job if found, else NULL
+ *
+ */
+struct b2r2_core_job *b2r2_core_job_find(int job_id);
+
+/**
+ * b2r2_core_job_find_first_with_tag() - Finds first job with given tag
+ *
+ * Reference count will be increased for the found job.
+ * This function can be used to find all jobs for a client, i.e.
+ * when cancelling all jobs for a client.
+ *
+ * @tag: Tag to find
+ *
+ * Returns job if found, else NULL
+ *
+ */
+struct b2r2_core_job *b2r2_core_job_find_first_with_tag(int tag);
+
+/**
+ * b2r2_core_job_addref() - Increase the job reference count.
+ *
+ * @job: Job to increase reference count for.
+ * @caller: The function calling this function (for debug)
+ */
+void b2r2_core_job_addref(struct b2r2_core_job *job, const char *caller);
+
+/**
+ * b2r2_core_job_release() - Decrease the job reference count. The
+ *                           job will be released (the release() function
+ *                           will be called) when the reference count
+ *                           reaches zero.
+ *
+ * @job: Job to decrease reference count for.
+ * @caller: The function calling this function (for debug)
+ */
+void b2r2_core_job_release(struct b2r2_core_job *job, const char *caller);
+
+#endif /* !defined(__B2R2_CORE_JOB_H__) */
diff --git a/drivers/video/b2r2/b2r2_debug.c b/drivers/video/b2r2/b2r2_debug.c
new file mode 100644
index 00000000000..d4711cd3e28
--- /dev/null
+++ b/drivers/video/b2r2/b2r2_debug.c
@@ -0,0 +1,343 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2010
+ *
+ * ST-Ericsson B2R2 dynamic debug
+ *
+ * Author: Fredrik Allansson <fredrik.allansson@stericsson.com>
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+
+#include "b2r2_debug.h"
+#include <linux/debugfs.h>
+#include <linux/kernel.h>
+#include <linux/slab.h>
+#include <linux/uaccess.h>
+
+int b2r2_log_levels[B2R2_LOG_LEVEL_COUNT];
+struct device *b2r2_log_dev;
+
+static struct dentry *root_dir;
+static struct dentry *log_lvl_dir;
+static struct dentry *stats_dir;
+
+#define CHARS_IN_NODE_DUMP 1544
+
+static const size_t dumped_node_size = CHARS_IN_NODE_DUMP * sizeof(char) + 1;
+
+static void dump_node(char *dst, struct b2r2_node *node)
+{
+	dst += sprintf(dst, "node 0x%08x ------------------\n",
+			(unsigned int)node);
+
+	dst += sprintf(dst, "%s\t0x%08x\n",
+			"B2R2_NIP:", node->node.GROUP0.B2R2_NIP);
+	dst += sprintf(dst, "%s\t0x%08x\n",
+			"B2R2_CIC:", node->node.GROUP0.B2R2_CIC);
+	dst += sprintf(dst, "%s\t0x%08x\n",
+			"B2R2_INS:", node->node.GROUP0.B2R2_INS);
+	dst += sprintf(dst, "%s\t0x%08x\n",
+			"B2R2_ACK:", node->node.GROUP0.B2R2_ACK);
+	dst += sprintf(dst, "--\n");
+
+	dst += sprintf(dst, "%s\t0x%08x\n",
+			"B2R2_TBA:", node->node.GROUP1.B2R2_TBA);
+	dst += sprintf(dst, "%s\t0x%08x\n",
+			"B2R2_TTY:", node->node.GROUP1.B2R2_TTY);
+	dst += sprintf(dst, "%s\t0x%08x\n",
+			"B2R2_TXY:", node->node.GROUP1.B2R2_TXY);
+	dst += sprintf(dst, "%s\t0x%08x\n",
+			"B2R2_TSZ:", node->node.GROUP1.B2R2_TSZ);
+	dst += sprintf(dst, "--\n");
+
+	dst += sprintf(dst, "%s\t0x%08x\n",
+			"B2R2_S1CF:", node->node.GROUP2.B2R2_S1CF);
+	dst += sprintf(dst, "%s\t0x%08x\n",
+			"B2R2_S2CF:", node->node.GROUP2.B2R2_S2CF);
+	dst += sprintf(dst, "--\n");
+
+	dst += sprintf(dst, "%s\t0x%08x\n",
+			"B2R2_S1BA:", node->node.GROUP3.B2R2_SBA);
+	dst += sprintf(dst, "%s\t0x%08x\n",
+			"B2R2_S1TY:", node->node.GROUP3.B2R2_STY);
+	dst += sprintf(dst, "%s\t0x%08x\n",
+			"B2R2_S1XY:", node->node.GROUP3.B2R2_SXY);
+	dst += sprintf(dst, "%s\t0x%08x\n",
+			"B2R2_S1SZ:", node->node.GROUP3.B2R2_SSZ);
+	dst += sprintf(dst, "--\n");
+
+	dst += sprintf(dst, "%s\t0x%08x\n",
+			"B2R2_S2BA:", node->node.GROUP4.B2R2_SBA);
+	dst += sprintf(dst, "%s\t0x%08x\n",
+			"B2R2_S2TY:", node->node.GROUP4.B2R2_STY);
+	dst += sprintf(dst, "%s\t0x%08x\n",
+			"B2R2_S2XY:", node->node.GROUP4.B2R2_SXY);
+	dst += sprintf(dst, "%s\t0x%08x\n",
+			"B2R2_S2SZ:", node->node.GROUP4.B2R2_SSZ);
+	dst += sprintf(dst, "--\n");
+
+	dst += sprintf(dst, "%s\t0x%08x\n",
+			"B2R2_S3BA:", node->node.GROUP5.B2R2_SBA);
+	dst += sprintf(dst, "%s\t0x%08x\n",
+			"B2R2_S3TY:", node->node.GROUP5.B2R2_STY);
+	dst += sprintf(dst, "%s\t0x%08x\n",
+			"B2R2_S3XY:", node->node.GROUP5.B2R2_SXY);
+	dst += sprintf(dst, "%s\t0x%08x\n",
+			"B2R2_S3SZ:", node->node.GROUP5.B2R2_SSZ);
+	dst += sprintf(dst, "--\n");
+
+	dst += sprintf(dst, "%s\t0x%08x\n",
+			"B2R2_CWO:", node->node.GROUP6.B2R2_CWO);
+	dst += sprintf(dst, "%s\t0x%08x\n",
+			"B2R2_CWS:", node->node.GROUP6.B2R2_CWS);
+	dst += sprintf(dst, "--\n");
+
+	dst += sprintf(dst, "%s\t0x%08x\n",
+			"B2R2_CCO:", node->node.GROUP7.B2R2_CCO);
+	dst += sprintf(dst, "%s\t0x%08x\n",
+			"B2R2_CML:", node->node.GROUP7.B2R2_CML);
+	dst += sprintf(dst, "--\n");
+
+	dst += sprintf(dst, "%s\t0x%08x\n",
+			"B2R2_PMK:", node->node.GROUP8.B2R2_PMK);
+	dst += sprintf(dst, "%s\t0x%08x\n",
+			"B2R2_FCTL:", node->node.GROUP8.B2R2_FCTL);
+	dst += sprintf(dst, "--\n");
+
+	dst += sprintf(dst, "%s\t0x%08x\n",
+			"B2R2_RSF:", node->node.GROUP9.B2R2_RSF);
+	dst += sprintf(dst, "%s\t0x%08x\n",
+			"B2R2_RZI:", node->node.GROUP9.B2R2_RZI);
+	dst += sprintf(dst, "%s\t0x%08x\n",
+			"B2R2_HFP:", node->node.GROUP9.B2R2_HFP);
+	dst += sprintf(dst, "%s\t0x%08x\n",
+			"B2R2_VFP:", node->node.GROUP9.B2R2_VFP);
+	dst += sprintf(dst, "--\n");
+
+	dst += sprintf(dst, "%s\t0x%08x\n",
+			"B2R2_Y_RSF:", node->node.GROUP10.B2R2_RSF);
+	dst += sprintf(dst, "%s\t0x%08x\n",
+			"B2R2_Y_RZI:", node->node.GROUP10.B2R2_RZI);
+	dst += sprintf(dst, "%s\t0x%08x\n",
+			"B2R2_Y_HFP:", node->node.GROUP10.B2R2_HFP);
+	dst += sprintf(dst, "%s\t0x%08x\n",
+			"B2R2_Y_VFP:", node->node.GROUP10.B2R2_VFP);
+	dst += sprintf(dst, "--\n");
+
+	dst += sprintf(dst, "%s\t0x%08x\n",
+			"B2R2_FF0:", node->node.GROUP11.B2R2_FF0);
+	dst += sprintf(dst, "%s\t0x%08x\n",
+			"B2R2_FF1:", node->node.GROUP11.B2R2_FF1);
+	dst += sprintf(dst, "%s\t0x%08x\n",
+			"B2R2_FF2:", node->node.GROUP11.B2R2_FF2);
+	dst += sprintf(dst, "%s\t0x%08x\n",
+			"B2R2_FF3:", node->node.GROUP11.B2R2_FF3);
+	dst += sprintf(dst, "--\n");
+
+	dst += sprintf(dst, "%s\t0x%08x\n",
+			"B2R2_KEY1:", node->node.GROUP12.B2R2_KEY1);
+	dst += sprintf(dst, "%s\t0x%08x\n",
+			"B2R2_KEY2:", node->node.GROUP12.B2R2_KEY2);
+	dst += sprintf(dst, "--\n");
+
+	dst += sprintf(dst, "%s\t0x%08x\n",
+			"B2R2_XYL:", node->node.GROUP13.B2R2_XYL);
+	dst += sprintf(dst, "%s\t0x%08x\n",
+			"B2R2_XYP:", node->node.GROUP13.B2R2_XYP);
+	dst += sprintf(dst, "--\n");
+
+	dst += sprintf(dst, "%s\t0x%08x\n",
+			"B2R2_SAR:", node->node.GROUP14.B2R2_SAR);
+	dst += sprintf(dst, "%s\t0x%08x\n",
+			"B2R2_USR:", node->node.GROUP14.B2R2_USR);
+	dst += sprintf(dst, "--\n");
+
+	dst += sprintf(dst, "%s\t0x%08x\n",
+			"B2R2_IVMX0:", node->node.GROUP15.B2R2_VMX0);
+	dst += sprintf(dst, "%s\t0x%08x\n",
+			"B2R2_IVMX1:", node->node.GROUP15.B2R2_VMX1);
+	dst += sprintf(dst, "%s\t0x%08x\n",
+			"B2R2_IVMX2:", node->node.GROUP15.B2R2_VMX2);
+	dst += sprintf(dst, "%s\t0x%08x\n",
+			"B2R2_IVMX3:", node->node.GROUP15.B2R2_VMX3);
+	dst += sprintf(dst, "--\n");
+
+	dst += sprintf(dst, "%s\t0x%08x\n",
+			"B2R2_OVMX0:", node->node.GROUP16.B2R2_VMX0);
+	dst += sprintf(dst, "%s\t0x%08x\n",
+			"B2R2_OVMX1:", node->node.GROUP16.B2R2_VMX1);
+	dst += sprintf(dst, "%s\t0x%08x\n",
+			"B2R2_OVMX2:", node->node.GROUP16.B2R2_VMX2);
+	dst += sprintf(dst, "%s\t0x%08x\n",
+			"B2R2_OVMX3:", node->node.GROUP16.B2R2_VMX3);
+	dst += sprintf(dst, "--\n");
+
+}
+
+struct mutex last_job_lock;
+
+static struct b2r2_node *last_job;
+
+void b2r2_debug_job_done(struct b2r2_node *first_node)
+{
+	struct b2r2_node *node = first_node;
+	struct b2r2_node **dst_node;
+	unsigned int node_count = 0;
+
+	while (node != NULL) {
+		node_count++;
+		node = node->next;
+	}
+
+	mutex_lock(&last_job_lock);
+
+	if (last_job) {
+		node = last_job;
+		while (node != NULL) {
+			struct b2r2_node *tmp = node->next;
+			kfree(node);
+			node = tmp;
+		}
+		last_job = NULL;
+	}
+
+	node = first_node;
+	dst_node = &last_job;
+	while (node != NULL) {
+		*dst_node = kzalloc(sizeof(**dst_node), GFP_KERNEL);
+		if (!(*dst_node))
+			goto last_job_alloc_failed;
+
+		memcpy(*dst_node, node, sizeof(**dst_node));
+
+		dst_node = &((*dst_node)->next);
+		node = node->next;
+	}
+
+	mutex_unlock(&last_job_lock);
+
+	return;
+
+last_job_alloc_failed:
+	mutex_unlock(&last_job_lock);
+
+	while (last_job != NULL) {
+		struct b2r2_node *tmp = last_job->next;
+		kfree(last_job);
+		last_job = tmp;
+	}
+
+	return;
+}
+
+static char *last_job_chars;
+static int prev_node_count;
+
+static ssize_t last_job_read(struct file *filep, char __user *buf,
+		size_t bytes, loff_t *off)
+{
+	struct b2r2_node *node = last_job;
+	int node_count = 0;
+	int i;
+
+	size_t size;
+	size_t count;
+	loff_t offs = *off;
+
+	for (; node != NULL; node = node->next)
+		node_count++;
+
+	size = node_count * dumped_node_size;
+
+	if (node_count != prev_node_count) {
+		kfree(last_job_chars);
+
+		last_job_chars = kzalloc(size, GFP_KERNEL);
+		if (!last_job_chars)
+			return 0;
+		prev_node_count = node_count;
+	}
+
+	mutex_lock(&last_job_lock);
+	node = last_job;
+	for (i = 0; i < node_count; i++) {
+		BUG_ON(node == NULL);
+		dump_node(last_job_chars + i * dumped_node_size/sizeof(char),
+				node);
+		node = node->next;
+	}
+	mutex_unlock(&last_job_lock);
+
+	if (offs > size)
+		return 0;
+
+	if (offs + bytes > size)
+		count = size - offs;
+	else
+		count = bytes;
+
+	if (copy_to_user(buf, last_job_chars + offs, count))
+		return -EFAULT;
+
+	*off = offs + count;
+	return count;
+}
+
+static const struct file_operations last_job_fops = {
+	.read = last_job_read,
+};
+
+int b2r2_debug_init(struct device *log_dev)
+{
+	int i;
+
+	b2r2_log_dev = log_dev;
+
+	for (i = 0; i < B2R2_LOG_LEVEL_COUNT; i++)
+		b2r2_log_levels[i] = 0;
+
+	root_dir = debugfs_create_dir("b2r2_debug", NULL);
+	if (!root_dir) {
+		b2r2_log_warn("%s: could not create root dir\n", __func__);
+		return -ENODEV;
+	}
+
+#if !defined(CONFIG_DYNAMIC_DEBUG) && defined(CONFIG_DEBUG_FS)
+	/*
+	 * If dynamic debug is disabled we need some other way to control the
+	 * log prints
+	 */
+	log_lvl_dir = debugfs_create_dir("logs", root_dir);
+
+	/* No need to save the files, they will be removed recursively */
+	(void)debugfs_create_bool("warnings", 0644, log_lvl_dir,
+				&b2r2_log_levels[B2R2_LOG_LEVEL_WARN]);
+	(void)debugfs_create_bool("info", 0644, log_lvl_dir,
+				&b2r2_log_levels[B2R2_LOG_LEVEL_INFO]);
+	(void)debugfs_create_bool("debug", 0644, log_lvl_dir,
+				&b2r2_log_levels[B2R2_LOG_LEVEL_DEBUG]);
+	(void)debugfs_create_bool("regdumps", 0644, log_lvl_dir,
+				&b2r2_log_levels[B2R2_LOG_LEVEL_REGDUMP]);
+
+#elif defined(CONFIG_DYNAMIC_DEBUG)
+	/* log_lvl_dir is never used */
+	(void)log_lvl_dir;
+#endif
+
+	stats_dir = debugfs_create_dir("stats", root_dir);
+	(void)debugfs_create_file("last_job", 0444, stats_dir, NULL,
+			&last_job_fops);
+
+	mutex_init(&last_job_lock);
+
+	return 0;
+}
+
+void b2r2_debug_exit(void)
+{
+#if !defined(CONFIG_DYNAMIC_DEBUG) && defined(CONFIG_DEBUG_FS)
+	if (root_dir)
+		debugfs_remove_recursive(root_dir);
+#endif
+}
diff --git a/drivers/video/b2r2/b2r2_debug.h b/drivers/video/b2r2/b2r2_debug.h
new file mode 100644
index 00000000000..f87ca728482
--- /dev/null
+++ b/drivers/video/b2r2/b2r2_debug.h
@@ -0,0 +1,104 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2010
+ *
+ * ST-Ericsson B2R2 dynamic debug
+ *
+ * Author: Fredrik Allansson <fredrik.allansson@stericsson.com>
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+
+#ifndef _LINUX_DRIVERS_VIDEO_B2R2_DEBUG_H_
+#define _LINUX_DRIVERS_VIDEO_B2R2_DEBUG_H_
+
+#include <linux/device.h>
+
+#include "b2r2_internal.h"
+
+#ifdef CONFIG_B2R2_DEBUG
+
+/* Log macros */
+enum b2r2_log_levels {
+	B2R2_LOG_LEVEL_WARN,
+	B2R2_LOG_LEVEL_INFO,
+	B2R2_LOG_LEVEL_DEBUG,
+	B2R2_LOG_LEVEL_REGDUMP,
+	B2R2_LOG_LEVEL_COUNT,
+};
+
+/*
+ * Booleans controlling the different log levels. The different log levels are
+ * enabled separately (i.e. you can have info prints without the warn prints).
+ */
+extern int b2r2_log_levels[B2R2_LOG_LEVEL_COUNT];
+
+extern struct device *b2r2_log_dev;
+
+#define b2r2_log_err(...) do { \
+		dev_err(b2r2_log_dev, __VA_ARGS__); \
+	} while (0)
+
+/* If dynamic debug is enabled it should be used instead of loglevels */
+#ifdef CONFIG_DYNAMIC_DEBUG
+#  define b2r2_log_warn(...) do { \
+		dev_dbg(b2r2_log_dev, "WARN " __VA_ARGS__); \
+	} while (0)
+#  define b2r2_log_info(...) do { \
+		dev_dbg(b2r2_log_dev, "INFO " __VA_ARGS__); \
+	} while (0)
+#  define b2r2_log_debug(...) do { \
+		dev_dbg(b2r2_log_dev, "DEBUG " __VA_ARGS__); \
+	} while (0)
+#  define b2r2_log_regdump(...) do { \
+		dev_dbg(b2r2_log_dev, "REGD " __VA_ARGS__); \
+	} while (0)
+#else
+#  define b2r2_log_warn(...) do { \
+		if (b2r2_log_levels[B2R2_LOG_LEVEL_WARN]) \
+			dev_warn(b2r2_log_dev, "WARN " __VA_ARGS__); \
+	} while (0)
+#  define b2r2_log_info(...) do { \
+		if (b2r2_log_levels[B2R2_LOG_LEVEL_INFO]) \
+			dev_info(b2r2_log_dev, "INFO " __VA_ARGS__); \
+	} while (0)
+#  define b2r2_log_debug(...) do { \
+		if (b2r2_log_levels[B2R2_LOG_LEVEL_DEBUG]) \
+			dev_dbg(b2r2_log_dev, "DEBUG " __VA_ARGS__); \
+	} while (0)
+#  define b2r2_log_regdump(...) do { \
+		if (b2r2_log_levels[B2R2_LOG_LEVEL_REGDUMP]) \
+			dev_vdbg(b2r2_log_dev, "REGD " __VA_ARGS__); \
+	} while (0)
+#endif
+
+
+int b2r2_debug_init(struct device *log_dev);
+void b2r2_debug_exit(void);
+
+void b2r2_debug_job_done(struct b2r2_node *node);
+
+#else
+
+#define b2r2_log_err(...)
+#define b2r2_log_warn(...)
+#define b2r2_log_info(...)
+#define b2r2_log_debug(...)
+#define b2r2_log_regdump(...)
+
+static inline int b2r2_debug_init(struct device *log_dev)
+{
+	return 0;
+}
+static inline void b2r2_debug_exit(void)
+{
+	return;
+}
+static inline void b2r2_debug_job_done(struct b2r2_node *node)
+{
+	return;
+}
+
+#endif
+
+#endif
diff --git a/drivers/video/b2r2/b2r2_filters.c b/drivers/video/b2r2/b2r2_filters.c
new file mode 100644
index 00000000000..208cdcd286e
--- /dev/null
+++ b/drivers/video/b2r2/b2r2_filters.c
@@ -0,0 +1,372 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2010
+ *
+ * ST-Ericsson B2R2 filters.
+ *
+ * Author: Fredrik Allansson <fredrik.allansson@stericsson.com> for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+
+#include <linux/dma-mapping.h>
+
+#include "b2r2_filters.h"
+#include "b2r2_internal.h"
+
+/**
+ * struct b2r2_filter_spec filters[] - Filter lookup table
+ *
+ * Lookup table for filters for different scale factors. A filter
+ * will be selected according to "min < scale_factor <= max".
+ */
+static struct b2r2_filter_spec filters[] = {
+	{
+		.min = 1024,
+		.max = 1433,
+		.h_coeffs =  {
+			0xfc, 0x06, 0xf9, 0x09, 0x34, 0x09, 0xf9, 0x06,
+			0xfd, 0x07, 0xf7, 0x10, 0x32, 0x02, 0xfc, 0x05,
+			0xfe, 0x07, 0xf6, 0x17, 0x2f, 0xfc, 0xff, 0x04,
+			0xff, 0x06, 0xf5, 0x20, 0x2a, 0xf9, 0x01, 0x02,
+			0x00, 0x04, 0xf6, 0x27, 0x25, 0xf6, 0x04, 0x00,
+			0x02, 0x01, 0xf9, 0x2d, 0x1d, 0xf5, 0x06, 0xff,
+			0x04, 0xff, 0xfd, 0x31, 0x15, 0xf5, 0x07, 0xfe,
+			0x05, 0xfc, 0x02, 0x35, 0x0d, 0xf7, 0x07, 0xfd
+		},
+		.v_coeffs = {
+			0xf8, 0x0a, 0x3c, 0x0a, 0xf8,
+			0xf6, 0x12, 0x3b, 0x02, 0xfb,
+			0xf4, 0x1b, 0x35, 0xfd, 0xff,
+			0xf4, 0x23, 0x30, 0xf8, 0x01,
+			0xf6, 0x29, 0x27, 0xf6, 0x04,
+			0xf9, 0x2e, 0x1e, 0xf5, 0x06,
+			0xfd, 0x31, 0x16, 0xf6, 0x06,
+			0x02, 0x32, 0x0d, 0xf8, 0x07
+		},
+	},
+	{
+		.min = 1433,
+		.max = 1536,
+		.h_coeffs =  {
+			0xfe, 0x06, 0xf8, 0x0b, 0x30, 0x0b, 0xf8, 0x06,
+			0xff, 0x06, 0xf7, 0x12, 0x2d, 0x05, 0xfa, 0x06,
+			0x00, 0x04, 0xf6, 0x18, 0x2c, 0x00, 0xfc, 0x06,
+			0x01, 0x02, 0xf7, 0x1f, 0x27, 0xfd, 0xff, 0x04,
+			0x03, 0x00, 0xf9, 0x24, 0x24, 0xf9, 0x00, 0x03,
+			0x04, 0xff, 0xfd, 0x29, 0x1d, 0xf7, 0x02, 0x01,
+			0x06, 0xfc, 0x00, 0x2d, 0x17, 0xf6, 0x04, 0x00,
+			0x06, 0xfa, 0x05, 0x30, 0x0f, 0xf7, 0x06, 0xff
+		},
+		.v_coeffs = {
+			0xf6, 0x0e, 0x38, 0x0e, 0xf6,
+			0xf5, 0x15, 0x38, 0x06, 0xf8,
+			0xf5, 0x1d, 0x33, 0x00, 0xfb,
+			0xf6, 0x23, 0x2d, 0xfc, 0xfe,
+			0xf9, 0x28, 0x26, 0xf9, 0x00,
+			0xfc, 0x2c, 0x1e, 0xf7, 0x03,
+			0x00, 0x2e, 0x18, 0xf6, 0x04,
+			0x05, 0x2e, 0x11, 0xf7, 0x05
+		},
+	},
+	{
+		.min = 1536,
+		.max = 3072,
+		.h_coeffs =  {
+			0xfc, 0xfd, 0x06, 0x13, 0x18, 0x13, 0x06, 0xfd,
+			0xfc, 0xfe, 0x08, 0x15, 0x17, 0x12, 0x04, 0xfc,
+			0xfb, 0xfe, 0x0a, 0x16, 0x18, 0x10, 0x03, 0xfc,
+			0xfb, 0x00, 0x0b, 0x18, 0x17, 0x0f, 0x01, 0xfb,
+			0xfb, 0x00, 0x0d, 0x19, 0x17, 0x0d, 0x00, 0xfb,
+			0xfb, 0x01, 0x0f, 0x19, 0x16, 0x0b, 0x00, 0xfb,
+			0xfc, 0x03, 0x11, 0x19, 0x15, 0x09, 0xfe, 0xfb,
+			0xfc, 0x04, 0x12, 0x1a, 0x12, 0x08, 0xfe, 0xfc
+		},
+		.v_coeffs = {
+			0x05, 0x10, 0x16, 0x10, 0x05,
+			0x06, 0x11, 0x16, 0x0f, 0x04,
+			0x08, 0x13, 0x15, 0x0e, 0x02,
+			0x09, 0x14, 0x16, 0x0c, 0x01,
+			0x0b, 0x15, 0x15, 0x0b, 0x00,
+			0x0d, 0x16, 0x13, 0x0a, 0x00,
+			0x0f, 0x17, 0x13, 0x08, 0xff,
+			0x11, 0x18, 0x12, 0x07, 0xfe
+		},
+	},
+	{
+		.min = 3072,
+		.max = 4096,
+		.h_coeffs =  {
+			0xfe, 0x02, 0x09, 0x0f, 0x0e, 0x0f, 0x09, 0x02,
+			0xff, 0x02, 0x09, 0x0f, 0x10, 0x0e, 0x08, 0x01,
+			0xff, 0x03, 0x0a, 0x10, 0x10, 0x0d, 0x07, 0x00,
+			0x00, 0x04, 0x0b, 0x10, 0x0f, 0x0c, 0x06, 0x00,
+			0x00, 0x05, 0x0c, 0x10, 0x0e, 0x0c, 0x05, 0x00,
+			0x00, 0x06, 0x0c, 0x11, 0x0e, 0x0b, 0x04, 0x00,
+			0x00, 0x07, 0x0d, 0x11, 0x0f, 0x0a, 0x03, 0xff,
+			0x01, 0x08, 0x0e, 0x11, 0x0e, 0x09, 0x02, 0xff
+		},
+		.v_coeffs = {
+			0x09, 0x0f, 0x10, 0x0f, 0x09,
+			0x09, 0x0f, 0x12, 0x0e, 0x08,
+			0x0a, 0x10, 0x11, 0x0e, 0x07,
+			0x0b, 0x11, 0x11, 0x0d, 0x06,
+			0x0c, 0x11, 0x12, 0x0c, 0x05,
+			0x0d, 0x12, 0x11, 0x0c, 0x04,
+			0x0e, 0x12, 0x11, 0x0b, 0x04,
+			0x0f, 0x13, 0x11, 0x0a, 0x03
+		},
+	},
+	{
+		.min = 4096,
+		.max = 5120,
+		.h_coeffs =  {
+			0x00, 0x04, 0x09, 0x0c, 0x0e, 0x0c, 0x09, 0x04,
+			0x01, 0x05, 0x09, 0x0c, 0x0d, 0x0c, 0x08, 0x04,
+			0x01, 0x05, 0x0a, 0x0c, 0x0e, 0x0b, 0x08, 0x03,
+			0x02, 0x06, 0x0a, 0x0d, 0x0c, 0x0b, 0x07, 0x03,
+			0x02, 0x07, 0x0a, 0x0d, 0x0d, 0x0a, 0x07, 0x02,
+			0x03, 0x07, 0x0b, 0x0d, 0x0c, 0x0a, 0x06, 0x02,
+			0x03, 0x08, 0x0b, 0x0d, 0x0d, 0x0a, 0x05, 0x01,
+			0x04, 0x08, 0x0c, 0x0d, 0x0c, 0x09, 0x05, 0x01
+		},
+		.v_coeffs = {
+			0x0a, 0x0e, 0x10, 0x0e, 0x0a,
+			0x0b, 0x0e, 0x0f, 0x0e, 0x0a,
+			0x0b, 0x0f, 0x10, 0x0d, 0x09,
+			0x0c, 0x0f, 0x10, 0x0d, 0x08,
+			0x0d, 0x0f, 0x0f, 0x0d, 0x08,
+			0x0d, 0x10, 0x10, 0x0c, 0x07,
+			0x0e, 0x10, 0x0f, 0x0c, 0x07,
+			0x0f, 0x10, 0x10, 0x0b, 0x06
+		},
+	},
+};
+static const size_t filters_size = sizeof(filters)/sizeof(filters[0]);
+
+/**
+ * struct b2r2_filter_spec bilinear_filter - A bilinear filter
+ *
+ * The bilinear filter will be used if no custom filters are specified, or
+ * for upscales not matching any filter in the lookup table.
+ */
+static struct b2r2_filter_spec bilinear_filter = {
+	.min = 0,
+	.max = 0xffff,
+	.h_coeffs = {
+		0x00, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00,
+		0xff, 0x03, 0xfd, 0x08, 0x3e, 0xf9, 0x04, 0xfe,
+		0xfd, 0x06, 0xf8, 0x13, 0x3b, 0xf4, 0x07, 0xfc,
+		0xfb, 0x08, 0xf5, 0x1f, 0x34, 0xf1, 0x09, 0xfb,
+		0xfb, 0x09, 0xf2, 0x2b, 0x2a, 0xf1, 0x09, 0xfb,
+		0xfb, 0x09, 0xf2, 0x35, 0x1e, 0xf4, 0x08, 0xfb,
+		0xfc, 0x07, 0xf5, 0x3c, 0x12, 0xf7, 0x06, 0xfd,
+		0xfe, 0x04, 0xfa, 0x3f, 0x07, 0xfc, 0x03, 0xff
+	},
+	.v_coeffs = {
+		0x00, 0x00, 0x40, 0x00, 0x00,
+		0xfd, 0x09, 0x3c, 0xfa, 0x04,
+		0xf9, 0x13, 0x39, 0xf5, 0x06,
+		0xf5, 0x1f, 0x31, 0xf3, 0x08,
+		0xf3, 0x2a, 0x28, 0xf3, 0x08,
+		0xf3, 0x34, 0x1d, 0xf5, 0x07,
+		0xf5, 0x3b, 0x12, 0xf9, 0x05,
+		0xfa, 0x3f, 0x07, 0xfd, 0x03
+	},
+};
+
+/**
+ * struct b2r2_filter_spec default_downscale_filter - Default filter for downscale
+ *
+ * The default downscale filter will be used for downscales not matching any
+ * filter in the lookup table.
+ */
+static struct b2r2_filter_spec default_downscale_filter = {
+	.min = 1 << 10,
+	.max = 0xffff,
+	.h_coeffs = {
+		0x03, 0x06, 0x09, 0x0b, 0x09, 0x0b, 0x09, 0x06,
+		0x03, 0x06, 0x09, 0x0b, 0x0c, 0x0a, 0x08, 0x05,
+		0x03, 0x06, 0x09, 0x0b, 0x0c, 0x0a, 0x08, 0x05,
+		0x04, 0x07, 0x09, 0x0b, 0x0b, 0x0a, 0x08, 0x04,
+		0x04, 0x07, 0x0a, 0x0b, 0x0b, 0x0a, 0x07, 0x04,
+		0x04, 0x08, 0x0a, 0x0b, 0x0b, 0x09, 0x07, 0x04,
+		0x05, 0x08, 0x0a, 0x0b, 0x0c, 0x09, 0x06, 0x03,
+		0x05, 0x08, 0x0a, 0x0b, 0x0c, 0x09, 0x06, 0x03
+	},
+	.v_coeffs = {
+		0x0b, 0x0e, 0x0e, 0x0e, 0x0b,
+		0x0b, 0x0e, 0x0f, 0x0d, 0x0b,
+		0x0c, 0x0e, 0x0f, 0x0d, 0x0a,
+		0x0c, 0x0e, 0x0f, 0x0d, 0x0a,
+		0x0d, 0x0f, 0x0e, 0x0d, 0x09,
+		0x0d, 0x0f, 0x0f, 0x0c, 0x09,
+		0x0e, 0x0f, 0x0e, 0x0c, 0x09,
+		0x0e, 0x0f, 0x0f, 0x0c, 0x08
+	},
+};
+
+/**
+ * struct b2r2_filter_spec blur_filter - Blur filter
+ *
+ * Filter for blurring an image.
+ */
+static struct b2r2_filter_spec blur_filter = {
+	.min = 0,
+	.max = 0xffff,
+	.h_coeffs = {
+		0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08,
+		0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08,
+		0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08,
+		0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08,
+		0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08,
+		0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08,
+		0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08,
+		0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08
+	},
+	.v_coeffs = {
+		0x0c, 0x0c, 0x10, 0x0c, 0x0c,
+		0x0c, 0x0c, 0x10, 0x0c, 0x0c,
+		0x0c, 0x0c, 0x10, 0x0c, 0x0c,
+		0x0c, 0x0c, 0x10, 0x0c, 0x0c,
+		0x0c, 0x0c, 0x10, 0x0c, 0x0c,
+		0x0c, 0x0c, 0x10, 0x0c, 0x0c,
+		0x0c, 0x0c, 0x10, 0x0c, 0x0c,
+		0x0c, 0x0c, 0x10, 0x0c, 0x0c
+	},
+};
+
+/* Private function declarations */
+static int alloc_filter_coeffs(struct b2r2_filter_spec *filter);
+static void free_filter_coeffs(struct b2r2_filter_spec *filter);
+
+/* Public functions */
+
+static int filters_initialized;
+
+int b2r2_filters_init()
+{
+	int i;
+
+	if (filters_initialized)
+		return 0;
+
+	for (i = 0; i < filters_size; i++) {
+		alloc_filter_coeffs(&filters[i]);
+	}
+
+	alloc_filter_coeffs(&bilinear_filter);
+	alloc_filter_coeffs(&default_downscale_filter);
+	alloc_filter_coeffs(&blur_filter);
+
+	filters_initialized = 1;
+
+	return 0;
+}
+
+void b2r2_filters_exit()
+{
+	int i;
+
+	if (!filters_initialized)
+		return;
+
+	for (i = 0; i < filters_size; i++) {
+		free_filter_coeffs(&filters[i]);
+	}
+
+	free_filter_coeffs(&bilinear_filter);
+	free_filter_coeffs(&default_downscale_filter);
+	free_filter_coeffs(&blur_filter);
+
+	filters_initialized = 0;
+}
+
+struct b2r2_filter_spec *b2r2_filter_find(u16 scale_factor)
+{
+	int i;
+	struct b2r2_filter_spec *filter = NULL;
+
+	for (i = 0; i < filters_size; i++) {
+		if ((filters[i].min < scale_factor) &&
+				(scale_factor <= filters[i].max) &&
+				filters[i].h_coeffs_dma_addr &&
+				filters[i].v_coeffs_dma_addr) {
+			filter = &filters[i];
+			break;
+		}
+	}
+
+	if (filter == NULL) {
+		/*
+		 * No suitable filter has been found. Use default filters,
+		 * bilinear for any upscale.
+		 */
+		if (scale_factor < (1 << 10))
+			filter = &bilinear_filter;
+		else
+			filter = &default_downscale_filter;
+	}
+
+	/*
+	 * Check so that the coefficients were successfully allocated for this
+	 * filter.
+	 */
+	if (!filter->h_coeffs_dma_addr || !filter->v_coeffs_dma_addr)
+		return NULL;
+	else
+		return filter;
+}
+
+struct b2r2_filter_spec *b2r2_filter_blur()
+{
+	return &blur_filter;
+}
+
+/* Private functions */
+static int alloc_filter_coeffs(struct b2r2_filter_spec *filter)
+{
+	int ret;
+
+	filter->h_coeffs_dma_addr = dma_alloc_coherent(b2r2_blt_device(),
+			B2R2_HF_TABLE_SIZE, &(filter->h_coeffs_phys_addr),
+			GFP_DMA | GFP_KERNEL);
+	if (filter->h_coeffs_dma_addr == NULL) {
+		ret = -ENOMEM;
+		goto error;
+	}
+
+	filter->v_coeffs_dma_addr = dma_alloc_coherent(b2r2_blt_device(),
+			B2R2_VF_TABLE_SIZE, &(filter->v_coeffs_phys_addr),
+			GFP_DMA | GFP_KERNEL);
+	if (filter->v_coeffs_dma_addr == NULL) {
+		ret = -ENOMEM;
+		goto error;
+	}
+
+	memcpy(filter->h_coeffs_dma_addr, filter->h_coeffs, B2R2_HF_TABLE_SIZE);
+	memcpy(filter->v_coeffs_dma_addr, filter->v_coeffs, B2R2_VF_TABLE_SIZE);
+
+	return 0;
+
+error:
+	free_filter_coeffs(filter);
+	return ret;
+
+}
+
+static void free_filter_coeffs(struct b2r2_filter_spec *filter)
+{
+	if (filter->h_coeffs_dma_addr != NULL)
+		dma_free_coherent(b2r2_blt_device(), B2R2_HF_TABLE_SIZE,
+				filter->h_coeffs_dma_addr,
+				filter->h_coeffs_phys_addr);
+	if (filter->v_coeffs_dma_addr != NULL)
+		dma_free_coherent(b2r2_blt_device(), B2R2_VF_TABLE_SIZE,
+				filter->v_coeffs_dma_addr,
+				filter->v_coeffs_phys_addr);
+
+	filter->h_coeffs_dma_addr = NULL;
+	filter->h_coeffs_phys_addr = 0;
+	filter->v_coeffs_dma_addr = NULL;
+	filter->v_coeffs_phys_addr = 0;
+}
diff --git a/drivers/video/b2r2/b2r2_filters.h b/drivers/video/b2r2/b2r2_filters.h
new file mode 100644
index 00000000000..0eeefc6b0e0
--- /dev/null
+++ b/drivers/video/b2r2/b2r2_filters.h
@@ -0,0 +1,71 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2010
+ *
+ * ST-Ericsson B2R2 filters.
+ *
+ * Author: Fredrik Allansson <fredrik.allansson@stericsson.com> for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+
+#ifndef _LINUX_VIDEO_B2R2_FILTERS_H
+#define _LINUX_VIDEO_B2R2_FILTERS_H
+
+#include <linux/kernel.h>
+
+#define B2R2_HF_TABLE_SIZE 64
+#define B2R2_VF_TABLE_SIZE 40
+
+/**
+ * @struct b2r2_filter_spec - Filter specification structure
+ *
+ *   @param min - Minimum scale factor for this filter (in 6.10 fixed point)
+ *   @param max - Maximum scale factor for this filter (in 6.10 fixed point)
+ *   @param h_coeffs - Horizontal filter coefficients
+ *   @param v_coeffs - Vertical filter coefficients
+ *   @param h_coeffs_dma_addr - Virtual DMA address for horizontal coefficients
+ *   @param v_coeffs_dma_addr - Virtual DMA address for vertical coefficients
+ *   @param h_coeffs_phys_addr - Physical address for horizontal coefficients
+ *   @param v_coeffs_phys_addr - Physical address for vertical coefficients
+ */
+struct b2r2_filter_spec {
+	const u16 min;
+	const u16 max;
+
+	const u8 h_coeffs[B2R2_HF_TABLE_SIZE];
+	const u8 v_coeffs[B2R2_VF_TABLE_SIZE];
+
+	void *h_coeffs_dma_addr;
+	u32 h_coeffs_phys_addr;
+
+	void *v_coeffs_dma_addr;
+	u32 v_coeffs_phys_addr;
+};
+
+/**
+ * b2r2_filters_init() - Initilizes the B2R2 filters
+ */
+int b2r2_filters_init(void);
+
+/**
+ * b2r2_filters_init() - De-initilizes the B2R2 filters
+ */
+void b2r2_filters_exit(void);
+
+/**
+ * b2r2_filter_find() - Find a filter matching the given scale factor
+ *
+ *   @param scale_factor - Scale factor to find a filter for
+ *
+ * Returns NULL if no filter could be found.
+ */
+struct b2r2_filter_spec *b2r2_filter_find(u16 scale_factor);
+
+/**
+ * b2r2_filter_blur() - Returns the blur filter
+ *
+ * Returns NULL if no blur filter is available.
+ */
+struct b2r2_filter_spec *b2r2_filter_blur(void);
+
+#endif /* _LINUX_VIDEO_B2R2_FILTERS_H */
diff --git a/drivers/video/b2r2/b2r2_generic.c b/drivers/video/b2r2/b2r2_generic.c
new file mode 100644
index 00000000000..533de169409
--- /dev/null
+++ b/drivers/video/b2r2/b2r2_generic.c
@@ -0,0 +1,2839 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2010
+ *
+ * ST-Ericsson B2R2 generic. Full coverage of user interface but
+ * non optimized implementation. For Fallback purposes.
+ *
+ * Author: Maciej Socha <maciej.socha@stericsson.com>
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+
+#include <linux/kernel.h>
+#include <linux/debugfs.h>
+
+#include "b2r2_generic.h"
+#include "b2r2_internal.h"
+#include "b2r2_global.h"
+#include "b2r2_debug.h"
+#include "b2r2_filters.h"
+
+/*
+ * Debug printing
+ */
+#define B2R2_GENERIC_DEBUG_AREAS 0
+#define B2R2_GENERIC_DEBUG
+
+#define B2R2_GENERIC_WORK_BUF_WIDTH 16
+#define B2R2_GENERIC_WORK_BUF_HEIGHT 16
+#define B2R2_GENERIC_WORK_BUF_PITCH (16 * 4)
+#define B2R2_GENERIC_WORK_BUF_FMT B2R2_NATIVE_ARGB8888
+
+/*
+ * Private functions
+ */
+
+/**
+ * reset_nodes() - clears the node list
+ */
+static void reset_nodes(struct b2r2_node *node)
+{
+	b2r2_log_info("%s ENTRY\n", __func__);
+
+	while (node != NULL) {
+		memset(&(node->node), 0, sizeof(node->node));
+
+		/* TODO: Implement support for short linked lists */
+		node->node.GROUP0.B2R2_CIC = 0x7fffc;
+
+		if (node->next != NULL)
+			node->node.GROUP0.B2R2_NIP = node->next->physical_address;
+
+		node = node->next;
+	}
+	b2r2_log_info("%s DONE\n", __func__);
+}
+
+/**
+ * dump_nodes() - prints the node list
+ */
+static void dump_nodes(struct b2r2_node *first, bool dump_all)
+{
+	struct b2r2_node *node = first;
+	b2r2_log_info("%s ENTRY\n", __func__);
+	do {
+		b2r2_log_debug("\nNODE START:\n=============\n");
+		b2r2_log_debug("B2R2_ACK: \t0x%.8x\n",
+				node->node.GROUP0.B2R2_ACK);
+		b2r2_log_debug("B2R2_INS: \t0x%.8x\n",
+				node->node.GROUP0.B2R2_INS);
+		b2r2_log_debug("B2R2_CIC: \t0x%.8x\n",
+				node->node.GROUP0.B2R2_CIC);
+		b2r2_log_debug("B2R2_NIP: \t0x%.8x\n",
+				node->node.GROUP0.B2R2_NIP);
+
+		b2r2_log_debug("B2R2_TSZ: \t0x%.8x\n",
+				node->node.GROUP1.B2R2_TSZ);
+		b2r2_log_debug("B2R2_TXY: \t0x%.8x\n",
+				node->node.GROUP1.B2R2_TXY);
+		b2r2_log_debug("B2R2_TTY: \t0x%.8x\n",
+				node->node.GROUP1.B2R2_TTY);
+		b2r2_log_debug("B2R2_TBA: \t0x%.8x\n",
+				node->node.GROUP1.B2R2_TBA);
+
+		b2r2_log_debug("B2R2_S2CF: \t0x%.8x\n",
+				node->node.GROUP2.B2R2_S2CF);
+		b2r2_log_debug("B2R2_S1CF: \t0x%.8x\n",
+				node->node.GROUP2.B2R2_S1CF);
+
+		b2r2_log_debug("B2R2_S1SZ: \t0x%.8x\n",
+				node->node.GROUP3.B2R2_SSZ);
+		b2r2_log_debug("B2R2_S1XY: \t0x%.8x\n",
+				node->node.GROUP3.B2R2_SXY);
+		b2r2_log_debug("B2R2_S1TY: \t0x%.8x\n",
+				node->node.GROUP3.B2R2_STY);
+		b2r2_log_debug("B2R2_S1BA: \t0x%.8x\n",
+				node->node.GROUP3.B2R2_SBA);
+
+		b2r2_log_debug("B2R2_S2SZ: \t0x%.8x\n",
+				node->node.GROUP4.B2R2_SSZ);
+		b2r2_log_debug("B2R2_S2XY: \t0x%.8x\n",
+				node->node.GROUP4.B2R2_SXY);
+		b2r2_log_debug("B2R2_S2TY: \t0x%.8x\n",
+				node->node.GROUP4.B2R2_STY);
+		b2r2_log_debug("B2R2_S2BA: \t0x%.8x\n",
+				node->node.GROUP4.B2R2_SBA);
+
+		b2r2_log_debug("B2R2_S3SZ: \t0x%.8x\n",
+				node->node.GROUP5.B2R2_SSZ);
+		b2r2_log_debug("B2R2_S3XY: \t0x%.8x\n",
+				node->node.GROUP5.B2R2_SXY);
+		b2r2_log_debug("B2R2_S3TY: \t0x%.8x\n",
+				node->node.GROUP5.B2R2_STY);
+		b2r2_log_debug("B2R2_S3BA: \t0x%.8x\n",
+				node->node.GROUP5.B2R2_SBA);
+
+		b2r2_log_debug("B2R2_CWS: \t0x%.8x\n",
+				node->node.GROUP6.B2R2_CWS);
+		b2r2_log_debug("B2R2_CWO: \t0x%.8x\n",
+				node->node.GROUP6.B2R2_CWO);
+
+		b2r2_log_debug("B2R2_FCTL: \t0x%.8x\n",
+				node->node.GROUP8.B2R2_FCTL);
+		b2r2_log_debug("B2R2_RSF: \t0x%.8x\n",
+				node->node.GROUP9.B2R2_RSF);
+		b2r2_log_debug("B2R2_RZI: \t0x%.8x\n",
+				node->node.GROUP9.B2R2_RZI);
+		b2r2_log_debug("B2R2_HFP: \t0x%.8x\n",
+				node->node.GROUP9.B2R2_HFP);
+		b2r2_log_debug("B2R2_VFP: \t0x%.8x\n",
+				node->node.GROUP9.B2R2_VFP);
+		b2r2_log_debug("B2R2_LUMA_RSF: \t0x%.8x\n",
+				node->node.GROUP10.B2R2_RSF);
+		b2r2_log_debug("B2R2_LUMA_RZI: \t0x%.8x\n",
+				node->node.GROUP10.B2R2_RZI);
+		b2r2_log_debug("B2R2_LUMA_HFP: \t0x%.8x\n",
+				node->node.GROUP10.B2R2_HFP);
+		b2r2_log_debug("B2R2_LUMA_VFP: \t0x%.8x\n",
+				node->node.GROUP10.B2R2_VFP);
+
+
+		b2r2_log_debug("B2R2_IVMX0: \t0x%.8x\n",
+				node->node.GROUP15.B2R2_VMX0);
+		b2r2_log_debug("B2R2_IVMX1: \t0x%.8x\n",
+				node->node.GROUP15.B2R2_VMX1);
+		b2r2_log_debug("B2R2_IVMX2: \t0x%.8x\n",
+				node->node.GROUP15.B2R2_VMX2);
+		b2r2_log_debug("B2R2_IVMX3: \t0x%.8x\n",
+				node->node.GROUP15.B2R2_VMX3);
+		b2r2_log_debug("\n=============\nNODE END\n");
+
+		node = node->next;
+	} while (node != NULL && dump_all);
+
+	b2r2_log_info("%s DONE\n", __func__);
+}
+
+/**
+ * to_native_fmt() - returns the native B2R2 format
+ */
+static inline enum b2r2_native_fmt to_native_fmt(enum b2r2_blt_fmt fmt)
+{
+
+	switch (fmt) {
+	case B2R2_BLT_FMT_UNUSED:
+		return B2R2_NATIVE_RGB565;
+	case B2R2_BLT_FMT_1_BIT_A1:
+		return B2R2_NATIVE_A1;
+	case B2R2_BLT_FMT_8_BIT_A8:
+		return B2R2_NATIVE_A8;
+	case B2R2_BLT_FMT_16_BIT_RGB565:
+		return B2R2_NATIVE_RGB565;
+	case B2R2_BLT_FMT_16_BIT_ARGB4444:
+		return B2R2_NATIVE_ARGB4444;
+	case B2R2_BLT_FMT_16_BIT_ARGB1555:
+		return B2R2_NATIVE_ARGB1555;
+	case B2R2_BLT_FMT_24_BIT_ARGB8565:
+		return B2R2_NATIVE_ARGB8565;
+	case B2R2_BLT_FMT_24_BIT_RGB888:
+		return B2R2_NATIVE_RGB888;
+	case B2R2_BLT_FMT_24_BIT_YUV888:
+		return B2R2_NATIVE_YCBCR888;
+	case B2R2_BLT_FMT_32_BIT_ABGR8888: /* Not actually supported by HW */
+	case B2R2_BLT_FMT_32_BIT_ARGB8888:
+		return B2R2_NATIVE_ARGB8888;
+	case B2R2_BLT_FMT_32_BIT_AYUV8888:
+		return B2R2_NATIVE_AYCBCR8888;
+	case B2R2_BLT_FMT_CB_Y_CR_Y:
+		return B2R2_NATIVE_YCBCR422R;
+	case B2R2_BLT_FMT_Y_CB_Y_CR:
+		return B2R2_NATIVE_YCBCR422R;
+	case B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR:
+		return B2R2_NATIVE_YCBCR42X_R2B;
+	case B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE:
+	case B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE:
+		return B2R2_NATIVE_YCBCR42X_MBN;
+	case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YUV444_PACKED_PLANAR:
+		return B2R2_NATIVE_YUV;
+	default:
+		/* Should never ever happen */
+		return B2R2_NATIVE_BYTE;
+	}
+}
+
+/**
+ * get_alpha_range() - returns the alpha range of the given format
+ */
+static inline enum b2r2_ty get_alpha_range(enum b2r2_blt_fmt fmt)
+{
+	switch (fmt) {
+	case B2R2_BLT_FMT_24_BIT_ARGB8565:
+	case B2R2_BLT_FMT_32_BIT_ARGB8888:
+	case B2R2_BLT_FMT_32_BIT_AYUV8888:
+	case B2R2_BLT_FMT_8_BIT_A8:
+	case B2R2_BLT_FMT_32_BIT_ABGR8888:
+		return B2R2_TY_ALPHA_RANGE_255; /* 0 - 255 */
+		break;
+	default:
+		break;
+	}
+
+	return B2R2_TY_ALPHA_RANGE_128; /* 0 - 128 */
+}
+
+static unsigned int get_pitch(enum b2r2_blt_fmt format, u32 width)
+{
+	switch (format) {
+	case B2R2_BLT_FMT_1_BIT_A1: {
+		int pitch = width >> 3;
+		/* Check for remainder */
+		if (width & 7)
+			pitch++;
+		return pitch;
+		break;
+	}
+	case B2R2_BLT_FMT_8_BIT_A8:
+		return width;
+		break;
+	case B2R2_BLT_FMT_16_BIT_RGB565: /* all 16 bits/pixel RGB formats */
+	case B2R2_BLT_FMT_16_BIT_ARGB1555:
+	case B2R2_BLT_FMT_16_BIT_ARGB4444:
+		return width * 2;
+		break;
+	case B2R2_BLT_FMT_24_BIT_RGB888: /* all 24 bits/pixel RGB formats */
+	case B2R2_BLT_FMT_24_BIT_ARGB8565:
+	case B2R2_BLT_FMT_24_BIT_YUV888:
+		return width * 3;
+		break;
+	case B2R2_BLT_FMT_32_BIT_ARGB8888: /* all 32 bits/pixel RGB formats */
+	case B2R2_BLT_FMT_32_BIT_ABGR8888:
+		return width * 4;
+		break;
+	case B2R2_BLT_FMT_32_BIT_AYUV8888:
+		return width * 4;
+		break;
+	case B2R2_BLT_FMT_Y_CB_Y_CR:
+	case B2R2_BLT_FMT_CB_Y_CR_Y:
+		/* width of the buffer must be a multiple of 4 */
+		if (width & 3) {
+			b2r2_log_warn("%s: Illegal width "
+				"for fmt=%#010x width=%d\n", __func__,
+				format, width);
+			return 0;
+		}
+		return width * 2;
+		break;
+	case B2R2_BLT_FMT_YUV444_PACKED_PLANAR:
+		return width;
+		break;
+	/* fall through, same pitch and pointers */
+	case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR:
+		/* width of the buffer must be a multiple of 2 */
+		if (width & 1) {
+			b2r2_log_warn("%s: Illegal width "
+				"for fmt=%#010x width=%d\n", __func__,
+				format, width);
+			return 0;
+		}
+		/*
+		 * return pitch of the Y-buffer.
+		 * U and V pitch can be derived from it.
+		 */
+		return width;
+		break;
+	case B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE:
+	case B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE:
+		/* width of the buffer must be a multiple of 16. */
+		if (width & 15) {
+			b2r2_log_warn("%s: Illegal width "
+				"for fmt=%#010x width=%d\n", __func__,
+				format, width);
+			return 0;
+		}
+		/*
+		 * return pitch of the Y-buffer.
+		 * U and V pitch can be derived from it.
+		 */
+		return width;
+		break;
+	default:
+		b2r2_log_warn("%s: Unable to determine pitch "
+			"for fmt=%#010x width=%d\n", __func__,
+			format, width);
+		return 0;
+	}
+}
+
+static s32 validate_buf(const struct b2r2_blt_img *image,
+			const struct b2r2_resolved_buf *buf)
+{
+	u32 expect_buf_size;
+	u32 pitch;
+
+	if (image->width <= 0 || image->height <= 0) {
+		b2r2_log_warn("%s: width=%d or height=%d negative.\n", __func__,
+			image->width, image->height);
+		return -EINVAL;
+	}
+
+	if (image->pitch == 0) {
+		/* autodetect pitch based on format and width */
+		pitch = get_pitch(image->fmt, image->width);
+	} else
+		pitch = image->pitch;
+
+	expect_buf_size = pitch * image->height;
+
+	if (pitch == 0) {
+		b2r2_log_warn("%s: Unable to detect pitch. "
+			"fmt=%#010x, width=%d\n",
+			__func__,
+			image->fmt, image->width);
+		return -EINVAL;
+	}
+
+	/* format specific adjustments */
+	switch (image->fmt) {
+	case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
+		/*
+		 * Use ceil(height/2) in case buffer height
+		 * is not divisible by 2.
+		 */
+		expect_buf_size +=
+			(pitch >> 1) * ((image->height + 1) >> 1) * 2;
+		break;
+	case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:
+		expect_buf_size += (pitch >> 1) * image->height * 2;
+		break;
+	case B2R2_BLT_FMT_YUV444_PACKED_PLANAR:
+		expect_buf_size += pitch * image->height * 2;
+		break;
+	case B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR:
+		/*
+		 * include space occupied by U and V data.
+		 * U and V interleaved, half resolution, which makes
+		 * the UV pitch equal to luma pitch.
+		 * Use ceil(height/2) in case buffer height
+		 * is not divisible by 2.
+		 */
+		expect_buf_size += pitch * ((image->height + 1) >> 1);
+		break;
+	case B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR:
+		/*
+		 * include space occupied by U and V data.
+		 * U and V interleaved, half resolution, which makes
+		 * the UV pitch equal to luma pitch.
+		 */
+		expect_buf_size += pitch * image->height;
+		break;
+	case B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE:
+		/* Height must be a multiple of 16 for macro-block format.*/
+		if (image->height & 15) {
+			b2r2_log_warn("%s: Illegal height "
+				"for fmt=%#010x height=%d\n", __func__,
+				image->fmt, image->height);
+			return -EINVAL;
+		}
+		expect_buf_size += pitch * (image->height >> 1);
+		break;
+	case B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE:
+		/* Height must be a multiple of 16 for macro-block format.*/
+		if (image->height & 15) {
+			b2r2_log_warn("%s: Illegal height "
+				"for fmt=%#010x height=%d\n", __func__,
+				image->fmt, image->height);
+			return -EINVAL;
+		}
+		expect_buf_size += pitch * image->height;
+		break;
+	default:
+		break;
+	}
+
+	if (buf->file_len < expect_buf_size) {
+		b2r2_log_warn("%s: Invalid buffer size:\n"
+			"fmt=%#010x w=%d h=%d buf.len=%d expect_buf_size=%d\n",
+			__func__,
+			image->fmt, image->width, image->height, buf->file_len,
+			expect_buf_size);
+		return -EINVAL;
+	}
+
+	if (image->buf.type == B2R2_BLT_PTR_VIRTUAL) {
+		b2r2_log_warn("%s: Virtual pointers not supported yet.\n",
+			__func__);
+		return -EINVAL;
+	}
+	return 0;
+}
+
+/*
+ * Bit-expand the color from fmt to RGB888 with blue at LSB.
+ * Copy MSBs into missing LSBs.
+ */
+static u32 to_RGB888(u32 color, const enum b2r2_blt_fmt fmt)
+{
+	u32 out_color = 0;
+	u32 r = 0;
+	u32 g = 0;
+	u32 b = 0;
+	switch (fmt) {
+	case B2R2_BLT_FMT_16_BIT_ARGB4444:
+		r = ((color & 0xf00) << 12) | ((color & 0xf00) << 8);
+		g = ((color & 0xf0) << 8) | ((color & 0xf0) << 4);
+		b = ((color & 0xf) << 4) | (color & 0xf);
+		out_color = r | g | b;
+		break;
+	case B2R2_BLT_FMT_16_BIT_ARGB1555:
+		r = ((color & 0x7c00) << 9) | ((color & 0x7000) << 4);
+		g = ((color & 0x3e0) << 6) | ((color & 0x380) << 1);
+		b = ((color & 0x1f) << 3) | ((color & 0x1c) >> 2);
+		out_color = r | g | b;
+		break;
+	case B2R2_BLT_FMT_16_BIT_RGB565:
+		r = ((color & 0xf800) << 8) | ((color & 0xe000) << 3);
+		g = ((color & 0x7e0) << 5) | ((color & 0x600) >> 1);
+		b = ((color & 0x1f) << 3) | ((color & 0x1c) >> 2);
+		out_color = r | g | b;
+		break;
+	case B2R2_BLT_FMT_24_BIT_RGB888:
+	case B2R2_BLT_FMT_32_BIT_ARGB8888:
+		out_color = color & 0xffffff;
+		break;
+	case B2R2_BLT_FMT_32_BIT_ABGR8888:
+		r = (color & 0xff) << 16;
+		g = color & 0xff00;
+		b = (color & 0xff0000) >> 16;
+		out_color = r | g | b;
+		break;
+	case B2R2_BLT_FMT_24_BIT_ARGB8565:
+		r = ((color & 0xf800) << 8) | ((color & 0xe000) << 3);
+		g = ((color & 0x7e0) << 5) | ((color & 0x600) >> 1);
+		b = ((color & 0x1f) << 3) | ((color & 0x1c) >> 2);
+		out_color = r | g | b;
+		break;
+	default:
+		break;
+	}
+
+	return out_color;
+}
+
+static void setup_input_stage(const struct b2r2_blt_request *req,
+			      struct b2r2_node *node,
+			      struct b2r2_work_buf *out_buf)
+{
+	/* Horizontal and vertical scaling factors in 6.10 fixed point format */
+	s32 h_scf = 1 << 10;
+	s32 v_scf = 1 << 10;
+	const struct b2r2_blt_rect *src_rect = &(req->user_req.src_rect);
+	const struct b2r2_blt_rect *dst_rect = &(req->user_req.dst_rect);
+	const struct b2r2_blt_img *src_img = &(req->user_req.src_img);
+	const struct b2r2_blt_img *dst_img = &(req->user_req.dst_img);
+	u32 src_pitch = 0;
+	/* horizontal and vertical scan order for out_buf */
+	enum b2r2_ty dst_hso = B2R2_TY_HSO_LEFT_TO_RIGHT;
+	enum b2r2_ty dst_vso = B2R2_TY_VSO_TOP_TO_BOTTOM;
+	u32 fctl = 0;
+	u32 rsf = 0;
+	u32 rzi = 0;
+	bool yuv_semi_planar =
+		src_img->fmt == B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR ||
+		src_img->fmt == B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR ||
+		src_img->fmt == B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE ||
+		src_img->fmt == B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE;
+
+	bool yuv_planar =
+		src_img->fmt == B2R2_BLT_FMT_YUV420_PACKED_PLANAR ||
+		src_img->fmt == B2R2_BLT_FMT_YUV422_PACKED_PLANAR ||
+		src_img->fmt == B2R2_BLT_FMT_YUV444_PACKED_PLANAR;
+
+	struct b2r2_filter_spec *hf;
+	struct b2r2_filter_spec *vf;
+
+	bool use_h_filter = false;
+	bool use_v_filter = false;
+
+	b2r2_log_info("%s ENTRY\n", __func__);
+
+	if ((req->user_req.flags &
+			(B2R2_BLT_FLAG_SOURCE_FILL | B2R2_BLT_FLAG_SOURCE_FILL_RAW)) != 0) {
+		enum b2r2_native_fmt fill_fmt = 0;
+		u32 src_color = req->user_req.src_color;
+
+		/* Determine format in src_color */
+		switch (dst_img->fmt) {
+		/* ARGB formats */
+		case B2R2_BLT_FMT_16_BIT_ARGB4444:
+		case B2R2_BLT_FMT_16_BIT_ARGB1555:
+		case B2R2_BLT_FMT_16_BIT_RGB565:
+		case B2R2_BLT_FMT_24_BIT_RGB888:
+		case B2R2_BLT_FMT_32_BIT_ARGB8888:
+		case B2R2_BLT_FMT_32_BIT_ABGR8888:
+		case B2R2_BLT_FMT_24_BIT_ARGB8565:
+		case B2R2_BLT_FMT_1_BIT_A1:
+		case B2R2_BLT_FMT_8_BIT_A8:
+			if ((req->user_req.flags & B2R2_BLT_FLAG_SOURCE_FILL) != 0) {
+				fill_fmt = B2R2_NATIVE_ARGB8888;
+			} else {
+				/* SOURCE_FILL_RAW */
+				fill_fmt = to_native_fmt(dst_img->fmt);
+				if (dst_img->fmt == B2R2_BLT_FMT_32_BIT_ABGR8888) {
+					/*
+					 * Color is read from a register,
+					 * where it is stored in ABGR format.
+					 * Set up IVMX.
+					 */
+					node->node.GROUP0.B2R2_INS |=
+							B2R2_INS_IVMX_ENABLED;
+					node->node.GROUP0.B2R2_CIC |=
+							B2R2_CIC_IVMX;
+					node->node.GROUP15.B2R2_VMX0 =
+							B2R2_VMX0_RGB_TO_BGR;
+					node->node.GROUP15.B2R2_VMX1 =
+							B2R2_VMX1_RGB_TO_BGR;
+					node->node.GROUP15.B2R2_VMX2 =
+							B2R2_VMX2_RGB_TO_BGR;
+					node->node.GROUP15.B2R2_VMX3 =
+							B2R2_VMX3_RGB_TO_BGR;
+				}
+			}
+			break;
+		/* YUV formats */
+		case B2R2_BLT_FMT_Y_CB_Y_CR:
+		case B2R2_BLT_FMT_CB_Y_CR_Y:
+		case B2R2_BLT_FMT_24_BIT_YUV888:
+		case B2R2_BLT_FMT_32_BIT_AYUV8888:
+		case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
+		case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:
+		case B2R2_BLT_FMT_YUV444_PACKED_PLANAR:
+		case B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR:
+		case B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR:
+		case B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE:
+		case B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE:
+			/*
+			 * Set up IVMX
+			 * The destination format is in fact YUV,
+			 * but the input stage stores the data in
+			 * an intermediate buffer which is RGB.
+			 * Hence the conversion from YUV to RGB.
+			 */
+			node->node.GROUP0.B2R2_INS |= B2R2_INS_IVMX_ENABLED;
+			node->node.GROUP0.B2R2_CIC |= B2R2_CIC_IVMX;
+			node->node.GROUP15.B2R2_VMX0 = B2R2_VMX0_YUV_TO_RGB_601_VIDEO;
+			node->node.GROUP15.B2R2_VMX1 = B2R2_VMX1_YUV_TO_RGB_601_VIDEO;
+			node->node.GROUP15.B2R2_VMX2 = B2R2_VMX2_YUV_TO_RGB_601_VIDEO;
+			node->node.GROUP15.B2R2_VMX3 = B2R2_VMX3_YUV_TO_RGB_601_VIDEO;
+
+			if ((req->user_req.flags & B2R2_BLT_FLAG_SOURCE_FILL) != 0) {
+				fill_fmt = B2R2_NATIVE_AYCBCR8888;
+			} else {
+				/* SOURCE_FILL_RAW */
+				bool dst_yuv_planar =
+					dst_img->fmt == B2R2_BLT_FMT_YUV420_PACKED_PLANAR ||
+					dst_img->fmt == B2R2_BLT_FMT_YUV422_PACKED_PLANAR ||
+					dst_img->fmt == B2R2_BLT_FMT_YUV444_PACKED_PLANAR;
+
+				bool dst_yuv_semi_planar =
+					dst_img->fmt == B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR ||
+					dst_img->fmt == B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR ||
+					dst_img->fmt ==
+						B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE ||
+					dst_img->fmt ==
+						B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE;
+
+				if (dst_yuv_planar || dst_yuv_semi_planar) {
+					/*
+					 * SOURCE_FILL_RAW cannot be supported
+					 * with multi-buffer formats.
+					 * Force a legal format to prevent B2R2
+					 * from misbehaving.
+					 */
+					fill_fmt = B2R2_NATIVE_AYCBCR8888;
+				} else {
+					fill_fmt = to_native_fmt(dst_img->fmt);
+				}
+
+				if (dst_img->fmt == B2R2_BLT_FMT_Y_CB_Y_CR) {
+					/*
+					 * Setup input VMX to convert YVU to
+					 * RGB 601 VIDEO
+					 * Chroma components are swapped so
+					 * it is YVU and not YUV.
+					 */
+					node->node.GROUP15.B2R2_VMX0 =
+						B2R2_VMX0_YVU_TO_RGB_601_VIDEO;
+					node->node.GROUP15.B2R2_VMX1 =
+						B2R2_VMX1_YVU_TO_RGB_601_VIDEO;
+					node->node.GROUP15.B2R2_VMX2 =
+						B2R2_VMX2_YVU_TO_RGB_601_VIDEO;
+					node->node.GROUP15.B2R2_VMX3 =
+						B2R2_VMX3_YVU_TO_RGB_601_VIDEO;
+				}
+			}
+			break;
+		default:
+			src_color = 0;
+			fill_fmt = B2R2_NATIVE_ARGB8888;
+			break;
+		}
+
+		node->node.GROUP1.B2R2_TBA = out_buf->phys_addr;
+		node->node.GROUP1.B2R2_TTY =
+			(B2R2_GENERIC_WORK_BUF_PITCH << B2R2_TY_BITMAP_PITCH_SHIFT) |
+			B2R2_GENERIC_WORK_BUF_FMT |
+			B2R2_TY_ALPHA_RANGE_255 |
+			B2R2_TY_HSO_LEFT_TO_RIGHT |
+			B2R2_TY_VSO_TOP_TO_BOTTOM;
+		/* Set color fill on SRC2 channel */
+		node->node.GROUP4.B2R2_SBA = 0;
+		node->node.GROUP4.B2R2_STY =
+			(0 << B2R2_TY_BITMAP_PITCH_SHIFT) |
+			fill_fmt |
+			get_alpha_range(dst_img->fmt) |
+			B2R2_TY_HSO_LEFT_TO_RIGHT |
+			B2R2_TY_VSO_TOP_TO_BOTTOM;
+
+		node->node.GROUP0.B2R2_INS |=
+				B2R2_INS_SOURCE_2_COLOR_FILL_REGISTER;
+		node->node.GROUP0.B2R2_CIC |= B2R2_CIC_COLOR_FILL;
+		node->node.GROUP2.B2R2_S2CF = src_color;
+
+		node->node.GROUP0.B2R2_ACK |= B2R2_ACK_MODE_BYPASS_S2_S3;
+
+		b2r2_log_info("%s DONE\n", __func__);
+		return;
+	}
+
+	if (src_img->pitch == 0) {
+		/* Determine pitch based on format and width of the image. */
+		src_pitch = get_pitch(src_img->fmt, src_img->width);
+	} else {
+		src_pitch = src_img->pitch;
+	}
+
+	b2r2_log_info("%s transform=%#010x\n",
+			__func__, req->user_req.transform);
+	if (req->user_req.transform & B2R2_BLT_TRANSFORM_CCW_ROT_90) {
+		h_scf = (src_rect->width << 10) / dst_rect->height;
+		v_scf = (src_rect->height << 10) / dst_rect->width;
+	} else {
+		h_scf = (src_rect->width << 10) / dst_rect->width;
+		v_scf = (src_rect->height << 10) / dst_rect->height;
+	}
+
+	hf = b2r2_filter_find(h_scf);
+	vf = b2r2_filter_find(v_scf);
+
+	use_h_filter = h_scf != (1 << 10);
+	use_v_filter = v_scf != (1 << 10);
+
+	/* B2R2_BLT_FLAG_BLUR overrides any scaling filter. */
+	if (req->user_req.flags & B2R2_BLT_FLAG_BLUR) {
+		use_h_filter = true;
+		use_v_filter = true;
+		hf = b2r2_filter_blur();
+		vf = b2r2_filter_blur();
+	}
+
+	/* Configure horizontal rescale */
+	if (h_scf != (1 << 10)) {
+		b2r2_log_info("%s: Scaling horizontally by 0x%.8x"
+			"\ns(%d, %d)->d(%d, %d)\n", __func__,
+			h_scf, src_rect->width, src_rect->height,
+			dst_rect->width, dst_rect->height);
+	}
+	fctl |= B2R2_FCTL_HF2D_MODE_ENABLE_RESIZER;
+	rsf &= ~(0xffff << B2R2_RSF_HSRC_INC_SHIFT);
+	rsf |= h_scf << B2R2_RSF_HSRC_INC_SHIFT;
+	rzi |= B2R2_RZI_DEFAULT_HNB_REPEAT;
+
+	/* Configure vertical rescale */
+	if (v_scf != (1 << 10)) {
+		b2r2_log_info("%s: Scaling vertically by 0x%.8x"
+			"\ns(%d, %d)->d(%d, %d)\n", __func__,
+			v_scf, src_rect->width, src_rect->height,
+			dst_rect->width, dst_rect->height);
+	}
+	fctl |= B2R2_FCTL_VF2D_MODE_ENABLE_RESIZER;
+	rsf &= ~(0xffff << B2R2_RSF_VSRC_INC_SHIFT);
+	rsf |= v_scf << B2R2_RSF_VSRC_INC_SHIFT;
+	rzi |= 2 << B2R2_RZI_VNB_REPEAT_SHIFT;
+
+	node->node.GROUP0.B2R2_INS |= B2R2_INS_RESCALE2D_ENABLED;
+	node->node.GROUP0.B2R2_CIC |= B2R2_CIC_RESIZE_CHROMA;
+
+	/* Adjustments that depend on the source format */
+	switch (src_img->fmt) {
+	case B2R2_BLT_FMT_32_BIT_ABGR8888:
+		/* Set up IVMX */
+		node->node.GROUP0.B2R2_INS |= B2R2_INS_IVMX_ENABLED;
+		node->node.GROUP0.B2R2_CIC |= B2R2_CIC_IVMX;
+
+		node->node.GROUP15.B2R2_VMX0 = B2R2_VMX0_RGB_TO_BGR;
+		node->node.GROUP15.B2R2_VMX1 = B2R2_VMX1_RGB_TO_BGR;
+		node->node.GROUP15.B2R2_VMX2 = B2R2_VMX2_RGB_TO_BGR;
+		node->node.GROUP15.B2R2_VMX3 = B2R2_VMX3_RGB_TO_BGR;
+		break;
+	case B2R2_BLT_FMT_Y_CB_Y_CR:
+	case B2R2_BLT_FMT_CB_Y_CR_Y:
+	case B2R2_BLT_FMT_24_BIT_YUV888:
+	case B2R2_BLT_FMT_32_BIT_AYUV8888:
+		/* Set up IVMX */
+		node->node.GROUP0.B2R2_INS |= B2R2_INS_IVMX_ENABLED;
+		node->node.GROUP0.B2R2_CIC |= B2R2_CIC_IVMX;
+		if (src_img->fmt == B2R2_BLT_FMT_Y_CB_Y_CR) {
+			/*
+			 * Setup input VMX to convert YVU to RGB 601 VIDEO
+			 * Chroma components are swapped so it is YVU and not YUV.
+			 */
+			node->node.GROUP15.B2R2_VMX0 = B2R2_VMX0_YVU_TO_RGB_601_VIDEO;
+			node->node.GROUP15.B2R2_VMX1 = B2R2_VMX1_YVU_TO_RGB_601_VIDEO;
+			node->node.GROUP15.B2R2_VMX2 = B2R2_VMX2_YVU_TO_RGB_601_VIDEO;
+			node->node.GROUP15.B2R2_VMX3 = B2R2_VMX3_YVU_TO_RGB_601_VIDEO;
+		} else {
+			node->node.GROUP15.B2R2_VMX0 = B2R2_VMX0_YUV_TO_RGB_601_VIDEO;
+			node->node.GROUP15.B2R2_VMX1 = B2R2_VMX1_YUV_TO_RGB_601_VIDEO;
+			node->node.GROUP15.B2R2_VMX2 = B2R2_VMX2_YUV_TO_RGB_601_VIDEO;
+			node->node.GROUP15.B2R2_VMX3 = B2R2_VMX3_YUV_TO_RGB_601_VIDEO;
+		}
+		break;
+	case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YUV444_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE:
+	case B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE: {
+		/*
+		 * Luma handled in the same way
+		 * for all YUV multi-buffer formats.
+		 * Set luma rescale registers.
+		 */
+		u32 rsf_luma = 0;
+		u32 rzi_luma = 0;
+
+		/* Set up IVMX */
+		node->node.GROUP0.B2R2_INS |=
+			B2R2_INS_IVMX_ENABLED | B2R2_INS_RESCALE2D_ENABLED;
+		node->node.GROUP0.B2R2_CIC |=
+			B2R2_CIC_IVMX | B2R2_CIC_RESIZE_LUMA;
+
+		node->node.GROUP15.B2R2_VMX0 = B2R2_VMX0_YUV_TO_RGB_601_VIDEO;
+		node->node.GROUP15.B2R2_VMX1 = B2R2_VMX1_YUV_TO_RGB_601_VIDEO;
+		node->node.GROUP15.B2R2_VMX2 = B2R2_VMX2_YUV_TO_RGB_601_VIDEO;
+		node->node.GROUP15.B2R2_VMX3 = B2R2_VMX3_YUV_TO_RGB_601_VIDEO;
+
+		fctl |= B2R2_FCTL_LUMA_HF2D_MODE_ENABLE_RESIZER |
+			B2R2_FCTL_LUMA_VF2D_MODE_ENABLE_RESIZER;
+
+		if (use_h_filter && hf) {
+			fctl |= B2R2_FCTL_LUMA_HF2D_MODE_ENABLE_FILTER;
+			node->node.GROUP10.B2R2_HFP = hf->h_coeffs_phys_addr;
+		}
+
+		if (use_v_filter && vf) {
+			fctl |= B2R2_FCTL_LUMA_VF2D_MODE_ENABLE_FILTER;
+			node->node.GROUP10.B2R2_VFP = vf->v_coeffs_phys_addr;
+		}
+
+		rsf_luma |= h_scf << B2R2_RSF_HSRC_INC_SHIFT;
+		rzi_luma |= B2R2_RZI_DEFAULT_HNB_REPEAT;
+
+		rsf_luma |= v_scf << B2R2_RSF_VSRC_INC_SHIFT;
+		rzi_luma |= 2 << B2R2_RZI_VNB_REPEAT_SHIFT;
+
+		node->node.GROUP10.B2R2_RSF = rsf_luma;
+		node->node.GROUP10.B2R2_RZI = rzi_luma;
+
+		switch (src_img->fmt) {
+		case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
+		case B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR:
+		case B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE:
+			/*
+			 * Chrominance is always half the luminance size
+			 * so chrominance resizer is always active.
+			 */
+			fctl |= B2R2_FCTL_HF2D_MODE_ENABLE_RESIZER |
+				B2R2_FCTL_VF2D_MODE_ENABLE_RESIZER;
+
+			rsf &= ~(0xffff << B2R2_RSF_HSRC_INC_SHIFT);
+			rsf |= (h_scf >> 1) << B2R2_RSF_HSRC_INC_SHIFT;
+			rsf &= ~(0xffff << B2R2_RSF_VSRC_INC_SHIFT);
+			rsf |= (v_scf >> 1) << B2R2_RSF_VSRC_INC_SHIFT;
+			/* Select suitable filter for chroma */
+			hf = b2r2_filter_find(h_scf >> 1);
+			vf = b2r2_filter_find(v_scf >> 1);
+			use_h_filter = true;
+			use_v_filter = true;
+			break;
+		case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:
+		case B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR:
+		case B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE:
+			/*
+			 * Chrominance is always half the luminance size
+			 * only in horizontal direction.
+			 */
+			fctl |= B2R2_FCTL_HF2D_MODE_ENABLE_RESIZER |
+				B2R2_FCTL_VF2D_MODE_ENABLE_RESIZER;
+
+			rsf &= ~(0xffff << B2R2_RSF_HSRC_INC_SHIFT);
+			rsf |= (h_scf >> 1) << B2R2_RSF_HSRC_INC_SHIFT;
+			rsf &= ~(0xffff << B2R2_RSF_VSRC_INC_SHIFT);
+			rsf |= v_scf << B2R2_RSF_VSRC_INC_SHIFT;
+			/* Select suitable filter for chroma */
+			hf = b2r2_filter_find(h_scf >> 1);
+			use_h_filter = true;
+			break;
+		case B2R2_BLT_FMT_YUV444_PACKED_PLANAR:
+			/* Chrominance is the same size as luminance.*/
+			fctl |= B2R2_FCTL_HF2D_MODE_ENABLE_RESIZER |
+				B2R2_FCTL_VF2D_MODE_ENABLE_RESIZER;
+
+			rsf &= ~(0xffff << B2R2_RSF_HSRC_INC_SHIFT);
+			rsf |= h_scf << B2R2_RSF_HSRC_INC_SHIFT;
+			rsf &= ~(0xffff << B2R2_RSF_VSRC_INC_SHIFT);
+			rsf |= v_scf << B2R2_RSF_VSRC_INC_SHIFT;
+			/* Select suitable filter for chroma */
+			hf = b2r2_filter_find(h_scf);
+			vf = b2r2_filter_find(v_scf);
+			use_h_filter = true;
+			use_v_filter = true;
+			break;
+		default:
+			break;
+		}
+		break;
+	}
+	default:
+		break;
+	}
+
+	/*
+	 * Set the filter control and rescale registers.
+	 * GROUP9 registers are used for all single-buffer formats
+	 * or for chroma in case of multi-buffer YUV formats.
+	 * h/v_filter is now appropriately selected for chroma scaling,
+	 * be it YUV multi-buffer, or single-buffer raster format.
+	 * B2R2_BLT_FLAG_BLUR overrides any scaling filter.
+	 */
+	if (req->user_req.flags & B2R2_BLT_FLAG_BLUR) {
+		use_h_filter = true;
+		use_v_filter = true;
+		hf = b2r2_filter_blur();
+		vf = b2r2_filter_blur();
+	}
+
+	if (use_h_filter && hf) {
+		fctl |= B2R2_FCTL_HF2D_MODE_ENABLE_COLOR_CHANNEL_FILTER;
+		node->node.GROUP9.B2R2_HFP = hf->h_coeffs_phys_addr;
+	}
+
+	if (use_v_filter && vf) {
+		fctl |= B2R2_FCTL_VF2D_MODE_ENABLE_COLOR_CHANNEL_FILTER;
+		node->node.GROUP9.B2R2_VFP = vf->v_coeffs_phys_addr;
+	}
+
+	node->node.GROUP8.B2R2_FCTL |= fctl;
+	node->node.GROUP9.B2R2_RSF |= rsf;
+	node->node.GROUP9.B2R2_RZI |= rzi;
+	node->node.GROUP0.B2R2_CIC |= B2R2_CIC_FILTER_CONTROL;
+
+	/*
+	 * Flip transform is done before potential rotation.
+	 * This can be achieved with appropriate scan order.
+	 * Transform stage will only do rotation.
+	 */
+	if (req->user_req.transform & B2R2_BLT_TRANSFORM_FLIP_H)
+		dst_hso = B2R2_TY_HSO_RIGHT_TO_LEFT;
+
+	if (req->user_req.transform & B2R2_BLT_TRANSFORM_FLIP_V)
+		dst_vso = B2R2_TY_VSO_BOTTOM_TO_TOP;
+
+	/* Set target buffer */
+	node->node.GROUP1.B2R2_TBA = out_buf->phys_addr;
+	node->node.GROUP1.B2R2_TTY =
+		(B2R2_GENERIC_WORK_BUF_PITCH << B2R2_TY_BITMAP_PITCH_SHIFT) |
+		B2R2_GENERIC_WORK_BUF_FMT |
+		B2R2_TY_ALPHA_RANGE_255 |
+		dst_hso | dst_vso;
+
+	if (yuv_planar) {
+		/*
+		 * Set up chrominance buffers on source 1 and 2,
+		 * luminance on source 3.
+		 * src_pitch and physical_address apply to luminance,
+		 * corresponding chrominance values have to be derived.
+		 */
+		u32 cb_addr = req->src_resolved.physical_address +
+			src_pitch * src_img->height;
+		u32 cr_addr = 0;
+		u32 chroma_pitch = 0;
+		enum b2r2_native_fmt src_fmt = to_native_fmt(src_img->fmt);
+
+		switch (src_img->fmt) {
+		case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
+			chroma_pitch = src_pitch >> 1;
+			cr_addr =
+				cb_addr + chroma_pitch * (src_img->height >> 1);
+			break;
+		case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:
+			chroma_pitch = src_pitch >> 1;
+			cr_addr =
+				cb_addr + chroma_pitch * src_img->height;
+			break;
+		case B2R2_BLT_FMT_YUV444_PACKED_PLANAR:
+			/* Chrominance has full resolution, same as luminance.*/
+			chroma_pitch = src_pitch;
+			cr_addr =
+				cb_addr + chroma_pitch * src_img->height;
+			break;
+		default:
+			break;
+		}
+
+		node->node.GROUP3.B2R2_SBA = cr_addr;
+		node->node.GROUP3.B2R2_STY =
+			(chroma_pitch << B2R2_TY_BITMAP_PITCH_SHIFT) |
+			src_fmt |
+			B2R2_TY_HSO_LEFT_TO_RIGHT |
+			B2R2_TY_VSO_TOP_TO_BOTTOM;
+
+		node->node.GROUP4.B2R2_SBA = cb_addr;
+		node->node.GROUP4.B2R2_STY = node->node.GROUP3.B2R2_STY;
+
+		node->node.GROUP5.B2R2_SBA = req->src_resolved.physical_address;
+		node->node.GROUP5.B2R2_STY =
+			(src_pitch << B2R2_TY_BITMAP_PITCH_SHIFT) |
+			src_fmt |
+			B2R2_TY_HSO_LEFT_TO_RIGHT |
+			B2R2_TY_VSO_TOP_TO_BOTTOM;
+
+		node->node.GROUP0.B2R2_INS |=
+			B2R2_INS_SOURCE_1_FETCH_FROM_MEM |
+			B2R2_INS_SOURCE_2_FETCH_FROM_MEM |
+			B2R2_INS_SOURCE_3_FETCH_FROM_MEM;
+		node->node.GROUP0.B2R2_CIC |=
+			B2R2_CIC_SOURCE_1 | B2R2_CIC_SOURCE_2 | B2R2_CIC_SOURCE_3;
+	} else if (yuv_semi_planar) {
+		/*
+		 * Set up chrominance buffer on source 2, luminance on source 3.
+		 * src_pitch and physical_address apply to luminance,
+		 * corresponding chrominance values have to be derived.
+		 * U and V are interleaved at half the luminance resolution,
+		 * which makes the pitch of the UV plane equal
+		 * to luminance pitch.
+		 */
+		u32 chroma_addr = req->src_resolved.physical_address +
+			src_pitch * src_img->height;
+		u32 chroma_pitch = src_pitch;
+
+		enum b2r2_native_fmt src_fmt = to_native_fmt(src_img->fmt);
+
+		node->node.GROUP4.B2R2_SBA = chroma_addr;
+		node->node.GROUP4.B2R2_STY =
+			(chroma_pitch << B2R2_TY_BITMAP_PITCH_SHIFT) |
+			src_fmt |
+			B2R2_TY_HSO_LEFT_TO_RIGHT |
+			B2R2_TY_VSO_TOP_TO_BOTTOM;
+
+		node->node.GROUP5.B2R2_SBA = req->src_resolved.physical_address;
+		node->node.GROUP5.B2R2_STY =
+			(src_pitch << B2R2_TY_BITMAP_PITCH_SHIFT) |
+			src_fmt |
+			B2R2_TY_HSO_LEFT_TO_RIGHT |
+			B2R2_TY_VSO_TOP_TO_BOTTOM;
+
+		node->node.GROUP0.B2R2_INS |=
+			B2R2_INS_SOURCE_2_FETCH_FROM_MEM |
+			B2R2_INS_SOURCE_3_FETCH_FROM_MEM;
+		node->node.GROUP0.B2R2_CIC |=
+			B2R2_CIC_SOURCE_2 | B2R2_CIC_SOURCE_3;
+	} else {
+		/* single buffer format */
+		node->node.GROUP4.B2R2_SBA = req->src_resolved.physical_address;
+		node->node.GROUP4.B2R2_STY =
+			(src_pitch << B2R2_TY_BITMAP_PITCH_SHIFT) |
+			to_native_fmt(src_img->fmt) |
+			get_alpha_range(src_img->fmt) |
+			B2R2_TY_HSO_LEFT_TO_RIGHT |
+			B2R2_TY_VSO_TOP_TO_BOTTOM;
+
+		node->node.GROUP0.B2R2_INS |= B2R2_INS_SOURCE_2_FETCH_FROM_MEM;
+		node->node.GROUP0.B2R2_CIC |= B2R2_CIC_SOURCE_2;
+	}
+
+	if ((req->user_req.flags &
+			B2R2_BLT_FLAG_CLUT_COLOR_CORRECTION) != 0) {
+		node->node.GROUP0.B2R2_INS |= B2R2_INS_CLUTOP_ENABLED;
+		node->node.GROUP0.B2R2_CIC |= B2R2_CIC_CLUT;
+		node->node.GROUP7.B2R2_CCO = B2R2_CCO_CLUT_COLOR_CORRECTION |
+			B2R2_CCO_CLUT_UPDATE;
+		node->node.GROUP7.B2R2_CML = req->clut_phys_addr;
+	}
+
+	node->node.GROUP0.B2R2_ACK |= B2R2_ACK_MODE_BYPASS_S2_S3;
+
+	b2r2_log_info("%s DONE\n", __func__);
+}
+
+static void setup_transform_stage(const struct b2r2_blt_request *req,
+				  struct b2r2_node *node,
+				  struct b2r2_work_buf *out_buf,
+				  struct b2r2_work_buf *in_buf)
+{
+	/* vertical scan order for out_buf */
+	enum b2r2_ty dst_vso = B2R2_TY_VSO_TOP_TO_BOTTOM;
+	enum b2r2_blt_transform transform = req->user_req.transform;
+
+	b2r2_log_info("%s ENTRY\n", __func__);
+
+	if (transform & B2R2_BLT_TRANSFORM_CCW_ROT_90) {
+		/*
+		 * Scan order must be flipped otherwise contents will
+		 * be mirrored vertically. Leftmost column of in_buf
+		 * would become top instead of bottom row of out_buf.
+		 */
+		dst_vso = B2R2_TY_VSO_BOTTOM_TO_TOP;
+		node->node.GROUP0.B2R2_INS |= B2R2_INS_ROTATION_ENABLED;
+	}
+
+	/* Set target buffer */
+	node->node.GROUP1.B2R2_TBA = out_buf->phys_addr;
+	node->node.GROUP1.B2R2_TTY =
+		(B2R2_GENERIC_WORK_BUF_PITCH << B2R2_TY_BITMAP_PITCH_SHIFT) |
+		B2R2_GENERIC_WORK_BUF_FMT |
+		B2R2_TY_ALPHA_RANGE_255 |
+		B2R2_TY_HSO_LEFT_TO_RIGHT | dst_vso;
+
+	/* Set source buffer on SRC2 channel */
+	node->node.GROUP4.B2R2_SBA = in_buf->phys_addr;
+	node->node.GROUP4.B2R2_STY =
+		(B2R2_GENERIC_WORK_BUF_PITCH << B2R2_TY_BITMAP_PITCH_SHIFT) |
+		B2R2_GENERIC_WORK_BUF_FMT |
+		B2R2_TY_ALPHA_RANGE_255 |
+		B2R2_TY_HSO_LEFT_TO_RIGHT |
+		B2R2_TY_VSO_TOP_TO_BOTTOM;
+
+	node->node.GROUP0.B2R2_INS |= B2R2_INS_SOURCE_2_FETCH_FROM_MEM;
+	node->node.GROUP0.B2R2_CIC |= B2R2_CIC_SOURCE_2;
+	node->node.GROUP0.B2R2_ACK |= B2R2_ACK_MODE_BYPASS_S2_S3;
+
+	b2r2_log_info("%s DONE\n", __func__);
+}
+
+/*
+static void setup_mask_stage(const struct b2r2_blt_request req,
+			     struct b2r2_node *node,
+			     struct b2r2_work_buf *out_buf,
+			     struct b2r2_work_buf *in_buf);
+*/
+
+static void setup_dst_read_stage(const struct b2r2_blt_request *req,
+				 struct b2r2_node *node,
+				 struct b2r2_work_buf *out_buf)
+{
+	const struct b2r2_blt_img *dst_img = &(req->user_req.dst_img);
+	u32 fctl = 0;
+	u32 rsf = 0;
+	bool yuv_semi_planar =
+		dst_img->fmt == B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR ||
+		dst_img->fmt == B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR ||
+		dst_img->fmt == B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE ||
+		dst_img->fmt == B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE;
+
+	bool yuv_planar =
+		dst_img->fmt == B2R2_BLT_FMT_YUV420_PACKED_PLANAR ||
+		dst_img->fmt == B2R2_BLT_FMT_YUV422_PACKED_PLANAR ||
+		dst_img->fmt == B2R2_BLT_FMT_YUV444_PACKED_PLANAR;
+
+	u32 dst_pitch = 0;
+	if (dst_img->pitch == 0) {
+		/* Determine pitch based on format and width of the image. */
+		dst_pitch = get_pitch(dst_img->fmt, dst_img->width);
+	} else {
+		dst_pitch = dst_img->pitch;
+	}
+
+	b2r2_log_info("%s ENTRY\n", __func__);
+
+	/* Adjustments that depend on the destination format */
+	switch (dst_img->fmt) {
+	case B2R2_BLT_FMT_32_BIT_ABGR8888:
+		/* Set up IVMX */
+		node->node.GROUP0.B2R2_INS |= B2R2_INS_IVMX_ENABLED;
+		node->node.GROUP0.B2R2_CIC |= B2R2_CIC_IVMX;
+
+		node->node.GROUP15.B2R2_VMX0 = B2R2_VMX0_RGB_TO_BGR;
+		node->node.GROUP15.B2R2_VMX1 = B2R2_VMX1_RGB_TO_BGR;
+		node->node.GROUP15.B2R2_VMX2 = B2R2_VMX2_RGB_TO_BGR;
+		node->node.GROUP15.B2R2_VMX3 = B2R2_VMX3_RGB_TO_BGR;
+		break;
+	case B2R2_BLT_FMT_Y_CB_Y_CR:
+	case B2R2_BLT_FMT_CB_Y_CR_Y:
+	case B2R2_BLT_FMT_24_BIT_YUV888:
+	case B2R2_BLT_FMT_32_BIT_AYUV8888:
+		/* Set up IVMX */
+		node->node.GROUP0.B2R2_INS |= B2R2_INS_IVMX_ENABLED;
+		node->node.GROUP0.B2R2_CIC |= B2R2_CIC_IVMX;
+		if (dst_img->fmt == B2R2_BLT_FMT_Y_CB_Y_CR) {
+			/*
+			 * Setup input VMX to convert YVU to RGB 601 VIDEO
+			 * Chroma components are swapped
+			 * so it is YVU and not YUV.
+			 */
+			node->node.GROUP15.B2R2_VMX0 = B2R2_VMX0_YVU_TO_RGB_601_VIDEO;
+			node->node.GROUP15.B2R2_VMX1 = B2R2_VMX1_YVU_TO_RGB_601_VIDEO;
+			node->node.GROUP15.B2R2_VMX2 = B2R2_VMX2_YVU_TO_RGB_601_VIDEO;
+			node->node.GROUP15.B2R2_VMX3 = B2R2_VMX3_YVU_TO_RGB_601_VIDEO;
+		} else {
+			node->node.GROUP15.B2R2_VMX0 = B2R2_VMX0_YUV_TO_RGB_601_VIDEO;
+			node->node.GROUP15.B2R2_VMX1 = B2R2_VMX1_YUV_TO_RGB_601_VIDEO;
+			node->node.GROUP15.B2R2_VMX2 = B2R2_VMX2_YUV_TO_RGB_601_VIDEO;
+			node->node.GROUP15.B2R2_VMX3 = B2R2_VMX3_YUV_TO_RGB_601_VIDEO;
+		}
+		break;
+	case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YUV444_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE:
+	case B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE: {
+		/* Set up IVMX */
+		node->node.GROUP0.B2R2_INS |= B2R2_INS_IVMX_ENABLED;
+		node->node.GROUP0.B2R2_CIC |= B2R2_CIC_IVMX;
+
+		node->node.GROUP15.B2R2_VMX0 = B2R2_VMX0_YUV_TO_RGB_601_VIDEO;
+		node->node.GROUP15.B2R2_VMX1 = B2R2_VMX1_YUV_TO_RGB_601_VIDEO;
+		node->node.GROUP15.B2R2_VMX2 = B2R2_VMX2_YUV_TO_RGB_601_VIDEO;
+		node->node.GROUP15.B2R2_VMX3 = B2R2_VMX3_YUV_TO_RGB_601_VIDEO;
+
+		switch (dst_img->fmt) {
+		case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
+		case B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR:
+		case B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE:
+			/*
+			 * Chrominance is always half the luminance size
+			 * so chrominance resizer is always active.
+			 */
+			fctl |= B2R2_FCTL_HF2D_MODE_ENABLE_RESIZER |
+				B2R2_FCTL_VF2D_MODE_ENABLE_RESIZER;
+
+			rsf &= ~(0xffff << B2R2_RSF_HSRC_INC_SHIFT);
+			rsf |= (1 << 9) << B2R2_RSF_HSRC_INC_SHIFT;
+			rsf &= ~(0xffff << B2R2_RSF_VSRC_INC_SHIFT);
+			rsf |= (1 << 9) << B2R2_RSF_VSRC_INC_SHIFT;
+			break;
+		case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:
+		case B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR:
+		case B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE:
+			/*
+			 * Chrominance is always half the luminance size
+			 * only in horizontal direction.
+			 */
+			fctl |= B2R2_FCTL_HF2D_MODE_ENABLE_RESIZER;
+
+			rsf &= ~(0xffff << B2R2_RSF_HSRC_INC_SHIFT);
+			rsf |= (1 << 9) << B2R2_RSF_HSRC_INC_SHIFT;
+			rsf &= ~(0xffff << B2R2_RSF_VSRC_INC_SHIFT);
+			rsf |= (1 << 10) << B2R2_RSF_VSRC_INC_SHIFT;
+			break;
+		case B2R2_BLT_FMT_YUV444_PACKED_PLANAR:
+			/* Chrominance is the same size as luminance.*/
+			fctl |= B2R2_FCTL_HF2D_MODE_ENABLE_RESIZER |
+				B2R2_FCTL_VF2D_MODE_ENABLE_RESIZER;
+
+			rsf &= ~(0xffff << B2R2_RSF_HSRC_INC_SHIFT);
+			rsf |= (1 << 10) << B2R2_RSF_HSRC_INC_SHIFT;
+			rsf &= ~(0xffff << B2R2_RSF_VSRC_INC_SHIFT);
+			rsf |= (1 << 10) << B2R2_RSF_VSRC_INC_SHIFT;
+			break;
+		default:
+			break;
+		}
+		/* Set the filter control and rescale registers for chroma */
+		node->node.GROUP8.B2R2_FCTL |= fctl;
+		node->node.GROUP9.B2R2_RSF |= rsf;
+		node->node.GROUP9.B2R2_RZI =
+			B2R2_RZI_DEFAULT_HNB_REPEAT |
+			(2 << B2R2_RZI_VNB_REPEAT_SHIFT);
+		node->node.GROUP0.B2R2_INS |= B2R2_INS_RESCALE2D_ENABLED;
+		node->node.GROUP0.B2R2_CIC |=
+			B2R2_CIC_FILTER_CONTROL | B2R2_CIC_RESIZE_CHROMA;
+		break;
+	}
+	default:
+		break;
+	}
+
+	/* Set target buffer */
+	node->node.GROUP1.B2R2_TBA = out_buf->phys_addr;
+	node->node.GROUP1.B2R2_TTY =
+		(B2R2_GENERIC_WORK_BUF_PITCH << B2R2_TY_BITMAP_PITCH_SHIFT) |
+		B2R2_GENERIC_WORK_BUF_FMT |
+		B2R2_TY_ALPHA_RANGE_255 |
+		B2R2_TY_HSO_LEFT_TO_RIGHT |
+		B2R2_TY_VSO_TOP_TO_BOTTOM;
+
+	if (yuv_planar) {
+		/*
+		 * Set up chrominance buffers on source 1 and 2,
+		 * luminance on source 3.
+		 * dst_pitch and physical_address apply to luminance,
+		 * corresponding chrominance values have to be derived.
+		 */
+		u32 cb_addr = req->dst_resolved.physical_address +
+			dst_pitch * dst_img->height;
+		u32 cr_addr = 0;
+		u32 chroma_pitch = 0;
+		enum b2r2_native_fmt dst_native_fmt =
+				to_native_fmt(dst_img->fmt);
+
+		switch (dst_img->fmt) {
+		case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
+			chroma_pitch = dst_pitch >> 1;
+			cr_addr =
+				cb_addr + chroma_pitch * (dst_img->height >> 1);
+			break;
+		case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:
+			chroma_pitch = dst_pitch >> 1;
+			cr_addr =
+				cb_addr + chroma_pitch * dst_img->height;
+			break;
+		case B2R2_BLT_FMT_YUV444_PACKED_PLANAR:
+			chroma_pitch = dst_pitch;
+			cr_addr =
+				cb_addr + chroma_pitch * dst_img->height;
+			break;
+		default:
+			break;
+		}
+
+		node->node.GROUP3.B2R2_SBA = cr_addr;
+		node->node.GROUP3.B2R2_STY =
+			(chroma_pitch << B2R2_TY_BITMAP_PITCH_SHIFT) |
+			dst_native_fmt |
+			B2R2_TY_HSO_LEFT_TO_RIGHT |
+			B2R2_TY_VSO_TOP_TO_BOTTOM;
+
+		node->node.GROUP4.B2R2_SBA = cb_addr;
+		node->node.GROUP4.B2R2_STY = node->node.GROUP3.B2R2_STY;
+
+		node->node.GROUP5.B2R2_SBA = req->dst_resolved.physical_address;
+		node->node.GROUP5.B2R2_STY =
+			(dst_pitch << B2R2_TY_BITMAP_PITCH_SHIFT) |
+			dst_native_fmt |
+			B2R2_TY_HSO_LEFT_TO_RIGHT |
+			B2R2_TY_VSO_TOP_TO_BOTTOM;
+
+		node->node.GROUP0.B2R2_INS |=
+			B2R2_INS_SOURCE_1_FETCH_FROM_MEM |
+			B2R2_INS_SOURCE_2_FETCH_FROM_MEM |
+			B2R2_INS_SOURCE_3_FETCH_FROM_MEM;
+		node->node.GROUP0.B2R2_CIC |=
+			B2R2_CIC_SOURCE_1 | B2R2_CIC_SOURCE_2 | B2R2_CIC_SOURCE_3;
+	} else if (yuv_semi_planar) {
+		/*
+		 * Set up chrominance buffer on source 2, luminance on source 3.
+		 * dst_pitch and physical_address apply to luminance,
+		 * corresponding chrominance values have to be derived.
+		 * U and V are interleaved at half the luminance resolution,
+		 * which makes the pitch of the UV plane equal
+		 * to luminance pitch.
+		 */
+		u32 chroma_addr = req->dst_resolved.physical_address +
+			dst_pitch * dst_img->height;
+		u32 chroma_pitch = dst_pitch;
+
+		enum b2r2_native_fmt dst_native_fmt =
+				to_native_fmt(dst_img->fmt);
+
+		node->node.GROUP4.B2R2_SBA = chroma_addr;
+		node->node.GROUP4.B2R2_STY =
+			(chroma_pitch << B2R2_TY_BITMAP_PITCH_SHIFT) |
+			dst_native_fmt |
+			B2R2_TY_HSO_LEFT_TO_RIGHT |
+			B2R2_TY_VSO_TOP_TO_BOTTOM;
+
+		node->node.GROUP5.B2R2_SBA = req->dst_resolved.physical_address;
+		node->node.GROUP5.B2R2_STY =
+			(dst_pitch << B2R2_TY_BITMAP_PITCH_SHIFT) |
+			dst_native_fmt |
+			B2R2_TY_HSO_LEFT_TO_RIGHT |
+			B2R2_TY_VSO_TOP_TO_BOTTOM;
+
+		node->node.GROUP0.B2R2_INS |=
+			B2R2_INS_SOURCE_2_FETCH_FROM_MEM |
+			B2R2_INS_SOURCE_3_FETCH_FROM_MEM;
+		node->node.GROUP0.B2R2_CIC |=
+			B2R2_CIC_SOURCE_2 | B2R2_CIC_SOURCE_3;
+	} else {
+		/* single buffer format */
+		node->node.GROUP4.B2R2_SBA = req->dst_resolved.physical_address;
+		node->node.GROUP4.B2R2_STY =
+			(dst_pitch << B2R2_TY_BITMAP_PITCH_SHIFT) |
+			to_native_fmt(dst_img->fmt) |
+			get_alpha_range(dst_img->fmt) |
+			B2R2_TY_HSO_LEFT_TO_RIGHT |
+			B2R2_TY_VSO_TOP_TO_BOTTOM;
+
+		node->node.GROUP0.B2R2_INS |=
+			B2R2_INS_SOURCE_2_FETCH_FROM_MEM;
+		node->node.GROUP0.B2R2_CIC |= B2R2_CIC_SOURCE_2;
+	}
+
+	node->node.GROUP0.B2R2_ACK |= B2R2_ACK_MODE_BYPASS_S2_S3;
+
+	b2r2_log_info("%s DONE\n", __func__);
+}
+
+static void setup_blend_stage(const struct b2r2_blt_request *req,
+			      struct b2r2_node *node,
+			      struct b2r2_work_buf *bg_buf,
+			      struct b2r2_work_buf *fg_buf)
+{
+	u32 global_alpha = req->user_req.global_alpha;
+	b2r2_log_info("%s ENTRY\n", __func__);
+
+	node->node.GROUP0.B2R2_ACK = 0;
+
+	if (req->user_req.flags &
+			(B2R2_BLT_FLAG_GLOBAL_ALPHA_BLEND |
+			B2R2_BLT_FLAG_PER_PIXEL_ALPHA_BLEND)) {
+		/* Some kind of blending needs to be done. */
+		if ((req->user_req.flags & B2R2_BLT_FLAG_SRC_IS_NOT_PREMULT) != 0)
+			node->node.GROUP0.B2R2_ACK |= B2R2_ACK_MODE_BLEND_NOT_PREMULT;
+		else
+			node->node.GROUP0.B2R2_ACK |= B2R2_ACK_MODE_BLEND_PREMULT;
+
+		/*
+		 * global_alpha register accepts 0..128 range,
+		 * global_alpha in the request is 0..255, remap needed.
+		 */
+		if ((req->user_req.flags & B2R2_BLT_FLAG_GLOBAL_ALPHA_BLEND) != 0) {
+			if (global_alpha == 255)
+				global_alpha = 128;
+			else
+				global_alpha >>= 1;
+		} else {
+			/*
+			 * Use solid global_alpha
+			 * if global alpha blending is not set.
+			 */
+			global_alpha = 128;
+		}
+
+		node->node.GROUP0.B2R2_ACK |=
+			global_alpha << (B2R2_ACK_GALPHA_ROPID_SHIFT);
+
+		/* Set background on SRC1 channel */
+		node->node.GROUP3.B2R2_SBA = bg_buf->phys_addr;
+		node->node.GROUP3.B2R2_STY =
+			(B2R2_GENERIC_WORK_BUF_PITCH << B2R2_TY_BITMAP_PITCH_SHIFT) |
+			B2R2_GENERIC_WORK_BUF_FMT |
+			B2R2_TY_ALPHA_RANGE_255 |
+			B2R2_TY_HSO_LEFT_TO_RIGHT |
+			B2R2_TY_VSO_TOP_TO_BOTTOM;
+
+		/* Set foreground on SRC2 channel */
+		node->node.GROUP4.B2R2_SBA = fg_buf->phys_addr;
+		node->node.GROUP4.B2R2_STY =
+			(B2R2_GENERIC_WORK_BUF_PITCH << B2R2_TY_BITMAP_PITCH_SHIFT) |
+			B2R2_GENERIC_WORK_BUF_FMT |
+			B2R2_TY_ALPHA_RANGE_255 |
+			B2R2_TY_HSO_LEFT_TO_RIGHT |
+			B2R2_TY_VSO_TOP_TO_BOTTOM;
+
+		/* Set target buffer */
+		node->node.GROUP1.B2R2_TBA = bg_buf->phys_addr;
+		node->node.GROUP1.B2R2_TTY =
+			(B2R2_GENERIC_WORK_BUF_PITCH << B2R2_TY_BITMAP_PITCH_SHIFT) |
+			B2R2_GENERIC_WORK_BUF_FMT |
+			B2R2_TY_ALPHA_RANGE_255 |
+			B2R2_TY_HSO_LEFT_TO_RIGHT |
+			B2R2_TY_VSO_TOP_TO_BOTTOM;
+
+		node->node.GROUP0.B2R2_INS |=
+			B2R2_INS_SOURCE_1_FETCH_FROM_MEM |
+			B2R2_INS_SOURCE_2_FETCH_FROM_MEM;
+		node->node.GROUP0.B2R2_CIC |= B2R2_CIC_SOURCE_1 | B2R2_CIC_SOURCE_2;
+	} else {
+		/*
+		 * No blending, foreground goes on SRC2. No global alpha.
+		 * EMACSOC TODO: The blending stage should be skipped altogether
+		 * if no blending is to be done. Probably could go directly from
+		 * transform to writeback.
+		 */
+		node->node.GROUP0.B2R2_ACK |= B2R2_ACK_MODE_BYPASS_S2_S3;
+		node->node.GROUP0.B2R2_INS |=
+			B2R2_INS_SOURCE_2_FETCH_FROM_MEM;
+		node->node.GROUP0.B2R2_CIC |= B2R2_CIC_SOURCE_2;
+
+		node->node.GROUP4.B2R2_SBA = fg_buf->phys_addr;
+		node->node.GROUP4.B2R2_STY =
+			(B2R2_GENERIC_WORK_BUF_PITCH << B2R2_TY_BITMAP_PITCH_SHIFT) |
+			B2R2_GENERIC_WORK_BUF_FMT |
+			B2R2_TY_ALPHA_RANGE_255 |
+			B2R2_TY_HSO_LEFT_TO_RIGHT |
+			B2R2_TY_VSO_TOP_TO_BOTTOM;
+
+		node->node.GROUP1.B2R2_TBA = bg_buf->phys_addr;
+		node->node.GROUP1.B2R2_TTY =
+			(B2R2_GENERIC_WORK_BUF_PITCH << B2R2_TY_BITMAP_PITCH_SHIFT) |
+			B2R2_GENERIC_WORK_BUF_FMT |
+			B2R2_TY_ALPHA_RANGE_255 |
+			B2R2_TY_HSO_LEFT_TO_RIGHT |
+			B2R2_TY_VSO_TOP_TO_BOTTOM;
+	}
+
+	b2r2_log_info("%s DONE\n", __func__);
+}
+
+static void setup_writeback_stage(const struct b2r2_blt_request *req,
+				  struct b2r2_node *node,
+				  struct b2r2_work_buf *in_buf)
+{
+	const struct b2r2_blt_img *dst_img = &(req->user_req.dst_img);
+	const enum b2r2_blt_fmt dst_fmt = dst_img->fmt;
+	const bool yuv_planar_dst =
+		dst_fmt == B2R2_BLT_FMT_YUV420_PACKED_PLANAR ||
+		dst_fmt == B2R2_BLT_FMT_YUV422_PACKED_PLANAR ||
+		dst_fmt == B2R2_BLT_FMT_YUV444_PACKED_PLANAR;
+
+	const bool yuv_semi_planar_dst =
+		dst_fmt == B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR ||
+		dst_fmt == B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR ||
+		dst_fmt == B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE ||
+		dst_fmt == B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE;
+
+	const u32 group4_b2r2_sty =
+		(B2R2_GENERIC_WORK_BUF_PITCH << B2R2_TY_BITMAP_PITCH_SHIFT) |
+		B2R2_GENERIC_WORK_BUF_FMT |
+		B2R2_TY_ALPHA_RANGE_255 |
+		B2R2_TY_HSO_LEFT_TO_RIGHT |
+		B2R2_TY_VSO_TOP_TO_BOTTOM;
+
+	u32 dst_dither = 0;
+	u32 dst_pitch = 0;
+
+	b2r2_log_info("%s ENTRY\n", __func__);
+
+	if (dst_img->pitch == 0) {
+		/* Determine pitch based on format and width of the image. */
+		dst_pitch = get_pitch(dst_img->fmt, dst_img->width);
+	} else
+		dst_pitch = dst_img->pitch;
+
+	if ((req->user_req.flags & B2R2_BLT_FLAG_DITHER) != 0)
+		dst_dither = B2R2_TTY_RGB_ROUND_DITHER;
+
+	/* Set target buffer(s) */
+	if (yuv_planar_dst) {
+		/*
+		 * three nodes required to write the output.
+		 * Luma, blue chroma and red chroma.
+		 */
+		u32 fctl = 0;
+		u32 rsf = 0;
+		const u32 group0_b2r2_ins =
+			B2R2_INS_SOURCE_2_FETCH_FROM_MEM |
+			B2R2_INS_RECT_CLIP_ENABLED |
+			B2R2_INS_IVMX_ENABLED;
+		const u32 group0_b2r2_cic =
+			B2R2_CIC_SOURCE_2 |
+			B2R2_CIC_CLIP_WINDOW |
+			B2R2_CIC_IVMX;
+
+		u32 cb_addr = req->dst_resolved.physical_address +
+			dst_pitch * dst_img->height;
+		u32 cr_addr = 0;
+		u32 chroma_pitch = 0;
+		enum b2r2_native_fmt dst_native_fmt =
+				to_native_fmt(dst_img->fmt);
+		enum b2r2_ty alpha_range = get_alpha_range(dst_img->fmt);
+
+		switch (dst_fmt) {
+		case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
+			chroma_pitch = dst_pitch >> 1;
+			cr_addr =
+				cb_addr + chroma_pitch * (dst_img->height >> 1);
+			/*
+			 * Chrominance is always half the luminance size
+			 * so chrominance resizer is always active.
+			 */
+			fctl |= B2R2_FCTL_HF2D_MODE_ENABLE_RESIZER |
+					B2R2_FCTL_VF2D_MODE_ENABLE_RESIZER;
+
+			rsf &= ~(0xffff << B2R2_RSF_HSRC_INC_SHIFT);
+			rsf |= (2 << 10) << B2R2_RSF_HSRC_INC_SHIFT;
+			rsf &= ~(0xffff << B2R2_RSF_VSRC_INC_SHIFT);
+			rsf |= (2 << 10) << B2R2_RSF_VSRC_INC_SHIFT;
+			break;
+		case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:
+			chroma_pitch = dst_pitch >> 1;
+			cr_addr =
+				cb_addr + chroma_pitch * dst_img->height;
+			/*
+			 * YUV422
+			 * Chrominance is always half the luminance size
+			 * only in horizontal direction.
+			 */
+			fctl |= B2R2_FCTL_HF2D_MODE_ENABLE_RESIZER;
+
+			rsf &= ~(0xffff << B2R2_RSF_HSRC_INC_SHIFT);
+			rsf |= (2 << 10) << B2R2_RSF_HSRC_INC_SHIFT;
+			rsf &= ~(0xffff << B2R2_RSF_VSRC_INC_SHIFT);
+			rsf |= (1 << 10) << B2R2_RSF_VSRC_INC_SHIFT;
+			break;
+		case B2R2_BLT_FMT_YUV444_PACKED_PLANAR:
+			chroma_pitch = dst_pitch;
+			cr_addr =
+				cb_addr + chroma_pitch * dst_img->height;
+			/*
+			 * No scaling required since
+			 * chrominance is not subsampled.
+			 */
+		default:
+			break;
+		}
+
+		/* Luma (Y-component) */
+		node->node.GROUP1.B2R2_TBA = req->dst_resolved.physical_address;
+		node->node.GROUP1.B2R2_TTY =
+			(dst_pitch << B2R2_TY_BITMAP_PITCH_SHIFT) |
+			dst_native_fmt | alpha_range |
+			B2R2_TY_HSO_LEFT_TO_RIGHT |
+			B2R2_TY_VSO_TOP_TO_BOTTOM |
+			dst_dither;
+
+		node->node.GROUP15.B2R2_VMX0 = B2R2_VMX0_RGB_TO_YUV_601_VIDEO;
+		node->node.GROUP15.B2R2_VMX1 = B2R2_VMX1_RGB_TO_YUV_601_VIDEO;
+		node->node.GROUP15.B2R2_VMX2 = B2R2_VMX2_RGB_TO_YUV_601_VIDEO;
+		node->node.GROUP15.B2R2_VMX3 = B2R2_VMX3_RGB_TO_YUV_601_VIDEO;
+
+		 /* bypass ALU, no blending here. Handled in its own stage. */
+		node->node.GROUP0.B2R2_ACK = B2R2_ACK_MODE_BYPASS_S2_S3;
+		node->node.GROUP0.B2R2_INS = group0_b2r2_ins;
+		node->node.GROUP0.B2R2_CIC |= group0_b2r2_cic;
+
+		/* Set source buffer on SRC2 channel */
+		node->node.GROUP4.B2R2_SBA = in_buf->phys_addr;
+		node->node.GROUP4.B2R2_STY = group4_b2r2_sty;
+
+		/* Blue chroma (U-component)*/
+		node = node->next;
+		node->node.GROUP1.B2R2_TBA = cb_addr;
+		node->node.GROUP1.B2R2_TTY =
+			(chroma_pitch << B2R2_TY_BITMAP_PITCH_SHIFT) |
+			dst_native_fmt | alpha_range |
+			B2R2_TY_HSO_LEFT_TO_RIGHT |
+			B2R2_TY_VSO_TOP_TO_BOTTOM |
+			dst_dither |
+			B2R2_TTY_CHROMA_NOT_LUMA;
+
+		node->node.GROUP15.B2R2_VMX0 = B2R2_VMX0_RGB_TO_YUV_601_VIDEO;
+		node->node.GROUP15.B2R2_VMX1 = B2R2_VMX1_RGB_TO_YUV_601_VIDEO;
+		node->node.GROUP15.B2R2_VMX2 = B2R2_VMX2_RGB_TO_YUV_601_VIDEO;
+		node->node.GROUP15.B2R2_VMX3 = B2R2_VMX3_RGB_TO_YUV_601_VIDEO;
+
+		node->node.GROUP0.B2R2_ACK = B2R2_ACK_MODE_BYPASS_S2_S3;
+		node->node.GROUP0.B2R2_INS = group0_b2r2_ins;
+		node->node.GROUP0.B2R2_CIC |= group0_b2r2_cic;
+		if (dst_fmt != B2R2_BLT_FMT_YUV444_PACKED_PLANAR) {
+			node->node.GROUP0.B2R2_INS |= B2R2_INS_RESCALE2D_ENABLED;
+			node->node.GROUP0.B2R2_CIC |= B2R2_CIC_FILTER_CONTROL |
+				B2R2_CIC_RESIZE_CHROMA;
+			/* Set the filter control and rescale registers */
+			node->node.GROUP8.B2R2_FCTL = fctl;
+			node->node.GROUP9.B2R2_RSF = rsf;
+			node->node.GROUP9.B2R2_RZI =
+				B2R2_RZI_DEFAULT_HNB_REPEAT |
+				(2 << B2R2_RZI_VNB_REPEAT_SHIFT);
+		}
+
+		node->node.GROUP4.B2R2_SBA = in_buf->phys_addr;
+		node->node.GROUP4.B2R2_STY = group4_b2r2_sty;
+
+
+		/*
+		 * Red chroma (V-component)
+		 * The flag B2R2_TTY_CB_NOT_CR actually works
+		 * the other way around, i.e. as if it was
+		 * CR_NOT_CB.
+		 */
+		node = node->next;
+		node->node.GROUP1.B2R2_TBA = cr_addr;
+		node->node.GROUP1.B2R2_TTY =
+			(chroma_pitch << B2R2_TY_BITMAP_PITCH_SHIFT) |
+			dst_native_fmt | alpha_range |
+			B2R2_TTY_CB_NOT_CR |
+			B2R2_TY_HSO_LEFT_TO_RIGHT |
+			B2R2_TY_VSO_TOP_TO_BOTTOM |
+			dst_dither |
+			B2R2_TTY_CHROMA_NOT_LUMA;
+
+		node->node.GROUP15.B2R2_VMX0 = B2R2_VMX0_RGB_TO_YUV_601_VIDEO;
+		node->node.GROUP15.B2R2_VMX1 = B2R2_VMX1_RGB_TO_YUV_601_VIDEO;
+		node->node.GROUP15.B2R2_VMX2 = B2R2_VMX2_RGB_TO_YUV_601_VIDEO;
+		node->node.GROUP15.B2R2_VMX3 = B2R2_VMX3_RGB_TO_YUV_601_VIDEO;
+
+		node->node.GROUP0.B2R2_ACK = B2R2_ACK_MODE_BYPASS_S2_S3;
+		node->node.GROUP0.B2R2_INS = group0_b2r2_ins;
+		node->node.GROUP0.B2R2_CIC |= group0_b2r2_cic;
+		if (dst_fmt != B2R2_BLT_FMT_YUV444_PACKED_PLANAR) {
+			node->node.GROUP0.B2R2_INS |= B2R2_INS_RESCALE2D_ENABLED;
+			node->node.GROUP0.B2R2_CIC |= B2R2_CIC_FILTER_CONTROL |
+				B2R2_CIC_RESIZE_CHROMA;
+			/* Set the filter control and rescale registers */
+			node->node.GROUP8.B2R2_FCTL = fctl;
+			node->node.GROUP9.B2R2_RSF = rsf;
+			node->node.GROUP9.B2R2_RZI =
+				B2R2_RZI_DEFAULT_HNB_REPEAT |
+				(2 << B2R2_RZI_VNB_REPEAT_SHIFT);
+		}
+
+		node->node.GROUP4.B2R2_SBA = in_buf->phys_addr;
+		node->node.GROUP4.B2R2_STY = group4_b2r2_sty;
+	} else if (yuv_semi_planar_dst) {
+		/*
+		 * two nodes required to write the output.
+		 * One node for luma and one for interleaved chroma
+		 * components.
+		 */
+		u32 fctl = 0;
+		u32 rsf = 0;
+		const u32 group0_b2r2_ins =
+			B2R2_INS_SOURCE_2_FETCH_FROM_MEM |
+			B2R2_INS_RECT_CLIP_ENABLED |
+			B2R2_INS_IVMX_ENABLED;
+		const u32 group0_b2r2_cic =
+			B2R2_CIC_SOURCE_2 |
+			B2R2_CIC_CLIP_WINDOW |
+			B2R2_CIC_IVMX;
+
+		u32 chroma_addr = req->dst_resolved.physical_address +
+			dst_pitch * dst_img->height;
+		u32 chroma_pitch = dst_pitch;
+		enum b2r2_native_fmt dst_native_fmt =
+				to_native_fmt(dst_img->fmt);
+		enum b2r2_ty alpha_range = get_alpha_range(dst_img->fmt);
+
+		if (dst_fmt == B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR ||
+				dst_fmt == B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE) {
+			/*
+			 * Chrominance is always half the luminance size
+			 * so chrominance resizer is always active.
+			 */
+			fctl |= B2R2_FCTL_HF2D_MODE_ENABLE_RESIZER |
+					B2R2_FCTL_VF2D_MODE_ENABLE_RESIZER;
+
+			rsf &= ~(0xffff << B2R2_RSF_HSRC_INC_SHIFT);
+			rsf |= (2 << 10) << B2R2_RSF_HSRC_INC_SHIFT;
+			rsf &= ~(0xffff << B2R2_RSF_VSRC_INC_SHIFT);
+			rsf |= (2 << 10) << B2R2_RSF_VSRC_INC_SHIFT;
+		} else {
+			/*
+			 * YUV422
+			 * Chrominance is always half the luminance size
+			 * only in horizontal direction.
+			 */
+			fctl |= B2R2_FCTL_HF2D_MODE_ENABLE_RESIZER;
+
+			rsf &= ~(0xffff << B2R2_RSF_HSRC_INC_SHIFT);
+			rsf |= (2 << 10) << B2R2_RSF_HSRC_INC_SHIFT;
+			rsf &= ~(0xffff << B2R2_RSF_VSRC_INC_SHIFT);
+			rsf |= (1 << 10) << B2R2_RSF_VSRC_INC_SHIFT;
+		}
+
+		/* Luma (Y-component) */
+		node->node.GROUP1.B2R2_TBA = req->dst_resolved.physical_address;
+		node->node.GROUP1.B2R2_TTY =
+			(dst_pitch << B2R2_TY_BITMAP_PITCH_SHIFT) |
+			dst_native_fmt | alpha_range |
+			B2R2_TY_HSO_LEFT_TO_RIGHT |
+			B2R2_TY_VSO_TOP_TO_BOTTOM |
+			dst_dither;
+
+		node->node.GROUP15.B2R2_VMX0 = B2R2_VMX0_RGB_TO_YUV_601_VIDEO;
+		node->node.GROUP15.B2R2_VMX1 = B2R2_VMX1_RGB_TO_YUV_601_VIDEO;
+		node->node.GROUP15.B2R2_VMX2 = B2R2_VMX2_RGB_TO_YUV_601_VIDEO;
+		node->node.GROUP15.B2R2_VMX3 = B2R2_VMX3_RGB_TO_YUV_601_VIDEO;
+
+		 /* bypass ALU, no blending here. Handled in its own stage. */
+		node->node.GROUP0.B2R2_ACK = B2R2_ACK_MODE_BYPASS_S2_S3;
+		node->node.GROUP0.B2R2_INS = group0_b2r2_ins;
+		node->node.GROUP0.B2R2_CIC |= group0_b2r2_cic;
+
+		/* Set source buffer on SRC2 channel */
+		node->node.GROUP4.B2R2_SBA = in_buf->phys_addr;
+		node->node.GROUP4.B2R2_STY = group4_b2r2_sty;
+
+		/* Chroma (UV-components)*/
+		node = node->next;
+		node->node.GROUP1.B2R2_TBA = chroma_addr;
+		node->node.GROUP1.B2R2_TTY =
+			(chroma_pitch << B2R2_TY_BITMAP_PITCH_SHIFT) |
+			dst_native_fmt | alpha_range |
+			B2R2_TY_HSO_LEFT_TO_RIGHT |
+			B2R2_TY_VSO_TOP_TO_BOTTOM |
+			dst_dither |
+			B2R2_TTY_CHROMA_NOT_LUMA;
+
+		node->node.GROUP15.B2R2_VMX0 = B2R2_VMX0_RGB_TO_YUV_601_VIDEO;
+		node->node.GROUP15.B2R2_VMX1 = B2R2_VMX1_RGB_TO_YUV_601_VIDEO;
+		node->node.GROUP15.B2R2_VMX2 = B2R2_VMX2_RGB_TO_YUV_601_VIDEO;
+		node->node.GROUP15.B2R2_VMX3 = B2R2_VMX3_RGB_TO_YUV_601_VIDEO;
+
+		node->node.GROUP0.B2R2_ACK = B2R2_ACK_MODE_BYPASS_S2_S3;
+		node->node.GROUP0.B2R2_INS =
+			group0_b2r2_ins | B2R2_INS_RESCALE2D_ENABLED;
+		node->node.GROUP0.B2R2_CIC |= group0_b2r2_cic |
+			B2R2_CIC_FILTER_CONTROL |
+			B2R2_CIC_RESIZE_CHROMA;
+
+		/* Set the filter control and rescale registers */
+		node->node.GROUP8.B2R2_FCTL = fctl;
+		node->node.GROUP9.B2R2_RSF = rsf;
+		node->node.GROUP9.B2R2_RZI =
+			B2R2_RZI_DEFAULT_HNB_REPEAT |
+			(2 << B2R2_RZI_VNB_REPEAT_SHIFT);
+
+		node->node.GROUP4.B2R2_SBA = in_buf->phys_addr;
+		node->node.GROUP4.B2R2_STY = group4_b2r2_sty;
+	} else {
+		/* single buffer target */
+
+		/* Set up OVMX */
+		switch (dst_fmt) {
+		case B2R2_BLT_FMT_32_BIT_ABGR8888:
+			node->node.GROUP0.B2R2_INS |= B2R2_INS_OVMX_ENABLED;
+			node->node.GROUP0.B2R2_CIC |= B2R2_CIC_OVMX;
+			node->node.GROUP16.B2R2_VMX0 = B2R2_VMX0_RGB_TO_BGR;
+			node->node.GROUP16.B2R2_VMX1 = B2R2_VMX1_RGB_TO_BGR;
+			node->node.GROUP16.B2R2_VMX2 = B2R2_VMX2_RGB_TO_BGR;
+			node->node.GROUP16.B2R2_VMX3 = B2R2_VMX3_RGB_TO_BGR;
+			break;
+		case B2R2_BLT_FMT_Y_CB_Y_CR:
+			node->node.GROUP0.B2R2_INS |= B2R2_INS_OVMX_ENABLED;
+			node->node.GROUP0.B2R2_CIC |= B2R2_CIC_OVMX;
+			node->node.GROUP16.B2R2_VMX0 = B2R2_VMX0_RGB_TO_YVU_601_VIDEO;
+			node->node.GROUP16.B2R2_VMX1 = B2R2_VMX1_RGB_TO_YVU_601_VIDEO;
+			node->node.GROUP16.B2R2_VMX2 = B2R2_VMX2_RGB_TO_YVU_601_VIDEO;
+			node->node.GROUP16.B2R2_VMX3 = B2R2_VMX3_RGB_TO_YVU_601_VIDEO;
+			break;
+		case B2R2_BLT_FMT_24_BIT_YUV888: /* fall through */
+		case B2R2_BLT_FMT_32_BIT_AYUV8888:
+			node->node.GROUP0.B2R2_INS |= B2R2_INS_OVMX_ENABLED;
+			node->node.GROUP0.B2R2_CIC |= B2R2_CIC_OVMX;
+			node->node.GROUP16.B2R2_VMX0 = B2R2_VMX0_RGB_TO_YUV_601_VIDEO;
+			node->node.GROUP16.B2R2_VMX1 = B2R2_VMX1_RGB_TO_YUV_601_VIDEO;
+			node->node.GROUP16.B2R2_VMX2 = B2R2_VMX2_RGB_TO_YUV_601_VIDEO;
+			node->node.GROUP16.B2R2_VMX3 = B2R2_VMX3_RGB_TO_YUV_601_VIDEO;
+			break;
+		default:
+			break;
+		}
+
+		node->node.GROUP1.B2R2_TBA = req->dst_resolved.physical_address;
+		node->node.GROUP1.B2R2_TTY =
+			(dst_pitch << B2R2_TY_BITMAP_PITCH_SHIFT) |
+			to_native_fmt(dst_img->fmt) |
+			get_alpha_range(dst_img->fmt) |
+			B2R2_TY_HSO_LEFT_TO_RIGHT |
+			B2R2_TY_VSO_TOP_TO_BOTTOM |
+			dst_dither;
+
+		node->node.GROUP0.B2R2_ACK = B2R2_ACK_MODE_BYPASS_S2_S3;
+		node->node.GROUP0.B2R2_INS |=
+			B2R2_INS_SOURCE_2_FETCH_FROM_MEM |
+			B2R2_INS_RECT_CLIP_ENABLED;
+		node->node.GROUP0.B2R2_CIC |=
+			B2R2_CIC_SOURCE_2 | B2R2_CIC_CLIP_WINDOW;
+
+		if (req->user_req.flags & B2R2_BLT_FLAG_SOURCE_COLOR_KEY) {
+			u32 key_color = 0;
+
+			node->node.GROUP0.B2R2_ACK |=
+				B2R2_ACK_CKEY_SEL_SRC_AFTER_CLUT |
+				B2R2_ACK_CKEY_RED_MATCH_IF_BETWEEN |
+				B2R2_ACK_CKEY_GREEN_MATCH_IF_BETWEEN |
+				B2R2_ACK_CKEY_BLUE_MATCH_IF_BETWEEN;
+			node->node.GROUP0.B2R2_INS |= B2R2_INS_CKEY_ENABLED;
+			node->node.GROUP0.B2R2_CIC |= B2R2_CIC_COLOR_KEY;
+
+			key_color = to_RGB888(req->user_req.src_color,
+				req->user_req.src_img.fmt);
+			node->node.GROUP12.B2R2_KEY1 = key_color;
+			node->node.GROUP12.B2R2_KEY2 = key_color;
+		}
+
+		/* Set source buffer on SRC2 channel */
+		node->node.GROUP4.B2R2_SBA = in_buf->phys_addr;
+		node->node.GROUP4.B2R2_STY = group4_b2r2_sty;
+	}
+	/*
+	 * Writeback is the last stage. Terminate the program chain
+	 * to prevent out-of-control B2R2 execution.
+	 */
+	node->node.GROUP0.B2R2_NIP = 0;
+
+	b2r2_log_info("%s DONE\n", __func__);
+}
+
+/*
+ * Public functions
+ */
+void b2r2_generic_init()
+{
+	b2r2_filters_init();
+}
+
+void b2r2_generic_exit(void)
+{
+	b2r2_filters_exit();
+}
+
+int b2r2_generic_analyze(const struct b2r2_blt_request *req,
+			 s32 *work_buf_width,
+			 s32 *work_buf_height,
+			 u32 *work_buf_count,
+			 u32 *node_count)
+{
+	/*
+	 * Need at least 4 nodes, read or fill input, read dst, blend
+	 * and write back the result */
+	u32 n_nodes = 4;
+	/* Need at least 2 bufs, 1 for blend output and 1 for input */
+	u32 n_work_bufs = 2;
+	/* Horizontal and vertical scaling factors in 6.10 fixed point format */
+	s32 h_scf = 1 << 10;
+	s32 v_scf = 1 << 10;
+	enum b2r2_blt_fmt dst_fmt = 0;
+	bool is_src_fill = false;
+	bool yuv_planar_dst;
+	bool yuv_semi_planar_dst;
+
+	struct b2r2_blt_rect src_rect;
+	struct b2r2_blt_rect dst_rect;
+
+	if (req == NULL || work_buf_width == NULL || work_buf_height == NULL ||
+			work_buf_count == NULL || node_count == NULL) {
+		b2r2_log_warn("%s: Invalid in or out pointers:\n"
+			"req=0x%p\n"
+			"work_buf_width=0x%p work_buf_height=0x%p "
+			"work_buf_count=0x%p\n"
+			"node_count=0x%p.\n",
+			__func__,
+			req,
+			work_buf_width, work_buf_height,
+			work_buf_count,
+			node_count);
+		return -EINVAL;
+	}
+
+	dst_fmt = req->user_req.dst_img.fmt;
+
+	is_src_fill = (req->user_req.flags &
+			(B2R2_BLT_FLAG_SOURCE_FILL | B2R2_BLT_FLAG_SOURCE_FILL_RAW)) != 0;
+
+	yuv_planar_dst =
+		dst_fmt == B2R2_BLT_FMT_YUV420_PACKED_PLANAR ||
+		dst_fmt == B2R2_BLT_FMT_YUV422_PACKED_PLANAR ||
+		dst_fmt == B2R2_BLT_FMT_YUV444_PACKED_PLANAR;
+	yuv_semi_planar_dst =
+		dst_fmt == B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR ||
+		dst_fmt == B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR ||
+		dst_fmt == B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE ||
+		dst_fmt == B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE;
+
+	*node_count = 0;
+	*work_buf_width = 0;
+	*work_buf_height = 0;
+	*work_buf_count = 0;
+
+	if (req->user_req.transform & B2R2_BLT_TRANSFORM_CCW_ROT_90) {
+		n_nodes++;
+		n_work_bufs++;
+	}
+
+	if ((yuv_planar_dst || yuv_semi_planar_dst) &&
+			(req->user_req.flags & B2R2_BLT_FLAG_SOURCE_FILL_RAW) != 0) {
+		b2r2_log_warn("%s: Invalid combination: source_fill_raw"
+			" and multi-buffer destination.\n",
+			__func__);
+		return -EINVAL;
+	}
+
+	if ((req->user_req.flags & B2R2_BLT_FLAG_SOURCE_COLOR_KEY) != 0 &&
+			(req->user_req.flags & B2R2_BLT_FLAG_DEST_COLOR_KEY) != 0) {
+		b2r2_log_warn("%s: Invalid combination: source and "
+			"destination color keying.\n", __func__);
+		return -EINVAL;
+	}
+
+	if ((req->user_req.flags &
+			(B2R2_BLT_FLAG_SOURCE_FILL |
+			B2R2_BLT_FLAG_SOURCE_FILL_RAW)) &&
+			(req->user_req.flags &
+			(B2R2_BLT_FLAG_SOURCE_COLOR_KEY |
+			B2R2_BLT_FLAG_DEST_COLOR_KEY))) {
+		b2r2_log_warn("%s: Invalid combination: "
+			"source_fill and color keying.\n",
+			__func__);
+		return -EINVAL;
+	}
+
+	if ((req->user_req.flags &
+			(B2R2_BLT_FLAG_PER_PIXEL_ALPHA_BLEND |
+			B2R2_BLT_FLAG_GLOBAL_ALPHA_BLEND)) &&
+			(req->user_req.flags &
+			(B2R2_BLT_FLAG_DEST_COLOR_KEY |
+			B2R2_BLT_FLAG_SOURCE_COLOR_KEY))) {
+		b2r2_log_warn("%s: Invalid combination: "
+			"blending and color keying.\n",
+			__func__);
+		return -EINVAL;
+	}
+
+	if ((req->user_req.flags & B2R2_BLT_FLAG_SOURCE_MASK) &&
+			(req->user_req.flags &
+			(B2R2_BLT_FLAG_DEST_COLOR_KEY |
+			B2R2_BLT_FLAG_SOURCE_COLOR_KEY))) {
+		b2r2_log_warn("%s: Invalid combination: source mask and "
+			"color keying.\n",
+			__func__);
+		return -EINVAL;
+	}
+
+	if (req->user_req.flags &
+			(B2R2_BLT_FLAG_DEST_COLOR_KEY |
+			B2R2_BLT_FLAG_SOURCE_MASK)) {
+		b2r2_log_warn("%s: Unsupported: source mask, "
+			"destination color keying.\n",
+			__func__);
+		return -ENOSYS;
+	}
+
+	if ((req->user_req.flags & B2R2_BLT_FLAG_SOURCE_MASK)) {
+		enum b2r2_blt_fmt src_fmt = req->user_req.src_img.fmt;
+		bool yuv_src =
+			src_fmt == B2R2_BLT_FMT_Y_CB_Y_CR ||
+			src_fmt == B2R2_BLT_FMT_YUV420_PACKED_PLANAR ||
+			src_fmt == B2R2_BLT_FMT_YUV422_PACKED_PLANAR ||
+			src_fmt == B2R2_BLT_FMT_YUV444_PACKED_PLANAR ||
+			src_fmt == B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR ||
+			src_fmt == B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR ||
+			src_fmt == B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE ||
+			src_fmt == B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE;
+		if (yuv_src || src_fmt == B2R2_BLT_FMT_1_BIT_A1 ||
+				src_fmt == B2R2_BLT_FMT_8_BIT_A8) {
+			b2r2_log_warn("%s: Unsupported: source color keying "
+					"with YUV or pure alpha formats.\n",
+					__func__);
+			return -ENOSYS;
+		}
+	}
+
+	/* Check for invalid dimensions that would hinder scale calculations */
+	src_rect = req->user_req.src_rect;
+	dst_rect = req->user_req.dst_rect;
+	/* Check for invalid src_rect unless src_fill is enabled */
+	if (!is_src_fill && (src_rect.x < 0 || src_rect.y < 0 ||
+		src_rect.x + src_rect.width > req->user_req.src_img.width ||
+		src_rect.y + src_rect.height > req->user_req.src_img.height)) {
+		b2r2_log_warn("%s: src_rect outside src_img:\n"
+			"src(x,y,w,h)=(%d, %d, %d, %d) src_img(w,h)=(%d, %d).\n",
+			__func__,
+			src_rect.x, src_rect.y, src_rect.width, src_rect.height,
+			req->user_req.src_img.width, req->user_req.src_img.height);
+		return -EINVAL;
+	}
+
+	if (!is_src_fill && (src_rect.width <= 0 || src_rect.height <= 0)) {
+		b2r2_log_warn("%s: Invalid source dimensions:\n"
+			"src(w,h)=(%d, %d).\n",
+			__func__,
+			src_rect.width, src_rect.height);
+		return -EINVAL;
+	}
+
+	if (dst_rect.width <= 0 || dst_rect.height <= 0) {
+		b2r2_log_warn("%s: Invalid dest dimensions:\n"
+			"dst(w,h)=(%d, %d).\n",
+			__func__,
+			dst_rect.width, dst_rect.height);
+		return -EINVAL;
+	}
+
+	if ((req->user_req.flags & B2R2_BLT_FLAG_CLUT_COLOR_CORRECTION) &&
+			req->user_req.clut == NULL) {
+		b2r2_log_warn("%s: Invalid request: no table specified "
+			"for CLUT color correction.\n",
+			__func__);
+		return -EINVAL;
+	}
+
+	/* Check for invalid image params */
+	if (!is_src_fill && validate_buf(&(req->user_req.src_img),
+			&(req->src_resolved)))
+		return -EINVAL;
+
+	if (validate_buf(&(req->user_req.dst_img), &(req->dst_resolved)))
+		return -EINVAL;
+
+	if (is_src_fill) {
+		/*
+		 * Params correct for a source fill operation.
+		 * No need for further checking.
+		 */
+		if (yuv_planar_dst)
+			n_nodes += 2;
+		else if (yuv_semi_planar_dst)
+			n_nodes++;
+
+		*work_buf_width = B2R2_GENERIC_WORK_BUF_WIDTH;
+		*work_buf_height = B2R2_GENERIC_WORK_BUF_HEIGHT;
+		*work_buf_count = n_work_bufs;
+		*node_count = n_nodes;
+		b2r2_log_info("%s DONE buf_w=%d buf_h=%d buf_count=%d "
+			"node_count=%d\n",
+			__func__,
+			*work_buf_width, *work_buf_height,
+			*work_buf_count, *node_count);
+		return 0;
+	}
+
+	/*
+	 * Calculate scaling factors, all transform enum values
+	 * that include rotation have the CCW_ROT_90 bit set.
+	 */
+	if (req->user_req.transform & B2R2_BLT_TRANSFORM_CCW_ROT_90) {
+		h_scf = (src_rect.width << 10) / dst_rect.height;
+		v_scf = (src_rect.height << 10) / dst_rect.width;
+	} else {
+		h_scf = (src_rect.width << 10) / dst_rect.width;
+		v_scf = (src_rect.height << 10) / dst_rect.height;
+	}
+
+	/* Check for degenerate/out_of_range scaling factors. */
+	if (h_scf <= 0 || v_scf <= 0 || h_scf > 0x7C00 || v_scf > 0x7C00) {
+		b2r2_log_warn("%s: Dimensions result in degenerate or "
+			"out of range scaling:\n"
+			"src(w,h)=(%d, %d) "
+			"dst(w,h)=(%d,%d).\n"
+			"h_scf=0x%.8x, v_scf=0x%.8x\n",
+			__func__,
+			src_rect.width, src_rect.height,
+			dst_rect.width, dst_rect.height,
+			h_scf, v_scf);
+		return -EINVAL;
+	}
+
+	if (yuv_planar_dst)
+		n_nodes += 2;
+	else if (yuv_semi_planar_dst)
+		n_nodes++;
+
+	*work_buf_width = B2R2_GENERIC_WORK_BUF_WIDTH;
+	*work_buf_height = B2R2_GENERIC_WORK_BUF_HEIGHT;
+	*work_buf_count = n_work_bufs;
+	*node_count = n_nodes;
+	b2r2_log_info("%s DONE buf_w=%d buf_h=%d buf_count=%d node_count=%d\n",
+		__func__,
+		*work_buf_width, *work_buf_height, *work_buf_count,
+		*node_count);
+	return 0;
+}
+
+/*
+ *
+ */
+int b2r2_generic_configure(const struct b2r2_blt_request *req,
+			   struct b2r2_node *first,
+			   struct b2r2_work_buf *tmp_bufs,
+			   u32 buf_count)
+{
+	struct b2r2_node *node = NULL;
+	struct b2r2_work_buf *in_buf = NULL;
+	struct b2r2_work_buf *out_buf = NULL;
+	struct b2r2_work_buf *empty_buf = NULL;
+
+#ifdef B2R2_GENERIC_DEBUG
+	u32 needed_bufs = 0;
+	u32 needed_nodes = 0;
+	s32 work_buf_width = 0;
+	s32 work_buf_height = 0;
+	u32 n_nodes = 0;
+	int invalid_req = b2r2_generic_analyze(req, &work_buf_width,
+					       &work_buf_height, &needed_bufs,
+					       &needed_nodes);
+	if (invalid_req < 0) {
+		b2r2_log_warn("%s: Invalid request supplied, ec=%d\n",
+			__func__, invalid_req);
+		return -EINVAL;
+	}
+
+	node = first;
+
+	while (node != NULL) {
+		n_nodes++;
+		node = node->next;
+	}
+	if (n_nodes < needed_nodes) {
+		b2r2_log_warn("%s: Not enough nodes %d < %d.\n",
+			      __func__, n_nodes, needed_nodes);
+		return -EINVAL;
+	}
+
+	if (buf_count < needed_bufs) {
+		b2r2_log_warn("%s: Not enough buffers %d < %d.\n",
+			      __func__, buf_count, needed_bufs);
+		return -EINVAL;
+	}
+
+#endif
+
+	reset_nodes(first);
+	node = first;
+	empty_buf = tmp_bufs;
+	out_buf = empty_buf;
+	empty_buf++;
+	/* Prepare input tile. Color_fill or read from src */
+	setup_input_stage(req, node, out_buf);
+	in_buf = out_buf;
+	out_buf = empty_buf;
+	empty_buf++;
+	node = node->next;
+
+	if ((req->user_req.transform & B2R2_BLT_TRANSFORM_CCW_ROT_90) != 0) {
+		setup_transform_stage(req, node, out_buf, in_buf);
+		node = node->next;
+		in_buf = out_buf;
+		out_buf = empty_buf++;
+	}
+	/* EMACSOC TODO: mask */
+	/*
+	if (req->user_req.flags & B2R2_BLT_FLAG_SOURCE_MASK) {
+		setup_mask_stage(req, node, out_buf, in_buf);
+		node = node->next;
+		in_buf = out_buf;
+		out_buf = empty_buf++;
+	}
+	*/
+	/* Read the part of destination that will be updated */
+	setup_dst_read_stage(req, node, out_buf);
+	node = node->next;
+	setup_blend_stage(req, node, out_buf, in_buf);
+	node = node->next;
+	in_buf = out_buf;
+	setup_writeback_stage(req, node, in_buf);
+	return 0;
+}
+
+void b2r2_generic_set_areas(const struct b2r2_blt_request *req,
+			    struct b2r2_node *first,
+			    struct b2r2_blt_rect *dst_rect_area)
+{
+	/*
+	 * Nodes come in the following order: <input stage>, [transform],
+	 * [src_mask], <dst_read>, <blend>, <writeback>
+	 */
+	struct b2r2_node *node = first;
+	const struct b2r2_blt_rect *dst_rect = &(req->user_req.dst_rect);
+	const struct b2r2_blt_rect *src_rect = &(req->user_req.src_rect);
+	const enum b2r2_blt_fmt src_fmt = req->user_req.src_img.fmt;
+	bool yuv_multi_buffer_src =
+		src_fmt == B2R2_BLT_FMT_YUV420_PACKED_PLANAR ||
+		src_fmt == B2R2_BLT_FMT_YUV422_PACKED_PLANAR ||
+		src_fmt == B2R2_BLT_FMT_YUV444_PACKED_PLANAR ||
+		src_fmt == B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR ||
+		src_fmt == B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR ||
+		src_fmt == B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE ||
+		src_fmt == B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE;
+	const enum b2r2_blt_fmt dst_fmt = req->user_req.dst_img.fmt;
+	const bool yuv_multi_buffer_dst =
+		dst_fmt == B2R2_BLT_FMT_YUV420_PACKED_PLANAR ||
+		dst_fmt == B2R2_BLT_FMT_YUV422_PACKED_PLANAR ||
+		dst_fmt == B2R2_BLT_FMT_YUV444_PACKED_PLANAR ||
+		dst_fmt == B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR ||
+		dst_fmt == B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR ||
+		dst_fmt == B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE ||
+		dst_fmt == B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE;
+	s32 h_scf = 1 << 10;
+	s32 v_scf = 1 << 10;
+	s32 src_x = 0;
+	s32 src_y = 0;
+	s32 src_w = 0;
+	s32 src_h = 0;
+	u32 b2r2_rzi = 0;
+	s32 clip_top = 0;
+	s32 clip_left = 0;
+	s32 clip_bottom = req->user_req.dst_img.height - 1;
+	s32 clip_right = req->user_req.dst_img.width - 1;
+	/* Dst coords inside the dst_rect, not the buffer */
+	s32 dst_x = dst_rect_area->x;
+	s32 dst_y = dst_rect_area->y;
+
+	b2r2_log_info("%s ENTRY\n", __func__);
+
+	if (req->user_req.transform & B2R2_BLT_TRANSFORM_CCW_ROT_90) {
+		h_scf = (src_rect->width << 10) / dst_rect->height;
+		v_scf = (src_rect->height << 10) / dst_rect->width;
+	} else {
+		h_scf = (src_rect->width << 10) / dst_rect->width;
+		v_scf = (src_rect->height << 10) / dst_rect->height;
+	}
+
+	if (req->user_req.transform & B2R2_BLT_TRANSFORM_CCW_ROT_90) {
+		/*
+		 * Normally the inverse transform for 90 degree rotation is given by
+		 * | 0  1|   |x|   | y|
+		 * |     | X | | = |  |
+		 * |-1  0|   |y|   |-x|
+		 * but screen coordinates are flipped in y direction
+		 * (compared to usual Cartesian coordinates), hence the offsets.
+		 */
+		src_x = (dst_rect->height - dst_y - dst_rect_area->height) * h_scf;
+		src_y = dst_x * v_scf;
+		src_w = dst_rect_area->height * h_scf;
+		src_h = dst_rect_area->width * v_scf;
+	} else {
+		src_x = dst_x * h_scf;
+		src_y = dst_y * v_scf;
+		src_w = dst_rect_area->width * h_scf;
+		src_h = dst_rect_area->height * v_scf;
+	}
+
+	b2r2_rzi |= ((src_x & 0x3ff) << B2R2_RZI_HSRC_INIT_SHIFT) |
+		((src_y & 0x3ff) << B2R2_RZI_VSRC_INIT_SHIFT);
+
+	/*
+	 * src_w must contain all the pixels that contribute
+	 * to a particular tile.
+	 * ((x + 0x3ff) >> 10) is equivalent to ceiling(x),
+	 * expressed in 6.10 fixed point format.
+	 * Every destination tile, maps to a certain area in the source
+	 * rectangle. The area in source will most likely not be a rectangle
+	 * with exact integer dimensions whenever arbitrary scaling is involved.
+	 * Consider the following example.
+	 * Suppose, that width of the current destination tile maps
+	 * to 1.7 pixels in source, starting at x == 5.4, as calculated
+	 * using the scaling factor.
+	 * This means that while the destination tile is written,
+	 * the source should be read from x == 5.4 up to x == 5.4 + 1.7 == 7.1
+	 * Consequently, color from 3 pixels (x == 5, 6 and 7)
+	 * needs to be read from source.
+	 * The formula below the comment yields:
+	 * ceil(0.4 + 1.7) == ceil(2.1) == 3
+	 * (src_x & 0x3ff) is the fractional part of src_x,
+	 * which is expressed in 6.10 fixed point format.
+	 * Thus, width of the source area should be 3 pixels wide,
+	 * starting at x == 5.
+	 * However, the reading should not start at x == 5.0
+	 * but a bit inside, namely x == 5.4
+	 * The B2R2_RZI register is used to instruct the HW to do so.
+	 * It contains the fractional part that will be added to
+	 * the first pixel coordinate, before incrementing the current source
+	 * coordinate with the step specified in B2R2_RSF register.
+	 * The same applies to scaling in vertical direction.
+	 */
+	src_w = ((src_x & 0x3ff) + src_w + 0x3ff) >> 10;
+	src_h = ((src_y & 0x3ff) + src_h + 0x3ff) >> 10;
+
+	/*
+	 * EMACSOC TODO: Remove this debug clamp, once tile size
+	 * is taken into account in generic_analyze()
+	 */
+	if (src_w > 128)
+		src_w = 128;
+
+	src_x >>= 10;
+	src_y >>= 10;
+
+	if (req->user_req.transform & B2R2_BLT_TRANSFORM_FLIP_H)
+		src_x = src_rect->width - src_x - src_w;
+
+	if (req->user_req.transform & B2R2_BLT_TRANSFORM_FLIP_V)
+		src_y = src_rect->height - src_y - src_h;
+
+	/*
+	 * Translate the src/dst_rect coordinates into true
+	 * src/dst_buffer coordinates
+	 */
+	src_x += src_rect->x;
+	src_y += src_rect->y;
+
+	dst_x += dst_rect->x;
+	dst_y += dst_rect->y;
+
+	/*
+	 * Clamp the src coords to buffer dimensions
+	 * to prevent illegal reads.
+	 */
+	if (src_x < 0)
+		src_x = 0;
+
+	if (src_y < 0)
+		src_y = 0;
+
+	if ((src_x + src_w) > req->user_req.src_img.width)
+		src_w = req->user_req.src_img.width - src_x;
+
+	if ((src_y + src_h) > req->user_req.src_img.height)
+		src_h = req->user_req.src_img.height - src_y;
+
+
+	/* The input node */
+	if (yuv_multi_buffer_src) {
+		/* Luma on SRC3 */
+		node->node.GROUP5.B2R2_SXY =
+			((src_x & 0xffff) << B2R2_XY_X_SHIFT) |
+			((src_y & 0xffff) << B2R2_XY_Y_SHIFT);
+		node->node.GROUP5.B2R2_SSZ =
+			((src_w & 0xfff) << B2R2_SZ_WIDTH_SHIFT) |
+			((src_h & 0xfff) << B2R2_SZ_HEIGHT_SHIFT);
+
+		/* Clear and set only the SRC_INIT bits */
+		node->node.GROUP10.B2R2_RZI &=
+			~((0x3ff << B2R2_RZI_HSRC_INIT_SHIFT) |
+			(0x3ff << B2R2_RZI_VSRC_INIT_SHIFT));
+		node->node.GROUP10.B2R2_RZI |= b2r2_rzi;
+
+		node->node.GROUP9.B2R2_RZI &=
+			~((0x3ff << B2R2_RZI_HSRC_INIT_SHIFT) |
+			(0x3ff << B2R2_RZI_VSRC_INIT_SHIFT));
+		switch (src_fmt) {
+		case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
+		case B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR:
+		case B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE:
+			/*
+			 * Chroma goes on SRC2 and potentially on SRC1.
+			 * Chroma is half the size of luma. Must round up
+			 * the chroma size to handle cases when luma size is not
+			 * divisible by 2.
+			 * E.g. luma width==7 requires chroma width==4.
+			 * Chroma width==7/2==3 is only enough
+			 * for luma width==6.
+			 */
+			node->node.GROUP4.B2R2_SXY =
+				(((src_x & 0xffff) >> 1) << B2R2_XY_X_SHIFT) |
+				(((src_y & 0xffff) >> 1) << B2R2_XY_Y_SHIFT);
+			node->node.GROUP4.B2R2_SSZ =
+				((((src_w + 1) & 0xfff) >> 1) << B2R2_SZ_WIDTH_SHIFT) |
+				((((src_h + 1) & 0xfff) >> 1) << B2R2_SZ_HEIGHT_SHIFT);
+			if (src_fmt == B2R2_BLT_FMT_YUV420_PACKED_PLANAR) {
+				node->node.GROUP3.B2R2_SXY = node->node.GROUP4.B2R2_SXY;
+				node->node.GROUP3.B2R2_SSZ = node->node.GROUP4.B2R2_SSZ;
+			}
+			node->node.GROUP9.B2R2_RZI |= (b2r2_rzi >> 1) &
+				((0x3ff << B2R2_RZI_HSRC_INIT_SHIFT) |
+				 (0x3ff << B2R2_RZI_VSRC_INIT_SHIFT));
+			break;
+		case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:
+		case B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR:
+		case B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE:
+			/*
+			 * Chroma goes on SRC2 and potentially on SRC1.
+			 * Now chroma is half the size of luma
+			 * only in horizontal direction.
+			 * Same rounding applies as for 420 formats above,
+			 * except it is only done horizontally.
+			 */
+			node->node.GROUP4.B2R2_SXY =
+				(((src_x & 0xffff) >> 1) << B2R2_XY_X_SHIFT) |
+				((src_y & 0xffff) << B2R2_XY_Y_SHIFT);
+			node->node.GROUP4.B2R2_SSZ =
+				((((src_w + 1) & 0xfff) >> 1) << B2R2_SZ_WIDTH_SHIFT) |
+				((src_h & 0xfff) << B2R2_SZ_HEIGHT_SHIFT);
+			if (src_fmt == B2R2_BLT_FMT_YUV422_PACKED_PLANAR) {
+				node->node.GROUP3.B2R2_SXY = node->node.GROUP4.B2R2_SXY;
+				node->node.GROUP3.B2R2_SSZ = node->node.GROUP4.B2R2_SSZ;
+			}
+			node->node.GROUP9.B2R2_RZI |=
+				(((src_x & 0x3ff) >> 1) << B2R2_RZI_HSRC_INIT_SHIFT) |
+				((src_y & 0x3ff) << B2R2_RZI_VSRC_INIT_SHIFT);
+			break;
+		case B2R2_BLT_FMT_YUV444_PACKED_PLANAR:
+			/*
+			 * Chroma goes on SRC2 and SRC1.
+			 * It is the same size as luma.
+			 */
+			node->node.GROUP4.B2R2_SXY =
+				((src_x & 0xffff) << B2R2_XY_X_SHIFT) |
+				((src_y & 0xffff) << B2R2_XY_Y_SHIFT);
+			node->node.GROUP4.B2R2_SSZ =
+				((src_w & 0xfff) << B2R2_SZ_WIDTH_SHIFT) |
+				((src_h & 0xfff) << B2R2_SZ_HEIGHT_SHIFT);
+			node->node.GROUP3.B2R2_SXY = node->node.GROUP4.B2R2_SXY;
+			node->node.GROUP3.B2R2_SSZ = node->node.GROUP4.B2R2_SSZ;
+
+			/* Clear and set only the SRC_INIT bits */
+			node->node.GROUP9.B2R2_RZI &=
+				~((0x3ff << B2R2_RZI_HSRC_INIT_SHIFT) |
+				  (0x3ff << B2R2_RZI_VSRC_INIT_SHIFT));
+			node->node.GROUP9.B2R2_RZI |= b2r2_rzi;
+			break;
+		default:
+			break;
+		}
+	} else {
+		node->node.GROUP4.B2R2_SXY =
+			((src_x & 0xffff) << B2R2_XY_X_SHIFT) |
+			((src_y & 0xffff) << B2R2_XY_Y_SHIFT);
+		node->node.GROUP4.B2R2_SSZ =
+			((src_w & 0xfff) << B2R2_SZ_WIDTH_SHIFT) |
+			((src_h & 0xfff) << B2R2_SZ_HEIGHT_SHIFT);
+
+		/* Clear and set only the SRC_INIT bits */
+		node->node.GROUP9.B2R2_RZI &=
+			~((0x3ff << B2R2_RZI_HSRC_INIT_SHIFT) |
+			  (0x3ff << B2R2_RZI_VSRC_INIT_SHIFT));
+		node->node.GROUP9.B2R2_RZI |= b2r2_rzi;
+	}
+
+	node->node.GROUP1.B2R2_TXY = 0;
+	if (req->user_req.transform & B2R2_BLT_TRANSFORM_CCW_ROT_90) {
+		/*
+		 * dst_rect_area coordinates are specified
+		 * after potential rotation.
+		 * Input is read before rotation, hence the width and height
+		 * need to be swapped.
+		 * Horizontal and vertical flips are accomplished with
+		 * suitable scanning order while writing
+		 * to the temporary buffer.
+		 */
+		if ((req->user_req.transform & B2R2_BLT_TRANSFORM_FLIP_H) != 0) {
+			node->node.GROUP1.B2R2_TXY |=
+				((dst_rect_area->height - 1) & 0xffff) << B2R2_XY_X_SHIFT;
+		}
+
+		if (req->user_req.transform & B2R2_BLT_TRANSFORM_FLIP_V) {
+			node->node.GROUP1.B2R2_TXY |=
+				((dst_rect_area->width - 1) & 0xffff) << B2R2_XY_Y_SHIFT;
+		}
+
+		node->node.GROUP1.B2R2_TSZ =
+			((dst_rect_area->height & 0xfff) << B2R2_SZ_WIDTH_SHIFT) |
+			((dst_rect_area->width & 0xfff) << B2R2_SZ_HEIGHT_SHIFT);
+	} else {
+		if ((req->user_req.transform & B2R2_BLT_TRANSFORM_FLIP_H) != 0) {
+			node->node.GROUP1.B2R2_TXY |=
+				((dst_rect_area->width - 1) & 0xffff) << B2R2_XY_X_SHIFT;
+		}
+
+		if ((req->user_req.transform & B2R2_BLT_TRANSFORM_FLIP_V) != 0) {
+			node->node.GROUP1.B2R2_TXY |=
+				((dst_rect_area->height - 1) & 0xffff) << B2R2_XY_Y_SHIFT;
+		}
+
+		node->node.GROUP1.B2R2_TSZ =
+			((dst_rect_area->width & 0xfff) << B2R2_SZ_WIDTH_SHIFT) |
+			((dst_rect_area->height & 0xfff) << B2R2_SZ_HEIGHT_SHIFT);
+	}
+
+	if (req->user_req.flags &
+		(B2R2_BLT_FLAG_SOURCE_FILL | B2R2_BLT_FLAG_SOURCE_FILL_RAW)) {
+		/*
+		 * Scan order for source fill should always be left-to-right
+		 * and top-to-bottom. Fill the input tile from top left.
+		 */
+		node->node.GROUP1.B2R2_TXY = 0;
+		node->node.GROUP4.B2R2_SSZ = node->node.GROUP1.B2R2_TSZ;
+	}
+
+	if (B2R2_GENERIC_DEBUG_AREAS && dst_rect_area->x == 0 &&
+			dst_rect_area->y == 0) {
+		dump_nodes(node, false);
+		b2r2_log_debug("%s Input node done.\n", __func__);
+	}
+
+	/* Transform */
+	if ((req->user_req.transform & B2R2_BLT_TRANSFORM_CCW_ROT_90) != 0) {
+		/*
+		 * Transform node operates on temporary buffers.
+		 * Content always at top left, but scanning order
+		 * has to be flipped during rotation.
+		 * Width and height need to be considered as well, since
+		 * a tile may not necessarily be filled completely.
+		 * dst_rect_area dimensions are specified
+		 * after potential rotation.
+		 * Input is read before rotation, hence the width and height
+		 * need to be swapped on src.
+		 */
+		node = node->next;
+
+		node->node.GROUP4.B2R2_SXY = 0;
+		node->node.GROUP4.B2R2_SSZ =
+			((dst_rect_area->height & 0xfff) << B2R2_SZ_WIDTH_SHIFT) |
+			((dst_rect_area->width & 0xfff) << B2R2_SZ_HEIGHT_SHIFT);
+		/* Bottom line written first */
+		node->node.GROUP1.B2R2_TXY =
+			((dst_rect_area->height - 1) & 0xffff) << B2R2_XY_Y_SHIFT;
+
+		node->node.GROUP1.B2R2_TSZ =
+			((dst_rect_area->width & 0xfff) << B2R2_SZ_WIDTH_SHIFT) |
+			((dst_rect_area->height & 0xfff) << B2R2_SZ_HEIGHT_SHIFT);
+
+		if (B2R2_GENERIC_DEBUG_AREAS && dst_rect_area->x == 0 &&
+				dst_rect_area->y == 0) {
+			dump_nodes(node, false);
+			b2r2_log_debug("%s Tranform node done.\n", __func__);
+		}
+	}
+
+	/* Source mask */
+	if (req->user_req.flags & B2R2_BLT_FLAG_SOURCE_MASK) {
+		node = node->next;
+		/*
+		 * Same coords for mask as for the input stage.
+		 * Should the mask be transformed together with source?
+		 * EMACSOC TODO: Apply mask before any
+		 * transform/scaling is done.
+		 * Otherwise it will be dst_ not src_mask.
+		 */
+		if (B2R2_GENERIC_DEBUG_AREAS && dst_rect_area->x == 0 &&
+				dst_rect_area->y == 0) {
+			dump_nodes(node, false);
+			b2r2_log_debug("%s Source mask node done.\n", __func__);
+		}
+	}
+
+	/* dst_read */
+	if (yuv_multi_buffer_dst) {
+		s32 dst_w = dst_rect_area->width;
+		s32 dst_h = dst_rect_area->height;
+		node = node->next;
+		/* Luma on SRC3 */
+		node->node.GROUP5.B2R2_SXY =
+			((dst_x & 0xffff) << B2R2_XY_X_SHIFT) |
+			((dst_y & 0xffff) << B2R2_XY_Y_SHIFT);
+		node->node.GROUP5.B2R2_SSZ =
+			((dst_w & 0xfff) << B2R2_SZ_WIDTH_SHIFT) |
+			((dst_h & 0xfff) << B2R2_SZ_HEIGHT_SHIFT);
+
+		if (dst_fmt == B2R2_BLT_FMT_YUV420_PACKED_PLANAR ||
+				dst_fmt == B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR ||
+				dst_fmt == B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE) {
+			/*
+			 * Chroma goes on SRC2 and potentially on SRC1.
+			 * Chroma is half the size of luma. Must round up
+			 * the chroma size to handle cases when luma size is not
+			 * divisible by 2.
+			 * E.g. luma width==7 requires chroma width==4.
+			 * Chroma width==7/2==3 is only enough
+			 * for luma width==6.
+			 */
+			node->node.GROUP4.B2R2_SXY =
+				(((dst_x & 0xffff) >> 1) << B2R2_XY_X_SHIFT) |
+				(((dst_y & 0xffff) >> 1) << B2R2_XY_Y_SHIFT);
+			node->node.GROUP4.B2R2_SSZ =
+				((((dst_w + 1) & 0xfff) >> 1) << B2R2_SZ_WIDTH_SHIFT) |
+				((((dst_h + 1) & 0xfff) >> 1) << B2R2_SZ_HEIGHT_SHIFT);
+
+			if (dst_fmt == B2R2_BLT_FMT_YUV420_PACKED_PLANAR) {
+				node->node.GROUP3.B2R2_SXY = node->node.GROUP4.B2R2_SXY;
+				node->node.GROUP3.B2R2_SSZ = node->node.GROUP4.B2R2_SSZ;
+			}
+		} else if (dst_fmt == B2R2_BLT_FMT_YUV422_PACKED_PLANAR ||
+				dst_fmt == B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR ||
+				dst_fmt == B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE) {
+			/*
+			 * Chroma goes on SRC2 and potentially on SRC1.
+			 * Now chroma is half the size of luma
+			 * only in horizontal direction.
+			 * Same rounding applies as for 420 formats above,
+			 * except it is only done horizontally.
+			 */
+			node->node.GROUP4.B2R2_SXY =
+				(((dst_x & 0xffff) >> 1) << B2R2_XY_X_SHIFT) |
+				((dst_y & 0xffff) << B2R2_XY_Y_SHIFT);
+			node->node.GROUP4.B2R2_SSZ =
+				((((dst_w + 1) & 0xfff) >> 1) << B2R2_SZ_WIDTH_SHIFT) |
+				((dst_h & 0xfff) << B2R2_SZ_HEIGHT_SHIFT);
+
+			if (dst_fmt == B2R2_BLT_FMT_YUV422_PACKED_PLANAR) {
+				node->node.GROUP3.B2R2_SXY = node->node.GROUP4.B2R2_SXY;
+				node->node.GROUP3.B2R2_SSZ = node->node.GROUP4.B2R2_SSZ;
+			}
+		} else if (dst_fmt == B2R2_BLT_FMT_YUV444_PACKED_PLANAR) {
+			/*
+			 * Chroma goes on SRC2 and SRC1.
+			 * It is the same size as luma.
+			 */
+			node->node.GROUP4.B2R2_SXY = node->node.GROUP5.B2R2_SXY;
+			node->node.GROUP4.B2R2_SSZ = node->node.GROUP5.B2R2_SSZ;
+			node->node.GROUP3.B2R2_SXY = node->node.GROUP5.B2R2_SXY;
+			node->node.GROUP3.B2R2_SSZ = node->node.GROUP5.B2R2_SSZ;
+		}
+
+		node->node.GROUP1.B2R2_TXY = 0;
+		node->node.GROUP1.B2R2_TSZ =
+			((dst_w & 0xfff) << B2R2_SZ_WIDTH_SHIFT) |
+			((dst_h & 0xfff) << B2R2_SZ_HEIGHT_SHIFT);
+	} else {
+		node = node->next;
+		node->node.GROUP4.B2R2_SXY =
+			((dst_x & 0xffff) << B2R2_XY_X_SHIFT) |
+			((dst_y & 0xffff) << B2R2_XY_Y_SHIFT);
+		node->node.GROUP4.B2R2_SSZ =
+			((dst_rect_area->width & 0xfff) << B2R2_SZ_WIDTH_SHIFT) |
+			((dst_rect_area->height & 0xfff) << B2R2_SZ_HEIGHT_SHIFT);
+		node->node.GROUP1.B2R2_TXY = 0;
+		node->node.GROUP1.B2R2_TSZ =
+			((dst_rect_area->width & 0xfff) << B2R2_SZ_WIDTH_SHIFT) |
+			((dst_rect_area->height & 0xfff) << B2R2_SZ_HEIGHT_SHIFT);
+	}
+
+	if (B2R2_GENERIC_DEBUG_AREAS && dst_rect_area->x == 0 &&
+			dst_rect_area->y == 0) {
+		dump_nodes(node, false);
+		b2r2_log_debug("%s dst_read node done.\n", __func__);
+	}
+
+	/* blend */
+	node = node->next;
+	node->node.GROUP3.B2R2_SXY = 0;
+	node->node.GROUP3.B2R2_SSZ =
+		((dst_rect_area->width & 0xfff) << B2R2_SZ_WIDTH_SHIFT) |
+		((dst_rect_area->height & 0xfff) << B2R2_SZ_HEIGHT_SHIFT);
+	/* contents of the foreground temporary buffer always at top left */
+	node->node.GROUP4.B2R2_SXY = 0;
+	node->node.GROUP4.B2R2_SSZ =
+		((dst_rect_area->width & 0xfff) << B2R2_SZ_WIDTH_SHIFT) |
+		((dst_rect_area->height & 0xfff) << B2R2_SZ_HEIGHT_SHIFT);
+
+	node->node.GROUP1.B2R2_TXY = 0;
+	node->node.GROUP1.B2R2_TSZ =
+		((dst_rect_area->width & 0xfff) << B2R2_SZ_WIDTH_SHIFT) |
+		((dst_rect_area->height & 0xfff) << B2R2_SZ_HEIGHT_SHIFT);
+
+	if (B2R2_GENERIC_DEBUG_AREAS && dst_rect_area->x == 0 &&
+			dst_rect_area->y == 0) {
+		dump_nodes(node, false);
+		b2r2_log_debug("%s Blend node done.\n", __func__);
+	}
+
+	/* writeback */
+	node = node->next;
+	if ((req->user_req.flags & B2R2_BLT_FLAG_DESTINATION_CLIP) != 0) {
+		clip_left = req->user_req.dst_clip_rect.x;
+		clip_top = req->user_req.dst_clip_rect.y;
+		clip_right = clip_left + req->user_req.dst_clip_rect.width - 1;
+		clip_bottom = clip_top + req->user_req.dst_clip_rect.height - 1;
+	}
+	/*
+	 * Clamp the dst clip rectangle to buffer dimensions to prevent
+	 * illegal writes. An illegal clip rectangle, e.g. outside the
+	 * buffer will be ignored, resulting in nothing being clipped.
+	 */
+	if (clip_left < 0 || req->user_req.dst_img.width <= clip_left)
+		clip_left = 0;
+
+	if (clip_top < 0 || req->user_req.dst_img.height <= clip_top)
+		clip_top = 0;
+
+	if (clip_right < 0 || req->user_req.dst_img.width <= clip_right)
+		clip_right = req->user_req.dst_img.width - 1;
+
+	if (clip_bottom < 0 || req->user_req.dst_img.height <= clip_bottom)
+		clip_bottom = req->user_req.dst_img.height - 1;
+
+	/*
+	 * Only allow writing inside the clip rect.
+	 * INTNL bit in B2R2_CWO should be zero.
+	 */
+	node->node.GROUP6.B2R2_CWO =
+		((clip_top & 0x7fff) << B2R2_CWO_Y_SHIFT) |
+		((clip_left & 0x7fff) << B2R2_CWO_X_SHIFT);
+	node->node.GROUP6.B2R2_CWS =
+		((clip_bottom & 0x7fff) << B2R2_CWS_Y_SHIFT) |
+		((clip_right & 0x7fff) << B2R2_CWS_X_SHIFT);
+
+	if (yuv_multi_buffer_dst) {
+		const s32 dst_w = dst_rect_area->width;
+		const s32 dst_h = dst_rect_area->height;
+		int i = 0;
+		/* Number of nodes required to write chroma output */
+		int n_nodes = 1;
+		if (dst_fmt == B2R2_BLT_FMT_YUV420_PACKED_PLANAR ||
+				dst_fmt == B2R2_BLT_FMT_YUV422_PACKED_PLANAR ||
+				dst_fmt == B2R2_BLT_FMT_YUV444_PACKED_PLANAR)
+			n_nodes = 2;
+
+		node->node.GROUP4.B2R2_SXY = 0;
+		node->node.GROUP4.B2R2_SSZ =
+			((dst_w & 0xfff) << B2R2_SZ_WIDTH_SHIFT) |
+			((dst_h & 0xfff) << B2R2_SZ_HEIGHT_SHIFT);
+
+		/* Luma (Y-component) */
+		node->node.GROUP1.B2R2_TXY =
+			((dst_x & 0xffff) << B2R2_XY_X_SHIFT) |
+			((dst_y & 0xffff) << B2R2_XY_Y_SHIFT);
+		node->node.GROUP1.B2R2_TSZ =
+			((dst_w & 0xfff) << B2R2_SZ_WIDTH_SHIFT) |
+			((dst_h & 0xfff) << B2R2_SZ_HEIGHT_SHIFT);
+
+		node->node.GROUP6.B2R2_CWO =
+			((clip_top & 0x7fff) << B2R2_CWO_Y_SHIFT) |
+			((clip_left & 0x7fff) << B2R2_CWO_X_SHIFT);
+		node->node.GROUP6.B2R2_CWS =
+			((clip_bottom & 0x7fff) << B2R2_CWS_Y_SHIFT) |
+			((clip_right & 0x7fff) << B2R2_CWS_X_SHIFT);
+
+		if (B2R2_GENERIC_DEBUG_AREAS && dst_rect_area->x == 0 &&
+				dst_rect_area->y == 0) {
+			dump_nodes(node, false);
+			b2r2_log_debug("%s Writeback luma node done.\n",
+				__func__);
+		}
+
+		node = node->next;
+
+		/*
+		 * Chroma components. 1 or 2 nodes
+		 * for semi-planar or planar buffer respectively.
+		 */
+		for (i = 0; i < n_nodes && node != NULL; ++i) {
+
+			node->node.GROUP4.B2R2_SXY = 0;
+			node->node.GROUP4.B2R2_SSZ =
+				((dst_w & 0xfff) << B2R2_SZ_WIDTH_SHIFT) |
+				((dst_h & 0xfff) << B2R2_SZ_HEIGHT_SHIFT);
+
+			switch (dst_fmt) {
+			case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
+			case B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR:
+			case B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE:
+				/*
+				 * Chroma is half the size of luma.
+				 * Must round up the chroma size to handle
+				 * cases when luma size is not divisible by 2.
+				 * E.g. luma_width==7 requires chroma_width==4.
+				 * Chroma_width==7/2==3 is only enough
+				 * for luma_width==6.
+				 */
+				node->node.GROUP1.B2R2_TXY =
+					(((dst_x & 0xffff) >> 1) << B2R2_XY_X_SHIFT) |
+					(((dst_y & 0xffff) >> 1) << B2R2_XY_Y_SHIFT);
+				node->node.GROUP1.B2R2_TSZ =
+					((((dst_w + 1) & 0xfff) >> 1) << B2R2_SZ_WIDTH_SHIFT) |
+					((((dst_h + 1) & 0xfff) >> 1) << B2R2_SZ_HEIGHT_SHIFT);
+				break;
+			case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:
+			case B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR:
+			case B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE:
+				/*
+				 * Now chroma is half the size of luma only
+				 * in horizontal direction.
+				 * Same rounding applies as
+				 * for 420 formats above, except it is only
+				 * done horizontally.
+				 */
+				node->node.GROUP1.B2R2_TXY =
+					(((dst_x & 0xffff) >> 1) << B2R2_XY_X_SHIFT) |
+					((dst_y & 0xffff) << B2R2_XY_Y_SHIFT);
+				node->node.GROUP1.B2R2_TSZ =
+					((((dst_w + 1) & 0xfff) >> 1) << B2R2_SZ_WIDTH_SHIFT) |
+					((dst_h & 0xfff) << B2R2_SZ_HEIGHT_SHIFT);
+				break;
+			case B2R2_BLT_FMT_YUV444_PACKED_PLANAR:
+				/*
+				 * Chroma has the same resolution as luma.
+				 */
+				node->node.GROUP1.B2R2_TXY =
+					((dst_x & 0xffff) << B2R2_XY_X_SHIFT) |
+					((dst_y & 0xffff) << B2R2_XY_Y_SHIFT);
+				node->node.GROUP1.B2R2_TSZ =
+					((dst_w & 0xfff) << B2R2_SZ_WIDTH_SHIFT) |
+					((dst_h & 0xfff) << B2R2_SZ_HEIGHT_SHIFT);
+				break;
+			default:
+				break;
+			}
+
+			node->node.GROUP6.B2R2_CWO =
+				((clip_top & 0x7fff) << B2R2_CWO_Y_SHIFT) |
+				((clip_left & 0x7fff) << B2R2_CWO_X_SHIFT);
+			node->node.GROUP6.B2R2_CWS =
+				((clip_bottom & 0x7fff) << B2R2_CWS_Y_SHIFT) |
+				((clip_right & 0x7fff) << B2R2_CWS_X_SHIFT);
+
+			if (B2R2_GENERIC_DEBUG_AREAS && dst_rect_area->x == 0 &&
+					dst_rect_area->y == 0) {
+				dump_nodes(node, false);
+				b2r2_log_debug("%s Writeback chroma node "
+					"%d of %d done.\n",
+					__func__, i + 1, n_nodes);
+			}
+
+			node = node->next;
+		}
+	} else {
+		node->node.GROUP4.B2R2_SXY = 0;
+		node->node.GROUP4.B2R2_SSZ =
+			((dst_rect_area->width & 0xfff) << B2R2_SZ_WIDTH_SHIFT) |
+			((dst_rect_area->height & 0xfff) << B2R2_SZ_HEIGHT_SHIFT);
+		node->node.GROUP1.B2R2_TXY =
+			((dst_x & 0xffff) << B2R2_XY_X_SHIFT) |
+			((dst_y & 0xffff) << B2R2_XY_Y_SHIFT);
+		node->node.GROUP1.B2R2_TSZ =
+			((dst_rect_area->width & 0xfff) << B2R2_SZ_WIDTH_SHIFT) |
+			((dst_rect_area->height & 0xfff) << B2R2_SZ_HEIGHT_SHIFT);
+
+		if (B2R2_GENERIC_DEBUG_AREAS && dst_rect_area->x == 0 &&
+				dst_rect_area->y == 0) {
+			dump_nodes(node, false);
+			b2r2_log_debug("%s Writeback node done.\n", __func__);
+		}
+	}
+
+	b2r2_log_info("%s DONE\n", __func__);
+}
diff --git a/drivers/video/b2r2/b2r2_generic.h b/drivers/video/b2r2/b2r2_generic.h
new file mode 100644
index 00000000000..d3dbd00ef1e
--- /dev/null
+++ b/drivers/video/b2r2/b2r2_generic.h
@@ -0,0 +1,51 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2010
+ *
+ * ST-Ericsson B2R2 generic. Full coverage of user interface but
+ * non optimized implementation. For Fallback purposes.
+ *
+ * Author: Maciej Socha <maciej.socha@stericsson.com>
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+
+#ifndef _LINUX_VIDEO_B2R2_GENERIC_H
+#define _LINUX_VIDEO_B2R2_GENERIC_H
+
+#include <video/b2r2_blt.h>
+
+#include "b2r2_internal.h"
+
+/**
+ * b2r2_generic_init()
+ */
+void b2r2_generic_init(void);
+
+/**
+ * b2r2_generic_exit()
+ */
+void b2r2_generic_exit(void);
+
+/**
+ * b2r2_generic_analyze()
+ */
+int b2r2_generic_analyze(const struct b2r2_blt_request *req,
+						 s32 *work_buf_width,
+						 s32 *work_buf_height,
+						 u32 *work_buf_count,
+						 u32 *node_count);
+/**
+ * b2r2_generic_configure()
+ */
+int b2r2_generic_configure(const struct b2r2_blt_request *req,
+						   struct b2r2_node *first,
+						   struct b2r2_work_buf *tmp_bufs,
+						   u32 buf_count);
+/**
+ * b2r2_generic_set_areas()
+ */
+void b2r2_generic_set_areas(const struct b2r2_blt_request *req,
+							struct b2r2_node *first,
+							struct b2r2_blt_rect *dst_rect_area);
+#endif
diff --git a/drivers/video/b2r2/b2r2_global.h b/drivers/video/b2r2/b2r2_global.h
new file mode 100644
index 00000000000..38cf74bb753
--- /dev/null
+++ b/drivers/video/b2r2/b2r2_global.h
@@ -0,0 +1,119 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2010
+ *
+ * ST-Ericsson B2R2 global definitions
+ *
+ * Author: Robert Fekete <robert.fekete@stericsson.com>
+ * Author: Paul Wannback
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+
+#ifndef __B2R2_GLOBAL_H
+#define __B2R2_GLOBAL_H
+
+/** Sources involved */
+
+struct b2r2_system {
+	unsigned int B2R2_NIP;
+	unsigned int B2R2_CIC;
+	unsigned int B2R2_INS;
+	unsigned int B2R2_ACK;
+};
+
+struct b2r2_target {
+	unsigned int B2R2_TBA;
+	unsigned int B2R2_TTY;
+	unsigned int B2R2_TXY;
+	unsigned int B2R2_TSZ;
+};
+
+struct b2r2_color_fill {
+	unsigned int  B2R2_S1CF;
+	unsigned int  B2R2_S2CF;
+};
+
+struct b2r2_src_config {
+	unsigned int B2R2_SBA;
+	unsigned int B2R2_STY;
+	unsigned int B2R2_SXY;
+	unsigned int B2R2_SSZ;
+};
+
+struct b2r2_clip {
+	 unsigned int B2R2_CWO;
+	 unsigned int B2R2_CWS;
+};
+
+struct b2r2_color_key {
+	 unsigned int B2R2_KEY1;
+	 unsigned int B2R2_KEY2;
+};
+
+struct b2r2_clut {
+	unsigned int B2R2_CCO;
+	unsigned int B2R2_CML;
+};
+
+struct b2r2_rsz_pl_mask {
+	unsigned int B2R2_FCTL;
+	unsigned int B2R2_PMK;
+};
+
+struct b2r2_Cr_luma_rsz {
+	unsigned int B2R2_RSF;
+	unsigned int B2R2_RZI;
+	unsigned int B2R2_HFP;
+	unsigned int B2R2_VFP;
+};
+
+struct b2r2_flikr_filter {
+	unsigned int B2R2_FF0;
+	unsigned int B2R2_FF1;
+	unsigned int B2R2_FF2;
+	unsigned int B2R2_FF3;
+};
+
+struct b2r2_xyl {
+	unsigned int B2R2_XYL;
+	unsigned int B2R2_XYP;
+};
+
+struct b2r2_sau {
+	unsigned int B2R2_SAR;
+	unsigned int B2R2_USR;
+};
+
+struct b2r2_vm {
+	unsigned int B2R2_VMX0;
+	unsigned int B2R2_VMX1;
+	unsigned int B2R2_VMX2;
+	unsigned int B2R2_VMX3;
+};
+
+struct b2r2_link_list {
+
+	struct b2r2_system       GROUP0;
+	struct b2r2_target 	 GROUP1;
+	struct b2r2_color_fill   GROUP2;
+	struct b2r2_src_config	 GROUP3;
+	struct b2r2_src_config   GROUP4;
+	struct b2r2_src_config   GROUP5;
+	struct b2r2_clip         GROUP6;
+	struct b2r2_clut         GROUP7;
+	struct b2r2_rsz_pl_mask	 GROUP8;
+	struct b2r2_Cr_luma_rsz  GROUP9;
+	struct b2r2_Cr_luma_rsz  GROUP10;
+	struct b2r2_flikr_filter GROUP11;
+	struct b2r2_color_key    GROUP12;
+	struct b2r2_xyl  	 GROUP13;
+	struct b2r2_sau		 GROUP14;
+	struct b2r2_vm		 GROUP15;
+	struct b2r2_vm		 GROUP16;
+
+	unsigned int B2R2_RESERVED[2];
+};
+
+
+#endif /* !defined(__B2R2_GLOBAL_H) */
diff --git a/drivers/video/b2r2/b2r2_hw.h b/drivers/video/b2r2/b2r2_hw.h
new file mode 100644
index 00000000000..2112a34dfe9
--- /dev/null
+++ b/drivers/video/b2r2/b2r2_hw.h
@@ -0,0 +1,637 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2010
+ *
+ * ST-Ericsson B2R2 hw definitions
+ *
+ * Author: Fredrik Allansson <fredrik.allansson@stericsson.com>
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+
+#ifndef B2R2_HW_H__
+#define B2R2_HW_H__
+
+#include <linux/bitops.h>
+
+/* Scaling works in strips 128 pixels wide */
+#define B2R2_RESCALE_MAX_WIDTH 128
+
+/* Rotation works in strips 16 pixels wide */
+#define B2R2_ROTATE_MAX_WIDTH 16
+
+/* B2R2 color formats */
+#define B2R2_COLOR_FORMAT_SHIFT 16
+enum b2r2_native_fmt {
+	/* RGB formats */
+	B2R2_NATIVE_RGB565 = 0x00 << B2R2_COLOR_FORMAT_SHIFT,
+	B2R2_NATIVE_RGB888 = 0x01 << B2R2_COLOR_FORMAT_SHIFT,
+	B2R2_NATIVE_ARGB8565 = 0x04 << B2R2_COLOR_FORMAT_SHIFT,
+	B2R2_NATIVE_ARGB8888 = 0x05 << B2R2_COLOR_FORMAT_SHIFT,
+	B2R2_NATIVE_ARGB1555 = 0x06 << B2R2_COLOR_FORMAT_SHIFT,
+	B2R2_NATIVE_ARGB4444 = 0x07 << B2R2_COLOR_FORMAT_SHIFT,
+
+	/* YCbCr formats */
+	B2R2_NATIVE_YCBCR888 = 0x10 << B2R2_COLOR_FORMAT_SHIFT,
+	B2R2_NATIVE_YCBCR422R = 0x12 << B2R2_COLOR_FORMAT_SHIFT,
+	B2R2_NATIVE_AYCBCR8888 = 0x15 << B2R2_COLOR_FORMAT_SHIFT,
+	B2R2_NATIVE_YCBCR42X_MB = 0x14 << B2R2_COLOR_FORMAT_SHIFT,
+	B2R2_NATIVE_YCBCR42X_R2B = 0x16 << B2R2_COLOR_FORMAT_SHIFT,
+	B2R2_NATIVE_YCBCR42X_MBN = 0x0e << B2R2_COLOR_FORMAT_SHIFT,
+
+	/* CLUT formats */
+	B2R2_NATIVE_CLUT2 = 0x09 << B2R2_COLOR_FORMAT_SHIFT,
+	B2R2_NATIVE_CLUT8 = 0x0b << B2R2_COLOR_FORMAT_SHIFT,
+	B2R2_NATIVE_ACLUT44 = 0x0c << B2R2_COLOR_FORMAT_SHIFT,
+	B2R2_NATIVE_ACLUT88 = 0x0d << B2R2_COLOR_FORMAT_SHIFT,
+
+	/* Misc. formats */
+	B2R2_NATIVE_A1 = 0x18 << B2R2_COLOR_FORMAT_SHIFT,
+	B2R2_NATIVE_A8 = 0x19 << B2R2_COLOR_FORMAT_SHIFT,
+	B2R2_NATIVE_YUV	= 0x1e << B2R2_COLOR_FORMAT_SHIFT,
+	B2R2_NATIVE_BYTE = 0x1f << B2R2_COLOR_FORMAT_SHIFT,
+};
+
+/* B2R2_CIC register values */
+enum b2r2_cic {
+	B2R2_CIC_COLOR_FILL =     BIT(1),/*0x00000002*/
+	B2R2_CIC_SOURCE_1 =       BIT(2),/*0x00000004*/
+	B2R2_CIC_SOURCE_2 =       BIT(3),/*0x00000008*/
+	B2R2_CIC_SOURCE_3 =       BIT(4),/*0x00000010*/
+	B2R2_CIC_CLIP_WINDOW =    BIT(5),/*0x00000020*/
+	B2R2_CIC_CLUT =           BIT(6),/*0x00000040*/
+	B2R2_CIC_FILTER_CONTROL = BIT(7),/*0x00000080*/
+	B2R2_CIC_RESIZE_CHROMA =  BIT(8),/*0x00000100*/
+	B2R2_CIC_RESIZE_LUMA =    BIT(9),/*0x00000200*/
+	B2R2_CIC_FLICKER_COEFF =  BIT(10),/*0x00000400*/
+	B2R2_CIC_COLOR_KEY =      BIT(11),/*0x00000800*/
+	B2R2_CIC_XYL =            BIT(12),/*0x00001000*/
+	B2R2_CIC_SAU =            BIT(13),/*0x00002000*/
+	B2R2_CIC_IVMX =           BIT(14),/*0x00004000*/
+	B2R2_CIC_OVMX =           BIT(15),/*0x00008000*/
+	B2R2_CIC_PACEDOT =        BIT(16),/*0x00010000*/
+	B2R2_CIC_VC1 =            BIT(17)/*0x00020000*/
+};
+
+/* B2R2_INS register values */
+#define B2R2_INS_SOURCE_1_SHIFT 0
+#define B2R2_INS_SOURCE_2_SHIFT 3
+#define B2R2_INS_SOURCE_3_SHIFT 5
+#define B2R2_INS_IVMX_SHIFT 6
+#define B2R2_INS_CLUTOP_SHIFT 7
+#define B2R2_INS_RESCALE2D_SHIFT 8
+#define B2R2_INS_FLICK_FILT_SHIFT 9
+#define B2R2_INS_RECT_CLIP_SHIFT 10
+#define B2R2_INS_CKEY_SHIFT 11
+#define B2R2_INS_OVMX_SHIFT 12
+#define B2R2_INS_DEI_SHIFT 13
+#define B2R2_INS_PLANE_MASK_SHIFT 14
+#define B2R2_INS_XYL_SHIFT 15
+#define B2R2_INS_DOT_SHIFT 16
+#define B2R2_INS_VC1R_SHIFT 17
+#define B2R2_INS_ROTATION_SHIFT 18
+#define B2R2_INS_PACE_DOWN_SHIFT 30
+#define B2R2_INS_BLITCOMPIRQ_SHIFT 31
+enum b2r2_ins {
+	/* Source 1 config */
+	B2R2_INS_SOURCE_1_FETCH_FROM_MEM =      0x1 << B2R2_INS_SOURCE_1_SHIFT,
+	B2R2_INS_SOURCE_1_COLOR_FILL_REGISTER = 0x3 << B2R2_INS_SOURCE_1_SHIFT,
+	B2R2_INS_SOURCE_1_DIRECT_COPY =         0x4 << B2R2_INS_SOURCE_1_SHIFT,
+	B2R2_INS_SOURCE_1_DIRECT_FILL =         0x7 << B2R2_INS_SOURCE_1_SHIFT,
+
+	/* Source 2 config */
+	B2R2_INS_SOURCE_2_FETCH_FROM_MEM =      0x1 << B2R2_INS_SOURCE_2_SHIFT,
+	B2R2_INS_SOURCE_2_COLOR_FILL_REGISTER = 0x3 << B2R2_INS_SOURCE_2_SHIFT,
+
+	/* Source 3 config */
+	B2R2_INS_SOURCE_3_FETCH_FROM_MEM =      0x1 << B2R2_INS_SOURCE_3_SHIFT,
+
+	/* Other configs */
+	B2R2_INS_IVMX_ENABLED =               0x1 << B2R2_INS_IVMX_SHIFT,
+	B2R2_INS_CLUTOP_ENABLED =             0x1 << B2R2_INS_CLUTOP_SHIFT,
+	B2R2_INS_RESCALE2D_ENABLED =          0x1 << B2R2_INS_RESCALE2D_SHIFT,
+	B2R2_INS_FLICK_FILT_ENABLED =         0x1 << B2R2_INS_FLICK_FILT_SHIFT,
+	B2R2_INS_RECT_CLIP_ENABLED =          0x1 << B2R2_INS_RECT_CLIP_SHIFT,
+	B2R2_INS_CKEY_ENABLED =               0x1 << B2R2_INS_CKEY_SHIFT,
+	B2R2_INS_OVMX_ENABLED =               0x1 << B2R2_INS_OVMX_SHIFT,
+	B2R2_INS_DEI_ENABLED =                0x1 << B2R2_INS_DEI_SHIFT,
+	B2R2_INS_PLANE_MASK_ENABLED =         0x1 << B2R2_INS_PLANE_MASK_SHIFT,
+	B2R2_INS_XYL_ENABLED =                0x1 << B2R2_INS_XYL_SHIFT,
+	B2R2_INS_DOT_ENABLED =                0x1 << B2R2_INS_DOT_SHIFT,
+	B2R2_INS_VC1R_ENABLED =               0x1 << B2R2_INS_VC1R_SHIFT,
+	B2R2_INS_ROTATION_ENABLED =           0x1 << B2R2_INS_ROTATION_SHIFT,
+	B2R2_INS_PACE_DOWN_ENABLED =          0x1 << B2R2_INS_PACE_DOWN_SHIFT,
+	B2R2_INS_BLITCOMPIRQ_ENABLED =        0x1 << B2R2_INS_BLITCOMPIRQ_SHIFT,
+
+};
+
+/* B2R2_ACK register values */
+#define B2R2_ACK_MODE_SHIFT 0
+#define B2R2_ACK_SWAP_FG_BG_SHIFT 4
+#define B2R2_ACK_GALPHA_ROPID_SHIFT 8
+#define B2R2_ACK_CKEY_BLUE_SHIFT 16
+#define B2R2_ACK_CKEY_GREEN_SHIFT 18
+#define B2R2_ACK_CKEY_RED_SHIFT 20
+#define B2R2_ACK_CKEY_SEL_SHIFT 22
+enum b2r2_ack {
+	/* ALU operation modes */
+	B2R2_ACK_MODE_LOGICAL_OPERATION =            0x1 << B2R2_ACK_MODE_SHIFT,
+	B2R2_ACK_MODE_BLEND_NOT_PREMULT =            0x2 << B2R2_ACK_MODE_SHIFT,
+	B2R2_ACK_MODE_BLEND_PREMULT =                0x3 << B2R2_ACK_MODE_SHIFT,
+	B2R2_ACK_MODE_CLIPMASK_LOGICAL_FIRST_PASS =  0x4 << B2R2_ACK_MODE_SHIFT,
+	B2R2_ACK_MODE_CLIPMASK_BLEND =               0x5 << B2R2_ACK_MODE_SHIFT,
+	B2R2_ACK_MODE_BYPASS_S2_S3 =                 0x7 << B2R2_ACK_MODE_SHIFT,
+	B2R2_ACK_MODE_CLIPMASK_LOGICAL_SECOND_PASS = 0x8 << B2R2_ACK_MODE_SHIFT,
+	B2R2_ACK_MODE_CLIPMASK_XYL_LOGICAL =         0x9 << B2R2_ACK_MODE_SHIFT,
+	B2R2_ACK_MODE_CLIPMASK_XYL_BLEND_NOT_PREMULT = 0xa << B2R2_ACK_MODE_SHIFT,
+	B2R2_ACK_MODE_CLIPMASK_XYL_BLEND_PREMULT =   0xb << B2R2_ACK_MODE_SHIFT,
+
+	/* ALU channel selection */
+	B2R2_ACK_SWAP_FG_BG =                  0x1 << B2R2_ACK_SWAP_FG_BG_SHIFT,
+
+	/* Global alpha and ROP IDs */
+	B2R2_ACK_ROP_CLEAR =                 0x0 << B2R2_ACK_GALPHA_ROPID_SHIFT,
+	B2R2_ACK_ROP_AND =                   0x1 << B2R2_ACK_GALPHA_ROPID_SHIFT,
+	B2R2_ACK_ROP_AND_REV =               0x2 << B2R2_ACK_GALPHA_ROPID_SHIFT,
+	B2R2_ACK_ROP_COPY =                  0x3 << B2R2_ACK_GALPHA_ROPID_SHIFT,
+	B2R2_ACK_ROP_AND_INV =               0x4 << B2R2_ACK_GALPHA_ROPID_SHIFT,
+	B2R2_ACK_ROP_NOOP =                  0x5 << B2R2_ACK_GALPHA_ROPID_SHIFT,
+	B2R2_ACK_ROP_XOR =                   0x6 << B2R2_ACK_GALPHA_ROPID_SHIFT,
+	B2R2_ACK_ROP_OR =                    0x7 << B2R2_ACK_GALPHA_ROPID_SHIFT,
+	B2R2_ACK_ROP_NOR =                   0x8 << B2R2_ACK_GALPHA_ROPID_SHIFT,
+	B2R2_ACK_ROP_EQUIV =                 0x9 << B2R2_ACK_GALPHA_ROPID_SHIFT,
+	B2R2_ACK_ROP_INVERT =                0xa << B2R2_ACK_GALPHA_ROPID_SHIFT,
+	B2R2_ACK_ROP_OR_REV =                0xb << B2R2_ACK_GALPHA_ROPID_SHIFT,
+	B2R2_ACK_ROP_COPY_INV =              0xc << B2R2_ACK_GALPHA_ROPID_SHIFT,
+	B2R2_ACK_ROP_OR_INV =                0xd << B2R2_ACK_GALPHA_ROPID_SHIFT,
+	B2R2_ACK_ROP_NAND =                  0xe << B2R2_ACK_GALPHA_ROPID_SHIFT,
+	B2R2_ACK_ROP_SET =                   0xf << B2R2_ACK_GALPHA_ROPID_SHIFT,
+
+	/* Color key configuration bits */
+	B2R2_ACK_CKEY_BLUE_MATCH_IF_BETWEEN =  0x1 << B2R2_ACK_CKEY_BLUE_SHIFT,
+	B2R2_ACK_CKEY_BLUE_MATCH_IF_LT_OR_GT = 0x2 << B2R2_ACK_CKEY_BLUE_SHIFT,
+	B2R2_ACK_CKEY_RED_MATCH_IF_BETWEEN =   0x1 << B2R2_ACK_CKEY_GREEN_SHIFT,
+	B2R2_ACK_CKEY_RED_MATCH_IF_LT_OR_GT =  0x2 << B2R2_ACK_CKEY_GREEN_SHIFT,
+	B2R2_ACK_CKEY_GREEN_MATCH_IF_BETWEEN = 0x1 << B2R2_ACK_CKEY_RED_SHIFT,
+	B2R2_ACK_CKEY_GREEN_MATCH_IF_LT_OR_GT = 0x2 << B2R2_ACK_CKEY_RED_SHIFT,
+
+	/* Color key input selection */
+	B2R2_ACK_CKEY_SEL_DEST =               0x0 << B2R2_ACK_CKEY_SEL_SHIFT,
+	B2R2_ACK_CKEY_SEL_SRC_BEFORE_CLUT =    0x1 << B2R2_ACK_CKEY_SEL_SHIFT,
+	B2R2_ACK_CKEY_SEL_SRC_AFTER_CLUT =     0x2 << B2R2_ACK_CKEY_SEL_SHIFT,
+	B2R2_ACK_CKEY_SEL_BLANKING_S2_ALPHA =  0x3 << B2R2_ACK_CKEY_SEL_SHIFT,
+};
+
+/* Common <S/T>TY defines */
+#define B2R2_TY_BITMAP_PITCH_SHIFT 0
+#define B2R2_TY_COLOR_FORM_SHIFT 16
+#define B2R2_TY_ALPHA_RANGE_SHIFT 21
+#define B2R2_TY_MB_ACCESS_MODE_SHIFT 23
+#define B2R2_TY_HSO_SHIFT 24
+#define B2R2_TY_VSO_SHIFT 25
+#define B2R2_TY_SUBBYTE_SHIFT 28
+#define B2R2_TY_ENDIAN_SHIFT 30
+#define B2R2_TY_SECURE_SHIFT 31
+
+/* Dummy enum for generalization of <S/T>TY registers */
+enum b2r2_ty {
+	/* Alpha range */
+	B2R2_TY_ALPHA_RANGE_128 = 0x0 << B2R2_TY_ALPHA_RANGE_SHIFT,
+	B2R2_TY_ALPHA_RANGE_255 = 0x1 << B2R2_TY_ALPHA_RANGE_SHIFT,
+
+	/* Access mode in macro-block organized frame buffers */
+	B2R2_TY_MB_ACCESS_MODE_FRAME = 0x0 << B2R2_TY_MB_ACCESS_MODE_SHIFT,
+	B2R2_TY_MB_ACCESS_MODE_FIELD = 0x1 << B2R2_TY_MB_ACCESS_MODE_SHIFT,
+
+	/* Horizontal scan order */
+	B2R2_TY_HSO_LEFT_TO_RIGHT = 0x0 << B2R2_TY_HSO_SHIFT,
+	B2R2_TY_HSO_RIGHT_TO_LEFT = 0x1 << B2R2_TY_HSO_SHIFT,
+
+	/* Vertical scan order */
+	B2R2_TY_VSO_TOP_TO_BOTTOM = 0x0 << B2R2_TY_VSO_SHIFT,
+	B2R2_TY_VSO_BOTTOM_TO_TOP = 0x1 << B2R2_TY_VSO_SHIFT,
+
+	/* Pixel ordering for sub-byte formats (position of right-most pixel) */
+	B2R2_TY_SUBBYTE_MSB = 0x0 << B2R2_TY_SUBBYTE_SHIFT,
+	B2R2_TY_SUBBYTE_LSB = 0x1 << B2R2_TY_SUBBYTE_SHIFT,
+
+	/* Bitmap endianess */
+	B2R2_TY_ENDIAN_BIG_NOT_LITTLE = 0x1 << B2R2_TY_ENDIAN_SHIFT,
+
+	/* Secureness of the target memory region */
+	B2R2_TY_SECURE_UNSECURE = 0x0 << B2R2_TY_SECURE_SHIFT,
+	B2R2_TY_SECURE_SECURE =   0x1 << B2R2_TY_SECURE_SHIFT,
+
+	/* Dummy to make sure the data type is large enough */
+	B2R2_TY_DUMMY = 0xffffffff,
+};
+
+/* B2R2_TTY register values */
+#define B2R2_TTY_CB_NOT_CR_SHIFT 22
+#define B2R2_TTY_RGB_ROUND_SHIFT 26
+#define B2R2_TTY_CHROMA_NOT_LUMA_SHIFT 27
+enum b2r2_tty {
+
+	/* Chroma component selection */
+	B2R2_TTY_CB_NOT_CR = 0x1 << B2R2_TTY_CB_NOT_CR_SHIFT,
+
+	/* RGB rounding mode */
+	B2R2_TTY_RGB_ROUND_NORMAL = 0x0 << B2R2_TTY_RGB_ROUND_SHIFT,
+	B2R2_TTY_RGB_ROUND_DITHER = 0x1 << B2R2_TTY_RGB_ROUND_SHIFT,
+
+	/* Component selection for splitted frame buffer formats */
+	B2R2_TTY_CHROMA_NOT_LUMA = 0x1 << B2R2_TTY_CHROMA_NOT_LUMA_SHIFT,
+};
+
+/* B2R2_S1TY register values */
+#define B2R2_S1TY_A1_SUBST_SHIFT 22
+#define B2R2_S1TY_ROTATION_SHIFT 27
+#define B2R2_S1TY_RGB_EXPANSION_SHIFT 29
+enum b2r2_s1ty {
+
+	/* Alpha bit substitution mode for ARGB1555 */
+	B2R2_S1TY_A1_SUBST_KEY_MODE = 0x1 << B2R2_S1TY_A1_SUBST_SHIFT,
+
+	/* Input rectangle rotation (NOT YET IMPLEMENTED) */
+	B2R2_S1TY_ENABLE_ROTATION = 0x1 << B2R2_S1TY_ROTATION_SHIFT,
+
+	/* RGB expansion mode */
+	B2R2_S1TY_RGB_EXPANSION_MSB_DUP = 0x0  << B2R2_S1TY_RGB_EXPANSION_SHIFT,
+	B2R2_S1TY_RGB_EXPANSION_LSP_ZERO = 0x1 << B2R2_S1TY_RGB_EXPANSION_SHIFT,
+};
+
+/* B2R2_S1TY register values */
+#define B2R2_S2TY_A1_SUBST_SHIFT 22
+#define B2R2_S2TY_CHROMA_LEFT_SHIFT 26
+#define B2R2_S2TY_RGB_EXPANSION_SHIFT 29
+enum b2r2_s2ty {
+
+	/* Alpha bit substitution mode for ARGB1555 */
+	B2R2_S2TY_A1_SUBST_KEY_MODE = 0x1 << B2R2_S2TY_A1_SUBST_SHIFT,
+
+	/* Chroma left extension */
+	B2R2_S2TY_CHROMA_LEFT_EXT_FOLLOWING_PIXEL = 0x0
+						<< B2R2_S2TY_CHROMA_LEFT_SHIFT,
+	B2R2_S2TY_CHROMA_LEFT_EXT_AVERAGE = 0x1 << B2R2_S2TY_CHROMA_LEFT_SHIFT,
+
+	/* RGB expansion mode */
+	B2R2_S2TY_RGB_EXPANSION_MSB_DUP = 0x0  << B2R2_S2TY_RGB_EXPANSION_SHIFT,
+	B2R2_S2TY_RGB_EXPANSION_LSP_ZERO = 0x1 << B2R2_S2TY_RGB_EXPANSION_SHIFT,
+};
+
+/* B2R2_S1TY register values */
+#define B2R2_S3TY_BLANK_ACC_SHIFT 26
+enum b2r2_s3ty {
+	/* Enables "blank" access on this source (nothing will be fetched from
+	   memory) */
+	B2R2_S3TY_ENABLE_BLANK_ACCESS = 0x1 << B2R2_S3TY_BLANK_ACC_SHIFT,
+};
+
+/* B2R2_<S or T>XY register values */
+#define B2R2_XY_X_SHIFT 0
+#define B2R2_XY_Y_SHIFT 16
+
+/* B2R2_<S or T>SZ register values */
+#define B2R2_SZ_WIDTH_SHIFT 0
+#define B2R2_SZ_HEIGHT_SHIFT 16
+
+/* Clip window offset (top left coordinates) */
+#define B2R2_CWO_X_SHIFT 0
+#define B2R2_CWO_Y_SHIFT 16
+
+/* Clip window stop (bottom right coordinates) */
+#define B2R2_CWS_X_SHIFT 0
+#define B2R2_CWS_Y_SHIFT 16
+
+/* Color look-up table */
+enum b2r2_cco {
+	B2R2_CCO_CLUT_COLOR_CORRECTION = (1 << 16),
+	B2R2_CCO_CLUT_UPDATE = (1 << 18),
+	B2R2_CCO_CLUT_ON_S1 = (1 << 15)
+};
+
+/* Filter control (2D resize control) */
+enum b2r2_fctl {
+	/* Horizontal 2D filter mode */
+	B2R2_FCTL_HF2D_MODE_ENABLE_COLOR_CHANNEL_FILTER = BIT(0),
+	B2R2_FCTL_HF2D_MODE_ENABLE_ALPHA_CHANNEL_FILTER = BIT(1),
+	B2R2_FCTL_HF2D_MODE_ENABLE_RESIZER = BIT(2),
+
+	/* Vertical 2D filter mode */
+	B2R2_FCTL_VF2D_MODE_ENABLE_COLOR_CHANNEL_FILTER = BIT(4),
+	B2R2_FCTL_VF2D_MODE_ENABLE_ALPHA_CHANNEL_FILTER = BIT(5),
+	B2R2_FCTL_VF2D_MODE_ENABLE_RESIZER = BIT(6),
+
+	/* Alpha borders */
+	B2R2_FCTL_ENABLE_ALPHA_BORDER_RIGHT = BIT(12),
+	B2R2_FCTL_ENABLE_ALPHA_BORDER_LEFT = BIT(13),
+	B2R2_FCTL_ENABLE_ALPHA_BORDER_BOTTOM = BIT(14),
+	B2R2_FCTL_ENABLE_ALPHA_BORDER_TOP = BIT(15),
+
+	/* Luma path horizontal 2D filter mode */
+	B2R2_FCTL_LUMA_HF2D_MODE_ENABLE_FILTER = BIT(24),
+	B2R2_FCTL_LUMA_HF2D_MODE_ENABLE_RESIZER = BIT(25),
+
+	/* Luma path vertical 2D filter mode */
+	B2R2_FCTL_LUMA_VF2D_MODE_ENABLE_FILTER = BIT(28),
+	B2R2_FCTL_LUMA_VF2D_MODE_ENABLE_RESIZER = BIT(29),
+};
+
+/* Resize scaling factor */
+#define B2R2_RSF_HSRC_INC_SHIFT 0
+#define B2R2_RSF_VSRC_INC_SHIFT 16
+
+/* Resizer initialization */
+#define B2R2_RZI_HSRC_INIT_SHIFT 0
+#define B2R2_RZI_HNB_REPEAT_SHIFT 12
+#define B2R2_RZI_VSRC_INIT_SHIFT 16
+#define B2R2_RZI_VNB_REPEAT_SHIFT 28
+
+/* Default values for the resizer */
+#define B2R2_RZI_DEFAULT_HNB_REPEAT (3 << B2R2_RZI_HNB_REPEAT_SHIFT)
+#define B2R2_RZI_DEFAULT_VNB_REPEAT (3 << B2R2_RZI_VNB_REPEAT_SHIFT)
+
+
+/* Bus plug configuration registers */
+enum b2r2_plug_opcode_size {
+	B2R2_PLUG_OPCODE_SIZE_8 =  0x3,
+	B2R2_PLUG_OPCODE_SIZE_16 = 0x4,
+	B2R2_PLUG_OPCODE_SIZE_32 = 0x5,
+	B2R2_PLUG_OPCODE_SIZE_64 = 0x6,
+};
+
+enum b2r2_plug_chunk_size {
+	B2R2_PLUG_CHUNK_SIZE_1 =   0x0,
+	B2R2_PLUG_CHUNK_SIZE_2 =   0x1,
+	B2R2_PLUG_CHUNK_SIZE_4 =   0x2,
+	B2R2_PLUG_CHUNK_SIZE_8 =   0x3,
+	B2R2_PLUG_CHUNK_SIZE_16 =  0x4,
+	B2R2_PLUG_CHUNK_SIZE_32 =  0x5,
+	B2R2_PLUG_CHUNK_SIZE_64 =  0x6,
+	B2R2_PLUG_CHUNK_SIZE_128 = 0x7,
+};
+
+enum b2r2_plug_message_size {
+	B2R2_PLUG_MESSAGE_SIZE_1 =   0x0,
+	B2R2_PLUG_MESSAGE_SIZE_2 =   0x1,
+	B2R2_PLUG_MESSAGE_SIZE_4 =   0x2,
+	B2R2_PLUG_MESSAGE_SIZE_8 =   0x3,
+	B2R2_PLUG_MESSAGE_SIZE_16 =  0x4,
+	B2R2_PLUG_MESSAGE_SIZE_32 =  0x5,
+	B2R2_PLUG_MESSAGE_SIZE_64 =  0x6,
+	B2R2_PLUG_MESSAGE_SIZE_128 = 0x7,
+};
+
+enum b2r2_plug_page_size {
+	B2R2_PLUG_PAGE_SIZE_64 =  0x0,
+	B2R2_PLUG_PAGE_SIZE_128 = 0x1,
+	B2R2_PLUG_PAGE_SIZE_256 = 0x2,
+};
+
+/* Default opcode size */
+#if defined(CONFIG_B2R2_OPSIZE_8)
+#  define B2R2_PLUG_OPCODE_SIZE_DEFAULT B2R2_PLUG_OPCODE_SIZE_8
+#elif defined(CONFIG_B2R2_OPSIZE_16)
+#  define B2R2_PLUG_OPCODE_SIZE_DEFAULT B2R2_PLUG_OPCODE_SIZE_16
+#elif defined(CONFIG_B2R2_OPSIZE_32)
+#  define B2R2_PLUG_OPCODE_SIZE_DEFAULT B2R2_PLUG_OPCODE_SIZE_32
+#elif defined(CONFIG_B2R2_OPSIZE_64)
+#  define B2R2_PLUG_OPCODE_SIZE_DEFAULT B2R2_PLUG_OPCODE_SIZE_64
+#else
+#  define B2R2_PLUG_OPCODE_SIZE_DEFAULT 0
+#endif
+
+/* Default chunk size */
+#if defined(CONFIG_B2R2_CHSIZE_1)
+#  define B2R2_PLUG_CHUNK_SIZE_DEFAULT B2R2_PLUG_CHUNK_SIZE_1
+#elif defined(CONFIG_B2R2_CHSIZE_2)
+#  define B2R2_PLUG_CHUNK_SIZE_DEFAULT B2R2_PLUG_CHUNK_SIZE_2
+#elif defined(CONFIG_B2R2_CHSIZE_4)
+#  define B2R2_PLUG_CHUNK_SIZE_DEFAULT B2R2_PLUG_CHUNK_SIZE_4
+#elif defined(CONFIG_B2R2_CHSIZE_8)
+#  define B2R2_PLUG_CHUNK_SIZE_DEFAULT B2R2_PLUG_CHUNK_SIZE_8
+#elif defined(CONFIG_B2R2_CHSIZE_16)
+#  define B2R2_PLUG_CHUNK_SIZE_DEFAULT B2R2_PLUG_CHUNK_SIZE_16
+#elif defined(CONFIG_B2R2_CHSIZE_32)
+#  define B2R2_PLUG_CHUNK_SIZE_DEFAULT B2R2_PLUG_CHUNK_SIZE_32
+#elif defined(CONFIG_B2R2_CHSIZE_64)
+#  define B2R2_PLUG_CHUNK_SIZE_DEFAULT B2R2_PLUG_CHUNK_SIZE_64
+#elif defined(CONFIG_B2R2_CHSIZE_128)
+#  define B2R2_PLUG_CHUNK_SIZE_DEFAULT B2R2_PLUG_CHUNK_SIZE_128
+#else
+#  define B2R2_PLUG_CHUNK_SIZE_DEFAULT 0
+#endif
+
+/* Default message size */
+#if defined(CONFIG_B2R2_MGSIZE_1)
+#  define B2R2_PLUG_MESSAGE_SIZE_DEFAULT B2R2_PLUG_MESSAGE_SIZE_1
+#elif defined(CONFIG_B2R2_MGSIZE_2)
+#  define B2R2_PLUG_MESSAGE_SIZE_DEFAULT B2R2_PLUG_MESSAGE_SIZE_2
+#elif defined(CONFIG_B2R2_MGSIZE_4)
+#  define B2R2_PLUG_MESSAGE_SIZE_DEFAULT B2R2_PLUG_MESSAGE_SIZE_4
+#elif defined(CONFIG_B2R2_MGSIZE_8)
+#  define B2R2_PLUG_MESSAGE_SIZE_DEFAULT B2R2_PLUG_MESSAGE_SIZE_8
+#elif defined(CONFIG_B2R2_MGSIZE_16)
+#  define B2R2_PLUG_MESSAGE_SIZE_DEFAULT B2R2_PLUG_MESSAGE_SIZE_16
+#elif defined(CONFIG_B2R2_MGSIZE_32)
+#  define B2R2_PLUG_MESSAGE_SIZE_DEFAULT B2R2_PLUG_MESSAGE_SIZE_32
+#elif defined(CONFIG_B2R2_MGSIZE_64)
+#  define B2R2_PLUG_MESSAGE_SIZE_DEFAULT B2R2_PLUG_MESSAGE_SIZE_64
+#elif defined(CONFIG_B2R2_MGSIZE_128)
+#  define B2R2_PLUG_MESSAGE_SIZE_DEFAULT B2R2_PLUG_MESSAGE_SIZE_128
+#else
+#  define B2R2_PLUG_MESSAGE_SIZE_DEFAULT 0
+#endif
+
+/* Default page size */
+#if defined(CONFIG_B2R2_PGSIZE_64)
+#  define B2R2_PLUG_PAGE_SIZE_DEFAULT B2R2_PLUG_PAGE_SIZE_64
+#elif defined(CONFIG_B2R2_PGSIZE_128)
+#  define B2R2_PLUG_PAGE_SIZE_DEFAULT B2R2_PLUG_PAGE_SIZE_128
+#elif defined(CONFIG_B2R2_PGSIZE_256)
+#  define B2R2_PLUG_PAGE_SIZE_DEFAULT B2R2_PLUG_PAGE_SIZE_256
+#else
+#  define B2R2_PLUG_PAGE_SIZE_DEFAULT 0
+#endif
+
+/*  VMX register values for RGB to YUV color conversion */
+/*  Magic numbers from 27.11 in DB8500_DesignSpecification_v2.5.pdf */
+
+/* 601 Video Matrix (standard 601 conversion) */
+#define B2R2_VMX0_RGB_TO_YUV_601_VIDEO 0x107e4beb
+#define B2R2_VMX1_RGB_TO_YUV_601_VIDEO 0x0982581d
+#define B2R2_VMX2_RGB_TO_YUV_601_VIDEO 0xfa9ea483
+#define B2R2_VMX3_RGB_TO_YUV_601_VIDEO 0x08000080
+
+/* 601 Gfx Matrix (full range conversion) */
+#define B2R2_VMX0_RGB_TO_YUV_601_GFX 0x0e1e8bee
+#define B2R2_VMX1_RGB_TO_YUV_601_GFX 0x08420419
+#define B2R2_VMX2_RGB_TO_YUV_601_GFX 0xfb5ed471
+#define B2R2_VMX3_RGB_TO_YUV_601_GFX 0x08004080
+
+/* 709 Video Matrix (standard 709 conversion) */
+#define B2R2_VMX0_RGB_TO_YUV_709_VIDEO 0x107e27f4
+#define B2R2_VMX1_RGB_TO_YUV_709_VIDEO 0x06e2dc13
+#define B2R2_VMX2_RGB_TO_YUV_709_VIDEO 0xfc5e6c83
+#define B2R2_VMX3_RGB_TO_YUV_709_VIDEO 0x08000080
+
+/* 709 Gfx Matrix (standard 709 conversion) */
+#define B2R2_VMX0_RGB_TO_YUV_709_GFX 0x0e3e6bf5
+#define B2R2_VMX1_RGB_TO_YUV_709_GFX 0x05e27410
+#define B2R2_VMX2_RGB_TO_YUV_709_GFX 0xfcdea471
+#define B2R2_VMX3_RGB_TO_YUV_709_GFX 0x08004080
+
+/* VMX register values for YUV to RGB color conversion */
+
+/* 601 Video Matrix (standard 601 conversion) */
+#define B2R2_VMX0_YUV_TO_RGB_601_VIDEO 0x2c440000
+#define B2R2_VMX1_YUV_TO_RGB_601_VIDEO 0xe9a403aa
+#define B2R2_VMX2_YUV_TO_RGB_601_VIDEO 0x0004013f
+#define B2R2_VMX3_YUV_TO_RGB_601_VIDEO 0x34f21322
+
+/* 601 Gfx Matrix (full range conversion) */
+#define B2R2_VMX0_YUV_TO_RGB_601_GFX 0x3324a800
+#define B2R2_VMX1_YUV_TO_RGB_601_GFX 0xe604ab9c
+#define B2R2_VMX2_YUV_TO_RGB_601_GFX 0x0004a957
+#define B2R2_VMX3_YUV_TO_RGB_601_GFX 0x32121eeb
+
+/* 709 Video Matrix (standard 709 conversion) */
+#define B2R2_VMX0_YUV_TO_RGB_709_VIDEO 0x31440000
+#define B2R2_VMX1_YUV_TO_RGB_709_VIDEO 0xf16403d1
+#define B2R2_VMX2_YUV_TO_RGB_709_VIDEO 0x00040145
+#define B2R2_VMX3_YUV_TO_RGB_709_VIDEO 0x33b14b18
+
+/* 709 Gfx Matrix (standard 709 conversion) */
+#define B2R2_VMX0_YUV_TO_RGB_709_GFX 0x3964a800
+#define B2R2_VMX1_YUV_TO_RGB_709_GFX 0xef04abc9
+#define B2R2_VMX2_YUV_TO_RGB_709_GFX 0x0004a95f
+#define B2R2_VMX3_YUV_TO_RGB_709_GFX 0x307132df
+
+/* VMX register values for RGB to BGR conversion */
+#define B2R2_VMX0_RGB_TO_BGR 0x00000100
+#define B2R2_VMX1_RGB_TO_BGR 0x00040000
+#define B2R2_VMX2_RGB_TO_BGR 0x20000000
+#define B2R2_VMX3_RGB_TO_BGR 0x00000000
+
+/* VMX register values for BGR to YUV color conversion */
+/* Note: All BGR -> YUV values are calculated by multiplying
+ * the RGB -> YUV matrices [A], with [S] to form [A]x[S] where
+ *     |0 0 1|
+ * S = |0 1 0|
+ *     |1 0 0|
+ * Essentially swapping first and third columns in
+ * the matrices (VMX0, VMX1 and VMX2 values).
+ * The offset vector VMX3 remains untouched.
+ * Put another way, the value of bits 0 through 9
+ * is swapped with the value of
+ * bits 20 through 31 in VMX0, VMX1 and VMX2,
+ * taking into consideration the compression
+ * that is used on bits 0 through 9. Bit 0 being LSB.
+ */
+
+/* 601 Video Matrix (standard 601 conversion) */
+#define B2R2_VMX0_BGR_TO_YUV_601_VIDEO 0xfd7e4883
+#define B2R2_VMX1_BGR_TO_YUV_601_VIDEO 0x03a2584c
+#define B2R2_VMX2_BGR_TO_YUV_601_VIDEO 0x107ea7d4
+#define B2R2_VMX3_BGR_TO_YUV_601_VIDEO 0x08000080
+
+/* 601 Gfx Matrix (full range conversion) */
+#define B2R2_VMX0_BGR_TO_YUV_601_GFX 0xfdde8870
+#define B2R2_VMX1_BGR_TO_YUV_601_GFX 0x03220442
+#define B2R2_VMX2_BGR_TO_YUV_601_GFX 0x0e3ed7da
+#define B2R2_VMX3_BGR_TO_YUV_601_GFX 0x08004080
+
+/* 709 Video Matrix (standard 709 conversion) */
+#define B2R2_VMX0_BGR_TO_YUV_709_VIDEO 0xfe9e2483
+#define B2R2_VMX1_BGR_TO_YUV_709_VIDEO 0x0262dc37
+#define B2R2_VMX2_BGR_TO_YUV_709_VIDEO 0x107e6fe2
+#define B2R2_VMX3_BGR_TO_YUV_709_VIDEO 0x08000080
+
+/* 709 Gfx Matrix (standard 709 conversion) */
+#define B2R2_VMX0_BGR_TO_YUV_709_GFX 0xfebe6871
+#define B2R2_VMX1_BGR_TO_YUV_709_GFX 0x0202742f
+#define B2R2_VMX2_BGR_TO_YUV_709_GFX 0x0e3ea7e6
+#define B2R2_VMX3_BGR_TO_YUV_709_GFX 0x08004080
+
+
+/* VMX register values for YUV to BGR conversion */
+/*  Note: All YUV -> BGR values are constructed
+ * from the YUV -> RGB ones, by swapping
+ * first and third rows in the matrix
+ * (VMX0 and VMX2 values). Further, the first and
+ * third values in the offset vector need to be
+ * swapped as well, i.e. bits 0 through 9 are swapped
+ * with bits 20 through 29 in the VMX3 value.
+ * Bit 0 being LSB.
+ */
+
+/* 601 Video Matrix (standard 601 conversion) */
+#define B2R2_VMX0_YUV_TO_BGR_601_VIDEO 0x0004013f
+#define B2R2_VMX1_YUV_TO_BGR_601_VIDEO 0xe9a403aa
+#define B2R2_VMX2_YUV_TO_BGR_601_VIDEO 0x2c440000
+#define B2R2_VMX3_YUV_TO_BGR_601_VIDEO 0x3222134f
+
+/* 601 Gfx Matrix (full range conversion) */
+#define B2R2_VMX0_YUV_TO_BGR_601_GFX 0x0004a957
+#define B2R2_VMX1_YUV_TO_BGR_601_GFX 0xe604ab9c
+#define B2R2_VMX2_YUV_TO_BGR_601_GFX 0x3324a800
+#define B2R2_VMX3_YUV_TO_BGR_601_GFX 0x2eb21f21
+
+/* 709 Video Matrix (standard 709 conversion) */
+#define B2R2_VMX0_YUV_TO_BGR_709_VIDEO 0x00040145
+#define B2R2_VMX1_YUV_TO_BGR_709_VIDEO 0xf16403d1
+#define B2R2_VMX2_YUV_TO_BGR_709_VIDEO 0x31440000
+#define B2R2_VMX3_YUV_TO_BGR_709_VIDEO 0x31814b3b
+
+/* 709 Gfx Matrix (standard 709 conversion) */
+#define B2R2_VMX0_YUV_TO_BGR_709_GFX 0x0004a95f
+#define B2R2_VMX1_YUV_TO_BGR_709_GFX 0xef04abc9
+#define B2R2_VMX2_YUV_TO_BGR_709_GFX 0x3964a800
+#define B2R2_VMX3_YUV_TO_BGR_709_GFX 0x2df13307
+
+
+/* VMX register values for YVU to RGB conversion */
+
+/* 601 Video Matrix (standard 601 conversion) */
+#define B2R2_VMX0_YVU_TO_RGB_601_VIDEO 0x00040120
+#define B2R2_VMX1_YVU_TO_RGB_601_VIDEO 0xF544034D
+#define B2R2_VMX2_YVU_TO_RGB_601_VIDEO 0x37840000
+#define B2R2_VMX3_YVU_TO_RGB_601_VIDEO 0x34f21322
+
+/* VMX register values for RGB to YVU conversion */
+
+/* 601 Video Matrix (standard 601 conversion) */
+#define B2R2_VMX0_RGB_TO_YVU_601_VIDEO 0xfa9ea483
+#define B2R2_VMX1_RGB_TO_YVU_601_VIDEO 0x0982581d
+#define B2R2_VMX2_RGB_TO_YVU_601_VIDEO 0x107e4beb
+#define B2R2_VMX3_RGB_TO_YVU_601_VIDEO 0x08000080
+
+/* VMX register values for YVU to BGR conversion */
+
+/* 601 Video Matrix (standard 601 conversion) */
+#define B2R2_VMX0_YVU_TO_BGR_601_VIDEO 0x37840000
+#define B2R2_VMX1_YVU_TO_BGR_601_VIDEO 0xF544034D
+#define B2R2_VMX2_YVU_TO_BGR_601_VIDEO 0x00040120
+#define B2R2_VMX3_YVU_TO_BGR_601_VIDEO 0x3222134F
+
+/* VMX register values for BGR to YVU conversion */
+
+/* 601 Video Matrix (standard 601 conversion) */
+#define B2R2_VMX0_BGR_TO_YVU_601_VIDEO 0x107ea7d4
+#define B2R2_VMX1_BGR_TO_YVU_601_VIDEO 0x03a2584c
+#define B2R2_VMX2_BGR_TO_YVU_601_VIDEO 0xfd7e4883
+#define B2R2_VMX3_BGR_TO_YVU_601_VIDEO 0x08000080
+
+/* VMX register values for YVU to YUV conversion */
+
+/* 601 Video Matrix (standard 601 conversion) */
+/* Internally, the components are in fact stored
+ * with luma in the middle, i.e. UYV, which is why
+ * the values are just like for RGB->BGR conversion.
+ */
+#define B2R2_VMX0_YVU_TO_YUV_601_VIDEO 0x00000100
+#define B2R2_VMX1_YVU_TO_YUV_601_VIDEO 0x00040000
+#define B2R2_VMX2_YVU_TO_YUV_601_VIDEO 0x20000000
+#define B2R2_VMX3_YVU_TO_YUV_601_VIDEO 0x00000000
+
+#endif /* B2R2_HW_H__ */
diff --git a/drivers/video/b2r2/b2r2_input_validation.c b/drivers/video/b2r2/b2r2_input_validation.c
new file mode 100644
index 00000000000..783302da9a9
--- /dev/null
+++ b/drivers/video/b2r2/b2r2_input_validation.c
@@ -0,0 +1,400 @@
+/*
+ * Copyright (C) ST-Ericsson AB 2010
+ *
+ * Author: Johan Mossberg <johan.xx.mossberg@stericsson.com> for ST-Ericsson
+ *
+ * This program is free software; you can redistribute it and/or modify it under
+ * the terms of the GNU General Public License as published by the Free Software
+ * Foundation; either version 2 of the License, or (at your option) any later
+ * version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
+ * FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
+ * details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
+ * Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+
+#include "b2r2_input_validation.h"
+
+#include "b2r2_debug.h"
+#include "b2r2_utils.h"
+
+#include <video/b2r2_blt.h>
+#include <linux/kernel.h>
+#include <linux/errno.h>
+
+
+static bool is_valid_format(enum b2r2_blt_fmt fmt);
+
+static bool is_valid_pitch_for_fmt(u32 pitch, s32 width,
+		enum b2r2_blt_fmt fmt);
+
+static bool is_aligned_width_for_fmt(s32 width, enum b2r2_blt_fmt fmt);
+static s32 width_2_complete_width(s32 width, enum b2r2_blt_fmt fmt);
+static bool is_complete_width_for_fmt(s32 width, enum b2r2_blt_fmt fmt);
+static bool is_valid_height_for_fmt(s32 height, enum b2r2_blt_fmt fmt);
+
+static bool validate_img(struct b2r2_blt_img *img);
+static bool validate_rect(struct b2r2_blt_rect *rect);
+
+
+static bool is_valid_format(enum b2r2_blt_fmt fmt)
+{
+	switch (fmt) {
+	case B2R2_BLT_FMT_1_BIT_A1:
+	case B2R2_BLT_FMT_8_BIT_A8:
+	case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE:
+	case B2R2_BLT_FMT_16_BIT_ARGB4444:
+	case B2R2_BLT_FMT_16_BIT_ARGB1555:
+	case B2R2_BLT_FMT_16_BIT_RGB565:
+	case B2R2_BLT_FMT_Y_CB_Y_CR:
+	case B2R2_BLT_FMT_CB_Y_CR_Y:
+	case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE:
+	case B2R2_BLT_FMT_24_BIT_RGB888:
+	case B2R2_BLT_FMT_24_BIT_ARGB8565:
+	case B2R2_BLT_FMT_24_BIT_YUV888:
+	case B2R2_BLT_FMT_32_BIT_ARGB8888:
+	case B2R2_BLT_FMT_32_BIT_ABGR8888:
+	case B2R2_BLT_FMT_32_BIT_AYUV8888:
+	case B2R2_BLT_FMT_YUV444_PACKED_PLANAR:
+		return true;
+
+	default:
+		return false;
+	}
+}
+
+
+static bool is_valid_pitch_for_fmt(u32 pitch, s32 width, enum b2r2_blt_fmt fmt)
+{
+	s32 complete_width;
+	u32 pitch_derived_from_width;
+
+	complete_width =  width_2_complete_width(width, fmt);
+
+	pitch_derived_from_width =
+			b2r2_calc_pitch_from_width(complete_width, fmt);
+
+	if (pitch < pitch_derived_from_width)
+		return false;
+
+	switch (fmt) {
+	case B2R2_BLT_FMT_16_BIT_ARGB4444:
+	case B2R2_BLT_FMT_16_BIT_ARGB1555:
+	case B2R2_BLT_FMT_16_BIT_RGB565:
+		if (!b2r2_is_aligned(pitch, 2))
+			return false;
+
+		break;
+
+	case B2R2_BLT_FMT_Y_CB_Y_CR:
+	case B2R2_BLT_FMT_CB_Y_CR_Y:
+	case B2R2_BLT_FMT_24_BIT_RGB888:
+	case B2R2_BLT_FMT_24_BIT_ARGB8565:
+	case B2R2_BLT_FMT_24_BIT_YUV888:
+	case B2R2_BLT_FMT_32_BIT_ARGB8888:
+	case B2R2_BLT_FMT_32_BIT_ABGR8888:
+	case B2R2_BLT_FMT_32_BIT_AYUV8888:
+		if (!b2r2_is_aligned(pitch, 4))
+			return false;
+
+		break;
+
+	default:
+		break;
+	}
+
+	return true;
+}
+
+
+static bool is_aligned_width_for_fmt(s32 width, enum b2r2_blt_fmt fmt)
+{
+	switch (fmt) {
+	case B2R2_BLT_FMT_24_BIT_RGB888:
+	case B2R2_BLT_FMT_24_BIT_ARGB8565:
+	case B2R2_BLT_FMT_24_BIT_YUV888:
+		if (!b2r2_is_aligned(width, 4))
+			return false;
+
+		break;
+
+	case B2R2_BLT_FMT_1_BIT_A1:
+		if (!b2r2_is_aligned(width, 8))
+			return false;
+
+		break;
+
+	case B2R2_BLT_FMT_Y_CB_Y_CR:
+	case B2R2_BLT_FMT_CB_Y_CR_Y:
+		if (!b2r2_is_aligned(width, 2))
+			return false;
+
+		break;
+
+	default:
+		break;
+	}
+
+	return true;
+}
+
+static s32 width_2_complete_width(s32 width, enum b2r2_blt_fmt fmt)
+{
+	switch (fmt) {
+	case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_Y_CB_Y_CR:
+	case B2R2_BLT_FMT_CB_Y_CR_Y:
+	case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR:
+		return b2r2_align_up(width, 2);
+
+	case B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE:
+	case B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE:
+		return b2r2_align_up(width, 16);
+
+	default:
+		return width;
+	}
+}
+
+static bool is_complete_width_for_fmt(s32 width, enum b2r2_blt_fmt fmt)
+{
+	switch (fmt) {
+	case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_Y_CB_Y_CR:
+	case B2R2_BLT_FMT_CB_Y_CR_Y:
+	case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR:
+		if (!b2r2_is_aligned(width, 2))
+			return false;
+
+		break;
+
+	case B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE:
+	case B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE:
+		if (!b2r2_is_aligned(width, 16))
+			return false;
+
+		break;
+
+	default:
+		break;
+	}
+
+	return true;
+}
+
+static bool is_valid_height_for_fmt(s32 height, enum b2r2_blt_fmt fmt)
+{
+	switch (fmt) {
+	case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR:
+		if (!b2r2_is_aligned(height, 2))
+			return false;
+
+		break;
+
+	case B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE:
+	case B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE:
+		if (!b2r2_is_aligned(height, 16))
+			return false;
+
+		break;
+
+	default:
+		break;
+	}
+
+	return true;
+}
+
+static bool validate_img(struct b2r2_blt_img *img)
+{
+	/*
+	 * So that we always can do width * height * bpp without overflowing a
+	 * 32 bit signed integer. isqrt(s32_max / max_bpp) was used to
+	 * calculate the value.
+	 */
+	static const s32 max_img_width_height = 8191;
+
+	s32 img_size;
+
+	if (!is_valid_format(img->fmt)) {
+		b2r2_log_info("Validation Error: !is_valid_format(img->fmt)\n");
+		return false;
+	}
+
+	if (img->width < 0 || img->width > max_img_width_height ||
+		img->height < 0 || img->height > max_img_width_height) {
+		b2r2_log_info("Validation Error: "
+				"img->width < 0 || "
+				"img->width > max_img_width_height || "
+				"img->height < 0 || "
+				"img->height > max_img_width_height\n");
+		return false;
+	}
+
+	if (b2r2_is_mb_fmt(img->fmt)) {
+		if (!is_complete_width_for_fmt(img->width, img->fmt)) {
+			b2r2_log_info("Validation Error: "
+					"!is_complete_width_for_fmt(img->width, "
+						"img->fmt)\n");
+			return false;
+		}
+	} else {
+		if (0 == img->pitch &&
+			(!is_aligned_width_for_fmt(img->width, img->fmt) ||
+			!is_complete_width_for_fmt(img->width, img->fmt))) {
+			b2r2_log_info("Validation Error: "
+					"0 == img->pitch && "
+					"(!is_aligned_width_for_fmt(img->width, img->fmt) || "
+					"!is_complete_width_for_fmt(img->width, "
+						"img->fmt))\n");
+			return false;
+		}
+
+		if (img->pitch != 0 &&
+			!is_valid_pitch_for_fmt(img->pitch, img->width, img->fmt)) {
+			b2r2_log_info("Validation Error: "
+					"img->pitch != 0 && "
+					"!is_valid_pitch_for_fmt(img->pitch, img->width, "
+						"img->fmt)\n");
+			return false;
+		}
+	}
+
+	if (!is_valid_height_for_fmt(img->width, img->fmt)) {
+		b2r2_log_info("Validation Error: "
+				"!is_valid_height_for_fmt(img->width, img->fmt)\n");
+		return false;
+	}
+
+	img_size = b2r2_get_img_size(img);
+
+	/*
+	 * To keep the entire image inside s32 range.
+	 */
+	if ((B2R2_BLT_PTR_HWMEM_BUF_NAME_OFFSET == img->buf.type ||
+				B2R2_BLT_PTR_FD_OFFSET == img->buf.type) &&
+			img->buf.offset > (u32)b2r2_s32_max - (u32)img_size) {
+		b2r2_log_info("Validation Error: "
+				"(B2R2_BLT_PTR_HWMEM_BUF_NAME_OFFSET == "
+				"img->buf.type || B2R2_BLT_PTR_FD_OFFSET == "
+				"img->buf.type) && img->buf.offset > "
+				"(u32)B2R2_MAX_S32 - (u32)img_size\n");
+		return false;
+	}
+
+	return true;
+}
+
+static bool validate_rect(struct b2r2_blt_rect *rect)
+{
+	if (rect->width < 0 || rect->height < 0) {
+		b2r2_log_info("Validation Error: "
+				"rect->width < 0 || rect->height < 0\n");
+		return false;
+	}
+
+	return true;
+}
+
+bool b2r2_validate_user_req(struct b2r2_blt_req *req)
+{
+	bool is_src_img_used;
+	bool is_src_mask_used;
+	bool is_dst_clip_rect_used;
+
+	if (req->size != sizeof(struct b2r2_blt_req)) {
+		b2r2_log_err("Validation Error: "
+				"req->size != sizeof(struct b2r2_blt_req)\n");
+		return false;
+	}
+
+	is_src_img_used = !(req->flags & B2R2_BLT_FLAG_SOURCE_FILL ||
+				req->flags & B2R2_BLT_FLAG_SOURCE_FILL_RAW);
+	is_src_mask_used = req->flags & B2R2_BLT_FLAG_SOURCE_MASK;
+	is_dst_clip_rect_used = req->flags & B2R2_BLT_FLAG_DESTINATION_CLIP;
+
+	if (is_src_img_used || is_src_mask_used) {
+		if (!validate_rect(&req->src_rect)) {
+			b2r2_log_info("Validation Error: "
+					"!validate_rect(&req->src_rect)\n");
+			return false;
+		}
+	}
+
+	if (!validate_rect(&req->dst_rect)) {
+		b2r2_log_info("Validation Error: "
+				"!validate_rect(&req->dst_rect)\n");
+		return false;
+	}
+
+	if (is_dst_clip_rect_used) {
+		if (!validate_rect(&req->dst_clip_rect)) {
+			b2r2_log_info("Validation Error: "
+					"!validate_rect(&req->dst_clip_rect)\n");
+			return false;
+		}
+	}
+
+	if (is_src_img_used) {
+		struct b2r2_blt_rect src_img_bounding_rect;
+
+		if (!validate_img(&req->src_img)) {
+			b2r2_log_info("Validation Error: "
+					"!validate_img(&req->src_img)\n");
+			return false;
+		}
+
+		b2r2_get_img_bounding_rect(&req->src_img,
+				&src_img_bounding_rect);
+		if (!b2r2_is_rect_inside_rect(&req->src_rect,
+					&src_img_bounding_rect)) {
+			b2r2_log_info("Validation Error: "
+				"!b2r2_is_rect_inside_rect(&req->src_rect, "
+				"&src_img_bounding_rect)\n");
+			return false;
+		}
+	}
+
+	if (is_src_mask_used) {
+		struct b2r2_blt_rect src_mask_bounding_rect;
+
+		if (!validate_img(&req->src_mask)) {
+			b2r2_log_info("Validation Error: "
+					"!validate_img(&req->src_mask)\n");
+			return false;
+		}
+
+		b2r2_get_img_bounding_rect(&req->src_mask,
+				&src_mask_bounding_rect);
+		if (!b2r2_is_rect_inside_rect(&req->src_rect,
+					&src_mask_bounding_rect)) {
+			b2r2_log_info("Validation Error: "
+				"!b2r2_is_rect_inside_rect(&req->src_rect, "
+					"&src_mask_bounding_rect)\n");
+			return false;
+		}
+	}
+
+	if (!validate_img(&req->dst_img)) {
+		b2r2_log_info("Validation Error: "
+				"!validate_img(&req->dst_img)\n");
+		return false;
+	}
+
+	return true;
+}
diff --git a/drivers/video/b2r2/b2r2_input_validation.h b/drivers/video/b2r2/b2r2_input_validation.h
new file mode 100644
index 00000000000..9a736343e06
--- /dev/null
+++ b/drivers/video/b2r2/b2r2_input_validation.h
@@ -0,0 +1,28 @@
+/*
+ * Copyright (C) ST-Ericsson AB 2010
+ *
+ * Author: Johan Mossberg <johan.xx.mossberg@stericsson.com> for ST-Ericsson
+ *
+ * This program is free software; you can redistribute it and/or modify it under
+ * the terms of the GNU General Public License as published by the Free Software
+ * Foundation; either version 2 of the License, or (at your option) any later
+ * version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
+ * FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
+ * details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
+ * Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#ifndef _LINUX_DRIVERS_VIDEO_B2R2_INPUT_VALIDATION_H_
+#define _LINUX_DRIVERS_VIDEO_B2R2_INPUT_VALIDATION_H_
+
+#include <video/b2r2_blt.h>
+
+bool b2r2_validate_user_req(struct b2r2_blt_req *req);
+
+#endif
diff --git a/drivers/video/b2r2/b2r2_internal.h b/drivers/video/b2r2/b2r2_internal.h
new file mode 100644
index 00000000000..18556e7193a
--- /dev/null
+++ b/drivers/video/b2r2/b2r2_internal.h
@@ -0,0 +1,360 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2010
+ *
+ * ST-Ericsson B2R2 internal definitions
+ *
+ * Author: Robert Fekete <robert.fekete@stericsson.com>
+ * Author: Paul Wannback
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+
+#ifndef _LINUX_DRIVERS_VIDEO_B2R2_INTERNAL_H_
+#define _LINUX_DRIVERS_VIDEO_B2R2_INTERNAL_H_
+
+
+#include <video/b2r2_blt.h>
+
+#include "b2r2_core.h"
+#include "b2r2_global.h"
+
+#include "b2r2_hw.h"
+
+/* The maximum possible number of temporary buffers needed */
+#define MAX_TMP_BUFS_NEEDED 2
+
+/* Size of the color look-up table */
+#define CLUT_SIZE 1024
+
+/**
+ * b2r2_blt_device() - Returns the device associated with B2R2 BLT.
+ *                     Mainly for debugging with dev_... functions.
+ *
+ * Returns the device pointer or NULL
+ */
+struct device *b2r2_blt_device(void);
+
+/**
+ * struct b2r2_blt_instance - Represents the B2R2 instance (one per open)
+ *
+ * @lock: Lock to protect the instance
+ *
+ * @report_list: Ready requests that should be reported,
+ * @report_list_waitq: Wait queue for report list
+ * @no_of_active_requests: Number of requests added but not reported
+ *                         in callback.
+ * @synching: true if any client is waiting for b2r2_blt_synch(0)
+ * @synch_done_waitq: Wait queue to handle synching on request_id 0
+ */
+struct b2r2_blt_instance {
+	struct mutex lock;
+
+	/* Requests to be reported */
+	struct list_head report_list;
+	wait_queue_head_t report_list_waitq;
+
+	/* Below for synching */
+	u32 no_of_active_requests;
+	bool synching;
+	wait_queue_head_t synch_done_waitq;
+};
+
+/**
+ * struct b2r2_node - Represents a B2R2 node with reqister values, executed
+ *                    by B2R2. Should be allocated non-cached.
+ *
+ * @next: Next node
+ * @physical_address: Physical address to be given to B2R2
+ *                    (physical address of "node" member below)
+ * @node: The B2R2 node with register settings. This is the data
+ *        that B2R2 will use.
+ *
+ */
+struct b2r2_node {
+	struct b2r2_node *next;
+	u32 physical_address;
+
+	int src_tmp_index;
+	int dst_tmp_index;
+
+	int src_index;
+
+	/* B2R2 regs comes here */
+	struct b2r2_link_list node;
+};
+
+/**
+ * struct b2r2_resolved_buf - Contains calculated information about
+ *                            image buffers.
+ *
+ * @physical_address: Physical address of the buffer
+ * @virtual_address: Virtual address of the buffer
+ * @is_pmem: true if buffer is from pmem
+ * @hwmem_session: Hwmem session
+ * @hwmem_alloc: Hwmem alloc
+ * @filep: File pointer of mapped file (like pmem device, frame buffer device)
+ * @file_physical_start: Physical address of file start
+ * @file_virtual_start: Virtual address of file start
+ * @file_len: File len
+ *
+ */
+struct b2r2_resolved_buf {
+	u32                   physical_address;
+	void                 *virtual_address;
+	bool                  is_pmem;
+	struct hwmem_alloc   *hwmem_alloc;
+	/* Data for validation below */
+	struct file          *filep;
+	u32                   file_physical_start;
+	u32                   file_virtual_start;
+	u32                   file_len;
+};
+
+
+/**
+ * b2r2_work_buf - specification for a temporary work buffer
+ *
+ * @size      - the size of the buffer (set by b2r2_node_split)
+ * @phys_addr - the physical address of the buffer (set by b2r2_blt_main)
+ */
+struct b2r2_work_buf {
+	u32 size;
+	u32 phys_addr;
+	void *virt_addr;
+	u32 mem_handle;
+};
+
+
+/**
+ * b2r2_op_type - the type of B2R2 operation to configure
+ */
+enum b2r2_op_type {
+	B2R2_DIRECT_COPY,
+	B2R2_DIRECT_FILL,
+	B2R2_COPY,
+	B2R2_FILL,
+	B2R2_SCALE,
+	B2R2_ROTATE,
+	B2R2_SCALE_AND_ROTATE,
+	B2R2_FLIP,
+};
+
+/**
+ * b2r2_fmt_type - the type of buffer for a given format
+ */
+enum b2r2_fmt_type {
+	B2R2_FMT_TYPE_RASTER,
+	B2R2_FMT_TYPE_SEMI_PLANAR,
+	B2R2_FMT_TYPE_PLANAR,
+};
+
+/**
+ * b2r2_fmt_conv - the type of format conversion to do
+ */
+enum b2r2_fmt_conv {
+	B2R2_FMT_CONV_NONE,
+	B2R2_FMT_CONV_RGB_TO_YUV,
+	B2R2_FMT_CONV_YUV_TO_RGB,
+	B2R2_FMT_CONV_YUV_TO_YUV,
+	B2R2_FMT_CONV_RGB_TO_BGR,
+	B2R2_FMT_CONV_BGR_TO_RGB,
+	B2R2_FMT_CONV_YUV_TO_BGR,
+	B2R2_FMT_CONV_BGR_TO_YUV,
+};
+
+/**
+ * b2r2_node_split_buf - information about a source or destination buffer
+ *
+ * @addr            - the physical base address
+ * @chroma_addr     - the physical address of the chroma plane
+ * @chroma_cr_addr  - the physical address of the Cr chroma plane
+ * @fmt             - the buffer format
+ * @fmt_type        - the buffer format type
+ * @rect            - the rectangle of the buffer to use
+ * @color           - the color value to use is case of a fill operation
+ * @pitch           - the pixmap byte pitch
+ * @height          - the pixmap height
+ * @alpha_range     - the alpha range of the buffer (0-128 or 0-255)
+ * @hso             - the horizontal scan order
+ * @vso             - the vertical scan order
+ * @endian          - the endianess of the buffer
+ * @plane_selection - the plane to write if buffer is planar or semi-planar
+ */
+struct b2r2_node_split_buf {
+	u32 addr;
+	u32 chroma_addr;
+	u32 chroma_cr_addr;
+
+	enum b2r2_blt_fmt fmt;
+	enum b2r2_fmt_type type;
+
+	struct b2r2_blt_rect rect;
+	struct b2r2_blt_rect win;
+
+	s32 dx;
+	s32 dy;
+
+	u32 color;
+	u16 pitch;
+	u16 width;
+	u16 height;
+
+	enum b2r2_ty alpha_range;
+	enum b2r2_ty hso;
+	enum b2r2_ty vso;
+	enum b2r2_ty endian;
+	enum b2r2_tty dither;
+
+	/* Plane selection (used when writing to a multibuffer format) */
+	enum b2r2_tty plane_selection;
+
+	/* Chroma plane selection (used when writing planar formats) */
+	enum b2r2_tty chroma_selection;
+
+	int tmp_buf_index;
+};
+
+/**
+ * b2r2_node_split_job - an instance of a node split job
+ *
+ * @type          - the type of operation
+ * @ivmx          - the ivmx matrix to use for color conversion
+ * @blend         - determines if blending is enabled
+ * @clip          - determines if destination clipping is enabled
+ * @swap_fg_bg    - determines if FG and BG should be swapped when blending
+ * @flags         - the flags passed in the blt request
+ * @flag_param    - parameter required by certain flags,
+ *                  e.g. color for source color keying.
+ * @transform     - the transforms passed in the blt request
+ * @global_alpha  - the global alpha
+ * @clip_rect     - the clipping rectangle to use
+ * @horiz_rescale - determmines if horizontal rescaling is enabled
+ * @horiz_sf      - the horizontal scale factor
+ * @vert_rescale  - determines if vertical rescale is enabled
+ * @vert_sf       - the vertical scale factor
+ * @src           - the incoming source buffer
+ * @dst           - the outgoing destination buffer
+ * @work_bufs     - work buffer specifications
+ * @tmp_bufs      - temporary buffers
+ * @buf_count     - the number of temporary buffers used for the job
+ * @node_count    - the number of nodes used for the job
+ * @max_buf_size  - the maximum size of temporary buffers
+ * @nbr_rows      - the number of tile rows in the blit operation
+ * @nbr_cols      - the number of time columns in the blit operation
+ */
+struct b2r2_node_split_job {
+	enum b2r2_op_type type;
+
+	const u32 *ivmx;
+
+	bool blend;
+	bool clip;
+	bool rotation;
+
+	bool swap_fg_bg;
+
+	u32 flags;
+	u32 flag_param;
+	u32 transform;
+	u32 global_alpha;
+
+	struct b2r2_blt_rect clip_rect;
+
+	bool h_rescale;
+	u16 h_rsf;
+
+	bool v_rescale;
+	u16 v_rsf;
+
+	struct b2r2_node_split_buf src;
+	struct b2r2_node_split_buf dst;
+
+	struct b2r2_work_buf work_bufs[MAX_TMP_BUFS_NEEDED];
+	struct b2r2_node_split_buf tmp_bufs[MAX_TMP_BUFS_NEEDED];
+
+	u32 buf_count;
+	u32 node_count;
+	u32 max_buf_size;
+};
+
+/**
+ * struct b2r2_blt_request - Represents one B2R2 blit request
+ *
+ * @instance: Back pointer to the instance structure
+ * @list: List item to keep track of requests per instance
+ * @user_req: The request received from userspace
+ * @job: The administration structure for the B2R2 job,
+ *       consisting of one or more nodes
+ * @node_split_job: The administration structure for the B2R2 node split job
+ * @first_node: Pointer to the first B2R2 node
+ * @request_id: Request id for this job
+ * @node_split_handle: Handle of the node split
+ * @src_resolved: Calculated info about the source buffer
+ * @src_mask_resolved: Calculated info about the source mask buffer
+ * @dst_resolved: Calculated info about the destination buffer
+ * @profile: True if the blit shall be profiled, false otherwise
+ */
+struct b2r2_blt_request {
+	struct b2r2_blt_instance   *instance;
+	struct list_head           list;
+	struct b2r2_blt_req        user_req;
+	struct b2r2_core_job       job;
+	struct b2r2_node_split_job node_split_job;
+	struct b2r2_node           *first_node;
+	int                        request_id;
+
+	/* Resolved buffer addresses */
+	struct b2r2_resolved_buf src_resolved;
+	struct b2r2_resolved_buf src_mask_resolved;
+	struct b2r2_resolved_buf dst_resolved;
+
+	/* TBD: Info about SRAM usage & needs */
+	struct b2r2_work_buf *bufs;
+	u32 buf_count;
+
+	/* color look-up table */
+	void *clut;
+	u32 clut_phys_addr;
+
+	/* Profiling stuff */
+	bool profile;
+
+	s32 nsec_active_in_cpu;
+
+	u32 start_time_nsec;
+	s32 total_time_nsec;
+};
+
+/* FIXME: The functions below should be removed when we are
+   switching to the new Robert Lind allocator */
+
+/**
+ * b2r2_blt_alloc_nodes() - Allocate nodes
+ *
+ * @node_count: Number of nodes to allocate
+ *
+ * Return:
+ *   Returns a pointer to the first node in the node list.
+ */
+struct b2r2_node *b2r2_blt_alloc_nodes(int node_count);
+
+/**
+ * b2r2_blt_free_nodes() - Release nodes previously allocated via
+ *                         b2r2_generate_nodes
+ *
+ * @first_node: First node in linked list of nodes
+ */
+void b2r2_blt_free_nodes(struct b2r2_node *first_node);
+
+/**
+ * b2r2_blt_module_init() - Initialize the B2R2 blt module
+ */
+int b2r2_blt_module_init(void);
+
+/**
+ * b2r2_blt_module_exit() - Un-initialize the B2R2 blt module
+ */
+void b2r2_blt_module_exit(void);
+
+#endif
diff --git a/drivers/video/b2r2/b2r2_kernel_if.c b/drivers/video/b2r2/b2r2_kernel_if.c
new file mode 100644
index 00000000000..373311ccca5
--- /dev/null
+++ b/drivers/video/b2r2/b2r2_kernel_if.c
@@ -0,0 +1,37 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2010
+ *
+ * ST-Ericsson B2R2 kernel interface for beeing a separate module
+ *
+ * Author: Robert Fekete <robert.fekete@stericsson.com>
+ * Author: Paul Wannback
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/fs.h>
+#include <linux/file.h>
+#include <linux/poll.h>
+#include <linux/device.h>
+#include <linux/miscdevice.h>
+#include <linux/list.h>
+#ifdef CONFIG_ANDROID_PMEM
+#include <linux/android_pmem.h>
+#endif
+#include <linux/fb.h>
+#include <linux/sched.h>
+#include <asm/uaccess.h>
+#include <asm/cacheflush.h>
+
+EXPORT_SYMBOL(fget_light);
+EXPORT_SYMBOL(fput_light);
+EXPORT_SYMBOL(flush_cache_range);
+EXPORT_SYMBOL(task_sched_runtime);
+#ifdef CONFIG_ANDROID_PMEM
+EXPORT_SYMBOL(get_pmem_file);
+EXPORT_SYMBOL(put_pmem_file);
+EXPORT_SYMBOL(flush_pmem_file);
+#endif
diff --git a/drivers/video/b2r2/b2r2_mem_alloc.c b/drivers/video/b2r2/b2r2_mem_alloc.c
new file mode 100644
index 00000000000..0dcd9b6a55e
--- /dev/null
+++ b/drivers/video/b2r2/b2r2_mem_alloc.c
@@ -0,0 +1,726 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2010
+ *
+ * ST-Ericsson B2R2 internal Memory allocator
+ *
+ * Author: Robert Lind <robert.lind@stericsson.com>
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+#include <linux/fs.h>
+#include <linux/list.h>
+#include <linux/debugfs.h>
+#include <linux/uaccess.h>
+#include <linux/io.h>
+#include <linux/slab.h>
+#include <linux/dma-mapping.h>
+#include <linux/dmapool.h>
+
+#include "b2r2_internal.h"
+#include "b2r2_mem_alloc.h"
+
+
+/* Represents one block of b2r2 physical memory, free or allocated */
+struct b2r2_mem_block {
+	struct list_head list; /* For membership in list */
+
+	u32 offset;        /* Offset in b2r2 physical memory area (aligned) */
+	u32 size;          /* Size of the object (requested size if busy,
+			      else actual) */
+	bool free;         /* True if the block is free */
+
+	u32 lock_count;    /* Lock count */
+
+#ifdef CONFIG_DEBUG_FS
+	char          debugfs_fname[80]; /* debugfs file name */
+	struct dentry *debugfs_block;	 /* debugfs dir entry for the block */
+#endif
+};
+
+/* The memory heap */
+struct b2r2_mem_heap {
+	struct device *dev;        /* Device pointer for memory allocation  */
+	dma_addr_t start_phys_addr;/* Physical memory start address         */
+	void *start_virt_ptr;      /* Virtual pointer to start              */
+	u32 size;                  /* Memory size                           */
+	u32 align;                 /* Alignment                             */
+
+	struct list_head blocks;   /* List of all blocks                    */
+
+	spinlock_t heap_lock;      /* Protection for the heap               */
+
+	u32 node_size;             /* Size of each B2R2 node                */
+	struct dma_pool *node_heap;/* Heap for B2R2 node allocations        */
+
+#ifdef CONFIG_DEBUG_FS
+	struct dentry *debugfs_sub_root_dir; /* debugfs: B2R2 MEM root dir  */
+	struct dentry *debugfs_heap_stats;   /* debugfs: B2R2 memory status */
+	struct dentry *debugfs_dir_blocks;   /* debugfs: Free blocks dir    */
+#endif
+};
+
+static struct b2r2_mem_heap *mem_heap;
+
+#ifdef CONFIG_DEBUG_FS
+static struct dentry *debugfs_root_dir;      /* debugfs: B2R2 MEM root dir */
+#endif
+
+/* Forward declarations */
+static struct b2r2_mem_block *b2r2_mem_block_alloc(
+	u32 offset, u32 size, bool free);
+static void   b2r2_mem_block_free(struct b2r2_mem_block *mem_block);
+
+/* Align value down to specified alignment */
+static inline u32 align_down(u32 align, u32 value)
+{
+	return value & ~(align - 1);
+}
+
+/* Align value up to specified alignment */
+static inline u32 align_up(u32 align, u32 value)
+{
+	return (value + align - 1) & ~(align - 1);
+}
+
+
+#ifdef CONFIG_DEBUG_FS
+/* About debugfs:
+ *  debugfs is a mountable debug file system.
+ *
+ *  Mount like this:
+ *  mkdir /debug
+ *  mount -t debugfs none /debug
+ *  ls /debug/b2r2_mem
+ *
+ *  ls -al /debug/b2r2_mem/blocks
+ *  cat /debug/b2r2_mem/stats
+ */
+
+
+/* Create string containing memory heap status */
+static char *get_b2r2_mem_stats(struct b2r2_mem_heap *mem_heap, char *buf)
+{
+	struct b2r2_mem_heap_status mem_heap_status;
+
+	if (b2r2_mem_heap_status(&mem_heap_status) != 0) {
+		strcpy(buf, "Error, failed to get status\n");
+		return buf;
+	}
+
+	sprintf(buf,
+		"Handle                 : 0x%lX\n"
+		"Physical start address : 0x%lX\n"
+		"Size                   : %lu\n"
+		"Align                  : %lu\n"
+		"No of blocks allocated : %lu\n"
+		"Allocated size         : %lu\n"
+		"No of free blocks      : %lu\n"
+		"Free size              : %lu\n"
+		"No of locks            : %lu\n"
+		"No of locked           : %lu\n"
+		"No of nodes            : %lu\n",
+		(unsigned long) mem_heap,
+		(unsigned long) mem_heap_status.start_phys_addr,
+		(unsigned long) mem_heap_status.size,
+		(unsigned long) mem_heap_status.align,
+		(unsigned long) mem_heap_status.num_alloc,
+		(unsigned long) mem_heap_status.allocated_size,
+		(unsigned long) mem_heap_status.num_free,
+		(unsigned long) mem_heap_status.free_size,
+		(unsigned long) mem_heap_status.num_locks,
+		(unsigned long) mem_heap_status.num_locked,
+		(unsigned long) mem_heap_status.num_nodes);
+
+	return buf;
+}
+
+/*
+ * Print memory heap status on file
+ * (Use like "cat /debug/b2r2_mem/igram/stats")
+ */
+static int debugfs_b2r2_mem_stats_read(struct file *filp, char __user *buf,
+				       size_t count, loff_t *f_pos)
+{
+	struct b2r2_mem_heap *mem_heap = filp->f_dentry->d_inode->i_private;
+	char Buf[400];
+	size_t dev_size;
+	int ret = 0;
+
+	get_b2r2_mem_stats(mem_heap, Buf);
+	dev_size = strlen(Buf);
+
+	/* No more to read if offset != 0 */
+	if (*f_pos > dev_size)
+		goto out;
+
+	if (*f_pos + count > dev_size)
+		count = dev_size - *f_pos;
+
+	if (copy_to_user(buf, Buf, count))
+		ret = -EINVAL;
+	*f_pos += count;
+	ret = count;
+
+out:
+	return ret;
+}
+
+/* debugfs file operations for the "stats" file */
+static const struct file_operations debugfs_b2r2_mem_stats_fops = {
+	.owner = THIS_MODULE,
+	.read  = debugfs_b2r2_mem_stats_read,
+};
+
+/* read function for file in the "blocks" sub directory */
+static int debugfs_b2r2_mem_block_read(struct file *filp, char __user *buf,
+				       size_t count, loff_t *f_pos)
+{
+	struct b2r2_mem_block *mem_block = filp->f_dentry->d_inode->i_private;
+	char Buf[200];
+	size_t dev_size;
+	int ret = 0;
+
+	dev_size = sprintf(Buf, "offset: %08lX %s size: %8d "
+			   "lock_count: %2d\n",
+			   (unsigned long) mem_block->offset,
+			   mem_block->free ? "free" : "allc",
+			   mem_block->size,
+			   mem_block->lock_count);
+
+	/* No more to read if offset != 0 */
+	if (*f_pos > dev_size)
+		goto out;
+
+	if (*f_pos + count > dev_size)
+		count = dev_size - *f_pos;
+
+	if (copy_to_user(buf, Buf, count))
+		ret = -EINVAL;
+	*f_pos += count;
+	ret = count;
+
+out:
+	return ret;
+}
+
+/* debugfs file operations for files in the "blocks" directory */
+static const struct file_operations debugfs_b2r2_mem_block_fops = {
+	.owner = THIS_MODULE,
+	.read  = debugfs_b2r2_mem_block_read,
+};
+
+/*
+ * Create or update the debugfs directory entry for a file in the
+ * "blocks" directory (a memory allocation)
+ */
+void debugfs_create_mem_block_entry(struct b2r2_mem_block *mem_block,
+				    struct dentry *parent)
+{
+	struct timespec tm = current_kernel_time();
+	struct timespec atime = tm;
+	struct timespec mtime = tm;
+	struct timespec ctime = tm;
+
+	if (mem_block->debugfs_block) {
+		atime = mem_block->debugfs_block->d_inode->i_atime;
+		ctime = mem_block->debugfs_block->d_inode->i_ctime;
+		debugfs_remove(mem_block->debugfs_block);
+	}
+
+	/* Add the block in debugfs */
+	if (mem_block->free)
+		sprintf(mem_block->debugfs_fname, "%08lX free",
+			(unsigned long) mem_block->offset);
+	else {
+		sprintf(mem_block->debugfs_fname, "%08lX allc h:%08lX "
+			"lck:%d ",
+			(unsigned long) mem_block->offset,
+			(unsigned long) mem_block,
+			mem_block->lock_count);
+	}
+
+	mem_block->debugfs_block = debugfs_create_file(
+		mem_block->debugfs_fname,
+		0444, parent, mem_block,
+		&debugfs_b2r2_mem_block_fops);
+	if (mem_block->debugfs_block) {
+		mem_block->debugfs_block->d_inode->i_size = mem_block->size;
+		mem_block->debugfs_block->d_inode->i_atime = atime;
+		mem_block->debugfs_block->d_inode->i_mtime = mtime;
+		mem_block->debugfs_block->d_inode->i_ctime = ctime;
+	}
+}
+#endif   /* CONFIG_DEBUG_FS */
+
+/* Module initialization function */
+int b2r2_mem_init(struct device *dev, u32 heap_size, u32 align, u32 node_size)
+{
+	struct b2r2_mem_block *mem_block;
+	u32 aligned_size;
+
+	printk(KERN_INFO "B2R2_MEM: Creating heap for size %d bytes\n",
+		(int) heap_size);
+
+	/* Align size */
+	aligned_size = align_down(align, heap_size);
+	if (aligned_size == 0)
+		return -EINVAL;
+
+	mem_heap = kcalloc(sizeof(struct b2r2_mem_heap), 1, GFP_KERNEL);
+	if (!mem_heap)
+		return -ENOMEM;
+
+	mem_heap->start_virt_ptr = dma_alloc_coherent(dev,
+		aligned_size, &(mem_heap->start_phys_addr), GFP_KERNEL);
+	if (!mem_heap->start_phys_addr || !mem_heap->start_virt_ptr) {
+		printk(KERN_ERR "B2R2_MEM: Failed to allocate memory\n");
+		return -ENOMEM;
+	}
+
+	/* Initialize the heap */
+	mem_heap->dev   = dev;
+	mem_heap->size  = aligned_size;
+	mem_heap->align = align;
+
+	INIT_LIST_HEAD(&mem_heap->blocks);
+
+#ifdef CONFIG_DEBUG_FS
+	/* Register debugfs */
+
+	debugfs_root_dir = debugfs_create_dir("b2r2_mem", NULL);
+
+	mem_heap->debugfs_sub_root_dir = debugfs_create_dir("b2r2_mem",
+		debugfs_root_dir);
+	mem_heap->debugfs_heap_stats = debugfs_create_file(
+		"stats", 0444, mem_heap->debugfs_sub_root_dir, mem_heap,
+		&debugfs_b2r2_mem_stats_fops);
+	mem_heap->debugfs_dir_blocks = debugfs_create_dir(
+		"blocks", mem_heap->debugfs_sub_root_dir);
+#endif
+
+	/* Create the first _free_ memory block */
+	mem_block = b2r2_mem_block_alloc(0, aligned_size, true);
+	if (!mem_block) {
+		dma_free_coherent(dev, aligned_size,
+			mem_heap->start_virt_ptr,
+			mem_heap->start_phys_addr);
+		kfree(mem_heap);
+		printk(KERN_ERR "B2R2_MEM: Failed to allocate memory\n");
+		return -ENOMEM;
+	}
+
+	/* Add the free block to the blocks list */
+	list_add(&mem_block->list, &mem_heap->blocks);
+
+	/* Allocate separate heap for B2R2 nodes */
+	mem_heap->node_size = node_size;
+	mem_heap->node_heap = dma_pool_create("b2r2_node_cache",
+		dev, node_size, align, 4096);
+	if (!mem_heap->node_heap) {
+		b2r2_mem_block_free(mem_block);
+		dma_free_coherent(dev, aligned_size,
+			mem_heap->start_virt_ptr,
+			mem_heap->start_phys_addr);
+		kfree(mem_heap);
+		printk(KERN_ERR "B2R2_MEM: Failed to allocate memory\n");
+		return -ENOMEM;
+	}
+
+	return 0;
+}
+EXPORT_SYMBOL(b2r2_mem_init);
+
+/* Module exit function */
+void b2r2_mem_exit(void)
+{
+	struct list_head *ptr;
+
+	/* Free B2R2 node heap */
+	dma_pool_destroy(mem_heap->node_heap);
+
+#ifdef CONFIG_DEBUG_FS
+	/* debugfs root dir */
+	if (debugfs_root_dir) {
+		debugfs_remove_recursive(debugfs_root_dir);
+		debugfs_root_dir = NULL;
+	}
+#endif
+
+	list_for_each(ptr, &mem_heap->blocks) {
+		struct b2r2_mem_block *mem_block =
+			list_entry(ptr, struct b2r2_mem_block, list);
+
+		b2r2_mem_block_free(mem_block);
+	}
+
+	dma_free_coherent(mem_heap->dev, mem_heap->size,
+		mem_heap->start_virt_ptr,
+		mem_heap->start_phys_addr);
+	kfree(mem_heap);
+}
+EXPORT_SYMBOL(b2r2_mem_exit);
+
+/* Return status of the heap */
+int b2r2_mem_heap_status(struct b2r2_mem_heap_status *mem_heap_status)
+{
+	struct list_head *ptr;
+
+	if (!mem_heap || !mem_heap_status)
+		return -EINVAL;
+	memset(mem_heap_status, 0, sizeof(*mem_heap_status));
+
+	/* Lock the heap */
+	spin_lock(&mem_heap->heap_lock);
+
+	/* Fill in static info */
+	mem_heap_status->start_phys_addr = mem_heap->start_phys_addr;
+	mem_heap_status->size = mem_heap->size;
+	mem_heap_status->align = mem_heap->align;
+
+	list_for_each(ptr, &mem_heap->blocks) {
+		struct b2r2_mem_block *mem_block =
+			list_entry(ptr, struct b2r2_mem_block, list);
+
+		if (mem_block->free) {
+			mem_heap_status->num_free++;
+			mem_heap_status->free_size += mem_block->size;
+		} else {
+			if (mem_block->lock_count) {
+				mem_heap_status->num_locked++;
+				mem_heap_status->num_locks +=
+					mem_block->lock_count;
+			}
+			mem_heap_status->num_alloc++;
+			mem_heap_status->allocated_size += mem_block->size;
+		}
+	}
+
+	spin_unlock(&mem_heap->heap_lock);
+
+	return 0;
+}
+EXPORT_SYMBOL(b2r2_mem_heap_status);
+
+/* Internal: Allocate a housekeeping structure
+ * for an allocated or free memory block
+ */
+static struct b2r2_mem_block *b2r2_mem_block_alloc(
+	u32 offset, u32 size, bool free)
+{
+	struct b2r2_mem_block *mem_block = kmalloc(
+		sizeof(struct b2r2_mem_block), GFP_KERNEL);
+
+	if (mem_block) {
+		mem_block->offset     = offset;
+		mem_block->size       = size;
+		mem_block->free       = free;
+		mem_block->lock_count = 0;
+
+		INIT_LIST_HEAD(&mem_block->list);
+
+#ifdef CONFIG_DEBUG_FS
+		mem_block->debugfs_block  = NULL;
+		/* Add the block in debugfs */
+		debugfs_create_mem_block_entry(mem_block,
+			mem_heap->debugfs_dir_blocks);
+#endif
+	}
+
+	return mem_block;
+}
+
+/* Internal: Release housekeeping structure */
+static void b2r2_mem_block_free(struct b2r2_mem_block *mem_block)
+{
+	if (mem_block) {
+#ifdef CONFIG_DEBUG_FS
+		debugfs_remove(mem_block->debugfs_block);
+#endif
+		kfree(mem_block);
+	}
+}
+
+/* Allocate a block from the heap */
+int b2r2_mem_alloc(u32 requested_size, u32 *returned_size, u32 *mem_handle)
+{
+	int ret = 0;
+	struct list_head *ptr;
+	struct b2r2_mem_block *found_mem_block = NULL;
+	u32 aligned_size;
+
+	if (!mem_handle)
+		return -EINVAL;
+
+	printk(KERN_INFO "%s: size=%d\n", __func__, requested_size);
+
+	*mem_handle = 0;
+	if (!mem_heap)
+		return -EINVAL;
+
+	/* Lock the heap */
+	spin_lock(&mem_heap->heap_lock);
+
+	aligned_size = align_up(mem_heap->align, requested_size);
+	/* Try to find the best matching free block of suitable size */
+	list_for_each(ptr, &mem_heap->blocks) {
+		struct b2r2_mem_block *mem_block =
+			list_entry(ptr, struct b2r2_mem_block, list);
+
+		if (mem_block->free && mem_block->size >= aligned_size &&
+			(!found_mem_block ||
+			 mem_block->size < found_mem_block->size)) {
+			found_mem_block = mem_block;
+			if (found_mem_block->size == aligned_size)
+				break;
+		}
+	}
+
+	if (found_mem_block) {
+		struct b2r2_mem_block *new_block
+			= b2r2_mem_block_alloc(found_mem_block->offset,
+				requested_size, false);
+
+		if (new_block) {
+			/* Insert the new block before the found block */
+			list_add_tail(&new_block->list,
+				&found_mem_block->list);
+
+			/* Split the free block */
+			found_mem_block->offset += aligned_size;
+			found_mem_block->size   -= aligned_size;
+
+			if (found_mem_block->size == 0)
+				b2r2_mem_block_free(found_mem_block);
+			else {
+#ifdef CONFIG_DEBUG_FS
+				debugfs_create_mem_block_entry(
+					found_mem_block,
+					mem_heap->debugfs_dir_blocks);
+#endif
+			}
+
+			*mem_handle = (u32) new_block;
+			*returned_size = aligned_size;
+		} else {
+			ret = -ENOMEM;
+		}
+	} else
+		ret = -ENOMEM;
+
+	if (ret != 0) {
+		*returned_size = 0;
+		*mem_handle = (u32) 0;
+	}
+
+	/* Unlock */
+	spin_unlock(&mem_heap->heap_lock);
+
+	return ret;
+}
+EXPORT_SYMBOL(b2r2_mem_alloc);
+
+/* Free the allocated block */
+int b2r2_mem_free(u32 mem_handle)
+{
+	int ret = 0;
+	struct b2r2_mem_block *mem_block = (struct b2r2_mem_block *) mem_handle;
+
+	if (!mem_block)
+		return -EINVAL;
+
+	/* Lock the heap */
+	spin_lock(&mem_heap->heap_lock);
+
+	if (!ret && mem_block->free)
+		ret = -EINVAL;
+
+	if (!ret) {
+		printk(KERN_INFO "%s: freeing block 0x%p\n", __func__, mem_block);
+		/* Release the block */
+
+		mem_block->free = true;
+		mem_block->size = align_up(mem_heap->align,
+					   mem_block->size);
+
+		/* Join with previous block if possible */
+		if (mem_block->list.prev != &mem_heap->blocks) {
+			struct b2r2_mem_block *prev_block =
+				list_entry(mem_block->list.prev,
+					struct b2r2_mem_block, list);
+
+			if (prev_block->free &&
+			    (prev_block->offset + prev_block->size) ==
+			    mem_block->offset) {
+				mem_block->offset = prev_block->offset;
+				mem_block->size   += prev_block->size;
+
+				b2r2_mem_block_free(prev_block);
+			}
+		}
+
+		/* Join with next block if possible */
+		if (mem_block->list.next != &mem_heap->blocks) {
+			struct b2r2_mem_block *next_block
+				= list_entry(mem_block->list.next,
+						 struct b2r2_mem_block,
+						 list);
+
+			if (next_block->free &&
+			    (mem_block->offset + mem_block->size) ==
+			    next_block->offset) {
+				mem_block->size   += next_block->size;
+
+				b2r2_mem_block_free(next_block);
+			}
+		}
+#ifdef CONFIG_DEBUG_FS
+		debugfs_create_mem_block_entry(mem_block,
+			mem_heap->debugfs_dir_blocks);
+#endif
+	}
+
+	/* Unlock */
+	spin_unlock(&mem_heap->heap_lock);
+
+	return ret;
+}
+EXPORT_SYMBOL(b2r2_mem_free);
+
+/* Lock the allocated block in memory */
+int b2r2_mem_lock(u32 mem_handle, u32 *phys_addr, void **virt_ptr, u32 *size)
+{
+	struct b2r2_mem_block *mem_block =
+		(struct b2r2_mem_block *) mem_handle;
+
+	if (!mem_block)
+		return -EINVAL;
+
+	/* Lock the heap */
+	spin_lock(&mem_heap->heap_lock);
+
+	mem_block->lock_count++;
+
+	if (phys_addr)
+		*phys_addr = mem_heap->start_phys_addr + mem_block->offset;
+	if (virt_ptr)
+		*virt_ptr = (char *) mem_heap->start_virt_ptr +
+			mem_block->offset;
+	if (size)
+		*size = align_up(mem_heap->align, mem_block->size);
+#ifdef CONFIG_DEBUG_FS
+	debugfs_create_mem_block_entry(mem_block,
+		mem_heap->debugfs_dir_blocks);
+#endif
+
+	spin_unlock(&mem_heap->heap_lock);
+
+	return 0;
+}
+EXPORT_SYMBOL(b2r2_mem_lock);
+
+/* Unlock the allocated block in memory */
+int b2r2_mem_unlock(u32 mem_handle)
+{
+	struct b2r2_mem_block *mem_block =
+		(struct b2r2_mem_block *) mem_handle;
+
+	if (!mem_block)
+		return -EINVAL;
+
+	/* Lock the heap */
+	spin_lock(&mem_heap->heap_lock);
+
+	mem_block->lock_count--;
+
+	spin_unlock(&mem_heap->heap_lock);
+
+	/* debugfs will be updated in release */
+	return 0;
+/*	return b2r2_mem_free(mem_handle);*/
+}
+EXPORT_SYMBOL(b2r2_mem_unlock);
+
+/* Allocate one or more b2r2 nodes from DMA pool */
+int b2r2_node_alloc(u32 num_nodes, struct b2r2_node **first_node)
+{
+	int i;
+	int ret = 0;
+	u32 physical_address;
+	struct b2r2_node *first_node_ptr;
+	struct b2r2_node *node_ptr;
+
+	/* Check input parameters */
+	if ((num_nodes <= 0) || !first_node) {
+		printk(KERN_ERR
+			"B2R2_MEM: Invalid parameter for b2r2_node_alloc, "
+			"num_nodes=%d, first_node=%ld\n",
+			(int) num_nodes, (long) first_node);
+		return -EINVAL;
+	}
+
+	/* Allocate the first node */
+	first_node_ptr = dma_pool_alloc(mem_heap->node_heap,
+		GFP_DMA | GFP_KERNEL, &physical_address);
+	if (first_node_ptr) {
+		/* Initialize first node */
+		first_node_ptr->next = NULL;
+		first_node_ptr->physical_address = physical_address +
+			offsetof(struct b2r2_node, node);
+
+		/* Allocate and initialize remaining nodes, */
+		/* and link them into a list                */
+		for (i = 1, node_ptr = first_node_ptr; i < num_nodes; i++) {
+			node_ptr->next = dma_pool_alloc(mem_heap->node_heap,
+				GFP_DMA | GFP_KERNEL, &physical_address);
+			if (node_ptr->next) {
+				node_ptr = node_ptr->next;
+				node_ptr->next = NULL;
+				node_ptr->physical_address = physical_address +
+					offsetof(struct b2r2_node, node);
+			} else {
+				printk(KERN_ERR "B2R2_MEM: Failed to allocate memory for node\n");
+				ret = -ENOMEM;
+				break;
+			}
+		}
+
+		/* If all nodes were allocated successfully, */
+		/* return the first node                     */
+		if (!ret)
+			*first_node = first_node_ptr;
+		else
+			b2r2_node_free(first_node_ptr);
+	} else {
+		printk(KERN_ERR "B2R2_MEM: Failed to allocate memory for node\n");
+		ret = -ENOMEM;
+	}
+
+	return ret;
+}
+EXPORT_SYMBOL(b2r2_node_alloc);
+
+/* Free a linked list of b2r2 nodes */
+void b2r2_node_free(struct b2r2_node *first_node)
+{
+	struct b2r2_node *current_node = first_node;
+	struct b2r2_node *next_node = NULL;
+
+	/* Traverse the linked list and free the nodes */
+	while (current_node != NULL) {
+		next_node = current_node->next;
+		dma_pool_free(mem_heap->node_heap, current_node,
+			current_node->physical_address -
+			offsetof(struct b2r2_node, node));
+		current_node = next_node;
+	}
+}
+EXPORT_SYMBOL(b2r2_node_free);
+
+MODULE_AUTHOR("Robert Lind <robert.lind@ericsson.com");
+MODULE_DESCRIPTION("Ericsson AB B2R2 physical memory driver");
+MODULE_LICENSE("GPL");
diff --git a/drivers/video/b2r2/b2r2_mem_alloc.h b/drivers/video/b2r2/b2r2_mem_alloc.h
new file mode 100644
index 00000000000..33309c972f5
--- /dev/null
+++ b/drivers/video/b2r2/b2r2_mem_alloc.h
@@ -0,0 +1,140 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2010
+ *
+ * ST-Ericsson B2R2 internal Memory allocator
+ *
+ * Author: Robert Lind <robert.lind@stericsson.com>
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+
+#ifndef __B2R2_MEM_ALLOC_H
+#define __B2R2_MEM_ALLOC_H
+
+#include "b2r2_internal.h"
+
+
+/**
+ * struct b2r2_mem_heap_status - Information about current state of the heap
+ * @start_phys_addr: Physical address of the the memory area
+ * @size: Size of the memory area
+ * @align: Alignment of start and allocation sizes (in bytes).
+ * @num_alloc: Number of memory allocations
+ * @allocated_size: Size allocated (sum of requested sizes)
+ * @num_free: Number of free blocks (fragments)
+ * @free_size: Free size available for allocation
+ * @num_locks: Sum of number of number of locks on memory allocations
+ * @num_locked: Number of locked memory allocations
+ * @num_nodes: Number of node allocations
+ *
+ **/
+struct b2r2_mem_heap_status {
+	u32 start_phys_addr;
+	u32 size;
+	u32 align;
+	u32 num_alloc;
+	u32 allocated_size;
+	u32 num_free;
+	u32 free_size;
+	u32 num_locks;
+	u32 num_locked;
+	u32 num_nodes;
+};
+
+
+/* B2R2 memory API (kernel) */
+
+/**
+ * b2r2_mem_init() - Initializes the B2R2 memory manager
+ * @dev: Pointer to device to use for allocating the memory heap
+ * @heap_size: Size of the heap (in bytes)
+ * @align: Alignment to use for memory allocations on heap (in bytes)
+ * @node_size: Size of each B2R2 node (in bytes)
+ *
+ * Returns 0 if success, else negative error code
+ **/
+int b2r2_mem_init(struct device *dev, u32 heap_size, u32 align, u32 node_size);
+
+/**
+ * b2r2_mem_exit() - Cleans up the B2R2 memory manager
+ *
+ **/
+void b2r2_mem_exit(void);
+
+/**
+ * b2r2_mem_heap_status() - Get information about the current heap state
+ * @mem_heap_status: Struct containing status info on succesful return
+ *
+ * Returns 0 if success, else negative error code
+ **/
+int b2r2_mem_heap_status(struct b2r2_mem_heap_status *mem_heap_status);
+
+/**
+ * b2r2_mem_alloc() - Allocates memory block from physical memory heap
+ * @requested_size: Requested size
+ * @returned_size: Actual size of memory block. Might be adjusted due to
+ *                 alignment but is always >= requested size if function
+ *                 succeeds
+ * @mem_handle: Returned memory handle
+ *
+ * All memory allocations are movable when not locked.
+ * Returns 0 if OK else negative error value
+ **/
+int b2r2_mem_alloc(u32 requested_size, u32 *returned_size, u32 *mem_handle);
+
+/**
+ * b2r2_mem_free() - Frees an allocation
+ * @mem_handle: Memory handle
+ *
+ * Returns 0 if OK else negative error value
+ **/
+int b2r2_mem_free(u32 mem_handle);
+
+/**
+ * b2r2_mem_lock() - Lock memory in memory and return physical address
+ * @mem_handle: Memory handle
+ * @phys_addr: Returned physical address to start of memory allocation.
+ *             May be NULL.
+ * @virt_ptr: Returned virtual address pointer to start of memory allocation.
+ *            May be NULL.
+ * @size: Returned size of memory allocation. May be NULL.
+ *
+ * The adress of the memory allocation is locked and the physical address
+ * is returned.
+ * The lock count is incremented by one.
+ * You need to call b2r2_mem_unlock once for each call to
+ * b2r2_mem_lock.
+ * Returns 0 if OK else negative error value
+ **/
+int b2r2_mem_lock(u32 mem_handle, u32 *phys_addr, void **virt_ptr, u32 *size);
+
+/**
+ * b2r2_mem_unlock() - Unlock previously locked memory
+ * @mem_handle: Memory handle
+ *
+ * Decrements lock count. When lock count reaches 0 the
+ * memory area is movable again.
+ * Returns 0 if OK else negative error value
+ **/
+int b2r2_mem_unlock(u32 mem_handle);
+
+/**
+ * b2r2_node_alloc() - Allocates B2R2 node from physical memory heap
+ * @num_nodes: Number of linked nodes to allocate
+ * @first_node: Returned pointer to first node in linked list
+ *
+ * Returns 0 if OK else negative error value
+ **/
+int b2r2_node_alloc(u32 num_nodes, struct b2r2_node **first_node);
+
+/**
+ * b2r2_node_free() - Frees a linked list of allocated B2R2 nodes
+ * @first_node: Pointer to first node in linked list
+ *
+ * Returns 0 if OK else negative error value
+ **/
+void b2r2_node_free(struct b2r2_node *first_node);
+
+
+#endif /* __B2R2_MEM_ALLOC_H */
diff --git a/drivers/video/b2r2/b2r2_node_gen.c b/drivers/video/b2r2/b2r2_node_gen.c
new file mode 100644
index 00000000000..f452a4b11df
--- /dev/null
+++ b/drivers/video/b2r2/b2r2_node_gen.c
@@ -0,0 +1,80 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2010
+ *
+ * ST-Ericsson B2R2 node generator
+ *
+ * Author: Robert Fekete <robert.fekete@stericsson.com>
+ * Author: Paul Wannback
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+
+#include <linux/device.h>
+#include <linux/dma-mapping.h>
+#include <asm/dma-mapping.h>
+#include "b2r2_internal.h"
+
+static void free_nodes(struct b2r2_node *first_node)
+{
+	struct b2r2_node *node = first_node;
+	int no_of_nodes = 0;
+
+	while (node) {
+		no_of_nodes++;
+		node = node->next;
+	}
+
+	dma_free_coherent(b2r2_blt_device(),
+			  no_of_nodes * sizeof(struct b2r2_node),
+			  first_node,
+			  first_node->physical_address -
+			  offsetof(struct b2r2_node, node));
+}
+
+struct b2r2_node *b2r2_blt_alloc_nodes(int no_of_nodes)
+{
+	u32 physical_address;
+	struct b2r2_node *nodes;
+	struct b2r2_node *tmpnode;
+
+	if (no_of_nodes <= 0) {
+		dev_err(b2r2_blt_device(), "%s: Wrong number of nodes (%d)",
+			__func__, no_of_nodes);
+		return NULL;
+	}
+
+	/* Allocate the memory */
+	nodes = (struct b2r2_node *) dma_alloc_coherent(b2r2_blt_device(),
+				      no_of_nodes * sizeof(struct b2r2_node),
+				      &physical_address, GFP_DMA | GFP_KERNEL);
+
+	if (nodes == NULL) {
+		dev_err(b2r2_blt_device(),
+			"%s: Failed to alloc memory for nodes",
+			__func__);
+		return NULL;
+	}
+
+	/* Build the linked list */
+	tmpnode = nodes;
+	physical_address += offsetof(struct b2r2_node, node);
+	while (no_of_nodes--) {
+		tmpnode->physical_address = physical_address;
+		if (no_of_nodes)
+			tmpnode->next = tmpnode + 1;
+		else
+			tmpnode->next = NULL;
+
+		tmpnode++;
+		physical_address += sizeof(struct b2r2_node);
+	}
+
+	return nodes;
+}
+
+void b2r2_blt_free_nodes(struct b2r2_node *first_node)
+{
+	free_nodes(first_node);
+}
+
diff --git a/drivers/video/b2r2/b2r2_node_split.c b/drivers/video/b2r2/b2r2_node_split.c
new file mode 100644
index 00000000000..c7ce0572d11
--- /dev/null
+++ b/drivers/video/b2r2/b2r2_node_split.c
@@ -0,0 +1,3283 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2010
+ *
+ * ST-Ericsson B2R2 node splitter
+ *
+ * Author: Fredrik Allansson <fredrik.allansson@stericsson.com>
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+
+#include "b2r2_debug.h"
+#include "b2r2_node_split.h"
+#include "b2r2_internal.h"
+#include "b2r2_hw.h"
+#include "b2r2_filters.h"
+
+#include <linux/kernel.h>
+
+/*
+ * Macros and constants
+ */
+#define ABS(x) ((x) < 0 ? -(x) : (x))
+#define MAX(x, y) ((x) > (y) ? (x) : (y))
+#define MIN(x, y) ((x) < (y) ? (x) : (y))
+
+#define INSTANCES_DEFAULT_SIZE 10
+#define INSTANCES_GROW_SIZE 5
+
+/*
+ * Internal types
+ */
+
+
+/*
+ * Global variables
+ */
+
+/**
+ * VMX values for different color space conversions
+ */
+static const u32 vmx_rgb_to_yuv[] = {
+	B2R2_VMX0_RGB_TO_YUV_601_VIDEO,
+	B2R2_VMX1_RGB_TO_YUV_601_VIDEO,
+	B2R2_VMX2_RGB_TO_YUV_601_VIDEO,
+	B2R2_VMX3_RGB_TO_YUV_601_VIDEO,
+};
+
+static const u32 vmx_yuv_to_rgb[] = {
+	B2R2_VMX0_YUV_TO_RGB_601_VIDEO,
+	B2R2_VMX1_YUV_TO_RGB_601_VIDEO,
+	B2R2_VMX2_YUV_TO_RGB_601_VIDEO,
+	B2R2_VMX3_YUV_TO_RGB_601_VIDEO,
+};
+
+static const u32 vmx_yvu_to_rgb[] = {
+	B2R2_VMX0_YVU_TO_RGB_601_VIDEO,
+	B2R2_VMX1_YVU_TO_RGB_601_VIDEO,
+	B2R2_VMX2_YVU_TO_RGB_601_VIDEO,
+	B2R2_VMX3_YVU_TO_RGB_601_VIDEO,
+};
+
+static const u32 vmx_rgb_to_yvu[] = {
+	B2R2_VMX0_RGB_TO_YVU_601_VIDEO,
+	B2R2_VMX1_RGB_TO_YVU_601_VIDEO,
+	B2R2_VMX2_RGB_TO_YVU_601_VIDEO,
+	B2R2_VMX3_RGB_TO_YVU_601_VIDEO,
+};
+
+static const u32 vmx_rgb_to_bgr[] = {
+	B2R2_VMX0_RGB_TO_BGR,
+	B2R2_VMX1_RGB_TO_BGR,
+	B2R2_VMX2_RGB_TO_BGR,
+	B2R2_VMX3_RGB_TO_BGR,
+};
+
+static const u32 vmx_bgr_to_yuv[] = {
+	B2R2_VMX0_BGR_TO_YUV_601_VIDEO,
+	B2R2_VMX1_BGR_TO_YUV_601_VIDEO,
+	B2R2_VMX2_BGR_TO_YUV_601_VIDEO,
+	B2R2_VMX3_BGR_TO_YUV_601_VIDEO,
+};
+
+static const u32 vmx_yuv_to_bgr[] = {
+	B2R2_VMX0_YUV_TO_BGR_601_VIDEO,
+	B2R2_VMX1_YUV_TO_BGR_601_VIDEO,
+	B2R2_VMX2_YUV_TO_BGR_601_VIDEO,
+	B2R2_VMX3_YUV_TO_BGR_601_VIDEO,
+};
+
+static const u32 vmx_bgr_to_yvu[] = {
+	B2R2_VMX0_BGR_TO_YVU_601_VIDEO,
+	B2R2_VMX1_BGR_TO_YVU_601_VIDEO,
+	B2R2_VMX2_BGR_TO_YVU_601_VIDEO,
+	B2R2_VMX3_BGR_TO_YVU_601_VIDEO,
+};
+
+static const u32 vmx_yvu_to_bgr[] = {
+	B2R2_VMX0_YVU_TO_BGR_601_VIDEO,
+	B2R2_VMX1_YVU_TO_BGR_601_VIDEO,
+	B2R2_VMX2_YVU_TO_BGR_601_VIDEO,
+	B2R2_VMX3_YVU_TO_BGR_601_VIDEO,
+};
+
+static const u32 vmx_yvu_to_yuv[] = {
+	B2R2_VMX0_YVU_TO_YUV_601_VIDEO,
+	B2R2_VMX1_YVU_TO_YUV_601_VIDEO,
+	B2R2_VMX2_YVU_TO_YUV_601_VIDEO,
+	B2R2_VMX3_YVU_TO_YUV_601_VIDEO,
+};
+
+/*
+ * Forward declaration of private functions
+ */
+
+static int analyze_fmt_conv(struct b2r2_node_split_buf *src,
+		struct b2r2_node_split_buf *dst,
+		const u32 **vmx, u32 *node_count);
+static int analyze_color_fill(struct b2r2_node_split_job *this,
+		const struct b2r2_blt_request *req, u32 *node_count);
+static int analyze_copy(struct b2r2_node_split_job *this,
+		const struct b2r2_blt_request *req, u32 *node_count,
+		u32 *buf_count);
+static int analyze_scaling(struct b2r2_node_split_job *this,
+		const struct b2r2_blt_request *req, u32 *node_count,
+		u32 *buf_count);
+static int analyze_rotate(struct b2r2_node_split_job *this,
+		const struct b2r2_blt_request *req, u32 *node_count,
+		u32 *buf_count);
+static int analyze_transform(struct b2r2_node_split_job *this,
+		const struct b2r2_blt_request *req, u32 *node_count,
+		u32 *buf_count);
+static int analyze_rot_scale(struct b2r2_node_split_job *this,
+		const struct b2r2_blt_request *req, u32 *node_count,
+		u32 *buf_count);
+static int analyze_scale_factors(struct b2r2_node_split_job *this);
+
+static void configure_src(struct b2r2_node *node,
+		struct b2r2_node_split_buf *src, const u32 *ivmx);
+static int configure_dst(struct b2r2_node *node,
+		struct b2r2_node_split_buf *dst, const u32 *ivmx,
+		struct b2r2_node **next);
+static void configure_blend(struct b2r2_node *node, u32 flags, u32 global_alpha,
+		bool swap_fg_bg);
+static void configure_clip(struct b2r2_node *node,
+		struct b2r2_blt_rect *clip_rect);
+
+static int configure_tile(struct b2r2_node_split_job *this,
+		struct b2r2_node *node, struct b2r2_node **next);
+static void configure_direct_fill(struct b2r2_node *node, u32 color,
+		struct b2r2_node_split_buf *dst, struct b2r2_node **next);
+static int configure_fill(struct b2r2_node *node, u32 color,
+		enum b2r2_blt_fmt fmt, struct b2r2_node_split_buf *dst,
+		const u32 *ivmx, struct b2r2_node **next);
+static void configure_direct_copy(struct b2r2_node *node,
+		struct b2r2_node_split_buf *src,
+		struct b2r2_node_split_buf *dst, struct b2r2_node **next);
+static int configure_copy(struct b2r2_node *node,
+		struct b2r2_node_split_buf *src,
+		struct b2r2_node_split_buf *dst, const u32 *ivmx,
+		struct b2r2_node **next,
+		struct b2r2_node_split_job *this);
+static int configure_rotate(struct b2r2_node *node,
+		struct b2r2_node_split_buf *src,
+		struct b2r2_node_split_buf *dst, const u32 *ivmx,
+		struct b2r2_node **next,
+		struct b2r2_node_split_job *this);
+static int configure_scale(struct b2r2_node *node,
+		struct b2r2_node_split_buf *src,
+		struct b2r2_node_split_buf *dst, u16 h_rsf, u16 v_rsf,
+		const u32 *ivmx, struct b2r2_node **next,
+		struct b2r2_node_split_job *this);
+static int configure_rot_scale(struct b2r2_node_split_job *this,
+		struct b2r2_node *node, struct b2r2_node **next);
+
+static int check_rect(const struct b2r2_blt_img *img,
+		const struct b2r2_blt_rect *rect,
+		const struct b2r2_blt_rect *clip);
+static void set_buf(struct b2r2_node_split_buf *buf, u32 addr,
+		const struct b2r2_blt_img *img,
+		const struct b2r2_blt_rect *rect, bool color_fill, u32 color);
+static int setup_tmp_buf(struct b2r2_node_split_buf *this, u32 max_size,
+		enum b2r2_blt_fmt pref_fmt, u32 pref_width, u32 pref_height);
+
+static enum b2r2_ty get_alpha_range(enum b2r2_blt_fmt fmt);
+static u32 set_alpha(enum b2r2_blt_fmt fmt, u8 alpha, u32 color);
+static u8  get_alpha(enum b2r2_blt_fmt fmt, u32 pixel);
+static bool fmt_has_alpha(enum b2r2_blt_fmt fmt);
+
+static bool is_rgb_fmt(enum b2r2_blt_fmt fmt);
+static bool is_bgr_fmt(enum b2r2_blt_fmt fmt);
+static bool is_yuv_fmt(enum b2r2_blt_fmt fmt);
+static bool is_yvu_fmt(enum b2r2_blt_fmt fmt);
+static bool is_yuv420_fmt(enum b2r2_blt_fmt fmt);
+static bool is_yuv422_fmt(enum b2r2_blt_fmt fmt);
+static bool is_yuv444_fmt(enum b2r2_blt_fmt fmt);
+
+static int fmt_byte_pitch(enum b2r2_blt_fmt fmt, u32 width);
+static enum b2r2_native_fmt to_native_fmt(enum b2r2_blt_fmt fmt);
+static u32 to_RGB888(u32 color, const enum b2r2_blt_fmt fmt);
+static enum b2r2_fmt_type get_fmt_type(enum b2r2_blt_fmt fmt);
+
+static bool is_transform(const struct b2r2_blt_request *req);
+static int calculate_scale_factor(u32 from, u32 to, u16 *sf_out);
+static s32 rescale(s32 dim, u16 sf);
+static s32 inv_rescale(s32 dim, u16 sf);
+
+static void set_target(struct b2r2_node *node, u32 addr,
+		struct b2r2_node_split_buf *buf);
+static void set_src(struct b2r2_src_config *src, u32 addr,
+		struct b2r2_node_split_buf *buf);
+static void set_src_1(struct b2r2_node *node, u32 addr,
+		struct b2r2_node_split_buf *buf);
+static void set_src_2(struct b2r2_node *node, u32 addr,
+		struct b2r2_node_split_buf *buf);
+static void set_src_3(struct b2r2_node *node, u32 addr,
+		struct b2r2_node_split_buf *buf);
+static void set_ivmx(struct b2r2_node *node, const u32 *vmx_values);
+
+static void reset_nodes(struct b2r2_node *node);
+
+/*
+ * Public functions
+ */
+
+/**
+ * b2r2_node_split_analyze() - analyzes the request
+ */
+int b2r2_node_split_analyze(const struct b2r2_blt_request *req,
+		u32 max_buf_size, u32 *node_count, struct b2r2_work_buf **bufs,
+		u32 *buf_count, struct b2r2_node_split_job *this)
+{
+	int ret;
+	bool color_fill;
+
+	b2r2_log_info("%s\n", __func__);
+
+	memset(this, 0, sizeof(*this));
+
+	/* Copy parameters */
+	this->flags = req->user_req.flags;
+	this->transform = req->user_req.transform;
+	this->max_buf_size = max_buf_size;
+	this->global_alpha = req->user_req.global_alpha;
+	this->buf_count = 0;
+	this->node_count = 0;
+
+	if (this->flags & B2R2_BLT_FLAG_BLUR) {
+		ret = -ENOSYS;
+		goto unsupported;
+	}
+
+	if ((this->flags & B2R2_BLT_FLAG_SOURCE_COLOR_KEY) &&
+			(is_yuv_fmt(req->user_req.src_img.fmt) ||
+			req->user_req.src_img.fmt == B2R2_BLT_FMT_1_BIT_A1 ||
+			req->user_req.src_img.fmt == B2R2_BLT_FMT_8_BIT_A8)) {
+		b2r2_log_warn("%s: Unsupported: source color keying with "
+			"YUV or pure alpha formats.\n",
+			__func__);
+		ret = -ENOSYS;
+		goto unsupported;
+	}
+
+	if (this->flags & (B2R2_BLT_FLAG_DEST_COLOR_KEY |
+			B2R2_BLT_FLAG_SOURCE_MASK)) {
+		b2r2_log_warn("%s: Unsupported: source mask, "
+			"destination color keying.\n",
+			__func__);
+		ret = -ENOSYS;
+		goto unsupported;
+	}
+
+	if ((req->user_req.flags & B2R2_BLT_FLAG_CLUT_COLOR_CORRECTION) &&
+			req->user_req.clut == NULL) {
+		b2r2_log_warn("%s: Invalid request: no table specified "
+			"for CLUT color correction.\n",
+			__func__);
+		return -EINVAL;
+	}
+
+	/* Check for color fill */
+	color_fill = (this->flags & (B2R2_BLT_FLAG_SOURCE_FILL |
+				B2R2_BLT_FLAG_SOURCE_FILL_RAW)) != 0;
+
+	/* Configure the source and destination buffers */
+	set_buf(&this->src, req->src_resolved.physical_address,
+			&req->user_req.src_img, &req->user_req.src_rect,
+			color_fill, req->user_req.src_color);
+
+	set_buf(&this->dst, req->dst_resolved.physical_address,
+			&req->user_req.dst_img, &req->user_req.dst_rect, false,
+			0);
+
+	b2r2_log_info("%s:\n"
+		"\t\tsrc.rect=(%4d, %4d, %4d, %4d)\t"
+		"dst.rect=(%4d, %4d, %4d, %4d)\n", __func__, this->src.rect.x,
+		this->src.rect.y, this->src.rect.width, this->src.rect.height,
+		this->dst.rect.x, this->dst.rect.y, this->dst.rect.width,
+		this->dst.rect.height);
+
+	if (this->flags & B2R2_BLT_FLAG_DITHER)
+		this->dst.dither = B2R2_TTY_RGB_ROUND_DITHER;
+
+	if (this->flags & B2R2_BLT_FLAG_SOURCE_COLOR_KEY) {
+		this->flag_param = req->user_req.src_color;
+	}
+
+	/* Check for blending */
+	if ((this->flags & B2R2_BLT_FLAG_GLOBAL_ALPHA_BLEND) &&
+			(this->global_alpha != 255))
+		this->blend = true;
+	else if (this->flags & B2R2_BLT_FLAG_PER_PIXEL_ALPHA_BLEND)
+		this->blend = (color_fill && fmt_has_alpha(this->dst.fmt)) ||
+				fmt_has_alpha(this->src.fmt);
+
+	if (this->blend && this->src.type == B2R2_FMT_TYPE_PLANAR) {
+		b2r2_log_warn("%s: Unsupported: blend with planar source\n",
+				__func__);
+		ret = -ENOSYS;
+		goto unsupported;
+	}
+
+	/* Check for clipping */
+	this->clip = (this->flags &
+				B2R2_BLT_FLAG_DESTINATION_CLIP) != 0;
+	if (this->clip) {
+		s32 l = req->user_req.dst_clip_rect.x;
+		s32 r = l + req->user_req.dst_clip_rect.width;
+		s32 t = req->user_req.dst_clip_rect.y;
+		s32 b = t + req->user_req.dst_clip_rect.height;
+
+		/* Intersect the clip and buffer rects */
+		if (l < 0)
+			l = 0;
+		if (r > req->user_req.dst_img.width)
+			r = req->user_req.dst_img.width;
+		if (t < 0)
+			t = 0;
+		if (b > req->user_req.dst_img.height)
+			b = req->user_req.dst_img.height;
+
+		this->clip_rect.x = l;
+		this->clip_rect.y = t;
+		this->clip_rect.width = r - l;
+		this->clip_rect.height = b - t;
+	} else {
+		/* Set the clip rectangle to the buffer bounds */
+		this->clip_rect.x = 0;
+		this->clip_rect.y = 0;
+		this->clip_rect.width = req->user_req.dst_img.width;
+		this->clip_rect.height = req->user_req.dst_img.height;
+	}
+
+	/* Validate the destination */
+	ret = check_rect(&req->user_req.dst_img, &req->user_req.dst_rect,
+			&this->clip_rect);
+	if (ret < 0)
+		goto error;
+
+	/* Validate the source (if not color fill) */
+	if (!color_fill) {
+		ret = check_rect(&req->user_req.src_img,
+					&req->user_req.src_rect, NULL);
+		if (ret < 0)
+			goto error;
+	}
+
+	/* Do the analysis depending on the type of operation */
+	if (color_fill) {
+		ret = analyze_color_fill(this, req, &this->node_count);
+	} else {
+
+		bool upsample;
+		bool downsample;
+
+		/*
+		 * YUV formats that are non-raster, non-yuv444 needs to be
+		 * up (or down) sampled using the resizer.
+		 *
+		 * NOTE: The resizer needs to be enabled for YUV444 as well,
+		 *       even though there is no upsampling. This is most
+		 *       likely a bug in the hardware.
+		 */
+		upsample = this->src.type != B2R2_FMT_TYPE_RASTER &&
+			is_yuv_fmt(this->src.fmt);
+		downsample = this->dst.type != B2R2_FMT_TYPE_RASTER &&
+			is_yuv_fmt(this->dst.fmt);
+
+		if (is_transform(req) || upsample || downsample)
+			ret = analyze_transform(this, req, &this->node_count,
+						&this->buf_count);
+		else
+			ret = analyze_copy(this, req, &this->node_count,
+						&this->buf_count);
+	}
+
+	if (ret == -ENOSYS) {
+		goto unsupported;
+	} else if (ret < 0) {
+		b2r2_log_warn("%s: Analysis failed!\n", __func__);
+		goto error;
+	}
+
+	/* Setup the origin and movement of the destination window */
+	if (this->dst.hso == B2R2_TY_HSO_RIGHT_TO_LEFT) {
+		this->dst.dx = -this->dst.win.width;
+		this->dst.win.x = this->dst.rect.x + this->dst.rect.width - 1;
+	} else {
+		this->dst.dx = this->dst.win.width;
+		this->dst.win.x = this->dst.rect.x;
+	}
+	if (this->dst.vso == B2R2_TY_VSO_BOTTOM_TO_TOP) {
+		this->dst.dy = -this->dst.win.height;
+		this->dst.win.y = this->dst.rect.y + this->dst.rect.height - 1;
+	} else {
+		this->dst.dy = this->dst.win.height;
+		this->dst.win.y = this->dst.rect.y;
+	}
+
+	*buf_count = this->buf_count;
+	*node_count = this->node_count;
+
+	if (this->buf_count > 0)
+		*bufs = &this->work_bufs[0];
+
+	b2r2_log_info("%s: dst.win=(%d, %d, %d, %d), dst.dx=%d, dst.dy=%d\n",
+			__func__, this->dst.win.x, this->dst.win.y,
+			this->dst.win.width, this->dst.win.height, this->dst.dx,
+			this->dst.dy);
+	b2r2_log_info("%s: buf_count=%d, buf_size=%d, node_count=%d\n",
+			__func__, *buf_count, bufs[0]->size, *node_count);
+
+	return 0;
+
+error:
+	b2r2_log_warn("%s: Exit...\n", __func__);
+unsupported:
+	return ret;
+}
+
+/**
+ * b2r2_node_split_configure() - configures the node list
+ */
+int b2r2_node_split_configure(struct b2r2_node_split_job *this,
+		struct b2r2_node *first)
+{
+	int ret;
+
+	struct b2r2_node_split_buf *dst = &this->dst;
+	struct b2r2_node *node = first;
+
+	u32 x_pixels = 0;
+	u32 y_pixels = 0;
+
+	reset_nodes(node);
+
+	while (y_pixels < dst->rect.height) {
+		s32 dst_x = dst->win.x;
+		s32 dst_w = dst->win.width;
+
+		/* Clamp window height */
+		if (dst->win.height > dst->rect.height - y_pixels)
+			dst->win.height = dst->rect.height - y_pixels;
+
+		while (x_pixels < dst->rect.width) {
+
+			/* Clamp window width */
+			if (dst_w > dst->rect.width - x_pixels)
+				dst->win.width = dst->rect.width - x_pixels;
+
+			ret = configure_tile(this, node, &node);
+			if (ret < 0)
+				goto error;
+
+			dst->win.x += dst->dx;
+			x_pixels += max(dst->dx, -dst->dx);
+			b2r2_log_info("%s: x_pixels=%d\n", __func__, x_pixels);
+		}
+
+		dst->win.y += dst->dy;
+		y_pixels += max(dst->dy, -dst->dy);
+
+		dst->win.x = dst_x;
+		dst->win.width = dst_w;
+		x_pixels = 0;
+
+		b2r2_log_info("%s: y_pixels=%d\n", __func__, y_pixels);
+	}
+
+	return 0;
+
+error:
+	b2r2_log_warn("%s: error!\n", __func__);
+	return ret;
+}
+
+/**
+ * b2r2_node_split_assign_buffers() - assigns temporary buffers to the node list
+ */
+int b2r2_node_split_assign_buffers(struct b2r2_node_split_job *this,
+		struct b2r2_node *first, struct b2r2_work_buf *bufs,
+		u32 buf_count)
+{
+	struct b2r2_node *node = first;
+
+	while (node != NULL) {
+		/* The indices are offset by one */
+		if (node->dst_tmp_index) {
+			BUG_ON(node->dst_tmp_index > buf_count);
+
+			b2r2_log_info("%s: assigning buf %d as dst\n",
+					__func__, node->dst_tmp_index);
+
+			node->node.GROUP1.B2R2_TBA =
+				bufs[node->dst_tmp_index - 1].phys_addr;
+		}
+		if (node->src_tmp_index) {
+			u32 addr = bufs[node->src_tmp_index - 1].phys_addr;
+
+			b2r2_log_info("%s: "
+				"assigning buf %d as src %d ", __func__,
+					node->src_tmp_index, node->src_index);
+
+			BUG_ON(node->src_tmp_index > buf_count);
+
+			switch (node->src_index) {
+			case 1:
+				b2r2_log_info("1\n");
+				node->node.GROUP3.B2R2_SBA = addr;
+				break;
+			case 2:
+				b2r2_log_info("2\n");
+				node->node.GROUP4.B2R2_SBA = addr;
+				break;
+			case 3:
+				b2r2_log_info("3\n");
+				node->node.GROUP5.B2R2_SBA = addr;
+				break;
+			default:
+				BUG_ON(1);
+				break;
+			}
+		}
+
+		b2r2_log_info("%s: tba=%p\tsba=%p\n", __func__,
+			(void *)node->node.GROUP1.B2R2_TBA,
+			(void *)node->node.GROUP4.B2R2_SBA);
+
+		node = node->next;
+	}
+
+	return 0;
+}
+
+/**
+ * b2r2_node_split_unassign_buffers() - releases temporary buffers
+ */
+void b2r2_node_split_unassign_buffers(struct b2r2_node_split_job *this,
+		struct b2r2_node *first)
+{
+	return;
+}
+
+/**
+ * b2r2_node_split_cancel() - cancels and releases a job instance
+ */
+void b2r2_node_split_cancel(struct b2r2_node_split_job *this)
+{
+	memset(this, 0, sizeof(*this));
+
+	return;
+}
+
+/*
+ * Private functions
+ */
+
+static int check_rect(const struct b2r2_blt_img *img,
+		const struct b2r2_blt_rect *rect,
+		const struct b2r2_blt_rect *clip)
+{
+	int ret;
+
+	s32 l, r, b, t;
+
+	/* Check rectangle dimensions*/
+	if ((rect->width <= 0) || (rect->height <= 0)) {
+		b2r2_log_warn("%s: "
+			"Illegal rect (%d, %d, %d, %d)\n",
+			__func__, rect->x, rect->y, rect->width, rect->height);
+		ret = -EINVAL;
+		goto error;
+	}
+
+	/* If we are using clip we should only look at the intersection of the
+	   rects */
+	if (clip) {
+		l = MAX(rect->x, clip->x);
+		t = MAX(rect->y, clip->y);
+		r = MIN(rect->x + rect->width, clip->x + clip->width);
+		b = MIN(rect->y + rect->height, clip->y + clip->height);
+	} else {
+		l = rect->x;
+		t = rect->y;
+		r = rect->x + rect->width;
+		b = rect->y + rect->height;
+	}
+
+	/* Check so that the rect isn't outside the buffer */
+	if ((l < 0) || (t < 0) || (l >= img->width) || (t >= img->height)) {
+		b2r2_log_warn("%s: "
+			"rect origin outside buffer\n", __func__);
+		ret = -EINVAL;
+		goto error;
+	}
+
+	if ((r > img->width) || (b > img->height)) {
+		b2r2_log_warn("%s: "
+			"rect ends outside buffer\n", __func__);
+		ret = -EINVAL;
+		goto error;
+	}
+
+	/* Check so the intersected rectangle isn't empty */
+	if ((l == r) || (t == b)) {
+		b2r2_log_warn("%s: "
+			"rect is empty (width or height zero)\n",
+			__func__);
+		ret = -EINVAL;
+		goto error;
+	}
+
+	return 0;
+error:
+	b2r2_log_warn("%s: Exit...\n", __func__);
+	return ret;
+}
+
+/**
+ * analyze_fmt_conv() - analyze the format conversions needed for a job
+ */
+static int analyze_fmt_conv(struct b2r2_node_split_buf *src,
+		struct b2r2_node_split_buf *dst,
+		const u32 **vmx, u32 *node_count)
+{
+	if (is_rgb_fmt(src->fmt)) {
+		if (is_yvu_fmt(dst->fmt))
+			*vmx = &vmx_rgb_to_yvu[0];
+		else if (is_yuv_fmt(dst->fmt))
+			*vmx = &vmx_rgb_to_yuv[0];
+		else if (is_bgr_fmt(dst->fmt))
+			*vmx = &vmx_rgb_to_bgr[0];
+	} else if (is_yvu_fmt(src->fmt)) {
+		if (is_rgb_fmt(dst->fmt))
+			*vmx = &vmx_yvu_to_rgb[0];
+		else if (is_bgr_fmt(dst->fmt))
+			*vmx = &vmx_yvu_to_bgr[0];
+		else if (is_yuv_fmt(dst->fmt) &&
+				!is_yvu_fmt(dst->fmt))
+			*vmx = &vmx_yvu_to_yuv[0];
+	} else if (is_yuv_fmt(src->fmt)) {
+		if (is_rgb_fmt(dst->fmt))
+			*vmx = &vmx_yuv_to_rgb[0];
+		else if (is_bgr_fmt(dst->fmt))
+			*vmx = &vmx_yuv_to_bgr[0];
+		else if (is_yvu_fmt(dst->fmt))
+			*vmx = &vmx_yvu_to_yuv[0];
+	} else if (is_bgr_fmt(src->fmt)) {
+		if (is_rgb_fmt(dst->fmt))
+			*vmx = &vmx_rgb_to_bgr[0];
+		else if (is_yvu_fmt(dst->fmt))
+			*vmx = &vmx_bgr_to_yvu[0];
+		else if (is_yuv_fmt(dst->fmt))
+			*vmx = &vmx_bgr_to_yuv[0];
+	}
+
+	if (dst->type == B2R2_FMT_TYPE_RASTER) {
+		*node_count = 1;
+	} else if (dst->type == B2R2_FMT_TYPE_SEMI_PLANAR) {
+		*node_count = 2;
+	} else if (dst->type == B2R2_FMT_TYPE_PLANAR) {
+		*node_count = 3;
+	} else {
+		/* That's strange... */
+		BUG_ON(1);
+	}
+
+	return 0;
+}
+
+/**
+ * analyze_color_fill() - analyze a color fill operation
+ */
+static int analyze_color_fill(struct b2r2_node_split_job *this,
+		const struct b2r2_blt_request *req, u32 *node_count)
+{
+	int ret;
+
+	/* Destination must be raster for raw fill to work */
+	if (this->dst.type != B2R2_FMT_TYPE_RASTER) {
+		b2r2_log_warn("%s: fill requires raster destination\n",
+			__func__);
+		ret = -EINVAL;
+		goto error;
+	}
+
+	/* We will try to fill the entire rectangle in one go */
+	memcpy(&this->dst.win, &this->dst.rect, sizeof(this->dst.win));
+
+	/* Check if this is a direct fill */
+	if ((!this->blend) && ((this->flags & B2R2_BLT_FLAG_SOURCE_FILL_RAW) ||
+			(this->dst.fmt == B2R2_BLT_FMT_32_BIT_ARGB8888) ||
+			(this->dst.fmt == B2R2_BLT_FMT_32_BIT_ABGR8888) ||
+			(this->dst.fmt == B2R2_BLT_FMT_32_BIT_AYUV8888))) {
+		this->type = B2R2_DIRECT_FILL;
+
+		/* The color format will be the same as the dst fmt */
+		this->src.fmt = this->dst.fmt;
+
+		/* The entire destination rectangle will be  */
+		memcpy(&this->dst.win, &this->dst.rect,
+			sizeof(this->dst.win));
+		*node_count = 1;
+	} else {
+		this->type = B2R2_FILL;
+
+		/* Determine the fill color format */
+		if (this->flags & B2R2_BLT_FLAG_SOURCE_FILL_RAW) {
+			/* The color format will be the same as the dst fmt */
+			this->src.fmt = this->dst.fmt;
+		} else {
+			/* If the dst fmt is YUV the fill fmt will be as well */
+			if (is_yuv_fmt(this->dst.fmt)) {
+				this->src.fmt =	B2R2_BLT_FMT_32_BIT_AYUV8888;
+			} else if (is_rgb_fmt(this->dst.fmt)) {
+				this->src.fmt =	B2R2_BLT_FMT_32_BIT_ARGB8888;
+			} else if (is_bgr_fmt(this->dst.fmt)) {
+				/* Color will still be ARGB, we will translate
+				   using IVMX (configured later) */
+				this->src.fmt =	B2R2_BLT_FMT_32_BIT_ARGB8888;
+			} else {
+				/* Wait, what? */
+				b2r2_log_warn("%s: "
+					"Illegal destination format for fill",
+					__func__);
+				ret = -EINVAL;
+				goto error;
+			}
+		}
+
+		/* Also, B2R2 seems to ignore the pixel alpha value */
+		if (((this->flags & B2R2_BLT_FLAG_PER_PIXEL_ALPHA_BLEND)
+					!= 0) &&
+				((this->flags & B2R2_BLT_FLAG_SOURCE_FILL_RAW)
+					== 0) && fmt_has_alpha(this->src.fmt)) {
+			u8 pixel_alpha = get_alpha(this->src.fmt,
+							this->src.color);
+			u32 new_global = pixel_alpha * this->global_alpha / 255;
+
+			this->global_alpha = (u8)new_global;
+
+			/* Set the pixel alpha to full opaque so we don't get
+			   any nasty suprises */
+			this->src.color = set_alpha(this->src.fmt, 0xFF,
+						this->src.color);
+		}
+
+		ret = analyze_fmt_conv(&this->src, &this->dst, &this->ivmx, node_count);
+		if (ret < 0)
+			goto error;
+	}
+
+	return 0;
+
+error:
+	b2r2_log_warn("%s: Exit...\n", __func__);
+	return ret;
+
+}
+
+/**
+ * analyze_transform() - analyze a transform operation (rescale, rotate, etc.)
+ */
+static int analyze_transform(struct b2r2_node_split_job *this,
+		const struct b2r2_blt_request *req, u32 *node_count,
+		u32 *buf_count)
+{
+	int ret;
+
+	bool is_scaling;
+
+	b2r2_log_info("%s\n", __func__);
+
+	/*
+	 * The transform enum is defined so that all rotation transforms are
+	 * masked with the rotation flag
+	 */
+	this->rotation = (this->transform & B2R2_BLT_TRANSFORM_CCW_ROT_90) != 0;
+
+	/* B2R2 cannot do rotations if the destination is not raster, or 422R */
+	if (this->rotation && (this->dst.type != B2R2_FMT_TYPE_RASTER ||
+				this->dst.fmt == B2R2_BLT_FMT_Y_CB_Y_CR ||
+				this->dst.fmt == B2R2_BLT_FMT_CB_Y_CR_Y)) {
+		b2r2_log_warn("%s: Unsupported operation "
+				"(rot && (!dst_raster || dst==422R))",
+				__func__);
+		ret = -ENOSYS;
+		goto unsupported;
+	}
+
+	/* Flip the image by changing the scan order of the destination */
+	if (this->transform & B2R2_BLT_TRANSFORM_FLIP_H)
+		this->dst.hso = B2R2_TY_HSO_RIGHT_TO_LEFT;
+	if (this->transform & B2R2_BLT_TRANSFORM_FLIP_V)
+		this->dst.vso = B2R2_TY_VSO_BOTTOM_TO_TOP;
+
+	/* Check for scaling */
+	if (this->rotation) {
+		is_scaling = (this->src.rect.width != this->dst.rect.height) ||
+			(this->src.rect.height != this->dst.rect.width);
+	} else {
+		is_scaling = (this->src.rect.width != this->dst.rect.width) ||
+			(this->src.rect.height != this->dst.rect.height);
+	}
+
+	/* Plane separated formats must be treated as scaling */
+	is_scaling = is_scaling ||
+			(this->src.type == B2R2_FMT_TYPE_SEMI_PLANAR) ||
+			(this->src.type == B2R2_FMT_TYPE_PLANAR) ||
+			(this->dst.type == B2R2_FMT_TYPE_SEMI_PLANAR) ||
+			(this->dst.type == B2R2_FMT_TYPE_PLANAR);
+
+	if (is_scaling && this->rotation && this->blend) {
+		/* TODO: This is unsupported. Fix it! */
+		b2r2_log_info("%s: Unsupported operation (rot+rescale+blend)\n",
+			__func__);
+		ret = -ENOSYS;
+		goto unsupported;
+	}
+
+	/* Check which type of transform */
+	if (is_scaling && this->rotation) {
+		ret = analyze_rot_scale(this, req, node_count, buf_count);
+		if (ret < 0)
+			goto error;
+	} else if (is_scaling) {
+		ret = analyze_scaling(this, req, node_count, buf_count);
+		if (ret < 0)
+			goto error;
+	} else if (this->rotation) {
+		ret = analyze_rotate(this, req, node_count, buf_count);
+		if (ret < 0)
+			goto error;
+	} else {
+		/* No additional nodes needed for a flip */
+		ret = analyze_copy(this, req, node_count, buf_count);
+		if (ret < 0)
+			goto error;
+		this->type = B2R2_FLIP;
+	}
+
+	return 0;
+
+error:
+	b2r2_log_warn("%s: error!\n", __func__);
+unsupported:
+	return ret;
+}
+
+/**
+ * analyze_copy() - analyze a copy operation
+ */
+static int analyze_copy(struct b2r2_node_split_job *this,
+		const struct b2r2_blt_request *req, u32 *node_count,
+		u32 *buf_count)
+{
+	int ret;
+
+	memcpy(&this->dst.win, &this->dst.rect, sizeof(this->dst.win));
+
+	if (!this->blend &&
+			!(this->flags & B2R2_BLT_FLAG_CLUT_COLOR_CORRECTION) &&
+			(this->src.fmt == this->dst.fmt) &&
+			(this->src.type == B2R2_FMT_TYPE_RASTER) &&
+			(this->dst.rect.x >= this->clip_rect.x) &&
+			(this->dst.rect.y >= this->clip_rect.y) &&
+			(this->dst.rect.x + this->dst.rect.width <=
+				this->clip_rect.x + this->clip_rect.width) &&
+			(this->dst.rect.y + this->dst.rect.height <=
+				this->clip_rect.y + this->clip_rect.height)) {
+		this->type = B2R2_DIRECT_COPY;
+		*node_count = 1;
+	} else {
+		u32 copy_count;
+
+		this->type = B2R2_COPY;
+
+		ret = analyze_fmt_conv(&this->src, &this->dst, &this->ivmx, &copy_count);
+		if (ret < 0)
+			goto error;
+
+		*node_count = copy_count;
+	}
+
+	return 0;
+
+error:
+	b2r2_log_warn("%s: Exit...\n", __func__);
+	return ret;
+}
+
+static int calc_rot_count(u32 width, u32 height)
+{
+	int count;
+
+	count = width / B2R2_ROTATE_MAX_WIDTH;
+	if (width % B2R2_ROTATE_MAX_WIDTH)
+		count++;
+	if (height > B2R2_ROTATE_MAX_WIDTH &&
+			height % B2R2_ROTATE_MAX_WIDTH)
+		count *= 2;
+
+	return count;
+}
+
+static int analyze_rot_scale_downscale(struct b2r2_node_split_job *this,
+		const struct b2r2_blt_request *req, u32 *node_count,
+		u32 *buf_count)
+{
+	int ret;
+
+	struct b2r2_node_split_buf *src = &this->src;
+	struct b2r2_node_split_buf *dst = &this->dst;
+	struct b2r2_node_split_buf *tmp = &this->tmp_bufs[0];
+
+	u32 num_rows;
+	u32 num_cols;
+
+	u32 rot_count;
+	u32 rescale_count;
+
+	u32 nodes_per_rot;
+	u32 nodes_per_rescale;
+
+	u32 right_width;
+	u32 bottom_height;
+
+	const u32 *dummy_vmx;
+
+	b2r2_log_info("%s\n", __func__);
+
+	/* Calculate the desired tmp buffer size */
+	tmp->win.width = rescale(B2R2_RESCALE_MAX_WIDTH - 1, this->h_rsf);
+	tmp->win.width >>= 10;
+	tmp->win.width = min(tmp->win.width, dst->rect.height);
+	tmp->win.height = dst->rect.width;
+
+	setup_tmp_buf(tmp, this->max_buf_size, dst->fmt, tmp->win.width, tmp->win.height);
+	tmp->tmp_buf_index = 1;
+	this->work_bufs[0].size = tmp->pitch * tmp->height;
+
+	tmp->win.width = tmp->rect.width;
+	tmp->win.height = tmp->rect.height;
+
+	tmp->dither = dst->dither;
+	dst->dither = 0;
+
+	/* Update the dst window with the actual tmp buffer dimensions */
+	dst->win.width = tmp->win.height;
+	dst->win.height = tmp->win.width;
+
+	/* The rotated stripes are written to the destination bottom-up */
+	if (this->dst.vso == B2R2_TY_VSO_TOP_TO_BOTTOM)
+		this->dst.vso = B2R2_TY_VSO_BOTTOM_TO_TOP;
+	else
+		this->dst.vso = B2R2_TY_VSO_TOP_TO_BOTTOM;
+
+	/*
+	 * Calculate how many nodes are required to copy to and from the tmp
+	 * buffer
+	 */
+	ret = analyze_fmt_conv(src, tmp, &this->ivmx, &nodes_per_rescale);
+	if (ret < 0)
+		goto error;
+
+	/* We will not do any format conversion in the rotation stage */
+	ret = analyze_fmt_conv(tmp, dst, &dummy_vmx, &nodes_per_rot);
+	if (ret < 0)
+		goto error;
+
+	/* Calculate node count for the inner tiles */
+	num_cols = dst->rect.width / dst->win.width;
+	num_rows = dst->rect.height / dst->win.height;
+
+	rescale_count = num_cols * num_rows;
+	rot_count = calc_rot_count(dst->win.height, dst->win.width) *
+		num_cols * num_rows;
+
+	right_width = dst->rect.width % dst->win.width;
+	bottom_height = dst->rect.height % dst->win.height;
+
+	/* Calculate node count for the rightmost tiles */
+	if (right_width) {
+		u32 count = calc_rot_count(dst->win.height, right_width);
+
+		rot_count += count * num_rows;
+		rescale_count += num_rows;
+		b2r2_log_info("%s: rightmost: %d nodes\n", __func__,
+				count*num_rows);
+	}
+
+	/* Calculate node count for the bottom tiles */
+	if (bottom_height) {
+		u32 count = calc_rot_count(bottom_height, dst->win.width);
+
+		rot_count += count * num_cols;
+		rescale_count += num_cols;
+		b2r2_log_info("%s: bottom: %d nodes\n", __func__,
+				count * num_cols);
+
+	}
+
+	/* And finally for the bottom right corner */
+	if (right_width && bottom_height) {
+		u32 count = calc_rot_count(bottom_height, right_width);
+
+		rot_count += count;
+		rescale_count++;
+		b2r2_log_info("%s: bottom right: %d nodes\n", __func__, count);
+
+	}
+
+	*node_count = rot_count * nodes_per_rot;
+	*node_count += rescale_count * nodes_per_rescale;
+	*buf_count = 1;
+
+	return 0;
+
+error:
+	b2r2_log_warn("%s: error!\n", __func__);
+	return ret;
+}
+
+static int analyze_rot_scale_upscale(struct b2r2_node_split_job *this,
+		const struct b2r2_blt_request *req, u32 *node_count,
+		u32 *buf_count)
+{
+	/* TODO: When upscaling we should optimally to the rotation first... */
+	return analyze_rot_scale_downscale(this, req, node_count, buf_count);
+}
+
+/**
+ * analyze_rot_scaling() - analyzes a combined rotation and scaling op
+ */
+static int analyze_rot_scale(struct b2r2_node_split_job *this,
+		const struct b2r2_blt_request *req, u32 *node_count,
+		u32 *buf_count)
+{
+	int ret;
+
+	bool upscale;
+
+	ret = analyze_scale_factors(this);
+	if (ret < 0)
+		goto error;
+
+	upscale = (u32)this->h_rsf * (u32)this->v_rsf < (1 << 20);
+
+	if (upscale)
+		ret = analyze_rot_scale_upscale(this, req, node_count, buf_count);
+	else
+		ret = analyze_rot_scale_downscale(this, req, node_count, buf_count);
+
+	if (ret < 0)
+		goto error;
+
+	this->type = B2R2_SCALE_AND_ROTATE;
+
+	return 0;
+
+error:
+	return ret;
+}
+
+/**
+ * analyze_scaling() - analyze a rescale operation
+ */
+static int analyze_scaling(struct b2r2_node_split_job *this,
+		const struct b2r2_blt_request *req, u32 *node_count,
+		u32 *buf_count)
+{
+	int ret;
+
+	u32 copy_count;
+	u32 nbr_cols;
+
+	s32 dst_w;
+
+	b2r2_log_info("%s\n", __func__);
+
+	ret = analyze_scale_factors(this);
+	if (ret < 0)
+		goto error;
+
+	/* Find out how many nodes a simple copy would require */
+	ret = analyze_fmt_conv(&this->src, &this->dst, &this->ivmx, &copy_count);
+	if (ret < 0)
+		goto error;
+
+	memcpy(&this->dst.win, &this->dst.rect, sizeof(this->dst.win));
+
+	/*
+	 * We need to subtract from the actual maximum rescale width since the
+	 * start of the stripe will be floored and the end ceiled. This could in
+	 * some cases cause the stripe to be one pixel more than the maximum
+	 * width.
+	 *
+	 * Example:
+	 *   x = 127.8, w = 127.8
+	 *
+	 *   The stripe will touch pixels 127.8 through 255.6, i.e. 129 pixels.
+	 */
+	dst_w = rescale(B2R2_RESCALE_MAX_WIDTH - 1, this->h_rsf);
+	if (dst_w < (1 << 10))
+		dst_w = 1;
+	else
+		dst_w >>= 10;
+
+	b2r2_log_info("%s: dst_w=%d dst.rect.width=%d\n", __func__, dst_w,
+			this->dst.rect.width);
+
+	this->dst.win.width = min(dst_w, this->dst.rect.width);
+
+	b2r2_log_info("%s: dst.win.width=%d\n", __func__, this->dst.win.width);
+
+	nbr_cols = this->dst.rect.width / this->dst.win.width;
+	if (this->dst.rect.width % this->dst.win.width)
+		nbr_cols++;
+
+	*node_count = copy_count * nbr_cols;
+
+	this->type = B2R2_SCALE;
+
+	b2r2_log_info("%s exit\n", __func__);
+
+	return 0;
+
+error:
+	b2r2_log_warn("%s: Exit...\n", __func__);
+	return ret;
+
+}
+
+/**
+ * analyze_rotate() - analyze a rotate operation
+ */
+static int analyze_rotate(struct b2r2_node_split_job *this,
+		const struct b2r2_blt_request *req, u32 *node_count,
+		u32 *buf_count)
+{
+	int ret;
+
+	u32 nodes_per_tile;
+
+	/* Find out how many nodes a simple copy would require */
+	ret = analyze_fmt_conv(&this->src, &this->dst, &this->ivmx,
+			&nodes_per_tile);
+	if (ret < 0)
+		goto error;
+
+	this->type = B2R2_ROTATE;
+
+	/* The rotated stripes are written to the destination bottom-up */
+	if (this->dst.vso == B2R2_TY_VSO_TOP_TO_BOTTOM)
+		this->dst.vso = B2R2_TY_VSO_BOTTOM_TO_TOP;
+	else
+		this->dst.vso = B2R2_TY_VSO_TOP_TO_BOTTOM;
+
+	memcpy(&this->dst.win, &this->dst.rect, sizeof(this->dst.win));
+
+	this->dst.win.height = min(this->dst.win.height, B2R2_ROTATE_MAX_WIDTH);
+
+	/*
+	 * B2R2 cannot do rotations on stripes that are not a multiple of 16
+	 * pixels high (if larger than 16 pixels).
+	 */
+	if (this->dst.win.width > 16)
+		this->dst.win.width -= (this->dst.win.width % 16);
+
+	/* Blending cannot be combined with rotation */
+	if (this->blend) {
+		struct b2r2_node_split_buf *tmp = &this->tmp_bufs[0];
+		enum b2r2_blt_fmt tmp_fmt;
+
+		if (is_yuv_fmt(this->dst.fmt))
+			tmp_fmt = B2R2_BLT_FMT_32_BIT_AYUV8888;
+		else if (is_bgr_fmt(this->dst.fmt))
+			tmp_fmt = B2R2_BLT_FMT_32_BIT_ABGR8888;
+		else
+			tmp_fmt = B2R2_BLT_FMT_32_BIT_ARGB8888;
+
+		setup_tmp_buf(tmp, this->max_buf_size, tmp_fmt,
+				this->dst.win.width, this->dst.win.height);
+
+		tmp->tmp_buf_index = 1;
+
+		tmp->vso = B2R2_TY_VSO_BOTTOM_TO_TOP;
+
+		this->dst.win.width = tmp->rect.width;
+		this->dst.win.height = tmp->rect.height;
+
+		memcpy(&tmp->win, &tmp->rect, sizeof(tmp->win));
+
+		*buf_count = 1;
+		this->work_bufs[0].size = tmp->pitch * tmp->height;
+
+		/*
+		 * One more node per tile is required to rotate to the temp
+		 * buffer.
+		 */
+		nodes_per_tile++;
+	}
+
+	/* Finally, calculate the node count */
+	*node_count = nodes_per_tile *
+		calc_rot_count(this->dst.rect.width, this->dst.rect.height);
+
+	return 0;
+
+error:
+	b2r2_log_warn("%s: Exit...\n", __func__);
+	return ret;
+}
+
+/**
+ * analyze_scale_factors() - determines the scale factors for the op
+ */
+static int analyze_scale_factors(struct b2r2_node_split_job *this)
+{
+	int ret;
+
+	u16 hsf;
+	u16 vsf;
+
+	if (this->rotation) {
+		ret = calculate_scale_factor(this->src.rect.height,
+					this->dst.rect.width, &hsf);
+		if (ret < 0)
+			goto error;
+
+		ret = calculate_scale_factor(this->src.rect.width,
+					this->dst.rect.height, &vsf);
+		if (ret < 0)
+			goto error;
+	} else {
+		ret = calculate_scale_factor(this->src.rect.width,
+					this->dst.rect.width, &hsf);
+		if (ret < 0)
+			goto error;
+
+		ret = calculate_scale_factor(this->src.rect.height,
+					this->dst.rect.height, &vsf);
+		if (ret < 0)
+			goto error;
+	}
+
+	this->h_rescale = hsf != (1 << 10);
+	this->v_rescale = vsf != (1 << 10);
+
+	this->h_rsf = hsf;
+	this->v_rsf = vsf;
+
+	b2r2_log_info("%s: h_rsf=%.4x\n", __func__, this->h_rsf);
+	b2r2_log_info("%s: v_rsf=%.4x\n", __func__, this->v_rsf);
+
+	return 0;
+error:
+	b2r2_log_warn("%s: Exit...\n", __func__);
+	return ret;
+}
+
+/**
+ * configure_tile() - configures one tile of a blit operation
+ */
+static int configure_tile(struct b2r2_node_split_job *this,
+		struct b2r2_node *node, struct b2r2_node **next)
+{
+	int ret = 0;
+
+	struct b2r2_node *last;
+	struct b2r2_node_split_buf *src = &this->src;
+	struct b2r2_node_split_buf *dst = &this->dst;
+
+	struct b2r2_blt_rect dst_norm;
+	struct b2r2_blt_rect src_norm;
+
+	/* Normalize the dest coords to the dest rect coordinate space  */
+	dst_norm.x = dst->win.x - dst->rect.x;
+	dst_norm.y = dst->win.y - dst->rect.y;
+	dst_norm.width = dst->win.width;
+	dst_norm.height = dst->win.height;
+
+	if (dst->vso == B2R2_TY_VSO_BOTTOM_TO_TOP) {
+		/* The y coord should be counted from the bottom */
+		dst_norm.y = dst->rect.height - (dst_norm.y + 1);
+	}
+	if (dst->hso == B2R2_TY_HSO_RIGHT_TO_LEFT) {
+		/* The x coord should be counted from the right */
+		dst_norm.x = dst->rect.width - (dst_norm.x + 1);
+	}
+
+	/* If the destination is rotated we should swap x, y */
+	if (this->rotation) {
+		src_norm.x = dst_norm.y;
+		src_norm.y = dst_norm.x;
+		src_norm.width = dst_norm.height;
+		src_norm.height = dst_norm.width;
+	} else {
+		src_norm.x = dst_norm.x;
+		src_norm.y = dst_norm.y;
+		src_norm.width = dst_norm.width;
+		src_norm.height = dst_norm.height;
+	}
+
+	/* Convert to src coordinate space */
+	src->win.x = src_norm.x + src->rect.x;
+	src->win.y = src_norm.y + src->rect.y;
+	src->win.width = src_norm.width;
+	src->win.height = src_norm.height;
+
+	/* Do the configuration depending on operation type */
+	switch (this->type) {
+	case B2R2_DIRECT_FILL:
+		configure_direct_fill(node, this->src.color, dst, &last);
+		break;
+
+	case B2R2_DIRECT_COPY:
+		configure_direct_copy(node, src, dst, &last);
+		break;
+
+	case B2R2_FILL:
+		ret = configure_fill(node, src->color, src->fmt,
+				dst, this->ivmx, &last);
+		break;
+
+	case B2R2_FLIP: /* FLIP is just a copy with different VSO/HSO */
+	case B2R2_COPY:
+		ret = configure_copy(node, src, dst, this->ivmx, &last, this);
+		break;
+
+	case B2R2_ROTATE:
+		{
+			struct b2r2_node_split_buf *tmp = &this->tmp_bufs[0];
+
+			if (this->blend) {
+				b2r2_log_info("%s: rotation + blend\n",
+						__func__);
+
+				tmp->win.x = 0;
+				tmp->win.y = tmp->win.height - 1;
+				tmp->win.width = dst->win.width;
+				tmp->win.height = dst->win.height;
+
+				/* Rotate to the temp buf */
+				ret = configure_rotate(node, src, tmp,
+						this->ivmx, &node, NULL);
+				if (ret < 0)
+					goto error;
+
+				/* Then do a copy to the destination */
+				ret = configure_copy(node, tmp, dst, NULL,
+						&last, this);
+			} else {
+				/* Just do a rotation */
+				ret = configure_rotate(node, src, dst,
+						this->ivmx, &last, this);
+			}
+		}
+		break;
+
+	case B2R2_SCALE:
+		ret = configure_scale(node, src, dst, this->h_rsf, this->v_rsf,
+				this->ivmx, &last, this);
+		break;
+
+	case B2R2_SCALE_AND_ROTATE:
+		ret = configure_rot_scale(this, node, &last);
+		break;
+
+	default:
+		b2r2_log_warn("%s: Unsupported request\n", __func__);
+		ret = -ENOSYS;
+		goto error;
+		break;
+
+	}
+
+	if (ret < 0)
+		goto error;
+
+	/* Scale and rotate will configure its own blending and clipping */
+	if (this->type != B2R2_SCALE_AND_ROTATE) {
+
+		/* Configure blending and clipping */
+		do {
+			if (node == NULL) {
+				b2r2_log_warn("%s: "
+					"Internal error! Out of nodes!\n",
+					__func__);
+				ret = -ENOMEM;
+				goto error;
+			}
+
+			if (this->blend)
+				configure_blend(node, this->flags,
+						this->global_alpha,
+						this->swap_fg_bg);
+			if (this->clip)
+				configure_clip(node, &this->clip_rect);
+
+			node = node->next;
+
+		} while (node != last);
+	}
+
+	/* Consume the nodes */
+	*next = last;
+
+	return 0;
+
+error:
+	b2r2_log_warn("%s: Error!\n", __func__);
+	return ret;
+}
+
+/*
+ * configure_sub_rot() - configure a sub-rotation
+ *
+ * This functions configures a set of nodes for rotation using the destination
+ * window instead of the rectangle for calculating tiles.
+ */
+static int configure_sub_rot(struct b2r2_node *node,
+		struct b2r2_node_split_buf *src,
+		struct b2r2_node_split_buf *dst,
+		const u32 *ivmx, struct b2r2_node **next,
+		struct b2r2_node_split_job *job)
+{
+	int ret;
+
+	struct b2r2_blt_rect src_win;
+	struct b2r2_blt_rect dst_win;
+
+	u32 y_pixels;
+	u32 x_pixels;
+
+	memcpy(&src_win, &src->win, sizeof(src_win));
+	memcpy(&dst_win, &dst->win, sizeof(dst_win));
+
+	b2r2_log_info("%s: src_win=(%d, %d, %d, %d) "
+			"dst_win=(%d, %d, %d, %d)\n", __func__,
+			src_win.x, src_win.y, src_win.width, src_win.height,
+			dst_win.x, dst_win.y, dst_win.width, dst_win.height);
+
+	dst->win.height = B2R2_ROTATE_MAX_WIDTH;
+	if (dst->win.width % B2R2_ROTATE_MAX_WIDTH)
+		dst->win.width -= dst->win.width % B2R2_ROTATE_MAX_WIDTH;
+
+	while (x_pixels < dst_win.width) {
+		u32 src_x = src->win.x;
+		u32 src_w = src->win.width;
+		u32 dst_y = dst->win.y;
+		u32 dst_h = dst->win.height;
+
+		dst->win.width = min(dst->win.width,
+				dst_win.width - (int)x_pixels);
+		src->win.height = dst->win.width;
+
+		b2r2_log_info("%s: x_pixels=%d\n", __func__, x_pixels);
+
+		while (y_pixels < dst_win.height) {
+			dst->win.height = min(dst->win.height,
+					dst_win.height - (int)y_pixels);
+			src->win.width = dst->win.height;
+
+			b2r2_log_info("%s: y_pixels=%d\n", __func__, y_pixels);
+
+			ret = configure_rotate(node, src, dst, ivmx, &node, job);
+			if (ret < 0)
+				goto error;
+
+			src->win.x += (src->hso == B2R2_TY_HSO_LEFT_TO_RIGHT) ?
+					src->win.width : -src->win.width;
+			dst->win.y += (dst->vso == B2R2_TY_VSO_TOP_TO_BOTTOM) ?
+					dst->win.height : -dst->win.height;
+
+			y_pixels += dst->win.height;
+		}
+
+		src->win.x = src_x;
+		src->win.y += (src->vso == B2R2_TY_VSO_TOP_TO_BOTTOM) ?
+				src->win.height : -src->win.height;
+		src->win.width = src_w;
+
+		dst->win.x += (dst->hso == B2R2_TY_HSO_LEFT_TO_RIGHT) ?
+				dst->win.width : -dst->win.width;
+		dst->win.y = dst_y;
+		dst->win.height = dst_h;
+
+		x_pixels += dst->win.width;
+		y_pixels = 0;
+
+	}
+
+	memcpy(&src->win, &src_win, sizeof(src->win));
+	memcpy(&dst->win, &dst_win, sizeof(dst->win));
+
+	*next = node;
+
+	return 0;
+
+error:
+	b2r2_log_warn("%s: error!\n", __func__);
+	return ret;
+}
+
+/**
+ * configure_rot_downscale() - configures a combined rotate and downscale
+ *
+ * When doing a downscale it is better to do the rotation last.
+ */
+static int configure_rot_downscale(struct b2r2_node_split_job *this,
+		struct b2r2_node *node, struct b2r2_node **next)
+{
+	int ret;
+
+	struct b2r2_node_split_buf *src = &this->src;
+	struct b2r2_node_split_buf *dst = &this->dst;
+	struct b2r2_node_split_buf *tmp = &this->tmp_bufs[0];
+
+	tmp->win.x = 0;
+	tmp->win.y = 0;
+	tmp->win.width = dst->win.height;
+	tmp->win.height = dst->win.width;
+
+	ret = configure_scale(node, src, tmp, this->h_rsf, this->v_rsf,
+			this->ivmx, &node, this);
+	if (ret < 0)
+		goto error;
+
+	ret = configure_sub_rot(node, tmp, dst, NULL, &node, this);
+	if (ret < 0)
+		goto error;
+
+	*next = node;
+
+	return 0;
+
+error:
+	b2r2_log_info("%s: error!\n", __func__);
+	return ret;
+}
+
+/**
+ * configure_rot_upscale() - configures a combined rotate and upscale
+ *
+ * When doing an upscale it is better to do the rotation first.
+ */
+static int configure_rot_upscale(struct b2r2_node_split_job *this,
+		struct b2r2_node *node, struct b2r2_node **next)
+{
+	/* TODO: Implement a optimal upscale (rotation first) */
+	return configure_rot_downscale(this, node, next);
+}
+
+/**
+ * configure_rot_scale() - configures a combined rotation and scaling op
+ */
+static int configure_rot_scale(struct b2r2_node_split_job *this,
+		struct b2r2_node *node, struct b2r2_node **next)
+{
+	int ret;
+
+	bool upscale = (u32)this->h_rsf * (u32)this->v_rsf < (1 << 10);
+
+	if (upscale)
+		ret = configure_rot_upscale(this, node, next);
+	else
+		ret = configure_rot_downscale(this, node, next);
+
+	if (ret < 0)
+		goto error;
+
+	return 0;
+
+error:
+	b2r2_log_warn("%s: error!\n", __func__);
+	return ret;
+}
+
+/**
+ * configure_direct_fill() - configures the given node for direct fill
+ *
+ * @node  - the node to configure
+ * @color - the fill color
+ * @dst   - the destination buffer
+ * @next  - the next empty node in the node list
+ *
+ * This operation will always consume one node only.
+ */
+static void configure_direct_fill(struct b2r2_node *node, u32 color,
+		struct b2r2_node_split_buf *dst, struct b2r2_node **next)
+{
+	node->node.GROUP0.B2R2_CIC |= B2R2_CIC_COLOR_FILL | B2R2_CIC_SOURCE_1;
+	node->node.GROUP0.B2R2_INS |= B2R2_INS_SOURCE_1_DIRECT_FILL;
+
+	/* Target setup */
+	set_target(node, dst->addr, dst);
+
+	/* Source setup */
+
+	/* It seems B2R2 checks so that source and dest has the same format */
+	node->node.GROUP3.B2R2_STY = to_native_fmt(dst->fmt);
+	node->node.GROUP2.B2R2_S1CF = color;
+	node->node.GROUP2.B2R2_S2CF = 0;
+
+	/* Consume the node */
+	*next = node->next;
+}
+
+/**
+ * configure_direct_copy() - configures the node for direct copy
+ *
+ * @node - the node to configure
+ * @src  - the source buffer
+ * @dst  - the destination buffer
+ * @next - the next empty node in the node list
+ *
+ * This operation will always consume one node only.
+ */
+static void configure_direct_copy(struct b2r2_node *node,
+		struct b2r2_node_split_buf *src,
+		struct b2r2_node_split_buf *dst, struct b2r2_node **next)
+{
+	node->node.GROUP0.B2R2_CIC |= B2R2_CIC_SOURCE_1;
+	node->node.GROUP0.B2R2_INS |= B2R2_INS_SOURCE_1_DIRECT_COPY;
+
+	/* Source setup, use the base function to avoid altering the INS */
+	set_src(&node->node.GROUP3, src->addr, src);
+
+	/* Target setup */
+	set_target(node, dst->addr, dst);
+
+	/* Consume the node */
+	*next = node->next;
+}
+
+/**
+ * configure_fill() - configures the given node for color fill
+ *
+ * @node  - the node to configure
+ * @color - the fill color
+ * @fmt   - the source color format
+ * @dst   - the destination buffer
+ * @next  - the next empty node in the node list
+ *
+ * A normal fill operation can be combined with any other per pixel operations
+ * such as blend.
+ *
+ * This operation will consume as many nodes as are required to write to the
+ * destination format.
+ */
+static int configure_fill(struct b2r2_node *node, u32 color,
+		enum b2r2_blt_fmt fmt, struct b2r2_node_split_buf *dst,
+		const u32 *ivmx, struct b2r2_node **next)
+{
+	int ret;
+	struct b2r2_node *last;
+
+	/* Configure the destination */
+	ret = configure_dst(node, dst, ivmx, &last);
+	if (ret < 0)
+		goto error;
+
+	do {
+		if (node == NULL) {
+			b2r2_log_warn("%s: "
+			"Internal error! Out of nodes!\n", __func__);
+			ret = -ENOMEM;
+			goto error;
+		}
+
+		node->node.GROUP0.B2R2_CIC |= B2R2_CIC_SOURCE_2 |
+							B2R2_CIC_COLOR_FILL;
+		node->node.GROUP0.B2R2_INS |=
+				B2R2_INS_SOURCE_2_COLOR_FILL_REGISTER;
+		node->node.GROUP0.B2R2_ACK |= B2R2_ACK_MODE_BYPASS_S2_S3;
+
+		/* B2R2 has a bug that disables color fill from S2. As a
+		   workaround we use S1 for the color. */
+		node->node.GROUP2.B2R2_S1CF = 0;
+		node->node.GROUP2.B2R2_S2CF = color;
+
+		/* TO BE REMOVED: */
+		set_src_2(node, dst->addr, dst);
+		node->node.GROUP4.B2R2_STY = to_native_fmt(fmt);
+
+		/* Setup the iVMX for color conversion */
+		if (ivmx != NULL)
+			set_ivmx(node, ivmx);
+
+		if  ((dst->type == B2R2_FMT_TYPE_PLANAR) ||
+				(dst->type == B2R2_FMT_TYPE_SEMI_PLANAR)) {
+
+			node->node.GROUP0.B2R2_INS |=
+				B2R2_INS_RESCALE2D_ENABLED;
+			node->node.GROUP8.B2R2_FCTL =
+				B2R2_FCTL_HF2D_MODE_ENABLE_RESIZER |
+				B2R2_FCTL_VF2D_MODE_ENABLE_RESIZER |
+				B2R2_FCTL_LUMA_HF2D_MODE_ENABLE_RESIZER |
+				B2R2_FCTL_LUMA_VF2D_MODE_ENABLE_RESIZER;
+			node->node.GROUP9.B2R2_RSF =
+				(1 << (B2R2_RSF_HSRC_INC_SHIFT + 10)) |
+				(1 << (B2R2_RSF_VSRC_INC_SHIFT + 10));
+			node->node.GROUP9.B2R2_RZI =
+				B2R2_RZI_DEFAULT_HNB_REPEAT |
+				(2 << B2R2_RZI_VNB_REPEAT_SHIFT);
+
+			node->node.GROUP10.B2R2_RSF =
+				(1 << (B2R2_RSF_HSRC_INC_SHIFT + 10)) |
+				(1 << (B2R2_RSF_VSRC_INC_SHIFT + 10));
+			node->node.GROUP10.B2R2_RZI =
+				B2R2_RZI_DEFAULT_HNB_REPEAT |
+				(2 << B2R2_RZI_VNB_REPEAT_SHIFT);
+		}
+
+		node = node->next;
+
+	} while (node != last);
+
+	/* Consume the nodes */
+	*next = node;
+
+	return 0;
+error:
+	b2r2_log_warn("%s: Exit...\n", __func__);
+	return ret;
+}
+
+/**
+ * configure_copy() - configures the given node for a copy operation
+ *
+ * @node - the node to configure
+ * @src  - the source buffer
+ * @dst  - the destination buffer
+ * @ivmx - the iVMX to use for color conversion
+ * @next - the next empty node in the node list
+ *
+ * This operation will consume as many nodes as are required to write to the
+ * destination format.
+ */
+static int configure_copy(struct b2r2_node *node,
+		struct b2r2_node_split_buf *src,
+		struct b2r2_node_split_buf *dst, const u32 *ivmx,
+		struct b2r2_node **next,
+		struct b2r2_node_split_job *this)
+{
+	int ret;
+
+	struct b2r2_node *last;
+
+	ret = configure_dst(node, dst, ivmx, &last);
+	if (ret < 0)
+		goto error;
+
+	/* Configure the source for each node */
+	do {
+		if (node == NULL) {
+			b2r2_log_warn("%s: "
+			" Internal error! Out of nodes!\n", __func__);
+			ret = -ENOMEM;
+			goto error;
+		}
+
+		node->node.GROUP0.B2R2_ACK |= B2R2_ACK_MODE_BYPASS_S2_S3;
+		if (this != NULL &&
+				(this->flags & B2R2_BLT_FLAG_SOURCE_COLOR_KEY) != 0) {
+			u32 key_color = 0;
+
+			node->node.GROUP0.B2R2_ACK |= B2R2_ACK_CKEY_SEL_SRC_AFTER_CLUT |
+				B2R2_ACK_CKEY_RED_MATCH_IF_BETWEEN |
+				B2R2_ACK_CKEY_GREEN_MATCH_IF_BETWEEN |
+				B2R2_ACK_CKEY_BLUE_MATCH_IF_BETWEEN;
+			node->node.GROUP0.B2R2_INS |= B2R2_INS_CKEY_ENABLED;
+			node->node.GROUP0.B2R2_CIC |= B2R2_CIC_COLOR_KEY;
+
+			key_color = to_RGB888(this->flag_param, src->fmt);
+			node->node.GROUP12.B2R2_KEY1 = key_color;
+			node->node.GROUP12.B2R2_KEY2 = key_color;
+		}
+
+		if (this != NULL &&
+				(this->flags & B2R2_BLT_FLAG_CLUT_COLOR_CORRECTION) != 0) {
+			struct b2r2_blt_request *request =
+				container_of(this, struct b2r2_blt_request,
+						node_split_job);
+			node->node.GROUP0.B2R2_INS |= B2R2_INS_CLUTOP_ENABLED;
+			node->node.GROUP0.B2R2_CIC |= B2R2_CIC_CLUT;
+			node->node.GROUP7.B2R2_CCO = B2R2_CCO_CLUT_COLOR_CORRECTION |
+				B2R2_CCO_CLUT_UPDATE;
+			node->node.GROUP7.B2R2_CML = request->clut_phys_addr;
+		}
+		/* Configure the source(s) */
+		configure_src(node, src, ivmx);
+
+		node = node->next;
+	} while (node != last);
+
+	/* Consume the nodes */
+	*next = node;
+
+	return 0;
+error:
+	b2r2_log_warn("%s: Exit...\n", __func__);
+	return ret;
+}
+
+/**
+ * configure_rotate() - configures the given node for rotation
+ *
+ * @node - the node to configure
+ * @src  - the source buffer
+ * @dst  - the destination buffer
+ * @ivmx - the iVMX to use for color conversion
+ * @next - the next empty node in the node list
+ *
+ * This operation will consume as many nodes are are required by the combination
+ * of rotating and writing the destination format.
+ */
+static int configure_rotate(struct b2r2_node *node,
+		struct b2r2_node_split_buf *src,
+		struct b2r2_node_split_buf *dst, const u32 *ivmx,
+		struct b2r2_node **next,
+		struct b2r2_node_split_job *this)
+{
+	int ret;
+
+	struct b2r2_node *last;
+
+	ret = configure_copy(node, src, dst, ivmx, &last, this);
+	if (ret < 0)
+		goto error;
+
+	do {
+		if (node == NULL) {
+			b2r2_log_warn("%s: "
+				"Internal error! Out of nodes!\n", __func__);
+			ret = -ENOMEM;
+			goto error;
+		}
+
+		node->node.GROUP0.B2R2_INS |= B2R2_INS_ROTATION_ENABLED;
+
+		b2r2_log_debug("%s:\n"
+				"\tB2R2_TXY:  %.8x\tB2R2_TSZ:  %.8x\n"
+				"\tB2R2_S1XY: %.8x\tB2R2_S1SZ: %.8x\n"
+				"\tB2R2_S2XY: %.8x\tB2R2_S2SZ: %.8x\n"
+				"\tB2R2_S3XY: %.8x\tB2R2_S3SZ: %.8x\n"
+				"-----------------------------------\n",
+				__func__, node->node.GROUP1.B2R2_TXY,
+				node->node.GROUP1.B2R2_TSZ,
+				node->node.GROUP3.B2R2_SXY,
+				node->node.GROUP3.B2R2_SSZ,
+				node->node.GROUP4.B2R2_SXY,
+				node->node.GROUP4.B2R2_SSZ,
+				node->node.GROUP5.B2R2_SXY,
+				node->node.GROUP5.B2R2_SSZ);
+
+		node = node->next;
+
+	} while (node != last);
+
+	/* Consume the nodes */
+	*next = node;
+
+	return 0;
+error:
+	b2r2_log_warn("%s: error!\n", __func__);
+	return ret;
+}
+
+/**
+ * configure_scale() - configures the given node for scaling
+ *
+ * @node  - the node to configure
+ * @src   - the source buffer
+ * @dst   - the destination buffer
+ * @h_rsf - the horizontal rescale factor
+ * @v_rsf - the vertical rescale factor
+ * @ivmx  - the iVMX to use for color conversion
+ * @next  - the next empty node in the node list
+ */
+static int configure_scale(struct b2r2_node *node,
+		struct b2r2_node_split_buf *src,
+		struct b2r2_node_split_buf *dst,
+		u16 h_rsf, u16 v_rsf,
+		const u32 *ivmx, struct b2r2_node **next,
+		struct b2r2_node_split_job *this)
+{
+	int ret;
+
+	struct b2r2_node *last;
+
+	struct b2r2_filter_spec *hf = NULL;
+	struct b2r2_filter_spec *vf = NULL;
+
+	u32 fctl = 0;
+	u32 rsf = 0;
+	u32 rzi = 0;
+	u32 hsrc_init = 0;
+	u32 vsrc_init = 0;
+	u32 hfp = 0;
+	u32 vfp = 0;
+
+	u16 luma_h_rsf = h_rsf;
+	u16 luma_v_rsf = v_rsf;
+
+	struct b2r2_filter_spec *luma_hf = NULL;
+	struct b2r2_filter_spec *luma_vf = NULL;
+
+	u32 luma_fctl = 0;
+	u32 luma_rsf = 0;
+	u32 luma_rzi = 0;
+	u32 luma_hsrc_init = 0;
+	u32 luma_vsrc_init = 0;
+	u32 luma_hfp = 0;
+	u32 luma_vfp = 0;
+
+	s32 src_x;
+	s32 src_y;
+	s32 src_w;
+	s32 src_h;
+
+	bool upsample;
+	bool downsample;
+
+	struct b2r2_blt_rect tmp_win = src->win;
+
+	/* Rescale the normalized source window */
+	src_x = inv_rescale(src->win.x - src->rect.x, luma_h_rsf);
+	src_y = inv_rescale(src->win.y - src->rect.y, luma_v_rsf);
+	src_w = inv_rescale(src->win.width, luma_h_rsf);
+	src_h = inv_rescale(src->win.height, luma_v_rsf);
+
+	/* Convert to src coordinate space */
+	src->win.x = (src_x >> 10) + src->rect.x;
+	src->win.y = (src_y >> 10) + src->rect.y;
+
+	/*
+	 * Since the stripe might start and end on a fractional pixel
+	 * we need to count all the touched pixels in the width.
+	 *
+	 * Example:
+	 *   src_x = 1.8, src_w = 2.8
+	 *
+	 *   The stripe touches pixels 1.8 through 4.6, i.e. 4 pixels
+	 */
+	src->win.width = ((src_x & 0x3ff) + src_w + 0x3ff) >> 10;
+	src->win.height = ((src_y & 0x3ff) + src_h + 0x3ff) >> 10;
+
+	luma_hsrc_init = src_x & 0x3ff;
+	luma_vsrc_init = src_y & 0x3ff;
+
+	/* Check for upsampling of chroma */
+	upsample = src->type != B2R2_FMT_TYPE_RASTER &&
+		!is_yuv444_fmt(src->fmt);
+	if (upsample) {
+		h_rsf /= 2;
+
+		if (is_yuv420_fmt(src->fmt))
+			v_rsf /= 2;
+	}
+
+	/* Check for downsampling of chroma */
+	downsample = dst->type != B2R2_FMT_TYPE_RASTER &&
+		!is_yuv444_fmt(dst->fmt);
+	if (downsample) {
+		h_rsf *= 2;
+
+		if (is_yuv420_fmt(dst->fmt))
+			v_rsf *= 2;
+	}
+
+	src_x = inv_rescale(tmp_win.x - src->rect.x, h_rsf);
+	src_y = inv_rescale(tmp_win.y - src->rect.y, v_rsf);
+	hsrc_init = src_x & 0x3ff;
+	vsrc_init = src_y & 0x3ff;
+
+	/* Configure resize and filters */
+	fctl = B2R2_FCTL_HF2D_MODE_ENABLE_RESIZER |
+		B2R2_FCTL_VF2D_MODE_ENABLE_RESIZER;
+	luma_fctl = B2R2_FCTL_LUMA_HF2D_MODE_ENABLE_RESIZER |
+		B2R2_FCTL_LUMA_VF2D_MODE_ENABLE_RESIZER;
+
+	rsf =  (h_rsf << B2R2_RSF_HSRC_INC_SHIFT) |
+			(v_rsf << B2R2_RSF_VSRC_INC_SHIFT);
+	luma_rsf = (luma_h_rsf << B2R2_RSF_HSRC_INC_SHIFT) |
+			(luma_v_rsf << B2R2_RSF_VSRC_INC_SHIFT);
+
+	rzi = B2R2_RZI_DEFAULT_HNB_REPEAT |
+		(2 << B2R2_RZI_VNB_REPEAT_SHIFT) |
+		(hsrc_init << B2R2_RZI_HSRC_INIT_SHIFT) |
+		(vsrc_init << B2R2_RZI_VSRC_INIT_SHIFT);
+	luma_rzi = B2R2_RZI_DEFAULT_HNB_REPEAT |
+		(2 << B2R2_RZI_VNB_REPEAT_SHIFT) |
+		(luma_hsrc_init << B2R2_RZI_HSRC_INIT_SHIFT) |
+		(luma_vsrc_init << B2R2_RZI_VSRC_INIT_SHIFT);
+
+	/*
+	 * We should only filter if there is an actual rescale (i.e. not when
+	 * up or downsampling).
+	 */
+	if (luma_h_rsf != (1 << 10)) {
+		hf = b2r2_filter_find(h_rsf);
+		luma_hf = b2r2_filter_find(luma_h_rsf);
+	}
+	if (luma_v_rsf != (1 << 10)) {
+		vf = b2r2_filter_find(v_rsf);
+		luma_vf = b2r2_filter_find(luma_v_rsf);
+	}
+
+	if (hf) {
+		fctl |= B2R2_FCTL_HF2D_MODE_ENABLE_COLOR_CHANNEL_FILTER;
+		hfp = hf->h_coeffs_phys_addr;
+	}
+
+	if (vf) {
+		fctl |= B2R2_FCTL_VF2D_MODE_ENABLE_COLOR_CHANNEL_FILTER;
+		vfp = vf->v_coeffs_phys_addr;
+	}
+
+	if (luma_hf) {
+		luma_fctl |= B2R2_FCTL_LUMA_HF2D_MODE_ENABLE_FILTER;
+		luma_hfp = luma_hf->h_coeffs_phys_addr;
+	}
+
+	if (luma_vf) {
+		luma_fctl |= B2R2_FCTL_LUMA_VF2D_MODE_ENABLE_FILTER;
+		luma_vfp = luma_vf->v_coeffs_phys_addr;
+	}
+
+	ret = configure_copy(node, src, dst, ivmx, &last, this);
+	if (ret < 0)
+		goto error;
+
+	do {
+		bool chroma_rescale =
+			(h_rsf != (1 << 10)) || (v_rsf != (1 << 10));
+		bool luma_rescale =
+			(luma_h_rsf != (1 << 10)) || (luma_v_rsf != (1 << 10));
+		bool src_raster = src->type == B2R2_FMT_TYPE_RASTER;
+		bool dst_raster = dst->type == B2R2_FMT_TYPE_RASTER;
+		bool dst_chroma =
+			node->node.GROUP1.B2R2_TTY & B2R2_TTY_CHROMA_NOT_LUMA;
+
+		if (node == NULL) {
+			b2r2_log_warn("%s: "
+				"Internal error! Out of nodes!\n", __func__);
+			ret = -ENOMEM;
+			goto error;
+		}
+
+
+		node->node.GROUP0.B2R2_CIC |= B2R2_CIC_FILTER_CONTROL;
+
+		/*
+		 * If the source format is anything other than raster, we
+		 * always have to enable both chroma and luma resizers. This
+		 * could be a bug in the hardware, since it is not mentioned in
+		 * the specification.
+		 *
+		 * Otherwise, we will only enable the chroma resizer when
+		 * writing chroma and the luma resizer when writing luma
+		 * (or both when writing raster). Also, if there is no rescale
+		 * to be done there's no point in using the resizers.
+		 */
+
+		if (!src_raster || (chroma_rescale &&
+					(dst_raster || dst_chroma))) {
+			/* Enable chroma resize */
+			node->node.GROUP0.B2R2_INS |=
+				B2R2_INS_RESCALE2D_ENABLED;
+			node->node.GROUP0.B2R2_CIC |= B2R2_CIC_RESIZE_CHROMA;
+			node->node.GROUP8.B2R2_FCTL |= fctl;
+
+			node->node.GROUP9.B2R2_RSF = rsf;
+			node->node.GROUP9.B2R2_RZI = rzi;
+			node->node.GROUP9.B2R2_HFP = hfp;
+			node->node.GROUP9.B2R2_VFP = vfp;
+		}
+
+		if (!src_raster || (luma_rescale &&
+					(dst_raster || !dst_chroma))) {
+			/* Enable luma resize */
+			node->node.GROUP0.B2R2_INS |=
+				B2R2_INS_RESCALE2D_ENABLED;
+			node->node.GROUP0.B2R2_CIC |= B2R2_CIC_RESIZE_LUMA;
+			node->node.GROUP8.B2R2_FCTL |= luma_fctl;
+
+			node->node.GROUP10.B2R2_RSF = luma_rsf;
+			node->node.GROUP10.B2R2_RZI = luma_rzi;
+			node->node.GROUP10.B2R2_HFP = luma_hfp;
+			node->node.GROUP10.B2R2_VFP = luma_vfp;
+		}
+
+		b2r2_log_info("%s:\n"
+				"\tB2R2_TXY:  %.8x\tB2R2_TSZ:  %.8x\n"
+				"\tB2R2_S1XY: %.8x\tB2R2_S1SZ: %.8x\n"
+				"\tB2R2_S2XY: %.8x\tB2R2_S2SZ: %.8x\n"
+				"\tB2R2_S3XY: %.8x\tB2R2_S3SZ: %.8x\n"
+				"----------------------------------\n",
+				__func__, node->node.GROUP1.B2R2_TXY,
+				node->node.GROUP1.B2R2_TSZ,
+				node->node.GROUP3.B2R2_SXY,
+				node->node.GROUP3.B2R2_SSZ,
+				node->node.GROUP4.B2R2_SXY,
+				node->node.GROUP4.B2R2_SSZ,
+				node->node.GROUP5.B2R2_SXY,
+				node->node.GROUP5.B2R2_SSZ);
+
+		node = node->next;
+
+	} while (node != last);
+
+
+
+	/* Consume the nodes */
+	*next = node;
+
+	return 0;
+error:
+	b2r2_log_warn("%s: Exit...\n", __func__);
+	return ret;
+}
+
+/**
+ * configure_src() - configures the source registers and the iVMX
+ *
+ * @node - the node to configure
+ * @src  - the source buffer
+ * @ivmx - the iVMX to use for color conversion
+ *
+ * This operation will not consume any nodes
+ */
+static void configure_src(struct b2r2_node *node,
+		struct b2r2_node_split_buf *src, const u32 *ivmx)
+{
+	struct b2r2_node_split_buf tmp_buf;
+
+	b2r2_log_info("%s: src.win=(%d, %d, %d, %d)\n", __func__,
+			src->win.x, src->win.y, src->win.width,
+			src->win.height);
+
+	/* Configure S1 - S3 */
+	switch (src->type) {
+	case B2R2_FMT_TYPE_RASTER:
+		set_src_2(node, src->addr, src);
+		break;
+	case B2R2_FMT_TYPE_SEMI_PLANAR:
+		memcpy(&tmp_buf, src, sizeof(tmp_buf));
+
+		/*
+		 * For 420 and 422 the chroma has lower resolution than the
+		 * luma
+		 */
+		if (!is_yuv444_fmt(src->fmt)) {
+			tmp_buf.win.x >>= 1;
+			tmp_buf.win.width = (tmp_buf.win.width + 1) / 2;
+
+			if (is_yuv420_fmt(src->fmt)) {
+				tmp_buf.win.height =
+					(tmp_buf.win.height + 1) / 2;
+				tmp_buf.win.y >>= 1;
+			}
+		}
+
+		set_src_3(node, src->addr, src);
+		set_src_2(node, tmp_buf.chroma_addr, &tmp_buf);
+		break;
+	case B2R2_FMT_TYPE_PLANAR:
+		memcpy(&tmp_buf, src, sizeof(tmp_buf));
+
+		if (!is_yuv444_fmt(src->fmt)) {
+			/*
+			 * Each chroma buffer will have half as many values
+			 * per line as the luma buffer
+			 */
+			tmp_buf.pitch = (tmp_buf.pitch + 1) / 2;
+
+			/* Horizontal resolution is half */
+			tmp_buf.win.x >>= 1;
+			tmp_buf.win.width = (tmp_buf.win.width + 1) / 2;
+
+			/*
+			 * If the buffer is in YUV420 format, the vertical
+			 * resolution is half as well
+			 */
+			if (is_yuv420_fmt(src->fmt)) {
+				tmp_buf.win.height =
+					(tmp_buf.win.height + 1) / 2;
+				tmp_buf.win.y >>= 1;
+			}
+		}
+
+		set_src_3(node, src->addr, src);                   /* Y */
+		set_src_2(node, tmp_buf.chroma_addr, &tmp_buf);    /* U */
+		set_src_1(node, tmp_buf.chroma_cr_addr, &tmp_buf); /* V */
+
+		break;
+	default:
+		/* Should never, ever happen */
+		BUG_ON(1);
+		break;
+	}
+
+	/* Configure the iVMX for color space conversions */
+	if (ivmx != NULL)
+		set_ivmx(node, ivmx);
+}
+
+/**
+ * configure_dst() - configures the destination registers of the given node
+ *
+ * @node - the node to configure
+ * @ivmx - the iVMX to use for color conversion
+ * @dst  - the destination buffer
+ *
+ * This operation will consume as many nodes as are required to write the
+ * destination format.
+ */
+static int configure_dst(struct b2r2_node *node,
+		struct b2r2_node_split_buf *dst, const u32 *ivmx,
+		struct b2r2_node **next)
+{
+	int ret;
+	int nbr_planes = 1;
+	int i;
+
+	struct b2r2_node_split_buf dst_planes[3];
+
+	b2r2_log_info("%s: dst.win=(%d, %d, %d, %d)\n", __func__,
+			dst->win.x, dst->win.y, dst->win.width,
+			dst->win.height);
+
+	memcpy(&dst_planes[0], dst, sizeof(dst_planes[0]));
+
+	if (dst->type != B2R2_FMT_TYPE_RASTER) {
+		/* There will be at least 2 planes */
+		nbr_planes = 2;
+
+		memcpy(&dst_planes[1], dst, sizeof(dst_planes[1]));
+
+		dst_planes[1].addr = dst->chroma_addr;
+		dst_planes[1].plane_selection = B2R2_TTY_CHROMA_NOT_LUMA;
+
+		if (!is_yuv444_fmt(dst->fmt)) {
+			/* Horizontal resolution is half */
+			dst_planes[1].win.x /= 2;
+			/*
+			 * Must round up the chroma size to handle cases when
+			 * luma size is not divisible by 2. E.g. luma width==7 r
+			 * equires chroma width==4. Chroma width==7/2==3 is only
+			 * enough for luma width==6.
+			 */
+			dst_planes[1].win.width =
+				(dst_planes[1].win.width + 1) / 2;
+
+			/*
+			 * If the buffer is in YUV420 format, the vertical
+			 * resolution is half as well. Height must be rounded in
+			 * the same way as is done for width.
+			 */
+			if (is_yuv420_fmt(dst->fmt)) {
+				dst_planes[1].win.y /= 2;
+				dst_planes[1].win.height =
+					(dst_planes[1].win.height + 1) / 2;
+			}
+		}
+
+		if (dst->type == B2R2_FMT_TYPE_PLANAR) {
+			/* There will be a third plane as well */
+			nbr_planes = 3;
+
+			if (!is_yuv444_fmt(dst->fmt)) {
+				/* The chroma planes have half the luma pitch */
+				dst_planes[1].pitch /= 2;
+			}
+
+			memcpy(&dst_planes[2], &dst_planes[1],
+				sizeof(dst_planes[2]));
+			dst_planes[2].addr = dst->chroma_cr_addr;
+
+			/*
+			 * The third plane will be Cr.
+			 * The flag B2R2_TTY_CB_NOT_CR actually works
+			 * the other way around, i.e. as if it was
+			 * B2R2_TTY_CR_NOT_CB.
+			 */
+			dst_planes[2].chroma_selection = B2R2_TTY_CB_NOT_CR;
+		}
+
+	}
+
+	/* Configure one node for each plane */
+	for (i = 0; i < nbr_planes; i++) {
+
+		if (node == NULL) {
+			b2r2_log_warn("%s: "
+				"Internal error! Out of nodes!\n", __func__);
+			ret = -ENOMEM;
+			goto error;
+		}
+
+		/*
+		 * When writing chroma, there's no need to read the luma and
+		 * vice versa.
+		 */
+		if ((node->node.GROUP3.B2R2_STY & B2R2_NATIVE_YUV) &&
+				(nbr_planes > 1)) {
+			if (i != 0) {
+				node->node.GROUP4.B2R2_STY |=
+					B2R2_S3TY_ENABLE_BLANK_ACCESS;
+			}
+			if (i != 1) {
+				node->node.GROUP0.B2R2_INS &=
+					~B2R2_INS_SOURCE_2_FETCH_FROM_MEM;
+				node->node.GROUP0.B2R2_INS |=
+					B2R2_INS_SOURCE_2_COLOR_FILL_REGISTER;
+			}
+			if (i != 2) {
+				node->node.GROUP0.B2R2_INS &=
+					~B2R2_INS_SOURCE_1_FETCH_FROM_MEM;
+				node->node.GROUP0.B2R2_INS |=
+					B2R2_INS_SOURCE_1_COLOR_FILL_REGISTER;
+			}
+		} else if ((node->node.GROUP3.B2R2_STY &
+					(B2R2_NATIVE_YCBCR42X_MBN |
+						B2R2_NATIVE_YCBCR42X_R2B)) &&
+				(nbr_planes > 1)) {
+			if (i != 0) {
+				node->node.GROUP4.B2R2_STY |=
+					B2R2_S3TY_ENABLE_BLANK_ACCESS;
+			}
+		}
+
+
+		set_target(node, dst_planes[i].addr, &dst_planes[i]);
+
+		node = node->next;
+	}
+
+	/* Consume the nodes */
+	*next = node;
+
+	return 0;
+error:
+	b2r2_log_warn("%s: Exit...\n", __func__);
+	return ret;
+
+}
+
+/**
+ * configure_blend() - configures the given node for alpha blending
+ *
+ * @node         - the node to configure
+ * @flags        - the flags passed in the blt_request
+ * @global_alpha - the global alpha to use (if enabled in flags)
+ * @swap_fg_bg   - if true, fg will be on s1 instead of s2
+ *
+ * This operation will not consume any nodes.
+ *
+ * NOTE: This method should be called _AFTER_ the destination has been
+ *       configured.
+ *
+ * WARNING: Take care when using this with semi-planar or planar sources since
+ *          either S1 or S2 will be overwritten!
+ */
+static void configure_blend(struct b2r2_node *node, u32 flags, u32 global_alpha,
+		bool swap_fg_bg)
+{
+	node->node.GROUP0.B2R2_ACK &= ~(B2R2_ACK_MODE_BYPASS_S2_S3);
+
+	/* Check if the foreground is premultiplied */
+	if ((flags & B2R2_BLT_FLAG_SRC_IS_NOT_PREMULT) != 0)
+		node->node.GROUP0.B2R2_ACK |= B2R2_ACK_MODE_BLEND_NOT_PREMULT;
+	else
+		node->node.GROUP0.B2R2_ACK |= B2R2_ACK_MODE_BLEND_PREMULT;
+
+
+	/* Check if global alpha blend should be enabled */
+	if ((flags & B2R2_BLT_FLAG_GLOBAL_ALPHA_BLEND) != 0) {
+
+		/* B2R2 expects the global alpha to be in 0...128 range */
+		global_alpha = (global_alpha*128)/255;
+
+		node->node.GROUP0.B2R2_ACK |=
+			global_alpha <<	B2R2_ACK_GALPHA_ROPID_SHIFT;
+	} else {
+		node->node.GROUP0.B2R2_ACK |=
+			(128 << B2R2_ACK_GALPHA_ROPID_SHIFT);
+	}
+
+	/* Copy the destination config to the appropriate source and clear any
+	   clashing flags */
+	if (swap_fg_bg) {
+		/* S1 will be foreground, S2 background */
+		node->node.GROUP0.B2R2_CIC |= B2R2_CIC_SOURCE_2;
+		node->node.GROUP0.B2R2_INS |= B2R2_INS_SOURCE_2_FETCH_FROM_MEM;
+		node->node.GROUP0.B2R2_ACK |= B2R2_ACK_SWAP_FG_BG;
+
+		node->node.GROUP4.B2R2_SBA = node->node.GROUP1.B2R2_TBA;
+		node->node.GROUP4.B2R2_STY = node->node.GROUP1.B2R2_TTY;
+		node->node.GROUP4.B2R2_SXY = node->node.GROUP1.B2R2_TXY;
+		node->node.GROUP4.B2R2_SSZ = node->node.GROUP1.B2R2_TSZ;
+
+		node->node.GROUP4.B2R2_STY &= ~(B2R2_S2TY_A1_SUBST_KEY_MODE |
+				B2R2_S2TY_CHROMA_LEFT_EXT_AVERAGE);
+	} else {
+		/* S1 will be background, S2 foreground */
+		node->node.GROUP0.B2R2_CIC |= B2R2_CIC_SOURCE_1;
+		node->node.GROUP0.B2R2_INS |= B2R2_INS_SOURCE_1_FETCH_FROM_MEM;
+
+		node->node.GROUP3.B2R2_SBA = node->node.GROUP1.B2R2_TBA;
+		node->node.GROUP3.B2R2_STY |= node->node.GROUP1.B2R2_TTY;
+		node->node.GROUP3.B2R2_SXY = node->node.GROUP1.B2R2_TXY;
+
+		node->node.GROUP3.B2R2_STY &= ~(B2R2_S1TY_A1_SUBST_KEY_MODE);
+
+	}
+}
+
+/**
+ * configure_clip() - configures destination clipping for the given node
+ *
+ *   @node      - the node to configure
+ *   @clip_rect - the clip rectangle
+ *
+ *  This operation does not consume any nodes.
+ */
+static void configure_clip(struct b2r2_node *node,
+		struct b2r2_blt_rect *clip_rect)
+{
+	s32 l = clip_rect->x;
+	s32 r = clip_rect->x + clip_rect->width - 1;
+	s32 t = clip_rect->y;
+	s32 b = clip_rect->y + clip_rect->height - 1;
+
+	node->node.GROUP0.B2R2_CIC |= B2R2_CIC_CLIP_WINDOW;
+	node->node.GROUP0.B2R2_INS |= B2R2_INS_RECT_CLIP_ENABLED;
+
+	/* Clip window setup */
+	node->node.GROUP6.B2R2_CWO =
+			((t & 0x7FFF) << B2R2_CWO_Y_SHIFT) |
+			((l & 0x7FFF) << B2R2_CWO_X_SHIFT);
+	node->node.GROUP6.B2R2_CWS =
+			((b & 0x7FFF) << B2R2_CWO_Y_SHIFT) |
+			((r & 0x7FFF) << B2R2_CWO_X_SHIFT);
+}
+
+/**
+ * set_buf() - configures the given buffer with the provided values
+ *
+ * @addr       - the physical base address
+ * @img        - the blt image to base the buffer on
+ * @rect       - the rectangle to use
+ * @color_fill - determines whether the buffer should be used for color fill
+ * @color      - the color to use in case of color fill
+ */
+static void set_buf(struct b2r2_node_split_buf *buf, u32 addr,
+		const struct b2r2_blt_img *img,
+		const struct b2r2_blt_rect *rect, bool color_fill, u32 color)
+{
+	memset(buf, 0, sizeof(*buf));
+
+	buf->fmt = img->fmt;
+	buf->type = get_fmt_type(img->fmt);
+
+	if (color_fill) {
+		buf->type = B2R2_FMT_TYPE_RASTER;
+		buf->color = color;
+	} else {
+		buf->addr = addr;
+
+		buf->alpha_range = get_alpha_range(img->fmt);
+
+		if (img->pitch == 0)
+			buf->pitch = fmt_byte_pitch(img->fmt, img->width);
+		else
+			buf->pitch = img->pitch;
+
+		buf->height = img->height;
+		buf->width = img->width;
+
+		switch (buf->type) {
+		case B2R2_FMT_TYPE_SEMI_PLANAR:
+			buf->chroma_addr = (u32)(((u8 *)addr) +
+					buf->pitch * buf->height);
+			break;
+		case B2R2_FMT_TYPE_PLANAR:
+			buf->chroma_addr = (u32)(((u8 *)addr) +
+					buf->pitch * buf->height);
+			if (is_yuv420_fmt(buf->fmt)) {
+				/*
+				 * Use ceil(height/2) in case
+				 * buffer height is not divisible by 2.
+				 */
+				buf->chroma_cr_addr =
+					(u32)(((u8 *)buf->chroma_addr) +
+					(buf->pitch >> 1) *
+					((buf->height + 1) >> 1));
+			} else if (is_yuv422_fmt(buf->fmt)) {
+				buf->chroma_cr_addr =
+					(u32)(((u8 *)buf->chroma_addr) +
+					(buf->pitch >> 1) * buf->height);
+			} else {
+				buf->chroma_cr_addr =
+					(u32)(((u8 *)buf->chroma_addr) +
+					(buf->pitch * buf->height));
+			}
+			break;
+		default:
+			break;
+		}
+
+		memcpy(&buf->rect, rect, sizeof(buf->rect));
+	}
+}
+
+/**
+ * setup_tmp_buf() - configure a temporary buffer
+ */
+static int setup_tmp_buf(struct b2r2_node_split_buf *tmp, u32 max_size,
+		enum b2r2_blt_fmt pref_fmt, u32 pref_width, u32 pref_height)
+{
+	int ret;
+
+	enum b2r2_blt_fmt fmt;
+
+	u32 width;
+	u32 height;
+	u32 pitch;
+	u32 size;
+
+	/* Determine what format we should use for the tmp buf */
+	if (is_rgb_fmt(pref_fmt)) {
+		fmt = B2R2_BLT_FMT_32_BIT_ARGB8888;
+	} else if (is_bgr_fmt(pref_fmt)) {
+		fmt = B2R2_BLT_FMT_32_BIT_ABGR8888;
+	} else if (is_yvu_fmt(pref_fmt)) {
+		fmt = B2R2_BLT_FMT_CB_Y_CR_Y;
+	} else if (is_yuv_fmt(pref_fmt)) {
+		fmt = B2R2_BLT_FMT_32_BIT_AYUV8888;
+	} else {
+		/* Wait, what? */
+		b2r2_log_warn("%s: "
+			"Cannot create tmp buf from this fmt (%d)\n", __func__,
+			pref_fmt);
+		ret = -EINVAL;
+		goto error;
+	}
+
+	/* See if we can fit the entire preferred rectangle */
+	width = pref_width;
+	height = pref_height;
+	pitch = fmt_byte_pitch(fmt, width);
+	size = pitch * height;
+
+	if (size > max_size) {
+		/* We need to limit the size, so we choose a different width */
+		width = MIN(width, B2R2_RESCALE_MAX_WIDTH);
+		pitch = fmt_byte_pitch(fmt, width);
+		height = MIN(height, max_size / pitch);
+		size = pitch * height;
+	}
+
+	/* We should at least have enough room for one scanline */
+	if (height == 0) {
+		b2r2_log_warn("%s: Not enough tmp mem!\n",
+			__func__);
+		ret = -ENOMEM;
+		goto error;
+	}
+
+	memset(tmp, 0, sizeof(*tmp));
+
+	tmp->fmt = fmt;
+	tmp->type = B2R2_FMT_TYPE_RASTER;
+	tmp->height = height;
+	tmp->width = width;
+	tmp->pitch = pitch;
+
+	tmp->rect.width = width;
+	tmp->rect.height = tmp->height;
+	tmp->alpha_range = B2R2_TY_ALPHA_RANGE_255;
+
+	return 0;
+error:
+	b2r2_log_warn("%s: Exit...\n", __func__);
+	return ret;
+
+}
+
+/**
+ * get_alpha_range() - returns the alpha range of the given format
+ */
+static enum b2r2_ty get_alpha_range(enum b2r2_blt_fmt fmt)
+{
+	switch (fmt) {
+	case B2R2_BLT_FMT_24_BIT_ARGB8565:
+	case B2R2_BLT_FMT_32_BIT_ARGB8888:
+	case B2R2_BLT_FMT_32_BIT_AYUV8888:
+	case B2R2_BLT_FMT_8_BIT_A8:
+	case B2R2_BLT_FMT_32_BIT_ABGR8888:
+		return B2R2_TY_ALPHA_RANGE_255; /* 0 - 255 */
+	default:
+		return B2R2_TY_ALPHA_RANGE_128; /* 0 - 128 */
+	}
+}
+
+/**
+ * get_alpha() - returns the pixel alpha in 0...255 range
+ */
+static u8 get_alpha(enum b2r2_blt_fmt fmt, u32 pixel)
+{
+	switch (fmt) {
+	case B2R2_BLT_FMT_32_BIT_ARGB8888:
+	case B2R2_BLT_FMT_32_BIT_ABGR8888:
+	case B2R2_BLT_FMT_32_BIT_AYUV8888:
+		return (pixel >> 24) & 0xff;
+	case B2R2_BLT_FMT_24_BIT_ARGB8565:
+		return (pixel & 0xfff) >> 16;
+	case B2R2_BLT_FMT_16_BIT_ARGB4444:
+		return (((pixel >> 12) & 0xf) * 255) / 15;
+	case B2R2_BLT_FMT_16_BIT_ARGB1555:
+		return (pixel >> 15) * 255;
+	case B2R2_BLT_FMT_1_BIT_A1:
+		return pixel * 255;
+	case B2R2_BLT_FMT_8_BIT_A8:
+		return pixel;
+	default:
+		return 255;
+	}
+}
+
+/**
+ * set_alpha() - returns a color value with the alpha component set
+ */
+static u32 set_alpha(enum b2r2_blt_fmt fmt, u8 alpha, u32 color)
+{
+	u32 alpha_mask;
+
+	switch (fmt) {
+	case B2R2_BLT_FMT_32_BIT_ARGB8888:
+	case B2R2_BLT_FMT_32_BIT_ABGR8888:
+	case B2R2_BLT_FMT_32_BIT_AYUV8888:
+		color &= 0x00ffffff;
+		alpha_mask = alpha << 24;
+		break;
+	case B2R2_BLT_FMT_24_BIT_ARGB8565:
+		color &= 0x00ffff;
+		alpha_mask = alpha << 16;
+		break;
+	case B2R2_BLT_FMT_16_BIT_ARGB4444:
+		color &= 0x0fff;
+		alpha_mask = (alpha << 8) & 0xF000;
+		break;
+	case B2R2_BLT_FMT_16_BIT_ARGB1555:
+		color &= 0x7fff;
+		alpha_mask = (alpha / 255) << 15 ;
+		break;
+	case B2R2_BLT_FMT_1_BIT_A1:
+		color = 0;
+		alpha_mask = (alpha / 255);
+		break;
+	case B2R2_BLT_FMT_8_BIT_A8:
+		color = 0;
+		alpha_mask = alpha;
+		break;
+	default:
+		alpha_mask = 0;
+	}
+
+	return color | alpha_mask;
+}
+
+/**
+ * fmt_has_alpha() - returns whether the given format carries an alpha value
+ */
+static bool fmt_has_alpha(enum b2r2_blt_fmt fmt)
+{
+	switch (fmt) {
+	case B2R2_BLT_FMT_16_BIT_ARGB4444:
+	case B2R2_BLT_FMT_16_BIT_ARGB1555:
+	case B2R2_BLT_FMT_32_BIT_ARGB8888:
+	case B2R2_BLT_FMT_32_BIT_ABGR8888:
+	case B2R2_BLT_FMT_24_BIT_ARGB8565:
+	case B2R2_BLT_FMT_32_BIT_AYUV8888:
+	case B2R2_BLT_FMT_1_BIT_A1:
+	case B2R2_BLT_FMT_8_BIT_A8:
+		return true;
+	default:
+		return false;
+	}
+}
+
+/**
+ * is_rgb_fmt() - returns whether the given format is a rgb format
+ */
+static bool is_rgb_fmt(enum b2r2_blt_fmt fmt)
+{
+	switch (fmt) {
+	case B2R2_BLT_FMT_16_BIT_ARGB4444:
+	case B2R2_BLT_FMT_16_BIT_ARGB1555:
+	case B2R2_BLT_FMT_16_BIT_RGB565:
+	case B2R2_BLT_FMT_24_BIT_RGB888:
+	case B2R2_BLT_FMT_32_BIT_ARGB8888:
+	case B2R2_BLT_FMT_24_BIT_ARGB8565:
+	case B2R2_BLT_FMT_1_BIT_A1:
+	case B2R2_BLT_FMT_8_BIT_A8:
+		return true;
+	default:
+		return false;
+	}
+}
+
+/**
+ * is_bgr_fmt() - returns whether the given format is a bgr format
+ */
+static bool is_bgr_fmt(enum b2r2_blt_fmt fmt)
+{
+	return (fmt == B2R2_BLT_FMT_32_BIT_ABGR8888);
+}
+
+/**
+ * is_yuv_fmt() - returns whether the given format is a yuv format
+ */
+static bool is_yuv_fmt(enum b2r2_blt_fmt fmt)
+{
+	switch (fmt) {
+	case B2R2_BLT_FMT_24_BIT_YUV888:
+	case B2R2_BLT_FMT_32_BIT_AYUV8888:
+	case B2R2_BLT_FMT_Y_CB_Y_CR:
+	case B2R2_BLT_FMT_CB_Y_CR_Y:
+	case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE:
+	case B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE:
+	case B2R2_BLT_FMT_YUV444_PACKED_PLANAR:
+		return true;
+	default:
+		return false;
+	}
+}
+
+/**
+ * is_yvu_fmt() - returns whether the given format is a yvu format
+ */
+static bool is_yvu_fmt(enum b2r2_blt_fmt fmt)
+{
+	switch (fmt) {
+	case B2R2_BLT_FMT_CB_Y_CR_Y:
+		return true;
+	default:
+		return false;
+	}
+}
+
+/**
+ * is_yuv420_fmt() - returns whether the given format is a yuv420 format
+ */
+static bool is_yuv420_fmt(enum b2r2_blt_fmt fmt)
+{
+
+	switch (fmt) {
+	case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE:
+		return true;
+	default:
+		return false;
+	}
+}
+
+static bool is_yuv422_fmt(enum b2r2_blt_fmt fmt)
+{
+	switch (fmt) {
+	case B2R2_BLT_FMT_Y_CB_Y_CR:
+	case B2R2_BLT_FMT_CB_Y_CR_Y:
+	case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE:
+		return true;
+	default:
+		return false;
+	}
+}
+
+/**
+ * is_yuv444_fmt() - returns whether the given format is a yuv444 format
+ */
+static bool is_yuv444_fmt(enum b2r2_blt_fmt fmt)
+{
+	switch (fmt) {
+	case B2R2_BLT_FMT_24_BIT_YUV888:
+	case B2R2_BLT_FMT_32_BIT_AYUV8888:
+	case B2R2_BLT_FMT_YUV444_PACKED_PLANAR:
+		return true;
+	default:
+		return false;
+	}
+}
+
+/**
+ * get_fmt_byte_pitch() - returns the pitch of a pixmap with the given width
+ */
+static int fmt_byte_pitch(enum b2r2_blt_fmt fmt, u32 width)
+{
+	int pitch;
+
+	switch (fmt) {
+
+	case B2R2_BLT_FMT_1_BIT_A1:
+		pitch = width >> 3; /* Shift is faster than division */
+		if ((width & 0x3) != 0) /* Check for remainder */
+			pitch++;
+		return pitch;
+
+	case B2R2_BLT_FMT_8_BIT_A8:                        /* Fall through */
+	case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:            /* Fall through */
+	case B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE: /* Fall through */
+	case B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR:       /* Fall through */
+	case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:            /* Fall through */
+	case B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE: /* Fall through */
+	case B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR:       /* Fall through */
+	case B2R2_BLT_FMT_YUV444_PACKED_PLANAR:
+		return width;
+
+	case B2R2_BLT_FMT_16_BIT_ARGB4444: /* Fall through */
+	case B2R2_BLT_FMT_16_BIT_ARGB1555: /* Fall through */
+	case B2R2_BLT_FMT_16_BIT_RGB565:   /* Fall through */
+	case B2R2_BLT_FMT_Y_CB_Y_CR:       /* Fall through */
+	case B2R2_BLT_FMT_CB_Y_CR_Y:
+		return width << 1;
+
+	case B2R2_BLT_FMT_24_BIT_RGB888:   /* Fall through */
+	case B2R2_BLT_FMT_24_BIT_ARGB8565: /* Fall through */
+	case B2R2_BLT_FMT_24_BIT_YUV888:
+		return width * 3;
+
+	case B2R2_BLT_FMT_32_BIT_ARGB8888: /* Fall through */
+	case B2R2_BLT_FMT_32_BIT_ABGR8888: /* Fall through */
+	case B2R2_BLT_FMT_32_BIT_AYUV8888:
+		return width << 2;
+
+	default:
+		/* Should never, ever happen */
+		BUG_ON(1);
+		return 0;
+	}
+}
+
+/**
+ * to_native_fmt() - returns the native B2R2 format
+ */
+static enum b2r2_native_fmt to_native_fmt(enum b2r2_blt_fmt fmt)
+{
+
+	switch (fmt) {
+	case B2R2_BLT_FMT_UNUSED:
+		return B2R2_NATIVE_RGB565;
+	case B2R2_BLT_FMT_1_BIT_A1:
+		return B2R2_NATIVE_A1;
+	case B2R2_BLT_FMT_8_BIT_A8:
+		return B2R2_NATIVE_A8;
+	case B2R2_BLT_FMT_16_BIT_RGB565:
+		return B2R2_NATIVE_RGB565;
+	case B2R2_BLT_FMT_16_BIT_ARGB4444:
+		return B2R2_NATIVE_ARGB4444;
+	case B2R2_BLT_FMT_16_BIT_ARGB1555:
+		return B2R2_NATIVE_ARGB1555;
+	case B2R2_BLT_FMT_24_BIT_ARGB8565:
+		return B2R2_NATIVE_ARGB8565;
+	case B2R2_BLT_FMT_24_BIT_RGB888:
+		return B2R2_NATIVE_RGB888;
+	case B2R2_BLT_FMT_24_BIT_YUV888:
+		return B2R2_NATIVE_YCBCR888;
+	case B2R2_BLT_FMT_32_BIT_ABGR8888: /* Not actually supported by HW */
+	case B2R2_BLT_FMT_32_BIT_ARGB8888:
+		return B2R2_NATIVE_ARGB8888;
+	case B2R2_BLT_FMT_32_BIT_AYUV8888:
+		return B2R2_NATIVE_AYCBCR8888;
+	case B2R2_BLT_FMT_CB_Y_CR_Y:
+		return B2R2_NATIVE_YCBCR422R;
+	case B2R2_BLT_FMT_Y_CB_Y_CR:
+		return B2R2_NATIVE_YCBCR422R;
+	case B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR:
+		return B2R2_NATIVE_YCBCR42X_R2B;
+	case B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE:
+	case B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE:
+		return B2R2_NATIVE_YCBCR42X_MBN;
+	case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YUV444_PACKED_PLANAR:
+		return B2R2_NATIVE_YUV;
+	default:
+		/* Should never ever happen */
+		return B2R2_NATIVE_BYTE;
+	}
+}
+
+/**
+ * Bit-expand the color from fmt to RGB888 with blue at LSB.
+ * Copy MSBs into missing LSBs.
+ */
+static u32 to_RGB888(u32 color, const enum b2r2_blt_fmt fmt)
+{
+	u32 out_color = 0;
+	u32 r = 0;
+	u32 g = 0;
+	u32 b = 0;
+	switch (fmt) {
+	case B2R2_BLT_FMT_16_BIT_ARGB4444:
+		r = ((color & 0xf00) << 12) | ((color & 0xf00) << 8);
+		g = ((color & 0xf0) << 8) | ((color & 0xf0) << 4);
+		b = ((color & 0xf) << 4) | (color & 0xf);
+		out_color = r | g | b;
+		break;
+	case B2R2_BLT_FMT_16_BIT_ARGB1555:
+		r = ((color & 0x7c00) << 9) | ((color & 0x7000) << 4);
+		g = ((color & 0x3e0) << 6) | ((color & 0x380) << 1);
+		b = ((color & 0x1f) << 3) | ((color & 0x1c) >> 2);
+		out_color = r | g | b;
+		break;
+	case B2R2_BLT_FMT_16_BIT_RGB565:
+		r = ((color & 0xf800) << 8) | ((color & 0xe000) << 3);
+		g = ((color & 0x7e0) << 5) | ((color & 0x600) >> 1);
+		b = ((color & 0x1f) << 3) | ((color & 0x1c) >> 2);
+		out_color = r | g | b;
+		break;
+	case B2R2_BLT_FMT_24_BIT_RGB888:
+	case B2R2_BLT_FMT_32_BIT_ARGB8888:
+		out_color = color & 0xffffff;
+		break;
+	case B2R2_BLT_FMT_32_BIT_ABGR8888:
+		r = (color & 0xff) << 16;
+		g = color & 0xff00;
+		b = (color & 0xff0000) >> 16;
+		out_color = r | g | b;
+		break;
+	case B2R2_BLT_FMT_24_BIT_ARGB8565:
+		r = ((color & 0xf800) << 8) | ((color & 0xe000) << 3);
+		g = ((color & 0x7e0) << 5) | ((color & 0x600) >> 1);
+		b = ((color & 0x1f) << 3) | ((color & 0x1c) >> 2);
+		out_color = r | g | b;
+		break;
+	default:
+		break;
+	}
+
+	return out_color;
+}
+
+/**
+ * get_fmt_type() - returns the type of the given format (raster, planar, etc.)
+ */
+static enum b2r2_fmt_type get_fmt_type(enum b2r2_blt_fmt fmt)
+{
+	switch (fmt) {
+	case B2R2_BLT_FMT_16_BIT_ARGB4444:
+	case B2R2_BLT_FMT_16_BIT_ARGB1555:
+	case B2R2_BLT_FMT_16_BIT_RGB565:
+	case B2R2_BLT_FMT_24_BIT_RGB888:
+	case B2R2_BLT_FMT_32_BIT_ARGB8888:
+	case B2R2_BLT_FMT_Y_CB_Y_CR:
+	case B2R2_BLT_FMT_CB_Y_CR_Y:
+	case B2R2_BLT_FMT_32_BIT_ABGR8888:
+	case B2R2_BLT_FMT_24_BIT_ARGB8565:
+	case B2R2_BLT_FMT_24_BIT_YUV888:
+	case B2R2_BLT_FMT_32_BIT_AYUV8888:
+	case B2R2_BLT_FMT_1_BIT_A1:
+	case B2R2_BLT_FMT_8_BIT_A8:
+		return B2R2_FMT_TYPE_RASTER;
+	case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YUV444_PACKED_PLANAR:
+		return B2R2_FMT_TYPE_PLANAR;
+	case B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE:
+	case B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE:
+		return B2R2_FMT_TYPE_SEMI_PLANAR;
+	default:
+		return B2R2_FMT_TYPE_RASTER;
+	}
+}
+
+/**
+ * is_transform() - returns whether the given request is a transform operation
+ */
+static bool is_transform(const struct b2r2_blt_request *req)
+{
+	return (req->user_req.transform != B2R2_BLT_TRANSFORM_NONE) ||
+			(req->user_req.src_rect.width !=
+				req->user_req.dst_rect.width) ||
+			(req->user_req.src_rect.height !=
+				req->user_req.dst_rect.height);
+}
+
+/**
+ * calculate_scale_factor() - calculates the scale factor between the given
+ *                            values
+ */
+static int calculate_scale_factor(u32 from, u32 to, u16 *sf_out)
+{
+	int ret;
+	u32 sf;
+
+	b2r2_log_info("%s\n", __func__);
+
+	if (to == from) {
+		*sf_out = 1 << 10;
+		return 0;
+	} else if (to == 0) {
+		b2r2_log_err("%s: To is 0!\n", __func__);
+		BUG_ON(1);
+	}
+
+	sf = (from << 10) / to;
+
+	if ((sf & 0xffff0000) != 0) {
+		/* Overflow error */
+		b2r2_log_warn("%s: "
+			"Scale factor too large\n", __func__);
+		ret = -EINVAL;
+		goto error;
+	} else if (sf == 0) {
+		b2r2_log_warn("%s: "
+			"Scale factor too small\n", __func__);
+		ret = -EINVAL;
+		goto error;
+	}
+
+	*sf_out = (u16)sf;
+
+	b2r2_log_info("%s exit\n", __func__);
+
+	return 0;
+
+error:
+	b2r2_log_warn("%s: Exit...\n", __func__);
+	return ret;
+}
+
+/**
+ * rescale() - rescales the given dimension
+ *
+ * Returns the rescaled dimension in 22.10 fixed point format.
+ */
+static s32 rescale(s32 dim, u16 sf)
+{
+	b2r2_log_info("%s\n", __func__);
+
+	if (sf == 0) {
+		b2r2_log_err("%s: Scale factor is 0!\n", __func__);
+		BUG_ON(1);
+	}
+
+	/*
+	 * This is normally not safe to do, since it drastically decreases the
+	 * precision of the integer part of the dimension. But since the B2R2
+	 * hardware only has 12-bit registers for these values, we are safe.
+	 */
+	return (dim << 20) / sf;
+}
+
+/**
+ * inv_rescale() - does an inverted rescale of the given dimension
+ *
+ * Returns the rescaled dimension in 22.10 fixed point format.
+ */
+static s32 inv_rescale(s32 dim, u16 sf)
+{
+	if (sf == 0)
+		return dim;
+
+	return dim * sf;
+}
+
+/**
+ * set_target() - sets the target registers of the given node
+ */
+static void set_target(struct b2r2_node *node, u32 addr,
+		struct b2r2_node_split_buf *buf)
+{
+	s32 l;
+	s32 r;
+	s32 t;
+	s32 b;
+
+	if (buf->tmp_buf_index) {
+		node->dst_tmp_index = buf->tmp_buf_index;
+	}
+
+	node->node.GROUP1.B2R2_TBA = addr;
+	node->node.GROUP1.B2R2_TTY = buf->pitch | to_native_fmt(buf->fmt) |
+			buf->alpha_range | buf->chroma_selection | buf->hso |
+			buf->vso | buf->dither | buf->plane_selection;
+	node->node.GROUP1.B2R2_TSZ =
+			((buf->win.width & 0xfff) << B2R2_SZ_WIDTH_SHIFT) |
+			((buf->win.height & 0xfff) << B2R2_SZ_HEIGHT_SHIFT);
+	node->node.GROUP1.B2R2_TXY =
+			((buf->win.x & 0xffff) << B2R2_XY_X_SHIFT) |
+			((buf->win.y & 0xffff) << B2R2_XY_Y_SHIFT);
+
+	/* Check if the rectangle is outside the buffer */
+	if (buf->vso == B2R2_TY_VSO_BOTTOM_TO_TOP)
+		t = buf->win.y - (buf->win.height - 1);
+	else
+		t = buf->win.y;
+
+	if (buf->hso == B2R2_TY_HSO_RIGHT_TO_LEFT)
+		l = buf->win.x - (buf->win.width - 1);
+	else
+		l = buf->win.x;
+
+	r = l + buf->win.width;
+	b = t + buf->win.height;
+
+	/* Clip to the destination buffer to prevent memory overwrites */
+	if ((l < 0) || (r > buf->width) || (t < 0) || (b > buf->height)) {
+		/* The clip rectangle is including the borders */
+		l = MAX(l, 0);
+		r = MIN(r, buf->width) - 1;
+		t = MAX(t, 0);
+		b = MIN(b, buf->height) - 1;
+
+		node->node.GROUP0.B2R2_CIC |= B2R2_CIC_CLIP_WINDOW;
+		node->node.GROUP0.B2R2_INS |= B2R2_INS_RECT_CLIP_ENABLED;
+		node->node.GROUP6.B2R2_CWO =
+			((l & 0x7FFF) << B2R2_CWS_X_SHIFT) |
+			((t & 0x7FFF) << B2R2_CWS_Y_SHIFT);
+		node->node.GROUP6.B2R2_CWS =
+			((r & 0x7FFF) << B2R2_CWO_X_SHIFT) |
+			((b & 0x7FFF) << B2R2_CWO_Y_SHIFT);
+	}
+
+}
+
+/**
+ * set_src() - configures the given source register with the given values
+ */
+static void set_src(struct b2r2_src_config *src, u32 addr,
+		struct b2r2_node_split_buf *buf)
+{
+	src->B2R2_SBA = addr;
+	src->B2R2_STY = buf->pitch | to_native_fmt(buf->fmt) |
+			buf->alpha_range | buf->hso | buf->vso;
+	src->B2R2_SSZ = ((buf->win.width & 0xfff) << B2R2_SZ_WIDTH_SHIFT) |
+			((buf->win.height & 0xfff) << B2R2_SZ_HEIGHT_SHIFT);
+	src->B2R2_SXY = ((buf->win.x & 0xffff) << B2R2_XY_X_SHIFT) |
+			((buf->win.y & 0xffff) << B2R2_XY_Y_SHIFT);
+
+}
+
+/**
+ * set_src_1() - sets the source 1 registers of the given node
+ */
+static void set_src_1(struct b2r2_node *node, u32 addr,
+		struct b2r2_node_split_buf *buf)
+{
+	if (buf->tmp_buf_index) {
+		node->src_tmp_index = buf->tmp_buf_index;
+	}
+
+	node->src_index = 1;
+
+	node->node.GROUP0.B2R2_CIC |= B2R2_CIC_SOURCE_1;
+	node->node.GROUP0.B2R2_INS |= B2R2_INS_SOURCE_1_FETCH_FROM_MEM;
+
+	node->node.GROUP3.B2R2_SBA = addr;
+	node->node.GROUP3.B2R2_STY = buf->pitch | to_native_fmt(buf->fmt) |
+			buf->alpha_range | buf->hso | buf->vso;
+	node->node.GROUP3.B2R2_SXY =
+			((buf->win.x & 0xffff) << B2R2_XY_X_SHIFT) |
+			((buf->win.y & 0xffff) << B2R2_XY_Y_SHIFT);
+
+	/* Source 1 has no size register */
+}
+
+/**
+ * set_src_2() - sets the source 2 registers of the given node
+ */
+static void set_src_2(struct b2r2_node *node, u32 addr,
+		struct b2r2_node_split_buf *buf)
+{
+	if (buf->tmp_buf_index) {
+		node->src_tmp_index = buf->tmp_buf_index;
+	}
+
+	node->src_index = 2;
+
+	node->node.GROUP0.B2R2_CIC |= B2R2_CIC_SOURCE_2;
+	node->node.GROUP0.B2R2_INS |= B2R2_INS_SOURCE_2_FETCH_FROM_MEM;
+
+	set_src(&node->node.GROUP4, addr, buf);
+}
+
+/**
+ * set_src_3() - sets the source 3 registers of the given node
+ */
+static void set_src_3(struct b2r2_node *node, u32 addr,
+		struct b2r2_node_split_buf *buf)
+{
+	if (buf->tmp_buf_index) {
+		node->src_tmp_index = buf->tmp_buf_index;
+	}
+
+	node->src_index = 3;
+
+	node->node.GROUP0.B2R2_CIC |= B2R2_CIC_SOURCE_3;
+	node->node.GROUP0.B2R2_INS |= B2R2_INS_SOURCE_3_FETCH_FROM_MEM;
+
+	set_src(&node->node.GROUP5, addr, buf);
+}
+
+/**
+ * set_ivmx() - configures the iVMX registers with the given values
+ */
+static void set_ivmx(struct b2r2_node *node, const u32 *vmx_values)
+{
+	node->node.GROUP0.B2R2_CIC |= B2R2_CIC_IVMX;
+	node->node.GROUP0.B2R2_INS |= B2R2_INS_IVMX_ENABLED;
+
+	node->node.GROUP15.B2R2_VMX0 = vmx_values[0];
+	node->node.GROUP15.B2R2_VMX1 = vmx_values[1];
+	node->node.GROUP15.B2R2_VMX2 = vmx_values[2];
+	node->node.GROUP15.B2R2_VMX3 = vmx_values[3];
+}
+
+/**
+ * reset_nodes() - clears the node list
+ */
+static void reset_nodes(struct b2r2_node *node)
+{
+	while (node != NULL) {
+		memset(&node->node, 0, sizeof(node->node));
+
+		node->src_tmp_index = 0;
+		node->dst_tmp_index = 0;
+
+		/* TODO: Implement support for short linked lists */
+		node->node.GROUP0.B2R2_CIC = 0x7ffff;
+
+		if (node->next != NULL)
+			node->node.GROUP0.B2R2_NIP =
+					node->next->physical_address;
+		node = node->next;
+	}
+}
+
+int b2r2_node_split_init(void)
+{
+	b2r2_filters_init();
+
+	return 0;
+}
+
+void b2r2_node_split_exit(void)
+{
+	b2r2_filters_exit();
+}
diff --git a/drivers/video/b2r2/b2r2_node_split.h b/drivers/video/b2r2/b2r2_node_split.h
new file mode 100644
index 00000000000..5bceac28488
--- /dev/null
+++ b/drivers/video/b2r2/b2r2_node_split.h
@@ -0,0 +1,121 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2010
+ *
+ * ST-Ericsson B2R2 node splitter
+ *
+ * Author: Fredrik Allansson <fredrik.allansson@stericsson.com>
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+
+#ifndef __B2R2_NODE_SPLIT_H_
+#define __B2R2_NODE_SPLIT_H_
+
+#include "b2r2_internal.h"
+#include "b2r2_hw.h"
+
+/**
+ * b2r2_node_split_analyze() - Analyzes a B2R2 request
+ *
+ * @req          - The request to analyze
+ * @max_buf_size - The largest size allowed for intermediate buffers
+ * @node_count   - Number of nodes required for the job
+ * @buf_count    - Number of intermediate buffers required for the job
+ * @bufs         - An array of buffers needed for intermediate buffers
+ *
+ * Analyzes the request and determines how many nodes and intermediate buffers
+ * are required.
+ *
+ * It is the responsibility of the caller to allocate memory and assign the
+ * physical addresses. After that b2r2_node_split_assign_buffers should be
+ * called to assign the buffers to the right nodes.
+ *
+ * Returns:
+ *   A handle identifing the analyzed request if successful, a negative
+ *   value otherwise.
+ */
+int b2r2_node_split_analyze(const struct b2r2_blt_request *req, u32 max_buf_size,
+		u32 *node_count, struct b2r2_work_buf **bufs, u32* buf_count,
+		struct b2r2_node_split_job *job);
+
+/**
+ * b2r2_node_split_configure() - Performs a node split
+ *
+ * @handle - A handle for the analyzed request
+ * @first  - The first node in the list of nodes to use
+ *
+ * Fills the supplied list of nodes with the parameters acquired by analyzing
+ * the request.
+ *
+ * All pointers to intermediate buffers are represented by integers to be used
+ * in the array returned by b2r2_node_split_analyze.
+ *
+ * Returns:
+ *   A negative value if an error occurred, 0 otherwise.
+ */
+int b2r2_node_split_configure(struct b2r2_node_split_job *job,
+		struct b2r2_node *first);
+
+/**
+ * b2r2_node_split_assign_buffers() - Assignes physical addresses
+ *
+ * @handle    - The handle for the job
+ * @first     - The first node in the node list
+ * @bufs      - Buffers with assigned physical addresses
+ * @buf_count - Number of physical addresses
+ *
+ * Assigns the physical addresses where intermediate buffers are required in
+ * the node list.
+ *
+ * The order of the elements of 'bufs' must be maintained from the call to
+ * b2r2_node_split_analyze.
+ *
+ * Returns:
+ *   A negative value if an error occurred, 0 otherwise.
+ */
+int b2r2_node_split_assign_buffers(struct b2r2_node_split_job *job,
+		struct b2r2_node *first, struct b2r2_work_buf *bufs,
+		u32 buf_count);
+
+/**
+ * b2r2_node_split_unassign_buffers() - Removes all physical addresses
+ *
+ * @handle - The handle associated with the job
+ * @first  - The first node in the node list
+ *
+ * Removes all references to intermediate buffers from the node list.
+ *
+ * This makes it possible to reuse the node list with new buffers by calling
+ * b2r2_node_split_assign_buffers again. Useful for caching node lists.
+ */
+void b2r2_node_split_unassign_buffers(struct b2r2_node_split_job *job,
+		struct b2r2_node *first);
+
+/**
+ * b2r2_node_split_release() - Releases all resources for a job
+ *
+ * @handle - The handle identifying the job. This will be set to 0.
+ *
+ * Releases all resources associated with a job.
+ *
+ * This should always be called once b2r2_node_split_analyze has been called
+ * in order to release any resources allocated while analyzing.
+ */
+void b2r2_node_split_cancel(struct b2r2_node_split_job *job);
+
+/**
+ * b2r2_node_split_init() - Initializes the node split module
+ *
+ * Initializes the node split module and creates debugfs files.
+ */
+int b2r2_node_split_init(void);
+
+/**
+ * b2r2_node_split_exit() - Deinitializes the node split module
+ *
+ * Releases all resources for the node split module.
+ */
+void b2r2_node_split_exit(void);
+
+#endif
diff --git a/drivers/video/b2r2/b2r2_profiler/Makefile b/drivers/video/b2r2/b2r2_profiler/Makefile
new file mode 100644
index 00000000000..69a85524fd7
--- /dev/null
+++ b/drivers/video/b2r2/b2r2_profiler/Makefile
@@ -0,0 +1,3 @@
+# Make file for loadable module B2R2 Profiler
+
+obj-$(CONFIG_B2R2_PROFILER) += b2r2_profiler.o
diff --git a/drivers/video/b2r2/b2r2_profiler/b2r2_profiler.c b/drivers/video/b2r2/b2r2_profiler/b2r2_profiler.c
new file mode 100644
index 00000000000..2e7c5ca5a7a
--- /dev/null
+++ b/drivers/video/b2r2/b2r2_profiler/b2r2_profiler.c
@@ -0,0 +1,258 @@
+/*
+ * Copyright (C) ST-Ericsson AB 2010
+ *
+ * ST-Ericsson B2R2 profiler implementation
+ *
+ * Author: Johan Mossberg <johan.xx.mossberg@stericsson.com>
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/string.h>
+#include <linux/jiffies.h>
+
+#include <video/b2r2_blt.h>
+#include "../b2r2_profiler_api.h"
+
+
+#define S32_MAX 2147483647
+
+
+static int src_format_filter_on = false;
+module_param(src_format_filter_on, bool, S_IRUGO | S_IWUSR);
+static unsigned int src_format_filter;
+module_param(src_format_filter, uint, S_IRUGO | S_IWUSR);
+
+static int print_blts_on = 0;
+module_param(print_blts_on, bool, S_IRUGO | S_IWUSR);
+static int use_mpix_per_second_in_print_blts = 1;
+module_param(use_mpix_per_second_in_print_blts, bool, S_IRUGO | S_IWUSR);
+
+static int min_avg_max_mpix_per_second_on = 1;
+module_param(min_avg_max_mpix_per_second_on, bool, S_IRUGO | S_IWUSR);
+
+static const unsigned int min_avg_max_mpix_per_second_num_blts_used = 400;
+static struct {
+	unsigned long sampling_start_time_jiffies;
+
+	s32 min_mpix_per_second;
+	struct b2r2_blt_req min_blt_request;
+	struct b2r2_blt_profiling_info min_blt_profiling_info;
+
+	s32 max_mpix_per_second;
+	struct b2r2_blt_req max_blt_request;
+	struct b2r2_blt_profiling_info max_blt_profiling_info;
+
+	s32 accumulated_num_pixels;
+	s32 accumulated_num_usecs;
+
+	u32 num_blts_done;
+} min_avg_max_mpix_per_second_state;
+
+
+static s32 nsec_2_usec(const s32 nsec);
+
+static int is_scale_blt(const struct b2r2_blt_req * const request);
+static s32 get_blt_mpix_per_second(const struct b2r2_blt_req * const request, const struct b2r2_blt_profiling_info * const blt_profiling_info);
+static void print_blt(const struct b2r2_blt_req * const request, const struct b2r2_blt_profiling_info * const blt_profiling_info);
+
+static s32 get_num_pixels_in_blt(const struct b2r2_blt_req * const request);
+static s32 get_mpix_per_second(const s32 num_pixels, const s32 num_usecs);
+static void print_min_avg_max_mpix_per_second_state(void);
+static void reset_min_avg_max_mpix_per_second_state(void);
+static void do_min_avg_max_mpix_per_second(const struct b2r2_blt_req * const request, const struct b2r2_blt_profiling_info * const blt_profiling_info);
+
+static void blt_done(const struct b2r2_blt_req * const blt, const s32 request_id, const struct b2r2_blt_profiling_info * const blt_profiling_info);
+
+
+static struct b2r2_profiler this = {
+	.blt_done = blt_done,
+};
+
+
+static s32 nsec_2_usec(const s32 nsec)
+{
+	return nsec / 1000;
+}
+
+
+static int is_scale_blt(const struct b2r2_blt_req * const request)
+{
+	if ((request->transform & B2R2_BLT_TRANSFORM_CCW_ROT_90 &&
+		(request->src_rect.width != request->dst_rect.height ||
+		request->src_rect.height != request->dst_rect.width)) ||
+		(!(request->transform & B2R2_BLT_TRANSFORM_CCW_ROT_90) &&
+		(request->src_rect.width != request->dst_rect.width ||
+		request->src_rect.height != request->dst_rect.height)))
+		return 1;
+	else
+		return 0;
+}
+
+static s32 get_blt_mpix_per_second(const struct b2r2_blt_req * const request, const struct b2r2_blt_profiling_info * const blt_profiling_info)
+{
+	return get_mpix_per_second(get_num_pixels_in_blt(request),
+		nsec_2_usec(blt_profiling_info->nsec_active_in_cpu + blt_profiling_info->nsec_active_in_b2r2));
+}
+
+static void print_blt(const struct b2r2_blt_req * const request, const struct b2r2_blt_profiling_info * const blt_profiling_info)
+{
+	char tmp_str[128];
+	sprintf(tmp_str, "SF: %#10x, DF: %#10x, F: %#10x, T: %#3x, S: %1i, P: %7i",
+		request->src_img.fmt,
+		request->dst_img.fmt,
+		request->flags,
+		request->transform,
+		is_scale_blt(request),
+		get_num_pixels_in_blt(request));
+	if (use_mpix_per_second_in_print_blts)
+		printk(KERN_ALERT "%s, MPix/s: %3i\n",
+			tmp_str,
+			get_blt_mpix_per_second(request, blt_profiling_info));
+	else
+		printk(KERN_ALERT "%s, CPU: %10i, B2R2: %10i, Tot: %10i ns\n",
+			tmp_str,
+			blt_profiling_info->nsec_active_in_cpu,
+			blt_profiling_info->nsec_active_in_b2r2,
+			blt_profiling_info->total_time_nsec);
+}
+
+
+static s32 get_num_pixels_in_blt(const struct b2r2_blt_req * const request)
+{
+	s32 num_pixels_in_src = request->src_rect.width * request->src_rect.height;
+	s32 num_pixels_in_dst = request->dst_rect.width * request->dst_rect.height;
+	if (request->flags & (B2R2_BLT_FLAG_SOURCE_FILL |
+				B2R2_BLT_FLAG_SOURCE_FILL_RAW))
+		return num_pixels_in_dst;
+	else
+		return (num_pixels_in_src + num_pixels_in_dst) / 2;
+}
+
+static s32 get_mpix_per_second(const s32 num_pixels, const s32 num_usecs)
+{
+	s32 num_pixels_scale_factor = num_pixels != 0 ? S32_MAX / num_pixels : S32_MAX;
+	s32 num_usecs_scale_factor = num_usecs != 0 ? S32_MAX / num_usecs : S32_MAX;
+	s32 scale_factor = min(num_pixels_scale_factor, num_usecs_scale_factor);
+
+	s32 num_pixels_scaled = num_pixels * scale_factor;
+	s32 num_usecs_scaled = num_usecs * scale_factor;
+
+	if (num_usecs_scaled < 1000000)
+		return 0;
+
+	return (num_pixels_scaled / 1000000) / (num_usecs_scaled / 1000000);
+}
+
+static void print_min_avg_max_mpix_per_second_state(void)
+{
+	printk(KERN_ALERT "Min: %3i, Avg: %3i, Max: %3i MPix/s\n",
+		min_avg_max_mpix_per_second_state.min_mpix_per_second,
+		get_mpix_per_second(min_avg_max_mpix_per_second_state.accumulated_num_pixels,
+		min_avg_max_mpix_per_second_state.accumulated_num_usecs),
+		min_avg_max_mpix_per_second_state.max_mpix_per_second);
+	printk(KERN_ALERT "Min blit:\n");
+	print_blt(&min_avg_max_mpix_per_second_state.min_blt_request,
+		&min_avg_max_mpix_per_second_state.min_blt_profiling_info);
+	printk(KERN_ALERT "Max blit:\n");
+	print_blt(&min_avg_max_mpix_per_second_state.max_blt_request,
+		&min_avg_max_mpix_per_second_state.max_blt_profiling_info);
+}
+
+static void reset_min_avg_max_mpix_per_second_state(void)
+{
+	min_avg_max_mpix_per_second_state.sampling_start_time_jiffies =
+		jiffies;
+	min_avg_max_mpix_per_second_state.min_mpix_per_second = S32_MAX;
+	min_avg_max_mpix_per_second_state.max_mpix_per_second = 0;
+	min_avg_max_mpix_per_second_state.accumulated_num_pixels = 0;
+	min_avg_max_mpix_per_second_state.accumulated_num_usecs = 0;
+	min_avg_max_mpix_per_second_state.num_blts_done = 0;
+}
+
+static void do_min_avg_max_mpix_per_second(const struct b2r2_blt_req * const request, const struct b2r2_blt_profiling_info * const blt_profiling_info)
+{
+	s32 num_pixels_in_blt;
+	s32 num_usec_blt_took;
+	s32 blt_mpix_per_second;
+
+	if (time_before(jiffies, min_avg_max_mpix_per_second_state.sampling_start_time_jiffies))
+		return;
+
+	num_pixels_in_blt = get_num_pixels_in_blt(request);
+	num_usec_blt_took = nsec_2_usec(blt_profiling_info->nsec_active_in_cpu + blt_profiling_info->nsec_active_in_b2r2);
+	blt_mpix_per_second = get_mpix_per_second(num_pixels_in_blt,
+		num_usec_blt_took);
+
+	if (blt_mpix_per_second <= min_avg_max_mpix_per_second_state.min_mpix_per_second) {
+		min_avg_max_mpix_per_second_state.min_mpix_per_second =
+			blt_mpix_per_second;
+		memcpy(&min_avg_max_mpix_per_second_state.min_blt_request,
+			request, sizeof(struct b2r2_blt_req));
+		memcpy(&min_avg_max_mpix_per_second_state.min_blt_profiling_info,
+			blt_profiling_info, sizeof(struct b2r2_blt_profiling_info));
+	}
+
+	if (blt_mpix_per_second >= min_avg_max_mpix_per_second_state.max_mpix_per_second) {
+		min_avg_max_mpix_per_second_state.max_mpix_per_second =
+			blt_mpix_per_second;
+		memcpy(&min_avg_max_mpix_per_second_state.max_blt_request,
+			request, sizeof(struct b2r2_blt_req));
+		memcpy(&min_avg_max_mpix_per_second_state.max_blt_profiling_info,
+			blt_profiling_info, sizeof(struct b2r2_blt_profiling_info));
+	}
+
+	min_avg_max_mpix_per_second_state.accumulated_num_pixels +=
+		num_pixels_in_blt;
+	min_avg_max_mpix_per_second_state.accumulated_num_usecs +=
+		num_usec_blt_took;
+
+	min_avg_max_mpix_per_second_state.num_blts_done++;
+
+	if (min_avg_max_mpix_per_second_state.num_blts_done >= min_avg_max_mpix_per_second_num_blts_used) {
+		print_min_avg_max_mpix_per_second_state();
+		reset_min_avg_max_mpix_per_second_state();
+		/* The printouts initiated above can disturb the next measurement
+		so we delay it two seconds to give the printouts a chance to finish. */
+		min_avg_max_mpix_per_second_state.sampling_start_time_jiffies =
+			jiffies + (2 * HZ);
+	}
+}
+
+static void blt_done(const struct b2r2_blt_req * const request, const s32 request_id, const struct b2r2_blt_profiling_info * const blt_profiling_info)
+{
+	/* Filters */
+	if (src_format_filter_on && request->src_img.fmt != src_format_filter)
+		return;
+
+	/* Processors */
+	if (print_blts_on)
+		print_blt(request, blt_profiling_info);
+
+	if (min_avg_max_mpix_per_second_on)
+		do_min_avg_max_mpix_per_second(request, blt_profiling_info);
+}
+
+
+static int __init b2r2_profiler_init(void)
+{
+	reset_min_avg_max_mpix_per_second_state();
+
+	return b2r2_register_profiler(&this);
+}
+module_init(b2r2_profiler_init);
+
+static void __exit b2r2_profiler_exit(void)
+{
+	b2r2_unregister_profiler(&this);
+}
+module_exit(b2r2_profiler_exit);
+
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Johan Mossberg (johan.xx.mossberg@stericsson.com)");
+MODULE_DESCRIPTION("B2R2 Profiler");
diff --git a/drivers/video/b2r2/b2r2_profiler_api.h b/drivers/video/b2r2/b2r2_profiler_api.h
new file mode 100644
index 00000000000..5f1f9abbe49
--- /dev/null
+++ b/drivers/video/b2r2/b2r2_profiler_api.h
@@ -0,0 +1,66 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2010
+ *
+ * ST-Ericsson B2R2 profiling API
+ *
+ * Author: Johan Mossberg <johan.xx.mossberg@stericsson.com>
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+
+
+#ifndef _LINUX_VIDEO_B2R2_PROFILER_API_H
+#define _LINUX_VIDEO_B2R2_PROFILER_API_H
+
+#include <video/b2r2_blt.h>
+
+/**
+ * struct b2r2_blt_profiling_info - Profiling information for a blit
+ *
+ * @nsec_active_in_cpu: The number of nanoseconds the job was active in the CPU.
+ *                      This is an approximate value, check out the code for more
+ *                      info.
+ * @nsec_active_in_b2r2: The number of nanoseconds the job was active in B2R2. This
+ *                       is an approximate value, check out the code for more info.
+ * @total_time_nsec: The total time the job took in nano seconds. Includes ideling.
+ */
+struct b2r2_blt_profiling_info {
+	s32 nsec_active_in_cpu;
+	s32 nsec_active_in_b2r2;
+	s32 total_time_nsec;
+};
+
+/**
+ * struct b2r2_profiler - B2R2 profiler.
+ *
+ * The callbacks are never run concurrently. No heavy stuff must be done in the
+ * callbacks as this might adversely affect the B2R2 driver. The callbacks must
+ * not call the B2R2 profiler API as this will cause a deadlock. If the callbacks
+ * call into the B2R2 driver care must be taken as deadlock situations can arise.
+ *
+ * @blt_done: Called when a blit has finished, timed out or been canceled.
+ */
+struct b2r2_profiler {
+	void (*blt_done)(const struct b2r2_blt_req * const request, const s32 request_id, const struct b2r2_blt_profiling_info * const blt_profiling_info);
+};
+
+/**
+ * b2r2_register_profiler() - Registers a profiler.
+ *
+ * Currently only one profiler can be registered at any given time.
+ *
+ * @profiler: The profiler
+ *
+ * Returns 0 on success, negative error code on failure
+ */
+int b2r2_register_profiler(const struct b2r2_profiler * const profiler);
+
+/**
+ * b2r2_unregister_profiler() - Unregisters a profiler.
+ *
+ * @profiler: The profiler
+ */
+void b2r2_unregister_profiler(const struct b2r2_profiler * const profiler);
+
+#endif /* #ifdef _LINUX_VIDEO_B2R2_PROFILER_API_H */
diff --git a/drivers/video/b2r2/b2r2_profiler_socket.c b/drivers/video/b2r2/b2r2_profiler_socket.c
new file mode 100644
index 00000000000..5631a730d4e
--- /dev/null
+++ b/drivers/video/b2r2/b2r2_profiler_socket.c
@@ -0,0 +1,105 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2010
+ *
+ * ST-Ericsson B2R2 profiler socket communication
+ *
+ * Author: Johan Mossberg <johan.xx.mossberg@stericsson.com>
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+
+#include <linux/module.h>
+#include <linux/device.h>
+#include <linux/semaphore.h>
+#include <asm/errno.h>
+
+#include "b2r2_profiler_api.h"
+#include "b2r2_internal.h"
+
+
+/*
+ * TODO: Call the profiler in a seperate thread and have a circular buffer
+ * between the B2R2 driver and that thread. That way the profiler can not slow
+ * down or kill the B2R2 driver. Seems a bit overkill right now as there is
+ * only one B2R2 profiler and we have full control over it but the situation
+ * may be different in the future.
+ */
+
+
+static const struct b2r2_profiler *b2r2_profiler;
+static DECLARE_MUTEX(b2r2_profiler_lock);
+
+
+int b2r2_register_profiler(const struct b2r2_profiler * const profiler)
+{
+	int return_value;
+
+	return_value = down_interruptible(&b2r2_profiler_lock);
+	if (return_value != 0)
+		return return_value;
+
+	if (b2r2_profiler != NULL) {
+		return_value = -EUSERS;
+
+		goto cleanup;
+	}
+
+	b2r2_profiler = profiler;
+
+	return_value = 0;
+
+cleanup:
+	up(&b2r2_profiler_lock);
+
+	return return_value;
+}
+EXPORT_SYMBOL(b2r2_register_profiler);
+
+void b2r2_unregister_profiler(const struct b2r2_profiler * const profiler)
+{
+	down(&b2r2_profiler_lock);
+
+	if (profiler == b2r2_profiler)
+		b2r2_profiler = NULL;
+
+	up(&b2r2_profiler_lock);
+}
+EXPORT_SYMBOL(b2r2_unregister_profiler);
+
+
+bool is_profiler_registered_approx(void)
+{
+	/* No locking by design, to make it fast, hence the approx */
+	if (b2r2_profiler != NULL)
+		return true;
+	else
+		return false;
+}
+
+void b2r2_call_profiler_blt_done(const struct b2r2_blt_request * const request)
+{
+	int return_value;
+	struct b2r2_blt_profiling_info blt_profiling_info;
+
+	return_value = down_interruptible(&b2r2_profiler_lock);
+	if (return_value != 0) {
+		dev_err(b2r2_blt_device(),
+			"%s: Failed to acquire semaphore, ret=%i. Lost profiler call!\n",
+			__func__, return_value);
+
+		return;
+	}
+
+	if (NULL == b2r2_profiler)
+		goto cleanup;
+
+	blt_profiling_info.nsec_active_in_cpu = request->nsec_active_in_cpu;
+	blt_profiling_info.nsec_active_in_b2r2 = request->job.nsec_active_in_hw;
+	blt_profiling_info.total_time_nsec = request->total_time_nsec;
+
+	b2r2_profiler->blt_done(&request->user_req, request->request_id, &blt_profiling_info);
+
+cleanup:
+	up(&b2r2_profiler_lock);
+}
diff --git a/drivers/video/b2r2/b2r2_profiler_socket.h b/drivers/video/b2r2/b2r2_profiler_socket.h
new file mode 100644
index 00000000000..80b2c20293f
--- /dev/null
+++ b/drivers/video/b2r2/b2r2_profiler_socket.h
@@ -0,0 +1,22 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2010
+ *
+ * ST-Ericsson B2R2 profiler socket communication
+ *
+ * Author: Johan Mossberg <johan.xx.mossberg@stericsson.com>
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+
+#ifndef _LINUX_VIDEO_B2R2_PROFILER_SOCKET_H
+#define _LINUX_VIDEO_B2R2_PROFILER_SOCKET_H
+
+#include "b2r2_internal.h"
+
+/* Will give a correct result most of the time but can be wrong */
+bool is_profiler_registered_approx(void);
+
+void b2r2_call_profiler_blt_done(const struct b2r2_blt_request * const request);
+
+#endif /* _LINUX_VIDEO_B2R2_PROFILER_SOCKET_H */
diff --git a/drivers/video/b2r2/b2r2_structures.h b/drivers/video/b2r2/b2r2_structures.h
new file mode 100644
index 00000000000..99fa7f047d3
--- /dev/null
+++ b/drivers/video/b2r2/b2r2_structures.h
@@ -0,0 +1,226 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2010
+ *
+ * ST-Ericsson B2R2 register struct
+ *
+ * Author: Robert Fekete <robert.fekete@stericsson.com>
+ * Author: Paul Wannback
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+
+
+#ifndef __B2R2_STRUCTURES_H
+#define __B2R2_STRUCTURES_H
+
+/* C struct view */
+struct b2r2_memory_map {
+	unsigned char fill0[2304];
+	unsigned int BLT_SSBA17; /* @2304 */
+	unsigned int BLT_SSBA18; /* @2308 */
+	unsigned int BLT_SSBA19; /* @2312 */
+	unsigned int BLT_SSBA20; /* @2316 */
+	unsigned int BLT_SSBA21; /* @2320 */
+	unsigned int BLT_SSBA22; /* @2324 */
+	unsigned int BLT_SSBA23; /* @2328 */
+	unsigned int BLT_SSBA24; /* @2332 */
+	unsigned char fill1[32];
+	unsigned int BLT_STBA5; /* @2368 */
+	unsigned int BLT_STBA6; /* @2372 */
+	unsigned int BLT_STBA7; /* @2376 */
+	unsigned int BLT_STBA8; /* @2380 */
+	unsigned char fill2[176];
+	unsigned int BLT_CTL; /* @2560 */
+	unsigned int BLT_ITS; /* @2564 */
+	unsigned int BLT_STA1; /* @2568 */
+	unsigned char fill3[4];
+	unsigned int BLT_SSBA1; /* @2576 */
+	unsigned int BLT_SSBA2; /* @2580 */
+	unsigned int BLT_SSBA3; /* @2584 */
+	unsigned int BLT_SSBA4; /* @2588 */
+	unsigned int BLT_SSBA5; /* @2592 */
+	unsigned int BLT_SSBA6; /* @2596 */
+	unsigned int BLT_SSBA7; /* @2600 */
+	unsigned int BLT_SSBA8; /* @2604 */
+	unsigned int BLT_STBA1; /* @2608 */
+	unsigned int BLT_STBA2; /* @2612 */
+	unsigned int BLT_STBA3; /* @2616 */
+	unsigned int BLT_STBA4; /* @2620 */
+	unsigned int BLT_CQ1_TRIG_IP; /* @2624 */
+	unsigned int BLT_CQ1_TRIG_CTL; /* @2628 */
+	unsigned int BLT_CQ1_PACE_CTL; /* @2632 */
+	unsigned int BLT_CQ1_IP; /* @2636 */
+	unsigned int BLT_CQ2_TRIG_IP; /* @2640 */
+	unsigned int BLT_CQ2_TRIG_CTL; /* @2644 */
+	unsigned int BLT_CQ2_PACE_CTL; /* @2648 */
+	unsigned int BLT_CQ2_IP; /* @2652 */
+	unsigned int BLT_AQ1_CTL; /* @2656 */
+	unsigned int BLT_AQ1_IP; /* @2660 */
+	unsigned int BLT_AQ1_LNA; /* @2664 */
+	unsigned int BLT_AQ1_STA; /* @2668 */
+	unsigned int BLT_AQ2_CTL; /* @2672 */
+	unsigned int BLT_AQ2_IP; /* @2676 */
+	unsigned int BLT_AQ2_LNA; /* @2680 */
+	unsigned int BLT_AQ2_STA; /* @2684 */
+	unsigned int BLT_AQ3_CTL; /* @2688 */
+	unsigned int BLT_AQ3_IP; /* @2692 */
+	unsigned int BLT_AQ3_LNA; /* @2696 */
+	unsigned int BLT_AQ3_STA; /* @2700 */
+	unsigned int BLT_AQ4_CTL; /* @2704 */
+	unsigned int BLT_AQ4_IP; /* @2708 */
+	unsigned int BLT_AQ4_LNA; /* @2712 */
+	unsigned int BLT_AQ4_STA; /* @2716 */
+	unsigned int BLT_SSBA9; /* @2720 */
+	unsigned int BLT_SSBA10; /* @2724 */
+	unsigned int BLT_SSBA11; /* @2728 */
+	unsigned int BLT_SSBA12; /* @2732 */
+	unsigned int BLT_SSBA13; /* @2736 */
+	unsigned int BLT_SSBA14; /* @2740 */
+	unsigned int BLT_SSBA15; /* @2744 */
+	unsigned int BLT_SSBA16; /* @2748 */
+	unsigned int BLT_SGA1; /* @2752 */
+	unsigned int BLT_SGA2; /* @2756 */
+	unsigned char fill4[8];
+	unsigned int BLT_ITM0; /* @2768 */
+	unsigned int BLT_ITM1; /* @2772 */
+	unsigned int BLT_ITM2; /* @2776 */
+	unsigned int BLT_ITM3; /* @2780 */
+	unsigned char fill5[16];
+	unsigned int BLT_DFV2; /* @2800 */
+	unsigned int BLT_DFV1; /* @2804 */
+	unsigned int BLT_PRI; /* @2808 */
+	unsigned char fill6[8];
+	unsigned int PLUGS1_OP2; /* @2820 */
+	unsigned int PLUGS1_CHZ; /* @2824 */
+	unsigned int PLUGS1_MSZ; /* @2828 */
+	unsigned int PLUGS1_PGZ; /* @2832 */
+	unsigned char fill7[16];
+	unsigned int PLUGS2_OP2; /* @2852 */
+	unsigned int PLUGS2_CHZ; /* @2856 */
+	unsigned int PLUGS2_MSZ; /* @2860 */
+	unsigned int PLUGS2_PGZ; /* @2864 */
+	unsigned char fill8[16];
+	unsigned int PLUGS3_OP2; /* @2884 */
+	unsigned int PLUGS3_CHZ; /* @2888 */
+	unsigned int PLUGS3_MSZ; /* @2892 */
+	unsigned int PLUGS3_PGZ; /* @2896 */
+	unsigned char fill9[48];
+	unsigned int PLUGT_OP2; /* @2948 */
+	unsigned int PLUGT_CHZ; /* @2952 */
+	unsigned int PLUGT_MSZ; /* @2956 */
+	unsigned int PLUGT_PGZ; /* @2960 */
+	unsigned char fill10[108];
+	unsigned int BLT_NIP; /* @3072 */
+	unsigned int BLT_CIC; /* @3076 */
+	unsigned int BLT_INS; /* @3080 */
+	unsigned int BLT_ACK; /* @3084 */
+	unsigned int BLT_TBA; /* @3088 */
+	unsigned int BLT_TTY; /* @3092 */
+	unsigned int BLT_TXY; /* @3096 */
+	unsigned int BLT_TSZ; /* @3100 */
+	unsigned int BLT_S1CF; /* @3104 */
+	unsigned int BLT_S2CF; /* @3108 */
+	unsigned int BLT_S1BA; /* @3112 */
+	unsigned int BLT_S1TY; /* @3116 */
+	unsigned int BLT_S1XY; /* @3120 */
+	unsigned char fill11[4];
+	unsigned int BLT_S2BA; /* @3128 */
+	unsigned int BLT_S2TY; /* @3132 */
+	unsigned int BLT_S2XY; /* @3136 */
+	unsigned int BLT_S2SZ; /* @3140 */
+	unsigned int BLT_S3BA; /* @3144 */
+	unsigned int BLT_S3TY; /* @3148 */
+	unsigned int BLT_S3XY; /* @3152 */
+	unsigned int BLT_S3SZ; /* @3156 */
+	unsigned int BLT_CWO; /* @3160 */
+	unsigned int BLT_CWS; /* @3164 */
+	unsigned int BLT_CCO; /* @3168 */
+	unsigned int BLT_CML; /* @3172 */
+	unsigned int BLT_FCTL; /* @3176 */
+	unsigned int BLT_PMK; /* @3180 */
+	unsigned int BLT_RSF; /* @3184 */
+	unsigned int BLT_RZI; /* @3188 */
+	unsigned int BLT_HFP; /* @3192 */
+	unsigned int BLT_VFP; /* @3196 */
+	unsigned int BLT_Y_RSF; /* @3200 */
+	unsigned int BLT_Y_RZI; /* @3204 */
+	unsigned int BLT_Y_HFP; /* @3208 */
+	unsigned int BLT_Y_VFP; /* @3212 */
+	unsigned char fill12[16];
+	unsigned int BLT_KEY1; /* @3232 */
+	unsigned int BLT_KEY2; /* @3236 */
+	unsigned char fill13[8];
+	unsigned int BLT_SAR; /* @3248 */
+	unsigned int BLT_USR; /* @3252 */
+	unsigned char fill14[8];
+	unsigned int BLT_IVMX0; /* @3264 */
+	unsigned int BLT_IVMX1; /* @3268 */
+	unsigned int BLT_IVMX2; /* @3272 */
+	unsigned int BLT_IVMX3; /* @3276 */
+	unsigned int BLT_OVMX0; /* @3280 */
+	unsigned int BLT_OVMX1; /* @3284 */
+	unsigned int BLT_OVMX2; /* @3288 */
+	unsigned int BLT_OVMX3; /* @3292 */
+	unsigned char fill15[8];
+	unsigned int BLT_VC1R; /* @3304 */
+	unsigned char fill16[20];
+	unsigned int BLT_Y_HFC0; /* @3328 */
+	unsigned int BLT_Y_HFC1; /* @3332 */
+	unsigned int BLT_Y_HFC2; /* @3336 */
+	unsigned int BLT_Y_HFC3; /* @3340 */
+	unsigned int BLT_Y_HFC4; /* @3344 */
+	unsigned int BLT_Y_HFC5; /* @3348 */
+	unsigned int BLT_Y_HFC6; /* @3352 */
+	unsigned int BLT_Y_HFC7; /* @3356 */
+	unsigned int BLT_Y_HFC8; /* @3360 */
+	unsigned int BLT_Y_HFC9; /* @3364 */
+	unsigned int BLT_Y_HFC10; /* @3368 */
+	unsigned int BLT_Y_HFC11; /* @3372 */
+	unsigned int BLT_Y_HFC12; /* @3376 */
+	unsigned int BLT_Y_HFC13; /* @3380 */
+	unsigned int BLT_Y_HFC14; /* @3384 */
+	unsigned int BLT_Y_HFC15; /* @3388 */
+	unsigned char fill17[80];
+	unsigned int BLT_Y_VFC0; /* @3472 */
+	unsigned int BLT_Y_VFC1; /* @3476 */
+	unsigned int BLT_Y_VFC2; /* @3480 */
+	unsigned int BLT_Y_VFC3; /* @3484 */
+	unsigned int BLT_Y_VFC4; /* @3488 */
+	unsigned int BLT_Y_VFC5; /* @3492 */
+	unsigned int BLT_Y_VFC6; /* @3496 */
+	unsigned int BLT_Y_VFC7; /* @3500 */
+	unsigned int BLT_Y_VFC8; /* @3504 */
+	unsigned int BLT_Y_VFC9; /* @3508 */
+	unsigned char fill18[72];
+	unsigned int BLT_HFC0; /* @3584 */
+	unsigned int BLT_HFC1; /* @3588 */
+	unsigned int BLT_HFC2; /* @3592 */
+	unsigned int BLT_HFC3; /* @3596 */
+	unsigned int BLT_HFC4; /* @3600 */
+	unsigned int BLT_HFC5; /* @3604 */
+	unsigned int BLT_HFC6; /* @3608 */
+	unsigned int BLT_HFC7; /* @3612 */
+	unsigned int BLT_HFC8; /* @3616 */
+	unsigned int BLT_HFC9; /* @3620 */
+	unsigned int BLT_HFC10; /* @3624 */
+	unsigned int BLT_HFC11; /* @3628 */
+	unsigned int BLT_HFC12; /* @3632 */
+	unsigned int BLT_HFC13; /* @3636 */
+	unsigned int BLT_HFC14; /* @3640 */
+	unsigned int BLT_HFC15; /* @3644 */
+	unsigned char fill19[80];
+	unsigned int BLT_VFC0; /* @3728 */
+	unsigned int BLT_VFC1; /* @3732 */
+	unsigned int BLT_VFC2; /* @3736 */
+	unsigned int BLT_VFC3; /* @3740 */
+	unsigned int BLT_VFC4; /* @3744 */
+	unsigned int BLT_VFC5; /* @3748 */
+	unsigned int BLT_VFC6; /* @3752 */
+	unsigned int BLT_VFC7; /* @3756 */
+	unsigned int BLT_VFC8; /* @3760 */
+	unsigned int BLT_VFC9; /* @3764 */
+};
+
+#endif /* !defined(__B2R2_STRUCTURES_H) */
+
diff --git a/drivers/video/b2r2/b2r2_timing.c b/drivers/video/b2r2/b2r2_timing.c
new file mode 100644
index 00000000000..4f3e2b8b042
--- /dev/null
+++ b/drivers/video/b2r2/b2r2_timing.c
@@ -0,0 +1,22 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2010
+ *
+ * ST-Ericsson B2R2 timing
+ *
+ * Author: Johan Mossberg <johan.xx.mossberg@stericsson.com>
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+
+#include <linux/time.h>
+
+
+u32 b2r2_get_curr_nsec(void)
+{
+	struct timespec ts;
+
+	getrawmonotonic(&ts);
+
+	return (u32)timespec_to_ns(&ts);
+}
diff --git a/drivers/video/b2r2/b2r2_timing.h b/drivers/video/b2r2/b2r2_timing.h
new file mode 100644
index 00000000000..e87113c0ec9
--- /dev/null
+++ b/drivers/video/b2r2/b2r2_timing.h
@@ -0,0 +1,22 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2010
+ *
+ * ST-Ericsson B2R2 timing
+ *
+ * Author: Johan Mossberg <johan.xx.mossberg@stericsson.com>
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+
+#ifndef _LINUX_DRIVERS_VIDEO_B2R2_TIMING_H_
+#define _LINUX_DRIVERS_VIDEO_B2R2_TIMING_H_
+
+/**
+ * b2r2_get_curr_nsec() - Return the current nanosecond. Notice that the value
+ *                        wraps when the u32 limit is reached.
+ *
+ */
+u32 b2r2_get_curr_nsec(void);
+
+#endif /* _LINUX_DRIVERS_VIDEO_B2R2_TIMING_H_ */
diff --git a/drivers/video/b2r2/b2r2_utils.c b/drivers/video/b2r2/b2r2_utils.c
new file mode 100644
index 00000000000..0b5a2e65d12
--- /dev/null
+++ b/drivers/video/b2r2/b2r2_utils.c
@@ -0,0 +1,361 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2010
+ *
+ * ST-Ericsson B2R2 utils
+ *
+ * Author: Johan Mossberg <johan.xx.mossberg@stericsson.com> for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+
+#include "b2r2_utils.h"
+
+#include "b2r2_debug.h"
+
+#include <video/b2r2_blt.h>
+
+#include <linux/kernel.h>
+#include <linux/errno.h>
+
+
+const s32 b2r2_s32_max = 2147483647;
+
+
+void b2r2_get_img_bounding_rect(struct b2r2_blt_img *img,
+					struct b2r2_blt_rect *bounding_rect)
+{
+	bounding_rect->x = 0;
+	bounding_rect->y = 0;
+	bounding_rect->width = img->width;
+	bounding_rect->height = img->height;
+}
+
+
+bool b2r2_is_zero_area_rect(struct b2r2_blt_rect *rect)
+{
+	return rect->width == 0 || rect->height == 0;
+}
+
+bool b2r2_is_rect_inside_rect(struct b2r2_blt_rect *rect1,
+						struct b2r2_blt_rect *rect2)
+{
+	return rect1->x >= rect2->x &&
+		rect1->y >= rect2->y &&
+		rect1->x + rect1->width <= rect2->x + rect2->width &&
+		rect1->y + rect1->height <= rect2->y + rect2->height;
+}
+
+void b2r2_intersect_rects(struct b2r2_blt_rect *rect1,
+	struct b2r2_blt_rect *rect2, struct b2r2_blt_rect *intersection)
+{
+	struct b2r2_blt_rect tmp_rect;
+
+	tmp_rect.x = max(rect1->x, rect2->x);
+	tmp_rect.y = max(rect1->y, rect2->y);
+	tmp_rect.width = min(rect1->x + rect1->width, rect2->x + rect2->width)
+				- tmp_rect.x;
+	if (tmp_rect.width < 0)
+		tmp_rect.width = 0;
+	tmp_rect.height =
+		min(rect1->y + rect1->height, rect2->y + rect2->height) -
+				tmp_rect.y;
+	if (tmp_rect.height < 0)
+		tmp_rect.height = 0;
+
+	*intersection = tmp_rect;
+}
+
+
+int b2r2_get_fmt_bpp(enum b2r2_blt_fmt fmt)
+{
+	/*
+	 * Currently this function is not used that often but if that changes a
+	 * lookup table could make it a lot faster.
+	 */
+	switch (fmt) {
+	case B2R2_BLT_FMT_1_BIT_A1:
+		return 1;
+
+	case B2R2_BLT_FMT_8_BIT_A8:
+		return 8;
+
+	case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE:
+		return 12;
+
+	case B2R2_BLT_FMT_16_BIT_ARGB4444:
+	case B2R2_BLT_FMT_16_BIT_ARGB1555:
+	case B2R2_BLT_FMT_16_BIT_RGB565:
+	case B2R2_BLT_FMT_Y_CB_Y_CR:
+	case B2R2_BLT_FMT_CB_Y_CR_Y:
+	case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE:
+		return 16;
+
+	case B2R2_BLT_FMT_24_BIT_RGB888:
+	case B2R2_BLT_FMT_24_BIT_ARGB8565:
+	case B2R2_BLT_FMT_24_BIT_YUV888:
+	case B2R2_BLT_FMT_YUV444_PACKED_PLANAR:
+		return 24;
+
+	case B2R2_BLT_FMT_32_BIT_ARGB8888:
+	case B2R2_BLT_FMT_32_BIT_ABGR8888:
+	case B2R2_BLT_FMT_32_BIT_AYUV8888:
+		return 32;
+
+	default:
+		b2r2_log_err("%s: Internal error! Format %#x not recognized.\n", __func__, fmt);
+		return 32;
+	}
+}
+
+int b2r2_get_fmt_y_bpp(enum b2r2_blt_fmt fmt)
+{
+	switch (fmt) {
+	case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE:
+	case B2R2_BLT_FMT_Y_CB_Y_CR:
+	case B2R2_BLT_FMT_CB_Y_CR_Y:
+	case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE:
+	case B2R2_BLT_FMT_YUV444_PACKED_PLANAR:
+	case B2R2_BLT_FMT_24_BIT_YUV888:
+	case B2R2_BLT_FMT_32_BIT_AYUV8888:
+		return 8;
+
+	default:
+		b2r2_log_err("%s: Internal error! Non YCbCr format supplied.\n", __func__);
+		return 8;
+	}
+}
+
+
+bool b2r2_is_single_plane_fmt(enum b2r2_blt_fmt fmt)
+{
+	switch (fmt) {
+	case B2R2_BLT_FMT_1_BIT_A1:
+	case B2R2_BLT_FMT_8_BIT_A8:
+	case B2R2_BLT_FMT_16_BIT_ARGB4444:
+	case B2R2_BLT_FMT_16_BIT_ARGB1555:
+	case B2R2_BLT_FMT_16_BIT_RGB565:
+	case B2R2_BLT_FMT_24_BIT_RGB888:
+	case B2R2_BLT_FMT_24_BIT_ARGB8565:
+	case B2R2_BLT_FMT_24_BIT_YUV888:
+	case B2R2_BLT_FMT_32_BIT_ARGB8888:
+	case B2R2_BLT_FMT_32_BIT_ABGR8888:
+	case B2R2_BLT_FMT_32_BIT_AYUV8888:
+	case B2R2_BLT_FMT_Y_CB_Y_CR:
+	case B2R2_BLT_FMT_CB_Y_CR_Y:
+		return true;
+
+	default:
+		return false;
+	}
+}
+
+bool b2r2_is_independent_pixel_fmt(enum b2r2_blt_fmt fmt)
+{
+	switch (fmt) {
+	case B2R2_BLT_FMT_1_BIT_A1:
+	case B2R2_BLT_FMT_8_BIT_A8:
+	case B2R2_BLT_FMT_16_BIT_ARGB4444:
+	case B2R2_BLT_FMT_16_BIT_ARGB1555:
+	case B2R2_BLT_FMT_16_BIT_RGB565:
+	case B2R2_BLT_FMT_24_BIT_RGB888:
+	case B2R2_BLT_FMT_24_BIT_ARGB8565:
+	case B2R2_BLT_FMT_24_BIT_YUV888:
+	case B2R2_BLT_FMT_32_BIT_ARGB8888:
+	case B2R2_BLT_FMT_32_BIT_ABGR8888:
+	case B2R2_BLT_FMT_32_BIT_AYUV8888:
+	case B2R2_BLT_FMT_YUV444_PACKED_PLANAR:
+		return true;
+
+	default:
+		return false;
+	}
+}
+
+bool b2r2_is_ycbcri_fmt(enum b2r2_blt_fmt fmt)
+{
+	switch (fmt) {
+	case B2R2_BLT_FMT_Y_CB_Y_CR:
+	case B2R2_BLT_FMT_CB_Y_CR_Y:
+	case B2R2_BLT_FMT_24_BIT_YUV888:
+	case B2R2_BLT_FMT_32_BIT_AYUV8888:
+		return true;
+
+	default:
+		return false;
+	}
+}
+
+bool b2r2_is_ycbcrsp_fmt(enum b2r2_blt_fmt fmt)
+{
+	switch (fmt) {
+	case B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR:
+		return true;
+
+	default:
+		return false;
+	}
+}
+
+bool b2r2_is_ycbcrp_fmt(enum b2r2_blt_fmt fmt)
+{
+	switch (fmt) {
+	case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YUV444_PACKED_PLANAR:
+		return true;
+
+	default:
+		return false;
+	}
+}
+
+bool b2r2_is_ycbcr420_fmt(enum b2r2_blt_fmt fmt)
+{
+	switch (fmt) {
+	case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE:
+		return true;
+
+	default:
+		return false;
+	}
+}
+
+bool b2r2_is_ycbcr422_fmt(enum b2r2_blt_fmt fmt)
+{
+	switch (fmt) {
+	case B2R2_BLT_FMT_Y_CB_Y_CR:
+	case B2R2_BLT_FMT_CB_Y_CR_Y:
+	case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE:
+		return true;
+
+	default:
+		return false;
+	}
+}
+
+bool b2r2_is_ycbcr444_fmt(enum b2r2_blt_fmt fmt)
+{
+	switch (fmt) {
+	case B2R2_BLT_FMT_YUV444_PACKED_PLANAR:
+	case B2R2_BLT_FMT_32_BIT_AYUV8888:
+	case B2R2_BLT_FMT_24_BIT_YUV888:
+		return true;
+
+	default:
+		return false;
+	}
+}
+
+bool b2r2_is_mb_fmt(enum b2r2_blt_fmt fmt)
+{
+	switch (fmt) {
+	case B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE:
+	case B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE:
+		return true;
+
+	default:
+		return false;
+	}
+}
+
+u32 b2r2_calc_pitch_from_width(s32 width, enum b2r2_blt_fmt fmt)
+{
+	if (b2r2_is_single_plane_fmt(fmt)) {
+		return (u32)b2r2_div_round_up(width *
+				b2r2_get_fmt_bpp(fmt), 8);
+	} else if (b2r2_is_ycbcrsp_fmt(fmt) || b2r2_is_ycbcrp_fmt(fmt)) {
+		return (u32)b2r2_div_round_up(width *
+				b2r2_get_fmt_y_bpp(fmt), 8);
+	} else {
+		b2r2_log_err("%s: Internal error! "
+				"Pitchless format supplied.\n",
+				__func__);
+		return 0;
+	}
+}
+
+u32 b2r2_get_img_pitch(struct b2r2_blt_img *img)
+{
+	if (img->pitch != 0)
+		return img->pitch;
+	else
+		return b2r2_calc_pitch_from_width(img->width, img->fmt);
+}
+
+s32 b2r2_get_img_size(struct b2r2_blt_img *img)
+{
+	if (b2r2_is_single_plane_fmt(img->fmt)) {
+		return (s32)b2r2_get_img_pitch(img) * img->height;
+	} else if (b2r2_is_ycbcrsp_fmt(img->fmt) ||
+			b2r2_is_ycbcrp_fmt(img->fmt)) {
+		s32 y_plane_size;
+
+		y_plane_size = (s32)b2r2_get_img_pitch(img) * img->height;
+
+		if (b2r2_is_ycbcr420_fmt(img->fmt)) {
+			return y_plane_size + y_plane_size / 2;
+		} else if (b2r2_is_ycbcr422_fmt(img->fmt)) {
+			return y_plane_size * 2;
+		} else if (b2r2_is_ycbcr444_fmt(img->fmt)) {
+			return y_plane_size * 3;
+		} else {
+			b2r2_log_err("%s: Internal error! "
+					"Format %#x not recognized.\n",
+					__func__, img->fmt);
+			return 0;
+		}
+	} else if (b2r2_is_mb_fmt(img->fmt)) {
+		return (img->width * img->height *
+				b2r2_get_fmt_bpp(img->fmt)) / 8;
+	} else {
+		b2r2_log_err("%s: Internal error! "
+				"Format %#x not recognized.\n",
+				__func__, img->fmt);
+		return 0;
+	}
+}
+
+
+s32 b2r2_div_round_up(s32 dividend, s32 divisor)
+{
+	s32 quotient = dividend / divisor;
+	if (dividend % divisor != 0)
+		quotient++;
+
+	return quotient;
+}
+
+bool b2r2_is_aligned(s32 value, s32 alignment)
+{
+	return value % alignment == 0;
+}
+
+s32 b2r2_align_up(s32 value, s32 alignment)
+{
+	s32 remainder = abs(value) % abs(alignment);
+	s32 value_to_add;
+
+	if (remainder > 0) {
+		if (value >= 0)
+			value_to_add = alignment - remainder;
+		else
+			value_to_add = remainder;
+	} else {
+		value_to_add = 0;
+	}
+
+	return value + value_to_add;
+}
diff --git a/drivers/video/b2r2/b2r2_utils.h b/drivers/video/b2r2/b2r2_utils.h
new file mode 100644
index 00000000000..745d71c0126
--- /dev/null
+++ b/drivers/video/b2r2/b2r2_utils.h
@@ -0,0 +1,51 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2010
+ *
+ * ST-Ericsson B2R2 utils
+ *
+ * Author: Johan Mossberg <johan.xx.mossberg@stericsson.com> for ST-Ericsson
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+
+#ifndef _LINUX_DRIVERS_VIDEO_B2R2_UTILS_H_
+#define _LINUX_DRIVERS_VIDEO_B2R2_UTILS_H_
+
+#include <video/b2r2_blt.h>
+
+extern const s32 b2r2_s32_max;
+
+void b2r2_get_img_bounding_rect(struct b2r2_blt_img *img,
+		struct b2r2_blt_rect *bounding_rect);
+
+bool b2r2_is_zero_area_rect(struct b2r2_blt_rect *rect);
+bool b2r2_is_rect_inside_rect(struct b2r2_blt_rect *rect1,
+		struct b2r2_blt_rect *rect2);
+void b2r2_intersect_rects(struct b2r2_blt_rect *rect1,
+		struct b2r2_blt_rect *rect2, struct b2r2_blt_rect *intersection);
+
+int b2r2_get_fmt_bpp(enum b2r2_blt_fmt fmt);
+int b2r2_get_fmt_y_bpp(enum b2r2_blt_fmt fmt);
+
+bool b2r2_is_single_plane_fmt(enum b2r2_blt_fmt fmt);
+bool b2r2_is_independent_pixel_fmt(enum b2r2_blt_fmt fmt);
+bool b2r2_is_ycbcri_fmt(enum b2r2_blt_fmt fmt);
+bool b2r2_is_ycbcrsp_fmt(enum b2r2_blt_fmt fmt);
+bool b2r2_is_ycbcrp_fmt(enum b2r2_blt_fmt fmt);
+bool b2r2_is_ycbcr420_fmt(enum b2r2_blt_fmt fmt);
+bool b2r2_is_ycbcr422_fmt(enum b2r2_blt_fmt fmt);
+bool b2r2_is_ycbcr444_fmt(enum b2r2_blt_fmt fmt);
+bool b2r2_is_mb_fmt(enum b2r2_blt_fmt fmt);
+
+/*
+ * Rounds up if an invalid width causes the pitch to be non byte aligned.
+ */
+u32 b2r2_calc_pitch_from_width(s32 width, enum b2r2_blt_fmt fmt);
+u32 b2r2_get_img_pitch(struct b2r2_blt_img *img);
+s32 b2r2_get_img_size(struct b2r2_blt_img *img);
+
+s32 b2r2_div_round_up(s32 dividend, s32 divisor);
+bool b2r2_is_aligned(s32 value, s32 alignment);
+s32 b2r2_align_up(s32 value, s32 alignment);
+
+#endif
diff --git a/include/video/b2r2_blt.h b/include/video/b2r2_blt.h
new file mode 100644
index 00000000000..0284d9da65d
--- /dev/null
+++ b/include/video/b2r2_blt.h
@@ -0,0 +1,581 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2010
+ *
+ * ST-Ericsson B2R2 user interface
+ *
+ * Author: Robert Fekete <robert.fekete@stericsson.com>
+ * Author: Paul Wannback
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+
+
+#ifndef _LINUX_VIDEO_B2R2_BLT_H
+#define _LINUX_VIDEO_B2R2_BLT_H
+
+#include <linux/types.h>
+
+#if defined(__KERNEL__) || defined(_KERNEL)
+#include <linux/mm_types.h>
+#include <linux/bitops.h>
+#else
+#define BIT(nr)			(1UL << (nr))
+#endif
+
+/**
+ * struct b2r2_blt_rect - Specifies a B2R2 rectangle
+ *
+ * @left: X-coordinate of top left corner
+ * @top: Y-coordinate of top left corner
+ * @width: Rectangle width. Must be >= 0.
+ * @height: Rectangle height. Must be >= 0.
+ */
+struct b2r2_blt_rect {
+	__s32  x;
+	__s32  y;
+	__s32  width;
+	__s32  height;
+};
+
+/**
+ * enum b2r2_blt_fmt - Defines the available B2R2 buffer formats
+ *
+ *        Inspired by Khronos OpenMAX, please see
+ *        OpenMAX IL specification for detailed descriptions of the formats
+ *
+ * @B2R2_BLT_FMT_UNUSED: Placeholder value when format is unknown,
+ * or specified using a vendor-specific means.
+ * @B2R2_BLT_FMT_16_BIT_ARGB4444: 16 bits per pixel ARGB format with colors
+ * stored as Alpha 15:12, Red 11:8, Green 7:4, and Blue 3:0.
+ * @B2R2_BLT_FMT_16_BIT_ARGB1555: 16 bits per pixel ARGB format with colors
+ * stored as Alpha 15, Red 14:10, Green 9:5, and Blue 4:0.
+ * @B2R2_BLT_FMT_16_BIT_RGB565: 16 bits per pixel RGB format with colors
+ * stored as Red 15:11, Green 10:5, and Blue 4:0.
+ * @B2R2_BLT_FMT_24_BIT_RGB888: 24 bits per pixel RGB format with colors
+ * stored as Red 23:16, Green 15:8, and Blue 7:0.
+ * @B2R2_BLT_FMT_32_BIT_ARGB8888: 32 bits per pixel ARGB format with colors
+ * stored as Alpha 31:24, Red 23:16, Green 15:8, and Blue 7:0.
+ * @B2R2_BLT_FMT_YUV420_PACKED_PLANAR: YUV planar format, organized with
+ * three separate planes for each color component, namely Y, U, and V.
+ * U and V pixels are sub-sampled by a factor of two both horizontally and
+ * vertically. The buffer shall contain a plane of Y, U, and V data in this
+ * order
+ * @B2R2_BLT_FMT_YUV422_PACKED_PLANAR: YUV planar format, organized with
+ * three separate planes for each color component, namely Y, U, and V.
+ * U and V pixels are subsampled by a factor of two horizontally.
+ * The buffer shall contain a plane of Y, U, and V data in this order.
+ * @B2R2_BLT_FMT_Y_CB_Y_CR: 16 bits per pixel YUV interleaved format organized
+ * as YUYV (i.e., YCbYCr).
+ * (Corresponds to YUV422 interleaved)
+ * @B2R2_BLT_FMT_CB_Y_CR_Y: 16 bits per pixel YUV interleaved format organized
+ * as UYVY (i.e., CbYCrY).
+ * (Corresponds to YUV422R)
+ * @B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR: YUV planar format, organized with
+ * a first plane containing Y pixels, and a second plane containing U and V
+ * pixels interleaved with the first U value first. U and V pixels are
+ * sub-sampled by a factor of two both horizontally and vertically. The buffer
+ * shall contain a plane of Y, U and V data.
+ * (Same as B2R2 420 Raster 2 buffer - 420 R2B)
+ * @B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR: YUV planar format, organized with
+ * a first plane containing Y pixels, and a second plane containing U and V
+ * pixels interleaved with the first U value first. U and V pixels are
+ * sub-sampled by a factor of two horizontally. The buffer shall contain a
+ * plane of Y, U and V data.
+ * (Same as B2R2 422 Raster 2 buffer - 422 R2B)
+ * @B2R2_BLT_FMT_32_BIT_ABGR8888: 32 bits per pixel ABGR format with colors
+ * stored as Alpha 31:24,Blue 23:16, Green 15:8, and Red 7:0.
+ * @B2R2_BLT_FMT_24_BIT_ARGB8565: 24 bits per pixel ARGB format with colors
+ * stored as Alpha 23:16, Red 15:11, Green 10:5, and Blue 4:0.
+ * @B2R2_BLT_FMT_24_BIT_YUV888: 24 bits per pixel YUV format with colors
+ * stored as Y 23:16, U 15:8, and V 7:0.
+ * @B2R2_BLT_FMT_32_BIT_AYUV8888: 32 bits per pixel AYUV format with colors
+ * stored as Alpha 31:24, Y 23:16, U 15:8, and V 7:0.
+ * @B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE: Nomadik YUV 420 macro block
+ * format, see B2R2 spec for details
+ * @B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE: Nomadik YUV 422 macro block
+ * format, see B2R2 spec for details
+ * @B2R2_BLT_FMT_1_BIT_A1: 1 bit per pixel A format, 1 bit alpha
+ * @B2R2_BLT_FMT_8_BIT_A8: 8 bit per pixel A format, 8 bit alpha
+ * @B2R2_BLT_FMT_YUV444_PACKED_PLANAR: YUV planar format, organized with
+ * three separate planes, one for each color component, namely Y, U, and V.
+ * All planes use full resolution, there is no subsampling.
+ * The buffer shall contain a plane of Y, U, and V data in this order.
+ */
+enum b2r2_blt_fmt {
+    B2R2_BLT_FMT_UNUSED = 0,
+    B2R2_BLT_FMT_16_BIT_ARGB4444 = 4,
+    B2R2_BLT_FMT_16_BIT_ARGB1555 = 5,
+    B2R2_BLT_FMT_16_BIT_RGB565 = 6,
+    B2R2_BLT_FMT_24_BIT_RGB888 = 11,
+    B2R2_BLT_FMT_32_BIT_ARGB8888 = 16,
+    B2R2_BLT_FMT_YUV420_PACKED_PLANAR = 20,
+    B2R2_BLT_FMT_YUV422_PACKED_PLANAR = 23,
+    B2R2_BLT_FMT_Y_CB_Y_CR = 25,
+    B2R2_BLT_FMT_CB_Y_CR_Y = 27,
+    B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR = 39,
+    B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR = 40,
+    /* Extensions, non OpenMAX formats */
+    B2R2_BLT_FMT_32_BIT_ABGR8888 = 0x7F000000, /* OpenMax vendor start */
+    B2R2_BLT_FMT_24_BIT_ARGB8565 = 0x7F000001,
+    B2R2_BLT_FMT_24_BIT_YUV888 = 0x7F000002,
+    B2R2_BLT_FMT_32_BIT_AYUV8888 = 0x7F000003,
+    B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE = 0x7F000004,
+    B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE = 0x7F000005,
+    B2R2_BLT_FMT_1_BIT_A1 = 0x7F000006,
+    B2R2_BLT_FMT_8_BIT_A8 = 0x7F000007,
+    B2R2_BLT_FMT_YUV444_PACKED_PLANAR = 0x7F000008,
+};
+
+/**
+ * enum b2r2_blt_ptr_type - Specifies a B2R2 buffer pointer type
+ *
+ * @B2R2_BLT_PTR_NONE:
+ *    No pointer (NULL). E.g. src fill.
+ * @B2R2_BLT_PTR_VIRTUAL:
+ *    Use offset as a userspace virtual address
+ * @B2R2_BLT_PTR_PHYSICAL:
+ *    Use offset as a physical address
+ * @B2R2_BLT_PTR_FD_OFFSET:
+ *    Use fd + offset to determine buffer location.
+ * @B2R2_BLT_PTR_HWMEM_BUF_NAME:
+ *    Use hwmem_buf_name and offset to determine buffer location.
+ */
+enum b2r2_blt_ptr_type {
+	B2R2_BLT_PTR_NONE,
+	B2R2_BLT_PTR_VIRTUAL,
+	B2R2_BLT_PTR_PHYSICAL,
+	B2R2_BLT_PTR_FD_OFFSET,
+	B2R2_BLT_PTR_HWMEM_BUF_NAME_OFFSET,
+};
+
+/**
+ * struct b2r2_blt_buf - Specifies a B2R2 buffer pointer
+ *
+ * @type: Buffer pointer type
+ * @hwmem_global_buf_id: Hwmem buffer name
+ * @fd: File descriptor (e.g. file handle to pmem or fb device)
+ * @offset: Offset where buffer can be found or address.
+ * @len: Size of buffer in bytes
+ * @bits: Pointer to the bitmap data. This field can be used to specify
+ * an alternative way to access the buffer. Whenever the 'bits' pointer
+ * is set to non-NULL, the underlying implementation is free to decide
+ * whether or not to use it in favor of other ways to locate the buffer.
+ */
+struct b2r2_blt_buf {
+	enum b2r2_blt_ptr_type type;
+	__s32                  hwmem_buf_name;
+	__s32                  fd;
+	__u32                  offset;
+	__u32                  len;
+	void                   *bits;
+};
+
+
+/**
+ * struct b2r2_blt_img - Specifies a B2R2 image
+ *
+ * @fmt: Pixel format of image
+ * @buf: Pixel buffer
+ * @width: Width in pixels
+ * @height: Height in pixels
+ * @pitch: Pitch in bytes (from start of one line to start of next)
+ */
+struct b2r2_blt_img {
+	enum b2r2_blt_fmt   fmt;
+	struct b2r2_blt_buf buf;
+	__s32               width;
+	__s32               height;
+	__u32               pitch;
+};
+
+
+/**
+ * enum b2r2_blt_transform- Specifies rotation and flipping, mutually exclusive
+ * @B2R2_BLT_TRANSFORM_NONE:
+ *    No rotation or flip
+ * @B2R2_BLT_TRANSFORM_FLIP_H
+ *    Flip horizontally
+ * @B2R2_BLT_TRANSFORM_FLIP_V
+ *    Flip vertically
+ * @B2R2_BLT_TRANSFORM_CCW_ROT_90
+ *    Rotate 90 degrees counter clockwise
+ * @B2R2_BLT_TRANSFORM_CCW_ROT_180
+ *    Rotate 180 degrees (same as flip horizontally together with
+ *    flip vertically)
+ * @B2R2_BLT_TRANSFORM_CCW_ROT_270
+ *    Rotate 270 degrees counter clockwise
+ * @B2R2_BLT_TRANSFORM_FLIP_H_CCW_ROT_90
+ *    Flip horizontally and then rotate 90 degrees counter clockwise
+ * @B2R2_BLT_TRANSFORM_FLIP_V_CCW_ROT_90
+ *    Flip vertically and then rotate 90 degrees counter clockwise
+ */
+enum b2r2_blt_transform {
+	B2R2_BLT_TRANSFORM_NONE              = 0,
+	B2R2_BLT_TRANSFORM_FLIP_H            = 1,
+	B2R2_BLT_TRANSFORM_FLIP_V            = 2,
+	B2R2_BLT_TRANSFORM_CCW_ROT_90        = 4,
+	B2R2_BLT_TRANSFORM_CCW_ROT_180       = 3,
+	B2R2_BLT_TRANSFORM_CCW_ROT_270       = 7,
+	B2R2_BLT_TRANSFORM_FLIP_H_CCW_ROT_90 = 5,
+	B2R2_BLT_TRANSFORM_FLIP_V_CCW_ROT_90 = 6,
+};
+
+
+/**
+ * enum b2r2_blt_flag - Flags that controls the B2R2 request
+ *
+ * Can be combined.
+ *
+ * @B2R2_BLT_FLAG_ASYNCH:
+ *    Asynchronous request. b2r2_blt will returns when the request
+ *    has been queued.
+ * @B2R2_BLT_FLAG_DRY_RUN:
+ *    Dry run, just to check if request can be performed.
+ * @B2R2_BLT_FLAG_PER_PIXEL_ALPHA_BLEND:
+ *    Enable per pixel alpha blend
+ * @B2R2_BLT_FLAG_GLOBAL_ALPHA_BLEND:
+ *    Enable global alpha blend (alpha value in global_alpha)
+ * @B2R2_BLT_FLAG_SOURCE_COLOR_KEY:
+ *    Enable source color key (color in src_color). Color should be in raw
+ *    format.
+ *    B2R2_BLT_FLAG_SOURCE_COLOR_KEY, B2R2_BLT_FLAG_SOURCE_FILL and
+ *    B2R2_BLT_FLAG_SOURCE_FILL_RAW cannot be specified at the same time.
+ *    B2R2_BLT_FLAG_SOURCE_COLOR_KEY and B2R2_BLT_FLAG_DEST_COLOR_KEY cannot be
+ *    specified at the same time.
+ * @B2R2_BLT_FLAG_SOURCE_FILL:
+ *    Enable ARGB/AYUV source fill (color in src_color). Which of ARGB and AYUV
+ *    is determined by the destination format.
+ *    B2R2_BLT_FLAG_SOURCE_COLOR_KEY, B2R2_BLT_FLAG_SOURCE_FILL and
+ *    B2R2_BLT_FLAG_SOURCE_FILL_RAW cannot be specified at the same time
+ * @B2R2_BLT_FLAG_SOURCE_FILL_RAW:
+ *    Enable raw color source fill (color in src_color)
+ *    B2R2_BLT_FLAG_SOURCE_COLOR_KEY, B2R2_BLT_FLAG_SOURCE_FILL and
+ *    B2R2_BLT_FLAG_SOURCE_FILL_RAW cannot be specified at the same time
+ * @B2R2_BLT_FLAG_DEST_COLOR_KEY:
+ *    Enable dest color key (color in dst_color). Color in raw format.
+ * @B2R2_BLT_FLAG_SRC_IS_NOT_PREMULT:
+ *    Source color not premultiplied (Valid for alpha formats only).
+ * @B2R2_BLT_FLAG_DITHER:
+ *    Enable dithering
+ * @B2R2_BLT_FLAG_BLUR:
+ *    Enable blur
+ * @B2R2_BLT_FLAG_SOURCE_MASK:
+ *    Enable source mask
+ * @B2R2_BLT_FLAG_DESTINATION_CLIP:
+ *    Enable destination clip rectangle
+ * @B2R2_BLT_FLAG_INHERIT_PRIO
+ *    Inherit process priority
+ * @B2R2_BLT_FLAG_REPORT_WHEN_DONE
+ *    Report through b2r2_blt file when done. A b2r2_blt_report structure is
+ *    read. Use poll() or select() if anything to read. (i.e. to help user space
+ *    to implement callback functionality)
+ * @B2R2_BLT_FLAG_REPORT_PERFORMANCE
+ *    Include performance data in the report structure
+ * @B2R2_BLT_FLAG_CLUT_COLOR_CORRECTION
+ *    Use color look-up table for color correction.
+ *    Pointer to the table must be specified in *clut field of
+ *    the b2r2_blt_req structure.
+ *    The table must map all input color values
+ *    for each channel to the desired output values.
+ *    It is an array with the following format:
+ *    R0 G0 B0 A0 R1 G1 B1 A1...R255 G255 B255 A255
+ *    where R0 is the 8 bit output value for red channel whenever its input
+ *    equals 0.
+ *    Similarly, R1 through R255 are the red channel outputs whenever
+ *    the channel's inputs equal 1 through 255 respectively.
+ *    Gn, Bn, An denote green, blue and alpha channel.
+ *    Whenever the input bitmap format lacks the alpha channel,
+ *    all alpha values in the color correction table should be set to 255.
+ *    Size of the array that specifies the color correction table
+ *    must be 1024 bytes.
+ *    A table that does not change anything has the form:
+ *    0 0 0 0 1 1 1 1 2 2 2 2 ... 254 254 254 254 255 255 255 255.
+ *    CLUT color correction can be applied to YUV raster buffers as well,
+ *    in which case the RGB color channels are mapped onto YUV-space
+ *    as follows:
+ *    R = red chrominance
+ *    G = luminance
+ *    B = blue chrominance
+ *    A = alpha
+ *    If any of the planar or semi-planar formats is used, luminance cannot
+ *    be changed by the color correction table.
+ */
+enum b2r2_blt_flag {
+	B2R2_BLT_FLAG_ASYNCH                = BIT(0),/*0x1*/
+	B2R2_BLT_FLAG_DRY_RUN               = BIT(1),/*0x2*/
+	B2R2_BLT_FLAG_PER_PIXEL_ALPHA_BLEND = BIT(2),/*0x4*/
+	B2R2_BLT_FLAG_GLOBAL_ALPHA_BLEND    = BIT(3),/*0x8*/
+	B2R2_BLT_FLAG_SOURCE_COLOR_KEY      = BIT(4),/*0x10*/
+	B2R2_BLT_FLAG_SOURCE_FILL           = BIT(5),/*0x20*/
+	B2R2_BLT_FLAG_SOURCE_FILL_RAW       = BIT(6),/*0x40*/
+	B2R2_BLT_FLAG_DEST_COLOR_KEY        = BIT(7),/*0x80*/
+	B2R2_BLT_FLAG_SRC_IS_NOT_PREMULT    = BIT(8),/*0x100*/
+	B2R2_BLT_FLAG_DITHER                = BIT(9),/*0x200*/
+	B2R2_BLT_FLAG_BLUR                  = BIT(10),/*0x400*/
+	B2R2_BLT_FLAG_SOURCE_MASK           = BIT(11),/*0x800*/
+	B2R2_BLT_FLAG_DESTINATION_CLIP      = BIT(12),/*0x1000*/
+	B2R2_BLT_FLAG_INHERIT_PRIO          = BIT(13),/*0x2000*/
+	B2R2_BLT_FLAG_SRC_NO_CACHE_FLUSH    = BIT(14),/*0x4000*/
+	B2R2_BLT_FLAG_SRC_MASK_NO_CACHE_FLUSH = BIT(15),/*0x8000*/
+	B2R2_BLT_FLAG_DST_NO_CACHE_FLUSH    = BIT(16),/*0x10000*/
+	B2R2_BLT_FLAG_REPORT_WHEN_DONE      = BIT(29),/*0x20000000*/
+	B2R2_BLT_FLAG_REPORT_PERFORMANCE    = BIT(30),/*0x40000000*/
+	B2R2_BLT_FLAG_CLUT_COLOR_CORRECTION = BIT(31),/*0x80000000*/
+};
+
+
+/**
+ * struct b2r2_blt_req - Specifies a request to B2R2
+ *
+ * @size: Size of this structure. Used for versioning. MUST be specified.
+ * @flags: Flags that control the B2R2 request ORed together
+ * @tfm: How source should be flipped and rotated when blitting
+ * @prio: Priority (-20 to 19). Inherits process prio
+ *        if B2R2_BLT_FLAG_INHERIT_PRIO. Given priority is mapped onto B2R2.
+ *        TBD: How?
+ * @clut: Pointer to the look-up table for color correction.
+ * @src_img: Source image. Not used if source fill.
+ * @src_mask: Source mask. Not used if source fill.
+ * @src_rect: Source area to be blitted.
+ * @src_color: Source fill color or color key
+ * @dst_img: Destination image.
+ * @dst_rect: Destination area to be blitted to.
+ * @dst_color: Destination color key
+ * @dst_clip_rect: Destination clip rectangle.
+ * @global_alpha: Global alpha value (0 - 255)
+ * @report1: Data 1 to report back when request is done.
+ *           See struct b2r2_blt_report.
+ * @report2: Data 2 to report back when request is done.
+ *           See struct b2r2_blt_report.
+ *
+ */
+struct b2r2_blt_req {
+	__u32                     size;
+	enum   b2r2_blt_flag      flags;
+	enum   b2r2_blt_transform transform;
+	__s32                     prio;
+	void                      *clut;
+	struct b2r2_blt_img       src_img;
+	struct b2r2_blt_img       src_mask;
+	struct b2r2_blt_rect      src_rect;
+	__u32                     src_color;
+	struct b2r2_blt_img       dst_img;
+	struct b2r2_blt_rect      dst_rect;
+	struct b2r2_blt_rect      dst_clip_rect;
+	__u32                     dst_color;
+	__u8                      global_alpha;
+	__u32                     report1;
+	__u32                     report2;
+};
+
+/**
+ * enum b2r2_blt_cap -  Capabilities that can be queried for.
+ *
+ * Capabilities can be queried for a specific format or for formats in
+ * general. To query for capabilities in general, specify BLT_FMT_UNUSED
+ * as format.
+ *
+ * B2R2_BLT_CAP_UNUSED: Unused/unspecified capability
+ * B2R2_BLT_CAP_FMT_SOURCE: Is format supported as source?
+ * B2R2_BLT_CAP_FMT_SOURCE_MASK: Is format supported as source mask?
+ * B2R2_BLT_CAP_FMT_DEST: Is format supported as dest?
+ * B2R2_BLT_CAP_PER_PIXEL_ALPHA_BLEND: Is per pixel alpha blending supported
+ * with format as source
+ * B2R2_BLT_CAP_GLOBAL_ALPHA_BLEND: Is per global alpha blending supported
+ * with format as source
+ * B2R2_BLT_CAP_SOURCE_COLOR_KEY: Is source color key supported with format as
+ * source
+ * B2R2_BLT_CAP_SOURCE_FILL: Is source fill supported with format as source
+ * B2R2_BLT_CAP_SOURCE_FILL_RAW: Is source fill raw supported with format as
+ * dest
+ * B2R2_BLT_CAP_DEST_COLOR_KEY: Is dest color key supported with format as dest
+ * B2R2_BLT_CAP_DITHER: Is dithering supported with format as source
+ * B2R2_BLT_CAP_BLUR: Is blur supported with format as source
+ * B2R2_BLT_CAP_MINIFICATION_LIMIT: Minification limit (copybit support)
+ * B2R2_BLT_CAP_MAGNIFICATION_LIMIT: Magnification limit (copybit support)
+ * B2R2_BLT_CAP_SCALING_FRAC_BITS: Number of scaling fractional bits (copybit
+ * support)
+ * B2R2_BLT_CAP_ROTATION_STEP_DEG: Supported rotation step in degrees (copybit
+ * support)
+ */
+
+enum b2r2_blt_cap {
+    B2R2_BLT_CAP_UNUSED = 0,
+    /**
+     * @brief Is format supported as source.
+     */
+    B2R2_BLT_CAP_FMT_SOURCE,
+    /**
+     * @brief Is format supported as source mask
+     */
+    B2R2_BLT_CAP_FMT_SOURCE_MASK,
+    /**
+     * @brief Is format supported as destination
+     */
+    B2R2_BLT_CAP_FMT_DEST,
+    /**
+     * @brief Is per pixel alpha blending supported with format as source
+     */
+    B2R2_BLT_CAP_PER_PIXEL_ALPHA_BLEND,
+    /**
+     * @brief Is global alpha blending supported with format as source
+     */
+    B2R2_BLT_CAP_GLOBAL_ALPHA_BLEND,
+    /**
+     * @brief Is source color key supported with format as source
+     */
+    B2R2_BLT_CAP_SOURCE_COLOR_KEY,
+    /**
+     * @brief Is source fill supported with format as source
+     */
+    B2R2_BLT_CAP_SOURCE_FILL,
+    /**
+     * @brief Is source fill raw supported with format as dest
+     */
+    B2R2_BLT_CAP_SOURCE_FILL_RAW,
+    /**
+     * @brief Is dest color key supported with format as dest
+     */
+    B2R2_BLT_CAP_DEST_COLOR_KEY,
+    /**
+     * @brief Is dithering supported with format as source
+     */
+    B2R2_BLT_CAP_DITHER,
+    /**
+     * @brief Is blur supported with format as source
+     */
+    B2R2_BLT_CAP_BLUR,
+    /**
+     * @brief Minification limit (copybit support)
+     */
+    B2R2_BLT_CAP_MINIFICATION_LIMIT,
+    /**
+     * @brief Magnification limit (copybit support)
+     */
+    B2R2_BLT_CAP_MAGNIFICATION_LIMIT,
+    /**
+     * @brief Number of scaling fractional bits (copybit support)
+     */
+    B2R2_BLT_CAP_SCALING_FRAC_BITS,
+    /**
+     * @brief Supported rotation step in degrees (copybit support)
+     */
+    B2R2_BLT_CAP_ROTATION_STEP_DEG,
+};
+
+/**
+ * struct b2r2_blt_query_cap - Query B2R2 capabilities
+ *
+ * fmt: Format to query capabilities for or BLT_FMT_UNUSED for all
+ * cap: Capability to query for
+ * result: Returned capability. Interpretaion of this variable varies
+ *         with the capability queried
+ */
+struct b2r2_blt_query_cap {
+	enum b2r2_blt_fmt fmt;
+	enum b2r2_blt_cap cap;
+	__u32             result;
+};
+
+/**
+ * struct b2r2_blt_report - Report from B2R2 driver back to user space
+ *
+ * This structure can be read from B2R2 driver if B2R2_BLT_FLAG_REPORT_WHEN_DONE
+ * flag was specified when the request was issued.
+ *
+ * @request_id: The id for the request, same as reported from blt_request
+ * @report1: Client data specified in struct blt_request
+ * @report2: Client data specified in struct blt_request
+ * @usec_elapsed: Number of microseconds needed to perform this blit
+ *                if B2R2_BLT_FLAG_REPORT_PERFORMANCE was specified when the
+ *                request was issued.
+ *
+ */
+struct b2r2_blt_report {
+	__u32 request_id;
+	__u32 report1;
+	__u32 report2;
+	__u32 usec_elapsed;
+};
+
+/**
+ * B2R2 BLT driver is used in the following way:
+ *
+ * Obtain a file descriptor to the driver:
+ *        fd = open("/dev/b2r2_blt", O_RDWR);
+ *
+ * Issue requests:
+ *        struct b2r2_blt_request blt_request;
+ *        blt_request.size = sizeof(blt_request);
+ *        ... Fill request with data...
+ *
+ *        request_id = ioctl(fd, B2R2_BLT_IOC, (__u32) &blt_request);
+ *
+ * Wait for a request to finish
+ *        ret = ioctl(fd, B2R2_BLT_SYNCH_IOC, (__u32) request_id);
+ *
+ * Wait for all requests from this context to finish
+ *        ret = ioctl(fd, B2R2_BLT_SYNCH_IOC, (__u32) 0);
+ *
+ * Wait indefinitely for report data from driver:
+ *        pollfd.fd = fd
+ *        pollfd.events = 0xFFFFFFFF;
+ *        pollfd.revents = 0;
+ *        ret = poll(&pollfd, 1, -1);
+ *
+ * Read report data from driver
+ *        struct b2r2_blt_report blt_report;
+ *
+ *        nread = read(fd, &blt_report, sizeof(blt_report));
+ *
+ * Close the driver
+ *        close(fd);
+ */
+
+/* B2R2 BLT IOCTLS */
+
+/**
+ * B2R2_BLT_IOC_MAGIC is ioctl type group for B2R2 driver
+ */
+#define B2R2_BLT_IOC_MAGIC 0xb2
+
+/**
+ * The B2R2_BLT_IOC ioctl adds a blit request to B2R2.
+ *
+ * The ioctl returns when the blit has been performed if not
+ * asynchronous execution has been specified. If asynchronous,
+ * control is returned as soon as the request has been queued.
+ *
+ * Supplied parameter shall be a pointer to a struct b2r2_blt_req.
+ *
+ * Returns an unique request id if >= 0, else a negative error code.
+ * This request id can be waited for using B2R2_BLT_SYNC_IOC.
+ * Return values: -ESOMERROR Description of an error
+ */
+#define B2R2_BLT_IOC        _IOW(B2R2_BLT_IOC_MAGIC, 1, struct b2r2_blt_req)
+
+/**
+ * The B2R2_BLT_SYNC_IOC waits for all or a specified request to be finished.
+ *
+ * Supplied parameter shall be a request id previously returned by
+ * B2R2_BLT_IOC or 0 for all requests.
+ *
+ * Returns 0 if OK, else a negative error code
+ * Return value: -ESOMERROR Description of an error
+ */
+#define B2R2_BLT_SYNCH_IOC  _IOW(B2R2_BLT_IOC_MAGIC, 2, int)
+
+/**
+ * The BLT_QUERY_CAP_IOC returns capability information for all or
+ *                       for a certain format
+ *
+ * Supplied parameter shall be a pointer to a struct b2r2_blt_query_cap.
+ *
+ * @return Returns 0 if OK, else a negative error code
+ * @retval -ESOMERROR Description of an error
+ */
+#define B2R2_BLT_QUERY_CAP_IOC  _IOWR(B2R2_BLT_IOC_MAGIC, 3, \
+				  struct b2r2_blt_query_cap)
+
+#endif /* #ifdef _LINUX_VIDEO_B2R2_BLT_H */
-- 
cgit v1.2.3


From c5aeddd7de6bd0783cb0c1dbe118d3e4a18af2f7 Mon Sep 17 00:00:00 2001
From: "Mathieu J. Poirier" <mathieu.poirier@linaro.org>
Date: Wed, 30 Mar 2011 09:44:04 -0600
Subject: Adding b2r2_blt_main.c to finish porting b2r2 portion of the video
 driver from .35 to .38

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
---
 drivers/video/b2r2/b2r2_blt_main.c        | 3280 +++++++++++++++++++++++++++++
 drivers/video/b2r2/b2r2_profiler_socket.c |    2 +-
 2 files changed, 3281 insertions(+), 1 deletion(-)
 create mode 100644 drivers/video/b2r2/b2r2_blt_main.c

diff --git a/drivers/video/b2r2/b2r2_blt_main.c b/drivers/video/b2r2/b2r2_blt_main.c
new file mode 100644
index 00000000000..1f5be3d0d95
--- /dev/null
+++ b/drivers/video/b2r2/b2r2_blt_main.c
@@ -0,0 +1,3280 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2010
+ *
+ * ST-Ericsson B2R2 Blitter module
+ *
+ * Author: Robert Fekete <robert.fekete@stericsson.com>
+ * Author: Paul Wannback
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/fs.h>
+#include <linux/file.h>
+#include <linux/poll.h>
+#include <linux/slab.h>
+#include <linux/device.h>
+#include <linux/miscdevice.h>
+#include <linux/list.h>
+#ifdef CONFIG_ANDROID_PMEM
+#include <linux/android_pmem.h>
+#endif
+#include <linux/fb.h>
+#include <linux/uaccess.h>
+#ifdef CONFIG_DEBUG_FS
+#include <linux/debugfs.h>
+#endif
+#include <asm/cacheflush.h>
+#include <linux/smp.h>
+#include <linux/dma-mapping.h>
+#include <linux/sched.h>
+#include <linux/err.h>
+#include <linux/hwmem.h>
+
+#include "b2r2_internal.h"
+#include "b2r2_node_split.h"
+#include "b2r2_generic.h"
+#include "b2r2_mem_alloc.h"
+#include "b2r2_profiler_socket.h"
+#include "b2r2_timing.h"
+#include "b2r2_debug.h"
+#include "b2r2_utils.h"
+#include "b2r2_input_validation.h"
+
+#define B2R2_HEAP_SIZE (4 * PAGE_SIZE)
+#define MAX_TMP_BUF_SIZE (128 * PAGE_SIZE)
+
+/*
+ * TODO:
+ * Implementation of query cap
+ * Support for user space virtual pointer to physically consecutive memory
+ * Support for user space virtual pointer to physically scattered memory
+ * Callback reads lagging behind in blt_api_stress app
+ * Store smaller items in the report list instead of the whole request
+ * Support read of many report records at once.
+ */
+
+/**
+ * b2r2_blt_dev - Our device, /dev/b2r2_blt
+ */
+static struct miscdevice *b2r2_blt_dev;
+
+static struct {
+	struct b2r2_work_buf buf;
+	bool in_use;
+} tmp_bufs[MAX_TMP_BUFS_NEEDED];
+
+/* Statistics */
+
+/**
+ * stat_lock - Spin lock protecting the statistics
+ */
+static struct mutex   stat_lock;
+/**
+ * stat_n_jobs_added - Number of jobs added to b2r2_core
+ */
+static unsigned long stat_n_jobs_added;
+/**
+ * stat_n_jobs_released - Number of jobs released (job_release called)
+ */
+static unsigned long stat_n_jobs_released;
+/**
+ * stat_n_jobs_in_report_list - Number of jobs currently in the report list
+ */
+static unsigned long stat_n_jobs_in_report_list;
+/**
+ * stat_n_in_blt - Number of client threads currently exec inside b2r2_blt()
+ */
+static unsigned long stat_n_in_blt;
+/**
+ * stat_n_in_blt_synch - Nunmber of client threads currently waiting for synch
+ */
+static unsigned long stat_n_in_blt_synch;
+/**
+ * stat_n_in_blt_add - Number of client threads currenlty adding in b2r2_blt
+ */
+static unsigned long stat_n_in_blt_add;
+/**
+ * stat_n_in_blt_wait - Number of client threads currently waiting in b2r2_blt
+ */
+static unsigned long stat_n_in_blt_wait;
+/**
+ * stat_n_in_sync_0 - Number of client threads currently in b2r2_blt_sync
+ *                    waiting for all client jobs to finish
+ */
+static unsigned long stat_n_in_synch_0;
+/**
+ * stat_n_in_sync_job - Number of client threads currently in b2r2_blt_sync
+ *                      waiting specific job to finish
+ */
+static unsigned long stat_n_in_synch_job;
+/**
+ * stat_n_in_query_cap - Number of clients currently in query cap
+ */
+static unsigned long stat_n_in_query_cap;
+/**
+ * stat_n_in_open - Number of clients currently in b2r2_blt_open
+ */
+static unsigned long stat_n_in_open;
+/**
+ * stat_n_in_release - Number of clients currently in b2r2_blt_release
+ */
+static unsigned long stat_n_in_release;
+
+/* Debug file system support */
+#ifdef CONFIG_DEBUG_FS
+/**
+ * debugfs_latest_request - Copy of the latest request issued
+ */
+struct b2r2_blt_request debugfs_latest_request;
+/**
+ * debugfs_root_dir - The debugfs root directory, i.e. /debugfs/b2r2
+ */
+static struct dentry *debugfs_root_dir;
+
+static int sprintf_req(struct b2r2_blt_request *request, char *buf, int size);
+#endif
+
+/* Local functions */
+static void inc_stat(unsigned long *stat);
+static void dec_stat(unsigned long *stat);
+static int b2r2_blt_synch(struct b2r2_blt_instance *instance,
+			int request_id);
+static int b2r2_blt_query_cap(struct b2r2_blt_instance *instance,
+			struct b2r2_blt_query_cap *query_cap);
+
+#ifndef CONFIG_B2R2_GENERIC_ONLY
+static int b2r2_blt(struct b2r2_blt_instance *instance,
+		struct b2r2_blt_request *request);
+
+static void job_callback(struct b2r2_core_job *job);
+static void job_release(struct b2r2_core_job *job);
+static int job_acquire_resources(struct b2r2_core_job *job, bool atomic);
+static void job_release_resources(struct b2r2_core_job *job, bool atomic);
+#endif
+
+#ifdef CONFIG_B2R2_GENERIC
+static int b2r2_generic_blt(struct b2r2_blt_instance *instance,
+		struct b2r2_blt_request *request);
+
+static void job_callback_gen(struct b2r2_core_job *job);
+static void job_release_gen(struct b2r2_core_job *job);
+static int job_acquire_resources_gen(struct b2r2_core_job *job, bool atomic);
+static void job_release_resources_gen(struct b2r2_core_job *job, bool atomic);
+static void tile_job_callback_gen(struct b2r2_core_job *job);
+static void tile_job_release_gen(struct b2r2_core_job *job);
+#endif
+
+
+static int resolve_buf(struct b2r2_blt_img *img,
+			struct b2r2_blt_rect *rect_2b_used,
+			bool is_dst,
+		struct b2r2_resolved_buf *resolved);
+static void unresolve_buf(struct b2r2_blt_buf *buf,
+			struct b2r2_resolved_buf *resolved);
+static void sync_buf(struct b2r2_blt_img *img,
+		struct b2r2_resolved_buf *resolved,
+		bool is_dst,
+		struct b2r2_blt_rect *rect);
+static bool is_report_list_empty(struct b2r2_blt_instance *instance);
+static bool is_synching(struct b2r2_blt_instance *instance);
+static void get_actual_dst_rect(struct b2r2_blt_req *req,
+					struct b2r2_blt_rect *actual_dst_rect);
+static void set_up_hwmem_region(struct b2r2_blt_img *img,
+		struct b2r2_blt_rect *rect, struct hwmem_region *region);
+static int resolve_hwmem(struct b2r2_blt_img *img,
+			struct b2r2_blt_rect *rect_2b_used, bool is_dst,
+				struct b2r2_resolved_buf *resolved_buf);
+static void unresolve_hwmem(struct b2r2_resolved_buf *resolved_buf);
+
+/**
+ * struct sync_args - Data for clean/flush
+ *
+ * @start: Virtual start address
+ * @end: Virtual end address
+ */
+struct sync_args {
+	unsigned long start;
+	unsigned long end;
+};
+/**
+ * flush_l1_cache_range_curr_cpu() - Cleans and invalidates L1 cache on the current CPU
+ *
+ * @arg: Pointer to sync_args structure
+ */
+static inline void flush_l1_cache_range_curr_cpu(void *arg)
+{
+	struct sync_args *sa = (struct sync_args *)arg;
+
+	dmac_flush_range((void *)sa->start, (void *)sa->end);
+}
+
+#ifdef CONFIG_SMP
+/**
+ * inv_l1_cache_range_all_cpus() - Cleans and invalidates L1 cache on all CPU:s
+ *
+ * @sa: Pointer to sync_args structure
+ */
+static void flush_l1_cache_range_all_cpus(struct sync_args *sa)
+{
+	on_each_cpu(flush_l1_cache_range_curr_cpu, sa, 1);
+}
+#endif
+
+/**
+ * clean_l1_cache_range_curr_cpu() - Cleans L1 cache on current CPU
+ *
+ * Ensures that data is written out from the CPU:s L1 cache,
+ * it will still be in the cache.
+ *
+ * @arg: Pointer to sync_args structure
+ */
+static inline void clean_l1_cache_range_curr_cpu(void *arg)
+{
+	struct sync_args *sa = (struct sync_args *)arg;
+
+	dmac_map_area((void *)sa->start,
+		(void *)sa->end - (void *)sa->start,
+		DMA_TO_DEVICE);
+}
+
+#ifdef CONFIG_SMP
+/**
+ * clean_l1_cache_range_all_cpus() - Cleans L1 cache on all CPU:s
+ *
+ * Ensures that data is written out from all CPU:s L1 cache,
+ * it will still be in the cache.
+ *
+ * @sa: Pointer to sync_args structure
+ */
+static void clean_l1_cache_range_all_cpus(struct sync_args *sa)
+{
+	on_each_cpu(clean_l1_cache_range_curr_cpu, sa, 1);
+}
+#endif
+
+/**
+ * b2r2_blt_open - Implements file open on the b2r2_blt device
+ *
+ * @inode: File system inode
+ * @filp: File pointer
+ *
+ * A B2R2 BLT instance is created and stored in the file structure.
+ */
+static int b2r2_blt_open(struct inode *inode, struct file *filp)
+{
+	int ret = 0;
+	struct b2r2_blt_instance *instance;
+
+	b2r2_log_info("%s\n", __func__);
+
+	inc_stat(&stat_n_in_open);
+
+	/* Allocate and initialize the instance */
+	instance = (struct b2r2_blt_instance *)
+		kmalloc(sizeof(*instance), GFP_KERNEL);
+	if (!instance) {
+		b2r2_log_err("%s: Failed to alloc\n", __func__);
+		goto instance_alloc_failed;
+	}
+	memset(instance, 0, sizeof(*instance));
+	INIT_LIST_HEAD(&instance->report_list);
+	mutex_init(&instance->lock);
+	init_waitqueue_head(&instance->report_list_waitq);
+	init_waitqueue_head(&instance->synch_done_waitq);
+
+	/*
+	 * Remember the instance so that we can retrieve it in
+	 * other functions
+	 */
+	filp->private_data = instance;
+	goto out;
+
+instance_alloc_failed:
+out:
+	dec_stat(&stat_n_in_open);
+
+	return ret;
+}
+
+/**
+ * b2r2_blt_release - Implements last close on an instance of
+ *                    the b2r2_blt device
+ *
+ * @inode: File system inode
+ * @filp: File pointer
+ *
+ * All active jobs are finished or cancelled and allocated data
+ * is released.
+ */
+static int b2r2_blt_release(struct inode *inode, struct file *filp)
+{
+	int ret;
+	struct b2r2_blt_instance *instance;
+
+	b2r2_log_info("%s\n", __func__);
+
+	inc_stat(&stat_n_in_release);
+
+	instance = (struct b2r2_blt_instance *) filp->private_data;
+
+	/* Finish all outstanding requests */
+	ret = b2r2_blt_synch(instance, 0);
+	if (ret < 0)
+		b2r2_log_warn(
+			"%s: b2r2_blt_sync failed with %d\n", __func__, ret);
+
+	/* Now cancel any remaining outstanding request */
+	if (instance->no_of_active_requests) {
+		struct b2r2_core_job *job;
+
+		b2r2_log_warn("%s: %d active requests\n",
+			__func__, instance->no_of_active_requests);
+
+		/* Find and cancel all jobs belonging to us */
+		job = b2r2_core_job_find_first_with_tag((int) instance);
+		while (job) {
+			b2r2_core_job_cancel(job);
+			/* This release matches addref in b2r2_core_job_find... */
+			b2r2_core_job_release(job, __func__);
+			job = b2r2_core_job_find_first_with_tag((int) instance);
+		}
+
+		b2r2_log_warn(
+			"%s: %d active requests after cancel\n",
+			__func__, instance->no_of_active_requests);
+	}
+
+	/* Release jobs in report list */
+	mutex_lock(&instance->lock);
+	while (!list_empty(&instance->report_list)) {
+		struct b2r2_blt_request *request = list_first_entry(
+			&instance->report_list,
+			struct b2r2_blt_request,
+			list);
+		list_del_init(&request->list);
+		mutex_unlock(&instance->lock);
+		/*
+		 * This release matches the addref when the job was put into
+		 * the report list
+		 */
+		b2r2_core_job_release(&request->job, __func__);
+		mutex_lock(&instance->lock);
+	}
+	mutex_unlock(&instance->lock);
+
+	/* Release our instance */
+	kfree(instance);
+
+	dec_stat(&stat_n_in_release);
+
+	return 0;
+}
+
+/**
+ * b2r2_blt_ioctl - This routine implements b2r2_blt ioctl interface
+ *
+ * @file: file pointer.
+ * @cmd	:ioctl command.
+ * @arg: input argument for ioctl.
+ *
+ * Returns 0 if OK else negative error code
+ */
+static long b2r2_blt_ioctl(struct file *file,
+		unsigned int cmd, unsigned long arg)
+{
+	int ret = 0;
+	struct b2r2_blt_instance *instance;
+
+	/** Process actual ioctl */
+
+	b2r2_log_info("%s\n", __func__);
+
+	/* Get the instance from the file structure */
+	instance = (struct b2r2_blt_instance *) file->private_data;
+
+	switch (cmd) {
+	case B2R2_BLT_IOC: {
+		/* This is the "blit" command */
+
+		/* arg is user pointer to struct b2r2_blt_request */
+		struct b2r2_blt_request *request =
+			kmalloc(sizeof(*request), GFP_KERNEL);
+		if (!request) {
+			b2r2_log_err("%s: Failed to alloc mem\n",
+				__func__);
+			return -ENOMEM;
+		}
+
+		/* Initialize the structure */
+		memset(request, 0, sizeof(*request));
+		INIT_LIST_HEAD(&request->list);
+		request->instance = instance;
+
+		/*
+		 * The user request is a sub structure of the
+		 * kernel request structure.
+		 */
+
+		/* Get the user data */
+		if (copy_from_user(&request->user_req, (void *)arg,
+				sizeof(request->user_req))) {
+			b2r2_log_err(
+				"%s: copy_from_user failed\n",
+				__func__);
+			kfree(request);
+			return -EFAULT;
+		}
+
+		if (!b2r2_validate_user_req(&request->user_req)) {
+			kfree(request);
+			return -EINVAL;
+		}
+
+		request->profile = is_profiler_registered_approx();
+
+		/*
+		 * If the user specified a color look-up table,
+		 * make a copy that the HW can use.
+		 */
+		if ((request->user_req.flags &
+				B2R2_BLT_FLAG_CLUT_COLOR_CORRECTION) != 0) {
+			request->clut = dma_alloc_coherent(b2r2_blt_device(),
+				CLUT_SIZE, &(request->clut_phys_addr),
+				GFP_DMA | GFP_KERNEL);
+			if (request->clut == NULL) {
+				b2r2_log_err("%s CLUT allocation failed.\n",
+					__func__);
+				kfree(request);
+				return -ENOMEM;
+			}
+
+			if (copy_from_user(request->clut,
+					request->user_req.clut, CLUT_SIZE)) {
+				b2r2_log_err("%s: CLUT copy_from_user failed\n",
+					__func__);
+				dma_free_coherent(b2r2_blt_device(), CLUT_SIZE,
+					request->clut, request->clut_phys_addr);
+				request->clut = NULL;
+				request->clut_phys_addr = 0;
+				kfree(request);
+				return -EFAULT;
+			}
+		}
+
+		/* Perform the blit */
+
+#ifdef CONFIG_B2R2_GENERIC_ONLY
+		/* Use the generic path for all operations */
+		ret = b2r2_generic_blt(instance, request);
+#else
+		/* Use the optimized path */
+		ret = b2r2_blt(instance, request);
+#endif
+
+#ifdef CONFIG_B2R2_GENERIC_FALLBACK
+		/* Fall back to generic path if operation was not supported */
+		if (ret == -ENOSYS) {
+			struct b2r2_blt_request *request_gen;
+			b2r2_log_info("b2r2_blt=%d Going generic.\n", ret);
+			request_gen = kmalloc(sizeof(*request_gen), GFP_KERNEL);
+			if (!request_gen) {
+				b2r2_log_err(
+					"%s: Failed to alloc mem for request_gen\n", __func__);
+				return -ENOMEM;
+			}
+
+			/* Initialize the structure */
+			memset(request_gen, 0, sizeof(*request_gen));
+			INIT_LIST_HEAD(&request_gen->list);
+			request_gen->instance = instance;
+
+			/*
+			 * The user request is a sub structure of the
+			 * kernel request structure.
+			 */
+
+			/* Get the user data */
+			if (copy_from_user(&request_gen->user_req, (void *)arg,
+				sizeof(request_gen->user_req))) {
+					b2r2_log_err(
+						"%s: copy_from_user failed\n",
+						__func__);
+					kfree(request_gen);
+					return -EFAULT;
+			}
+
+			/*
+			 * If the user specified a color look-up table,
+			 * make a copy that the HW can use.
+			 */
+			if ((request_gen->user_req.flags &
+					B2R2_BLT_FLAG_CLUT_COLOR_CORRECTION) != 0) {
+				request_gen->clut = dma_alloc_coherent(b2r2_blt_device(),
+					CLUT_SIZE, &(request_gen->clut_phys_addr),
+					GFP_DMA | GFP_KERNEL);
+				if (request_gen->clut == NULL) {
+					b2r2_log_err("%s CLUT allocation failed.\n", __func__);
+					kfree(request_gen);
+					return -ENOMEM;
+				}
+
+				if (copy_from_user(request_gen->clut, request_gen->user_req.clut, CLUT_SIZE)) {
+					b2r2_log_err("%s: CLUT copy_from_user failed\n", __func__);
+					dma_free_coherent(b2r2_blt_device(), CLUT_SIZE, request_gen->clut,
+						request_gen->clut_phys_addr);
+					request_gen->clut = NULL;
+					request_gen->clut_phys_addr = 0;
+					kfree(request_gen);
+					return -EFAULT;
+				}
+			}
+
+			request_gen->profile = is_profiler_registered_approx();
+
+			ret = b2r2_generic_blt(instance, request_gen);
+			b2r2_log_info("\nb2r2_generic_blt=%d Generic done.\n", ret);
+		}
+#endif /* CONFIG_B2R2_GENERIC_FALLBACK */
+
+		break;
+	}
+
+	case B2R2_BLT_SYNCH_IOC:
+		/* This is the "synch" command */
+
+		/* arg is request_id */
+		ret = b2r2_blt_synch(instance, (int) arg);
+		break;
+
+	case B2R2_BLT_QUERY_CAP_IOC:
+	{
+		/* This is the "query capabilities" command */
+
+		/* Arg is struct b2r2_blt_query_cap */
+		struct b2r2_blt_query_cap query_cap;
+
+		/* Get the user data */
+		if (copy_from_user(&query_cap, (void *)arg,
+				sizeof(query_cap))) {
+			b2r2_log_err(
+				"%s: copy_from_user failed\n",
+				__func__);
+			return -EFAULT;
+		}
+
+		/* Fill in our capabilities */
+		ret = b2r2_blt_query_cap(instance, &query_cap);
+
+		/* Return data to user */
+		if (copy_to_user((void *)arg, &query_cap,
+				sizeof(query_cap))) {
+			b2r2_log_err("%s: copy_to_user failed\n",
+				__func__);
+			return -EFAULT;
+		}
+		break;
+	}
+
+	default:
+		/* Unknown command */
+		b2r2_log_err(
+			"%s: Unknown cmd %d\n", __func__, cmd);
+		ret = -EINVAL;
+	break;
+
+	}
+
+	if (ret < 0)
+		b2r2_log_err("EC %d OK!\n", -ret);
+
+	return ret;
+}
+
+/**
+ * b2r2_blt_poll - Support for user-space poll, select & epoll.
+ *                 Used for user-space callback
+ *
+ * @filp: File to poll on
+ * @wait: Poll table to wait on
+ *
+ * This function checks if there are anything to read
+ */
+static unsigned b2r2_blt_poll(struct file *filp, poll_table *wait)
+{
+	struct b2r2_blt_instance *instance;
+	unsigned int mask = 0;
+
+	b2r2_log_info("%s\n", __func__);
+
+	/* Get the instance from the file structure */
+	instance = (struct b2r2_blt_instance *) filp->private_data;
+
+	poll_wait(filp, &instance->report_list_waitq, wait);
+	mutex_lock(&instance->lock);
+	if (!list_empty(&instance->report_list))
+		mask |= POLLIN | POLLRDNORM;
+	mutex_unlock(&instance->lock);
+
+	return mask;
+}
+
+/**
+ * b2r2_blt_read - Read report data, user for user-space callback
+ *
+ * @filp: File pointer
+ * @buf: User space buffer
+ * @count: Number of bytes to read
+ * @f_pos: File position
+ *
+ * Returns number of bytes read or negative error code
+ */
+static ssize_t b2r2_blt_read(struct file *filp, char __user *buf, size_t count,
+			loff_t *f_pos)
+{
+	int ret = 0;
+	struct b2r2_blt_instance *instance;
+	struct b2r2_blt_request *request;
+	struct b2r2_blt_report report;
+
+	b2r2_log_info("%s\n", __func__);
+
+	/* Get the instance from the file structure */
+	instance = (struct b2r2_blt_instance *) filp->private_data;
+
+	/*
+	 * We return only complete report records, one at a time.
+	 * Might be more efficient to support read of many.
+	 */
+	count = (count / sizeof(struct b2r2_blt_report)) *
+		sizeof(struct b2r2_blt_report);
+	if (count > sizeof(struct b2r2_blt_report))
+		count = sizeof(struct b2r2_blt_report);
+	if (count == 0)
+		return count;
+
+	/*
+	 * Loop and wait here until we have anything to return or
+	 * until interrupted
+	 */
+	mutex_lock(&instance->lock);
+	while (list_empty(&instance->report_list)) {
+		mutex_unlock(&instance->lock);
+
+		/* Return if non blocking read */
+		if (filp->f_flags & O_NONBLOCK)
+			return -EAGAIN;
+
+		b2r2_log_info("%s - Going to sleep\n", __func__);
+		if (wait_event_interruptible(
+			instance->report_list_waitq,
+			!is_report_list_empty(instance)))
+			/* signal: tell the fs layer to handle it */
+			return -ERESTARTSYS;
+
+		/* Otherwise loop, but first reaquire the lock */
+		mutex_lock(&instance->lock);
+	}
+
+	/* Ok, we have something to return */
+
+	/* Return */
+	request = NULL;
+	if (!list_empty(&instance->report_list))
+		request = list_first_entry(
+			&instance->report_list, struct b2r2_blt_request, list);
+
+	if (request) {
+		/* Remove from list to avoid reading twice */
+		list_del_init(&request->list);
+
+		report.request_id = request->request_id;
+		report.report1 = request->user_req.report1;
+		report.report2 = request->user_req.report2;
+		report.usec_elapsed = 0; /* TBD */
+
+		mutex_unlock(&instance->lock);
+		if (copy_to_user(buf,
+				&report,
+				sizeof(report)))
+			ret = -EFAULT;
+		mutex_lock(&instance->lock);
+
+		if (ret) {
+			/* copy to user failed, re-insert into list */
+			list_add(&request->list,
+				&request->instance->report_list);
+			request = NULL;
+		}
+	}
+	mutex_unlock(&instance->lock);
+
+	if (request)
+		/*
+		 * Release matching the addref when the job was put into
+		 * the report list
+		 */
+		b2r2_core_job_release(&request->job, __func__);
+
+	return count;
+}
+
+/**
+ * b2r2_blt_fops - File operations for b2r2_blt
+ */
+static const struct file_operations b2r2_blt_fops = {
+	.owner =          THIS_MODULE,
+	.open =           b2r2_blt_open,
+	.release =        b2r2_blt_release,
+	.unlocked_ioctl = b2r2_blt_ioctl,
+	.poll  =          b2r2_blt_poll,
+	.read  =          b2r2_blt_read,
+};
+
+/**
+ * b2r2_blt_misc_dev - Misc device config for b2r2_blt
+ */
+static struct miscdevice b2r2_blt_misc_dev = {
+	MISC_DYNAMIC_MINOR,
+	"b2r2_blt",
+	&b2r2_blt_fops
+};
+
+
+#ifndef CONFIG_B2R2_GENERIC_ONLY
+/**
+ * b2r2_blt - Implementation of the B2R2 blit request
+ *
+ * @instance: The B2R2 BLT instance
+ * @request; The request to perform
+ */
+static int b2r2_blt(struct b2r2_blt_instance *instance,
+		struct b2r2_blt_request *request)
+{
+	int ret = 0;
+	struct b2r2_blt_rect actual_dst_rect;
+	int request_id = 0;
+	struct b2r2_node *last_node = request->first_node;
+	int node_count;
+
+	u32 thread_runtime_at_start = 0;
+
+	if (request->profile) {
+		request->start_time_nsec = b2r2_get_curr_nsec();
+		thread_runtime_at_start = (u32)task_sched_runtime(current);
+	}
+
+	b2r2_log_info("%s\n", __func__);
+
+	inc_stat(&stat_n_in_blt);
+
+	/* Debug prints of incoming request */
+	b2r2_log_info(
+		"src.fmt=%#010x src.buf={%d,%d,%d} "
+		"src.w,h={%d,%d} src.rect={%d,%d,%d,%d}\n",
+		request->user_req.src_img.fmt,
+		request->user_req.src_img.buf.type,
+		request->user_req.src_img.buf.fd,
+		request->user_req.src_img.buf.offset,
+		request->user_req.src_img.width,
+		request->user_req.src_img.height,
+		request->user_req.src_rect.x,
+		request->user_req.src_rect.y,
+		request->user_req.src_rect.width,
+		request->user_req.src_rect.height);
+	b2r2_log_info(
+		"dst.fmt=%#010x dst.buf={%d,%d,%d} "
+		"dst.w,h={%d,%d} dst.rect={%d,%d,%d,%d}\n",
+		request->user_req.dst_img.fmt,
+		request->user_req.dst_img.buf.type,
+		request->user_req.dst_img.buf.fd,
+		request->user_req.dst_img.buf.offset,
+		request->user_req.dst_img.width,
+		request->user_req.dst_img.height,
+		request->user_req.dst_rect.x,
+		request->user_req.dst_rect.y,
+		request->user_req.dst_rect.width,
+		request->user_req.dst_rect.height);
+
+	inc_stat(&stat_n_in_blt_synch);
+
+	/* Wait here if synch is ongoing */
+	ret = wait_event_interruptible(instance->synch_done_waitq,
+				!is_synching(instance));
+	if (ret) {
+		b2r2_log_warn(
+			"%s: Sync wait interrupted, %d\n",
+			__func__, ret);
+		ret = -EAGAIN;
+		dec_stat(&stat_n_in_blt_synch);
+		goto synch_interrupted;
+	}
+
+	dec_stat(&stat_n_in_blt_synch);
+
+	/* Resolve the buffers */
+
+	/* Source buffer */
+	ret = resolve_buf(&request->user_req.src_img,
+		&request->user_req.src_rect, false, &request->src_resolved);
+	if (ret < 0) {
+		b2r2_log_warn(
+			"%s: Resolve src buf failed, %d\n",
+			__func__, ret);
+		ret = -EAGAIN;
+		goto resolve_src_buf_failed;
+	}
+
+	/* Source mask buffer */
+	ret = resolve_buf(&request->user_req.src_mask,
+			&request->user_req.src_rect, false,
+			&request->src_mask_resolved);
+	if (ret < 0) {
+		b2r2_log_warn(
+			"%s: Resolve src mask buf failed, %d\n",
+			__func__, ret);
+		ret = -EAGAIN;
+		goto resolve_src_mask_buf_failed;
+	}
+
+	/* Destination buffer */
+	get_actual_dst_rect(&request->user_req, &actual_dst_rect);
+	ret = resolve_buf(&request->user_req.dst_img, &actual_dst_rect,
+			true, &request->dst_resolved);
+	if (ret < 0) {
+		b2r2_log_warn(
+			"%s: Resolve dst buf failed, %d\n",
+			__func__, ret);
+		ret = -EAGAIN;
+		goto resolve_dst_buf_failed;
+	}
+
+	/* Debug prints of resolved buffers */
+	b2r2_log_info("src.rbuf={%X,%p,%d} {%p,%X,%X,%d}\n",
+		request->src_resolved.physical_address,
+		request->src_resolved.virtual_address,
+		request->src_resolved.is_pmem,
+		request->src_resolved.filep,
+		request->src_resolved.file_physical_start,
+		request->src_resolved.file_virtual_start,
+		request->src_resolved.file_len);
+
+	b2r2_log_info("dst.rbuf={%X,%p,%d} {%p,%X,%X,%d}\n",
+		request->dst_resolved.physical_address,
+		request->dst_resolved.virtual_address,
+		request->dst_resolved.is_pmem,
+		request->dst_resolved.filep,
+		request->dst_resolved.file_physical_start,
+		request->dst_resolved.file_virtual_start,
+		request->dst_resolved.file_len);
+
+	/* Calculate the number of nodes (and resources) needed for this job */
+	ret = b2r2_node_split_analyze(request, MAX_TMP_BUF_SIZE,
+			&node_count, &request->bufs, &request->buf_count,
+			&request->node_split_job);
+	if (ret == -ENOSYS) {
+		/* There was no optimized path for this request */
+		b2r2_log_info(
+			"%s: No optimized path for request\n", __func__);
+		goto no_optimized_path;
+
+	} else if (ret < 0) {
+		b2r2_log_warn(
+			"%s: Failed to analyze request, ret = %d\n",
+			__func__, ret);
+#ifdef CONFIG_DEBUG_FS
+		{
+			/* Failed, dump job to dmesg */
+			char *Buf = kmalloc(sizeof(char) * 4096, GFP_KERNEL);
+
+			b2r2_log_info(
+				"%s: Analyze failed for:\n", __func__);
+			if (Buf != NULL) {
+				sprintf_req(request, Buf, sizeof(char) * 4096);
+				b2r2_log_info("%s", Buf);
+				kfree(Buf);
+			} else {
+				b2r2_log_info("Unable to print the request. "
+					"Message buffer allocation failed.\n");
+			}
+		}
+#endif
+		goto generate_nodes_failed;
+	}
+
+	/* Allocate the nodes needed */
+#ifdef B2R2_USE_NODE_GEN
+	request->first_node = b2r2_blt_alloc_nodes(node_count);
+	if (request->first_node == NULL) {
+		b2r2_log_warn(
+			"%s: Failed to allocate nodes, ret = %d\n",
+			__func__, ret);
+		goto generate_nodes_failed;
+	}
+#else
+	ret = b2r2_node_alloc(node_count, &(request->first_node));
+	if (ret < 0 || request->first_node == NULL) {
+		b2r2_log_warn(
+			"%s: Failed to allocate nodes, ret = %d\n",
+			__func__, ret);
+		goto generate_nodes_failed;
+	}
+#endif
+
+	/* Build the B2R2 node list */
+	ret = b2r2_node_split_configure(&request->node_split_job,
+			request->first_node);
+
+	if (ret < 0) {
+		b2r2_log_warn(
+			"%s: Failed to perform node split, ret = %d\n",
+			__func__, ret);
+		goto generate_nodes_failed;
+	}
+
+	/* Exit here if dry run */
+	if (request->user_req.flags & B2R2_BLT_FLAG_DRY_RUN)
+		goto exit_dry_run;
+
+	/* Configure the request */
+	last_node = request->first_node;
+	while (last_node && last_node->next)
+		last_node = last_node->next;
+
+	request->job.tag = (int) instance;
+	request->job.prio = request->user_req.prio;
+	request->job.first_node_address =
+		request->first_node->physical_address;
+	request->job.last_node_address =
+		last_node->physical_address;
+	request->job.callback = job_callback;
+	request->job.release = job_release;
+	request->job.acquire_resources = job_acquire_resources;
+	request->job.release_resources = job_release_resources;
+
+	/* Synchronize memory occupied by the buffers */
+
+	/* Source buffer */
+	if (!(request->user_req.flags &
+				B2R2_BLT_FLAG_SRC_NO_CACHE_FLUSH) &&
+			(request->user_req.src_img.buf.type !=
+				B2R2_BLT_PTR_PHYSICAL) &&
+			!b2r2_is_mb_fmt(request->user_req.src_img.fmt))
+			/* MB formats are never touched by SW */
+		sync_buf(&request->user_req.src_img,
+			&request->src_resolved,
+			false, /*is_dst*/
+			&request->user_req.src_rect);
+
+	/* Source mask buffer */
+	if (!(request->user_req.flags &
+				B2R2_BLT_FLAG_SRC_MASK_NO_CACHE_FLUSH) &&
+			(request->user_req.src_mask.buf.type !=
+				B2R2_BLT_PTR_PHYSICAL) &&
+			!b2r2_is_mb_fmt(request->user_req.src_mask.fmt))
+			/* MB formats are never touched by SW */
+		sync_buf(&request->user_req.src_mask,
+			&request->src_mask_resolved,
+			false, /*is_dst*/
+			NULL);
+
+	/* Destination buffer */
+	if (!(request->user_req.flags &
+				B2R2_BLT_FLAG_DST_NO_CACHE_FLUSH) &&
+			(request->user_req.dst_img.buf.type !=
+				B2R2_BLT_PTR_PHYSICAL) &&
+			!b2r2_is_mb_fmt(request->user_req.dst_img.fmt))
+			/* MB formats are never touched by SW */
+		sync_buf(&request->user_req.dst_img,
+			&request->dst_resolved,
+			true, /*is_dst*/
+			&request->user_req.dst_rect);
+
+#ifdef CONFIG_DEBUG_FS
+	/* Remember latest request for debugfs */
+	debugfs_latest_request = *request;
+#endif
+
+	/* Submit the job */
+	b2r2_log_info("%s: Submitting job\n", __func__);
+
+	inc_stat(&stat_n_in_blt_add);
+
+	if (request->profile)
+		request->nsec_active_in_cpu =
+			(s32)((u32)task_sched_runtime(current) -
+					thread_runtime_at_start);
+
+	mutex_lock(&instance->lock);
+
+	/* Add the job to b2r2_core */
+	request_id = b2r2_core_job_add(&request->job);
+	request->request_id = request_id;
+
+	dec_stat(&stat_n_in_blt_add);
+
+	if (request_id < 0) {
+		b2r2_log_warn("%s: Failed to add job, ret = %d\n",
+			__func__, request_id);
+		ret = request_id;
+		mutex_unlock(&instance->lock);
+		goto job_add_failed;
+	}
+
+	inc_stat(&stat_n_jobs_added);
+
+	instance->no_of_active_requests++;
+	mutex_unlock(&instance->lock);
+
+	/* Wait for the job to be done if synchronous */
+	if ((request->user_req.flags & B2R2_BLT_FLAG_ASYNCH) == 0) {
+		b2r2_log_info("%s: Synchronous, waiting\n",
+			__func__);
+
+		inc_stat(&stat_n_in_blt_wait);
+
+		ret = b2r2_core_job_wait(&request->job);
+
+		dec_stat(&stat_n_in_blt_wait);
+
+		if (ret < 0 && ret != -ENOENT)
+			b2r2_log_warn(
+				"%s: Failed to wait job, ret = %d\n",
+				__func__, ret);
+		else
+			b2r2_log_info(
+				"%s: Synchronous wait done\n", __func__);
+		ret = 0;
+	}
+
+	/*
+	 * Release matching the addref in b2r2_core_job_add,
+	 * the request must not be accessed after this call
+	 */
+	b2r2_core_job_release(&request->job, __func__);
+
+	dec_stat(&stat_n_in_blt);
+
+	return ret >= 0 ? request_id : ret;
+
+job_add_failed:
+exit_dry_run:
+no_optimized_path:
+generate_nodes_failed:
+	unresolve_buf(&request->user_req.dst_img.buf,
+		&request->dst_resolved);
+resolve_dst_buf_failed:
+	unresolve_buf(&request->user_req.src_mask.buf,
+		&request->src_mask_resolved);
+resolve_src_mask_buf_failed:
+	unresolve_buf(&request->user_req.src_img.buf,
+		&request->src_resolved);
+resolve_src_buf_failed:
+synch_interrupted:
+	job_release(&request->job);
+	dec_stat(&stat_n_jobs_released);
+	if ((request->user_req.flags & B2R2_BLT_FLAG_DRY_RUN) == 0 || ret)
+		b2r2_log_warn(
+			"%s returns with error %d\n", __func__, ret);
+
+	dec_stat(&stat_n_in_blt);
+
+	return ret;
+}
+
+/**
+ * Called when job is done or cancelled
+ *
+ * @job: The job
+ */
+static void job_callback(struct b2r2_core_job *job)
+{
+	struct b2r2_blt_request *request =
+		container_of(job, struct b2r2_blt_request, job);
+
+	if (b2r2_blt_device())
+		b2r2_log_info("%s\n", __func__);
+
+	/* Local addref / release within this func */
+	b2r2_core_job_addref(job, __func__);
+
+	/* Unresolve the buffers */
+	unresolve_buf(&request->user_req.src_img.buf,
+		&request->src_resolved);
+	unresolve_buf(&request->user_req.src_mask.buf,
+		&request->src_mask_resolved);
+	unresolve_buf(&request->user_req.dst_img.buf,
+		&request->dst_resolved);
+
+	/* Move to report list if the job shall be reported */
+	/* FIXME: Use a smaller struct? */
+	mutex_lock(&request->instance->lock);
+	if (request->user_req.flags & B2R2_BLT_FLAG_REPORT_WHEN_DONE) {
+		/* Move job to report list */
+		list_add_tail(&request->list,
+			&request->instance->report_list);
+		inc_stat(&stat_n_jobs_in_report_list);
+
+		/* Wake up poll */
+		wake_up_interruptible(
+			&request->instance->report_list_waitq);
+
+		/* Add a reference because we put the job in the report list */
+		b2r2_core_job_addref(job, __func__);
+	}
+
+	/*
+	 * Decrease number of active requests and wake up
+	 * synching threads if active requests reaches zero
+	 */
+	BUG_ON(request->instance->no_of_active_requests == 0);
+	request->instance->no_of_active_requests--;
+	if (request->instance->synching &&
+	request->instance->no_of_active_requests == 0) {
+		request->instance->synching = false;
+		/* Wake up all syncing */
+
+		wake_up_interruptible_all(
+			&request->instance->synch_done_waitq);
+	}
+	mutex_unlock(&request->instance->lock);
+
+#ifdef CONFIG_DEBUG_FS
+	/* Dump job if cancelled */
+	if (job->job_state == B2R2_CORE_JOB_CANCELED) {
+		char *Buf = kmalloc(sizeof(char) * 4096, GFP_KERNEL);
+
+		b2r2_log_info("%s: Job cancelled:\n", __func__);
+		if (Buf != NULL) {
+			sprintf_req(request, Buf, sizeof(char) * 4096);
+			b2r2_log_info("%s", Buf);
+			kfree(Buf);
+		} else {
+			b2r2_log_info("Unable to print the request. "
+					"Message buffer allocation failed.\n");
+		}
+	}
+#endif
+
+	if (request->profile) {
+		request->total_time_nsec =
+			(s32)(b2r2_get_curr_nsec() - request->start_time_nsec);
+		b2r2_call_profiler_blt_done(request);
+	}
+
+	/* Local addref / release within this func */
+	b2r2_core_job_release(job, __func__);
+}
+
+/**
+ * Called when job should be released (free memory etc.)
+ *
+ * @job: The job
+ */
+static void job_release(struct b2r2_core_job *job)
+{
+	struct b2r2_blt_request *request =
+		container_of(job, struct b2r2_blt_request, job);
+
+	inc_stat(&stat_n_jobs_released);
+
+	b2r2_log_info("%s, first_node=%p, ref_count=%d\n",
+		__func__, request->first_node, request->job.ref_count);
+
+	b2r2_node_split_cancel(&request->node_split_job);
+
+	if (request->first_node) {
+		b2r2_debug_job_done(request->first_node);
+#ifdef B2R2_USE_NODE_GEN
+		b2r2_blt_free_nodes(request->first_node);
+#else
+		b2r2_node_free(request->first_node);
+#endif
+	}
+
+	/* Release memory for the request */
+	if (request->clut != NULL) {
+		dma_free_coherent(b2r2_blt_device(), CLUT_SIZE, request->clut,
+				request->clut_phys_addr);
+		request->clut = NULL;
+		request->clut_phys_addr = 0;
+	}
+	kfree(request);
+}
+
+/**
+ * Tells the job to try to allocate the resources needed to execute the job.
+ * Called just before execution of a job.
+ *
+ * @job: The job
+ * @atomic: true if called from atomic (i.e. interrupt) context. If function
+ *          can't allocate in atomic context it should return error, it
+ *          will then be called later from non-atomic context.
+ */
+static int job_acquire_resources(struct b2r2_core_job *job, bool atomic)
+{
+	struct b2r2_blt_request *request =
+		container_of(job, struct b2r2_blt_request, job);
+	int ret;
+	int i;
+
+	b2r2_log_info("%s\n", __func__);
+
+	if (request->buf_count == 0)
+		return 0;
+
+	if (request->buf_count > MAX_TMP_BUFS_NEEDED) {
+		b2r2_log_err("%s: request->buf_count > MAX_TMP_BUFS_NEEDED\n",
+								__func__);
+		return -ENOMSG;
+	}
+
+	/*
+	 * 1 to 1 mapping between request temp buffers and temp buffers
+	 * (request temp buf 0 is always temp buf 0, request temp buf 1 is
+	 * always temp buf 1 and so on) to avoid starvation of jobs that
+	 * require multiple temp buffers. Not optimal in terms of memory
+	 * usage but we avoid get into a situation where lower prio jobs can
+	 * delay higher prio jobs that require more temp buffers.
+	 */
+	if (tmp_bufs[0].in_use)
+		return -EAGAIN;
+
+	for (i = 0; i < request->buf_count; i++) {
+		if (tmp_bufs[i].buf.size < request->bufs[i].size) {
+			b2r2_log_err("%s: tmp_bufs[i].buf.size < "
+					"request->bufs[i].size\n",
+								__func__);
+			ret = -ENOMSG;
+			goto error;
+		}
+
+		tmp_bufs[i].in_use = true;
+		request->bufs[i].phys_addr = tmp_bufs[i].buf.phys_addr;
+		request->bufs[i].virt_addr = tmp_bufs[i].buf.virt_addr;
+
+		b2r2_log_info("%s: phys=%p, virt=%p\n",
+			__func__, (void *)request->bufs[i].phys_addr,
+			request->bufs[i].virt_addr);
+
+		ret = b2r2_node_split_assign_buffers(&request->node_split_job,
+					request->first_node, request->bufs,
+					request->buf_count);
+		if (ret < 0)
+			goto error;
+	}
+
+	return 0;
+
+error:
+	for (i = 0; i < request->buf_count; i++)
+		tmp_bufs[i].in_use = false;
+
+	return ret;
+}
+
+/**
+ * Tells the job to free the resources needed to execute the job.
+ * Called after execution of a job.
+ *
+ * @job: The job
+ * @atomic: true if called from atomic (i.e. interrupt) context. If function
+ *          can't allocate in atomic context it should return error, it
+ *          will then be called later from non-atomic context.
+ */
+static void job_release_resources(struct b2r2_core_job *job, bool atomic)
+{
+	struct b2r2_blt_request *request =
+		container_of(job, struct b2r2_blt_request, job);
+	int i;
+
+	b2r2_log_info("%s\n", __func__);
+
+	/* Free any temporary buffers */
+	for (i = 0; i < request->buf_count; i++) {
+
+		b2r2_log_info("%s: freeing %d bytes\n",
+			__func__, request->bufs[i].size);
+		tmp_bufs[i].in_use = false;
+		memset(&request->bufs[i], 0, sizeof(request->bufs[i]));
+	}
+	request->buf_count = 0;
+
+	/*
+	 * Early release of nodes
+	 * FIXME: If nodes are to be reused we don't want to release here
+	 */
+	if (!atomic && request->first_node) {
+		b2r2_debug_job_done(request->first_node);
+
+#ifdef B2R2_USE_NODE_GEN
+		b2r2_blt_free_nodes(request->first_node);
+#else
+		b2r2_node_free(request->first_node);
+#endif
+		request->first_node = NULL;
+	}
+}
+
+#endif /* !CONFIG_B2R2_GENERIC_ONLY */
+
+#ifdef CONFIG_B2R2_GENERIC
+/**
+ * Called when job for one tile is done or cancelled
+ * in the generic path.
+ *
+ * @job: The job
+ */
+static void tile_job_callback_gen(struct b2r2_core_job *job)
+{
+	if (b2r2_blt_device())
+		b2r2_log_info("%s\n", __func__);
+
+	/* Local addref / release within this func */
+	b2r2_core_job_addref(job, __func__);
+
+#ifdef CONFIG_DEBUG_FS
+	/* Notify if a tile job is cancelled */
+	if (job->job_state == B2R2_CORE_JOB_CANCELED) {
+		b2r2_log_info("%s: Tile job cancelled:\n", __func__);
+	}
+#endif
+
+	/* Local addref / release within this func */
+	b2r2_core_job_release(job, __func__);
+}
+
+/**
+ * Called when job is done or cancelled.
+ * Used for the last tile in the generic path
+ * to notify waiting clients.
+ *
+ * @job: The job
+ */
+static void job_callback_gen(struct b2r2_core_job *job)
+{
+	struct b2r2_blt_request *request =
+		container_of(job, struct b2r2_blt_request, job);
+
+	if (b2r2_blt_device())
+		b2r2_log_info("%s\n", __func__);
+
+	/* Local addref / release within this func */
+	b2r2_core_job_addref(job, __func__);
+
+	/* Move to report list if the job shall be reported */
+	/* FIXME: Use a smaller struct? */
+	mutex_lock(&request->instance->lock);
+
+	if (request->user_req.flags & B2R2_BLT_FLAG_REPORT_WHEN_DONE) {
+		/* Move job to report list */
+		list_add_tail(&request->list,
+			&request->instance->report_list);
+		inc_stat(&stat_n_jobs_in_report_list);
+
+		/* Wake up poll */
+		wake_up_interruptible(
+			&request->instance->report_list_waitq);
+
+		/*
+		 * Add a reference because we put the
+		 * job in the report list
+		 */
+		b2r2_core_job_addref(job, __func__);
+	}
+
+	/*
+	 * Decrease number of active requests and wake up
+	 * synching threads if active requests reaches zero
+	 */
+	BUG_ON(request->instance->no_of_active_requests == 0);
+	request->instance->no_of_active_requests--;
+	if (request->instance->synching &&
+	request->instance->no_of_active_requests == 0) {
+		request->instance->synching = false;
+		/* Wake up all syncing */
+
+		wake_up_interruptible_all(
+			&request->instance->synch_done_waitq);
+	}
+	mutex_unlock(&request->instance->lock);
+
+#ifdef CONFIG_DEBUG_FS
+	/* Dump job if cancelled */
+	if (job->job_state == B2R2_CORE_JOB_CANCELED) {
+		char *Buf = kmalloc(sizeof(char) * 4096, GFP_KERNEL);
+
+		b2r2_log_info("%s: Job cancelled:\n", __func__);
+		if (Buf != NULL) {
+			sprintf_req(request, Buf, sizeof(char) * 4096);
+			b2r2_log_info("%s", Buf);
+			kfree(Buf);
+		} else {
+			b2r2_log_info("Unable to print the request. "
+					"Message buffer allocation failed.\n");
+		}
+	}
+#endif
+
+	/* Local addref / release within this func */
+	b2r2_core_job_release(job, __func__);
+}
+
+/**
+ * Called when tile job should be released (free memory etc.)
+ * Should be used only for tile jobs. Tile jobs should only be used
+ * by b2r2_core, thus making ref_count trigger their release.
+ *
+ * @job: The job
+ */
+
+static void tile_job_release_gen(struct b2r2_core_job *job)
+{
+	inc_stat(&stat_n_jobs_released);
+
+	b2r2_log_info("%s, first_node_address=0x%.8x, ref_count=%d\n",
+		__func__, job->first_node_address, job->ref_count);
+
+	/* Release memory for the job */
+	kfree(job);
+}
+
+/**
+ * Called when job should be released (free memory etc.)
+ *
+ * @job: The job
+ */
+
+static void job_release_gen(struct b2r2_core_job *job)
+{
+	struct b2r2_blt_request *request =
+		container_of(job, struct b2r2_blt_request, job);
+
+	inc_stat(&stat_n_jobs_released);
+
+	b2r2_log_info("%s, first_node=%p, ref_count=%d\n",
+		__func__, request->first_node, request->job.ref_count);
+
+	if (request->first_node) {
+		b2r2_debug_job_done(request->first_node);
+
+		/* Free nodes */
+#ifdef B2R2_USE_NODE_GEN
+		b2r2_blt_free_nodes(request->first_node);
+#else
+		b2r2_node_free(request->first_node);
+#endif
+	}
+
+	/* Release memory for the request */
+	if (request->clut != NULL) {
+		dma_free_coherent(b2r2_blt_device(), CLUT_SIZE, request->clut,
+				request->clut_phys_addr);
+		request->clut = NULL;
+		request->clut_phys_addr = 0;
+	}
+	kfree(request);
+}
+
+static int job_acquire_resources_gen(struct b2r2_core_job *job, bool atomic)
+{
+	/* Nothing so far. Temporary buffers are pre-allocated */
+	return 0;
+}
+static void job_release_resources_gen(struct b2r2_core_job *job, bool atomic)
+{
+	/* Nothing so far. Temporary buffers are pre-allocated */
+}
+
+/**
+ * b2r2_generic_blt - Generic implementation of the B2R2 blit request
+ *
+ * @instance: The B2R2 BLT instance
+ * @request; The request to perform
+ */
+static int b2r2_generic_blt(struct b2r2_blt_instance *instance,
+		struct b2r2_blt_request *request)
+{
+	int ret = 0;
+	struct b2r2_blt_rect actual_dst_rect;
+	int request_id = 0;
+	struct b2r2_node *last_node = request->first_node;
+	int node_count;
+	s32 tmp_buf_width = 0;
+	s32 tmp_buf_height = 0;
+	u32 tmp_buf_count = 0;
+	s32 x;
+	s32 y;
+	const struct b2r2_blt_rect *dst_rect = &(request->user_req.dst_rect);
+	const s32 dst_img_width = request->user_req.dst_img.width;
+	const s32 dst_img_height = request->user_req.dst_img.height;
+	const enum b2r2_blt_flag flags = request->user_req.flags;
+	/* Descriptors for the temporary buffers */
+	struct b2r2_work_buf work_bufs[4];
+	struct b2r2_blt_rect dst_rect_tile;
+	int i;
+
+	u32 thread_runtime_at_start = 0;
+	s32 nsec_active_in_b2r2 = 0;
+
+	/*
+	 * Early exit if zero blt.
+	 * dst_rect outside of dst_img or
+	 * dst_clip_rect outside of dst_img.
+	 */
+	if (dst_rect->x + dst_rect->width <= 0 ||
+			dst_rect->y + dst_rect->height <= 0 ||
+			dst_img_width <= dst_rect->x ||
+			dst_img_height <= dst_rect->y ||
+			((flags & B2R2_BLT_FLAG_DESTINATION_CLIP) != 0 &&
+			(dst_img_width <= request->user_req.dst_clip_rect.x ||
+			dst_img_height <= request->user_req.dst_clip_rect.y ||
+			request->user_req.dst_clip_rect.x +
+			request->user_req.dst_clip_rect.width <= 0 ||
+			request->user_req.dst_clip_rect.y +
+			request->user_req.dst_clip_rect.height <= 0))) {
+		goto zero_blt;
+	}
+
+	if (request->profile) {
+		request->start_time_nsec = b2r2_get_curr_nsec();
+		thread_runtime_at_start = (u32)task_sched_runtime(current);
+	}
+
+	memset(work_bufs, 0, sizeof(work_bufs));
+
+	b2r2_log_info("%s\n", __func__);
+
+	inc_stat(&stat_n_in_blt);
+
+	/* Debug prints of incoming request */
+	b2r2_log_info(
+		"src.fmt=%#010x flags=0x%.8x src.buf={%d,%d,0x%.8x}\n"
+		"src.w,h={%d,%d} src.rect={%d,%d,%d,%d}\n",
+		request->user_req.src_img.fmt,
+		request->user_req.flags,
+		request->user_req.src_img.buf.type,
+		request->user_req.src_img.buf.fd,
+		request->user_req.src_img.buf.offset,
+		request->user_req.src_img.width,
+		request->user_req.src_img.height,
+		request->user_req.src_rect.x,
+		request->user_req.src_rect.y,
+		request->user_req.src_rect.width,
+		request->user_req.src_rect.height);
+	b2r2_log_info(
+		"dst.fmt=%#010x dst.buf={%d,%d,0x%.8x}\n"
+		"dst.w,h={%d,%d} dst.rect={%d,%d,%d,%d}\n"
+		"dst_clip_rect={%d,%d,%d,%d}\n",
+		request->user_req.dst_img.fmt,
+		request->user_req.dst_img.buf.type,
+		request->user_req.dst_img.buf.fd,
+		request->user_req.dst_img.buf.offset,
+		request->user_req.dst_img.width,
+		request->user_req.dst_img.height,
+		request->user_req.dst_rect.x,
+		request->user_req.dst_rect.y,
+		request->user_req.dst_rect.width,
+		request->user_req.dst_rect.height,
+		request->user_req.dst_clip_rect.x,
+		request->user_req.dst_clip_rect.y,
+		request->user_req.dst_clip_rect.width,
+		request->user_req.dst_clip_rect.height);
+
+	inc_stat(&stat_n_in_blt_synch);
+
+	/* Wait here if synch is ongoing */
+	ret = wait_event_interruptible(instance->synch_done_waitq,
+				!is_synching(instance));
+	if (ret) {
+		b2r2_log_warn(
+			"%s: Sync wait interrupted, %d\n",
+			__func__, ret);
+		ret = -EAGAIN;
+		dec_stat(&stat_n_in_blt_synch);
+		goto synch_interrupted;
+	}
+
+	dec_stat(&stat_n_in_blt_synch);
+
+	/* Resolve the buffers */
+
+	/* Source buffer */
+	ret = resolve_buf(&request->user_req.src_img,
+		&request->user_req.src_rect, false, &request->src_resolved);
+	if (ret < 0) {
+		b2r2_log_warn(
+			"%s: Resolve src buf failed, %d\n",
+			__func__, ret);
+		ret = -EAGAIN;
+		goto resolve_src_buf_failed;
+	}
+
+	/* Source mask buffer */
+	ret = resolve_buf(&request->user_req.src_mask,
+					&request->user_req.src_rect, false,
+						&request->src_mask_resolved);
+	if (ret < 0) {
+		b2r2_log_warn(
+			"%s: Resolve src mask buf failed, %d\n",
+			__func__, ret);
+		ret = -EAGAIN;
+		goto resolve_src_mask_buf_failed;
+	}
+
+	/* Destination buffer */
+	get_actual_dst_rect(&request->user_req, &actual_dst_rect);
+	ret = resolve_buf(&request->user_req.dst_img, &actual_dst_rect,
+						true, &request->dst_resolved);
+	if (ret < 0) {
+		b2r2_log_warn(
+			"%s: Resolve dst buf failed, %d\n",
+			__func__, ret);
+		ret = -EAGAIN;
+		goto resolve_dst_buf_failed;
+	}
+
+	/* Debug prints of resolved buffers */
+	b2r2_log_info("src.rbuf={%X,%p,%d} {%p,%X,%X,%d}\n",
+		request->src_resolved.physical_address,
+		request->src_resolved.virtual_address,
+		request->src_resolved.is_pmem,
+		request->src_resolved.filep,
+		request->src_resolved.file_physical_start,
+		request->src_resolved.file_virtual_start,
+		request->src_resolved.file_len);
+
+	b2r2_log_info("dst.rbuf={%X,%p,%d} {%p,%X,%X,%d}\n",
+		request->dst_resolved.physical_address,
+		request->dst_resolved.virtual_address,
+		request->dst_resolved.is_pmem,
+		request->dst_resolved.filep,
+		request->dst_resolved.file_physical_start,
+		request->dst_resolved.file_virtual_start,
+		request->dst_resolved.file_len);
+
+	/* Calculate the number of nodes (and resources) needed for this job */
+	ret = b2r2_generic_analyze(request, &tmp_buf_width,
+			&tmp_buf_height, &tmp_buf_count, &node_count);
+	if (ret < 0) {
+		b2r2_log_warn(
+			"%s: Failed to analyze request, ret = %d\n",
+			__func__, ret);
+#ifdef CONFIG_DEBUG_FS
+		{
+			/* Failed, dump job to dmesg */
+			char *Buf = kmalloc(sizeof(char) * 4096, GFP_KERNEL);
+
+			b2r2_log_info(
+				"%s: Analyze failed for:\n", __func__);
+			if (Buf != NULL) {
+				sprintf_req(request, Buf, sizeof(char) * 4096);
+				b2r2_log_info("%s", Buf);
+				kfree(Buf);
+			} else {
+				b2r2_log_info("Unable to print the request. "
+					"Message buffer allocation failed.\n");
+			}
+		}
+#endif
+		goto generate_nodes_failed;
+	}
+
+	/* Allocate the nodes needed */
+#ifdef B2R2_USE_NODE_GEN
+	request->first_node = b2r2_blt_alloc_nodes(node_count);
+	if (request->first_node == NULL) {
+		b2r2_log_warn(
+			"%s: Failed to allocate nodes, ret = %d\n",
+			__func__, ret);
+		goto generate_nodes_failed;
+	}
+#else
+	ret = b2r2_node_alloc(node_count, &(request->first_node));
+	if (ret < 0 || request->first_node == NULL) {
+		b2r2_log_warn(
+			"%s: Failed to allocate nodes, ret = %d\n",
+			__func__, ret);
+		goto generate_nodes_failed;
+	}
+#endif
+
+	/* Allocate the temporary buffers */
+	for (i = 0; i < tmp_buf_count; i++) {
+		void *virt;
+		work_bufs[i].size = tmp_buf_width * tmp_buf_height * 4;
+
+		virt = dma_alloc_coherent(b2r2_blt_device(),
+				work_bufs[i].size,
+				&(work_bufs[i].phys_addr),
+				GFP_DMA | GFP_KERNEL);
+		if (virt == NULL) {
+			ret = -ENOMEM;
+			goto alloc_work_bufs_failed;
+		}
+
+		work_bufs[i].virt_addr = virt;
+		memset(work_bufs[i].virt_addr, 0xff, work_bufs[i].size);
+	}
+	ret = b2r2_generic_configure(request,
+			request->first_node, &work_bufs[0], tmp_buf_count);
+
+	if (ret < 0) {
+		b2r2_log_warn(
+			"%s: Failed to perform generic configure, ret = %d\n",
+			__func__, ret);
+		goto generic_conf_failed;
+	}
+
+	/* Exit here if dry run */
+	if (flags & B2R2_BLT_FLAG_DRY_RUN)
+		goto exit_dry_run;
+
+	/*
+	 * Configure the request and make sure
+	 * that its job is run only for the LAST tile.
+	 * This is when the request is complete
+	 * and waiting clients should be notified.
+	 */
+	last_node = request->first_node;
+	while (last_node && last_node->next)
+		last_node = last_node->next;
+
+	request->job.tag = (int) instance;
+	request->job.prio = request->user_req.prio;
+	request->job.first_node_address =
+		request->first_node->physical_address;
+	request->job.last_node_address =
+		last_node->physical_address;
+	request->job.callback = job_callback_gen;
+	request->job.release = job_release_gen;
+	/* Work buffers and nodes are pre-allocated */
+	request->job.acquire_resources = job_acquire_resources_gen;
+	request->job.release_resources = job_release_resources_gen;
+
+	/* Flush the L1/L2 cache for the buffers */
+
+	/* Source buffer */
+	if (!(flags & B2R2_BLT_FLAG_SRC_NO_CACHE_FLUSH) &&
+			(request->user_req.src_img.buf.type !=
+				B2R2_BLT_PTR_PHYSICAL) &&
+			!b2r2_is_mb_fmt(request->user_req.src_img.fmt))
+			/* MB formats are never touched by SW */
+		sync_buf(&request->user_req.src_img,
+			&request->src_resolved,
+			false, /*is_dst*/
+			&request->user_req.src_rect);
+
+	/* Source mask buffer */
+	if (!(flags & B2R2_BLT_FLAG_SRC_MASK_NO_CACHE_FLUSH) &&
+			(request->user_req.src_mask.buf.type !=
+				B2R2_BLT_PTR_PHYSICAL) &&
+			!b2r2_is_mb_fmt(request->user_req.src_mask.fmt))
+			/* MB formats are never touched by SW */
+		sync_buf(&request->user_req.src_mask,
+			&request->src_mask_resolved,
+			false, /*is_dst*/
+			NULL);
+
+	/* Destination buffer */
+	if (!(flags & B2R2_BLT_FLAG_DST_NO_CACHE_FLUSH) &&
+			(request->user_req.dst_img.buf.type !=
+				B2R2_BLT_PTR_PHYSICAL) &&
+			!b2r2_is_mb_fmt(request->user_req.dst_img.fmt))
+			/* MB formats are never touched by SW */
+		sync_buf(&request->user_req.dst_img,
+			&request->dst_resolved,
+			true, /*is_dst*/
+			&request->user_req.dst_rect);
+
+#ifdef CONFIG_DEBUG_FS
+	/* Remember latest request */
+	debugfs_latest_request = *request;
+#endif
+
+	/*
+	 * Same nodes are reused for all the jobs needed to complete the blit.
+	 * Nodes are NOT released together with associated job,
+	 * as is the case with optimized b2r2_blt() path.
+	 */
+	mutex_lock(&instance->lock);
+	instance->no_of_active_requests++;
+	mutex_unlock(&instance->lock);
+	/*
+	 * Process all but the last row in the destination rectangle.
+	 * Consider only the tiles that will actually end up inside
+	 * the destination image.
+	 * dst_rect->height - tmp_buf_height being <=0 is allright.
+	 * The loop will not be entered since y will always be equal to or
+	 * greater than zero.
+	 * Early exit check at the beginning handles the cases when nothing
+	 * at all should be processed.
+	 */
+	y = 0;
+	if (dst_rect->y < 0)
+		y = -dst_rect->y;
+
+	for (; y < dst_rect->height - tmp_buf_height &&
+			y + dst_rect->y < dst_img_height - tmp_buf_height;
+			y += tmp_buf_height) {
+		/* Tile in the destination rectangle being processed */
+		struct b2r2_blt_rect dst_rect_tile;
+		dst_rect_tile.y = y;
+		dst_rect_tile.width = tmp_buf_width;
+		dst_rect_tile.height = tmp_buf_height;
+
+		x = 0;
+		if (dst_rect->x < 0)
+			x = -dst_rect->x;
+
+		for (; x < dst_rect->width &&
+				x + dst_rect->x < dst_img_width; x += tmp_buf_width) {
+			/*
+			 * Tile jobs are freed by the supplied release function
+			 * when ref_count on a tile_job reaches zero.
+			 */
+			struct b2r2_core_job *tile_job = kmalloc(sizeof(*tile_job), GFP_KERNEL);
+			if (tile_job == NULL) {
+				/*
+				 * Skip this tile. Do not abort, just hope for better luck
+				 * with rest of the tiles. Memory might become available.
+				 */
+				b2r2_log_info("%s: Failed to alloc job. "
+					"Skipping tile at (x, y)=(%d, %d)\n", __func__, x, y);
+				continue;
+			}
+			tile_job->tag = request->job.tag;
+			tile_job->prio = request->job.prio;
+			tile_job->first_node_address =
+					request->job.first_node_address;
+			tile_job->last_node_address =
+					request->job.last_node_address;
+			tile_job->callback = tile_job_callback_gen;
+			tile_job->release = tile_job_release_gen;
+			/* Work buffers and nodes are pre-allocated */
+			tile_job->acquire_resources = job_acquire_resources_gen;
+			tile_job->release_resources = job_release_resources_gen;
+
+			dst_rect_tile.x = x;
+			if (x + dst_rect->x + tmp_buf_width > dst_img_width) {
+				/*
+				 * Only a part of the tile can be written.
+				 * Limit imposed by buffer size.
+				 */
+				dst_rect_tile.width = dst_img_width - (x + dst_rect->x);
+			} else if (x + tmp_buf_width > dst_rect->width) {
+				/*
+				 * Only a part of the tile can be written.
+				 * In this case limit imposed by dst_rect size.
+				 */
+				dst_rect_tile.width = dst_rect->width - x;
+			} else {
+				/* Whole tile can be written. */
+				dst_rect_tile.width = tmp_buf_width;
+			}
+			/*
+			 * Where applicable, calculate area in src buffer that is needed
+			 * to generate the specified part of destination rectangle.
+			 */
+			b2r2_generic_set_areas(request, request->first_node, &dst_rect_tile);
+			/* Submit the job */
+			b2r2_log_info("%s: Submitting job\n", __func__);
+
+			inc_stat(&stat_n_in_blt_add);
+
+			mutex_lock(&instance->lock);
+
+			request_id = b2r2_core_job_add(tile_job);
+
+			dec_stat(&stat_n_in_blt_add);
+
+			if (request_id < 0) {
+				b2r2_log_warn("%s: "
+					"Failed to add tile job, ret = %d\n",
+					__func__, request_id);
+				ret = request_id;
+				mutex_unlock(&instance->lock);
+				goto job_add_failed;
+			}
+
+			inc_stat(&stat_n_jobs_added);
+
+			mutex_unlock(&instance->lock);
+
+			/* Wait for the job to be done */
+			b2r2_log_info("%s: Synchronous, waiting\n",
+				__func__);
+
+			inc_stat(&stat_n_in_blt_wait);
+
+			ret = b2r2_core_job_wait(tile_job);
+
+			dec_stat(&stat_n_in_blt_wait);
+
+			if (ret < 0 && ret != -ENOENT)
+				b2r2_log_warn(
+					"%s: Failed to wait job, ret = %d\n",
+					__func__, ret);
+			else {
+				b2r2_log_info(
+					"%s: Synchronous wait done\n",
+					__func__);
+
+				nsec_active_in_b2r2 +=
+					tile_job->nsec_active_in_hw;
+			}
+			/* Release matching the addref in b2r2_core_job_add */
+			b2r2_core_job_release(tile_job, __func__);
+		}
+	}
+
+	x = 0;
+	if (dst_rect->x < 0)
+		x = -dst_rect->x;
+
+	for (; x < dst_rect->width &&
+			x + dst_rect->x < dst_img_width; x += tmp_buf_width) {
+		struct b2r2_core_job *tile_job = NULL;
+		if (x + tmp_buf_width < dst_rect->width &&
+				x + dst_rect->x + tmp_buf_width < dst_img_width) {
+			/*
+			 * Tile jobs are freed by the supplied release function
+			 * when ref_count on a tile_job reaches zero.
+			 * Do NOT allocate a tile_job for the last tile.
+			 * Send the job from the request. This way clients
+			 * will be notified when the whole blit is complete
+			 * and not just part of it.
+			 */
+			tile_job = kmalloc(sizeof(*tile_job), GFP_KERNEL);
+			if (tile_job == NULL) {
+				b2r2_log_info("%s: Failed to alloc job. "
+					"Skipping tile at (x, y)=(%d, %d)\n",
+					__func__, x, y);
+				continue;
+			}
+			tile_job->tag = request->job.tag;
+			tile_job->prio = request->job.prio;
+			tile_job->first_node_address =
+				request->job.first_node_address;
+			tile_job->last_node_address =
+				request->job.last_node_address;
+			tile_job->callback = tile_job_callback_gen;
+			tile_job->release = tile_job_release_gen;
+			tile_job->acquire_resources = job_acquire_resources_gen;
+			tile_job->release_resources = job_release_resources_gen;
+		}
+
+		dst_rect_tile.x = x;
+		if (x + dst_rect->x + tmp_buf_width > dst_img_width) {
+			/*
+			 * Only a part of the tile can be written.
+			 * Limit imposed by buffer size.
+			 */
+			dst_rect_tile.width = dst_img_width - (x + dst_rect->x);
+		} else if (x + tmp_buf_width > dst_rect->width) {
+			/*
+			 * Only a part of the tile can be written.
+			 * In this case limit imposed by dst_rect size.
+			 */
+			dst_rect_tile.width = dst_rect->width - x;
+		} else {
+			/* Whole tile can be written. */
+			dst_rect_tile.width = tmp_buf_width;
+		}
+		/*
+		 * y is now the last row. Either because the whole dst_rect
+		 * has been processed, or because the last row that will be written
+		 * to dst_img has been reached. Limits imposed in the same way
+		 * as for width.
+		 */
+		dst_rect_tile.y = y;
+		if (y + dst_rect->y + tmp_buf_height > dst_img_height)
+			dst_rect_tile.height = dst_img_height - (y + dst_rect->y);
+		else if (y + tmp_buf_height > dst_rect->height)
+			dst_rect_tile.height = dst_rect->height - y;
+		else
+			dst_rect_tile.height = tmp_buf_height;
+
+		b2r2_generic_set_areas(request, request->first_node, &dst_rect_tile);
+
+		b2r2_log_info("%s: Submitting job\n", __func__);
+		inc_stat(&stat_n_in_blt_add);
+
+		mutex_lock(&instance->lock);
+		if (x + tmp_buf_width < dst_rect->width &&
+				x + dst_rect->x + tmp_buf_width < dst_img_width) {
+			request_id = b2r2_core_job_add(tile_job);
+		} else {
+			/*
+			 * Last tile. Send the job-struct from the request.
+			 * Clients will be notified once it completes.
+			 */
+			request_id = b2r2_core_job_add(&request->job);
+		}
+
+		dec_stat(&stat_n_in_blt_add);
+
+		if (request_id < 0) {
+			b2r2_log_warn("%s: Failed to add tile job, ret = %d\n",
+				__func__, request_id);
+			ret = request_id;
+			mutex_unlock(&instance->lock);
+			if (tile_job != NULL)
+				kfree(tile_job);
+			goto job_add_failed;
+		}
+
+		inc_stat(&stat_n_jobs_added);
+		mutex_unlock(&instance->lock);
+
+		b2r2_log_info("%s: Synchronous, waiting\n",
+			__func__);
+
+		inc_stat(&stat_n_in_blt_wait);
+		if (x + tmp_buf_width < dst_rect->width &&
+				x + dst_rect->x + tmp_buf_width < dst_img_width) {
+			ret = b2r2_core_job_wait(tile_job);
+		} else {
+			/*
+			 * This is the last tile. Wait for the job-struct from
+			 * the request.
+			 */
+			ret = b2r2_core_job_wait(&request->job);
+		}
+		dec_stat(&stat_n_in_blt_wait);
+
+		if (ret < 0 && ret != -ENOENT)
+			b2r2_log_warn(
+				"%s: Failed to wait job, ret = %d\n",
+				__func__, ret);
+		else {
+			b2r2_log_info(
+				"%s: Synchronous wait done\n", __func__);
+
+			if (x + tmp_buf_width < dst_rect->width &&
+					x + dst_rect->x + tmp_buf_width < dst_img_width)
+				nsec_active_in_b2r2 += tile_job->nsec_active_in_hw;
+			else
+				nsec_active_in_b2r2 +=
+					request->job.nsec_active_in_hw;
+		}
+
+		/*
+		 * Release matching the addref in b2r2_core_job_add.
+		 * Make sure that the correct job-struct is released
+		 * when the last tile is processed.
+		 */
+		if (x + tmp_buf_width < dst_rect->width &&
+				x + dst_rect->x + tmp_buf_width < dst_img_width) {
+			b2r2_core_job_release(tile_job, __func__);
+		} else {
+			b2r2_core_job_release(&request->job, __func__);
+		}
+	}
+
+
+	ret = 0;
+
+
+	/* Unresolve the buffers */
+	unresolve_buf(&request->user_req.src_img.buf,
+		&request->src_resolved);
+	unresolve_buf(&request->user_req.src_mask.buf,
+		&request->src_mask_resolved);
+	unresolve_buf(&request->user_req.dst_img.buf,
+		&request->dst_resolved);
+
+	dec_stat(&stat_n_in_blt);
+
+	for (i = 0; i < tmp_buf_count; i++) {
+		dma_free_coherent(b2r2_blt_device(),
+			work_bufs[i].size,
+			work_bufs[i].virt_addr,
+			work_bufs[i].phys_addr);
+		memset(&(work_bufs[i]), 0, sizeof(work_bufs[i]));
+	}
+
+	if (request->profile) {
+		request->nsec_active_in_cpu =
+			(s32)((u32)task_sched_runtime(current) - thread_runtime_at_start);
+		request->total_time_nsec =
+			(s32)(b2r2_get_curr_nsec() - request->start_time_nsec);
+		request->job.nsec_active_in_hw = nsec_active_in_b2r2;
+
+		b2r2_call_profiler_blt_done(request);
+	}
+
+	return request_id;
+
+job_add_failed:
+exit_dry_run:
+generic_conf_failed:
+alloc_work_bufs_failed:
+	for (i = 0; i < 4; i++) {
+		if (work_bufs[i].virt_addr != 0) {
+			dma_free_coherent(b2r2_blt_device(),
+				work_bufs[i].size,
+				work_bufs[i].virt_addr,
+				work_bufs[i].phys_addr);
+			memset(&(work_bufs[i]), 0, sizeof(work_bufs[i]));
+		}
+	}
+
+generate_nodes_failed:
+	unresolve_buf(&request->user_req.dst_img.buf,
+		&request->dst_resolved);
+resolve_dst_buf_failed:
+	unresolve_buf(&request->user_req.src_mask.buf,
+		&request->src_mask_resolved);
+resolve_src_mask_buf_failed:
+	unresolve_buf(&request->user_req.src_img.buf,
+		&request->src_resolved);
+resolve_src_buf_failed:
+synch_interrupted:
+zero_blt:
+	job_release_gen(&request->job);
+	dec_stat(&stat_n_jobs_released);
+	dec_stat(&stat_n_in_blt);
+
+	b2r2_log_info("b2r2:%s ret=%d", __func__, ret);
+	return ret;
+}
+#endif /* CONFIG_B2R2_GENERIC */
+
+/**
+ * b2r2_blt_synch - Implements wait for all or a specified job
+ *
+ * @instance: The B2R2 BLT instance
+ * @request_id: If 0, wait for all requests on this instance to finish.
+ *              Else wait for request with given request id to finish.
+ */
+static int b2r2_blt_synch(struct b2r2_blt_instance *instance,
+			int request_id)
+{
+	int ret = 0;
+	b2r2_log_info("%s, request_id=%d\n", __func__, request_id);
+
+	if (request_id == 0) {
+		/* Wait for all requests */
+		inc_stat(&stat_n_in_synch_0);
+
+		/* Enter state "synching" if we have any active request */
+		mutex_lock(&instance->lock);
+		if (instance->no_of_active_requests)
+			instance->synching = true;
+		mutex_unlock(&instance->lock);
+
+		/* Wait until no longer in state synching */
+		ret = wait_event_interruptible(instance->synch_done_waitq,
+					!is_synching(instance));
+		dec_stat(&stat_n_in_synch_0);
+	} else {
+		struct b2r2_core_job *job;
+
+		inc_stat(&stat_n_in_synch_job);
+
+		/* Wait for specific job */
+		job = b2r2_core_job_find(request_id);
+		if (job) {
+			/* Wait on find job */
+			ret = b2r2_core_job_wait(job);
+			/* Release matching the addref in b2r2_core_job_find */
+			b2r2_core_job_release(job, __func__);
+		}
+
+		/* If job not found we assume that is has been run */
+
+		dec_stat(&stat_n_in_synch_job);
+	}
+
+	b2r2_log_info(
+		"%s, request_id=%d, returns %d\n", __func__, request_id, ret);
+
+	return ret;
+}
+
+/**
+ * Query B2R2 capabilities
+ *
+ * @instance: The B2R2 BLT instance
+ * @query_cap: The structure receiving the capabilities
+ */
+static int b2r2_blt_query_cap(struct b2r2_blt_instance *instance,
+		struct b2r2_blt_query_cap *query_cap)
+{
+	/* FIXME: Not implemented yet */
+	return -ENOSYS;
+}
+
+static void get_actual_dst_rect(struct b2r2_blt_req *req,
+					struct b2r2_blt_rect *actual_dst_rect)
+{
+	struct b2r2_blt_rect dst_img_bounds;
+
+	b2r2_get_img_bounding_rect(&req->dst_img, &dst_img_bounds);
+
+	b2r2_intersect_rects(&req->dst_rect, &dst_img_bounds, actual_dst_rect);
+
+	if (req->flags & B2R2_BLT_FLAG_DESTINATION_CLIP)
+		b2r2_intersect_rects(actual_dst_rect, &req->dst_clip_rect,
+							actual_dst_rect);
+}
+
+static void set_up_hwmem_region(struct b2r2_blt_img *img,
+		struct b2r2_blt_rect *rect, struct hwmem_region *region)
+{
+	s32 img_size;
+
+	memset(region, 0, sizeof(*region));
+
+	if (b2r2_is_zero_area_rect(rect))
+		return;
+
+	img_size = b2r2_get_img_size(img);
+
+	if (b2r2_is_single_plane_fmt(img->fmt) &&
+				b2r2_is_independent_pixel_fmt(img->fmt)) {
+		int img_fmt_bpp = b2r2_get_fmt_bpp(img->fmt);
+		u32 img_pitch = b2r2_get_img_pitch(img);
+
+		region->offset = (uint32_t)(img->buf.offset + (rect->y *
+								img_pitch));
+		region->count = (uint32_t)rect->height;
+		region->start = (uint32_t)((rect->x * img_fmt_bpp) / 8);
+		region->end = (uint32_t)b2r2_div_round_up(
+				(rect->x + rect->width) * img_fmt_bpp, 8);
+		region->size = img_pitch;
+	} else {
+		/*
+		 * TODO: Locking entire buffer as a quick safe solution. In the
+		 * future we should lock less to avoid unecessary cache
+		 * synching. Pixel interleaved YCbCr formats should be quite
+		 * easy, just align start and stop points on 2.
+		 */
+		region->offset = (uint32_t)img->buf.offset;
+		region->count = 1;
+		region->start = 0;
+		region->end = (uint32_t)img_size;
+		region->size = (uint32_t)img_size;
+	}
+}
+
+static int resolve_hwmem(struct b2r2_blt_img *img,
+		struct b2r2_blt_rect *rect_2b_used,
+		bool is_dst,
+		struct b2r2_resolved_buf *resolved_buf)
+{
+	int return_value = 0;
+	enum hwmem_mem_type mem_type;
+	enum hwmem_access access;
+	enum hwmem_access required_access;
+	struct hwmem_region region;
+
+	resolved_buf->hwmem_alloc =
+			hwmem_resolve_by_name(img->buf.hwmem_buf_name);
+	if (IS_ERR(resolved_buf->hwmem_alloc)) {
+		return_value = PTR_ERR(resolved_buf->hwmem_alloc);
+		b2r2_log_info("%s: hwmem_resolve_by_name failed, "
+				"error code: %i\n", __func__, return_value);
+		goto resolve_failed;
+	}
+
+	hwmem_get_info(resolved_buf->hwmem_alloc, &resolved_buf->file_len,
+			&mem_type, &access);
+
+	required_access = (is_dst ? HWMEM_ACCESS_WRITE : HWMEM_ACCESS_READ) |
+							HWMEM_ACCESS_IMPORT;
+	if ((required_access & access) != required_access) {
+		b2r2_log_info("%s: Insufficient access to hwmem buffer.\n",
+				__func__);
+		return_value = -EACCES;
+		goto access_check_failed;
+	}
+
+	if (mem_type != HWMEM_MEM_CONTIGUOUS_SYS) {
+		b2r2_log_info("%s: Hwmem buffer is scattered.\n", __func__);
+		return_value = -EINVAL;
+		goto buf_scattered;
+	}
+
+	if (resolved_buf->file_len <
+			img->buf.offset + (__u32)b2r2_get_img_size(img)) {
+		b2r2_log_info("%s: Hwmem buffer too small.\n", __func__);
+		return_value = -EINVAL;
+		goto size_check_failed;
+	}
+
+	return_value = hwmem_pin(resolved_buf->hwmem_alloc,
+				&resolved_buf->file_physical_start, NULL);
+	if (return_value < 0) {
+		b2r2_log_info("%s: hwmem_pin failed, "
+				"error code: %i\n", __func__, return_value);
+		goto pin_failed;
+	}
+
+	set_up_hwmem_region(img, rect_2b_used, &region);
+	return_value = hwmem_set_domain(resolved_buf->hwmem_alloc,
+				required_access, HWMEM_DOMAIN_SYNC, &region);
+	if (return_value < 0) {
+		b2r2_log_info("%s: hwmem_set_domain failed, "
+				"error code: %i\n", __func__, return_value);
+		goto set_domain_failed;
+	}
+
+	resolved_buf->physical_address =
+			resolved_buf->file_physical_start + img->buf.offset;
+
+	goto out;
+
+set_domain_failed:
+	hwmem_unpin(resolved_buf->hwmem_alloc);
+pin_failed:
+size_check_failed:
+buf_scattered:
+access_check_failed:
+	hwmem_release(resolved_buf->hwmem_alloc);
+resolve_failed:
+
+out:
+	return return_value;
+}
+
+static void unresolve_hwmem(struct b2r2_resolved_buf *resolved_buf)
+{
+	hwmem_unpin(resolved_buf->hwmem_alloc);
+	hwmem_release(resolved_buf->hwmem_alloc);
+}
+
+/**
+ * unresolve_buf() - Must be called after resolve_buf
+ *
+ * @buf: The buffer specification as supplied from user space
+ * @resolved: Gathered information about the buffer
+ *
+ * Returns 0 if OK else negative error code
+ */
+static void unresolve_buf(struct b2r2_blt_buf *buf,
+			struct b2r2_resolved_buf *resolved)
+{
+#ifdef CONFIG_ANDROID_PMEM
+	if (resolved->is_pmem && resolved->filep)
+		put_pmem_file(resolved->filep);
+#endif
+	if (resolved->hwmem_alloc != NULL)
+		unresolve_hwmem(resolved);
+}
+
+/**
+ * resolve_buf() - Returns the physical & virtual addresses of a B2R2 blt buffer
+ *
+ * @img: The image specification as supplied from user space
+ * @rect_2b_used: The part of the image b2r2 will use.
+ * @usage: Specifies how the buffer will be used.
+ * @resolved: Gathered information about the buffer
+ *
+ * Returns 0 if OK else negative error code
+ */
+static int resolve_buf(struct b2r2_blt_img *img,
+		struct b2r2_blt_rect *rect_2b_used,
+		bool is_dst,
+		struct b2r2_resolved_buf *resolved)
+{
+	int ret = 0;
+
+	memset(resolved, 0, sizeof(*resolved));
+
+	switch (img->buf.type) {
+	case B2R2_BLT_PTR_NONE:
+		break;
+
+	case B2R2_BLT_PTR_PHYSICAL:
+		resolved->physical_address = img->buf.offset;
+		resolved->file_len = img->buf.len;
+		break;
+
+		/* FD + OFFSET type */
+	case B2R2_BLT_PTR_FD_OFFSET: {
+		/*
+		 * TODO: Do we need to check if the process is allowed to
+		 * read/write (depending on if it's dst or src) to the file?
+		 */
+		struct file *file;
+		int put_needed;
+		int i;
+
+#ifdef CONFIG_ANDROID_PMEM
+		if (!get_pmem_file(
+			img->buf.fd,
+			(unsigned long *) &resolved->file_physical_start,
+			(unsigned long *) &resolved->file_virtual_start,
+			(unsigned long *) &resolved->file_len,
+			&resolved->filep)) {
+			resolved->physical_address =
+				resolved->file_physical_start +
+				img->buf.offset;
+			resolved->virtual_address = (void *)
+				(resolved->file_virtual_start +
+				img->buf.offset);
+			resolved->is_pmem = true;
+		} else
+#endif
+		{
+			/* Will be set to 0 if a matching dev is found */
+			ret = -EINVAL;
+
+			file = fget_light(img->buf.fd, &put_needed);
+			if (file == NULL)
+				return -EINVAL;
+#ifdef CONFIG_FB
+			if (MAJOR(file->f_dentry->d_inode->i_rdev) == FB_MAJOR) {
+				/*
+				 * This is a frame buffer device, find fb_info
+				 * (OK to do it like this, no locking???)
+				 */
+
+				for (i = 0; i < num_registered_fb; i++) {
+					struct fb_info *info = registered_fb[i];
+
+					if (info && info->dev &&
+							MINOR(info->dev->devt) ==
+							MINOR(file->f_dentry->d_inode->i_rdev)) {
+						resolved->file_physical_start =
+							info->fix.smem_start;
+						resolved->file_virtual_start =
+							(u32)info->screen_base;
+						resolved->file_len =
+							info->fix.smem_len;
+
+						resolved->physical_address =
+							resolved->file_physical_start +
+							img->buf.offset;
+						resolved->virtual_address =
+							(void *)(resolved->file_virtual_start +
+							img->buf.offset);
+
+						ret = 0;
+						break;
+					}
+				}
+			}
+#endif
+
+			fput_light(file, put_needed);
+		}
+
+		/* Check bounds */
+		if (ret >= 0 && img->buf.offset + img->buf.len >
+				resolved->file_len) {
+			ret = -ESPIPE;
+			unresolve_buf(&img->buf, resolved);
+		}
+
+		break;
+	}
+
+	case B2R2_BLT_PTR_HWMEM_BUF_NAME_OFFSET:
+		ret = resolve_hwmem(img, rect_2b_used, is_dst, resolved);
+		break;
+
+	default:
+		b2r2_log_warn(
+			"%s: Failed to resolve buf type %d\n",
+			__func__, img->buf.type);
+
+		ret = -EINVAL;
+		break;
+
+	}
+
+	return ret;
+}
+
+/**
+ * sync_buf - Synchronizes the memory occupied by an image buffer.
+ *
+ * @buf: User buffer specification
+ * @resolved_buf: Gathered info (physical address etc.) about buffer
+ * @is_dst: true if the buffer is a destination buffer, false if the buffer is a
+ *          source buffer.
+ * @rect: rectangle in the image buffer that should be synced. NULL the buffer is a source mask.
+ * @img_width: width of the complete image buffer
+ * @fmt: buffer format
+*/
+static void sync_buf(struct b2r2_blt_img *img,
+		struct b2r2_resolved_buf *resolved,
+		bool is_dst,
+		struct b2r2_blt_rect *rect)
+{
+	struct sync_args sa;
+	u32 start_phys, end_phys;
+
+	if (B2R2_BLT_PTR_NONE == img->buf.type ||
+			B2R2_BLT_PTR_HWMEM_BUF_NAME_OFFSET == img->buf.type)
+		return;
+
+	start_phys = resolved->physical_address;
+	end_phys = resolved->physical_address + img->buf.len;
+
+	/*
+	 * TODO: Very ugly. We should find out whether the memory is coherent in
+	 * some generic way but cache handling will be rewritten soon so there
+	 * is no use spending time on it. In the new design this will probably
+	 * not be a problem.
+	 */
+	/* Frame buffer is coherent, at least now. */
+	if (!resolved->is_pmem) {
+		/*
+		 * Drain the write buffers as they are not always part of the
+		 * coherent concept.
+		 */
+		wmb();
+
+		return;
+	}
+
+	/*
+	 * src_mask does not have rect.
+	 * Also flush full buffer for planar and semiplanar YUV formats
+	 */
+	if (rect == NULL ||
+			(img->fmt == B2R2_BLT_FMT_YUV420_PACKED_PLANAR) ||
+			(img->fmt == B2R2_BLT_FMT_YUV422_PACKED_PLANAR) ||
+			(img->fmt == B2R2_BLT_FMT_YUV444_PACKED_PLANAR) ||
+			(img->fmt == B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR) ||
+			(img->fmt == B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR) ||
+			(img->fmt ==
+				B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE) ||
+			(img->fmt ==
+				B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE)) {
+		sa.start = (unsigned long)resolved->virtual_address;
+		sa.end = (unsigned long)resolved->virtual_address + img->buf.len;
+		start_phys = resolved->physical_address;
+		end_phys = resolved->physical_address + img->buf.len;
+	} else {
+		/* buffer is not a src_mask so make use of rect when clean & flush caches*/
+		u32 bpp;	/* Bits per pixel */
+		u32 pitch;
+
+		switch (img->fmt) {
+		case B2R2_BLT_FMT_16_BIT_ARGB4444: /* Fall through */
+		case B2R2_BLT_FMT_16_BIT_ARGB1555: /* Fall through */
+		case B2R2_BLT_FMT_16_BIT_RGB565:   /* Fall through */
+		case B2R2_BLT_FMT_Y_CB_Y_CR:       /* Fall through */
+		case B2R2_BLT_FMT_CB_Y_CR_Y:
+			bpp = 16;
+			break;
+		case B2R2_BLT_FMT_24_BIT_RGB888:   /* Fall through */
+		case B2R2_BLT_FMT_24_BIT_ARGB8565: /* Fall through */
+		case B2R2_BLT_FMT_24_BIT_YUV888:
+			bpp =  24;
+			break;
+		case B2R2_BLT_FMT_32_BIT_ARGB8888: /* Fall through */
+		case B2R2_BLT_FMT_32_BIT_ABGR8888: /* Fall through */
+		case B2R2_BLT_FMT_32_BIT_AYUV8888:
+			bpp = 32;
+			break;
+		default:
+			bpp = 12;
+		}
+		if (img->pitch == 0)
+			pitch = (img->width * bpp) / 8;
+		else
+			pitch = img->pitch;
+
+		/*
+		 * For 422I formats 2 horizontal pixels share color data.
+		 * Thus, the x position must be aligned down to closest even
+		 * number and width must be aligned up.
+		 */
+		{
+			s32 x;
+			s32 width;
+
+			switch (img->fmt) {
+			case B2R2_BLT_FMT_Y_CB_Y_CR:       /* Fall through */
+			case B2R2_BLT_FMT_CB_Y_CR_Y:
+				x = (rect->x / 2) * 2;
+				width = ((rect->width + 1) / 2) * 2;
+				break;
+			default:
+				x = rect->x;
+				width = rect->width;
+				break;
+			}
+
+			sa.start = (unsigned long)resolved->virtual_address +
+					rect->y * pitch + (x * bpp) / 8;
+			sa.end = (unsigned long)sa.start +
+					(rect->height - 1) * pitch +
+					(width * bpp) / 8;
+
+			start_phys = resolved->physical_address +
+					rect->y * pitch + (x * bpp) / 8;
+			end_phys = start_phys +
+					(rect->height - 1) * pitch +
+					(width * bpp) / 8;
+		}
+	}
+
+	/*
+	 * The virtual address to a pmem buffer is retrieved from ioremap, not
+	 * sure if it's	ok to use such an address as a kernel virtual address.
+	 * When doing it at a higher level such as dma_map_single it triggers an
+	 * error but at lower levels such as dmac_clean_range it seems to work,
+	 * hence the low level stuff.
+	 */
+
+	if (is_dst) {
+		/*
+		 * According to ARM's docs you must clean before invalidating
+		 * (ie flush) to avoid loosing data.
+		 */
+
+		/* Flush L1 cache */
+#ifdef CONFIG_SMP
+		flush_l1_cache_range_all_cpus(&sa);
+#else
+		flush_l1_cache_range_curr_cpu(&sa);
+#endif
+
+		/* Flush L2 cache */
+		outer_flush_range(start_phys, end_phys);
+	} else {
+		/* Clean L1 cache */
+#ifdef CONFIG_SMP
+		clean_l1_cache_range_all_cpus(&sa);
+#else
+		clean_l1_cache_range_curr_cpu(&sa);
+#endif
+
+		/* Clean L2 cache */
+		outer_clean_range(start_phys, end_phys);
+	}
+}
+
+/**
+ * is_report_list_empty() - Spin lock protected check of report list
+ *
+ * @instance: The B2R2 BLT instance
+ */
+static bool is_report_list_empty(struct b2r2_blt_instance *instance)
+{
+	bool is_empty;
+
+	mutex_lock(&instance->lock);
+	is_empty = list_empty(&instance->report_list);
+	mutex_unlock(&instance->lock);
+
+	return is_empty;
+}
+
+/**
+ * is_synching() - Spin lock protected check if synching
+ *
+ * @instance: The B2R2 BLT instance
+ */
+static bool is_synching(struct b2r2_blt_instance *instance)
+{
+	bool is_synching;
+
+	mutex_lock(&instance->lock);
+	is_synching = instance->synching;
+	mutex_unlock(&instance->lock);
+
+	return is_synching;
+}
+
+/**
+ * b2r2_blt_devide() - Returns the B2R2 blt device for logging
+ */
+struct device *b2r2_blt_device(void)
+{
+	return b2r2_blt_dev ? b2r2_blt_dev->this_device : NULL;
+}
+
+/**
+ * inc_stat() - Spin lock protected increment of statistics variable
+ *
+ * @stat: Pointer to statistics variable that should be incremented
+ */
+static void inc_stat(unsigned long *stat)
+{
+	mutex_lock(&stat_lock);
+	(*stat)++;
+	mutex_unlock(&stat_lock);
+}
+
+/**
+ * inc_stat() - Spin lock protected decrement of statistics variable
+ *
+ * @stat: Pointer to statistics variable that should be decremented
+ */
+static void dec_stat(unsigned long *stat)
+{
+	mutex_lock(&stat_lock);
+	(*stat)--;
+	mutex_unlock(&stat_lock);
+}
+
+
+#ifdef CONFIG_DEBUG_FS
+/**
+ * sprintf_req() - Builds a string representing the request, for debug
+ *
+ * @request:Request that should be encoded into a string
+ * @buf: Receiving buffer
+ * @size: Size of receiving buffer
+ *
+ * Returns number of characters in string, excluding null terminator
+ */
+static int sprintf_req(struct b2r2_blt_request *request, char *buf, int size)
+{
+	size_t dev_size = 0;
+
+	dev_size += sprintf(buf + dev_size,
+			"instance: %p\n\n",
+			request->instance);
+
+	dev_size += sprintf(buf + dev_size,
+			"size: %d bytes\n",
+			request->user_req.size);
+	dev_size += sprintf(buf + dev_size,
+			"flags: %8lX\n",
+			(unsigned long) request->user_req.flags);
+	dev_size += sprintf(buf + dev_size,
+			"transform: %3lX\n",
+			(unsigned long) request->user_req.transform);
+	dev_size += sprintf(buf + dev_size,
+			"prio: %d\n",
+			request->user_req.transform);
+	dev_size += sprintf(buf + dev_size,
+			"src_img.fmt: %#010x\n",
+			request->user_req.src_img.fmt);
+	dev_size += sprintf(buf + dev_size,
+			"src_img.buf: {type=%d,hwmem_buf_name=%d,fd=%d,"
+				"offset=%d,len=%d}\n",
+			request->user_req.src_img.buf.type,
+			request->user_req.src_img.buf.hwmem_buf_name,
+			request->user_req.src_img.buf.fd,
+			request->user_req.src_img.buf.offset,
+			request->user_req.src_img.buf.len);
+	dev_size += sprintf(buf + dev_size,
+			"src_img.{width=%d,height=%d,pitch=%d}\n",
+			request->user_req.src_img.width,
+			request->user_req.src_img.height,
+			request->user_req.src_img.pitch);
+	dev_size += sprintf(buf + dev_size,
+			"src_mask.fmt: %#010x\n",
+			request->user_req.src_mask.fmt);
+	dev_size += sprintf(buf + dev_size,
+			"src_mask.buf: {type=%d,hwmem_buf_name=%d,fd=%d,"
+				"offset=%d,len=%d}\n",
+			request->user_req.src_mask.buf.type,
+			request->user_req.src_mask.buf.hwmem_buf_name,
+			request->user_req.src_mask.buf.fd,
+			request->user_req.src_mask.buf.offset,
+			request->user_req.src_mask.buf.len);
+	dev_size += sprintf(buf + dev_size,
+			"src_mask.{width=%d,height=%d,pitch=%d}\n",
+			request->user_req.src_mask.width,
+			request->user_req.src_mask.height,
+			request->user_req.src_mask.pitch);
+	dev_size += sprintf(buf + dev_size,
+			"src_rect.{x=%d,y=%d,width=%d,height=%d}\n",
+			request->user_req.src_rect.x,
+			request->user_req.src_rect.y,
+			request->user_req.src_rect.width,
+			request->user_req.src_rect.height);
+	dev_size += sprintf(buf + dev_size,
+			"src_color=%08lX\n",
+			(unsigned long) request->user_req.src_color);
+
+	dev_size += sprintf(buf + dev_size,
+			"dst_img.fmt: %#010x\n",
+			request->user_req.dst_img.fmt);
+	dev_size += sprintf(buf + dev_size,
+			"dst_img.buf: {type=%d,hwmem_buf_name=%d,fd=%d,"
+				"offset=%d,len=%d}\n",
+			request->user_req.dst_img.buf.type,
+			request->user_req.dst_img.buf.hwmem_buf_name,
+			request->user_req.dst_img.buf.fd,
+			request->user_req.dst_img.buf.offset,
+			request->user_req.dst_img.buf.len);
+	dev_size += sprintf(buf + dev_size,
+			"dst_img.{width=%d,height=%d,pitch=%d}\n",
+			request->user_req.dst_img.width,
+			request->user_req.dst_img.height,
+			request->user_req.dst_img.pitch);
+	dev_size += sprintf(buf + dev_size,
+			"dst_rect.{x=%d,y=%d,width=%d,height=%d}\n",
+			request->user_req.dst_rect.x,
+			request->user_req.dst_rect.y,
+			request->user_req.dst_rect.width,
+			request->user_req.dst_rect.height);
+	dev_size += sprintf(buf + dev_size,
+			"dst_clip_rect.{x=%d,y=%d,width=%d,height=%d}\n",
+			request->user_req.dst_clip_rect.x,
+			request->user_req.dst_clip_rect.y,
+			request->user_req.dst_clip_rect.width,
+			request->user_req.dst_clip_rect.height);
+	dev_size += sprintf(buf + dev_size,
+			"dst_color=%08lX\n",
+			(unsigned long) request->user_req.dst_color);
+	dev_size += sprintf(buf + dev_size,
+			"global_alpha=%d\n",
+			(int) request->user_req.global_alpha);
+	dev_size += sprintf(buf + dev_size,
+			"report1=%08lX\n",
+			(unsigned long) request->user_req.report1);
+	dev_size += sprintf(buf + dev_size,
+			"report2=%08lX\n",
+			(unsigned long) request->user_req.report2);
+
+	dev_size += sprintf(buf + dev_size,
+			"request_id: %d\n",
+			request->request_id);
+
+	dev_size += sprintf(buf + dev_size,
+			"src_resolved.physical: %lX\n",
+			(unsigned long) request->src_resolved.
+			physical_address);
+	dev_size += sprintf(buf + dev_size,
+			"src_resolved.virtual: %p\n",
+			request->src_resolved.virtual_address);
+	dev_size += sprintf(buf + dev_size,
+			"src_resolved.filep: %p\n",
+			request->src_resolved.filep);
+	dev_size += sprintf(buf + dev_size,
+			"src_resolved.filep_physical_start: %lX\n",
+			(unsigned long) request->src_resolved.
+			file_physical_start);
+	dev_size += sprintf(buf + dev_size,
+			"src_resolved.filep_virtual_start: %p\n",
+			(void *) request->src_resolved.file_virtual_start);
+	dev_size += sprintf(buf + dev_size,
+			"src_resolved.file_len: %d\n",
+			request->src_resolved.file_len);
+
+	dev_size += sprintf(buf + dev_size,
+			"src_mask_resolved.physical: %lX\n",
+			(unsigned long) request->src_mask_resolved.
+			physical_address);
+	dev_size += sprintf(buf + dev_size,
+			"src_mask_resolved.virtual: %p\n",
+			request->src_mask_resolved.virtual_address);
+	dev_size += sprintf(buf + dev_size,
+			"src_mask_resolved.filep: %p\n",
+			request->src_mask_resolved.filep);
+	dev_size += sprintf(buf + dev_size,
+			"src_mask_resolved.filep_physical_start: %lX\n",
+			(unsigned long) request->src_mask_resolved.
+			file_physical_start);
+	dev_size += sprintf(buf + dev_size,
+			"src_mask_resolved.filep_virtual_start: %p\n",
+			(void *) request->src_mask_resolved.
+			file_virtual_start);
+	dev_size += sprintf(buf + dev_size,
+			"src_mask_resolved.file_len: %d\n",
+			request->src_mask_resolved.file_len);
+
+	dev_size += sprintf(buf + dev_size,
+			"dst_resolved.physical: %lX\n",
+			(unsigned long) request->dst_resolved.
+			physical_address);
+	dev_size += sprintf(buf + dev_size,
+			"dst_resolved.virtual: %p\n",
+			request->dst_resolved.virtual_address);
+	dev_size += sprintf(buf + dev_size,
+			"dst_resolved.filep: %p\n",
+			request->dst_resolved.filep);
+	dev_size += sprintf(buf + dev_size,
+			"dst_resolved.filep_physical_start: %lX\n",
+			(unsigned long) request->dst_resolved.
+			file_physical_start);
+	dev_size += sprintf(buf + dev_size,
+			"dst_resolved.filep_virtual_start: %p\n",
+			(void *) request->dst_resolved.file_virtual_start);
+	dev_size += sprintf(buf + dev_size,
+			"dst_resolved.file_len: %d\n",
+			request->dst_resolved.file_len);
+
+	return dev_size;
+}
+
+/**
+ * debugfs_b2r2_blt_request_read() - Implements debugfs read for B2R2 register
+ *
+ * @filp: File pointer
+ * @buf: User space buffer
+ * @count: Number of bytes to read
+ * @f_pos: File position
+ *
+ * Returns number of bytes read or negative error code
+ */
+static int debugfs_b2r2_blt_request_read(struct file *filp, char __user *buf,
+			size_t count, loff_t *f_pos)
+{
+	size_t dev_size = 0;
+	int ret = 0;
+	char *Buf = kmalloc(sizeof(char) * 4096, GFP_KERNEL);
+
+	if (Buf == NULL) {
+		ret = -ENOMEM;
+		goto out;
+	}
+
+	dev_size = sprintf_req(&debugfs_latest_request, Buf, sizeof(char) * 4096);
+
+	/* No more to read if offset != 0 */
+	if (*f_pos > dev_size)
+		goto out;
+
+	if (*f_pos + count > dev_size)
+		count = dev_size - *f_pos;
+
+	if (copy_to_user(buf, Buf, count))
+		ret = -EINVAL;
+	*f_pos += count;
+	ret = count;
+
+out:
+	if (Buf != NULL)
+		kfree(Buf);
+	return ret;
+}
+
+/**
+ * debugfs_b2r2_blt_request_fops - File operations for B2R2 request debugfs
+ */
+static const struct file_operations debugfs_b2r2_blt_request_fops = {
+	.owner = THIS_MODULE,
+	.read  = debugfs_b2r2_blt_request_read,
+};
+
+/**
+ * struct debugfs_reg - Represents a B2R2 node "register"
+ *
+ * @name: Register name
+ * @offset: Offset within the node
+ */
+struct debugfs_reg {
+	const char  name[30];
+	u32   offset;
+};
+
+/**
+ * debugfs_node_regs - Array with all the registers in a B2R2 node, for debug
+ */
+static const struct debugfs_reg debugfs_node_regs[] = {
+	{"GROUP0.B2R2_NIP", offsetof(struct b2r2_link_list, GROUP0.B2R2_NIP)},
+	{"GROUP0.B2R2_CIC", offsetof(struct b2r2_link_list, GROUP0.B2R2_CIC)},
+	{"GROUP0.B2R2_INS", offsetof(struct b2r2_link_list, GROUP0.B2R2_INS)},
+	{"GROUP0.B2R2_ACK", offsetof(struct b2r2_link_list, GROUP0.B2R2_ACK)},
+
+	{"GROUP1.B2R2_TBA", offsetof(struct b2r2_link_list, GROUP1.B2R2_TBA)},
+	{"GROUP1.B2R2_TTY", offsetof(struct b2r2_link_list, GROUP1.B2R2_TTY)},
+	{"GROUP1.B2R2_TXY", offsetof(struct b2r2_link_list, GROUP1.B2R2_TXY)},
+	{"GROUP1.B2R2_TSZ", offsetof(struct b2r2_link_list, GROUP1.B2R2_TSZ)},
+
+	{"GROUP2.B2R2_S1CF", offsetof(struct b2r2_link_list, GROUP2.B2R2_S1CF)},
+	{"GROUP2.B2R2_S2CF", offsetof(struct b2r2_link_list, GROUP2.B2R2_S2CF)},
+
+	{"GROUP3.B2R2_SBA", offsetof(struct b2r2_link_list, GROUP3.B2R2_SBA)},
+	{"GROUP3.B2R2_STY", offsetof(struct b2r2_link_list, GROUP3.B2R2_STY)},
+	{"GROUP3.B2R2_SXY", offsetof(struct b2r2_link_list, GROUP3.B2R2_SXY)},
+	{"GROUP3.B2R2_SSZ", offsetof(struct b2r2_link_list, GROUP3.B2R2_SSZ)},
+
+	{"GROUP4.B2R2_SBA", offsetof(struct b2r2_link_list, GROUP4.B2R2_SBA)},
+	{"GROUP4.B2R2_STY", offsetof(struct b2r2_link_list, GROUP4.B2R2_STY)},
+	{"GROUP4.B2R2_SXY", offsetof(struct b2r2_link_list, GROUP4.B2R2_SXY)},
+	{"GROUP4.B2R2_SSZ", offsetof(struct b2r2_link_list, GROUP4.B2R2_SSZ)},
+
+	{"GROUP5.B2R2_SBA", offsetof(struct b2r2_link_list, GROUP5.B2R2_SBA)},
+	{"GROUP5.B2R2_STY", offsetof(struct b2r2_link_list, GROUP5.B2R2_STY)},
+	{"GROUP5.B2R2_SXY", offsetof(struct b2r2_link_list, GROUP5.B2R2_SXY)},
+	{"GROUP5.B2R2_SSZ", offsetof(struct b2r2_link_list, GROUP5.B2R2_SSZ)},
+
+	{"GROUP6.B2R2_CWO", offsetof(struct b2r2_link_list, GROUP6.B2R2_CWO)},
+	{"GROUP6.B2R2_CWS", offsetof(struct b2r2_link_list, GROUP6.B2R2_CWS)},
+
+	{"GROUP7.B2R2_CCO", offsetof(struct b2r2_link_list, GROUP7.B2R2_CCO)},
+	{"GROUP7.B2R2_CML", offsetof(struct b2r2_link_list, GROUP7.B2R2_CML)},
+
+	{"GROUP8.B2R2_FCTL", offsetof(struct b2r2_link_list, GROUP8.B2R2_FCTL)},
+	{"GROUP8.B2R2_PMK", offsetof(struct b2r2_link_list, GROUP8.B2R2_PMK)},
+
+	{"GROUP9.B2R2_RSF", offsetof(struct b2r2_link_list, GROUP9.B2R2_RSF)},
+	{"GROUP9.B2R2_RZI", offsetof(struct b2r2_link_list, GROUP9.B2R2_RZI)},
+	{"GROUP9.B2R2_HFP", offsetof(struct b2r2_link_list, GROUP9.B2R2_HFP)},
+	{"GROUP9.B2R2_VFP", offsetof(struct b2r2_link_list, GROUP9.B2R2_VFP)},
+
+	{"GROUP10.B2R2_RSF", offsetof(struct b2r2_link_list, GROUP10.B2R2_RSF)},
+	{"GROUP10.B2R2_RZI", offsetof(struct b2r2_link_list, GROUP10.B2R2_RZI)},
+	{"GROUP10.B2R2_HFP", offsetof(struct b2r2_link_list, GROUP10.B2R2_HFP)},
+	{"GROUP10.B2R2_VFP", offsetof(struct b2r2_link_list, GROUP10.B2R2_VFP)},
+
+	{"GROUP11.B2R2_FF0", offsetof(struct b2r2_link_list,
+					GROUP11.B2R2_FF0)},
+	{"GROUP11.B2R2_FF1", offsetof(struct b2r2_link_list,
+					GROUP11.B2R2_FF1)},
+	{"GROUP11.B2R2_FF2", offsetof(struct b2r2_link_list,
+					GROUP11.B2R2_FF2)},
+	{"GROUP11.B2R2_FF3", offsetof(struct b2r2_link_list,
+					GROUP11.B2R2_FF3)},
+
+	{"GROUP12.B2R2_KEY1", offsetof(struct b2r2_link_list,
+				GROUP12.B2R2_KEY1)},
+	{"GROUP12.B2R2_KEY2", offsetof(struct b2r2_link_list,
+				GROUP12.B2R2_KEY2)},
+
+	{"GROUP13.B2R2_XYL", offsetof(struct b2r2_link_list, GROUP13.B2R2_XYL)},
+	{"GROUP13.B2R2_XYP", offsetof(struct b2r2_link_list, GROUP13.B2R2_XYP)},
+
+	{"GROUP14.B2R2_SAR", offsetof(struct b2r2_link_list, GROUP14.B2R2_SAR)},
+	{"GROUP14.B2R2_USR", offsetof(struct b2r2_link_list, GROUP14.B2R2_USR)},
+
+	{"GROUP15.B2R2_VMX0", offsetof(struct b2r2_link_list,
+				GROUP15.B2R2_VMX0)},
+	{"GROUP15.B2R2_VMX1", offsetof(struct b2r2_link_list,
+				GROUP15.B2R2_VMX1)},
+	{"GROUP15.B2R2_VMX2", offsetof(struct b2r2_link_list,
+				GROUP15.B2R2_VMX2)},
+	{"GROUP15.B2R2_VMX3", offsetof(struct b2r2_link_list,
+				GROUP15.B2R2_VMX3)},
+
+	{"GROUP16.B2R2_VMX0", offsetof(struct b2r2_link_list,
+				GROUP16.B2R2_VMX0)},
+	{"GROUP16.B2R2_VMX1", offsetof(struct b2r2_link_list,
+				GROUP16.B2R2_VMX1)},
+	{"GROUP16.B2R2_VMX2", offsetof(struct b2r2_link_list,
+				GROUP16.B2R2_VMX2)},
+	{"GROUP16.B2R2_VMX3", offsetof(struct b2r2_link_list,
+				GROUP16.B2R2_VMX3)},
+};
+
+/**
+ * debugfs_b2r2_blt_stat_read() - Implements debugfs read for B2R2 BLT
+ *                                statistics
+ *
+ * @filp: File pointer
+ * @buf: User space buffer
+ * @count: Number of bytes to read
+ * @f_pos: File position
+ *
+ * Returns number of bytes read or negative error code
+ */
+static int debugfs_b2r2_blt_stat_read(struct file *filp, char __user *buf,
+				size_t count, loff_t *f_pos)
+{
+	size_t dev_size = 0;
+	int ret = 0;
+	char *Buf = kmalloc(sizeof(char) * 4096, GFP_KERNEL);
+
+	if (Buf == NULL) {
+		ret = -ENOMEM;
+		goto out;
+	}
+
+	mutex_lock(&stat_lock);
+	dev_size += sprintf(Buf + dev_size, "Added jobs: %lu\n",
+			stat_n_jobs_added);
+	dev_size += sprintf(Buf + dev_size, "Released jobs: %lu\n",
+			stat_n_jobs_released);
+	dev_size += sprintf(Buf + dev_size, "Jobs in report list: %lu\n",
+			stat_n_jobs_in_report_list);
+	dev_size += sprintf(Buf + dev_size, "Clients in open: %lu\n",
+			stat_n_in_open);
+	dev_size += sprintf(Buf + dev_size, "Clients in release: %lu\n",
+			stat_n_in_release);
+	dev_size += sprintf(Buf + dev_size, "Clients in blt: %lu\n",
+			stat_n_in_blt);
+	dev_size += sprintf(Buf + dev_size, "              synch: %lu\n",
+			stat_n_in_blt_synch);
+	dev_size += sprintf(Buf + dev_size, "              add: %lu\n",
+			stat_n_in_blt_add);
+	dev_size += sprintf(Buf + dev_size, "              wait: %lu\n",
+			stat_n_in_blt_wait);
+	dev_size += sprintf(Buf + dev_size, "Clients in synch 0: %lu\n",
+			stat_n_in_synch_0);
+	dev_size += sprintf(Buf + dev_size, "Clients in synch job: %lu\n",
+			stat_n_in_synch_job);
+	dev_size += sprintf(Buf + dev_size, "Clients in query_cap: %lu\n",
+			stat_n_in_query_cap);
+	mutex_unlock(&stat_lock);
+
+	/* No more to read if offset != 0 */
+	if (*f_pos > dev_size)
+		goto out;
+
+	if (*f_pos + count > dev_size)
+		count = dev_size - *f_pos;
+
+	if (copy_to_user(buf, Buf, count))
+		ret = -EINVAL;
+	*f_pos += count;
+	ret = count;
+
+out:
+	if (Buf != NULL)
+		kfree(Buf);
+	return ret;
+}
+
+/**
+ * debugfs_b2r2_blt_stat_fops() - File operations for B2R2 BLT
+ *                                statistics debugfs
+ */
+static const struct file_operations debugfs_b2r2_blt_stat_fops = {
+	.owner = THIS_MODULE,
+	.read  = debugfs_b2r2_blt_stat_read,
+};
+#endif
+
+static void init_tmp_bufs(void)
+{
+	int i = 0;
+
+	for (i = 0; i < MAX_TMP_BUFS_NEEDED; i++) {
+		tmp_bufs[i].buf.virt_addr = dma_alloc_coherent(
+			b2r2_blt_device(), MAX_TMP_BUF_SIZE,
+			&tmp_bufs[i].buf.phys_addr, GFP_DMA);
+		if (tmp_bufs[i].buf.virt_addr != NULL)
+			tmp_bufs[i].buf.size = MAX_TMP_BUF_SIZE;
+		else {
+			b2r2_log_err("%s: Failed to allocate temp buffer %i\n",
+								__func__, i);
+
+			tmp_bufs[i].buf.size = 0;
+		}
+	}
+}
+
+static void destroy_tmp_bufs(void)
+{
+	int i = 0;
+
+	for (i = 0; i < MAX_TMP_BUFS_NEEDED; i++) {
+		if (tmp_bufs[i].buf.size != 0) {
+			dma_free_coherent(b2r2_blt_device(),
+						tmp_bufs[i].buf.size,
+						tmp_bufs[i].buf.virt_addr,
+						tmp_bufs[i].buf.phys_addr);
+
+			tmp_bufs[i].buf.size = 0;
+		}
+	}
+}
+
+/**
+ * b2r2_blt_module_init() - Module init function
+ *
+ * Returns 0 if OK else negative error code
+ */
+int b2r2_blt_module_init(void)
+{
+	int ret;
+
+	mutex_init(&stat_lock);
+
+#ifdef CONFIG_B2R2_GENERIC
+	/* Initialize generic path */
+	b2r2_generic_init();
+#endif
+
+	/* Initialize node splitter */
+	ret = b2r2_node_split_init();
+	if (ret) {
+		printk(KERN_WARNING "%s: node split init fails\n",
+			__func__);
+		goto b2r2_node_split_init_fail;
+	}
+
+	/* Register b2r2 driver */
+	ret = misc_register(&b2r2_blt_misc_dev);
+	if (ret) {
+		printk(KERN_WARNING "%s: registering misc device fails\n",
+			__func__);
+		goto b2r2_misc_register_fail;
+	}
+
+	b2r2_blt_misc_dev.this_device->coherent_dma_mask = 0xFFFFFFFF;
+	b2r2_blt_dev = &b2r2_blt_misc_dev;
+	b2r2_log_info("%s\n", __func__);
+
+	/*
+	 * FIXME: This stuff should be done before the first requests i.e.
+	 * before misc_register, but they need the device which is not
+	 * available until after misc_register.
+	 */
+	init_tmp_bufs();
+
+	/* Initialize memory allocator */
+	ret = b2r2_mem_init(b2r2_blt_device(), B2R2_HEAP_SIZE,
+			4, sizeof(struct b2r2_node));
+	if (ret) {
+		printk(KERN_WARNING "%s: initializing B2R2 memhandler fails\n",
+			__func__);
+		goto b2r2_mem_init_fail;
+	}
+
+#ifdef CONFIG_DEBUG_FS
+	/* Register debug fs */
+	if (!debugfs_root_dir) {
+		debugfs_root_dir = debugfs_create_dir("b2r2_blt", NULL);
+		debugfs_create_file("latest_request",
+				0666, debugfs_root_dir,
+				0,
+				&debugfs_b2r2_blt_request_fops);
+		debugfs_create_file("stat",
+				0666, debugfs_root_dir,
+				0,
+				&debugfs_b2r2_blt_stat_fops);
+	}
+#endif
+	goto out;
+
+b2r2_misc_register_fail:
+b2r2_mem_init_fail:
+	b2r2_node_split_exit();
+
+b2r2_node_split_init_fail:
+#ifdef CONFIG_B2R2_GENERIC
+	b2r2_generic_exit();
+#endif
+out:
+	return ret;
+}
+
+/**
+ * b2r2_module_exit() - Module exit function
+ */
+void b2r2_blt_module_exit(void)
+{
+#ifdef CONFIG_DEBUG_FS
+	if (debugfs_root_dir) {
+		debugfs_remove_recursive(debugfs_root_dir);
+		debugfs_root_dir = NULL;
+	}
+#endif
+	if (b2r2_blt_dev) {
+		b2r2_log_info("%s\n", __func__);
+		b2r2_mem_exit();
+		destroy_tmp_bufs();
+		b2r2_blt_dev = NULL;
+		misc_deregister(&b2r2_blt_misc_dev);
+	}
+
+	b2r2_node_split_exit();
+
+#if defined(CONFIG_B2R2_GENERIC)
+	b2r2_generic_exit();
+#endif
+}
+
+MODULE_AUTHOR("Robert Fekete <robert.fekete@stericsson.com>");
+MODULE_DESCRIPTION("ST-Ericsson B2R2 Blitter module");
+MODULE_LICENSE("GPL");
diff --git a/drivers/video/b2r2/b2r2_profiler_socket.c b/drivers/video/b2r2/b2r2_profiler_socket.c
index 5631a730d4e..f96ab5be76e 100644
--- a/drivers/video/b2r2/b2r2_profiler_socket.c
+++ b/drivers/video/b2r2/b2r2_profiler_socket.c
@@ -28,7 +28,7 @@
 
 
 static const struct b2r2_profiler *b2r2_profiler;
-static DECLARE_MUTEX(b2r2_profiler_lock);
+static DEFINE_SEMAPHORE(b2r2_profiler_lock);
 
 
 int b2r2_register_profiler(const struct b2r2_profiler * const profiler)
-- 
cgit v1.2.3


From f745d65201e5d7051dba624e40744998170f1bf7 Mon Sep 17 00:00:00 2001
From: Philippe Langlais <philippe.langlais@stericsson.com>
Date: Tue, 11 Oct 2011 14:08:29 +0200
Subject: b2r2: Warnings fix

Signed-off-by: Philippe Langlais <philippe.langlais@linaro.org>
---
 drivers/video/b2r2/b2r2_node_split.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/video/b2r2/b2r2_node_split.c b/drivers/video/b2r2/b2r2_node_split.c
index c7ce0572d11..1ffc3d688ef 100644
--- a/drivers/video/b2r2/b2r2_node_split.c
+++ b/drivers/video/b2r2/b2r2_node_split.c
@@ -1450,8 +1450,8 @@ static int configure_sub_rot(struct b2r2_node *node,
 	struct b2r2_blt_rect src_win;
 	struct b2r2_blt_rect dst_win;
 
-	u32 y_pixels;
-	u32 x_pixels;
+	u32 y_pixels = 0;
+	u32 x_pixels = 0;
 
 	memcpy(&src_win, &src->win, sizeof(src_win));
 	memcpy(&dst_win, &dst->win, sizeof(dst_win));
-- 
cgit v1.2.3


From 944dd6193d6d76f95c8eccac5df330cdec3ef253 Mon Sep 17 00:00:00 2001
From: Philippe Langlais <philippe.langlais@stericsson.com>
Date: Tue, 11 Oct 2011 15:43:38 +0200
Subject: video: HWMEM Update API

Perform queued hwmem API changes. One commit to ease dependency
handling.

Depends-On: I13f249cf5f51f9f138171e8d6f59e1d5d2f72de1, I31030bcfda7cf76d15402c2137576da4f3fb2761, I2dc7e6aa5686492550b5164e50c06ed750ac9e16, Ia12bbb9f378c331cfb9b1376dedb3b7b65f56429, Ibc3404df4876971d8b69272c63120e2fe3bb2787

ST-Ericsson ID: AP 327001
ST-Ericsson FOSS-OUT ID: STETL-FOSS-OUT-10068

Change-Id: I9a45ad54a0cc8a5cdb1e3b9038ad50aeacb3f9c3
Signed-off-by: Johan Mossberg <johan.xx.mossberg@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/17518
Reviewed-by: Robert FEKETE <robert.fekete@stericsson.com>
---
 drivers/video/b2r2/b2r2_blt_main.c | 21 ++++++++++++---------
 drivers/video/mcde/mcde_fb.c       |  9 +++++----
 2 files changed, 17 insertions(+), 13 deletions(-)

diff --git a/drivers/video/b2r2/b2r2_blt_main.c b/drivers/video/b2r2/b2r2_blt_main.c
index 1f5be3d0d95..a2b21f4a2c1 100644
--- a/drivers/video/b2r2/b2r2_blt_main.c
+++ b/drivers/video/b2r2/b2r2_blt_main.c
@@ -2241,11 +2241,11 @@ static void set_up_hwmem_region(struct b2r2_blt_img *img,
 		int img_fmt_bpp = b2r2_get_fmt_bpp(img->fmt);
 		u32 img_pitch = b2r2_get_img_pitch(img);
 
-		region->offset = (uint32_t)(img->buf.offset + (rect->y *
+		region->offset = (u32)(img->buf.offset + (rect->y *
 								img_pitch));
-		region->count = (uint32_t)rect->height;
-		region->start = (uint32_t)((rect->x * img_fmt_bpp) / 8);
-		region->end = (uint32_t)b2r2_div_round_up(
+		region->count = (u32)rect->height;
+		region->start = (u32)((rect->x * img_fmt_bpp) / 8);
+		region->end = (u32)b2r2_div_round_up(
 				(rect->x + rect->width) * img_fmt_bpp, 8);
 		region->size = img_pitch;
 	} else {
@@ -2255,11 +2255,11 @@ static void set_up_hwmem_region(struct b2r2_blt_img *img,
 		 * synching. Pixel interleaved YCbCr formats should be quite
 		 * easy, just align start and stop points on 2.
 		 */
-		region->offset = (uint32_t)img->buf.offset;
+		region->offset = (u32)img->buf.offset;
 		region->count = 1;
 		region->start = 0;
-		region->end = (uint32_t)img_size;
-		region->size = (uint32_t)img_size;
+		region->end = (u32)img_size;
+		region->size = (u32)img_size;
 	}
 }
 
@@ -2272,6 +2272,8 @@ static int resolve_hwmem(struct b2r2_blt_img *img,
 	enum hwmem_mem_type mem_type;
 	enum hwmem_access access;
 	enum hwmem_access required_access;
+	struct hwmem_mem_chunk mem_chunk;
+	size_t mem_chunk_length = 1;
 	struct hwmem_region region;
 
 	resolved_buf->hwmem_alloc =
@@ -2308,13 +2310,14 @@ static int resolve_hwmem(struct b2r2_blt_img *img,
 		goto size_check_failed;
 	}
 
-	return_value = hwmem_pin(resolved_buf->hwmem_alloc,
-				&resolved_buf->file_physical_start, NULL);
+	return_value = hwmem_pin(resolved_buf->hwmem_alloc, &mem_chunk,
+							 &mem_chunk_length);
 	if (return_value < 0) {
 		b2r2_log_info("%s: hwmem_pin failed, "
 				"error code: %i\n", __func__, return_value);
 		goto pin_failed;
 	}
+	resolved_buf->file_physical_start = mem_chunk.paddr;
 
 	set_up_hwmem_region(img, rect_2b_used, &region);
 	return_value = hwmem_set_domain(resolved_buf->hwmem_alloc,
diff --git a/drivers/video/mcde/mcde_fb.c b/drivers/video/mcde/mcde_fb.c
index ae21f46b0a1..2390bd742df 100644
--- a/drivers/video/mcde/mcde_fb.c
+++ b/drivers/video/mcde/mcde_fb.c
@@ -209,9 +209,10 @@ static int init_var_fmt(struct fb_var_screeninfo *var,
 static int reallocate_fb_mem(struct fb_info *fbi, u32 size)
 {
 	struct mcde_fb *mfb = to_mcde_fb(fbi);
-	dma_addr_t paddr;
 	void *vaddr;
 	struct hwmem_alloc *alloc;
+	struct hwmem_mem_chunk mem_chunk;
+	size_t num_mem_chunks = 1;
 	int name;
 
 	size = PAGE_ALIGN(size);
@@ -228,7 +229,7 @@ static int reallocate_fb_mem(struct fb_info *fbi, u32 size)
 			MCDE_FB_VYRES_MAX;
 #endif
 
-		alloc = hwmem_alloc(size, HWMEM_ALLOC_BUFFERED,
+		alloc = hwmem_alloc(size, HWMEM_ALLOC_HINT_WRITE_COMBINE,
 				(HWMEM_ACCESS_READ  | HWMEM_ACCESS_WRITE |
 					HWMEM_ACCESS_IMPORT),
 				HWMEM_MEM_CONTIGUOUS_SYS);
@@ -247,7 +248,7 @@ static int reallocate_fb_mem(struct fb_info *fbi, u32 size)
 			hwmem_release(mfb->alloc);
 		}
 
-		(void)hwmem_pin(alloc, &paddr, NULL);
+		(void)hwmem_pin(alloc, &mem_chunk, &num_mem_chunks);
 
 		vaddr = hwmem_kmap(alloc);
 		if (vaddr == NULL) {
@@ -260,7 +261,7 @@ static int reallocate_fb_mem(struct fb_info *fbi, u32 size)
 		mfb->alloc_name = name;
 
 		fbi->screen_base = vaddr;
-		fbi->fix.smem_start = paddr;
+		fbi->fix.smem_start = mem_chunk.paddr;
 
 #ifdef CONFIG_MCDE_FB_AVOID_REALLOC
 		size = old_size;
-- 
cgit v1.2.3


From 6a3fc0aedb5f71e63a438e75c9019fbb35f4e38d Mon Sep 17 00:00:00 2001
From: Philippe Langlais <philippe.langlais@linaro.org>
Date: Thu, 5 May 2011 11:33:35 +0200
Subject: ux500: mcde: Remove unused file

Removes mcde.c from ux500 directory

ST-Ericsson ID: AP326432

Change-Id: I6cf4634bbd1d86bc18a10fc431ccaf8d0798a41d
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/17782
Reviewed-by: Dan JOHANSSON <dan.johansson@stericsson.com>
Tested-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>

Conflicts:

	arch/arm/mach-ux500/mcde.c
---
 arch/arm/mach-ux500/mcde.c | 102 ---------------------------------------------
 1 file changed, 102 deletions(-)
 delete mode 100644 arch/arm/mach-ux500/mcde.c

diff --git a/arch/arm/mach-ux500/mcde.c b/arch/arm/mach-ux500/mcde.c
deleted file mode 100644
index e3514d1761b..00000000000
--- a/arch/arm/mach-ux500/mcde.c
+++ /dev/null
@@ -1,102 +0,0 @@
-/*
- * Copyright (C) ST-Ericsson AB 2010
- *
- * MOP500/HREF500 ed/v1 Display platform devices
- *
- * Author: Marcus Lorentzon <marcus.xm.lorentzon@stericsson.com>
- * for ST-Ericsson.
- *
- * License terms: GNU General Public License (GPL), version 2.
- */
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/device.h>
-#include <linux/platform_device.h>
-#include <mach/hardware.h>
-#include <mach/irqs.h>
-#include <video/mcde.h>
-#include <mach/prcmu-fw-api.h>
-
-static struct resource mcde_resources[] = {
-	[0] = {
-		.name  = MCDE_IO_AREA,
-		.start = U8500_MCDE_BASE,
-		.end   = U8500_MCDE_BASE + 0x1000 - 1, /* TODO: Fix size */
-		.flags = IORESOURCE_MEM,
-	},
-	[1] = {
-		.name  = MCDE_IO_AREA,
-		.start = U8500_DSI_LINK1_BASE,
-		.end   = U8500_DSI_LINK1_BASE + U8500_DSI_LINK_SIZE - 1,
-		.flags = IORESOURCE_MEM,
-	},
-	[2] = {
-		.name  = MCDE_IO_AREA,
-		.start = U8500_DSI_LINK2_BASE,
-		.end   = U8500_DSI_LINK2_BASE + U8500_DSI_LINK_SIZE - 1,
-		.flags = IORESOURCE_MEM,
-	},
-	[3] = {
-		.name  = MCDE_IO_AREA,
-		.start = U8500_DSI_LINK3_BASE,
-		.end   = U8500_DSI_LINK3_BASE + U8500_DSI_LINK_SIZE - 1,
-		.flags = IORESOURCE_MEM,
-	},
-	[4] = {
-		.name  = MCDE_IRQ,
-		.start = IRQ_DB8500_DISP,
-		.end   = IRQ_DB8500_DISP,
-		.flags = IORESOURCE_IRQ,
-	},
-};
-
-
-static int mcde_platform_enable(void)
-{
-	return prcmu_enable_dsipll();
-}
-
-static int mcde_platform_disable(void)
-{
-	return prcmu_disable_dsipll();
-}
-
-static void dev_release_noop(struct device *dev)
-{
-	/* Do nothing */
-}
-
-static struct mcde_platform_data mcde_pdata = {
-	.num_dsilinks = 3,
-	/*
-	 * [0] = 3: 24 bits DPI: connect LSB Ch B to D[0:7]
-	 * [3] = 4: 24 bits DPI: connect MID Ch B to D[24:31]
-	 * [4] = 5: 24 bits DPI: connect MSB Ch B to D[32:39]
-	 *
-	 * [1] = 3: TV out     : connect LSB Ch B to D[8:15]
-	 */
-#define DONT_CARE 0
-	.outmux = { 3, 3, DONT_CARE, 4, 5 },
-#undef DONT_CARE
-	.syncmux = 0x00,  /* DPI channel A and B on output pins A and B resp */
-	.regulator_vana_id = "v-ana",
-	.regulator_mcde_epod_id = "vsupply",
-	.regulator_esram_epod_id = "v-esram34",
-	.clock_dsi_id = "hdmi",
-	.clock_dsi_lp_id = "tv",
-	.clock_dpi_id = "lcd",
-	.clock_mcde_id = "mcde",
-	.platform_enable = mcde_platform_enable,
-	.platform_disable = mcde_platform_disable,
-};
-
-struct platform_device ux500_mcde_device = {
-	.name = "mcde",
-	.id = -1,
-	.dev = {
-		.release = dev_release_noop,
-		.platform_data = &mcde_pdata,
-	},
-	.num_resources = ARRAY_SIZE(mcde_resources),
-	.resource = mcde_resources,
-};
-- 
cgit v1.2.3


From 93dcedea9bae06cb5e677542def693605b4d0c86 Mon Sep 17 00:00:00 2001
From: Robert Fekete <robert.fekete@stericsson.com>
Date: Wed, 16 Mar 2011 13:50:48 +0100
Subject: B2R2: Remove bluish tone when using yuv422i

Correction of format checked for in bool is_yvu_fmt.

ST-Ericsson ID: ER 328908
ST-Ericsson FOSS-OUT ID: STETL-FOSS-OUT-10068

Change-Id: I0df2df5ae2226b4828271b9e543c5fd70338a2ca
Signed-off-by: Robert Fekete <robert.fekete@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/18474
Reviewed-by: Maciej SOCHA <maciej.socha@stericsson.com>
Reviewed-by: Jonas ABERG <jonas.aberg@stericsson.com>
---
 drivers/video/b2r2/b2r2_node_split.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/video/b2r2/b2r2_node_split.c b/drivers/video/b2r2/b2r2_node_split.c
index 1ffc3d688ef..9d9c6eb0848 100644
--- a/drivers/video/b2r2/b2r2_node_split.c
+++ b/drivers/video/b2r2/b2r2_node_split.c
@@ -2769,7 +2769,7 @@ static bool is_yuv_fmt(enum b2r2_blt_fmt fmt)
 static bool is_yvu_fmt(enum b2r2_blt_fmt fmt)
 {
 	switch (fmt) {
-	case B2R2_BLT_FMT_CB_Y_CR_Y:
+	case B2R2_BLT_FMT_Y_CB_Y_CR:
 		return true;
 	default:
 		return false;
-- 
cgit v1.2.3


From 647fcbfe12ae4ee20b33d4a08a21c9a6de4fab2c Mon Sep 17 00:00:00 2001
From: Philippe Langlais <philippe.langlais@stericsson.com>
Date: Tue, 11 Oct 2011 16:04:04 +0200
Subject: video: HWMEM: Make user space include linux/types.h

__x32 are defined in linux/types.h which is therefore needed in user space
also. This patch also adds the uncached flag when allocating the FB to
ensure we don't get a cached FB.

Depends-On: I9a45ad54a0cc8a5cdb1e3b9038ad50aeacb3f9c3

ST-Ericsson ID: AP 327001
ST-Ericsson FOSS-OUT ID: STETL-FOSS-OUT-10068

Change-Id: I3df94e161be96dd2f55928daab3eb20837b92c1d
Signed-off-by: Johan Mossberg <johan.xx.mossberg@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/18551
Reviewed-by: Jonas ABERG <jonas.aberg@stericsson.com>
---
 drivers/video/mcde/mcde_fb.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/video/mcde/mcde_fb.c b/drivers/video/mcde/mcde_fb.c
index 2390bd742df..a06989ea2b0 100644
--- a/drivers/video/mcde/mcde_fb.c
+++ b/drivers/video/mcde/mcde_fb.c
@@ -229,9 +229,10 @@ static int reallocate_fb_mem(struct fb_info *fbi, u32 size)
 			MCDE_FB_VYRES_MAX;
 #endif
 
-		alloc = hwmem_alloc(size, HWMEM_ALLOC_HINT_WRITE_COMBINE,
+		alloc = hwmem_alloc(size, HWMEM_ALLOC_HINT_WRITE_COMBINE |
+				HWMEM_ALLOC_HINT_UNCACHED,
 				(HWMEM_ACCESS_READ  | HWMEM_ACCESS_WRITE |
-					HWMEM_ACCESS_IMPORT),
+				HWMEM_ACCESS_IMPORT),
 				HWMEM_MEM_CONTIGUOUS_SYS);
 		if (IS_ERR(alloc))
 			return PTR_ERR(alloc);
-- 
cgit v1.2.3


From f91941dfae3258641154731f8d6a01567ce79fdd Mon Sep 17 00:00:00 2001
From: Marcel Tunnissen <Marcel.Tuennissen@stericsson.com>
Date: Thu, 17 Mar 2011 09:23:48 +0100
Subject: video: mcde: Remove special SDTV watermark level

This will remove the special setting for the watermark level in MCDE for
SDTV out through AV8100. As a consequence MCDE setup is independent of
AV8100 running SDTV or HDMI.

ST-Ericsson ID: AP 329318
Linux-next: ST-Ericsson ID: ER 282779

ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I65e80303a76c9a7887611fea8284cb4598b37c83
Signed-off-by: Marcel Tunnissen <Marcel.Tuennissen@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/18526
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
Tested-by: Marcel TUNNISSEN <marcel.tuennissen@stericsson.com>
Reviewed-by: Dan JOHANSSON <dan.johansson@stericsson.com>
Reviewed-by: Jonas ABERG <jonas.aberg@stericsson.com>
---
 drivers/video/mcde/mcde_hw.c | 15 +++++----------
 1 file changed, 5 insertions(+), 10 deletions(-)

diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index 10420180fe4..1b171017161 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -1443,16 +1443,11 @@ static void update_overlay_registers(u8 idx, struct ovly_regs *regs,
 
 	fifo_size = get_output_fifo_size(fifo);
 
-	if (port->hdmi_sdtv_switch == SDTV_SWITCH)
-		/* TODO: check if these wtrmrk levels work for HDMI as well. */
-		pixelfetchwtrmrklevel = MCDE_PIXFETCH_SMALL_WTRMRKLVL;
-	else {
-		if ((fifo == MCDE_FIFO_A || fifo == MCDE_FIFO_B) &&
-				regs->ppl >= fifo_size * 2)
-			pixelfetchwtrmrklevel = MCDE_PIXFETCH_LARGE_WTRMRKLVL;
-		else
-			pixelfetchwtrmrklevel = MCDE_PIXFETCH_MEDIUM_WTRMRKLVL;
-	}
+	if ((fifo == MCDE_FIFO_A || fifo == MCDE_FIFO_B) &&
+			regs->ppl >= fifo_size * 2)
+		pixelfetchwtrmrklevel = MCDE_PIXFETCH_LARGE_WTRMRKLVL;
+	else
+		pixelfetchwtrmrklevel = MCDE_PIXFETCH_MEDIUM_WTRMRKLVL;
 
 	if (regs->reset_buf_id) {
 		u32 sel_mod = MCDE_EXTSRC0CR_SEL_MOD_SOFTWARE_SEL;
-- 
cgit v1.2.3


From aff0d5bd44a34e6fe3d5cf6bf2eba61e909502a5 Mon Sep 17 00:00:00 2001
From: Marcel Tunnissen <Marcel.Tuennissen@stericsson.com>
Date: Thu, 17 Mar 2011 14:00:41 +0100
Subject: video: av8100: Fix occurences of test pattern

Fixes random occurences of test pattern for SDTV through AV8100, caused
by uninitialized memory.

ST-Ericsson ID: ER 329441
Linux-next: ST-Ericsson ID: ER 282779

ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: Idfed6bb2d4418345488c54ead4b19e30e9dc653e
Signed-off-by: Marcel Tunnissen <Marcel.Tuennissen@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/18563
Tested-by: Marcel TUNNISSEN <marcel.tuennissen@stericsson.com>
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Reviewed-by: Dan JOHANSSON <dan.johansson@stericsson.com>
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
Reviewed-by: Jonas ABERG <jonas.aberg@stericsson.com>
---
 drivers/video/av8100/av8100.c       | 3 +++
 drivers/video/mcde/display-av8100.c | 2 ++
 2 files changed, 5 insertions(+)

diff --git a/drivers/video/av8100/av8100.c b/drivers/video/av8100/av8100.c
index 1db66172e0d..b60ab2f7bf5 100644
--- a/drivers/video/av8100/av8100.c
+++ b/drivers/video/av8100/av8100.c
@@ -833,6 +833,9 @@ static int av8100_config_init(void)
 	config.denc_format.enable = 0;
 	config.denc_format.macrovision_enable = 0;
 	config.denc_format.internal_generator = 0;
+	retval = av8100_conf_prep(AV8100_COMMAND_DENC, &config);
+	if (retval)
+		return -EFAULT;
 
 	/* Video output */
 	config.video_output_format.video_output_cea_vesa =
diff --git a/drivers/video/mcde/display-av8100.c b/drivers/video/mcde/display-av8100.c
index 163af1c3361..b55f144923f 100644
--- a/drivers/video/mcde/display-av8100.c
+++ b/drivers/video/mcde/display-av8100.c
@@ -725,6 +725,8 @@ static int hdmi_on_first_update(struct mcde_display_device *dev)
 	 * Note HDMI and DENC are always turned off in set_video_mode.
 	 */
 	if (dev->port->hdmi_sdtv_switch == SDTV_SWITCH) {
+		if (av8100_conf_get(AV8100_COMMAND_DENC, &av8100_config))
+			return -EFAULT;
 		av8100_config.denc_format.enable = 1;
 		if (dev->video_mode.yres == NATIVE_YRES_SDTV) {
 			av8100_config.denc_format.standard_selection =
-- 
cgit v1.2.3


From ef673583d7edac1f26025066efbbda74041a9be0 Mon Sep 17 00:00:00 2001
From: Maciej Socha <maciej.socha@stericsson.com>
Date: Fri, 18 Mar 2011 05:35:10 +0100
Subject: B2R2: Correct output for combined scale and rotation.

Corrects output on optimized path for scaling operations
that use different horizontal and vertical scale factors
and combine this with rotation.

ST-Ericsson ID: ER 328924
ST-Ericsson FOSS-OUT ID: STETL-FOSS-OUT-10068

Change-Id: I1c9e5154fc74141eb7f7f26450b748e21fdab7e1
Signed-off-by: Maciej Socha <maciej.socha@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/18607
Reviewed-by: Nils CALMSUND <nils.calmsund@stericsson.com>
Reviewed-by: Jonas ABERG <jonas.aberg@stericsson.com>
Reviewed-by: Robert FEKETE <robert.fekete@stericsson.com>
Tested-by: Robert FEKETE <robert.fekete@stericsson.com>
---
 drivers/video/b2r2/b2r2_node_split.c | 58 +++++++++++++++++++-----------------
 1 file changed, 31 insertions(+), 27 deletions(-)

diff --git a/drivers/video/b2r2/b2r2_node_split.c b/drivers/video/b2r2/b2r2_node_split.c
index 9d9c6eb0848..d6891a17e8c 100644
--- a/drivers/video/b2r2/b2r2_node_split.c
+++ b/drivers/video/b2r2/b2r2_node_split.c
@@ -301,9 +301,8 @@ int b2r2_node_split_analyze(const struct b2r2_blt_request *req,
 	if (this->flags & B2R2_BLT_FLAG_DITHER)
 		this->dst.dither = B2R2_TTY_RGB_ROUND_DITHER;
 
-	if (this->flags & B2R2_BLT_FLAG_SOURCE_COLOR_KEY) {
+	if (this->flags & B2R2_BLT_FLAG_SOURCE_COLOR_KEY)
 		this->flag_param = req->user_req.src_color;
-	}
 
 	/* Check for blending */
 	if ((this->flags & B2R2_BLT_FLAG_GLOBAL_ALPHA_BLEND) &&
@@ -765,7 +764,8 @@ static int analyze_color_fill(struct b2r2_node_split_job *this,
 						this->src.color);
 		}
 
-		ret = analyze_fmt_conv(&this->src, &this->dst, &this->ivmx, node_count);
+		ret = analyze_fmt_conv(&this->src, &this->dst,
+			&this->ivmx, node_count);
 		if (ret < 0)
 			goto error;
 	}
@@ -895,7 +895,8 @@ static int analyze_copy(struct b2r2_node_split_job *this,
 
 		this->type = B2R2_COPY;
 
-		ret = analyze_fmt_conv(&this->src, &this->dst, &this->ivmx, &copy_count);
+		ret = analyze_fmt_conv(&this->src, &this->dst, &this->ivmx,
+			&copy_count);
 		if (ret < 0)
 			goto error;
 
@@ -955,7 +956,8 @@ static int analyze_rot_scale_downscale(struct b2r2_node_split_job *this,
 	tmp->win.width = min(tmp->win.width, dst->rect.height);
 	tmp->win.height = dst->rect.width;
 
-	setup_tmp_buf(tmp, this->max_buf_size, dst->fmt, tmp->win.width, tmp->win.height);
+	setup_tmp_buf(tmp, this->max_buf_size, dst->fmt, tmp->win.width,
+		tmp->win.height);
 	tmp->tmp_buf_index = 1;
 	this->work_bufs[0].size = tmp->pitch * tmp->height;
 
@@ -1067,9 +1069,11 @@ static int analyze_rot_scale(struct b2r2_node_split_job *this,
 	upscale = (u32)this->h_rsf * (u32)this->v_rsf < (1 << 20);
 
 	if (upscale)
-		ret = analyze_rot_scale_upscale(this, req, node_count, buf_count);
+		ret = analyze_rot_scale_upscale(this, req, node_count,
+			buf_count);
 	else
-		ret = analyze_rot_scale_downscale(this, req, node_count, buf_count);
+		ret = analyze_rot_scale_downscale(this, req, node_count,
+			buf_count);
 
 	if (ret < 0)
 		goto error;
@@ -1103,7 +1107,8 @@ static int analyze_scaling(struct b2r2_node_split_job *this,
 		goto error;
 
 	/* Find out how many nodes a simple copy would require */
-	ret = analyze_fmt_conv(&this->src, &this->dst, &this->ivmx, &copy_count);
+	ret = analyze_fmt_conv(&this->src, &this->dst, &this->ivmx,
+		&copy_count);
 	if (ret < 0)
 		goto error;
 
@@ -1243,13 +1248,13 @@ static int analyze_scale_factors(struct b2r2_node_split_job *this)
 	u16 vsf;
 
 	if (this->rotation) {
-		ret = calculate_scale_factor(this->src.rect.height,
-					this->dst.rect.width, &hsf);
+		ret = calculate_scale_factor(this->src.rect.width,
+					this->dst.rect.height, &hsf);
 		if (ret < 0)
 			goto error;
 
-		ret = calculate_scale_factor(this->src.rect.width,
-					this->dst.rect.height, &vsf);
+		ret = calculate_scale_factor(this->src.rect.height,
+					this->dst.rect.width, &vsf);
 		if (ret < 0)
 			goto error;
 	} else {
@@ -1484,7 +1489,8 @@ static int configure_sub_rot(struct b2r2_node *node,
 
 			b2r2_log_info("%s: y_pixels=%d\n", __func__, y_pixels);
 
-			ret = configure_rotate(node, src, dst, ivmx, &node, job);
+			ret = configure_rotate(node, src, dst, ivmx,
+				&node, job);
 			if (ret < 0)
 				goto error;
 
@@ -1782,11 +1788,12 @@ static int configure_copy(struct b2r2_node *node,
 		}
 
 		node->node.GROUP0.B2R2_ACK |= B2R2_ACK_MODE_BYPASS_S2_S3;
-		if (this != NULL &&
-				(this->flags & B2R2_BLT_FLAG_SOURCE_COLOR_KEY) != 0) {
+		if (this != NULL && (this->flags &
+				B2R2_BLT_FLAG_SOURCE_COLOR_KEY) != 0) {
 			u32 key_color = 0;
 
-			node->node.GROUP0.B2R2_ACK |= B2R2_ACK_CKEY_SEL_SRC_AFTER_CLUT |
+			node->node.GROUP0.B2R2_ACK |=
+				B2R2_ACK_CKEY_SEL_SRC_AFTER_CLUT |
 				B2R2_ACK_CKEY_RED_MATCH_IF_BETWEEN |
 				B2R2_ACK_CKEY_GREEN_MATCH_IF_BETWEEN |
 				B2R2_ACK_CKEY_BLUE_MATCH_IF_BETWEEN;
@@ -1798,14 +1805,15 @@ static int configure_copy(struct b2r2_node *node,
 			node->node.GROUP12.B2R2_KEY2 = key_color;
 		}
 
-		if (this != NULL &&
-				(this->flags & B2R2_BLT_FLAG_CLUT_COLOR_CORRECTION) != 0) {
+		if (this != NULL && (this->flags &
+				B2R2_BLT_FLAG_CLUT_COLOR_CORRECTION) != 0) {
 			struct b2r2_blt_request *request =
 				container_of(this, struct b2r2_blt_request,
 						node_split_job);
 			node->node.GROUP0.B2R2_INS |= B2R2_INS_CLUTOP_ENABLED;
 			node->node.GROUP0.B2R2_CIC |= B2R2_CIC_CLUT;
-			node->node.GROUP7.B2R2_CCO = B2R2_CCO_CLUT_COLOR_CORRECTION |
+			node->node.GROUP7.B2R2_CCO =
+				B2R2_CCO_CLUT_COLOR_CORRECTION |
 				B2R2_CCO_CLUT_UPDATE;
 			node->node.GROUP7.B2R2_CML = request->clut_phys_addr;
 		}
@@ -3109,9 +3117,8 @@ static void set_target(struct b2r2_node *node, u32 addr,
 	s32 t;
 	s32 b;
 
-	if (buf->tmp_buf_index) {
+	if (buf->tmp_buf_index)
 		node->dst_tmp_index = buf->tmp_buf_index;
-	}
 
 	node->node.GROUP1.B2R2_TBA = addr;
 	node->node.GROUP1.B2R2_TTY = buf->pitch | to_native_fmt(buf->fmt) |
@@ -3180,9 +3187,8 @@ static void set_src(struct b2r2_src_config *src, u32 addr,
 static void set_src_1(struct b2r2_node *node, u32 addr,
 		struct b2r2_node_split_buf *buf)
 {
-	if (buf->tmp_buf_index) {
+	if (buf->tmp_buf_index)
 		node->src_tmp_index = buf->tmp_buf_index;
-	}
 
 	node->src_index = 1;
 
@@ -3205,9 +3211,8 @@ static void set_src_1(struct b2r2_node *node, u32 addr,
 static void set_src_2(struct b2r2_node *node, u32 addr,
 		struct b2r2_node_split_buf *buf)
 {
-	if (buf->tmp_buf_index) {
+	if (buf->tmp_buf_index)
 		node->src_tmp_index = buf->tmp_buf_index;
-	}
 
 	node->src_index = 2;
 
@@ -3223,9 +3228,8 @@ static void set_src_2(struct b2r2_node *node, u32 addr,
 static void set_src_3(struct b2r2_node *node, u32 addr,
 		struct b2r2_node_split_buf *buf)
 {
-	if (buf->tmp_buf_index) {
+	if (buf->tmp_buf_index)
 		node->src_tmp_index = buf->tmp_buf_index;
-	}
 
 	node->src_index = 3;
 
-- 
cgit v1.2.3


From 86ac6571fca2ec09235e2101fd5b765f4314184a Mon Sep 17 00:00:00 2001
From: Maciej Socha <maciej.socha@stericsson.com>
Date: Wed, 23 Mar 2011 13:23:40 +0100
Subject: video: B2R2: Add support for YVU420/2_PACKED_(SEMI)_PLANAR.

The new formats differ from their YUV counterparts only
by the order of chroma samples. In YVU formats red chroma
(V-component) comes before blue, whereas in YUV formats it is
the other way around.

ST-Ericsson ID: ER 325111
ST-Ericsson FOSS-OUT ID: STETL-FOSS-OUT-10068

Change-Id: Ib7b2eb8bf36623a88fca87e34aacdff77c0df030
Signed-off-by: Maciej Socha <maciej.socha@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/18952
Reviewed-by: Robert LIND <robert.lind@stericsson.com>
Reviewed-by: Magnus SMITH <magnus.xm.smith@stericsson.com>
Reviewed-by: QATOOLS
Reviewed-by: Robert FEKETE <robert.fekete@stericsson.com>
Reviewed-by: Jonas ABERG <jonas.aberg@stericsson.com>
---
 drivers/video/b2r2/b2r2_generic.c          | 910 ++++++++++++++++++++---------
 drivers/video/b2r2/b2r2_generic.h          |  10 +-
 drivers/video/b2r2/b2r2_input_validation.c |  37 +-
 drivers/video/b2r2/b2r2_node_split.c       | 106 +++-
 drivers/video/b2r2/b2r2_utils.c            |  22 +-
 include/video/b2r2_blt.h                   |  30 +
 6 files changed, 788 insertions(+), 327 deletions(-)

diff --git a/drivers/video/b2r2/b2r2_generic.c b/drivers/video/b2r2/b2r2_generic.c
index 533de169409..d2228e3cf8a 100644
--- a/drivers/video/b2r2/b2r2_generic.c
+++ b/drivers/video/b2r2/b2r2_generic.c
@@ -47,8 +47,10 @@ static void reset_nodes(struct b2r2_node *node)
 		/* TODO: Implement support for short linked lists */
 		node->node.GROUP0.B2R2_CIC = 0x7fffc;
 
-		if (node->next != NULL)
-			node->node.GROUP0.B2R2_NIP = node->next->physical_address;
+		if (node->next == NULL)
+			break;
+
+		node->node.GROUP0.B2R2_NIP = node->next->physical_address;
 
 		node = node->next;
 	}
@@ -191,12 +193,16 @@ static inline enum b2r2_native_fmt to_native_fmt(enum b2r2_blt_fmt fmt)
 		return B2R2_NATIVE_YCBCR422R;
 	case B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR:
 	case B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YVU420_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YVU422_PACKED_SEMI_PLANAR:
 		return B2R2_NATIVE_YCBCR42X_R2B;
 	case B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE:
 	case B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE:
 		return B2R2_NATIVE_YCBCR42X_MBN;
 	case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
 	case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YVU420_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YVU422_PACKED_PLANAR:
 	case B2R2_BLT_FMT_YUV444_PACKED_PLANAR:
 		return B2R2_NATIVE_YUV;
 	default:
@@ -273,8 +279,12 @@ static unsigned int get_pitch(enum b2r2_blt_fmt format, u32 width)
 	/* fall through, same pitch and pointers */
 	case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
 	case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YVU420_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YVU422_PACKED_PLANAR:
 	case B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR:
 	case B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YVU420_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YVU422_PACKED_SEMI_PLANAR:
 		/* width of the buffer must be a multiple of 2 */
 		if (width & 1) {
 			b2r2_log_warn("%s: Illegal width "
@@ -342,6 +352,7 @@ static s32 validate_buf(const struct b2r2_blt_img *image,
 	/* format specific adjustments */
 	switch (image->fmt) {
 	case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YVU420_PACKED_PLANAR:
 		/*
 		 * Use ceil(height/2) in case buffer height
 		 * is not divisible by 2.
@@ -350,11 +361,13 @@ static s32 validate_buf(const struct b2r2_blt_img *image,
 			(pitch >> 1) * ((image->height + 1) >> 1) * 2;
 		break;
 	case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YVU422_PACKED_PLANAR:
 		expect_buf_size += (pitch >> 1) * image->height * 2;
 		break;
 	case B2R2_BLT_FMT_YUV444_PACKED_PLANAR:
 		expect_buf_size += pitch * image->height * 2;
 		break;
+	case B2R2_BLT_FMT_YVU420_PACKED_SEMI_PLANAR:
 	case B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR:
 		/*
 		 * include space occupied by U and V data.
@@ -365,6 +378,7 @@ static s32 validate_buf(const struct b2r2_blt_img *image,
 		 */
 		expect_buf_size += pitch * ((image->height + 1) >> 1);
 		break;
+	case B2R2_BLT_FMT_YVU422_PACKED_SEMI_PLANAR:
 	case B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR:
 		/*
 		 * include space occupied by U and V data.
@@ -466,6 +480,174 @@ static u32 to_RGB888(u32 color, const enum b2r2_blt_fmt fmt)
 	return out_color;
 }
 
+
+static void setup_fill_input_stage(const struct b2r2_blt_request *req,
+					struct b2r2_node *node,
+					struct b2r2_work_buf *out_buf)
+{
+	enum b2r2_native_fmt fill_fmt = 0;
+	u32 src_color = req->user_req.src_color;
+	const struct b2r2_blt_img *dst_img = &(req->user_req.dst_img);
+	b2r2_log_info("%s ENTRY\n", __func__);
+
+	/* Determine format in src_color */
+	switch (dst_img->fmt) {
+	/* ARGB formats */
+	case B2R2_BLT_FMT_16_BIT_ARGB4444:
+	case B2R2_BLT_FMT_16_BIT_ARGB1555:
+	case B2R2_BLT_FMT_16_BIT_RGB565:
+	case B2R2_BLT_FMT_24_BIT_RGB888:
+	case B2R2_BLT_FMT_32_BIT_ARGB8888:
+	case B2R2_BLT_FMT_32_BIT_ABGR8888:
+	case B2R2_BLT_FMT_24_BIT_ARGB8565:
+	case B2R2_BLT_FMT_1_BIT_A1:
+	case B2R2_BLT_FMT_8_BIT_A8:
+		if ((req->user_req.flags & B2R2_BLT_FLAG_SOURCE_FILL) != 0) {
+			fill_fmt = B2R2_NATIVE_ARGB8888;
+		} else {
+			/* SOURCE_FILL_RAW */
+			fill_fmt = to_native_fmt(dst_img->fmt);
+			if (dst_img->fmt == B2R2_BLT_FMT_32_BIT_ABGR8888) {
+				/*
+				 * Color is read from a register,
+				 * where it is stored in ABGR format.
+				 * Set up IVMX.
+				 */
+				node->node.GROUP0.B2R2_INS |=
+						B2R2_INS_IVMX_ENABLED;
+				node->node.GROUP0.B2R2_CIC |= B2R2_CIC_IVMX;
+				node->node.GROUP15.B2R2_VMX0 =
+						B2R2_VMX0_RGB_TO_BGR;
+				node->node.GROUP15.B2R2_VMX1 =
+						B2R2_VMX1_RGB_TO_BGR;
+				node->node.GROUP15.B2R2_VMX2 =
+						B2R2_VMX2_RGB_TO_BGR;
+				node->node.GROUP15.B2R2_VMX3 =
+						B2R2_VMX3_RGB_TO_BGR;
+			}
+		}
+		break;
+	/* YUV formats */
+	case B2R2_BLT_FMT_Y_CB_Y_CR:
+	case B2R2_BLT_FMT_CB_Y_CR_Y:
+	case B2R2_BLT_FMT_24_BIT_YUV888:
+	case B2R2_BLT_FMT_32_BIT_AYUV8888:
+	case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YVU420_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YVU422_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YUV444_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YVU420_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YVU422_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE:
+	case B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE:
+		/*
+		 * Set up IVMX
+		 * The destination format is in fact YUV,
+		 * but the input stage stores the data in
+		 * an intermediate buffer which is RGB.
+		 * Hence the conversion from YUV to RGB.
+		 */
+		node->node.GROUP0.B2R2_INS |= B2R2_INS_IVMX_ENABLED;
+		node->node.GROUP0.B2R2_CIC |= B2R2_CIC_IVMX;
+		node->node.GROUP15.B2R2_VMX0 = B2R2_VMX0_YUV_TO_RGB_601_VIDEO;
+		node->node.GROUP15.B2R2_VMX1 = B2R2_VMX1_YUV_TO_RGB_601_VIDEO;
+		node->node.GROUP15.B2R2_VMX2 = B2R2_VMX2_YUV_TO_RGB_601_VIDEO;
+		node->node.GROUP15.B2R2_VMX3 = B2R2_VMX3_YUV_TO_RGB_601_VIDEO;
+
+		if ((req->user_req.flags & B2R2_BLT_FLAG_SOURCE_FILL) != 0) {
+			fill_fmt = B2R2_NATIVE_AYCBCR8888;
+		} else {
+			/* SOURCE_FILL_RAW */
+			bool dst_yuv_planar =
+				B2R2_BLT_FMT_YUV420_PACKED_PLANAR ==
+					dst_img->fmt ||
+				B2R2_BLT_FMT_YUV422_PACKED_PLANAR ==
+					dst_img->fmt ||
+				B2R2_BLT_FMT_YVU420_PACKED_PLANAR ==
+					dst_img->fmt ||
+				B2R2_BLT_FMT_YVU422_PACKED_PLANAR ==
+					dst_img->fmt ||
+				B2R2_BLT_FMT_YUV444_PACKED_PLANAR ==
+					dst_img->fmt;
+
+			bool dst_yuv_semi_planar =
+				B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR ==
+					dst_img->fmt ||
+				B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR ==
+					dst_img->fmt ||
+				B2R2_BLT_FMT_YVU420_PACKED_SEMI_PLANAR ==
+					dst_img->fmt ||
+				B2R2_BLT_FMT_YVU422_PACKED_SEMI_PLANAR ==
+					dst_img->fmt ||
+				B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE ==
+					dst_img->fmt ||
+				B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE ==
+					dst_img->fmt;
+
+			if (dst_yuv_planar || dst_yuv_semi_planar) {
+				/*
+				 * SOURCE_FILL_RAW cannot be supported
+				 * with multi-buffer formats.
+				 * Force a legal format to prevent B2R2
+				 * from misbehaving.
+				 */
+				fill_fmt = B2R2_NATIVE_AYCBCR8888;
+			} else {
+				fill_fmt = to_native_fmt(dst_img->fmt);
+			}
+
+			if (dst_img->fmt == B2R2_BLT_FMT_Y_CB_Y_CR) {
+				/*
+				 * Setup input VMX to convert YVU to
+				 * RGB 601 VIDEO
+				 * Chroma components are swapped so
+				 * it is YVU and not YUV.
+				 */
+				node->node.GROUP15.B2R2_VMX0 =
+					B2R2_VMX0_YVU_TO_RGB_601_VIDEO;
+				node->node.GROUP15.B2R2_VMX1 =
+					B2R2_VMX1_YVU_TO_RGB_601_VIDEO;
+				node->node.GROUP15.B2R2_VMX2 =
+					B2R2_VMX2_YVU_TO_RGB_601_VIDEO;
+				node->node.GROUP15.B2R2_VMX3 =
+					B2R2_VMX3_YVU_TO_RGB_601_VIDEO;
+			}
+		}
+		break;
+	default:
+		src_color = 0;
+		fill_fmt = B2R2_NATIVE_ARGB8888;
+		break;
+	}
+
+	node->node.GROUP1.B2R2_TBA = out_buf->phys_addr;
+	node->node.GROUP1.B2R2_TTY =
+		(B2R2_GENERIC_WORK_BUF_PITCH << B2R2_TY_BITMAP_PITCH_SHIFT) |
+		B2R2_GENERIC_WORK_BUF_FMT |
+		B2R2_TY_ALPHA_RANGE_255 |
+		B2R2_TY_HSO_LEFT_TO_RIGHT |
+		B2R2_TY_VSO_TOP_TO_BOTTOM;
+	/* Set color fill on SRC2 channel */
+	node->node.GROUP4.B2R2_SBA = 0;
+	node->node.GROUP4.B2R2_STY =
+		(0 << B2R2_TY_BITMAP_PITCH_SHIFT) |
+		fill_fmt |
+		get_alpha_range(dst_img->fmt) |
+		B2R2_TY_HSO_LEFT_TO_RIGHT |
+		B2R2_TY_VSO_TOP_TO_BOTTOM;
+
+	node->node.GROUP0.B2R2_INS |=
+			B2R2_INS_SOURCE_2_COLOR_FILL_REGISTER;
+	node->node.GROUP0.B2R2_CIC |= B2R2_CIC_COLOR_FILL;
+	node->node.GROUP2.B2R2_S2CF = src_color;
+
+	node->node.GROUP0.B2R2_ACK |= B2R2_ACK_MODE_BYPASS_S2_S3;
+	b2r2_log_info("%s DONE\n", __func__);
+}
+
 static void setup_input_stage(const struct b2r2_blt_request *req,
 			      struct b2r2_node *node,
 			      struct b2r2_work_buf *out_buf)
@@ -476,7 +658,6 @@ static void setup_input_stage(const struct b2r2_blt_request *req,
 	const struct b2r2_blt_rect *src_rect = &(req->user_req.src_rect);
 	const struct b2r2_blt_rect *dst_rect = &(req->user_req.dst_rect);
 	const struct b2r2_blt_img *src_img = &(req->user_req.src_img);
-	const struct b2r2_blt_img *dst_img = &(req->user_req.dst_img);
 	u32 src_pitch = 0;
 	/* horizontal and vertical scan order for out_buf */
 	enum b2r2_ty dst_hso = B2R2_TY_HSO_LEFT_TO_RIGHT;
@@ -487,12 +668,16 @@ static void setup_input_stage(const struct b2r2_blt_request *req,
 	bool yuv_semi_planar =
 		src_img->fmt == B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR ||
 		src_img->fmt == B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR ||
+		src_img->fmt == B2R2_BLT_FMT_YVU420_PACKED_SEMI_PLANAR ||
+		src_img->fmt == B2R2_BLT_FMT_YVU422_PACKED_SEMI_PLANAR ||
 		src_img->fmt == B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE ||
 		src_img->fmt == B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE;
 
 	bool yuv_planar =
 		src_img->fmt == B2R2_BLT_FMT_YUV420_PACKED_PLANAR ||
 		src_img->fmt == B2R2_BLT_FMT_YUV422_PACKED_PLANAR ||
+		src_img->fmt == B2R2_BLT_FMT_YVU420_PACKED_PLANAR ||
+		src_img->fmt == B2R2_BLT_FMT_YVU422_PACKED_PLANAR ||
 		src_img->fmt == B2R2_BLT_FMT_YUV444_PACKED_PLANAR;
 
 	struct b2r2_filter_spec *hf;
@@ -503,151 +688,9 @@ static void setup_input_stage(const struct b2r2_blt_request *req,
 
 	b2r2_log_info("%s ENTRY\n", __func__);
 
-	if ((req->user_req.flags &
-			(B2R2_BLT_FLAG_SOURCE_FILL | B2R2_BLT_FLAG_SOURCE_FILL_RAW)) != 0) {
-		enum b2r2_native_fmt fill_fmt = 0;
-		u32 src_color = req->user_req.src_color;
-
-		/* Determine format in src_color */
-		switch (dst_img->fmt) {
-		/* ARGB formats */
-		case B2R2_BLT_FMT_16_BIT_ARGB4444:
-		case B2R2_BLT_FMT_16_BIT_ARGB1555:
-		case B2R2_BLT_FMT_16_BIT_RGB565:
-		case B2R2_BLT_FMT_24_BIT_RGB888:
-		case B2R2_BLT_FMT_32_BIT_ARGB8888:
-		case B2R2_BLT_FMT_32_BIT_ABGR8888:
-		case B2R2_BLT_FMT_24_BIT_ARGB8565:
-		case B2R2_BLT_FMT_1_BIT_A1:
-		case B2R2_BLT_FMT_8_BIT_A8:
-			if ((req->user_req.flags & B2R2_BLT_FLAG_SOURCE_FILL) != 0) {
-				fill_fmt = B2R2_NATIVE_ARGB8888;
-			} else {
-				/* SOURCE_FILL_RAW */
-				fill_fmt = to_native_fmt(dst_img->fmt);
-				if (dst_img->fmt == B2R2_BLT_FMT_32_BIT_ABGR8888) {
-					/*
-					 * Color is read from a register,
-					 * where it is stored in ABGR format.
-					 * Set up IVMX.
-					 */
-					node->node.GROUP0.B2R2_INS |=
-							B2R2_INS_IVMX_ENABLED;
-					node->node.GROUP0.B2R2_CIC |=
-							B2R2_CIC_IVMX;
-					node->node.GROUP15.B2R2_VMX0 =
-							B2R2_VMX0_RGB_TO_BGR;
-					node->node.GROUP15.B2R2_VMX1 =
-							B2R2_VMX1_RGB_TO_BGR;
-					node->node.GROUP15.B2R2_VMX2 =
-							B2R2_VMX2_RGB_TO_BGR;
-					node->node.GROUP15.B2R2_VMX3 =
-							B2R2_VMX3_RGB_TO_BGR;
-				}
-			}
-			break;
-		/* YUV formats */
-		case B2R2_BLT_FMT_Y_CB_Y_CR:
-		case B2R2_BLT_FMT_CB_Y_CR_Y:
-		case B2R2_BLT_FMT_24_BIT_YUV888:
-		case B2R2_BLT_FMT_32_BIT_AYUV8888:
-		case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
-		case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:
-		case B2R2_BLT_FMT_YUV444_PACKED_PLANAR:
-		case B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR:
-		case B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR:
-		case B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE:
-		case B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE:
-			/*
-			 * Set up IVMX
-			 * The destination format is in fact YUV,
-			 * but the input stage stores the data in
-			 * an intermediate buffer which is RGB.
-			 * Hence the conversion from YUV to RGB.
-			 */
-			node->node.GROUP0.B2R2_INS |= B2R2_INS_IVMX_ENABLED;
-			node->node.GROUP0.B2R2_CIC |= B2R2_CIC_IVMX;
-			node->node.GROUP15.B2R2_VMX0 = B2R2_VMX0_YUV_TO_RGB_601_VIDEO;
-			node->node.GROUP15.B2R2_VMX1 = B2R2_VMX1_YUV_TO_RGB_601_VIDEO;
-			node->node.GROUP15.B2R2_VMX2 = B2R2_VMX2_YUV_TO_RGB_601_VIDEO;
-			node->node.GROUP15.B2R2_VMX3 = B2R2_VMX3_YUV_TO_RGB_601_VIDEO;
-
-			if ((req->user_req.flags & B2R2_BLT_FLAG_SOURCE_FILL) != 0) {
-				fill_fmt = B2R2_NATIVE_AYCBCR8888;
-			} else {
-				/* SOURCE_FILL_RAW */
-				bool dst_yuv_planar =
-					dst_img->fmt == B2R2_BLT_FMT_YUV420_PACKED_PLANAR ||
-					dst_img->fmt == B2R2_BLT_FMT_YUV422_PACKED_PLANAR ||
-					dst_img->fmt == B2R2_BLT_FMT_YUV444_PACKED_PLANAR;
-
-				bool dst_yuv_semi_planar =
-					dst_img->fmt == B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR ||
-					dst_img->fmt == B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR ||
-					dst_img->fmt ==
-						B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE ||
-					dst_img->fmt ==
-						B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE;
-
-				if (dst_yuv_planar || dst_yuv_semi_planar) {
-					/*
-					 * SOURCE_FILL_RAW cannot be supported
-					 * with multi-buffer formats.
-					 * Force a legal format to prevent B2R2
-					 * from misbehaving.
-					 */
-					fill_fmt = B2R2_NATIVE_AYCBCR8888;
-				} else {
-					fill_fmt = to_native_fmt(dst_img->fmt);
-				}
-
-				if (dst_img->fmt == B2R2_BLT_FMT_Y_CB_Y_CR) {
-					/*
-					 * Setup input VMX to convert YVU to
-					 * RGB 601 VIDEO
-					 * Chroma components are swapped so
-					 * it is YVU and not YUV.
-					 */
-					node->node.GROUP15.B2R2_VMX0 =
-						B2R2_VMX0_YVU_TO_RGB_601_VIDEO;
-					node->node.GROUP15.B2R2_VMX1 =
-						B2R2_VMX1_YVU_TO_RGB_601_VIDEO;
-					node->node.GROUP15.B2R2_VMX2 =
-						B2R2_VMX2_YVU_TO_RGB_601_VIDEO;
-					node->node.GROUP15.B2R2_VMX3 =
-						B2R2_VMX3_YVU_TO_RGB_601_VIDEO;
-				}
-			}
-			break;
-		default:
-			src_color = 0;
-			fill_fmt = B2R2_NATIVE_ARGB8888;
-			break;
-		}
-
-		node->node.GROUP1.B2R2_TBA = out_buf->phys_addr;
-		node->node.GROUP1.B2R2_TTY =
-			(B2R2_GENERIC_WORK_BUF_PITCH << B2R2_TY_BITMAP_PITCH_SHIFT) |
-			B2R2_GENERIC_WORK_BUF_FMT |
-			B2R2_TY_ALPHA_RANGE_255 |
-			B2R2_TY_HSO_LEFT_TO_RIGHT |
-			B2R2_TY_VSO_TOP_TO_BOTTOM;
-		/* Set color fill on SRC2 channel */
-		node->node.GROUP4.B2R2_SBA = 0;
-		node->node.GROUP4.B2R2_STY =
-			(0 << B2R2_TY_BITMAP_PITCH_SHIFT) |
-			fill_fmt |
-			get_alpha_range(dst_img->fmt) |
-			B2R2_TY_HSO_LEFT_TO_RIGHT |
-			B2R2_TY_VSO_TOP_TO_BOTTOM;
-
-		node->node.GROUP0.B2R2_INS |=
-				B2R2_INS_SOURCE_2_COLOR_FILL_REGISTER;
-		node->node.GROUP0.B2R2_CIC |= B2R2_CIC_COLOR_FILL;
-		node->node.GROUP2.B2R2_S2CF = src_color;
-
-		node->node.GROUP0.B2R2_ACK |= B2R2_ACK_MODE_BYPASS_S2_S3;
-
+	if (((B2R2_BLT_FLAG_SOURCE_FILL | B2R2_BLT_FLAG_SOURCE_FILL_RAW) &
+			req->user_req.flags) != 0) {
+		setup_fill_input_stage(req, node, out_buf);
 		b2r2_log_info("%s DONE\n", __func__);
 		return;
 	}
@@ -732,24 +775,37 @@ static void setup_input_stage(const struct b2r2_blt_request *req,
 		if (src_img->fmt == B2R2_BLT_FMT_Y_CB_Y_CR) {
 			/*
 			 * Setup input VMX to convert YVU to RGB 601 VIDEO
-			 * Chroma components are swapped so it is YVU and not YUV.
+			 * Chroma components are swapped so
+			 * it is YVU and not YUV.
 			 */
-			node->node.GROUP15.B2R2_VMX0 = B2R2_VMX0_YVU_TO_RGB_601_VIDEO;
-			node->node.GROUP15.B2R2_VMX1 = B2R2_VMX1_YVU_TO_RGB_601_VIDEO;
-			node->node.GROUP15.B2R2_VMX2 = B2R2_VMX2_YVU_TO_RGB_601_VIDEO;
-			node->node.GROUP15.B2R2_VMX3 = B2R2_VMX3_YVU_TO_RGB_601_VIDEO;
+			node->node.GROUP15.B2R2_VMX0 =
+				B2R2_VMX0_YVU_TO_RGB_601_VIDEO;
+			node->node.GROUP15.B2R2_VMX1 =
+				B2R2_VMX1_YVU_TO_RGB_601_VIDEO;
+			node->node.GROUP15.B2R2_VMX2 =
+				B2R2_VMX2_YVU_TO_RGB_601_VIDEO;
+			node->node.GROUP15.B2R2_VMX3 =
+				B2R2_VMX3_YVU_TO_RGB_601_VIDEO;
 		} else {
-			node->node.GROUP15.B2R2_VMX0 = B2R2_VMX0_YUV_TO_RGB_601_VIDEO;
-			node->node.GROUP15.B2R2_VMX1 = B2R2_VMX1_YUV_TO_RGB_601_VIDEO;
-			node->node.GROUP15.B2R2_VMX2 = B2R2_VMX2_YUV_TO_RGB_601_VIDEO;
-			node->node.GROUP15.B2R2_VMX3 = B2R2_VMX3_YUV_TO_RGB_601_VIDEO;
+			node->node.GROUP15.B2R2_VMX0 =
+				B2R2_VMX0_YUV_TO_RGB_601_VIDEO;
+			node->node.GROUP15.B2R2_VMX1 =
+				B2R2_VMX1_YUV_TO_RGB_601_VIDEO;
+			node->node.GROUP15.B2R2_VMX2 =
+				B2R2_VMX2_YUV_TO_RGB_601_VIDEO;
+			node->node.GROUP15.B2R2_VMX3 =
+				B2R2_VMX3_YUV_TO_RGB_601_VIDEO;
 		}
 		break;
 	case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
 	case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YVU420_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YVU422_PACKED_PLANAR:
 	case B2R2_BLT_FMT_YUV444_PACKED_PLANAR:
 	case B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR:
 	case B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YVU420_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YVU422_PACKED_SEMI_PLANAR:
 	case B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE:
 	case B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE: {
 		/*
@@ -766,10 +822,27 @@ static void setup_input_stage(const struct b2r2_blt_request *req,
 		node->node.GROUP0.B2R2_CIC |=
 			B2R2_CIC_IVMX | B2R2_CIC_RESIZE_LUMA;
 
-		node->node.GROUP15.B2R2_VMX0 = B2R2_VMX0_YUV_TO_RGB_601_VIDEO;
-		node->node.GROUP15.B2R2_VMX1 = B2R2_VMX1_YUV_TO_RGB_601_VIDEO;
-		node->node.GROUP15.B2R2_VMX2 = B2R2_VMX2_YUV_TO_RGB_601_VIDEO;
-		node->node.GROUP15.B2R2_VMX3 = B2R2_VMX3_YUV_TO_RGB_601_VIDEO;
+		if (src_img->fmt == B2R2_BLT_FMT_YVU420_PACKED_SEMI_PLANAR ||
+			src_img->fmt ==
+				B2R2_BLT_FMT_YVU422_PACKED_SEMI_PLANAR) {
+			node->node.GROUP15.B2R2_VMX0 =
+				B2R2_VMX0_YVU_TO_RGB_601_VIDEO;
+			node->node.GROUP15.B2R2_VMX1 =
+				B2R2_VMX1_YVU_TO_RGB_601_VIDEO;
+			node->node.GROUP15.B2R2_VMX2 =
+				B2R2_VMX2_YVU_TO_RGB_601_VIDEO;
+			node->node.GROUP15.B2R2_VMX3 =
+				B2R2_VMX3_YVU_TO_RGB_601_VIDEO;
+		} else {
+			node->node.GROUP15.B2R2_VMX0 =
+				B2R2_VMX0_YUV_TO_RGB_601_VIDEO;
+			node->node.GROUP15.B2R2_VMX1 =
+				B2R2_VMX1_YUV_TO_RGB_601_VIDEO;
+			node->node.GROUP15.B2R2_VMX2 =
+				B2R2_VMX2_YUV_TO_RGB_601_VIDEO;
+			node->node.GROUP15.B2R2_VMX3 =
+				B2R2_VMX3_YUV_TO_RGB_601_VIDEO;
+		}
 
 		fctl |= B2R2_FCTL_LUMA_HF2D_MODE_ENABLE_RESIZER |
 			B2R2_FCTL_LUMA_VF2D_MODE_ENABLE_RESIZER;
@@ -795,7 +868,9 @@ static void setup_input_stage(const struct b2r2_blt_request *req,
 
 		switch (src_img->fmt) {
 		case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
+		case B2R2_BLT_FMT_YVU420_PACKED_PLANAR:
 		case B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR:
+		case B2R2_BLT_FMT_YVU420_PACKED_SEMI_PLANAR:
 		case B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE:
 			/*
 			 * Chrominance is always half the luminance size
@@ -815,7 +890,9 @@ static void setup_input_stage(const struct b2r2_blt_request *req,
 			use_v_filter = true;
 			break;
 		case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:
+		case B2R2_BLT_FMT_YVU422_PACKED_PLANAR:
 		case B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR:
+		case B2R2_BLT_FMT_YVU422_PACKED_SEMI_PLANAR:
 		case B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE:
 			/*
 			 * Chrominance is always half the luminance size
@@ -912,22 +989,41 @@ static void setup_input_stage(const struct b2r2_blt_request *req,
 		 * src_pitch and physical_address apply to luminance,
 		 * corresponding chrominance values have to be derived.
 		 */
-		u32 cb_addr = req->src_resolved.physical_address +
-			src_pitch * src_img->height;
+		u32 cb_addr = 0;
 		u32 cr_addr = 0;
 		u32 chroma_pitch = 0;
+		bool swapped_chroma =
+			src_img->fmt == B2R2_BLT_FMT_YVU420_PACKED_PLANAR ||
+			src_img->fmt == B2R2_BLT_FMT_YVU422_PACKED_PLANAR;
 		enum b2r2_native_fmt src_fmt = to_native_fmt(src_img->fmt);
 
+		if (swapped_chroma)
+			cr_addr = req->src_resolved.physical_address +
+				src_pitch * src_img->height;
+		else
+			cb_addr = req->src_resolved.physical_address +
+				src_pitch * src_img->height;
+
 		switch (src_img->fmt) {
 		case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
+		case B2R2_BLT_FMT_YVU420_PACKED_PLANAR:
 			chroma_pitch = src_pitch >> 1;
-			cr_addr =
-				cb_addr + chroma_pitch * (src_img->height >> 1);
+			if (swapped_chroma)
+				cb_addr = cr_addr + chroma_pitch *
+					(src_img->height >> 1);
+			else
+				cr_addr = cb_addr + chroma_pitch *
+					(src_img->height >> 1);
 			break;
 		case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:
+		case B2R2_BLT_FMT_YVU422_PACKED_PLANAR:
 			chroma_pitch = src_pitch >> 1;
-			cr_addr =
-				cb_addr + chroma_pitch * src_img->height;
+			if (swapped_chroma)
+				cb_addr = cr_addr + chroma_pitch *
+					src_img->height;
+			else
+				cr_addr = cb_addr + chroma_pitch *
+					src_img->height;
 			break;
 		case B2R2_BLT_FMT_YUV444_PACKED_PLANAR:
 			/* Chrominance has full resolution, same as luminance.*/
@@ -961,7 +1057,9 @@ static void setup_input_stage(const struct b2r2_blt_request *req,
 			B2R2_INS_SOURCE_2_FETCH_FROM_MEM |
 			B2R2_INS_SOURCE_3_FETCH_FROM_MEM;
 		node->node.GROUP0.B2R2_CIC |=
-			B2R2_CIC_SOURCE_1 | B2R2_CIC_SOURCE_2 | B2R2_CIC_SOURCE_3;
+			B2R2_CIC_SOURCE_1 |
+			B2R2_CIC_SOURCE_2 |
+			B2R2_CIC_SOURCE_3;
 	} else if (yuv_semi_planar) {
 		/*
 		 * Set up chrominance buffer on source 2, luminance on source 3.
@@ -1086,12 +1184,16 @@ static void setup_dst_read_stage(const struct b2r2_blt_request *req,
 	bool yuv_semi_planar =
 		dst_img->fmt == B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR ||
 		dst_img->fmt == B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR ||
+		dst_img->fmt == B2R2_BLT_FMT_YVU420_PACKED_SEMI_PLANAR ||
+		dst_img->fmt == B2R2_BLT_FMT_YVU422_PACKED_SEMI_PLANAR ||
 		dst_img->fmt == B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE ||
 		dst_img->fmt == B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE;
 
 	bool yuv_planar =
 		dst_img->fmt == B2R2_BLT_FMT_YUV420_PACKED_PLANAR ||
 		dst_img->fmt == B2R2_BLT_FMT_YUV422_PACKED_PLANAR ||
+		dst_img->fmt == B2R2_BLT_FMT_YVU420_PACKED_PLANAR ||
+		dst_img->fmt == B2R2_BLT_FMT_YVU422_PACKED_PLANAR ||
 		dst_img->fmt == B2R2_BLT_FMT_YUV444_PACKED_PLANAR;
 
 	u32 dst_pitch = 0;
@@ -1129,36 +1231,67 @@ static void setup_dst_read_stage(const struct b2r2_blt_request *req,
 			 * Chroma components are swapped
 			 * so it is YVU and not YUV.
 			 */
-			node->node.GROUP15.B2R2_VMX0 = B2R2_VMX0_YVU_TO_RGB_601_VIDEO;
-			node->node.GROUP15.B2R2_VMX1 = B2R2_VMX1_YVU_TO_RGB_601_VIDEO;
-			node->node.GROUP15.B2R2_VMX2 = B2R2_VMX2_YVU_TO_RGB_601_VIDEO;
-			node->node.GROUP15.B2R2_VMX3 = B2R2_VMX3_YVU_TO_RGB_601_VIDEO;
+			node->node.GROUP15.B2R2_VMX0 =
+				B2R2_VMX0_YVU_TO_RGB_601_VIDEO;
+			node->node.GROUP15.B2R2_VMX1 =
+				B2R2_VMX1_YVU_TO_RGB_601_VIDEO;
+			node->node.GROUP15.B2R2_VMX2 =
+				B2R2_VMX2_YVU_TO_RGB_601_VIDEO;
+			node->node.GROUP15.B2R2_VMX3 =
+				B2R2_VMX3_YVU_TO_RGB_601_VIDEO;
 		} else {
-			node->node.GROUP15.B2R2_VMX0 = B2R2_VMX0_YUV_TO_RGB_601_VIDEO;
-			node->node.GROUP15.B2R2_VMX1 = B2R2_VMX1_YUV_TO_RGB_601_VIDEO;
-			node->node.GROUP15.B2R2_VMX2 = B2R2_VMX2_YUV_TO_RGB_601_VIDEO;
-			node->node.GROUP15.B2R2_VMX3 = B2R2_VMX3_YUV_TO_RGB_601_VIDEO;
+			node->node.GROUP15.B2R2_VMX0 =
+				B2R2_VMX0_YUV_TO_RGB_601_VIDEO;
+			node->node.GROUP15.B2R2_VMX1 =
+				B2R2_VMX1_YUV_TO_RGB_601_VIDEO;
+			node->node.GROUP15.B2R2_VMX2 =
+				B2R2_VMX2_YUV_TO_RGB_601_VIDEO;
+			node->node.GROUP15.B2R2_VMX3 =
+				B2R2_VMX3_YUV_TO_RGB_601_VIDEO;
 		}
 		break;
 	case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
 	case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YVU420_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YVU422_PACKED_PLANAR:
 	case B2R2_BLT_FMT_YUV444_PACKED_PLANAR:
 	case B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR:
 	case B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YVU420_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YVU422_PACKED_SEMI_PLANAR:
 	case B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE:
 	case B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE: {
 		/* Set up IVMX */
 		node->node.GROUP0.B2R2_INS |= B2R2_INS_IVMX_ENABLED;
 		node->node.GROUP0.B2R2_CIC |= B2R2_CIC_IVMX;
 
-		node->node.GROUP15.B2R2_VMX0 = B2R2_VMX0_YUV_TO_RGB_601_VIDEO;
-		node->node.GROUP15.B2R2_VMX1 = B2R2_VMX1_YUV_TO_RGB_601_VIDEO;
-		node->node.GROUP15.B2R2_VMX2 = B2R2_VMX2_YUV_TO_RGB_601_VIDEO;
-		node->node.GROUP15.B2R2_VMX3 = B2R2_VMX3_YUV_TO_RGB_601_VIDEO;
+		if (dst_img->fmt == B2R2_BLT_FMT_YVU420_PACKED_SEMI_PLANAR ||
+			dst_img->fmt ==
+				B2R2_BLT_FMT_YVU422_PACKED_SEMI_PLANAR) {
+			node->node.GROUP15.B2R2_VMX0 =
+				B2R2_VMX0_YVU_TO_RGB_601_VIDEO;
+			node->node.GROUP15.B2R2_VMX1 =
+				B2R2_VMX1_YVU_TO_RGB_601_VIDEO;
+			node->node.GROUP15.B2R2_VMX2 =
+				B2R2_VMX2_YVU_TO_RGB_601_VIDEO;
+			node->node.GROUP15.B2R2_VMX3 =
+				B2R2_VMX3_YVU_TO_RGB_601_VIDEO;
+		} else {
+			node->node.GROUP15.B2R2_VMX0 =
+				B2R2_VMX0_YUV_TO_RGB_601_VIDEO;
+			node->node.GROUP15.B2R2_VMX1 =
+				B2R2_VMX1_YUV_TO_RGB_601_VIDEO;
+			node->node.GROUP15.B2R2_VMX2 =
+				B2R2_VMX2_YUV_TO_RGB_601_VIDEO;
+			node->node.GROUP15.B2R2_VMX3 =
+				B2R2_VMX3_YUV_TO_RGB_601_VIDEO;
+		}
 
 		switch (dst_img->fmt) {
 		case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
+		case B2R2_BLT_FMT_YVU420_PACKED_PLANAR:
 		case B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR:
+		case B2R2_BLT_FMT_YVU420_PACKED_SEMI_PLANAR:
 		case B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE:
 			/*
 			 * Chrominance is always half the luminance size
@@ -1173,7 +1306,9 @@ static void setup_dst_read_stage(const struct b2r2_blt_request *req,
 			rsf |= (1 << 9) << B2R2_RSF_VSRC_INC_SHIFT;
 			break;
 		case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:
+		case B2R2_BLT_FMT_YVU422_PACKED_PLANAR:
 		case B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR:
+		case B2R2_BLT_FMT_YVU422_PACKED_SEMI_PLANAR:
 		case B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE:
 			/*
 			 * Chrominance is always half the luminance size
@@ -1230,23 +1365,40 @@ static void setup_dst_read_stage(const struct b2r2_blt_request *req,
 		 * dst_pitch and physical_address apply to luminance,
 		 * corresponding chrominance values have to be derived.
 		 */
-		u32 cb_addr = req->dst_resolved.physical_address +
-			dst_pitch * dst_img->height;
+		u32 cb_addr = 0;
 		u32 cr_addr = 0;
 		u32 chroma_pitch = 0;
+		bool swapped_chroma =
+			dst_img->fmt == B2R2_BLT_FMT_YVU420_PACKED_PLANAR ||
+			dst_img->fmt == B2R2_BLT_FMT_YVU422_PACKED_PLANAR;
 		enum b2r2_native_fmt dst_native_fmt =
 				to_native_fmt(dst_img->fmt);
 
+		if (swapped_chroma)
+			cr_addr = req->dst_resolved.physical_address +
+				dst_pitch * dst_img->height;
+		else
+			cb_addr = req->dst_resolved.physical_address +
+				dst_pitch * dst_img->height;
+
 		switch (dst_img->fmt) {
 		case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
 			chroma_pitch = dst_pitch >> 1;
-			cr_addr =
-				cb_addr + chroma_pitch * (dst_img->height >> 1);
+			if (swapped_chroma)
+				cb_addr = cr_addr + chroma_pitch *
+					(dst_img->height >> 1);
+			else
+				cr_addr = cb_addr + chroma_pitch *
+					(dst_img->height >> 1);
 			break;
 		case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:
 			chroma_pitch = dst_pitch >> 1;
-			cr_addr =
-				cb_addr + chroma_pitch * dst_img->height;
+			if (swapped_chroma)
+				cb_addr = cr_addr + chroma_pitch *
+					dst_img->height;
+			else
+				cr_addr = cb_addr + chroma_pitch *
+					dst_img->height;
 			break;
 		case B2R2_BLT_FMT_YUV444_PACKED_PLANAR:
 			chroma_pitch = dst_pitch;
@@ -1279,7 +1431,9 @@ static void setup_dst_read_stage(const struct b2r2_blt_request *req,
 			B2R2_INS_SOURCE_2_FETCH_FROM_MEM |
 			B2R2_INS_SOURCE_3_FETCH_FROM_MEM;
 		node->node.GROUP0.B2R2_CIC |=
-			B2R2_CIC_SOURCE_1 | B2R2_CIC_SOURCE_2 | B2R2_CIC_SOURCE_3;
+			B2R2_CIC_SOURCE_1 |
+			B2R2_CIC_SOURCE_2 |
+			B2R2_CIC_SOURCE_3;
 	} else if (yuv_semi_planar) {
 		/*
 		 * Set up chrominance buffer on source 2, luminance on source 3.
@@ -1349,16 +1503,18 @@ static void setup_blend_stage(const struct b2r2_blt_request *req,
 			(B2R2_BLT_FLAG_GLOBAL_ALPHA_BLEND |
 			B2R2_BLT_FLAG_PER_PIXEL_ALPHA_BLEND)) {
 		/* Some kind of blending needs to be done. */
-		if ((req->user_req.flags & B2R2_BLT_FLAG_SRC_IS_NOT_PREMULT) != 0)
-			node->node.GROUP0.B2R2_ACK |= B2R2_ACK_MODE_BLEND_NOT_PREMULT;
+		if (req->user_req.flags & B2R2_BLT_FLAG_SRC_IS_NOT_PREMULT)
+			node->node.GROUP0.B2R2_ACK |=
+				B2R2_ACK_MODE_BLEND_NOT_PREMULT;
 		else
-			node->node.GROUP0.B2R2_ACK |= B2R2_ACK_MODE_BLEND_PREMULT;
+			node->node.GROUP0.B2R2_ACK |=
+				B2R2_ACK_MODE_BLEND_PREMULT;
 
 		/*
 		 * global_alpha register accepts 0..128 range,
 		 * global_alpha in the request is 0..255, remap needed.
 		 */
-		if ((req->user_req.flags & B2R2_BLT_FLAG_GLOBAL_ALPHA_BLEND) != 0) {
+		if (req->user_req.flags & B2R2_BLT_FLAG_GLOBAL_ALPHA_BLEND) {
 			if (global_alpha == 255)
 				global_alpha = 128;
 			else
@@ -1377,7 +1533,8 @@ static void setup_blend_stage(const struct b2r2_blt_request *req,
 		/* Set background on SRC1 channel */
 		node->node.GROUP3.B2R2_SBA = bg_buf->phys_addr;
 		node->node.GROUP3.B2R2_STY =
-			(B2R2_GENERIC_WORK_BUF_PITCH << B2R2_TY_BITMAP_PITCH_SHIFT) |
+			(B2R2_GENERIC_WORK_BUF_PITCH <<
+				B2R2_TY_BITMAP_PITCH_SHIFT) |
 			B2R2_GENERIC_WORK_BUF_FMT |
 			B2R2_TY_ALPHA_RANGE_255 |
 			B2R2_TY_HSO_LEFT_TO_RIGHT |
@@ -1386,7 +1543,8 @@ static void setup_blend_stage(const struct b2r2_blt_request *req,
 		/* Set foreground on SRC2 channel */
 		node->node.GROUP4.B2R2_SBA = fg_buf->phys_addr;
 		node->node.GROUP4.B2R2_STY =
-			(B2R2_GENERIC_WORK_BUF_PITCH << B2R2_TY_BITMAP_PITCH_SHIFT) |
+			(B2R2_GENERIC_WORK_BUF_PITCH <<
+				B2R2_TY_BITMAP_PITCH_SHIFT) |
 			B2R2_GENERIC_WORK_BUF_FMT |
 			B2R2_TY_ALPHA_RANGE_255 |
 			B2R2_TY_HSO_LEFT_TO_RIGHT |
@@ -1395,7 +1553,8 @@ static void setup_blend_stage(const struct b2r2_blt_request *req,
 		/* Set target buffer */
 		node->node.GROUP1.B2R2_TBA = bg_buf->phys_addr;
 		node->node.GROUP1.B2R2_TTY =
-			(B2R2_GENERIC_WORK_BUF_PITCH << B2R2_TY_BITMAP_PITCH_SHIFT) |
+			(B2R2_GENERIC_WORK_BUF_PITCH <<
+				B2R2_TY_BITMAP_PITCH_SHIFT) |
 			B2R2_GENERIC_WORK_BUF_FMT |
 			B2R2_TY_ALPHA_RANGE_255 |
 			B2R2_TY_HSO_LEFT_TO_RIGHT |
@@ -1404,7 +1563,9 @@ static void setup_blend_stage(const struct b2r2_blt_request *req,
 		node->node.GROUP0.B2R2_INS |=
 			B2R2_INS_SOURCE_1_FETCH_FROM_MEM |
 			B2R2_INS_SOURCE_2_FETCH_FROM_MEM;
-		node->node.GROUP0.B2R2_CIC |= B2R2_CIC_SOURCE_1 | B2R2_CIC_SOURCE_2;
+		node->node.GROUP0.B2R2_CIC |=
+			B2R2_CIC_SOURCE_1 |
+			B2R2_CIC_SOURCE_2;
 	} else {
 		/*
 		 * No blending, foreground goes on SRC2. No global alpha.
@@ -1419,7 +1580,8 @@ static void setup_blend_stage(const struct b2r2_blt_request *req,
 
 		node->node.GROUP4.B2R2_SBA = fg_buf->phys_addr;
 		node->node.GROUP4.B2R2_STY =
-			(B2R2_GENERIC_WORK_BUF_PITCH << B2R2_TY_BITMAP_PITCH_SHIFT) |
+			(B2R2_GENERIC_WORK_BUF_PITCH <<
+				B2R2_TY_BITMAP_PITCH_SHIFT) |
 			B2R2_GENERIC_WORK_BUF_FMT |
 			B2R2_TY_ALPHA_RANGE_255 |
 			B2R2_TY_HSO_LEFT_TO_RIGHT |
@@ -1427,7 +1589,8 @@ static void setup_blend_stage(const struct b2r2_blt_request *req,
 
 		node->node.GROUP1.B2R2_TBA = bg_buf->phys_addr;
 		node->node.GROUP1.B2R2_TTY =
-			(B2R2_GENERIC_WORK_BUF_PITCH << B2R2_TY_BITMAP_PITCH_SHIFT) |
+			(B2R2_GENERIC_WORK_BUF_PITCH <<
+				B2R2_TY_BITMAP_PITCH_SHIFT) |
 			B2R2_GENERIC_WORK_BUF_FMT |
 			B2R2_TY_ALPHA_RANGE_255 |
 			B2R2_TY_HSO_LEFT_TO_RIGHT |
@@ -1446,11 +1609,15 @@ static void setup_writeback_stage(const struct b2r2_blt_request *req,
 	const bool yuv_planar_dst =
 		dst_fmt == B2R2_BLT_FMT_YUV420_PACKED_PLANAR ||
 		dst_fmt == B2R2_BLT_FMT_YUV422_PACKED_PLANAR ||
+		dst_fmt == B2R2_BLT_FMT_YVU420_PACKED_PLANAR ||
+		dst_fmt == B2R2_BLT_FMT_YVU422_PACKED_PLANAR ||
 		dst_fmt == B2R2_BLT_FMT_YUV444_PACKED_PLANAR;
 
 	const bool yuv_semi_planar_dst =
 		dst_fmt == B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR ||
 		dst_fmt == B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR ||
+		dst_fmt == B2R2_BLT_FMT_YVU420_PACKED_SEMI_PLANAR ||
+		dst_fmt == B2R2_BLT_FMT_YVU422_PACKED_SEMI_PLANAR ||
 		dst_fmt == B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE ||
 		dst_fmt == B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE;
 
@@ -1492,19 +1659,33 @@ static void setup_writeback_stage(const struct b2r2_blt_request *req,
 			B2R2_CIC_CLIP_WINDOW |
 			B2R2_CIC_IVMX;
 
-		u32 cb_addr = req->dst_resolved.physical_address +
-			dst_pitch * dst_img->height;
+		u32 cb_addr = 0;
 		u32 cr_addr = 0;
 		u32 chroma_pitch = 0;
+		bool swapped_chroma =
+			dst_fmt == B2R2_BLT_FMT_YVU420_PACKED_PLANAR ||
+			dst_fmt == B2R2_BLT_FMT_YVU422_PACKED_PLANAR;
 		enum b2r2_native_fmt dst_native_fmt =
 				to_native_fmt(dst_img->fmt);
 		enum b2r2_ty alpha_range = get_alpha_range(dst_img->fmt);
 
+		if (swapped_chroma)
+			cr_addr = req->dst_resolved.physical_address +
+				dst_pitch * dst_img->height;
+		else
+			cb_addr = req->dst_resolved.physical_address +
+				dst_pitch * dst_img->height;
+
 		switch (dst_fmt) {
 		case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
+		case B2R2_BLT_FMT_YVU420_PACKED_PLANAR:
 			chroma_pitch = dst_pitch >> 1;
-			cr_addr =
-				cb_addr + chroma_pitch * (dst_img->height >> 1);
+			if (swapped_chroma)
+				cb_addr = cr_addr + chroma_pitch *
+					(dst_img->height >> 1);
+			else
+				cr_addr = cb_addr + chroma_pitch *
+					(dst_img->height >> 1);
 			/*
 			 * Chrominance is always half the luminance size
 			 * so chrominance resizer is always active.
@@ -1518,11 +1699,16 @@ static void setup_writeback_stage(const struct b2r2_blt_request *req,
 			rsf |= (2 << 10) << B2R2_RSF_VSRC_INC_SHIFT;
 			break;
 		case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:
+		case B2R2_BLT_FMT_YVU422_PACKED_PLANAR:
 			chroma_pitch = dst_pitch >> 1;
-			cr_addr =
-				cb_addr + chroma_pitch * dst_img->height;
+			if (swapped_chroma)
+				cb_addr = cr_addr + chroma_pitch *
+					dst_img->height;
+			else
+				cr_addr = cb_addr + chroma_pitch *
+					dst_img->height;
 			/*
-			 * YUV422
+			 * YUV422 or YVU422
 			 * Chrominance is always half the luminance size
 			 * only in horizontal direction.
 			 */
@@ -1588,8 +1774,10 @@ static void setup_writeback_stage(const struct b2r2_blt_request *req,
 		node->node.GROUP0.B2R2_INS = group0_b2r2_ins;
 		node->node.GROUP0.B2R2_CIC |= group0_b2r2_cic;
 		if (dst_fmt != B2R2_BLT_FMT_YUV444_PACKED_PLANAR) {
-			node->node.GROUP0.B2R2_INS |= B2R2_INS_RESCALE2D_ENABLED;
-			node->node.GROUP0.B2R2_CIC |= B2R2_CIC_FILTER_CONTROL |
+			node->node.GROUP0.B2R2_INS |=
+				B2R2_INS_RESCALE2D_ENABLED;
+			node->node.GROUP0.B2R2_CIC |=
+				B2R2_CIC_FILTER_CONTROL |
 				B2R2_CIC_RESIZE_CHROMA;
 			/* Set the filter control and rescale registers */
 			node->node.GROUP8.B2R2_FCTL = fctl;
@@ -1629,8 +1817,10 @@ static void setup_writeback_stage(const struct b2r2_blt_request *req,
 		node->node.GROUP0.B2R2_INS = group0_b2r2_ins;
 		node->node.GROUP0.B2R2_CIC |= group0_b2r2_cic;
 		if (dst_fmt != B2R2_BLT_FMT_YUV444_PACKED_PLANAR) {
-			node->node.GROUP0.B2R2_INS |= B2R2_INS_RESCALE2D_ENABLED;
-			node->node.GROUP0.B2R2_CIC |= B2R2_CIC_FILTER_CONTROL |
+			node->node.GROUP0.B2R2_INS |=
+				B2R2_INS_RESCALE2D_ENABLED;
+			node->node.GROUP0.B2R2_CIC |=
+				B2R2_CIC_FILTER_CONTROL |
 				B2R2_CIC_RESIZE_CHROMA;
 			/* Set the filter control and rescale registers */
 			node->node.GROUP8.B2R2_FCTL = fctl;
@@ -1667,7 +1857,9 @@ static void setup_writeback_stage(const struct b2r2_blt_request *req,
 		enum b2r2_ty alpha_range = get_alpha_range(dst_img->fmt);
 
 		if (dst_fmt == B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR ||
-				dst_fmt == B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE) {
+			dst_fmt ==
+				B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE ||
+			dst_fmt == B2R2_BLT_FMT_YVU420_PACKED_SEMI_PLANAR) {
 			/*
 			 * Chrominance is always half the luminance size
 			 * so chrominance resizer is always active.
@@ -1702,10 +1894,26 @@ static void setup_writeback_stage(const struct b2r2_blt_request *req,
 			B2R2_TY_VSO_TOP_TO_BOTTOM |
 			dst_dither;
 
-		node->node.GROUP15.B2R2_VMX0 = B2R2_VMX0_RGB_TO_YUV_601_VIDEO;
-		node->node.GROUP15.B2R2_VMX1 = B2R2_VMX1_RGB_TO_YUV_601_VIDEO;
-		node->node.GROUP15.B2R2_VMX2 = B2R2_VMX2_RGB_TO_YUV_601_VIDEO;
-		node->node.GROUP15.B2R2_VMX3 = B2R2_VMX3_RGB_TO_YUV_601_VIDEO;
+		if (dst_fmt == B2R2_BLT_FMT_YVU420_PACKED_SEMI_PLANAR ||
+			dst_fmt == B2R2_BLT_FMT_YVU422_PACKED_SEMI_PLANAR) {
+			node->node.GROUP15.B2R2_VMX0 =
+				B2R2_VMX0_RGB_TO_YVU_601_VIDEO;
+			node->node.GROUP15.B2R2_VMX1 =
+				B2R2_VMX1_RGB_TO_YVU_601_VIDEO;
+			node->node.GROUP15.B2R2_VMX2 =
+				B2R2_VMX2_RGB_TO_YVU_601_VIDEO;
+			node->node.GROUP15.B2R2_VMX3 =
+				B2R2_VMX3_RGB_TO_YVU_601_VIDEO;
+		} else {
+			node->node.GROUP15.B2R2_VMX0 =
+				B2R2_VMX0_RGB_TO_YUV_601_VIDEO;
+			node->node.GROUP15.B2R2_VMX1 =
+				B2R2_VMX1_RGB_TO_YUV_601_VIDEO;
+			node->node.GROUP15.B2R2_VMX2 =
+				B2R2_VMX2_RGB_TO_YUV_601_VIDEO;
+			node->node.GROUP15.B2R2_VMX3 =
+				B2R2_VMX3_RGB_TO_YUV_601_VIDEO;
+		}
 
 		 /* bypass ALU, no blending here. Handled in its own stage. */
 		node->node.GROUP0.B2R2_ACK = B2R2_ACK_MODE_BYPASS_S2_S3;
@@ -1727,10 +1935,26 @@ static void setup_writeback_stage(const struct b2r2_blt_request *req,
 			dst_dither |
 			B2R2_TTY_CHROMA_NOT_LUMA;
 
-		node->node.GROUP15.B2R2_VMX0 = B2R2_VMX0_RGB_TO_YUV_601_VIDEO;
-		node->node.GROUP15.B2R2_VMX1 = B2R2_VMX1_RGB_TO_YUV_601_VIDEO;
-		node->node.GROUP15.B2R2_VMX2 = B2R2_VMX2_RGB_TO_YUV_601_VIDEO;
-		node->node.GROUP15.B2R2_VMX3 = B2R2_VMX3_RGB_TO_YUV_601_VIDEO;
+		if (dst_fmt == B2R2_BLT_FMT_YVU420_PACKED_SEMI_PLANAR ||
+			dst_fmt == B2R2_BLT_FMT_YVU422_PACKED_SEMI_PLANAR) {
+			node->node.GROUP15.B2R2_VMX0 =
+				B2R2_VMX0_RGB_TO_YVU_601_VIDEO;
+			node->node.GROUP15.B2R2_VMX1 =
+				B2R2_VMX1_RGB_TO_YVU_601_VIDEO;
+			node->node.GROUP15.B2R2_VMX2 =
+				B2R2_VMX2_RGB_TO_YVU_601_VIDEO;
+			node->node.GROUP15.B2R2_VMX3 =
+				B2R2_VMX3_RGB_TO_YVU_601_VIDEO;
+		} else {
+			node->node.GROUP15.B2R2_VMX0 =
+				B2R2_VMX0_RGB_TO_YUV_601_VIDEO;
+			node->node.GROUP15.B2R2_VMX1 =
+				B2R2_VMX1_RGB_TO_YUV_601_VIDEO;
+			node->node.GROUP15.B2R2_VMX2 =
+				B2R2_VMX2_RGB_TO_YUV_601_VIDEO;
+			node->node.GROUP15.B2R2_VMX3 =
+				B2R2_VMX3_RGB_TO_YUV_601_VIDEO;
+		}
 
 		node->node.GROUP0.B2R2_ACK = B2R2_ACK_MODE_BYPASS_S2_S3;
 		node->node.GROUP0.B2R2_INS =
@@ -1764,19 +1988,27 @@ static void setup_writeback_stage(const struct b2r2_blt_request *req,
 		case B2R2_BLT_FMT_Y_CB_Y_CR:
 			node->node.GROUP0.B2R2_INS |= B2R2_INS_OVMX_ENABLED;
 			node->node.GROUP0.B2R2_CIC |= B2R2_CIC_OVMX;
-			node->node.GROUP16.B2R2_VMX0 = B2R2_VMX0_RGB_TO_YVU_601_VIDEO;
-			node->node.GROUP16.B2R2_VMX1 = B2R2_VMX1_RGB_TO_YVU_601_VIDEO;
-			node->node.GROUP16.B2R2_VMX2 = B2R2_VMX2_RGB_TO_YVU_601_VIDEO;
-			node->node.GROUP16.B2R2_VMX3 = B2R2_VMX3_RGB_TO_YVU_601_VIDEO;
+			node->node.GROUP16.B2R2_VMX0 =
+				B2R2_VMX0_RGB_TO_YVU_601_VIDEO;
+			node->node.GROUP16.B2R2_VMX1 =
+				B2R2_VMX1_RGB_TO_YVU_601_VIDEO;
+			node->node.GROUP16.B2R2_VMX2 =
+				B2R2_VMX2_RGB_TO_YVU_601_VIDEO;
+			node->node.GROUP16.B2R2_VMX3 =
+				B2R2_VMX3_RGB_TO_YVU_601_VIDEO;
 			break;
 		case B2R2_BLT_FMT_24_BIT_YUV888: /* fall through */
 		case B2R2_BLT_FMT_32_BIT_AYUV8888:
 			node->node.GROUP0.B2R2_INS |= B2R2_INS_OVMX_ENABLED;
 			node->node.GROUP0.B2R2_CIC |= B2R2_CIC_OVMX;
-			node->node.GROUP16.B2R2_VMX0 = B2R2_VMX0_RGB_TO_YUV_601_VIDEO;
-			node->node.GROUP16.B2R2_VMX1 = B2R2_VMX1_RGB_TO_YUV_601_VIDEO;
-			node->node.GROUP16.B2R2_VMX2 = B2R2_VMX2_RGB_TO_YUV_601_VIDEO;
-			node->node.GROUP16.B2R2_VMX3 = B2R2_VMX3_RGB_TO_YUV_601_VIDEO;
+			node->node.GROUP16.B2R2_VMX0 =
+				B2R2_VMX0_RGB_TO_YUV_601_VIDEO;
+			node->node.GROUP16.B2R2_VMX1 =
+				B2R2_VMX1_RGB_TO_YUV_601_VIDEO;
+			node->node.GROUP16.B2R2_VMX2 =
+				B2R2_VMX2_RGB_TO_YUV_601_VIDEO;
+			node->node.GROUP16.B2R2_VMX3 =
+				B2R2_VMX3_RGB_TO_YUV_601_VIDEO;
 			break;
 		default:
 			break;
@@ -1882,15 +2114,20 @@ int b2r2_generic_analyze(const struct b2r2_blt_request *req,
 	dst_fmt = req->user_req.dst_img.fmt;
 
 	is_src_fill = (req->user_req.flags &
-			(B2R2_BLT_FLAG_SOURCE_FILL | B2R2_BLT_FLAG_SOURCE_FILL_RAW)) != 0;
+				(B2R2_BLT_FLAG_SOURCE_FILL |
+				B2R2_BLT_FLAG_SOURCE_FILL_RAW)) != 0;
 
 	yuv_planar_dst =
 		dst_fmt == B2R2_BLT_FMT_YUV420_PACKED_PLANAR ||
 		dst_fmt == B2R2_BLT_FMT_YUV422_PACKED_PLANAR ||
+		dst_fmt == B2R2_BLT_FMT_YVU420_PACKED_PLANAR ||
+		dst_fmt == B2R2_BLT_FMT_YVU422_PACKED_PLANAR ||
 		dst_fmt == B2R2_BLT_FMT_YUV444_PACKED_PLANAR;
 	yuv_semi_planar_dst =
 		dst_fmt == B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR ||
 		dst_fmt == B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR ||
+		dst_fmt == B2R2_BLT_FMT_YVU420_PACKED_SEMI_PLANAR ||
+		dst_fmt == B2R2_BLT_FMT_YVU422_PACKED_SEMI_PLANAR ||
 		dst_fmt == B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE ||
 		dst_fmt == B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE;
 
@@ -1905,7 +2142,7 @@ int b2r2_generic_analyze(const struct b2r2_blt_request *req,
 	}
 
 	if ((yuv_planar_dst || yuv_semi_planar_dst) &&
-			(req->user_req.flags & B2R2_BLT_FLAG_SOURCE_FILL_RAW) != 0) {
+			(req->user_req.flags & B2R2_BLT_FLAG_SOURCE_FILL_RAW)) {
 		b2r2_log_warn("%s: Invalid combination: source_fill_raw"
 			" and multi-buffer destination.\n",
 			__func__);
@@ -1913,7 +2150,7 @@ int b2r2_generic_analyze(const struct b2r2_blt_request *req,
 	}
 
 	if ((req->user_req.flags & B2R2_BLT_FLAG_SOURCE_COLOR_KEY) != 0 &&
-			(req->user_req.flags & B2R2_BLT_FLAG_DEST_COLOR_KEY) != 0) {
+			(req->user_req.flags & B2R2_BLT_FLAG_DEST_COLOR_KEY)) {
 		b2r2_log_warn("%s: Invalid combination: source and "
 			"destination color keying.\n", __func__);
 		return -EINVAL;
@@ -1968,10 +2205,15 @@ int b2r2_generic_analyze(const struct b2r2_blt_request *req,
 			src_fmt == B2R2_BLT_FMT_Y_CB_Y_CR ||
 			src_fmt == B2R2_BLT_FMT_YUV420_PACKED_PLANAR ||
 			src_fmt == B2R2_BLT_FMT_YUV422_PACKED_PLANAR ||
+			src_fmt == B2R2_BLT_FMT_YVU420_PACKED_PLANAR ||
+			src_fmt == B2R2_BLT_FMT_YVU422_PACKED_PLANAR ||
 			src_fmt == B2R2_BLT_FMT_YUV444_PACKED_PLANAR ||
 			src_fmt == B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR ||
 			src_fmt == B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR ||
-			src_fmt == B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE ||
+			src_fmt == B2R2_BLT_FMT_YVU420_PACKED_SEMI_PLANAR ||
+			src_fmt == B2R2_BLT_FMT_YVU422_PACKED_SEMI_PLANAR ||
+			src_fmt ==
+				B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE ||
 			src_fmt == B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE;
 		if (yuv_src || src_fmt == B2R2_BLT_FMT_1_BIT_A1 ||
 				src_fmt == B2R2_BLT_FMT_8_BIT_A8) {
@@ -1990,10 +2232,12 @@ int b2r2_generic_analyze(const struct b2r2_blt_request *req,
 		src_rect.x + src_rect.width > req->user_req.src_img.width ||
 		src_rect.y + src_rect.height > req->user_req.src_img.height)) {
 		b2r2_log_warn("%s: src_rect outside src_img:\n"
-			"src(x,y,w,h)=(%d, %d, %d, %d) src_img(w,h)=(%d, %d).\n",
+			"src(x,y,w,h)=(%d, %d, %d, %d) "
+			"src_img(w,h)=(%d, %d).\n",
 			__func__,
 			src_rect.x, src_rect.y, src_rect.width, src_rect.height,
-			req->user_req.src_img.width, req->user_req.src_img.height);
+			req->user_req.src_img.width,
+			req->user_req.src_img.height);
 		return -EINVAL;
 	}
 
@@ -2193,18 +2437,26 @@ void b2r2_generic_set_areas(const struct b2r2_blt_request *req,
 	bool yuv_multi_buffer_src =
 		src_fmt == B2R2_BLT_FMT_YUV420_PACKED_PLANAR ||
 		src_fmt == B2R2_BLT_FMT_YUV422_PACKED_PLANAR ||
+		src_fmt == B2R2_BLT_FMT_YVU420_PACKED_PLANAR ||
+		src_fmt == B2R2_BLT_FMT_YVU422_PACKED_PLANAR ||
 		src_fmt == B2R2_BLT_FMT_YUV444_PACKED_PLANAR ||
 		src_fmt == B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR ||
 		src_fmt == B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR ||
+		src_fmt == B2R2_BLT_FMT_YVU420_PACKED_SEMI_PLANAR ||
+		src_fmt == B2R2_BLT_FMT_YVU422_PACKED_SEMI_PLANAR ||
 		src_fmt == B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE ||
 		src_fmt == B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE;
 	const enum b2r2_blt_fmt dst_fmt = req->user_req.dst_img.fmt;
 	const bool yuv_multi_buffer_dst =
 		dst_fmt == B2R2_BLT_FMT_YUV420_PACKED_PLANAR ||
 		dst_fmt == B2R2_BLT_FMT_YUV422_PACKED_PLANAR ||
+		dst_fmt == B2R2_BLT_FMT_YVU420_PACKED_PLANAR ||
+		dst_fmt == B2R2_BLT_FMT_YVU422_PACKED_PLANAR ||
 		dst_fmt == B2R2_BLT_FMT_YUV444_PACKED_PLANAR ||
 		dst_fmt == B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR ||
 		dst_fmt == B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR ||
+		dst_fmt == B2R2_BLT_FMT_YVU420_PACKED_SEMI_PLANAR ||
+		dst_fmt == B2R2_BLT_FMT_YVU422_PACKED_SEMI_PLANAR ||
 		dst_fmt == B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE ||
 		dst_fmt == B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE;
 	s32 h_scf = 1 << 10;
@@ -2234,14 +2486,16 @@ void b2r2_generic_set_areas(const struct b2r2_blt_request *req,
 
 	if (req->user_req.transform & B2R2_BLT_TRANSFORM_CCW_ROT_90) {
 		/*
-		 * Normally the inverse transform for 90 degree rotation is given by
+		 * Normally the inverse transform for 90 degree rotation
+		 * is given by:
 		 * | 0  1|   |x|   | y|
 		 * |     | X | | = |  |
 		 * |-1  0|   |y|   |-x|
 		 * but screen coordinates are flipped in y direction
 		 * (compared to usual Cartesian coordinates), hence the offsets.
 		 */
-		src_x = (dst_rect->height - dst_y - dst_rect_area->height) * h_scf;
+		src_x = (dst_rect->height - dst_y - dst_rect_area->height) *
+			h_scf;
 		src_y = dst_x * v_scf;
 		src_w = dst_rect_area->height * h_scf;
 		src_h = dst_rect_area->width * v_scf;
@@ -2352,7 +2606,9 @@ void b2r2_generic_set_areas(const struct b2r2_blt_request *req,
 			(0x3ff << B2R2_RZI_VSRC_INIT_SHIFT));
 		switch (src_fmt) {
 		case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
+		case B2R2_BLT_FMT_YVU420_PACKED_PLANAR:
 		case B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR:
+		case B2R2_BLT_FMT_YVU420_PACKED_SEMI_PLANAR:
 		case B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE:
 			/*
 			 * Chroma goes on SRC2 and potentially on SRC1.
@@ -2367,18 +2623,26 @@ void b2r2_generic_set_areas(const struct b2r2_blt_request *req,
 				(((src_x & 0xffff) >> 1) << B2R2_XY_X_SHIFT) |
 				(((src_y & 0xffff) >> 1) << B2R2_XY_Y_SHIFT);
 			node->node.GROUP4.B2R2_SSZ =
-				((((src_w + 1) & 0xfff) >> 1) << B2R2_SZ_WIDTH_SHIFT) |
-				((((src_h + 1) & 0xfff) >> 1) << B2R2_SZ_HEIGHT_SHIFT);
-			if (src_fmt == B2R2_BLT_FMT_YUV420_PACKED_PLANAR) {
-				node->node.GROUP3.B2R2_SXY = node->node.GROUP4.B2R2_SXY;
-				node->node.GROUP3.B2R2_SSZ = node->node.GROUP4.B2R2_SSZ;
+				((((src_w + 1) & 0xfff) >> 1) <<
+					B2R2_SZ_WIDTH_SHIFT) |
+				((((src_h + 1) & 0xfff) >> 1) <<
+					B2R2_SZ_HEIGHT_SHIFT);
+			if (src_fmt == B2R2_BLT_FMT_YUV420_PACKED_PLANAR ||
+					src_fmt ==
+					B2R2_BLT_FMT_YVU420_PACKED_PLANAR) {
+				node->node.GROUP3.B2R2_SXY =
+					node->node.GROUP4.B2R2_SXY;
+				node->node.GROUP3.B2R2_SSZ =
+					node->node.GROUP4.B2R2_SSZ;
 			}
 			node->node.GROUP9.B2R2_RZI |= (b2r2_rzi >> 1) &
 				((0x3ff << B2R2_RZI_HSRC_INIT_SHIFT) |
 				 (0x3ff << B2R2_RZI_VSRC_INIT_SHIFT));
 			break;
 		case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:
+		case B2R2_BLT_FMT_YVU422_PACKED_PLANAR:
 		case B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR:
+		case B2R2_BLT_FMT_YVU422_PACKED_SEMI_PLANAR:
 		case B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE:
 			/*
 			 * Chroma goes on SRC2 and potentially on SRC1.
@@ -2391,14 +2655,20 @@ void b2r2_generic_set_areas(const struct b2r2_blt_request *req,
 				(((src_x & 0xffff) >> 1) << B2R2_XY_X_SHIFT) |
 				((src_y & 0xffff) << B2R2_XY_Y_SHIFT);
 			node->node.GROUP4.B2R2_SSZ =
-				((((src_w + 1) & 0xfff) >> 1) << B2R2_SZ_WIDTH_SHIFT) |
+				((((src_w + 1) & 0xfff) >> 1) <<
+							B2R2_SZ_WIDTH_SHIFT) |
 				((src_h & 0xfff) << B2R2_SZ_HEIGHT_SHIFT);
-			if (src_fmt == B2R2_BLT_FMT_YUV422_PACKED_PLANAR) {
-				node->node.GROUP3.B2R2_SXY = node->node.GROUP4.B2R2_SXY;
-				node->node.GROUP3.B2R2_SSZ = node->node.GROUP4.B2R2_SSZ;
+			if (src_fmt == B2R2_BLT_FMT_YUV422_PACKED_PLANAR ||
+					src_fmt ==
+					B2R2_BLT_FMT_YVU422_PACKED_PLANAR) {
+				node->node.GROUP3.B2R2_SXY =
+					node->node.GROUP4.B2R2_SXY;
+				node->node.GROUP3.B2R2_SSZ =
+					node->node.GROUP4.B2R2_SSZ;
 			}
 			node->node.GROUP9.B2R2_RZI |=
-				(((src_x & 0x3ff) >> 1) << B2R2_RZI_HSRC_INIT_SHIFT) |
+				(((src_x & 0x3ff) >> 1) <<
+						B2R2_RZI_HSRC_INIT_SHIFT) |
 				((src_y & 0x3ff) << B2R2_RZI_VSRC_INIT_SHIFT);
 			break;
 		case B2R2_BLT_FMT_YUV444_PACKED_PLANAR:
@@ -2450,33 +2720,41 @@ void b2r2_generic_set_areas(const struct b2r2_blt_request *req,
 		 * suitable scanning order while writing
 		 * to the temporary buffer.
 		 */
-		if ((req->user_req.transform & B2R2_BLT_TRANSFORM_FLIP_H) != 0) {
+		if (req->user_req.transform & B2R2_BLT_TRANSFORM_FLIP_H) {
 			node->node.GROUP1.B2R2_TXY |=
-				((dst_rect_area->height - 1) & 0xffff) << B2R2_XY_X_SHIFT;
+				((dst_rect_area->height - 1) & 0xffff) <<
+				B2R2_XY_X_SHIFT;
 		}
 
 		if (req->user_req.transform & B2R2_BLT_TRANSFORM_FLIP_V) {
 			node->node.GROUP1.B2R2_TXY |=
-				((dst_rect_area->width - 1) & 0xffff) << B2R2_XY_Y_SHIFT;
+				((dst_rect_area->width - 1) & 0xffff) <<
+				B2R2_XY_Y_SHIFT;
 		}
 
 		node->node.GROUP1.B2R2_TSZ =
-			((dst_rect_area->height & 0xfff) << B2R2_SZ_WIDTH_SHIFT) |
-			((dst_rect_area->width & 0xfff) << B2R2_SZ_HEIGHT_SHIFT);
+			((dst_rect_area->height & 0xfff) <<
+						B2R2_SZ_WIDTH_SHIFT) |
+			((dst_rect_area->width & 0xfff) <<
+						B2R2_SZ_HEIGHT_SHIFT);
 	} else {
-		if ((req->user_req.transform & B2R2_BLT_TRANSFORM_FLIP_H) != 0) {
+		if (req->user_req.transform & B2R2_BLT_TRANSFORM_FLIP_H) {
 			node->node.GROUP1.B2R2_TXY |=
-				((dst_rect_area->width - 1) & 0xffff) << B2R2_XY_X_SHIFT;
+				((dst_rect_area->width - 1) & 0xffff) <<
+				B2R2_XY_X_SHIFT;
 		}
 
-		if ((req->user_req.transform & B2R2_BLT_TRANSFORM_FLIP_V) != 0) {
+		if (req->user_req.transform & B2R2_BLT_TRANSFORM_FLIP_V) {
 			node->node.GROUP1.B2R2_TXY |=
-				((dst_rect_area->height - 1) & 0xffff) << B2R2_XY_Y_SHIFT;
+				((dst_rect_area->height - 1) & 0xffff) <<
+				B2R2_XY_Y_SHIFT;
 		}
 
 		node->node.GROUP1.B2R2_TSZ =
-			((dst_rect_area->width & 0xfff) << B2R2_SZ_WIDTH_SHIFT) |
-			((dst_rect_area->height & 0xfff) << B2R2_SZ_HEIGHT_SHIFT);
+			((dst_rect_area->width & 0xfff) <<
+						B2R2_SZ_WIDTH_SHIFT) |
+			((dst_rect_area->height & 0xfff) <<
+						B2R2_SZ_HEIGHT_SHIFT);
 	}
 
 	if (req->user_req.flags &
@@ -2512,15 +2790,20 @@ void b2r2_generic_set_areas(const struct b2r2_blt_request *req,
 
 		node->node.GROUP4.B2R2_SXY = 0;
 		node->node.GROUP4.B2R2_SSZ =
-			((dst_rect_area->height & 0xfff) << B2R2_SZ_WIDTH_SHIFT) |
-			((dst_rect_area->width & 0xfff) << B2R2_SZ_HEIGHT_SHIFT);
+			((dst_rect_area->height & 0xfff) <<
+						B2R2_SZ_WIDTH_SHIFT) |
+			((dst_rect_area->width & 0xfff) <<
+						B2R2_SZ_HEIGHT_SHIFT);
 		/* Bottom line written first */
 		node->node.GROUP1.B2R2_TXY =
-			((dst_rect_area->height - 1) & 0xffff) << B2R2_XY_Y_SHIFT;
+			((dst_rect_area->height - 1) & 0xffff) <<
+			B2R2_XY_Y_SHIFT;
 
 		node->node.GROUP1.B2R2_TSZ =
-			((dst_rect_area->width & 0xfff) << B2R2_SZ_WIDTH_SHIFT) |
-			((dst_rect_area->height & 0xfff) << B2R2_SZ_HEIGHT_SHIFT);
+			((dst_rect_area->width & 0xfff) <<
+						B2R2_SZ_WIDTH_SHIFT) |
+			((dst_rect_area->height & 0xfff) <<
+						B2R2_SZ_HEIGHT_SHIFT);
 
 		if (B2R2_GENERIC_DEBUG_AREAS && dst_rect_area->x == 0 &&
 				dst_rect_area->y == 0) {
@@ -2550,6 +2833,19 @@ void b2r2_generic_set_areas(const struct b2r2_blt_request *req,
 	if (yuv_multi_buffer_dst) {
 		s32 dst_w = dst_rect_area->width;
 		s32 dst_h = dst_rect_area->height;
+		bool yuv420_dst =
+			dst_fmt == B2R2_BLT_FMT_YUV420_PACKED_PLANAR ||
+			dst_fmt == B2R2_BLT_FMT_YVU420_PACKED_PLANAR ||
+			dst_fmt == B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR ||
+			dst_fmt == B2R2_BLT_FMT_YVU420_PACKED_SEMI_PLANAR ||
+			dst_fmt == B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE;
+
+		bool yuv422_dst =
+			dst_fmt == B2R2_BLT_FMT_YUV422_PACKED_PLANAR ||
+			dst_fmt == B2R2_BLT_FMT_YVU422_PACKED_PLANAR ||
+			dst_fmt == B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR ||
+			dst_fmt == B2R2_BLT_FMT_YVU422_PACKED_SEMI_PLANAR ||
+			dst_fmt == B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE;
 		node = node->next;
 		/* Luma on SRC3 */
 		node->node.GROUP5.B2R2_SXY =
@@ -2559,9 +2855,7 @@ void b2r2_generic_set_areas(const struct b2r2_blt_request *req,
 			((dst_w & 0xfff) << B2R2_SZ_WIDTH_SHIFT) |
 			((dst_h & 0xfff) << B2R2_SZ_HEIGHT_SHIFT);
 
-		if (dst_fmt == B2R2_BLT_FMT_YUV420_PACKED_PLANAR ||
-				dst_fmt == B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR ||
-				dst_fmt == B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE) {
+		if (yuv420_dst) {
 			/*
 			 * Chroma goes on SRC2 and potentially on SRC1.
 			 * Chroma is half the size of luma. Must round up
@@ -2575,16 +2869,20 @@ void b2r2_generic_set_areas(const struct b2r2_blt_request *req,
 				(((dst_x & 0xffff) >> 1) << B2R2_XY_X_SHIFT) |
 				(((dst_y & 0xffff) >> 1) << B2R2_XY_Y_SHIFT);
 			node->node.GROUP4.B2R2_SSZ =
-				((((dst_w + 1) & 0xfff) >> 1) << B2R2_SZ_WIDTH_SHIFT) |
-				((((dst_h + 1) & 0xfff) >> 1) << B2R2_SZ_HEIGHT_SHIFT);
-
-			if (dst_fmt == B2R2_BLT_FMT_YUV420_PACKED_PLANAR) {
-				node->node.GROUP3.B2R2_SXY = node->node.GROUP4.B2R2_SXY;
-				node->node.GROUP3.B2R2_SSZ = node->node.GROUP4.B2R2_SSZ;
+				((((dst_w + 1) & 0xfff) >> 1) <<
+							B2R2_SZ_WIDTH_SHIFT) |
+				((((dst_h + 1) & 0xfff) >> 1) <<
+							B2R2_SZ_HEIGHT_SHIFT);
+
+			if (dst_fmt == B2R2_BLT_FMT_YUV420_PACKED_PLANAR ||
+					dst_fmt ==
+					B2R2_BLT_FMT_YVU420_PACKED_PLANAR) {
+				node->node.GROUP3.B2R2_SXY =
+					node->node.GROUP4.B2R2_SXY;
+				node->node.GROUP3.B2R2_SSZ =
+					node->node.GROUP4.B2R2_SSZ;
 			}
-		} else if (dst_fmt == B2R2_BLT_FMT_YUV422_PACKED_PLANAR ||
-				dst_fmt == B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR ||
-				dst_fmt == B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE) {
+		} else if (yuv422_dst) {
 			/*
 			 * Chroma goes on SRC2 and potentially on SRC1.
 			 * Now chroma is half the size of luma
@@ -2596,12 +2894,17 @@ void b2r2_generic_set_areas(const struct b2r2_blt_request *req,
 				(((dst_x & 0xffff) >> 1) << B2R2_XY_X_SHIFT) |
 				((dst_y & 0xffff) << B2R2_XY_Y_SHIFT);
 			node->node.GROUP4.B2R2_SSZ =
-				((((dst_w + 1) & 0xfff) >> 1) << B2R2_SZ_WIDTH_SHIFT) |
+				((((dst_w + 1) & 0xfff) >> 1) <<
+							B2R2_SZ_WIDTH_SHIFT) |
 				((dst_h & 0xfff) << B2R2_SZ_HEIGHT_SHIFT);
 
-			if (dst_fmt == B2R2_BLT_FMT_YUV422_PACKED_PLANAR) {
-				node->node.GROUP3.B2R2_SXY = node->node.GROUP4.B2R2_SXY;
-				node->node.GROUP3.B2R2_SSZ = node->node.GROUP4.B2R2_SSZ;
+			if (dst_fmt == B2R2_BLT_FMT_YUV422_PACKED_PLANAR ||
+					dst_fmt ==
+					B2R2_BLT_FMT_YVU422_PACKED_PLANAR) {
+				node->node.GROUP3.B2R2_SXY =
+					node->node.GROUP4.B2R2_SXY;
+				node->node.GROUP3.B2R2_SSZ =
+					node->node.GROUP4.B2R2_SSZ;
 			}
 		} else if (dst_fmt == B2R2_BLT_FMT_YUV444_PACKED_PLANAR) {
 			/*
@@ -2624,12 +2927,16 @@ void b2r2_generic_set_areas(const struct b2r2_blt_request *req,
 			((dst_x & 0xffff) << B2R2_XY_X_SHIFT) |
 			((dst_y & 0xffff) << B2R2_XY_Y_SHIFT);
 		node->node.GROUP4.B2R2_SSZ =
-			((dst_rect_area->width & 0xfff) << B2R2_SZ_WIDTH_SHIFT) |
-			((dst_rect_area->height & 0xfff) << B2R2_SZ_HEIGHT_SHIFT);
+			((dst_rect_area->width & 0xfff) <<
+							B2R2_SZ_WIDTH_SHIFT) |
+			((dst_rect_area->height & 0xfff) <<
+							B2R2_SZ_HEIGHT_SHIFT);
 		node->node.GROUP1.B2R2_TXY = 0;
 		node->node.GROUP1.B2R2_TSZ =
-			((dst_rect_area->width & 0xfff) << B2R2_SZ_WIDTH_SHIFT) |
-			((dst_rect_area->height & 0xfff) << B2R2_SZ_HEIGHT_SHIFT);
+			((dst_rect_area->width & 0xfff) <<
+							B2R2_SZ_WIDTH_SHIFT) |
+			((dst_rect_area->height & 0xfff) <<
+							B2R2_SZ_HEIGHT_SHIFT);
 	}
 
 	if (B2R2_GENERIC_DEBUG_AREAS && dst_rect_area->x == 0 &&
@@ -2705,6 +3012,8 @@ void b2r2_generic_set_areas(const struct b2r2_blt_request *req,
 		int n_nodes = 1;
 		if (dst_fmt == B2R2_BLT_FMT_YUV420_PACKED_PLANAR ||
 				dst_fmt == B2R2_BLT_FMT_YUV422_PACKED_PLANAR ||
+				dst_fmt == B2R2_BLT_FMT_YVU420_PACKED_PLANAR ||
+				dst_fmt == B2R2_BLT_FMT_YVU422_PACKED_PLANAR ||
 				dst_fmt == B2R2_BLT_FMT_YUV444_PACKED_PLANAR)
 			n_nodes = 2;
 
@@ -2750,7 +3059,9 @@ void b2r2_generic_set_areas(const struct b2r2_blt_request *req,
 
 			switch (dst_fmt) {
 			case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
+			case B2R2_BLT_FMT_YVU420_PACKED_PLANAR:
 			case B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR:
+			case B2R2_BLT_FMT_YVU420_PACKED_SEMI_PLANAR:
 			case B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE:
 				/*
 				 * Chroma is half the size of luma.
@@ -2761,14 +3072,20 @@ void b2r2_generic_set_areas(const struct b2r2_blt_request *req,
 				 * for luma_width==6.
 				 */
 				node->node.GROUP1.B2R2_TXY =
-					(((dst_x & 0xffff) >> 1) << B2R2_XY_X_SHIFT) |
-					(((dst_y & 0xffff) >> 1) << B2R2_XY_Y_SHIFT);
+					(((dst_x & 0xffff) >> 1) <<
+							B2R2_XY_X_SHIFT) |
+					(((dst_y & 0xffff) >> 1) <<
+							B2R2_XY_Y_SHIFT);
 				node->node.GROUP1.B2R2_TSZ =
-					((((dst_w + 1) & 0xfff) >> 1) << B2R2_SZ_WIDTH_SHIFT) |
-					((((dst_h + 1) & 0xfff) >> 1) << B2R2_SZ_HEIGHT_SHIFT);
+					((((dst_w + 1) & 0xfff) >> 1) <<
+							B2R2_SZ_WIDTH_SHIFT) |
+					((((dst_h + 1) & 0xfff) >> 1) <<
+							B2R2_SZ_HEIGHT_SHIFT);
 				break;
 			case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:
+			case B2R2_BLT_FMT_YVU422_PACKED_PLANAR:
 			case B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR:
+			case B2R2_BLT_FMT_YVU422_PACKED_SEMI_PLANAR:
 			case B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE:
 				/*
 				 * Now chroma is half the size of luma only
@@ -2778,11 +3095,14 @@ void b2r2_generic_set_areas(const struct b2r2_blt_request *req,
 				 * done horizontally.
 				 */
 				node->node.GROUP1.B2R2_TXY =
-					(((dst_x & 0xffff) >> 1) << B2R2_XY_X_SHIFT) |
+					(((dst_x & 0xffff) >> 1) <<
+							B2R2_XY_X_SHIFT) |
 					((dst_y & 0xffff) << B2R2_XY_Y_SHIFT);
 				node->node.GROUP1.B2R2_TSZ =
-					((((dst_w + 1) & 0xfff) >> 1) << B2R2_SZ_WIDTH_SHIFT) |
-					((dst_h & 0xfff) << B2R2_SZ_HEIGHT_SHIFT);
+					((((dst_w + 1) & 0xfff) >> 1) <<
+							B2R2_SZ_WIDTH_SHIFT) |
+					((dst_h & 0xfff) <<
+							B2R2_SZ_HEIGHT_SHIFT);
 				break;
 			case B2R2_BLT_FMT_YUV444_PACKED_PLANAR:
 				/*
@@ -2792,8 +3112,10 @@ void b2r2_generic_set_areas(const struct b2r2_blt_request *req,
 					((dst_x & 0xffff) << B2R2_XY_X_SHIFT) |
 					((dst_y & 0xffff) << B2R2_XY_Y_SHIFT);
 				node->node.GROUP1.B2R2_TSZ =
-					((dst_w & 0xfff) << B2R2_SZ_WIDTH_SHIFT) |
-					((dst_h & 0xfff) << B2R2_SZ_HEIGHT_SHIFT);
+					((dst_w & 0xfff) <<
+							B2R2_SZ_WIDTH_SHIFT) |
+					((dst_h & 0xfff) <<
+							B2R2_SZ_HEIGHT_SHIFT);
 				break;
 			default:
 				break;
@@ -2819,14 +3141,18 @@ void b2r2_generic_set_areas(const struct b2r2_blt_request *req,
 	} else {
 		node->node.GROUP4.B2R2_SXY = 0;
 		node->node.GROUP4.B2R2_SSZ =
-			((dst_rect_area->width & 0xfff) << B2R2_SZ_WIDTH_SHIFT) |
-			((dst_rect_area->height & 0xfff) << B2R2_SZ_HEIGHT_SHIFT);
+			((dst_rect_area->width & 0xfff) <<
+					B2R2_SZ_WIDTH_SHIFT) |
+			((dst_rect_area->height & 0xfff) <<
+					B2R2_SZ_HEIGHT_SHIFT);
 		node->node.GROUP1.B2R2_TXY =
 			((dst_x & 0xffff) << B2R2_XY_X_SHIFT) |
 			((dst_y & 0xffff) << B2R2_XY_Y_SHIFT);
 		node->node.GROUP1.B2R2_TSZ =
-			((dst_rect_area->width & 0xfff) << B2R2_SZ_WIDTH_SHIFT) |
-			((dst_rect_area->height & 0xfff) << B2R2_SZ_HEIGHT_SHIFT);
+			((dst_rect_area->width & 0xfff) <<
+					B2R2_SZ_WIDTH_SHIFT) |
+			((dst_rect_area->height & 0xfff) <<
+					B2R2_SZ_HEIGHT_SHIFT);
 
 		if (B2R2_GENERIC_DEBUG_AREAS && dst_rect_area->x == 0 &&
 				dst_rect_area->y == 0) {
diff --git a/drivers/video/b2r2/b2r2_generic.h b/drivers/video/b2r2/b2r2_generic.h
index d3dbd00ef1e..35451543c5c 100644
--- a/drivers/video/b2r2/b2r2_generic.h
+++ b/drivers/video/b2r2/b2r2_generic.h
@@ -39,13 +39,13 @@ int b2r2_generic_analyze(const struct b2r2_blt_request *req,
  * b2r2_generic_configure()
  */
 int b2r2_generic_configure(const struct b2r2_blt_request *req,
-						   struct b2r2_node *first,
-						   struct b2r2_work_buf *tmp_bufs,
-						   u32 buf_count);
+				struct b2r2_node *first,
+				struct b2r2_work_buf *tmp_bufs,
+				u32 buf_count);
 /**
  * b2r2_generic_set_areas()
  */
 void b2r2_generic_set_areas(const struct b2r2_blt_request *req,
-							struct b2r2_node *first,
-							struct b2r2_blt_rect *dst_rect_area);
+				struct b2r2_node *first,
+				struct b2r2_blt_rect *dst_rect_area);
 #endif
diff --git a/drivers/video/b2r2/b2r2_input_validation.c b/drivers/video/b2r2/b2r2_input_validation.c
index 783302da9a9..2604d8f77e0 100644
--- a/drivers/video/b2r2/b2r2_input_validation.c
+++ b/drivers/video/b2r2/b2r2_input_validation.c
@@ -49,7 +49,9 @@ static bool is_valid_format(enum b2r2_blt_fmt fmt)
 	case B2R2_BLT_FMT_1_BIT_A1:
 	case B2R2_BLT_FMT_8_BIT_A8:
 	case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YVU420_PACKED_PLANAR:
 	case B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YVU420_PACKED_SEMI_PLANAR:
 	case B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE:
 	case B2R2_BLT_FMT_16_BIT_ARGB4444:
 	case B2R2_BLT_FMT_16_BIT_ARGB1555:
@@ -57,7 +59,9 @@ static bool is_valid_format(enum b2r2_blt_fmt fmt)
 	case B2R2_BLT_FMT_Y_CB_Y_CR:
 	case B2R2_BLT_FMT_CB_Y_CR_Y:
 	case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YVU422_PACKED_PLANAR:
 	case B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YVU422_PACKED_SEMI_PLANAR:
 	case B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE:
 	case B2R2_BLT_FMT_24_BIT_RGB888:
 	case B2R2_BLT_FMT_24_BIT_ARGB8565:
@@ -152,11 +156,15 @@ static s32 width_2_complete_width(s32 width, enum b2r2_blt_fmt fmt)
 {
 	switch (fmt) {
 	case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YVU420_PACKED_PLANAR:
 	case B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YVU420_PACKED_SEMI_PLANAR:
 	case B2R2_BLT_FMT_Y_CB_Y_CR:
 	case B2R2_BLT_FMT_CB_Y_CR_Y:
 	case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YVU422_PACKED_PLANAR:
 	case B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YVU422_PACKED_SEMI_PLANAR:
 		return b2r2_align_up(width, 2);
 
 	case B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE:
@@ -172,11 +180,15 @@ static bool is_complete_width_for_fmt(s32 width, enum b2r2_blt_fmt fmt)
 {
 	switch (fmt) {
 	case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YVU420_PACKED_PLANAR:
 	case B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YVU420_PACKED_SEMI_PLANAR:
 	case B2R2_BLT_FMT_Y_CB_Y_CR:
 	case B2R2_BLT_FMT_CB_Y_CR_Y:
 	case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YVU422_PACKED_PLANAR:
 	case B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YVU422_PACKED_SEMI_PLANAR:
 		if (!b2r2_is_aligned(width, 2))
 			return false;
 
@@ -200,7 +212,9 @@ static bool is_valid_height_for_fmt(s32 height, enum b2r2_blt_fmt fmt)
 {
 	switch (fmt) {
 	case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YVU420_PACKED_PLANAR:
 	case B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YVU420_PACKED_SEMI_PLANAR:
 		if (!b2r2_is_aligned(height, 2))
 			return false;
 
@@ -249,8 +263,8 @@ static bool validate_img(struct b2r2_blt_img *img)
 	if (b2r2_is_mb_fmt(img->fmt)) {
 		if (!is_complete_width_for_fmt(img->width, img->fmt)) {
 			b2r2_log_info("Validation Error: "
-					"!is_complete_width_for_fmt(img->width, "
-						"img->fmt)\n");
+					"!is_complete_width_for_fmt(img->width,"
+					" img->fmt)\n");
 			return false;
 		}
 	} else {
@@ -259,25 +273,28 @@ static bool validate_img(struct b2r2_blt_img *img)
 			!is_complete_width_for_fmt(img->width, img->fmt))) {
 			b2r2_log_info("Validation Error: "
 					"0 == img->pitch && "
-					"(!is_aligned_width_for_fmt(img->width, img->fmt) || "
-					"!is_complete_width_for_fmt(img->width, "
-						"img->fmt))\n");
+					"(!is_aligned_width_for_fmt(img->width,"
+					" img->fmt) || "
+					"!is_complete_width_for_fmt(img->width,"
+					" img->fmt))\n");
 			return false;
 		}
 
 		if (img->pitch != 0 &&
-			!is_valid_pitch_for_fmt(img->pitch, img->width, img->fmt)) {
+			!is_valid_pitch_for_fmt(img->pitch, img->width,
+					img->fmt)) {
 			b2r2_log_info("Validation Error: "
 					"img->pitch != 0 && "
-					"!is_valid_pitch_for_fmt(img->pitch, img->width, "
-						"img->fmt)\n");
+					"!is_valid_pitch_for_fmt(img->pitch, "
+					"img->width, img->fmt)\n");
 			return false;
 		}
 	}
 
 	if (!is_valid_height_for_fmt(img->width, img->fmt)) {
 		b2r2_log_info("Validation Error: "
-				"!is_valid_height_for_fmt(img->width, img->fmt)\n");
+				"!is_valid_height_for_fmt(img->width, "
+				"img->fmt)\n");
 		return false;
 	}
 
@@ -345,7 +362,7 @@ bool b2r2_validate_user_req(struct b2r2_blt_req *req)
 	if (is_dst_clip_rect_used) {
 		if (!validate_rect(&req->dst_clip_rect)) {
 			b2r2_log_info("Validation Error: "
-					"!validate_rect(&req->dst_clip_rect)\n");
+				"!validate_rect(&req->dst_clip_rect)\n");
 			return false;
 		}
 	}
diff --git a/drivers/video/b2r2/b2r2_node_split.c b/drivers/video/b2r2/b2r2_node_split.c
index d6891a17e8c..6857e421c4a 100644
--- a/drivers/video/b2r2/b2r2_node_split.c
+++ b/drivers/video/b2r2/b2r2_node_split.c
@@ -194,6 +194,8 @@ static bool is_yvu_fmt(enum b2r2_blt_fmt fmt);
 static bool is_yuv420_fmt(enum b2r2_blt_fmt fmt);
 static bool is_yuv422_fmt(enum b2r2_blt_fmt fmt);
 static bool is_yuv444_fmt(enum b2r2_blt_fmt fmt);
+static bool is_yvu420_fmt(enum b2r2_blt_fmt fmt);
+static bool is_yvu422_fmt(enum b2r2_blt_fmt fmt);
 
 static int fmt_byte_pitch(enum b2r2_blt_fmt fmt, u32 width);
 static enum b2r2_native_fmt to_native_fmt(enum b2r2_blt_fmt fmt);
@@ -426,8 +428,12 @@ int b2r2_node_split_analyze(const struct b2r2_blt_request *req,
 			__func__, this->dst.win.x, this->dst.win.y,
 			this->dst.win.width, this->dst.win.height, this->dst.dx,
 			this->dst.dy);
-	b2r2_log_info("%s: buf_count=%d, buf_size=%d, node_count=%d\n",
+	if (this->buf_count > 0)
+		b2r2_log_info("%s: buf_count=%d, buf_size=%d, node_count=%d\n",
 			__func__, *buf_count, bufs[0]->size, *node_count);
+	else
+		b2r2_log_info("%s: buf_count=%d, node_count=%d\n",
+			__func__, *buf_count, *node_count);
 
 	return 0;
 
@@ -764,8 +770,8 @@ static int analyze_color_fill(struct b2r2_node_split_job *this,
 						this->src.color);
 		}
 
-		ret = analyze_fmt_conv(&this->src, &this->dst,
-			&this->ivmx, node_count);
+		ret = analyze_fmt_conv(&this->src, &this->dst, &this->ivmx,
+				node_count);
 		if (ret < 0)
 			goto error;
 	}
@@ -896,7 +902,7 @@ static int analyze_copy(struct b2r2_node_split_job *this,
 		this->type = B2R2_COPY;
 
 		ret = analyze_fmt_conv(&this->src, &this->dst, &this->ivmx,
-			&copy_count);
+				&copy_count);
 		if (ret < 0)
 			goto error;
 
@@ -957,7 +963,7 @@ static int analyze_rot_scale_downscale(struct b2r2_node_split_job *this,
 	tmp->win.height = dst->rect.width;
 
 	setup_tmp_buf(tmp, this->max_buf_size, dst->fmt, tmp->win.width,
-		tmp->win.height);
+			tmp->win.height);
 	tmp->tmp_buf_index = 1;
 	this->work_bufs[0].size = tmp->pitch * tmp->height;
 
@@ -1108,7 +1114,7 @@ static int analyze_scaling(struct b2r2_node_split_job *this,
 
 	/* Find out how many nodes a simple copy would require */
 	ret = analyze_fmt_conv(&this->src, &this->dst, &this->ivmx,
-		&copy_count);
+			&copy_count);
 	if (ret < 0)
 		goto error;
 
@@ -1228,7 +1234,7 @@ static int analyze_rotate(struct b2r2_node_split_job *this,
 
 	/* Finally, calculate the node count */
 	*node_count = nodes_per_tile *
-		calc_rot_count(this->dst.rect.width, this->dst.rect.height);
+		calc_rot_count(this->src.rect.width, this->src.rect.height);
 
 	return 0;
 
@@ -1489,8 +1495,8 @@ static int configure_sub_rot(struct b2r2_node *node,
 
 			b2r2_log_info("%s: y_pixels=%d\n", __func__, y_pixels);
 
-			ret = configure_rotate(node, src, dst, ivmx,
-				&node, job);
+			ret = configure_rotate(node, src, dst, ivmx, &node,
+					job);
 			if (ret < 0)
 				goto error;
 
@@ -1788,8 +1794,9 @@ static int configure_copy(struct b2r2_node *node,
 		}
 
 		node->node.GROUP0.B2R2_ACK |= B2R2_ACK_MODE_BYPASS_S2_S3;
-		if (this != NULL && (this->flags &
-				B2R2_BLT_FLAG_SOURCE_COLOR_KEY) != 0) {
+		if (this != NULL &&
+				(this->flags & B2R2_BLT_FLAG_SOURCE_COLOR_KEY)
+				!= 0) {
 			u32 key_color = 0;
 
 			node->node.GROUP0.B2R2_ACK |=
@@ -1805,7 +1812,8 @@ static int configure_copy(struct b2r2_node *node,
 			node->node.GROUP12.B2R2_KEY2 = key_color;
 		}
 
-		if (this != NULL && (this->flags &
+		if (this != NULL &&
+				(this->flags &
 				B2R2_BLT_FLAG_CLUT_COLOR_CORRECTION) != 0) {
 			struct b2r2_blt_request *request =
 				container_of(this, struct b2r2_blt_request,
@@ -2514,8 +2522,14 @@ static void set_buf(struct b2r2_node_split_buf *buf, u32 addr,
 					buf->pitch * buf->height);
 			break;
 		case B2R2_FMT_TYPE_PLANAR:
-			buf->chroma_addr = (u32)(((u8 *)addr) +
+			if (is_yuv422_fmt(buf->fmt) ||
+					is_yuv420_fmt(buf->fmt)) {
+				buf->chroma_addr = (u32)(((u8 *)addr) +
+					buf->pitch * buf->height);
+			} else {
+				buf->chroma_cr_addr = (u32)(((u8 *)addr) +
 					buf->pitch * buf->height);
+			}
 			if (is_yuv420_fmt(buf->fmt)) {
 				/*
 				 * Use ceil(height/2) in case
@@ -2529,10 +2543,15 @@ static void set_buf(struct b2r2_node_split_buf *buf, u32 addr,
 				buf->chroma_cr_addr =
 					(u32)(((u8 *)buf->chroma_addr) +
 					(buf->pitch >> 1) * buf->height);
-			} else {
-				buf->chroma_cr_addr =
-					(u32)(((u8 *)buf->chroma_addr) +
-					(buf->pitch * buf->height));
+			} else if (is_yvu420_fmt(buf->fmt)) {
+				buf->chroma_addr =
+					(u32)(((u8 *)buf->chroma_cr_addr) +
+					(buf->pitch >> 1) *
+					((buf->height + 1) >> 1));
+			} else if (is_yvu422_fmt(buf->fmt)) {
+				buf->chroma_addr =
+					(u32)(((u8 *)buf->chroma_cr_addr) +
+					(buf->pitch >> 1) * buf->height);
 			}
 			break;
 		default:
@@ -2759,9 +2778,13 @@ static bool is_yuv_fmt(enum b2r2_blt_fmt fmt)
 	case B2R2_BLT_FMT_Y_CB_Y_CR:
 	case B2R2_BLT_FMT_CB_Y_CR_Y:
 	case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YVU420_PACKED_PLANAR:
 	case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YVU422_PACKED_PLANAR:
 	case B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YVU420_PACKED_SEMI_PLANAR:
 	case B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YVU422_PACKED_SEMI_PLANAR:
 	case B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE:
 	case B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE:
 	case B2R2_BLT_FMT_YUV444_PACKED_PLANAR:
@@ -2777,7 +2800,11 @@ static bool is_yuv_fmt(enum b2r2_blt_fmt fmt)
 static bool is_yvu_fmt(enum b2r2_blt_fmt fmt)
 {
 	switch (fmt) {
-	case B2R2_BLT_FMT_Y_CB_Y_CR:
+	case B2R2_BLT_FMT_CB_Y_CR_Y:
+	case B2R2_BLT_FMT_YVU420_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YVU422_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YVU420_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YVU422_PACKED_SEMI_PLANAR:
 		return true;
 	default:
 		return false;
@@ -2792,7 +2819,9 @@ static bool is_yuv420_fmt(enum b2r2_blt_fmt fmt)
 
 	switch (fmt) {
 	case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YVU420_PACKED_PLANAR:
 	case B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YVU420_PACKED_SEMI_PLANAR:
 	case B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE:
 		return true;
 	default:
@@ -2806,7 +2835,9 @@ static bool is_yuv422_fmt(enum b2r2_blt_fmt fmt)
 	case B2R2_BLT_FMT_Y_CB_Y_CR:
 	case B2R2_BLT_FMT_CB_Y_CR_Y:
 	case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YVU422_PACKED_PLANAR:
 	case B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YVU422_PACKED_SEMI_PLANAR:
 	case B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE:
 		return true;
 	default:
@@ -2814,6 +2845,33 @@ static bool is_yuv422_fmt(enum b2r2_blt_fmt fmt)
 	}
 }
 
+/**
+ * is_yvu420_fmt() - returns whether the given format is a yvu420 format
+ */
+static bool is_yvu420_fmt(enum b2r2_blt_fmt fmt)
+{
+	switch (fmt) {
+	case B2R2_BLT_FMT_YVU420_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YVU420_PACKED_SEMI_PLANAR:
+		return true;
+	default:
+		return false;
+	}
+}
+
+static bool is_yvu422_fmt(enum b2r2_blt_fmt fmt)
+{
+	switch (fmt) {
+	case B2R2_BLT_FMT_CB_Y_CR_Y:
+	case B2R2_BLT_FMT_YVU422_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YVU422_PACKED_SEMI_PLANAR:
+		return true;
+	default:
+		return false;
+	}
+}
+
+
 /**
  * is_yuv444_fmt() - returns whether the given format is a yuv444 format
  */
@@ -2846,11 +2904,15 @@ static int fmt_byte_pitch(enum b2r2_blt_fmt fmt, u32 width)
 
 	case B2R2_BLT_FMT_8_BIT_A8:                        /* Fall through */
 	case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:            /* Fall through */
+	case B2R2_BLT_FMT_YVU420_PACKED_PLANAR:            /* Fall through */
 	case B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE: /* Fall through */
 	case B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR:       /* Fall through */
+	case B2R2_BLT_FMT_YVU420_PACKED_SEMI_PLANAR:       /* Fall through */
 	case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:            /* Fall through */
+	case B2R2_BLT_FMT_YVU422_PACKED_PLANAR:            /* Fall through */
 	case B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE: /* Fall through */
 	case B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR:       /* Fall through */
+	case B2R2_BLT_FMT_YVU422_PACKED_SEMI_PLANAR:       /* Fall through */
 	case B2R2_BLT_FMT_YUV444_PACKED_PLANAR:
 		return width;
 
@@ -2913,13 +2975,17 @@ static enum b2r2_native_fmt to_native_fmt(enum b2r2_blt_fmt fmt)
 	case B2R2_BLT_FMT_Y_CB_Y_CR:
 		return B2R2_NATIVE_YCBCR422R;
 	case B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YVU420_PACKED_SEMI_PLANAR:
 	case B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YVU422_PACKED_SEMI_PLANAR:
 		return B2R2_NATIVE_YCBCR42X_R2B;
 	case B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE:
 	case B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE:
 		return B2R2_NATIVE_YCBCR42X_MBN;
 	case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YVU420_PACKED_PLANAR:
 	case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YVU422_PACKED_PLANAR:
 	case B2R2_BLT_FMT_YUV444_PACKED_PLANAR:
 		return B2R2_NATIVE_YUV;
 	default:
@@ -3001,11 +3067,15 @@ static enum b2r2_fmt_type get_fmt_type(enum b2r2_blt_fmt fmt)
 	case B2R2_BLT_FMT_8_BIT_A8:
 		return B2R2_FMT_TYPE_RASTER;
 	case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YVU420_PACKED_PLANAR:
 	case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YVU422_PACKED_PLANAR:
 	case B2R2_BLT_FMT_YUV444_PACKED_PLANAR:
 		return B2R2_FMT_TYPE_PLANAR;
 	case B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YVU420_PACKED_SEMI_PLANAR:
 	case B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YVU422_PACKED_SEMI_PLANAR:
 	case B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE:
 	case B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE:
 		return B2R2_FMT_TYPE_SEMI_PLANAR;
diff --git a/drivers/video/b2r2/b2r2_utils.c b/drivers/video/b2r2/b2r2_utils.c
index 0b5a2e65d12..44ea06e51fd 100644
--- a/drivers/video/b2r2/b2r2_utils.c
+++ b/drivers/video/b2r2/b2r2_utils.c
@@ -80,7 +80,9 @@ int b2r2_get_fmt_bpp(enum b2r2_blt_fmt fmt)
 		return 8;
 
 	case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YVU420_PACKED_PLANAR:
 	case B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YVU420_PACKED_SEMI_PLANAR:
 	case B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE:
 		return 12;
 
@@ -90,7 +92,9 @@ int b2r2_get_fmt_bpp(enum b2r2_blt_fmt fmt)
 	case B2R2_BLT_FMT_Y_CB_Y_CR:
 	case B2R2_BLT_FMT_CB_Y_CR_Y:
 	case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YVU422_PACKED_PLANAR:
 	case B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YVU422_PACKED_SEMI_PLANAR:
 	case B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE:
 		return 16;
 
@@ -106,7 +110,8 @@ int b2r2_get_fmt_bpp(enum b2r2_blt_fmt fmt)
 		return 32;
 
 	default:
-		b2r2_log_err("%s: Internal error! Format %#x not recognized.\n", __func__, fmt);
+		b2r2_log_err("%s: Internal error! Format %#x not recognized.\n",
+			__func__, fmt);
 		return 32;
 	}
 }
@@ -115,12 +120,16 @@ int b2r2_get_fmt_y_bpp(enum b2r2_blt_fmt fmt)
 {
 	switch (fmt) {
 	case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YVU420_PACKED_PLANAR:
 	case B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YVU420_PACKED_SEMI_PLANAR:
 	case B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE:
 	case B2R2_BLT_FMT_Y_CB_Y_CR:
 	case B2R2_BLT_FMT_CB_Y_CR_Y:
 	case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YVU422_PACKED_PLANAR:
 	case B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YVU422_PACKED_SEMI_PLANAR:
 	case B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE:
 	case B2R2_BLT_FMT_YUV444_PACKED_PLANAR:
 	case B2R2_BLT_FMT_24_BIT_YUV888:
@@ -128,7 +137,8 @@ int b2r2_get_fmt_y_bpp(enum b2r2_blt_fmt fmt)
 		return 8;
 
 	default:
-		b2r2_log_err("%s: Internal error! Non YCbCr format supplied.\n", __func__);
+		b2r2_log_err("%s: Internal error! Non YCbCr format supplied.\n",
+			__func__);
 		return 8;
 	}
 }
@@ -197,7 +207,9 @@ bool b2r2_is_ycbcrsp_fmt(enum b2r2_blt_fmt fmt)
 {
 	switch (fmt) {
 	case B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YVU420_PACKED_SEMI_PLANAR:
 	case B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YVU422_PACKED_SEMI_PLANAR:
 		return true;
 
 	default:
@@ -209,7 +221,9 @@ bool b2r2_is_ycbcrp_fmt(enum b2r2_blt_fmt fmt)
 {
 	switch (fmt) {
 	case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YVU420_PACKED_PLANAR:
 	case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YVU422_PACKED_PLANAR:
 	case B2R2_BLT_FMT_YUV444_PACKED_PLANAR:
 		return true;
 
@@ -222,7 +236,9 @@ bool b2r2_is_ycbcr420_fmt(enum b2r2_blt_fmt fmt)
 {
 	switch (fmt) {
 	case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YVU420_PACKED_PLANAR:
 	case B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YVU420_PACKED_SEMI_PLANAR:
 	case B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE:
 		return true;
 
@@ -237,7 +253,9 @@ bool b2r2_is_ycbcr422_fmt(enum b2r2_blt_fmt fmt)
 	case B2R2_BLT_FMT_Y_CB_Y_CR:
 	case B2R2_BLT_FMT_CB_Y_CR_Y:
 	case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YVU422_PACKED_PLANAR:
 	case B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YVU422_PACKED_SEMI_PLANAR:
 	case B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE:
 		return true;
 
diff --git a/include/video/b2r2_blt.h b/include/video/b2r2_blt.h
index 0284d9da65d..1cf5f661598 100644
--- a/include/video/b2r2_blt.h
+++ b/include/video/b2r2_blt.h
@@ -101,6 +101,32 @@ struct b2r2_blt_rect {
  * three separate planes, one for each color component, namely Y, U, and V.
  * All planes use full resolution, there is no subsampling.
  * The buffer shall contain a plane of Y, U, and V data in this order.
+ * @B2R2_BLT_FMT_YVU420_PACKED_SEMI_PLANAR: YVU planar format, organized with
+ * a first plane containing Y pixels, and a second plane containing V and U
+ * pixels interleaved with the first V value first. V and U pixels are
+ * sub-sampled by a factor of two both horizontally and vertically. The buffer
+ * shall contain two planes, one plane with Y, and one with V and U data.
+ * (Same as B2R2 420 Raster 2 buffer - 420 R2B except that chroma order is
+ * swapped.)
+ * @B2R2_BLT_FMT_YVU422_PACKED_SEMI_PLANAR: YVU planar format, organized with
+ * a first plane containing Y pixels, and a second plane containing V and U
+ * pixels interleaved with the first V value first. V and U pixels are
+ * sub-sampled by a factor of two horizontally. The buffer shall contain a
+ * two planes, one with Y, and one with V and U data.
+ * (Same as B2R2 422 Raster 2 buffer - 422 R2B except that chroma order is
+ * swapped.)
+ * @B2R2_BLT_FMT_YVU420_PACKED_PLANAR: YVU planar format, organized with
+ * three separate planes for each color component, namely Y, V, and U.
+ * V and U pixels are sub-sampled by a factor of two both horizontally and
+ * vertically. The buffer shall contain a plane of Y, V, and U data in this
+ * order. (Same as B2R2_BLT_FMT_YUV420_PACKED_PLANAR except that chroma
+ * order is swapped.)
+ * @B2R2_BLT_FMT_YVU422_PACKED_PLANAR: YVU planar format, organized with
+ * three separate planes for each color component, namely Y, V, and U.
+ * V and U pixels are subsampled by a factor of two horizontally.
+ * The buffer shall contain a plane of Y, V, and U data in this order.
+ * (Same as B2R2_BLT_FMT_YUV422_PACKED_PLANAR except that chroma
+ * order is swapped.)
  */
 enum b2r2_blt_fmt {
     B2R2_BLT_FMT_UNUSED = 0,
@@ -125,6 +151,10 @@ enum b2r2_blt_fmt {
     B2R2_BLT_FMT_1_BIT_A1 = 0x7F000006,
     B2R2_BLT_FMT_8_BIT_A8 = 0x7F000007,
     B2R2_BLT_FMT_YUV444_PACKED_PLANAR = 0x7F000008,
+    B2R2_BLT_FMT_YVU420_PACKED_SEMI_PLANAR = 0x7F000009,
+    B2R2_BLT_FMT_YVU422_PACKED_SEMI_PLANAR = 0x7F00000A,
+    B2R2_BLT_FMT_YVU420_PACKED_PLANAR = 0x7F00000B,
+    B2R2_BLT_FMT_YVU422_PACKED_PLANAR = 0x7F00000C,
 };
 
 /**
-- 
cgit v1.2.3


From a3874fac24c5e99f754ee813f106261329d45430 Mon Sep 17 00:00:00 2001
From: Philippe Langlais <philippe.langlais@stericsson.com>
Date: Tue, 11 Oct 2011 16:21:20 +0200
Subject: video: mcde: Request dsi/dpi clocks only if needed

DSI clocks (HDMICLK, TVCLK) and regulator VANA
should only be requested if a channel uses DSI
as formatter.
DPI Clock (LCDCLK) is only requested if DPI is
used as formatter.

ST-Ericsson Linux next: -
ST-Ericsson ID: AP 329602
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I2e9a63ef58d3f11f7e2c47dbd86bf1fbbec3b71e
Signed-off-by: Jimmy Rubin <jimmy.rubin@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/18030
Reviewed-by: QATOOLS
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>

Conflicts:

	arch/arm/mach-ux500/devices-db5500.c
	arch/arm/mach-ux500/devices-db8500.c
	arch/arm/mach-ux500/include/mach/prcmu-fw-api.h
	arch/arm/mach-ux500/prcmu-db5500.c

Conflicts:

	arch/arm/mach-ux500/devices-db5500.c
	arch/arm/mach-ux500/devices-db8500.c
---
 drivers/video/mcde/mcde_hw.c | 205 +++++++++++++++++++++++++++----------------
 include/video/mcde.h         |   9 +-
 2 files changed, 137 insertions(+), 77 deletions(-)

diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index 1b171017161..42f3faf9e29 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -74,6 +74,8 @@ static struct clk *clock_dsi_lp;
 static u8 mcde_is_enabled;
 static struct mutex mcde_hw_lock;
 static struct delayed_work hw_timeout_work;
+static u8 enable_dsi;
+static u8 dsi_is_enabled;
 
 static u8 mcde_dynamic_power_management = true;
 
@@ -414,47 +416,13 @@ static int enable_clocks_and_power(struct platform_device *pdev)
 		dev_warn(&pdev->dev, "%s: esram_epod regulator is null\n"
 						, __func__);
 	}
-
-	if (regulator_vana) {
-		ret = regulator_enable(regulator_vana);
-		if (ret < 0) {
-			dev_warn(&pdev->dev, "%s: regulator_enable failed\n",
-			__func__);
-			goto regulator_vana_err;
-		}
-	} else {
-		dev_warn(&pdev->dev, "%s: vana regulator is null\n"
-						, __func__);
-		goto regulator_vana_err;
-	}
 #endif
-
-	ret = pdata->platform_enable();
-	if (ret < 0) {
-		dev_warn(&pdev->dev, "%s: "
-			"platform_enable failed ret = %d\n", __func__, ret);
-		goto prcmu_err;
+	pdata->platform_set_clocks();
+	if (enable_dsi > 0) {
+		pdata->platform_enable_dsipll();
+		dsi_is_enabled = true;
 	}
 
-	ret = clk_enable(clock_dpi);
-	if (ret < 0) {
-		dev_warn(&pdev->dev, "%s: "
-			"clk_enable dpi failed ret = %d\n", __func__, ret);
-		goto clk_dpi_err;
-	}
-
-	ret = clk_enable(clock_dsi);
-	if (ret < 0) {
-		dev_warn(&pdev->dev, "%s: "
-			"clk_enable dsi failed ret = %d\n", __func__, ret);
-		goto clk_dsi_err;
-	}
-	ret = clk_enable(clock_dsi_lp);
-	if (ret < 0) {
-		dev_warn(&pdev->dev, "%s: "
-			"clk_enable dsi_lp failed ret = %d\n", __func__, ret);
-		goto clk_dsi_lp_err;
-	}
 	ret = clk_enable(clock_mcde);
 	if (ret < 0) {
 		dev_warn(&pdev->dev, "%s: "
@@ -465,18 +433,7 @@ static int enable_clocks_and_power(struct platform_device *pdev)
 	return ret;
 
 clk_mcde_err:
-	clk_disable(clock_dsi_lp);
-clk_dsi_lp_err:
-	clk_disable(clock_dsi);
-clk_dsi_err:
-	clk_disable(clock_dpi);
-clk_dpi_err:
-	pdata->platform_disable();
-prcmu_err:
 #ifdef CONFIG_REGULATOR
-	if (regulator_vana)
-		regulator_disable(regulator_vana);
-regulator_vana_err:
 	if (regulator_esram_epod)
 		regulator_disable(regulator_esram_epod);
 regulator_esram_err:
@@ -493,27 +450,13 @@ static int disable_clocks_and_power(struct platform_device *pdev)
 
 	dev_vdbg(&mcde_dev->dev, "%s\n", __func__);
 
-	clk_disable(clock_dpi);
-	clk_disable(clock_dsi_lp);
 	clk_disable(clock_mcde);
-	clk_disable(clock_dsi);
-
-	pdata->platform_disable();
-
-#ifdef CONFIG_REGULATOR
-	if (regulator_vana) {
-		ret = regulator_disable(regulator_vana);
-		if (ret < 0) {
-			dev_warn(&pdev->dev, "%s: regulator_disable failed\n"
-					, __func__);
-			goto regulator_vana_err;
-		}
-	} else {
-		dev_warn(&pdev->dev, "%s: vana regulator is null\n"
-					, __func__);
-		goto regulator_vana_err;
+	if (enable_dsi > 0) {
+		pdata->platform_disable_dsipll();
+		dsi_is_enabled = false;
 	}
 
+#ifdef CONFIG_REGULATOR
 	if (regulator_mcde_epod) {
 		ret = regulator_disable(regulator_mcde_epod);
 		if (ret < 0) {
@@ -543,12 +486,7 @@ static int disable_clocks_and_power(struct platform_device *pdev)
 regulator_esram_epod_err:
 	regulator_enable(regulator_mcde_epod);
 regulator_mcde_epod_err:
-	regulator_enable(regulator_vana);
-regulator_vana_err:
-	clk_enable(clock_dpi);
-	clk_enable(clock_dsi_lp);
 	clk_enable(clock_mcde);
-	clk_enable(clock_dsi);
 #endif
 	return ret;
 }
@@ -607,6 +545,22 @@ static void update_mcde_registers(void)
 		MCDE_VSCRC1_VSPMAX(0xff));
 }
 
+static void disable_formatter(struct mcde_port *port)
+{
+	if (port->type == MCDE_PORTTYPE_DSI) {
+		if (port->phy.dsi.clk_dsi)
+			clk_disable(port->phy.dsi.clk_dsi);
+		if (port->phy.dsi.clk_dsi_lp)
+			clk_disable(port->phy.dsi.clk_dsi_lp);
+		if (port->phy.dsi.reg_vana)
+			regulator_disable(port->phy.dsi.reg_vana);
+	}
+	if (port->type == MCDE_PORTTYPE_DPI) {
+		if (port->phy.dpi.clk_dpi)
+			clk_disable(port->phy.dpi.clk_dpi);
+	}
+}
+
 static int disable_mcde_hw(bool force_disable)
 {
 	int i;
@@ -635,6 +589,10 @@ static int disable_mcde_hw(bool force_disable)
 					cpu_relax();
 					udelay(100);
 				}
+			if (chnl->formatter_updated) {
+				disable_formatter(&chnl->port);
+				chnl->formatter_updated = false;
+			}
 		} else if (chnl->enabled && chnl->continous_running) {
 			mcde_up = true;
 		}
@@ -1291,6 +1249,36 @@ static int update_channel_static_registers(struct mcde_chnl_state *chnl)
 		int i = 0;
 		u8 idx;
 		u8 lnk = port->link;
+		int ret;
+
+		if (port->phy.dsi.reg_vana) {
+			ret = regulator_enable(port->phy.dsi.reg_vana);
+			if (ret < 0) {
+				dev_warn(&mcde_dev->dev,
+					"%s: regulator_enable failed\n",
+								__func__);
+				goto regulator_vana_err;
+			}
+		}
+
+		if (port->phy.dsi.clk_dsi) {
+			ret = clk_enable(port->phy.dsi.clk_dsi);
+			if (ret < 0) {
+				dev_warn(&mcde_dev->dev, "%s: "
+					"clk_enable dsi failed ret = %d\n",
+								__func__, ret);
+				goto clk_dsi_err;
+			}
+		}
+		if (port->phy.dsi.clk_dsi_lp) {
+			ret = clk_enable(port->phy.dsi.clk_dsi_lp);
+			if (ret < 0) {
+				dev_warn(&mcde_dev->dev, "%s: "
+					"clk_enable dsi_lp failed ret = %d\n",
+								__func__, ret);
+				goto clk_dsi_lp_err;
+			}
+		}
 
 		if (hardware_version == MCDE_CHIP_VERSION_1_0_4)
 			idx = chnl->id;
@@ -1304,7 +1292,7 @@ static int update_channel_static_registers(struct mcde_chnl_state *chnl)
 			if (hardware_version == MCDE_CHIP_VERSION_3_0_5) {
 				dev_err(&mcde_dev->dev,
 				"DSI TE polling is not supported on this HW\n");
-				return -EINVAL;
+				goto dsi_link_error;
 			}
 
 			/* Enable DSI TE polling */
@@ -1324,7 +1312,7 @@ static int update_channel_static_registers(struct mcde_chnl_state *chnl)
 				dev_warn(&mcde_dev->dev,
 				"DSI %d data lane remap not available!\n",
 				lnk);
-				return -EINVAL;
+				goto dsi_link_error;
 			}
 		} else
 			dsi_wfld(lnk, DSI_MCTL_MAIN_DATA_CTL, DLX_REMAP_EN,
@@ -1365,7 +1353,7 @@ static int update_channel_static_registers(struct mcde_chnl_state *chnl)
 			if (i++ == 10) {
 				dev_warn(&mcde_dev->dev,
 					"DSI lane not ready (link=%d)!\n", lnk);
-				return -EINVAL;
+				goto dsi_link_error;
 			}
 		}
 
@@ -1389,12 +1377,40 @@ static int update_channel_static_registers(struct mcde_chnl_state *chnl)
 		}
 	}
 
+	if (port->type == MCDE_PORTTYPE_DPI) {
+		if (port->phy.dpi.clk_dpi) {
+			int ret;
+			ret = clk_enable(port->phy.dpi.clk_dpi);
+			if (ret < 0) {
+				dev_warn(&mcde_dev->dev, "%s: "
+					"clk_enable dsi_lp failed ret = %d\n",
+								__func__, ret);
+				goto clk_dpi_err;
+			}
+		}
+	}
+
 	mcde_wfld(MCDE_CR, MCDEEN, true);
 	chnl->formatter_updated = true;
 
 	dev_vdbg(&mcde_dev->dev, "Static registers setup, chnl=%d\n", chnl->id);
 
 	return 0;
+dsi_link_error:
+	if (port->phy.dsi.clk_dsi_lp)
+		clk_disable(port->phy.dsi.clk_dsi_lp);
+clk_dsi_lp_err:
+	if (port->phy.dsi.clk_dsi)
+		clk_disable(port->phy.dsi.clk_dsi);
+clk_dsi_err:
+	if (port->phy.dsi.reg_vana) {
+		regulator_disable(port->phy.dsi.reg_vana);
+		chnl->port.phy.dsi.reg_vana = NULL;
+	}
+regulator_vana_err:
+clk_dpi_err:
+	return -EINVAL;
+
 }
 
 /* REVIEW: Make update_* an mcde_rectangle? */
@@ -2294,6 +2310,25 @@ static struct mcde_chnl_state *_mcde_chnl_get(enum mcde_chnl chnl_id,
 	_mcde_chnl_apply(chnl);
 	chnl->reserved = true;
 
+	if (chnl->port.type == MCDE_PORTTYPE_DSI) {
+#ifdef CONFIG_REGULATOR
+		chnl->port.phy.dsi.reg_vana = regulator_vana;
+#else
+		chnl->port.phy.dsi.reg_vana = NULL;
+#endif
+		chnl->port.phy.dsi.clk_dsi = clock_dsi;
+		chnl->port.phy.dsi.clk_dsi_lp = clock_dsi_lp;
+		enable_dsi++;
+		if (!dsi_is_enabled && mcde_is_enabled) {
+			struct mcde_platform_data *pdata =
+					mcde_dev->dev.platform_data;
+			pdata->platform_enable_dsipll();
+			dsi_is_enabled = true;
+		}
+	} else if (chnl->port.type == MCDE_PORTTYPE_DPI) {
+		chnl->port.phy.dpi.clk_dpi = clock_dpi;
+	}
+
 	return chnl;
 }
 
@@ -2681,6 +2716,20 @@ void mcde_chnl_put(struct mcde_chnl_state *chnl)
 	dev_vdbg(&mcde_dev->dev, "%s\n", __func__);
 
 	chnl->reserved = false;
+	if (chnl->port.type == MCDE_PORTTYPE_DSI) {
+		chnl->port.phy.dsi.reg_vana = NULL;
+		chnl->port.phy.dsi.clk_dsi = NULL;
+		chnl->port.phy.dsi.clk_dsi_lp = NULL;
+		enable_dsi--;
+		if (dsi_is_enabled && enable_dsi == 0) {
+			struct mcde_platform_data *pdata =
+					mcde_dev->dev.platform_data;
+			pdata->platform_disable_dsipll();
+			dsi_is_enabled = false;
+		}
+	} else if (chnl->port.type == MCDE_PORTTYPE_DPI) {
+		chnl->port.phy.dpi.clk_dpi = NULL;
+	}
 
 	dev_vdbg(&mcde_dev->dev, "%s exit\n", __func__);
 }
@@ -2729,6 +2778,12 @@ void mcde_chnl_disable(struct mcde_chnl_state *chnl)
 			udelay(100);
 		}
 	}
+	if (chnl->formatter_updated) {
+		disable_formatter(&chnl->port);
+		chnl->formatter_updated = false;
+	}
+	del_timer(&chnl->dsi_te_timer);
+	del_timer(&chnl->auto_sync_timer);
 	(void)disable_mcde_hw(false);
 	mutex_unlock(&mcde_hw_lock);
 
diff --git a/include/video/mcde.h b/include/video/mcde.h
index 1777e272329..31c6443fcd2 100644
--- a/include/video/mcde.h
+++ b/include/video/mcde.h
@@ -170,6 +170,9 @@ struct mcde_port {
 			u8 num_data_lanes;
 			u8 ui;
 			bool clk_cont;
+			struct clk *clk_dsi;
+			struct clk *clk_dsi_lp;
+			struct regulator *reg_vana;
 
 			/* DSI data lanes are swapped if true */
 			bool data_lanes_swap;
@@ -179,6 +182,7 @@ struct mcde_port {
 			bool tv_mode;
 			u16 clock_div; /* use 0 or 1 for no clock divider */
 			u32 polarity;    /* see DPI_ACT_LOW_* definitions */
+			struct clk *clk_dpi;
 		} dpi;
 	} phy;
 };
@@ -424,8 +428,9 @@ struct mcde_platform_data {
 	const char *clock_dpi_id;
 	const char *clock_mcde_id;
 
-	int (*platform_enable)(void);
-	int (*platform_disable)(void);
+	int (*platform_set_clocks)(void);
+	int (*platform_enable_dsipll)(void);
+	int (*platform_disable_dsipll)(void);
 };
 
 int mcde_init(void);
-- 
cgit v1.2.3


From 35fcc21edd363515636edf3d92fdc3ce7cdc516e Mon Sep 17 00:00:00 2001
From: Jimmy Rubin <jimmy.rubin@stericsson.com>
Date: Fri, 18 Mar 2011 10:18:50 +0100
Subject: video: mcde: Enable esram34 only if needed

The esram34 epod is only enabled when MCDE is used for rotation.

ST-Ericsson Linux Next: -
ST-Ericsson ID: AP 329602
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I8cf82fb5305b51c8dd27622689ae616eb834aa42
Signed-off-by: Jimmy Rubin <jimmy.rubin@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/18986
Reviewed-by: David PARIS <david.paris-nonst@stericsson.com>
Reviewed-by: QATOOLS
Reviewed-by: Marcel TUNNISSEN <marcel.tuennissen@stericsson.com>
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
---
 drivers/video/mcde/mcde_hw.c | 68 +++++++++++++++++++++++++-------------------
 include/video/mcde.h         |  1 +
 2 files changed, 39 insertions(+), 30 deletions(-)

diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index 42f3faf9e29..e2174bc1d0a 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -282,6 +282,7 @@ struct mcde_chnl_state {
 	bool continous_running;
 	bool disable_software_trig;
 	bool formatter_updated;
+	bool esram_is_enabled;
 };
 
 static struct mcde_chnl_state *channels;
@@ -404,18 +405,6 @@ static int enable_clocks_and_power(struct platform_device *pdev)
 						, __func__);
 		return -EINVAL;
 	}
-
-	if (regulator_esram_epod) {
-		ret = regulator_enable(regulator_esram_epod);
-		if (ret < 0) {
-			dev_warn(&pdev->dev, "%s: regulator_enable failed\n",
-			__func__);
-			goto regulator_esram_err;
-		}
-	} else {
-		dev_warn(&pdev->dev, "%s: esram_epod regulator is null\n"
-						, __func__);
-	}
 #endif
 	pdata->platform_set_clocks();
 	if (enable_dsi > 0) {
@@ -434,9 +423,6 @@ static int enable_clocks_and_power(struct platform_device *pdev)
 
 clk_mcde_err:
 #ifdef CONFIG_REGULATOR
-	if (regulator_esram_epod)
-		regulator_disable(regulator_esram_epod);
-regulator_esram_err:
 	if (regulator_mcde_epod)
 		regulator_disable(regulator_mcde_epod);
 #endif
@@ -469,22 +455,8 @@ static int disable_clocks_and_power(struct platform_device *pdev)
 					, __func__);
 		goto regulator_mcde_epod_err;
 	}
-
-	if (regulator_esram_epod) {
-		ret = regulator_disable(regulator_esram_epod);
-		if (ret < 0) {
-			dev_warn(&pdev->dev, "%s: regulator_disable failed\n"
-					, __func__);
-			goto regulator_esram_epod_err;
-		}
-	} else {
-		dev_warn(&pdev->dev, "%s: esram_epod regulator is null\n"
-					, __func__);
-	}
 	return ret;
 
-regulator_esram_epod_err:
-	regulator_enable(regulator_mcde_epod);
 regulator_mcde_epod_err:
 	clk_enable(clock_mcde);
 #endif
@@ -593,6 +565,16 @@ static int disable_mcde_hw(bool force_disable)
 				disable_formatter(&chnl->port);
 				chnl->formatter_updated = false;
 			}
+			if (chnl->esram_is_enabled) {
+				int ret;
+				ret = regulator_disable(chnl->port.reg_esram);
+				if (ret < 0) {
+					dev_warn(&mcde_dev->dev,
+						"%s: disable failed\n",
+								__func__);
+				}
+				chnl->esram_is_enabled = false;
+			}
 		} else if (chnl->enabled && chnl->continous_running) {
 			mcde_up = true;
 		}
@@ -2329,6 +2311,12 @@ static struct mcde_chnl_state *_mcde_chnl_get(enum mcde_chnl chnl_id,
 		chnl->port.phy.dpi.clk_dpi = clock_dpi;
 	}
 
+#ifdef CONFIG_REGULATOR
+	chnl->port.reg_esram = regulator_esram_epod;
+#else
+	chnl->port.reg_esram = NULL;
+#endif
+
 	return chnl;
 }
 
@@ -2385,7 +2373,6 @@ static int _mcde_chnl_apply(struct mcde_chnl_state *chnl)
 	chnl->regs.blend_en = chnl->blend_en;
 	chnl->regs.alpha_blend = chnl->alpha_blend;
 
-
 	chnl->transactionid++;
 
 	dev_vdbg(&mcde_dev->dev, "Channel applied, chnl=%d\n", chnl->id);
@@ -2703,6 +2690,17 @@ int mcde_chnl_update(struct mcde_chnl_state *chnl,
 	enable_mcde_hw();
 	if (!chnl->formatter_updated)
 		(void)update_channel_static_registers(chnl);
+
+	if (chnl->regs.roten && !chnl->esram_is_enabled) {
+		int ret;
+		ret = regulator_enable(chnl->port.reg_esram);
+		if (ret < 0) {
+			dev_warn(&mcde_dev->dev, "%s: disable failed\n",
+			__func__);
+		}
+		chnl->esram_is_enabled = true;
+	}
+
 	ret = _mcde_chnl_update(chnl, update_area);
 	mutex_unlock(&mcde_hw_lock);
 
@@ -2716,6 +2714,7 @@ void mcde_chnl_put(struct mcde_chnl_state *chnl)
 	dev_vdbg(&mcde_dev->dev, "%s\n", __func__);
 
 	chnl->reserved = false;
+	chnl->port.reg_esram = NULL;
 	if (chnl->port.type == MCDE_PORTTYPE_DSI) {
 		chnl->port.phy.dsi.reg_vana = NULL;
 		chnl->port.phy.dsi.clk_dsi = NULL;
@@ -2782,6 +2781,15 @@ void mcde_chnl_disable(struct mcde_chnl_state *chnl)
 		disable_formatter(&chnl->port);
 		chnl->formatter_updated = false;
 	}
+	if (chnl->esram_is_enabled) {
+		int ret;
+		ret = regulator_disable(chnl->port.reg_esram);
+		if (ret < 0) {
+			dev_warn(&mcde_dev->dev, "%s: disable failed\n",
+			__func__);
+		}
+		chnl->esram_is_enabled = false;
+	}
 	del_timer(&chnl->dsi_te_timer);
 	del_timer(&chnl->auto_sync_timer);
 	(void)disable_mcde_hw(false);
diff --git a/include/video/mcde.h b/include/video/mcde.h
index 31c6443fcd2..a9976352009 100644
--- a/include/video/mcde.h
+++ b/include/video/mcde.h
@@ -164,6 +164,7 @@ struct mcde_port {
 	enum mcde_sync_src sync_src;
 	bool update_auto_trig;
 	enum mcde_hdmi_sdtv_switch hdmi_sdtv_switch;
+	struct regulator *reg_esram;
 	union {
 		struct {
 			u8 virt_id;
-- 
cgit v1.2.3


From 6302f5ab1affcf32c3d59916e51816aedf6e1cc9 Mon Sep 17 00:00:00 2001
From: Maciej Socha <maciej.socha@stericsson.com>
Date: Mon, 28 Mar 2011 14:49:18 +0200
Subject: video: B2R2: Remove bluish tone when using yuv422i

Correction of format checked for in bool is_yvu_fmt.
This restores a previous correction (ER328908)
that was accidentally removed.

ST-Ericsson ID: ER 332631
ST-Ericsson FOSS-OUT ID: STETL-FOSS-OUT-10068

Change-Id: Iaa34da64d8b01463912cf4a694ea1747c76e2f35
Signed-off-by: Maciej Socha <maciej.socha@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/19289
Reviewed-by: Robert FEKETE <robert.fekete@stericsson.com>
---
 drivers/video/b2r2/b2r2_node_split.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/video/b2r2/b2r2_node_split.c b/drivers/video/b2r2/b2r2_node_split.c
index 6857e421c4a..c2b7e048dd5 100644
--- a/drivers/video/b2r2/b2r2_node_split.c
+++ b/drivers/video/b2r2/b2r2_node_split.c
@@ -2800,7 +2800,7 @@ static bool is_yuv_fmt(enum b2r2_blt_fmt fmt)
 static bool is_yvu_fmt(enum b2r2_blt_fmt fmt)
 {
 	switch (fmt) {
-	case B2R2_BLT_FMT_CB_Y_CR_Y:
+	case B2R2_BLT_FMT_Y_CB_Y_CR:
 	case B2R2_BLT_FMT_YVU420_PACKED_PLANAR:
 	case B2R2_BLT_FMT_YVU422_PACKED_PLANAR:
 	case B2R2_BLT_FMT_YVU420_PACKED_SEMI_PLANAR:
-- 
cgit v1.2.3


From 32fa096d1772be1487322de1d081a1425e45a026 Mon Sep 17 00:00:00 2001
From: Jimmy Rubin <jimmy.rubin@stericsson.com>
Date: Wed, 16 Feb 2011 14:26:20 +0100
Subject: video: mcde: Change overlay registers dynamically

Allows overlay registers to be updated for displays that are continous
running, e.g. HDMI.

ST-Ericsson ID: 323997
ST-Ericsson Linux next: Not tested, ER 282779
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: Ibb4e8be08a9c17448fc904bbbd300313ebbb8633
Signed-off-by: Jimmy Rubin <jimmy.rubin@stericsson.com>
Signed-off-by: Marcel Tunnissen <Marcel.Tuennissen@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/16860
Tested-by: Marcel TUNNISSEN <marcel.tuennissen@stericsson.com>
Reviewed-by: Dan JOHANSSON <dan.johansson@stericsson.com>
---
 drivers/video/mcde/mcde_fb.c |   1 -
 drivers/video/mcde/mcde_hw.c | 241 ++++++++++++++++++-------------------------
 2 files changed, 99 insertions(+), 143 deletions(-)

diff --git a/drivers/video/mcde/mcde_fb.c b/drivers/video/mcde/mcde_fb.c
index a06989ea2b0..4cb085ca045 100644
--- a/drivers/video/mcde/mcde_fb.c
+++ b/drivers/video/mcde/mcde_fb.c
@@ -637,7 +637,6 @@ struct fb_info *mcde_fb_create(struct mcde_display_device *ddev,
 	if (ret)
 		goto channel_open_failed;
 
-
 	ret = mcde_dss_enable_display(ddev);
 	if (ret)
 		goto display_enable_failed;
diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index e2174bc1d0a..6eeb1517b62 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -119,7 +119,7 @@ struct ovly_regs {
 	bool enabled;
 	u32  baseaddress0;
 	u32  baseaddress1;
-	bool reset_buf_id;
+	bool update;
 	u8   bits_per_pixel;
 	u8   bpp;
 	bool bgr;
@@ -140,12 +140,9 @@ struct ovly_regs {
 
 struct mcde_ovly_state {
 	bool inuse;
+	bool update;
 	u8 idx; /* MCDE overlay index */
 	struct mcde_chnl_state *chnl; /* Owner channel */
-	u32 transactionid; /* Apply time stamp */
-	u32 transactionid_regs; /* Register update time stamp */
-	u32 transactionid_hw; /* HW completed time stamp */
-	wait_queue_head_t waitq_hw; /* Waitq for transactionid_hw */
 
 	/* Staged settings */
 	u32 paddr;
@@ -870,13 +867,6 @@ static irqreturn_t mcde_irq_handler(int irq, void *dev)
 
 	/* Handle overlay irqs */
 	irq_status = mcde_rfld(MCDE_RISOVL, OVLFDRIS);
-	for (i = 0; i < num_overlays; i++) {
-		if (irq_status & (1 << i)) {
-			struct mcde_ovly_state *ovly = &overlays[i];
-			ovly->transactionid_hw = ovly->transactionid_regs;
-			wake_up(&ovly->waitq_hw);
-		}
-	}
 	mcde_wfld(MCDE_RISOVL, OVLFDRIS, irq_status);
 
 	/* Handle channel irqs */
@@ -1032,23 +1022,6 @@ static irqreturn_t mcde_irq_handler(int irq, void *dev)
 	return IRQ_HANDLED;
 }
 
-static void wait_for_overlay(struct mcde_ovly_state *ovly)
-{
-	int ret;
-
-	if (ovly->transactionid_hw >= ovly->transactionid_regs)
-		return;
-
-	ret = wait_event_timeout(ovly->waitq_hw,
-		ovly->transactionid_hw == ovly->transactionid_regs,
-		msecs_to_jiffies(OVLY_TIMEOUT));
-	if (!ret)
-		dev_warn(&mcde_dev->dev,
-			"Wait for overlay timeout (ovly=%d,%d<%d)!\n",
-			ovly->idx, ovly->transactionid_hw,
-			ovly->transactionid_regs);
-}
-
 static void wait_for_channel(struct mcde_chnl_state *chnl)
 {
 	int ret;
@@ -1411,6 +1384,7 @@ static void update_overlay_registers(u8 idx, struct ovly_regs *regs,
 	u32 pixelfetchwtrmrklevel;
 	u8  nr_of_bufs = 1;
 	u32 fifo_size;
+	u32 sel_mod = MCDE_EXTSRC0CR_SEL_MOD_SOFTWARE_SEL;
 
 	if (rotation == MCDE_DISPLAY_ROT_180_CCW) {
 		ljinc = -ljinc;
@@ -1447,83 +1421,81 @@ static void update_overlay_registers(u8 idx, struct ovly_regs *regs,
 	else
 		pixelfetchwtrmrklevel = MCDE_PIXFETCH_MEDIUM_WTRMRKLVL;
 
-	if (regs->reset_buf_id) {
-		u32 sel_mod = MCDE_EXTSRC0CR_SEL_MOD_SOFTWARE_SEL;
-		if (port->update_auto_trig && port->type == MCDE_PORTTYPE_DSI) {
-			switch (port->sync_src) {
-			case MCDE_SYNCSRC_OFF:
-				sel_mod = MCDE_EXTSRC0CR_SEL_MOD_SOFTWARE_SEL;
-				break;
-			case MCDE_SYNCSRC_TE0:
-			case MCDE_SYNCSRC_TE1:
-			case MCDE_SYNCSRC_TE_POLLING:
-			default:
-				sel_mod = MCDE_EXTSRC0CR_SEL_MOD_AUTO_TOGGLE;
-				break;
-			}
-		} else if (port->type == MCDE_PORTTYPE_DPI) {
-			sel_mod = port->update_auto_trig ?
-					MCDE_EXTSRC0CR_SEL_MOD_AUTO_TOGGLE :
-					MCDE_EXTSRC0CR_SEL_MOD_SOFTWARE_SEL;
+	if (port->update_auto_trig && port->type == MCDE_PORTTYPE_DSI) {
+		switch (port->sync_src) {
+		case MCDE_SYNCSRC_OFF:
+			sel_mod = MCDE_EXTSRC0CR_SEL_MOD_SOFTWARE_SEL;
+			break;
+		case MCDE_SYNCSRC_TE0:
+		case MCDE_SYNCSRC_TE1:
+		case MCDE_SYNCSRC_TE_POLLING:
+		default:
+			sel_mod = MCDE_EXTSRC0CR_SEL_MOD_AUTO_TOGGLE;
+			break;
 		}
-
-		regs->reset_buf_id = false;
-		mcde_wreg(MCDE_EXTSRC0CONF + idx * MCDE_EXTSRC0CONF_GROUPOFFSET,
-			MCDE_EXTSRC0CONF_BUF_ID(0) |
-			MCDE_EXTSRC0CONF_BUF_NB(nr_of_bufs) |
-			MCDE_EXTSRC0CONF_PRI_OVLID(idx) |
-			MCDE_EXTSRC0CONF_BPP(regs->bpp) |
-			MCDE_EXTSRC0CONF_BGR(regs->bgr) |
-			MCDE_EXTSRC0CONF_BEBO(regs->bebo) |
-			MCDE_EXTSRC0CONF_BEPO(false));
-		mcde_wreg(MCDE_EXTSRC0CR + idx * MCDE_EXTSRC0CR_GROUPOFFSET,
-			MCDE_EXTSRC0CR_SEL_MOD(sel_mod) |
-			MCDE_EXTSRC0CR_MULTIOVL_CTRL_ENUM(PRIMARY) |
-			MCDE_EXTSRC0CR_FS_DIV_DISABLE(false) |
-			MCDE_EXTSRC0CR_FORCE_FS_DIV(false));
-		mcde_wreg(MCDE_OVL0CR + idx * MCDE_OVL0CR_GROUPOFFSET,
-			MCDE_OVL0CR_OVLEN(regs->enabled) |
-		MCDE_OVL0CR_COLCCTRL(regs->col_conv) |
-			MCDE_OVL0CR_CKEYGEN(false) |
-			MCDE_OVL0CR_ALPHAPMEN(false) |
-			MCDE_OVL0CR_OVLF(false) |
-			MCDE_OVL0CR_OVLR(false) |
-			MCDE_OVL0CR_OVLB(false) |
-			MCDE_OVL0CR_FETCH_ROPC(0) |
-			MCDE_OVL0CR_STBPRIO(0) |
-			MCDE_OVL0CR_BURSTSIZE_ENUM(HW_8W) |
-			/* TODO: enum, get from ovly */
-			MCDE_OVL0CR_MAXOUTSTANDING_ENUM(8_REQ) |
-			/* TODO: _HW_8W, calculate? */
-			MCDE_OVL0CR_ROTBURSTSIZE_ENUM(HW_8W));
-		mcde_wreg(MCDE_OVL0CONF + idx * MCDE_OVL0CONF_GROUPOFFSET,
-			MCDE_OVL0CONF_PPL(ppl) |
-			MCDE_OVL0CONF_EXTSRC_ID(idx) |
-			MCDE_OVL0CONF_LPF(lpf));
-		mcde_wreg(MCDE_OVL0CONF2 + idx * MCDE_OVL0CONF2_GROUPOFFSET,
-			MCDE_OVL0CONF2_BP(regs->alpha_source) |
-			MCDE_OVL0CONF2_ALPHAVALUE(regs->alpha_value) |
-			MCDE_OVL0CONF2_OPQ(regs->opq) |
-			MCDE_OVL0CONF2_PIXOFF(lmrgn & 63) |
-			MCDE_OVL0CONF2_PIXELFETCHERWATERMARKLEVEL(
-				pixelfetchwtrmrklevel));
-		mcde_wreg(MCDE_OVL0LJINC + idx * MCDE_OVL0LJINC_GROUPOFFSET,
-			ljinc);
-		mcde_wreg(MCDE_OVL0CROP + idx * MCDE_OVL0CROP_GROUPOFFSET,
-			MCDE_OVL0CROP_TMRGN(tmrgn) |
-			MCDE_OVL0CROP_LMRGN(lmrgn >> 6));
-		mcde_wreg(MCDE_OVL0COMP + idx * MCDE_OVL0COMP_GROUPOFFSET,
-			MCDE_OVL0COMP_XPOS(regs->xpos) |
-			MCDE_OVL0COMP_CH_ID(regs->ch_id) |
-			MCDE_OVL0COMP_YPOS(regs->ypos) |
-			MCDE_OVL0COMP_Z(regs->z));
-	}
+	} else if (port->type == MCDE_PORTTYPE_DPI) {
+		sel_mod = port->update_auto_trig ?
+				MCDE_EXTSRC0CR_SEL_MOD_AUTO_TOGGLE :
+				MCDE_EXTSRC0CR_SEL_MOD_SOFTWARE_SEL;
+	}
+
+	regs->update = false;
+	mcde_wreg(MCDE_EXTSRC0CONF + idx * MCDE_EXTSRC0CONF_GROUPOFFSET,
+		MCDE_EXTSRC0CONF_BUF_ID(0) |
+		MCDE_EXTSRC0CONF_BUF_NB(nr_of_bufs) |
+		MCDE_EXTSRC0CONF_PRI_OVLID(idx) |
+		MCDE_EXTSRC0CONF_BPP(regs->bpp) |
+		MCDE_EXTSRC0CONF_BGR(regs->bgr) |
+		MCDE_EXTSRC0CONF_BEBO(regs->bebo) |
+		MCDE_EXTSRC0CONF_BEPO(false));
+	mcde_wreg(MCDE_EXTSRC0CR + idx * MCDE_EXTSRC0CR_GROUPOFFSET,
+		MCDE_EXTSRC0CR_SEL_MOD(sel_mod) |
+		MCDE_EXTSRC0CR_MULTIOVL_CTRL_ENUM(PRIMARY) |
+		MCDE_EXTSRC0CR_FS_DIV_DISABLE(false) |
+		MCDE_EXTSRC0CR_FORCE_FS_DIV(false));
+	mcde_wreg(MCDE_OVL0CR + idx * MCDE_OVL0CR_GROUPOFFSET,
+		MCDE_OVL0CR_OVLEN(regs->enabled) |
+	MCDE_OVL0CR_COLCCTRL(regs->col_conv) |
+		MCDE_OVL0CR_CKEYGEN(false) |
+		MCDE_OVL0CR_ALPHAPMEN(false) |
+		MCDE_OVL0CR_OVLF(false) |
+		MCDE_OVL0CR_OVLR(false) |
+		MCDE_OVL0CR_OVLB(false) |
+		MCDE_OVL0CR_FETCH_ROPC(0) |
+		MCDE_OVL0CR_STBPRIO(0) |
+		MCDE_OVL0CR_BURSTSIZE_ENUM(HW_8W) |
+		/* TODO: enum, get from ovly */
+		MCDE_OVL0CR_MAXOUTSTANDING_ENUM(8_REQ) |
+		/* TODO: _HW_8W, calculate? */
+		MCDE_OVL0CR_ROTBURSTSIZE_ENUM(HW_8W));
+	mcde_wreg(MCDE_OVL0CONF + idx * MCDE_OVL0CONF_GROUPOFFSET,
+		MCDE_OVL0CONF_PPL(ppl) |
+		MCDE_OVL0CONF_EXTSRC_ID(idx) |
+		MCDE_OVL0CONF_LPF(lpf));
+	mcde_wreg(MCDE_OVL0CONF2 + idx * MCDE_OVL0CONF2_GROUPOFFSET,
+		MCDE_OVL0CONF2_BP(regs->alpha_source) |
+		MCDE_OVL0CONF2_ALPHAVALUE(regs->alpha_value) |
+		MCDE_OVL0CONF2_OPQ(regs->opq) |
+		MCDE_OVL0CONF2_PIXOFF(lmrgn & 63) |
+		MCDE_OVL0CONF2_PIXELFETCHERWATERMARKLEVEL(
+			pixelfetchwtrmrklevel));
+	mcde_wreg(MCDE_OVL0LJINC + idx * MCDE_OVL0LJINC_GROUPOFFSET,
+		ljinc);
+	mcde_wreg(MCDE_OVL0CROP + idx * MCDE_OVL0CROP_GROUPOFFSET,
+		MCDE_OVL0CROP_TMRGN(tmrgn) |
+		MCDE_OVL0CROP_LMRGN(lmrgn >> 6));
 
 	dev_vdbg(&mcde_dev->dev, "Overlay registers setup, idx=%d\n", idx);
 }
 
-static void update_overlay_address_registers(u8 idx, struct ovly_regs *regs)
+static void update_overlay_registers_on_the_fly(u8 idx, struct ovly_regs *regs)
 {
+	mcde_wreg(MCDE_OVL0COMP + idx * MCDE_OVL0COMP_GROUPOFFSET,
+		MCDE_OVL0COMP_XPOS(regs->xpos) |
+		MCDE_OVL0COMP_CH_ID(regs->ch_id) |
+		MCDE_OVL0COMP_YPOS(regs->ypos) |
+		MCDE_OVL0COMP_Z(regs->z));
+
 	mcde_wreg(MCDE_EXTSRC0A0 + idx * MCDE_EXTSRC0A0_GROUPOFFSET,
 		regs->baseaddress0);
 	mcde_wreg(MCDE_EXTSRC0A1 + idx * MCDE_EXTSRC0A1_GROUPOFFSET,
@@ -1995,24 +1967,12 @@ static int enable_mcde_hw(void)
 	for (i = 0; i < num_channels; i++) {
 		struct mcde_chnl_state *chnl = &channels[i];
 		if (chnl->enabled) {
-			if (chnl->ovly0 && chnl->ovly0->inuse) {
-				if (chnl->ovly0->regs.enabled) {
-					chnl->ovly0->transactionid =
-							++chnl->transactionid;
-					chnl->ovly0->regs.reset_buf_id = true;
-				 } else {
-					chnl->transactionid++;
-				}
-			}
-			if (chnl->ovly1 && chnl->ovly1->inuse) {
-				if (chnl->ovly1->regs.enabled) {
-					chnl->ovly1->transactionid =
-							++chnl->transactionid;
-					chnl->ovly1->regs.reset_buf_id = true;
-				} else {
-					chnl->transactionid++;
-				}
-			}
+			if (chnl->ovly0 && chnl->ovly0->inuse &&
+						chnl->ovly0->regs.enabled)
+				chnl->ovly0->regs.update = true;
+			if (chnl->ovly1 && chnl->ovly1->inuse &&
+						chnl->ovly1->regs.enabled)
+				chnl->ovly1->regs.update = true;
 			chnl->transactionid++;
 		}
 	}
@@ -2395,6 +2355,12 @@ static void chnl_update_registers(struct mcde_chnl_state *chnl)
 
 static void chnl_update_continous(struct mcde_chnl_state *chnl)
 {
+
+	if (chnl->continous_running) {
+		chnl->transactionid_regs = chnl->transactionid;
+		wait_for_channel(chnl);
+	}
+
 	if (!chnl->continous_running) {
 		if (chnl->transactionid_regs < chnl->transactionid)
 			chnl_update_registers(chnl);
@@ -2463,23 +2429,15 @@ static void chnl_update_non_continous(struct mcde_chnl_state *chnl)
 static void chnl_update_overlay(struct mcde_chnl_state *chnl,
 						struct mcde_ovly_state *ovly)
 {
-	if (!ovly || (ovly->transactionid_regs >= ovly->transactionid &&
-			chnl->transactionid_regs >= chnl->transactionid))
+	if (!ovly)
 		return;
 
-	update_overlay_address_registers(ovly->idx, &ovly->regs);
-	if (ovly->regs.reset_buf_id) {
-		if (!chnl->continous_running)
-			wait_for_overlay(ovly);
-
+	update_overlay_registers_on_the_fly(ovly->idx, &ovly->regs);
+	if (ovly->regs.update) {
 		update_overlay_registers(ovly->idx, &ovly->regs, &chnl->port,
 			chnl->fifo, chnl->regs.x, chnl->regs.y,
 			chnl->regs.ppl, chnl->regs.lpf, ovly->stride,
 			chnl->vmode.interlaced, chnl->rotation);
-		ovly->transactionid_regs = ovly->transactionid;
-	} else if (chnl->continous_running) {
-		ovly->transactionid_regs = ovly->transactionid;
-		wait_for_overlay(ovly);
 	}
 }
 
@@ -2829,10 +2787,7 @@ struct mcde_ovly_state *mcde_ovly_get(struct mcde_chnl_state *chnl)
 		ovly->h = 0;
 		ovly->alpha_value = 0xFF;
 		ovly->alpha_source = MCDE_OVL1CONF2_BP_PER_PIXEL_ALPHA;
-		/* Reset transactionids */
-		ovly->transactionid = 0;
-		ovly->transactionid_regs = 0;
-		ovly->transactionid_hw = 0;
+		ovly->update = true;
 		mcde_ovly_apply(ovly);
 	}
 
@@ -2847,6 +2802,7 @@ void mcde_ovly_put(struct mcde_ovly_state *ovly)
 		return;
 	if (ovly->regs.enabled) {
 		ovly->paddr = 0;
+		ovly->update = true;
 		mcde_ovly_apply(ovly);/* REVIEW: API call calling API call! */
 	}
 	ovly->inuse = false;
@@ -2857,6 +2813,9 @@ void mcde_ovly_set_source_buf(struct mcde_ovly_state *ovly, u32 paddr)
 	if (!ovly->inuse)
 		return;
 
+	if (paddr == 0 || ovly->paddr == 0)
+		ovly->update = true;
+
 	ovly->paddr = paddr;
 }
 
@@ -2868,6 +2827,7 @@ void mcde_ovly_set_source_info(struct mcde_ovly_state *ovly,
 
 	ovly->stride = stride;
 	ovly->pix_fmt = pix_fmt;
+	ovly->update = true;
 }
 
 void mcde_ovly_set_source_area(struct mcde_ovly_state *ovly,
@@ -2880,6 +2840,7 @@ void mcde_ovly_set_source_area(struct mcde_ovly_state *ovly,
 	ovly->src_y = y;
 	ovly->w = w;
 	ovly->h = h;
+	ovly->update = true;
 }
 
 void mcde_ovly_set_dest_pos(struct mcde_ovly_state *ovly, u16 x, u16 y, u8 z)
@@ -2904,7 +2865,10 @@ void mcde_ovly_apply(struct mcde_ovly_state *ovly)
 	ovly->regs.baseaddress0 = ovly->paddr;
 	ovly->regs.baseaddress1 = ovly->regs.baseaddress0 + ovly->stride;
 	/*TODO set to true if interlaced *//* REVIEW: Video mode interlaced? */
-	ovly->regs.reset_buf_id = !ovly->chnl->continous_running;
+	if (!ovly->regs.update)
+		ovly->regs.update = ovly->update;
+	ovly->update = false;
+
 	switch (ovly->pix_fmt) {/* REVIEW: Extract to table */
 	case MCDE_OVLYPIXFMT_RGB565:
 		ovly->regs.bits_per_pixel = 16;
@@ -2969,11 +2933,7 @@ void mcde_ovly_apply(struct mcde_ovly_state *ovly)
 	ovly->regs.col_conv = MCDE_OVL0CR_COLCCTRL_DISABLED;
 	ovly->regs.alpha_source = ovly->alpha_source;
 	ovly->regs.alpha_value = ovly->alpha_value;
-
-	if (ovly->regs.enabled)
-		ovly->transactionid = ++ovly->chnl->transactionid;
-	else
-		ovly->chnl->transactionid++;
+	ovly->chnl->transactionid++;
 
 	mutex_unlock(&mcde_hw_lock);
 
@@ -3291,9 +3251,6 @@ static int __devinit mcde_probe(struct platform_device *pdev)
 		channels[i].dsi_te_timer.data = i;
 	}
 
-	for (i = 0; i < num_overlays; i++)
-		init_waitqueue_head(&overlays[i].waitq_hw);
-
 	return 0;
 
 failed_hardware_version:
-- 
cgit v1.2.3


From 3d8e26d6b3f1eeade0899d3567298f21bb91bdbf Mon Sep 17 00:00:00 2001
From: Jimmy Rubin <jimmy.rubin@stericsson.com>
Date: Wed, 16 Feb 2011 10:14:30 +0100
Subject: video: mcde: Change handling of pix format

Disable channel is no longer needed when the overlay pixel format
is changed.

ST-Ericsson ID: 323997
ST-Ericsson Linux next: Not tested, ER 282779
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I18c74e74a8a3172f55dbfbbfc91da81b9e9100ca
Signed-off-by: Jimmy Rubin <jimmy.rubin@stericsson.com>
Signed-off-by: Marcel Tunnissen <Marcel.Tuennissen@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/16861
Tested-by: Marcel TUNNISSEN <marcel.tuennissen@stericsson.com>
Reviewed-by: Dan JOHANSSON <dan.johansson@stericsson.com>
---
 drivers/video/mcde/display-av8100.c |  2 --
 drivers/video/mcde/mcde_display.c   | 12 +-----------
 drivers/video/mcde/mcde_fb.c        |  3 ++-
 3 files changed, 3 insertions(+), 14 deletions(-)

diff --git a/drivers/video/mcde/display-av8100.c b/drivers/video/mcde/display-av8100.c
index b55f144923f..be8d9fcbe53 100644
--- a/drivers/video/mcde/display-av8100.c
+++ b/drivers/video/mcde/display-av8100.c
@@ -688,8 +688,6 @@ static int hdmi_set_pixel_format(
 		ret = mcde_chnl_set_palette(ddev->chnl_state, NULL);
 	}
 
-	ddev->update_flags |= UPDATE_FLAG_PIXEL_FORMAT;
-
 	return 0;
 }
 
diff --git a/drivers/video/mcde/mcde_display.c b/drivers/video/mcde/mcde_display.c
index fcca1e277fc..521446dc26f 100644
--- a/drivers/video/mcde/mcde_display.c
+++ b/drivers/video/mcde/mcde_display.c
@@ -175,8 +175,6 @@ static int mcde_display_set_pixel_format_default(
 		return ret;
 	}
 
-	ddev->update_flags |= UPDATE_FLAG_PIXEL_FORMAT;
-
 	return 0;
 }
 
@@ -186,11 +184,6 @@ static inline enum mcde_ovly_pix_fmt mcde_display_get_pixel_format_default(
 	return ddev->pixel_format;
 }
 
-static inline enum mcde_port_pix_fmt mcde_display_get_port_pixel_format_default(
-	struct mcde_display_device *ddev)
-{
-	return ddev->port->pixel_format;
-}
 
 static int mcde_display_set_rotation_default(struct mcde_display_device *ddev,
 	enum mcde_display_rotation rotation)
@@ -274,8 +267,7 @@ static int mcde_display_apply_config_default(struct mcde_display_device *ddev)
 	if (!ddev->update_flags)
 		return 0;
 
-	if ((ddev->update_flags & UPDATE_FLAG_VIDEO_MODE) ||
-		(ddev->update_flags & UPDATE_FLAG_PIXEL_FORMAT))
+	if (ddev->update_flags & UPDATE_FLAG_VIDEO_MODE)
 		mcde_chnl_stop_flow(ddev->chnl_state);
 
 	ret = mcde_chnl_apply(ddev->chnl_state);
@@ -421,8 +413,6 @@ void mcde_display_init_device(struct mcde_display_device *ddev)
 	ddev->get_video_mode = mcde_display_get_video_mode_default;
 	ddev->set_pixel_format = mcde_display_set_pixel_format_default;
 	ddev->get_pixel_format = mcde_display_get_pixel_format_default;
-	ddev->get_port_pixel_format =
-				mcde_display_get_port_pixel_format_default;
 	ddev->set_rotation = mcde_display_set_rotation_default;
 	ddev->get_rotation = mcde_display_get_rotation_default;
 	ddev->set_synchronized_update =
diff --git a/drivers/video/mcde/mcde_fb.c b/drivers/video/mcde/mcde_fb.c
index 4cb085ca045..1251d81cba4 100644
--- a/drivers/video/mcde/mcde_fb.c
+++ b/drivers/video/mcde/mcde_fb.c
@@ -491,7 +491,6 @@ static int apply_var(struct fb_info *fbi, struct mcde_display_device *ddev)
 		/* Apply pixel format */
 		fmt = var_to_pix_fmt_info(var);
 		mfb->pix_fmt = fmt->pix_fmt;
-		mcde_dss_set_pixel_format(ddev, mfb->pix_fmt);
 
 		/* Apply rotation */
 		mcde_dss_set_rotation(ddev, var_to_rotation(var));
@@ -648,6 +647,8 @@ struct fb_info *mcde_fb_create(struct mcde_display_device *ddev,
 	if (ret)
 		goto apply_var_failed;
 
+	mcde_dss_set_pixel_format(ddev, ddev->port->pixel_format);
+
 	/* Setup overlay */
 	get_ovly_info(fbi, NULL, &ovly_info);
 	ovly = mcde_dss_create_overlay(ddev, &ovly_info);
-- 
cgit v1.2.3


From 95524834c6af9a133838c41d081df4fae4f6836e Mon Sep 17 00:00:00 2001
From: Marcel Tunnissen <Marcel.Tuennissen@stericsson.com>
Date: Mon, 21 Mar 2011 11:03:50 +0100
Subject: video: mcde: remove special interlaced porches

This removes the split of back and front porches that were introduced
for the SDTV formats. These aren't really needed, since they can be
derived from the total amount per frame by rounding constistently.

This commit is not backwards source code compatible; it has consequences
for other display drivers, e.g. DPI display drivers. These changes are
trivial though: the fields v[fb]p should be used instead of v[fb]p[12],
where vxp = vxp1 + vxp2 (with x = {b, f})

ST-Ericsson ID: 329917
ST-Ericsson Linux next: Not tested, ER 282779
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: Icb1cee4bcc44e29de53f36966bc6d8faa396b1ba
Signed-off-by: Marcel Tunnissen <Marcel.Tuennissen@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/18744
Tested-by: Marcel TUNNISSEN <marcel.tuennissen@stericsson.com>
Reviewed-by: Dan JOHANSSON <dan.johansson@stericsson.com>
---
 drivers/video/mcde/display-ab8500.c      | 73 +++++++++++++++++---------------
 drivers/video/mcde/display-av8100.c      | 71 ++++++++++++++-----------------
 drivers/video/mcde/display-vuib500-dpi.c | 10 ++---
 drivers/video/mcde/mcde_fb.c             | 11 ++---
 drivers/video/mcde/mcde_hw.c             | 20 ++++-----
 include/video/mcde.h                     | 12 +++---
 6 files changed, 92 insertions(+), 105 deletions(-)

diff --git a/drivers/video/mcde/display-ab8500.c b/drivers/video/mcde/display-ab8500.c
index 538a0e2346d..b738c33a0cb 100644
--- a/drivers/video/mcde/display-ab8500.c
+++ b/drivers/video/mcde/display-ab8500.c
@@ -20,6 +20,34 @@
 
 #define AB8500_DISP_TRACE	dev_dbg(&ddev->dev, "%s\n", __func__)
 
+#define SDTV_PIXCLOCK		37037
+
+/*
+ * PAL:
+ * Total nr of active lines:   576
+ * Total nr of blanking lines:  49
+ *                      total: 625
+ */
+#define PAL_HBP			132
+#define PAL_HFP			12
+#define PAL_VBP_FIELD_1		22
+#define PAL_VBP_FIELD_2		23
+#define PAL_VFP_FIELD_1		2
+#define PAL_VFP_FIELD_2		2
+
+/*
+ * NTSC (DV variant):
+ * Total nr of active lines:   480
+ * Total nr of blanking lines:  45
+ *                      total: 525
+ */
+#define NTSC_HBP		122
+#define NTSC_HFP		16
+#define NTSC_VBP_FIELD_1	19
+#define NTSC_VBP_FIELD_2	20
+#define NTSC_VFP_FIELD_1	3
+#define NTSC_VFP_FIELD_2	3
+
 struct display_driver_data {
 	struct ab8500_denc_conf denc_conf;
 	struct platform_device *denc_dev;
@@ -173,10 +201,8 @@ static void print_vmode(struct mcde_video_mode *vmode)
 	pr_debug("  pixclock: %d\n",    vmode->pixclock);
 	pr_debug("       hbp: %d\n",    vmode->hbp);
 	pr_debug("       hfp: %d\n",    vmode->hfp);
-	pr_debug("      vbp1: %d\n",    vmode->vbp1);
-	pr_debug("      vfp1: %d\n",    vmode->vfp1);
-	pr_debug("      vbp2: %d\n",    vmode->vbp2);
-	pr_debug("      vfp2: %d\n",    vmode->vfp2);
+	pr_debug("       vbp: %d\n",    vmode->vbp);
+	pr_debug("       vfp: %d\n",    vmode->vfp);
 	pr_debug("interlaced: %s\n", vmode->interlaced ? "true" : "false");
 }
 
@@ -198,45 +224,26 @@ static int try_video_mode(
 		return -EINVAL;
 	}
 
-
 	/* TODO: move this part to MCDE: mcde_dss_try_video_mode? */
 	/* check for PAL */
 	switch (video_mode->yres) {
 	case 576:
 		/* set including SAV/EAV: */
-		video_mode->hbp = 132;
-		video_mode->hfp =  12;
-		/*
-		 * Total nr of active lines:  576
-		 * Total nr of blanking lines: 49
-		 */
-		video_mode->vbp1 = 22;
-		video_mode->vfp1 =  2;
-		video_mode->vbp2 = 23;
-		video_mode->vfp2 =  2;
-		/* currently only support interlaced */
+		video_mode->hbp = PAL_HBP;
+		video_mode->hfp = PAL_HFP;
+		video_mode->vbp = PAL_VBP_FIELD_1 + PAL_VBP_FIELD_2;
+		video_mode->vfp = PAL_VFP_FIELD_1 + PAL_VFP_FIELD_2;
 		video_mode->interlaced = true;
-		video_mode->pixclock = 37037;
+		video_mode->pixclock = SDTV_PIXCLOCK;
 		break;
 	case 480:
 		/* set including SAV/EAV */
-		video_mode->hbp = 122;
-		video_mode->hfp =  16;
-		/*
-		 * Total nr of active lines:  486.
-		 * Total nr of blanking lines: 39.
-		 */
-		/* Why does the following work? As far as I know the
-		 * total nr of vertical blanking lines between the
-		 * fields equals to 19 or 20, of which 3 are vfp.
-		 */
-		video_mode->vbp1 = 19;
-		video_mode->vfp1 = 3;
-		video_mode->vbp2 = 20;
-		video_mode->vfp2 = 3;
-		/* currently only support interlaced */
+		video_mode->hbp = NTSC_HBP;
+		video_mode->hfp = NTSC_HFP;
+		video_mode->vbp = NTSC_VBP_FIELD_1 + NTSC_VBP_FIELD_2;
+		video_mode->vfp = NTSC_VFP_FIELD_1 + NTSC_VFP_FIELD_2;
 		video_mode->interlaced = true;
-		video_mode->pixclock = 37037;
+		video_mode->pixclock = SDTV_PIXCLOCK;
 		break;
 	default:
 		dev_warn(&ddev->dev,
diff --git a/drivers/video/mcde/display-av8100.c b/drivers/video/mcde/display-av8100.c
index be8d9fcbe53..b941288bca3 100644
--- a/drivers/video/mcde/display-av8100.c
+++ b/drivers/video/mcde/display-av8100.c
@@ -116,63 +116,63 @@ static struct mcde_video_mode video_modes_supp_hdmi[] = {
 		.xres = 640,	.yres = 480,
 		.pixclock = 39682,
 		.hbp = 112,	.hfp = 48,
-		.vbp1 = 33,	.vfp1 = 12
+		.vbp = 33,	.vfp = 12
 	},
 	/* 720_480_60_P */
 	{
 		.xres = 720,	.yres = 480,
 		.pixclock = 37000,
 		.hbp = 104,	.hfp = 34,
-		.vbp1 = 30,	.vfp1 = 15
+		.vbp = 30,	.vfp = 15
 	},
 	/* 720_576_50_P */
 	{
 		.xres = 720,	.yres = 576,
 		.pixclock = 37037,
 		.hbp = 132,	.hfp = 12,
-		.vbp1 = 44,	.vfp1 = 5
+		.vbp = 44,	.vfp = 5
 	},
 	/* 1280_720_60_P */
 	{
 		.xres = 1280,	.yres = 720,
 		.pixclock = 13468,
 		.hbp = 256,	.hfp = 114,
-		.vbp1 = 20,	.vfp1 = 10
+		.vbp = 20,	.vfp = 10
 	},
 	/* 1280_720_50_P */
 	{
 		.xres = 1280,	.yres = 720,
 		.pixclock = 13468,
 		.hbp = 260,	.hfp = 440,
-		.vbp1 = 25,	.vfp1 = 5
+		.vbp = 25,	.vfp = 5
 	},
 	/* 1920_1080_30_P */
 	{
 		.xres = 1920,	.yres = 1080,
 		.pixclock = 13468,
 		.hbp = 189,	.hfp = 91,
-		.vbp1 = 36,	.vfp1 = 9
+		.vbp = 36,	.vfp = 9
 	},
 	/* 1920_1080_24_P */
 	{
 		.xres = 1920,	.yres = 1080,
 		.pixclock = 13468,
 		.hbp = 170,	.hfp = 660,
-		.vbp1 = 36,	.vfp1 = 9
+		.vbp = 36,	.vfp = 9
 	},
 	/* 1920_1080_25_P */
 	{
 		.xres = 1920,	.yres = 1080,
 		.pixclock = 13468,
 		.hbp = 192,	.hfp = 528,
-		.vbp1 = 36,	.vfp1 = 9
+		.vbp = 36,	.vfp = 9
 	},
 	/* 720_480_60_I) */
 	{
 		.xres = 720,	.yres = 480,
 		.pixclock = 74074,
 		.hbp = 126,	.hfp = 12,
-		.vbp1 = 44,	.vfp1 = 1,
+		.vbp = 44,	.vfp = 1,
 		.interlaced = true,
 	},
 	/* 720_576_50_I) */
@@ -180,7 +180,7 @@ static struct mcde_video_mode video_modes_supp_hdmi[] = {
 		.xres = 720,	.yres = 576,
 		.pixclock = 74074,
 		.hbp = 132,	.hfp = 12,
-		.vbp1 = 44,	.vfp1 = 5,
+		.vbp = 44,	.vfp = 5,
 		.interlaced = true,
 	},
 	/* 1920_1080_50_I) */
@@ -188,7 +188,7 @@ static struct mcde_video_mode video_modes_supp_hdmi[] = {
 		.xres = 1920,	.yres = 1080,
 		.pixclock = 13468,
 		.hbp = 192,	.hfp = 528,
-		.vbp1 = 20,	.vfp1 = 25,
+		.vbp = 20,	.vfp = 25,
 		.interlaced = true,
 	},
 	/* 1920_1080_60_I) */
@@ -196,7 +196,7 @@ static struct mcde_video_mode video_modes_supp_hdmi[] = {
 		.xres = 1920,	.yres = 1080,
 		.pixclock = 13468,
 		.hbp = 192,	.hfp = 88,
-		.vbp1 = 20,	.vfp1 = 25,
+		.vbp = 20,	.vfp = 25,
 		.interlaced = true,
 	},
 };
@@ -208,7 +208,7 @@ static struct mcde_video_mode video_modes_supp_sdtv[] = {
 		.xres = 720,	.yres = 480,
 		.pixclock = 74074,
 		.hbp = 126,	.hfp = 12,
-		.vbp1 = 44,	.vfp1 = 1,
+		.vbp = 44,	.vfp = 1,
 		.interlaced = true,
 	},
 	/* 720_576_50_I) */
@@ -216,7 +216,7 @@ static struct mcde_video_mode video_modes_supp_sdtv[] = {
 		.xres = 720,	.yres = 576,
 		.pixclock = 74074,
 		.hbp = 132,	.hfp = 12,
-		.vbp1 = 44,	.vfp1 = 5,
+		.vbp = 44,	.vfp = 5,
 		.interlaced = true,
 	},
 };
@@ -257,14 +257,11 @@ static int hdmi_try_video_mode(
 			(video_modes_supp[index].xres +
 				video_modes_supp[index].hbp +
 				video_modes_supp[index].hfp)) &&
-			((video_mode->yres + video_mode->vbp1 +
-				video_mode->vbp2 + video_mode->vfp1 +
-				video_mode->vfp2) ==
+			((video_mode->yres + video_mode->vbp + video_mode->vfp)
+				==
 			(video_modes_supp[index].yres +
-				video_modes_supp[index].vbp1 +
-				video_modes_supp[index].vbp2 +
-				video_modes_supp[index].vfp1 +
-				video_modes_supp[index].vfp2)) &&
+				video_modes_supp[index].vbp +
+				video_modes_supp[index].vfp)) &&
 			(video_mode->pixclock ==
 				video_modes_supp[index].pixclock) &&
 			(video_mode->interlaced ==
@@ -283,14 +280,11 @@ static int hdmi_try_video_mode(
 			(video_modes_supp[index].xres +
 				video_modes_supp[index].hbp +
 				video_modes_supp[index].hfp)) &&
-			((video_mode->yres + video_mode->vbp1 +
-				video_mode->vbp2 + video_mode->vfp1 +
-				video_mode->vfp2) ==
+			((video_mode->yres + video_mode->vbp + video_mode->vfp)
+				==
 			(video_modes_supp[index].yres +
-				video_modes_supp[index].vbp1 +
-				video_modes_supp[index].vbp2 +
-				video_modes_supp[index].vfp1 +
-				video_modes_supp[index].vfp2)) &&
+				video_modes_supp[index].vbp +
+				video_modes_supp[index].vfp)) &&
 			(video_mode->interlaced ==
 				video_modes_supp[index].interlaced)) {
 			match_level = 2;
@@ -325,11 +319,11 @@ static int hdmi_try_video_mode(
 	if (found_index == -1) {
 		dev_dbg(&ddev->dev, "video_mode not accepted\n");
 		dev_dbg(&ddev->dev, "xres:%d yres:%d pixclock:%d hbp:%d hfp:%d "
-			"vfp1:%d vfp2:%d vbp1:%d vbp2:%d intlcd:%d\n",
+			"vfp:%d vbp:%d intlcd:%d\n",
 			video_mode->xres, video_mode->yres,
-			video_mode->pixclock, video_mode->hbp,
-			video_mode->hfp, video_mode->vfp1, video_mode->vfp2,
-			video_mode->vbp1, video_mode->vbp2,
+			video_mode->pixclock,
+			video_mode->hbp, video_mode->hfp,
+			video_mode->vfp, video_mode->vbp,
 			video_mode->interlaced);
 		return -EINVAL;
 	}
@@ -360,16 +354,14 @@ static int hdmi_set_video_mode(
 	}
 
 	dev_dbg(&dev->dev, "%s:\n", __func__);
-	dev_vdbg(&dev->dev, "%s:xres:%d yres:%d hbp:%d hfp:%d vbp1:%d vfp1:%d "
-		"vbp2:%d vfp2:%d interlaced:%d\n", __func__,
+	dev_vdbg(&dev->dev, "%s:xres:%d yres:%d hbp:%d hfp:%d vbp:%d vfp:%d "
+		"interlaced:%d\n", __func__,
 		video_mode->xres,
 		video_mode->yres,
 		video_mode->hbp,
 		video_mode->hfp,
-		video_mode->vbp1,
-		video_mode->vfp1,
-		video_mode->vbp2,
-		video_mode->vfp2,
+		video_mode->vbp,
+		video_mode->vfp,
 		video_mode->interlaced);
 
 	if (driver_data->update_port_pixel_format) {
@@ -489,8 +481,7 @@ static int hdmi_set_video_mode(
 				dev->video_mode.xres +
 				dev->video_mode.hbp + dev->video_mode.hfp,
 				dev->video_mode.yres +
-				dev->video_mode.vbp1 + dev->video_mode.vfp1 +
-				dev->video_mode.vbp2 + dev->video_mode.vfp2,
+				dev->video_mode.vbp + dev->video_mode.vfp,
 				dev->video_mode.pixclock,
 				dev->video_mode.interlaced);
 
diff --git a/drivers/video/mcde/display-vuib500-dpi.c b/drivers/video/mcde/display-vuib500-dpi.c
index 211c04e5070..def5fe7c0ab 100644
--- a/drivers/video/mcde/display-vuib500-dpi.c
+++ b/drivers/video/mcde/display-vuib500-dpi.c
@@ -103,8 +103,8 @@ static void print_vmode(struct mcde_video_mode *vmode)
 	pr_debug("       hbp: %d\n",    vmode->hbp);
 	pr_debug("       hfp: %d\n",    vmode->hfp);
 	pr_debug("       hsw: %d\n",    vmode->hsw);
-	pr_debug("       vbp: %d\n",    vmode->vbp1);
-	pr_debug("       vfp: %d\n",    vmode->vfp1);
+	pr_debug("       vbp: %d\n",    vmode->vbp);
+	pr_debug("       vfp: %d\n",    vmode->vfp);
 	pr_debug("       vsw: %d\n",    vmode->vsw);
 	pr_debug("interlaced: %s\n", vmode->interlaced ? "true" : "false");
 }
@@ -130,10 +130,8 @@ static int try_video_mode(
 		video_mode->hbp = 40;
 		video_mode->hfp = 8;
 		video_mode->hsw = 96;
-		video_mode->vbp1 = 25;
-		video_mode->vfp1 = 2;
-		video_mode->vbp2 = 0;
-		video_mode->vfp2 = 0;
+		video_mode->vbp = 25;
+		video_mode->vfp = 2;
 		video_mode->vsw = 2;
 		/*
 		 * The pixclock setting is not used within MCDE. The clock is
diff --git a/drivers/video/mcde/mcde_fb.c b/drivers/video/mcde/mcde_fb.c
index 1251d81cba4..a0c7d21a3fc 100644
--- a/drivers/video/mcde/mcde_fb.c
+++ b/drivers/video/mcde/mcde_fb.c
@@ -349,8 +349,8 @@ void vmode_to_var(struct mcde_video_mode *video_mode,
 	var->xres           = video_mode->xres;
 	var->yres           = video_mode->yres;
 	var->pixclock       = video_mode->pixclock;
-	var->upper_margin   = video_mode->vbp1 + video_mode->vbp2;
-	var->lower_margin   = video_mode->vfp1 + video_mode->vfp2;
+	var->upper_margin   = video_mode->vbp;
+	var->lower_margin   = video_mode->vfp;
 	var->vsync_len      = video_mode->vsw;
 	var->left_margin    = video_mode->hbp;
 	var->right_margin   = video_mode->hfp;
@@ -366,10 +366,8 @@ void var_to_vmode(struct fb_var_screeninfo *var,
 	video_mode->xres       = var->xres;
 	video_mode->yres       = var->yres;
 	video_mode->pixclock   = var->pixclock;
-	video_mode->vbp1       = var->upper_margin / 2;
-	video_mode->vfp1       = var->lower_margin / 2;
-	video_mode->vbp2       = video_mode->vbp1 + var->upper_margin % 2;
-	video_mode->vfp2       = video_mode->vfp1 + var->lower_margin % 2;
+	video_mode->vbp        = var->upper_margin;
+	video_mode->vfp        = var->lower_margin;
 	video_mode->vsw        = var->vsync_len;
 	video_mode->hbp        = var->left_margin;
 	video_mode->hfp        = var->right_margin;
@@ -755,4 +753,3 @@ void mcde_fb_exit(void)
 	platform_device_unregister(&mcde_fb_device);
 	platform_driver_unregister(&mcde_fb_driver);
 }
-
diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index 6eeb1517b62..9572cabaeee 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -608,15 +608,17 @@ static void dpi_video_mode_apply(struct mcde_chnl_state *chnl)
 	chnl->tv_regs.sel_mode_tv = chnl->port.phy.dpi.tv_mode;
 	if (chnl->tv_regs.sel_mode_tv) {
 		/* TV mode */
-		u32 bel = chnl->vmode.vbp1 + chnl->vmode.vfp1
-				+ chnl->vmode.vbp2 + chnl->vmode.vfp2;
+		u32 bel;
 		/* -4 since hsw is excluding SAV/EAV, 2 bytes each */
 		chnl->tv_regs.hsw  = chnl->vmode.hbp + chnl->vmode.hfp - 4;
+		/* vbp_field2 = vbp_field1 + 1 */
+		chnl->tv_regs.fsl1 = chnl->vmode.vbp / 2;
+		chnl->tv_regs.fsl2 = chnl->vmode.vbp - chnl->tv_regs.fsl1;
+		/* +1 since vbp_field2 = vbp_field1 + 1 */
+		bel = chnl->vmode.vbp + chnl->vmode.vfp;
 		/* in TV mode: bel2 = bel1 + 1 */
 		chnl->tv_regs.bel1 = bel / 2;
 		chnl->tv_regs.bel2 = bel - chnl->tv_regs.bel1;
-		chnl->tv_regs.fsl1 = chnl->vmode.vbp1;
-		chnl->tv_regs.fsl2 = chnl->vmode.vbp2;
 		if (chnl->port.phy.dpi.bus_width == 4)
 			chnl->tv_regs.tv_mode = MCDE_TVCRA_TVMODE_SDTV_656P_BE;
 		else
@@ -637,8 +639,8 @@ static void dpi_video_mode_apply(struct mcde_chnl_state *chnl)
 		chnl->tv_regs.alw  = chnl->vmode.hfp;
 		chnl->tv_regs.bel1 = chnl->vmode.vsw;
 		chnl->tv_regs.bel2 = chnl->tv_regs.bel1;
-		chnl->tv_regs.dvo  = chnl->vmode.vbp1 + chnl->vmode.vbp2;
-		chnl->tv_regs.bsl  = chnl->vmode.vfp1 + chnl->vmode.vfp2;
+		chnl->tv_regs.dvo  = chnl->vmode.vbp;
+		chnl->tv_regs.bsl  = chnl->vmode.vfp;
 		chnl->tv_regs.fsl1 = 0;
 		chnl->tv_regs.fsl2 = 0;
 		polarity = chnl->port.phy.dpi.polarity;
@@ -1365,7 +1367,6 @@ clk_dsi_err:
 regulator_vana_err:
 clk_dpi_err:
 	return -EINVAL;
-
 }
 
 /* REVIEW: Make update_* an mcde_rectangle? */
@@ -1981,9 +1982,7 @@ static int enable_mcde_hw(void)
 	return 0;
 }
 
-
 /* DSI */
-
 int mcde_dsi_dcs_write(struct mcde_chnl_state *chnl, u8 cmd, u8* data, int len)
 {
 	int i;
@@ -3183,7 +3182,6 @@ static int __devinit mcde_probe(struct platform_device *pdev)
 	schedule_delayed_work(&hw_timeout_work,
 					msecs_to_jiffies(MCDE_SLEEP_WATCHDOG));
 
-
 	major_version = MCDE_REG2VAL(MCDE_PID, MAJOR_VERSION,
 							mcde_rreg(MCDE_PID));
 	minor_version = MCDE_REG2VAL(MCDE_PID, MINOR_VERSION,
@@ -3214,7 +3212,6 @@ static int __devinit mcde_probe(struct platform_device *pdev)
 		goto failed_hardware_version;
 	}
 
-
 	for (i = 0; i < num_overlays; i++)
 		overlays[i].idx = i;
 
@@ -3282,7 +3279,6 @@ failed_channels_alloc:
 	return ret;
 }
 
-
 static int __devexit mcde_remove(struct platform_device *pdev)
 {
 	struct mcde_chnl_state *chnl = &channels[0];
diff --git a/include/video/mcde.h b/include/video/mcde.h
index a9976352009..5142640a6de 100644
--- a/include/video/mcde.h
+++ b/include/video/mcde.h
@@ -253,17 +253,15 @@ enum mcde_display_rotation {
 #define DSI_CMD_MODE	1
 
 /* Video mode descriptor */
-struct mcde_video_mode {/* REVIEW: Join 1 & 2 */
+struct mcde_video_mode {
 	u32 xres;
 	u32 yres;
 	u32 pixclock;	/* pixel clock in ps (pico seconds) */
-	u32 hbp;	/* hor back porch = left_margin */
-	u32 hfp;	/* hor front porch equals to right_margin */
+	u32 hbp;	/* horizontal back porch: left margin (excl. hsync) */
+	u32 hfp;	/* horizontal front porch: right margin (excl. hsync) */
 	u32 hsw;	/* horizontal sync width */
-	u32 vbp1;	/* field 1: vert back porch equals to upper_margin */
-	u32 vfp1;	/* field 1: vert front porch equals to lower_margin */
-	u32 vbp2;	/* field 2: vert back porch equals to upper_margin */
-	u32 vfp2;	/* field 2: vert front porch equals to lower_margin */
+	u32 vbp;	/* vertical back porch: upper margin (excl. vsync) */
+	u32 vfp;	/* vertical front porch: lower margin (excl. vsync) */
 	u32 vsw;	/* vertical sync width*/
 	bool interlaced;
 	bool force_update; /* when switching between hdmi and sdtv */
-- 
cgit v1.2.3


From 65f567cde8022ccb40b500bd349f6e8044c4ccfc Mon Sep 17 00:00:00 2001
From: Marcel Tunnissen <Marcel.Tuennissen@stericsson.com>
Date: Tue, 29 Mar 2011 15:03:54 +0200
Subject: video: mcde: Add support for original NTSC

This adds support for NTSC 486i to MCDE display AB8500. This is the
original amount of active lines for NTSC.

ST-Ericsson ID: 332866
ST-Ericsson Linux next: Not tested, ER 282779
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I0b48aa90df2342ba01f858ad9b83b9b30d4b5196
Signed-off-by: Marcel Tunnissen <Marcel.Tuennissen@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/19370
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Tested-by: Marcel TUNNISSEN <marcel.tuennissen@stericsson.com>
Reviewed-by: Dan JOHANSSON <dan.johansson@stericsson.com>
---
 drivers/video/mcde/display-ab8500.c | 25 ++++++++++++++++++++++++-
 1 file changed, 24 insertions(+), 1 deletion(-)

diff --git a/drivers/video/mcde/display-ab8500.c b/drivers/video/mcde/display-ab8500.c
index b738c33a0cb..8b932d3d8d2 100644
--- a/drivers/video/mcde/display-ab8500.c
+++ b/drivers/video/mcde/display-ab8500.c
@@ -35,6 +35,19 @@
 #define PAL_VFP_FIELD_1		2
 #define PAL_VFP_FIELD_2		2
 
+/*
+ * NTSC (ITU-R BT.470-5):
+ * Total nr of active lines:   486
+ * Total nr of blanking lines:  39
+ *                      total: 525
+ */
+#define NTSC_ORG_HBP		122
+#define NTSC_ORG_HFP		16
+#define NTSC_ORG_VBP_FIELD_1	16
+#define NTSC_ORG_VBP_FIELD_2	17
+#define NTSC_ORG_VFP_FIELD_1	3
+#define NTSC_ORG_VFP_FIELD_2	3
+
 /*
  * NTSC (DV variant):
  * Total nr of active lines:   480
@@ -245,6 +258,15 @@ static int try_video_mode(
 		video_mode->interlaced = true;
 		video_mode->pixclock = SDTV_PIXCLOCK;
 		break;
+	case 486:
+		/* set including SAV/EAV */
+		video_mode->hbp = NTSC_ORG_HBP;
+		video_mode->hfp = NTSC_ORG_HFP;
+		video_mode->vbp = NTSC_ORG_VBP_FIELD_1 + NTSC_ORG_VBP_FIELD_2;
+		video_mode->vfp = NTSC_ORG_VFP_FIELD_1 + NTSC_ORG_VFP_FIELD_2;
+		video_mode->interlaced = true;
+		video_mode->pixclock = SDTV_PIXCLOCK;
+		break;
 	default:
 		dev_warn(&ddev->dev,
 			"%s:Failed to find video mode x=%d, y=%d\n",
@@ -289,7 +311,8 @@ static int set_video_mode(
 		/* TODO: PAL N (e.g. uses a setup of 7.5 IRE) */
 		driver_data->denc_conf.black_level_setup = false;
 		break;
-	case 480: /* NTSC, PAL M */
+	case 480: /* NTSC, PAL M DV variant */
+	case 486: /* NTSC, PAL M original   */
 		/* TODO: PAL M */
 		driver_data->denc_conf.TV_std = TV_STD_NTSC_M;
 		/* TODO: how to choose LOW DEF FILTER */
-- 
cgit v1.2.3


From 6798688fc0cebbcb6bcf1a32d2c3081e88b3752c Mon Sep 17 00:00:00 2001
From: Jimmy Rubin <jimmy.rubin@stericsson.com>
Date: Tue, 5 Apr 2011 10:16:44 +0200
Subject: video: mcde: Fix irq_handler for chnl_disable

If a channel is disabled, this channel shall not
be handled by the irq_handler.

ST-Ericsson Linux next: Not tested, ER 282779
ST-Ericsson ID: 333875
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I359454e8d44e54b21db8aa3942b89e3b0dbff58e
Signed-off-by: Jimmy Rubin <jimmy.rubin@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/19968
Reviewed-by: Marta LOFSTEDT <marta.lofstedt@stericsson.com>
Reviewed-by: Dan JOHANSSON <dan.johansson@stericsson.com>
---
 drivers/video/mcde/mcde_hw.c | 28 +++++++++++++---------------
 1 file changed, 13 insertions(+), 15 deletions(-)

diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index 9572cabaeee..1542538e18d 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -864,7 +864,6 @@ static irqreturn_t mcde_irq_handler(int irq, void *dev)
 {
 	int i;
 	u32 irq_status;
-	bool trig = false;
 	struct mcde_chnl_state *chnl;
 
 	/* Handle overlay irqs */
@@ -975,16 +974,20 @@ static irqreturn_t mcde_irq_handler(int irq, void *dev)
 
 		chnl_from_dsi = find_channel_by_dsilink(i);
 
-		trig = false;
+		if (chnl_from_dsi == NULL)
+			continue;
+
 		irq_status = dsi_rfld(i, DSI_DIRECT_CMD_STS_FLAG,
 			TE_RECEIVED_FLAG);
 		if (irq_status) {
 			if (hardware_version == MCDE_CHIP_VERSION_3_0_8)
 				disable_flow(chnl_from_dsi);
-			trig = true;
 			dsi_wreg(i, DSI_DIRECT_CMD_STS_CLR,
 				DSI_DIRECT_CMD_STS_CLR_TE_RECEIVED_CLR(true));
 			dev_vdbg(&mcde_dev->dev, "BTA TE DSI%d\n", i);
+			do_softwaretrig(chnl_from_dsi);
+			dev_vdbg(&mcde_dev->dev, "SW TRIG DSI%d, chnl=%d\n", i,
+				chnl_from_dsi->id);
 		}
 
 		irq_status = dsi_rfld(i, DSI_CMD_MODE_STS_FLAG, ERR_NO_TE_FLAG);
@@ -1003,22 +1006,12 @@ static irqreturn_t mcde_irq_handler(int irq, void *dev)
 				DSI_DIRECT_CMD_STS_CLR_TRIGGER_RECEIVED_CLR(
 						true));
 
-			chnl_from_dsi = find_channel_by_dsilink(i);
-			if (chnl_from_dsi && (chnl_from_dsi->port.sync_src ==
-					MCDE_SYNCSRC_TE_POLLING))
+			if (chnl_from_dsi->port.sync_src ==
+					MCDE_SYNCSRC_TE_POLLING)
 				/* Reset timer */
 				dsi_te_poll_set_timer(chnl_from_dsi,
 						DSI_TE_NO_ANSWER_TIMEOUT);
 		}
-
-		if (!trig)
-			continue;
-		chnl_from_dsi = find_channel_by_dsilink(i);
-		if (chnl_from_dsi) {
-			do_softwaretrig(chnl_from_dsi);
-			dev_vdbg(&mcde_dev->dev, "SW TRIG DSI%d, chnl=%d\n", i,
-				chnl_from_dsi->id);
-		}
 	}
 
 	return IRQ_HANDLED;
@@ -2719,6 +2712,7 @@ void mcde_chnl_disable(struct mcde_chnl_state *chnl)
 
 	mutex_lock(&mcde_hw_lock);
 	cancel_delayed_work(&hw_timeout_work);
+	/* This channel is disabled here */
 	chnl->enabled = false;
 	if (mcde_is_enabled && chnl->formatter_updated
 				&& chnl->port.type == MCDE_PORTTYPE_DSI) {
@@ -2749,6 +2743,10 @@ void mcde_chnl_disable(struct mcde_chnl_state *chnl)
 	}
 	del_timer(&chnl->dsi_te_timer);
 	del_timer(&chnl->auto_sync_timer);
+	/*
+	 * Check if other channels can be disabled and
+	 * if the hardware can be shutdown
+	 */
 	(void)disable_mcde_hw(false);
 	mutex_unlock(&mcde_hw_lock);
 
-- 
cgit v1.2.3


From 76dcd5e16e2abd51e5d91b9f327b4e76748953c4 Mon Sep 17 00:00:00 2001
From: Jimmy Rubin <jimmy.rubin@stericsson.com>
Date: Wed, 16 Mar 2011 08:32:33 +0100
Subject: video: mcde: Fix first refresh when rotated

When hardware_revision is 1_0_4 (U5500_V1)
enable_channel must be executed before softwaretrig
for the first refresh.

ST-Ericsson Linux Next: Not tested, ER 282779
ST-Ericsson ID: 333074
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I0a5e87b16682ed1d3591e8aac09b032874a52e31
Signed-off-by: Jimmy Rubin <jimmy.rubin@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/19524
Reviewed-by: Dan JOHANSSON <dan.johansson@stericsson.com>
---
 drivers/video/mcde/mcde_hw.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index 1542538e18d..69e4617d896 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -1501,13 +1501,14 @@ static void do_softwaretrig(struct mcde_chnl_state *chnl)
 	/*
 	* For main and secondary display,
 	* FLOWEN has to be set before a SOFTWARE TRIG
-	* Otherwise not overlay interrupt is triggerd
+	* Otherwise no overlay interrupt is triggerd
 	* However FLOWEN must not be triggered before SOFTWARE TRIG
 	* if rotation is enabled
 	*/
 	if (hardware_version == MCDE_CHIP_VERSION_3_0_8)
 		enable_channel(chnl);
-	else if ((!is_channel_enabled(chnl) && !chnl->regs.roten))
+	else if ((!is_channel_enabled(chnl) && !chnl->regs.roten)
+				|| chnl->power_mode != MCDE_DISPLAY_PM_ON)
 		enable_channel(chnl);
 
 	mcde_wreg(MCDE_CHNL0SYNCHSW +
-- 
cgit v1.2.3


From 9f01cb89daa6c5bd5b2f7398b18a0d1cad0d5d48 Mon Sep 17 00:00:00 2001
From: Philippe Langlais <philippe.langlais@linaro.org>
Date: Mon, 9 May 2011 15:08:33 +0200
Subject: ux500: mcde: update board-configuration for U5500

Aligns board-u5500-mcde.c with board-mop500-mcde.c

ST-Ericsson Linux Next: Not tested, ER 282779
ST-Ericsson ID: 333074
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I8aae1c1d9af1ec0b438ba7c3fd09bfa96322ceb3
Signed-off-by: Jimmy Rubin <jimmy.rubin@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/19525
Reviewed-by: Dan JOHANSSON <dan.johansson@stericsson.com>

Conflicts:

	arch/arm/mach-ux500/board-u5500-mcde.c
---
 arch/arm/mach-ux500/board-u5500-mcde.c | 49 +++++++++++++++++++++++-----------
 1 file changed, 33 insertions(+), 16 deletions(-)

diff --git a/arch/arm/mach-ux500/board-u5500-mcde.c b/arch/arm/mach-ux500/board-u5500-mcde.c
index 714ee15a643..420b8682dfc 100644
--- a/arch/arm/mach-ux500/board-u5500-mcde.c
+++ b/arch/arm/mach-ux500/board-u5500-mcde.c
@@ -20,7 +20,11 @@
 
 #define PRIMARY_DISPLAY_ID	0
 
-static bool rotate_main = true;
+#ifdef CONFIG_FB_MCDE
+
+
+static struct fb_info *fbs[2] = { NULL, NULL };
+static struct mcde_display_device *displays[2] = { NULL, NULL };
 static int display_initialized_during_boot;
 
 static int __init startup_graphics_setup(char *str)
@@ -85,7 +89,11 @@ struct mcde_display_device u5500_generic_display0 = {
 	.port = &port0,
 	.chnl_id = MCDE_CHNL_A,
 	.fifo = MCDE_FIFO_A,
+#ifdef CONFIG_MCDE_DISPLAY_PRIMARY_16BPP
 	.default_pixel_format = MCDE_OVLYPIXFMT_RGB565,
+#else
+	.default_pixel_format = MCDE_OVLYPIXFMT_RGBA8888,
+#endif
 	.native_x_res = 864,
 	.native_y_res = 480,
 #ifdef CONFIG_DISPLAY_GENERIC_DSI_PRIMARY_VSYNC
@@ -102,8 +110,6 @@ struct mcde_display_device u5500_generic_display0 = {
 };
 #endif /* CONFIG_DISPLAY_GENERIC_DSI_PRIMARY */
 
-static struct fb_info *fbs[2] = { NULL, NULL};
-static struct mcde_display_device *displays[2] = { NULL, NULL };
 /*
 * This function will create the framebuffer for the display that is registered.
 */
@@ -123,10 +129,26 @@ static int display_postregistered_callback(struct notifier_block *nb,
 
 	mcde_dss_get_native_resolution(ddev, &width, &height);
 
-	if (ddev->id == PRIMARY_DISPLAY_ID && rotate_main) {
-		swap(width, height);
-		rotate = FB_ROTATE_CW;
+#ifdef CONFIG_DISPLAY_GENERIC_DSI_PRIMARY
+	if (ddev->id == PRIMARY_DISPLAY_ID) {
+		switch (CONFIG_DISPLAY_GENERIC_DSI_PRIMARY_ROTATION_ANGLE) {
+		case 0:
+			rotate = FB_ROTATE_UR;
+			break;
+		case 90:
+			rotate = FB_ROTATE_CW;
+			swap(width, height);
+			break;
+		case 180:
+			rotate = FB_ROTATE_UD;
+			break;
+		case 270:
+			rotate = FB_ROTATE_CCW;
+			swap(width, height);
+			break;
+		}
 	}
+#endif
 
 	virtual_width = width;
 	virtual_height = height * 2;
@@ -143,9 +165,10 @@ static int display_postregistered_callback(struct notifier_block *nb,
 		rotate);
 
 	if (IS_ERR(fbs[ddev->id]))
-		pr_warning("Failed to create fb for display %s\n", ddev->name);
+		dev_warn(&ddev->dev, "Failed to create fb for display %s\n",
+								ddev->name);
 	else
-		pr_info("Framebuffer created (%s)\n", ddev->name);
+		dev_info(&ddev->dev, "Framebuffer created (%s)\n", ddev->name);
 
 	return 0;
 }
@@ -170,7 +193,6 @@ static int framebuffer_postregistered_callback(struct notifier_block *nb,
 	struct fb_var_screeninfo var;
 	struct fb_fix_screeninfo fix;
 	struct mcde_fb *mfb;
-	u8 *addr;
 	int i;
 
 	if (event != FB_EVENT_FB_REGISTERED)
@@ -183,9 +205,7 @@ static int framebuffer_postregistered_callback(struct notifier_block *nb,
 	mfb = to_mcde_fb(info);
 	var = info->var;
 	fix = info->fix;
-	addr = ioremap(fix.smem_start,
-			var.yres_virtual * fix.line_length);
-	memset(addr, 0x00, var.yres_virtual * fix.line_length);
+
 	/* Apply overlay info */
 	for (i = 0; i < mfb->num_ovlys; i++) {
 		struct mcde_overlay *ovly = mfb->ovlys[i];
@@ -221,7 +241,6 @@ static int framebuffer_postregistered_callback(struct notifier_block *nb,
 	struct fb_var_screeninfo var;
 	struct fb_fix_screeninfo fix;
 	struct mcde_fb *mfb;
-	u8 *addr;
 
 	if (event != FB_EVENT_FB_REGISTERED)
 		return 0;
@@ -236,9 +255,6 @@ static int framebuffer_postregistered_callback(struct notifier_block *nb,
 
 	var = info->var;
 	fix = info->fix;
-	addr = ioremap(fix.smem_start,
-			var.yres_virtual * fix.line_length);
-	memset(addr, 0x00, var.yres_virtual * fix.line_length);
 	var.yoffset = var.yoffset ? 0 : var.yres;
 	if (info->fbops->fb_pan_display)
 		ret = info->fbops->fb_pan_display(&var, info);
@@ -279,3 +295,4 @@ int __init init_display_devices_u5500(void)
 }
 
 module_init(init_display_devices_u5500);
+#endif
-- 
cgit v1.2.3


From 43ee022669058cb058c38111916c937598f2db48 Mon Sep 17 00:00:00 2001
From: Jimmy Rubin <jimmy.rubin@stericsson.com>
Date: Wed, 23 Mar 2011 21:40:06 +0100
Subject: video: mcde: update formatter setup for U5500

If channel B is used, LINK1_VID or LINK0_CMD can be used.
For channel A, LINK0_VID and LINK1_CMD can be used.

ST-Ericsson Linux next: Not tested, ER 282779
ST-Ericsson ID: 333074
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I21ee3b8dd84495292518e48c68e536f1dd18b8b6
Signed-off-by: Jimmy Rubin <jimmy.rubin@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/19527
Reviewed-by: Dan JOHANSSON <dan.johansson@stericsson.com>
---
 drivers/video/mcde/mcde_hw.c | 11 +++++------
 1 file changed, 5 insertions(+), 6 deletions(-)

diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index 69e4617d896..0cbcc70fce0 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -1160,9 +1160,9 @@ static int update_channel_static_registers(struct mcde_chnl_state *chnl)
 				return -EINVAL;
 
 			if (port->type == MCDE_PORTTYPE_DSI) {
-				if (port->link == 1 && port->ifc == 0)
-					return -EINVAL;
-				if (port->link == 0 && port->ifc == 1)
+				if ((port->link == 1 &&
+						port->ifc == DSI_VIDEO_MODE) ||
+				(port->link == 0 && port->ifc == DSI_CMD_MODE))
 					return -EINVAL;
 				mcde_wfld(MCDE_CR, DSI0_EN_V3, true);
 
@@ -1179,9 +1179,8 @@ static int update_channel_static_registers(struct mcde_chnl_state *chnl)
 			if (chnl->id != 1)
 				return -EINVAL;
 
-			if (port->link == 0 && port->ifc == 0)
-				return -EINVAL;
-			if (port->link == 1 && port->ifc == 0)
+			if ((port->link == 0 && port->ifc == DSI_VIDEO_MODE) ||
+				(port->link == 1 && port->ifc == DSI_CMD_MODE))
 				return -EINVAL;
 
 			mcde_wfld(MCDE_CR, DSI1_EN_V3, true);
-- 
cgit v1.2.3


From 9ab5ea8bcb97a838c09dd51950983022aea75406 Mon Sep 17 00:00:00 2001
From: Philippe Langlais <philippe.langlais@stericsson.com>
Date: Wed, 12 Oct 2011 14:11:18 +0200
Subject: ux500: mcde: Increase DSI freq for U5500

Increases DSI freq to 206,25 MHZ.

ST-Ericsson Linux next: Not tested, ER 282799
ST-Ericsson ID: 333074
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: Ifb323bb30c5ac8adda981f2914278617946ecd7f
Signed-off-by: Jimmy Rubin <jimmy.rubin@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/19528
Reviewed-by: Dan JOHANSSON <dan.johansson@stericsson.com>

Conflicts:

	arch/arm/mach-ux500/prcmu-db5500.c

Conflicts:

	arch/arm/mach-ux500/prcmu-db5500.c
---
 arch/arm/mach-ux500/board-u5500-mcde.c | 5 +----
 1 file changed, 1 insertion(+), 4 deletions(-)

diff --git a/arch/arm/mach-ux500/board-u5500-mcde.c b/arch/arm/mach-ux500/board-u5500-mcde.c
index 420b8682dfc..6ee14ee41ed 100644
--- a/arch/arm/mach-ux500/board-u5500-mcde.c
+++ b/arch/arm/mach-ux500/board-u5500-mcde.c
@@ -16,13 +16,10 @@
 #include <video/mcde_fb.h>
 #include <video/mcde_dss.h>
 
-#define DSI_UNIT_INTERVAL_0	0xB
-
+#define DSI_UNIT_INTERVAL_0	0xA
 #define PRIMARY_DISPLAY_ID	0
 
 #ifdef CONFIG_FB_MCDE
-
-
 static struct fb_info *fbs[2] = { NULL, NULL };
 static struct mcde_display_device *displays[2] = { NULL, NULL };
 static int display_initialized_during_boot;
-- 
cgit v1.2.3


From 1ec40ac3824dd09c1b4591eef630991fbd0a1902 Mon Sep 17 00:00:00 2001
From: Jimmy Rubin <jimmy.rubin@stericsson.com>
Date: Wed, 30 Mar 2011 13:42:32 +0200
Subject: video: mcde: Change fifo size to 640

For hw version 1_0_4 (U5500_V1) the output fifo size
should be 640.

ST-Ericsson Linux next: Not tested, ER 282779
ST-Ericsson ID: 333074
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: Ic22eb32df7b56dc72123d8182344ea4bc6185519
Signed-off-by: Jimmy Rubin <jimmy.rubin@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/19529
Reviewed-by: Dan JOHANSSON <dan.johansson@stericsson.com>
---
 drivers/video/mcde/mcde_hw.c | 5 +----
 1 file changed, 1 insertion(+), 4 deletions(-)

diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index 0cbcc70fce0..cc7f2dc838b 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -817,10 +817,7 @@ static u32 get_output_fifo_size(enum mcde_fifo fifo)
 	switch (fifo) {
 	case MCDE_FIFO_A:
 	case MCDE_FIFO_B:
-		if (hardware_version == MCDE_CHIP_VERSION_1_0_4)
-			ret = MCDE_FIFO_AB_SIZE / 2;
-		else
-			ret = MCDE_FIFO_AB_SIZE;
+		ret = MCDE_FIFO_AB_SIZE;
 		break;
 	case MCDE_FIFO_C0:
 	case MCDE_FIFO_C1:
-- 
cgit v1.2.3


From f4610cb67268fb64fbc78fb1ee5011fc0fea23e8 Mon Sep 17 00:00:00 2001
From: Per Persson <per.xb.persson@stericsson.com>
Date: Tue, 5 Apr 2011 09:00:31 +0200
Subject: video: av8100: Add support for DVI monitors

To be able to use HDMI together with DVI only monitors,
DVI mode must be chosen as AV8100 hdmi format.
This patch supports the change of hdmi format by writing
to a sysfs file.

ST-Ericsson ID: 330443
ST-Ericsson Linux next: Not tested, ER 282779
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I27f3a9e9ce09973c2ec8271bba7ab8d8093b1258
Signed-off-by: Per Persson <per.xb.persson@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/20383
Reviewed-by: Jonas ABERG <jonas.aberg@stericsson.com>
---
 drivers/video/mcde/display-av8100.c | 70 ++++++++++++++++++++++++++++---------
 include/video/mcde.h                |  3 +-
 2 files changed, 56 insertions(+), 17 deletions(-)

diff --git a/drivers/video/mcde/display-av8100.c b/drivers/video/mcde/display-av8100.c
index b941288bca3..84818a558fc 100644
--- a/drivers/video/mcde/display-av8100.c
+++ b/drivers/video/mcde/display-av8100.c
@@ -22,6 +22,8 @@
 #include <video/av8100.h>
 #include <video/hdmi.h>
 
+#define SWITCH_HELPSTR ", 0=HDMI, 1=SDTV, 2=DVI\n"
+
 struct display_driver_data {
 	struct regulator *cvbs_regulator;
 	bool cvbs_regulator_enabled;
@@ -35,10 +37,33 @@ static int hdmi_set_video_mode(
 static int hdmi_set_pixel_format(
 	struct mcde_display_device *ddev, enum mcde_ovly_pix_fmt format);
 
+static ssize_t show_hdmisdtvswitch(struct device *dev,
+		struct device_attribute *attr, char *buf);
 static ssize_t store_hdmisdtvswitch(struct device *dev,
 		struct device_attribute *attr, const char *buf, size_t count);
+static ssize_t show_input_pixel_format(struct device *dev,
+		struct device_attribute *attr, char *buf);
+static ssize_t store_input_pixel_format(struct device *dev,
+		struct device_attribute *attr, const char *buf, size_t count);
 
-static DEVICE_ATTR(hdmisdtvswitch, S_IWUSR, NULL, store_hdmisdtvswitch);
+static DEVICE_ATTR(hdmisdtvswitch, S_IRUGO | S_IWUSR, show_hdmisdtvswitch,
+			store_hdmisdtvswitch);
+static DEVICE_ATTR(input_pixel_format, S_IRUGO | S_IWUSR,
+			show_input_pixel_format, store_input_pixel_format);
+
+static ssize_t show_hdmisdtvswitch(struct device *dev,
+		struct device_attribute *attr, char *buf)
+{
+	struct mcde_display_device *mdev = to_mcde_display_device(dev);
+	int index;
+
+	dev_dbg(dev, "%s\n", __func__);
+
+	sprintf(buf, "%1x%s", mdev->port->hdmi_sdtv_switch, SWITCH_HELPSTR);
+	index = 1 + strlen(SWITCH_HELPSTR) + 1;
+
+	return index;
+}
 
 static ssize_t store_hdmisdtvswitch(struct device *dev,
 		struct device_attribute *attr, const char *buf, size_t count)
@@ -52,11 +77,16 @@ static ssize_t store_hdmisdtvswitch(struct device *dev,
 			mdev->port->hdmi_sdtv_switch = HDMI_SWITCH;
 			mdev->native_x_res = NATIVE_XRES_HDMI;
 			mdev->native_y_res = NATIVE_YRES_HDMI;
-		} else {
+		} else if ((*buf == 1) || (*buf == '1')) {
 			dev_dbg(dev, "hdmi/sdtv switch = sdtv\n");
 			mdev->port->hdmi_sdtv_switch = SDTV_SWITCH;
 			mdev->native_x_res = NATIVE_XRES_SDTV;
 			mdev->native_y_res = NATIVE_YRES_SDTV;
+		} else if ((*buf == 2) || (*buf == '2')) {
+			dev_dbg(dev, "hdmi/sdtv switch = dvi\n");
+			mdev->port->hdmi_sdtv_switch = DVI_SWITCH;
+			mdev->native_x_res = NATIVE_XRES_HDMI;
+			mdev->native_y_res = NATIVE_YRES_HDMI;
 		}
 		/* implicitely read by a memcmp in dss */
 		mdev->video_mode.force_update = true;
@@ -65,6 +95,14 @@ static ssize_t store_hdmisdtvswitch(struct device *dev,
 	return count;
 }
 
+static ssize_t show_input_pixel_format(struct device *dev,
+		struct device_attribute *attr, char *buf)
+{
+	struct mcde_display_device *ddev = to_mcde_display_device(dev);
+
+	return sprintf(buf, "%d\n", ddev->port->pixel_format);
+}
+
 static ssize_t store_input_pixel_format(struct device *dev,
 		struct device_attribute *attr, const char *buf, size_t count)
 {
@@ -98,16 +136,6 @@ static ssize_t store_input_pixel_format(struct device *dev,
 
 	return count;
 }
-static ssize_t show_input_pixel_format(struct device *dev,
-				struct device_attribute *attr, char *buf)
-{
-	struct mcde_display_device *ddev = to_mcde_display_device(dev);
-
-	return sprintf(buf, "%d\n", ddev->port->pixel_format);
-}
-
-static DEVICE_ATTR(input_pixel_format, S_IRUGO | S_IWUSR,
-			show_input_pixel_format, store_input_pixel_format);
 
 /* Supported HDMI modes */
 static struct mcde_video_mode video_modes_supp_hdmi[] = {
@@ -709,11 +737,12 @@ static int hdmi_on_first_update(struct mcde_display_device *dev)
 
 	/*
 	 * Prepare HDMI configuration
-	 * Avoid simultaneous output of DENC and HDMI.
+	 * Avoid simultaneous output of DENC and HDMI/DVI.
 	 * Only one of them should be enabled.
-	 * Note HDMI and DENC are always turned off in set_video_mode.
+	 * Note HDMI/DVI and DENC are always turned off in set_video_mode.
 	 */
-	if (dev->port->hdmi_sdtv_switch == SDTV_SWITCH) {
+	switch (dev->port->hdmi_sdtv_switch) {
+	case SDTV_SWITCH:
 		if (av8100_conf_get(AV8100_COMMAND_DENC, &av8100_config))
 			return -EFAULT;
 		av8100_config.denc_format.enable = 1;
@@ -729,11 +758,20 @@ static int hdmi_on_first_update(struct mcde_display_device *dev)
 					AV8100_CVBS_525;
 		}
 		ret = av8100_conf_prep(AV8100_COMMAND_DENC, &av8100_config);
-	} else {
+		break;
+	case DVI_SWITCH:
+		av8100_config.hdmi_format.hdmi_mode = AV8100_HDMI_ON;
+		av8100_config.hdmi_format.hdmi_format = AV8100_DVI;
+		av8100_config.hdmi_format.dvi_format = AV8100_DVI_CTRL_CTL0;
+		ret = av8100_conf_prep(AV8100_COMMAND_HDMI, &av8100_config);
+		break;
+	case HDMI_SWITCH:
+	default:
 		av8100_config.hdmi_format.hdmi_mode = AV8100_HDMI_ON;
 		av8100_config.hdmi_format.hdmi_format = AV8100_HDMI;
 		av8100_config.hdmi_format.dvi_format = AV8100_DVI_CTRL_CTL0;
 		ret = av8100_conf_prep(AV8100_COMMAND_HDMI, &av8100_config);
+		break;
 	}
 
 	if (ret) {
diff --git a/include/video/mcde.h b/include/video/mcde.h
index 5142640a6de..ef828f0d560 100644
--- a/include/video/mcde.h
+++ b/include/video/mcde.h
@@ -137,7 +137,8 @@ enum mcde_port_pix_fmt {
 
 enum mcde_hdmi_sdtv_switch {
 	HDMI_SWITCH,
-	SDTV_SWITCH
+	SDTV_SWITCH,
+	DVI_SWITCH
 };
 
 struct mcde_col_convert {
-- 
cgit v1.2.3


From 44a17b10f0e572daeaad45009e852e0533016982 Mon Sep 17 00:00:00 2001
From: Per Persson <per.xb.persson@stericsson.com>
Date: Mon, 18 Apr 2011 08:02:01 +0200
Subject: video: mcde: Correct issue when changing HDMI resolution

Force an overlay update when changing the interlace mode only.

ST-Ericsson ID: 335756
ST-Ericsson Linux next: Not tested, ER 282779
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I4f822565b771af173605dc723ecb4ad0fa7ade79
Signed-off-by: Per Persson <per.xb.persson@stericsson.com>
---
 drivers/video/mcde/mcde_hw.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index cc7f2dc838b..1ff68044129 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -2550,6 +2550,11 @@ int mcde_chnl_set_video_mode(struct mcde_chnl_state *chnl,
 
 	chnl->vmode = *vmode;
 
+	if (chnl->ovly0)
+		chnl->ovly0->update = true;
+	if (chnl->ovly1)
+		chnl->ovly1->update = true;
+
 	dev_vdbg(&mcde_dev->dev, "%s exit\n", __func__);
 
 	return 0;
-- 
cgit v1.2.3


From e9b56649f2af6aaa4043f9226ddf8ba28e2d243e Mon Sep 17 00:00:00 2001
From: Philippe Langlais <philippe.langlais@stericsson.com>
Date: Wed, 12 Oct 2011 14:53:26 +0200
Subject: video: av8100: Add Alternative Powerup Sequence

A HW issue in AV8100 can result in some HREF v60 and v70 boards
getting a bad +5V at HDMI output. Also FW download may be affected.
This patch provides a SW workaround for this HW issue.
The new powerup sequence is default behaviour. It can be switched
off in av8100_plat_data.
The HW issue may be resolved in later versions of AV8100 HW.

ST-Ericsson ID: 319404
ST-Ericsson Linux next: Not tested, ER 282779
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I2fb63b366e78db015127f8bfa45b17ee8e0a5035
Signed-off-by: Per Persson <per.xb.persson@stericsson.com>

Conflicts:

	arch/arm/mach-ux500/board-mop500.c
---
 drivers/video/av8100/av8100.c      | 157 ++++++++++++++++++++++++++++++-------
 drivers/video/av8100/av8100_regs.h |   6 ++
 include/video/av8100.h             |   4 +-
 3 files changed, 136 insertions(+), 31 deletions(-)

diff --git a/drivers/video/av8100/av8100.c b/drivers/video/av8100/av8100.c
index b60ab2f7bf5..f2be10dc15f 100644
--- a/drivers/video/av8100/av8100.c
+++ b/drivers/video/av8100/av8100.c
@@ -41,9 +41,9 @@
 #define AV8100_PLUGSTARTUP_TIME 100
 
 /* Standby search time */
-#define AV8100_ON_TIME 1	/* 20 ms step */
-#define AV8100_DENC_OFF_TIME 3	/* 640 ms step if > V1. Not used if V1 */
-#define AV8100_HDMI_OFF_TIME 2	/* 320 ms step if V2. 80 ms step if V1 */
+#define AV8100_ON_TIME 1	/* 9 ms step */
+#define AV8100_DENC_OFF_TIME 3	/* 275 ms step if > V1. Not used if V1 */
+#define AV8100_HDMI_OFF_TIME 2	/* 140 ms step if V2. 80 ms step if V1 */
 
 /* Command offsets */
 #define AV8100_COMMAND_OFFSET		0x10
@@ -93,12 +93,12 @@
 #define REG_10_8_MSB(p)		((u8)((p & 0x300)>>8))
 #define REG_12_8_MSB(p)		((u8)((p & 0xf00)>>8))
 
-#define AV8100_POWERON_WAITTIME1_MS 1
-#define AV8100_POWERON_WAITTIME2_MS 1
-#define AV8100_CMD_RET_WAITTIME_MS 1
+#define AV8100_WAITTIME_1MS 1
+#define AV8100_WAITTIME_5MS 5
+#define AV8100_WAITTIME_10MS 10
+#define AV8100_WAITTIME_50MS 50
+#define AV8100_WATTIME_100US 100
 #define AV8100_CMD_RET_TRIES 10
-#define AV8100_FWDL_WAITTIME1 10
-#define AV8100_FWDL_WAITTIME2 1
 #define AV8100_FWDL_TRIES 10
 
 /* Master clock timing */
@@ -516,7 +516,7 @@ static int av8100_int_event_handle(void)
 	/* Plug event */
 	if (hpdi | cpdi) {
 		/* Clear pending interrupts */
-		(void)av8100_reg_stby_pend_int_w(1, 1, 1);
+		(void)av8100_reg_stby_pend_int_w(1, 1, 1, 0);
 
 		/* STANDBY reg */
 		if (av8100_reg_stby_r(NULL, NULL, &hpds, &cpds, NULL)) {
@@ -1795,7 +1795,74 @@ static int av8100_powerup1(void)
 	gpio_set_value(pdata->reset, 1);
 
 	/* Need to wait before proceeding */
-	mdelay(AV8100_POWERON_WAITTIME1_MS);
+	msleep(AV8100_WAITTIME_1MS);
+
+	if (pdata->alt_powerupseq) {
+		u8 denc_off_time;
+		u8 hdmi_off_time;
+		u8 on_time;
+
+		/* Save the cycle values */
+		denc_off_time = av8100_globals->denc_off_time;
+		hdmi_off_time = av8100_globals->hdmi_off_time;
+		on_time = av8100_globals->on_time;
+
+		dev_dbg(av8100dev, "powerup seq alt\n");
+		retval = av8100_reg_hdmi_5_volt_time_w(0, 0, AV8100_ON_TIME);
+		if (retval) {
+			dev_err(av8100dev, "%s reg_wr err 1\n", __func__);
+			goto av8100_powerup1_err;
+		}
+
+		udelay(AV8100_WATTIME_100US);
+
+		/* Get the cycle values */
+		av8100_globals->denc_off_time = denc_off_time;
+		av8100_globals->hdmi_off_time = hdmi_off_time;
+		av8100_globals->on_time = on_time;
+
+		retval = av8100_reg_stby_pend_int_w(
+				AV8100_STANDBY_PENDING_INTERRUPT_HPDI_LOW,
+				AV8100_STANDBY_PENDING_INTERRUPT_CPDI_LOW,
+				AV8100_STANDBY_PENDING_INTERRUPT_ONI_LOW,
+				AV8100_STANDBY_PENDING_INTERRUPT_BPDIG_HIGH);
+		if (retval) {
+			dev_err(av8100dev, "%s reg_wr err 2\n", __func__);
+			goto av8100_powerup1_err;
+		}
+
+		udelay(AV8100_WATTIME_100US);
+
+		retval = av8100_reg_stby_w(AV8100_STANDBY_CPD_LOW,
+				AV8100_STANDBY_STBY_HIGH, MCLK_FREQ);
+		if (retval) {
+			dev_err(av8100dev, "%s reg_wr err 3\n", __func__);
+			goto av8100_powerup1_err;
+		}
+
+		msleep(AV8100_WAITTIME_1MS);
+
+		retval = av8100_reg_stby_w(AV8100_STANDBY_CPD_LOW,
+				AV8100_STANDBY_STBY_LOW, MCLK_FREQ);
+		if (retval) {
+			dev_err(av8100dev, "%s reg_wr err 4\n", __func__);
+			goto av8100_powerup1_err;
+		}
+
+		msleep(AV8100_WAITTIME_1MS);
+
+		retval = av8100_reg_stby_pend_int_w(
+				AV8100_STANDBY_PENDING_INTERRUPT_HPDI_LOW,
+				AV8100_STANDBY_PENDING_INTERRUPT_CPDI_LOW,
+				AV8100_STANDBY_PENDING_INTERRUPT_ONI_LOW,
+				AV8100_STANDBY_PENDING_INTERRUPT_BPDIG_LOW);
+		if (retval) {
+			dev_err(av8100dev, "%s reg_wr err 5\n", __func__);
+			goto av8100_powerup1_err;
+		}
+
+		msleep(AV8100_WAITTIME_1MS);
+	}
 
 	av8100_set_state(AV8100_OPMODE_STANDBY);
 
@@ -1803,7 +1870,7 @@ static int av8100_powerup1(void)
 	retval = av8100_reg_stby_pend_int_r(NULL, NULL, NULL, &chip_version);
 	if (retval) {
 		dev_err(av8100dev, "Failed to read chip version\n");
-		return -EFAULT;
+		goto av8100_powerup1_err;
 	}
 
 	dev_info(av8100dev, "chip version:%d\n", chip_version);
@@ -1816,11 +1883,15 @@ static int av8100_powerup1(void)
 	default:
 		dev_err(av8100dev, "Unsupported chip version:%d\n",
 			chip_version);
-		return -EFAULT;
+		goto av8100_powerup1_err;
 		break;
 	}
 
 	return 0;
+
+av8100_powerup1_err:
+	av8100_powerdown();
+	return -EFAULT;
 }
 
 static int av8100_powerup2(void)
@@ -1833,9 +1904,11 @@ static int av8100_powerup2(void)
 	if (retval) {
 		dev_err(av8100dev,
 			"Failed to write the value to av8100 register\n");
-		return -EFAULT;
+		return retval;
 	}
 
+	msleep(AV8100_WAITTIME_1MS);
+
 	/* ON time & OFF time on 5v HDMI plug detect */
 	retval = av8100_reg_hdmi_5_volt_time_w(
 			av8100_globals->denc_off_time,
@@ -1844,11 +1917,10 @@ static int av8100_powerup2(void)
 	if (retval) {
 		dev_err(av8100dev,
 			"Failed to write the value to av8100 register\n");
-		return -EFAULT;
+		return retval;
 	}
 
-	/* Need to wait before proceeding */
-	mdelay(AV8100_POWERON_WAITTIME2_MS);
+	msleep(AV8100_WAITTIME_1MS);
 
 	av8100_set_state(AV8100_OPMODE_SCAN);
 
@@ -1871,8 +1943,22 @@ EXPORT_SYMBOL(av8100_powerup);
 
 int av8100_powerdown(void)
 {
+	int retval = 0;
+
 	struct av8100_platform_data *pdata = av8100dev->platform_data;
 
+	if (pdata->alt_powerupseq) {
+		retval = av8100_reg_stby_pend_int_w(
+				AV8100_STANDBY_PENDING_INTERRUPT_HPDI_LOW,
+				AV8100_STANDBY_PENDING_INTERRUPT_CPDI_LOW,
+				AV8100_STANDBY_PENDING_INTERRUPT_ONI_LOW,
+				AV8100_STANDBY_PENDING_INTERRUPT_BPDIG_HIGH);
+
+		if (retval)
+			dev_err(av8100dev, "%s reg_wr err\n", __func__);
+		msleep(AV8100_WAITTIME_50MS);
+	}
+
 	if (gpio_get_value(pdata->reset) == 0)
 		return 0;
 
@@ -1898,9 +1984,13 @@ int av8100_powerdown(void)
 	}
 
 	gpio_set_value(pdata->reset, 0);
+
+	if (pdata->alt_powerupseq)
+		msleep(AV8100_WAITTIME_5MS);
+
 	av8100_set_state(AV8100_OPMODE_SHUTDOWN);
 
-	return 0;
+	return retval;
 }
 EXPORT_SYMBOL(av8100_powerdown);
 
@@ -1951,7 +2041,7 @@ int av8100_download_firmware(char *fw_buff, int nbytes,
 		av8100_globals->opp_requested = true;
 	}
 
-	msleep(AV8100_FWDL_WAITTIME1);
+	msleep(AV8100_WAITTIME_10MS);
 
 	fw_buff = av8100_fw_buff;
 	nbytes = AV8100_FW_SIZE;
@@ -2077,7 +2167,7 @@ int av8100_download_firmware(char *fw_buff, int nbytes,
 	retval = av8100_reg_gen_status_r(NULL, NULL, NULL, &uc,
 		NULL, NULL);
 	while ((retval == 0) && (uc != 0x1) && (cnt-- > 0)) {
-		mdelay(AV8100_FWDL_WAITTIME2);
+		msleep(AV8100_WAITTIME_1MS);
 		retval = av8100_reg_gen_status_r(NULL, NULL, NULL,
 			&uc, NULL, NULL);
 	}
@@ -2116,7 +2206,8 @@ int av8100_disable_interrupt(void)
 	retval = av8100_reg_stby_pend_int_w(
 			AV8100_STANDBY_PENDING_INTERRUPT_HPDI_LOW,
 			AV8100_STANDBY_PENDING_INTERRUPT_CPDI_LOW,
-			AV8100_STANDBY_PENDING_INTERRUPT_ONI_LOW);
+			AV8100_STANDBY_PENDING_INTERRUPT_ONI_LOW,
+			AV8100_STANDBY_PENDING_INTERRUPT_BPDIG_LOW);
 	if (retval) {
 		dev_dbg(av8100dev,
 			"Failed to write the value to av8100 register\n");
@@ -2178,7 +2269,8 @@ int av8100_enable_interrupt(void)
 	retval = av8100_reg_stby_pend_int_w(
 			AV8100_STANDBY_PENDING_INTERRUPT_HPDI_LOW,
 			AV8100_STANDBY_PENDING_INTERRUPT_CPDI_LOW,
-			AV8100_STANDBY_PENDING_INTERRUPT_ONI_LOW);
+			AV8100_STANDBY_PENDING_INTERRUPT_ONI_LOW,
+			AV8100_STANDBY_PENDING_INTERRUPT_BPDIG_LOW);
 	if (retval) {
 		dev_dbg(av8100dev,
 			"Failed to write the value to av8100 register\n");
@@ -2323,7 +2415,7 @@ int av8100_reg_stby_int_mask_w(
 EXPORT_SYMBOL(av8100_reg_stby_int_mask_w);
 
 int av8100_reg_stby_pend_int_w(
-		u8 hpdi, u8 cpdi, u8 oni)
+		u8 hpdi, u8 cpdi, u8 oni, u8 bpdig)
 {
 	int retval;
 	u8 val;
@@ -2336,7 +2428,8 @@ int av8100_reg_stby_pend_int_w(
 	/* Set register value */
 	val = AV8100_STANDBY_PENDING_INTERRUPT_HPDI(hpdi) |
 		AV8100_STANDBY_PENDING_INTERRUPT_CPDI(cpdi) |
-		AV8100_STANDBY_PENDING_INTERRUPT_ONI(oni);
+		AV8100_STANDBY_PENDING_INTERRUPT_ONI(oni) |
+		AV8100_STANDBY_PENDING_INTERRUPT_BPDIG(bpdig);
 
 	/* Write to register */
 	retval = register_write_internal(AV8100_STANDBY_PENDING_INTERRUPT, val);
@@ -2347,7 +2440,7 @@ int av8100_reg_stby_pend_int_w(
 EXPORT_SYMBOL(av8100_reg_stby_pend_int_w);
 
 int av8100_reg_gen_int_mask_w(
-		u8 eocm, u8 vsim, u8 vsom, u8 cecm, u8 hdcpm, u8 uovbm,	u8 tem)
+		u8 eocm, u8 vsim, u8 vsom, u8 cecm, u8 hdcpm, u8 uovbm, u8 tem)
 {
 	int retval;
 	u8 val;
@@ -3270,11 +3363,11 @@ int av8100_conf_w(enum av8100_command_type command_type,
 
 
 		/* Get the first return byte */
-		mdelay(AV8100_CMD_RET_WAITTIME_MS);
+		msleep(AV8100_WAITTIME_1MS);
 		cnt = AV8100_CMD_RET_TRIES;
 		retval = get_command_return_first(i2c, command_type);
 		while (retval && (cnt-- > 0)) {
-			mdelay(AV8100_CMD_RET_WAITTIME_MS);
+			msleep(AV8100_WAITTIME_1MS);
 			retval = get_command_return_first(i2c, command_type);
 		}
 		dev_dbg(av8100dev, "first return cnt:%d\n", cnt);
@@ -3343,11 +3436,11 @@ int av8100_conf_w_raw(enum av8100_command_type command_type,
 
 
 	/* Get the first return byte */
-	mdelay(AV8100_CMD_RET_WAITTIME_MS);
+	msleep(AV8100_WAITTIME_1MS);
 	cnt = AV8100_CMD_RET_TRIES;
 	retval = get_command_return_first(i2c, command_type);
 	while (retval && (cnt-- > 0)) {
-		mdelay(AV8100_CMD_RET_WAITTIME_MS);
+		msleep(AV8100_WAITTIME_1MS);
 		retval = get_command_return_first(i2c, command_type);
 	}
 	dev_dbg(av8100dev, "first return cnt:%d\n", cnt);
@@ -3559,8 +3652,12 @@ static int __devinit av8100_probe(struct i2c_client *i2cClient,
 	av8100_set_state(AV8100_OPMODE_SHUTDOWN);
 
 	/* Obtain the chip version */
-	av8100_powerup1();
-	av8100_powerdown();
+	if (av8100_powerup1()) {
+		dev_err(av8100dev, "av8100_powerup1 fail\n");
+		return -EFAULT;
+	}
+
+	ret = av8100_powerdown();
 
 err:
 	return ret;
diff --git a/drivers/video/av8100/av8100_regs.h b/drivers/video/av8100/av8100_regs.h
index 7e3dc21895e..6ed9000987a 100644
--- a/drivers/video/av8100/av8100_regs.h
+++ b/drivers/video/av8100/av8100_regs.h
@@ -130,6 +130,12 @@
 	AV8100_VAL2REG(AV8100_STANDBY_PENDING_INTERRUPT, SID, __x)
 #define AV8100_STANDBY_PENDING_INTERRUPT_SID_GET(__x) \
 	AV8100_REG2VAL(AV8100_STANDBY_PENDING_INTERRUPT, SID, __x)
+#define AV8100_STANDBY_PENDING_INTERRUPT_BPDIG_SHIFT 6
+#define AV8100_STANDBY_PENDING_INTERRUPT_BPDIG_MASK 0x00000040
+#define AV8100_STANDBY_PENDING_INTERRUPT_BPDIG_HIGH 1
+#define AV8100_STANDBY_PENDING_INTERRUPT_BPDIG_LOW 0
+#define AV8100_STANDBY_PENDING_INTERRUPT_BPDIG(__x) \
+	AV8100_VAL2REG(AV8100_STANDBY_PENDING_INTERRUPT, BPDIG, __x)
 #define AV8100_GENERAL_INTERRUPT_MASK 0x00000004
 #define AV8100_GENERAL_INTERRUPT_MASK_EOCM_SHIFT 0
 #define AV8100_GENERAL_INTERRUPT_MASK_EOCM_MASK 0x00000001
diff --git a/include/video/av8100.h b/include/video/av8100.h
index 2cec097c73d..5225490420c 100644
--- a/include/video/av8100.h
+++ b/include/video/av8100.h
@@ -24,6 +24,7 @@ struct av8100_platform_data {
 	int		reset;
 	const char	*inputclk_id;
 	const char	*regulator_pwr_id;
+	bool		alt_powerupseq;
 };
 
 enum av8100_error {
@@ -441,7 +442,8 @@ int av8100_reg_stby_int_mask_w(
 int av8100_reg_stby_pend_int_w(
 		unsigned char hpdi,
 		unsigned char cpdi,
-		unsigned char oni);
+		unsigned char oni,
+		unsigned char bpdig);
 int av8100_reg_gen_int_mask_w(
 		unsigned char eocm,
 		unsigned char vsim,
-- 
cgit v1.2.3


From d929fbc37ce613c697787a308f9f14a3216e7bde Mon Sep 17 00:00:00 2001
From: Marcel Tunnissen <Marcel.Tuennissen@stericsson.com>
Date: Tue, 19 Apr 2011 09:15:46 +0200
Subject: video: mcde: fix SDTV through AB8500 flashes

The patch fixes flashes that are seen when running SDTV through AB8500.
The flashes are symptons of writing to the same buffer as MCDE. This is
because MCDE generates a VCMP interrupt for each field, instead of each
frame.

ST-Ericsson ID: 336212
ST-Ericsson Linux next: Not tested, ER 282779
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I84b13bf94e11a7742a0369b237594c565d0a64ea
Signed-off-by: Marcel Tunnissen <Marcel.Tuennissen@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/21217
Tested-by: Marcel TUNNISSEN <marcel.tuennissen@stericsson.com>
Reviewed-by: QATOOLS
Reviewed-by: QATEST
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
Reviewed-by: Jonas ABERG <jonas.aberg@stericsson.com>
Reviewed-by: Dan JOHANSSON <dan.johansson@stericsson.com>
---
 drivers/video/mcde/mcde_hw.c | 128 +++++++++++++------------------------------
 1 file changed, 39 insertions(+), 89 deletions(-)

diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index 1ff68044129..c05ac38cca3 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -276,6 +276,10 @@ struct mcde_chnl_state {
 	struct col_regs  col_regs;
 	struct tv_regs   tv_regs;
 
+	/* an interlaced digital TV signal generates a VCMP per field */
+	bool vcmp_per_field;
+	bool even_vcmp;
+
 	bool continous_running;
 	bool disable_software_trig;
 	bool formatter_updated;
@@ -857,47 +861,12 @@ static struct mcde_chnl_state *find_channel_by_dsilink(int link)
 	return NULL;
 }
 
-static irqreturn_t mcde_irq_handler(int irq, void *dev)
+static inline void mcde_handle_vcmp(struct mcde_chnl_state *chnl, u32 int_fld)
 {
-	int i;
-	u32 irq_status;
-	struct mcde_chnl_state *chnl;
-
-	/* Handle overlay irqs */
-	irq_status = mcde_rfld(MCDE_RISOVL, OVLFDRIS);
-	mcde_wfld(MCDE_RISOVL, OVLFDRIS, irq_status);
-
-	/* Handle channel irqs */
-	irq_status = mcde_rreg(MCDE_RISPP);
-	if (irq_status & MCDE_RISPP_VCMPARIS_MASK) {
-		chnl = &channels[MCDE_CHNL_A];
-		chnl->transactionid_hw = chnl->transactionid_regs;
-		wake_up(&chnl->waitq_hw);
-		mcde_wfld(MCDE_RISPP, VCMPARIS, 1);
-		if (chnl->port.update_auto_trig &&
-				chnl->port.sync_src == MCDE_SYNCSRC_OFF &&
-				chnl->port.type == MCDE_PORTTYPE_DSI &&
-				chnl->continous_running) {
-			if (hardware_version == MCDE_CHIP_VERSION_3_0_8)
-				enable_channel(chnl);
-
-			mcde_wreg(MCDE_CHNL0SYNCHSW +
-				chnl->id * MCDE_CHNL0SYNCHSW_GROUPOFFSET,
-				MCDE_CHNL0SYNCHSW_SW_TRIG(true));
-
-			if (hardware_version == MCDE_CHIP_VERSION_3_0_8)
-				disable_flow(chnl);
-			mod_timer(&chnl->auto_sync_timer,
-				jiffies +
-				msecs_to_jiffies(MCDE_AUTO_SYNC_WATCHDOG
-								* 1000));
-		}
-	}
-	if (irq_status & MCDE_RISPP_VCMPBRIS_MASK) {
-		chnl = &channels[MCDE_CHNL_B];
+	if (!chnl->vcmp_per_field ||
+			(chnl->vcmp_per_field && chnl->even_vcmp)) {
 		chnl->transactionid_hw = chnl->transactionid_regs;
 		wake_up(&chnl->waitq_hw);
-		mcde_wfld(MCDE_RISPP, VCMPBRIS, 1);
 		if (chnl->port.update_auto_trig &&
 				chnl->port.sync_src == MCDE_SYNCSRC_OFF &&
 				chnl->port.type == MCDE_PORTTYPE_DSI &&
@@ -917,55 +886,33 @@ static irqreturn_t mcde_irq_handler(int irq, void *dev)
 								* 1000));
 		}
 	}
-	if (irq_status & MCDE_RISPP_VCMPC0RIS_MASK) {
-		chnl = &channels[MCDE_CHNL_C0];
-		chnl->transactionid_hw = chnl->transactionid_regs;
-		wake_up(&chnl->waitq_hw);
-		mcde_wfld(MCDE_RISPP, VCMPC0RIS, 1);
-		if (chnl->port.update_auto_trig &&
-				chnl->port.sync_src == MCDE_SYNCSRC_OFF &&
-				chnl->port.type == MCDE_PORTTYPE_DSI &&
-				chnl->continous_running) {
-			if (hardware_version == MCDE_CHIP_VERSION_3_0_8)
-				enable_channel(chnl);
-
-			mcde_wreg(MCDE_CHNL0SYNCHSW +
-				chnl->id * MCDE_CHNL0SYNCHSW_GROUPOFFSET,
-				MCDE_CHNL0SYNCHSW_SW_TRIG(true));
-
-			if (hardware_version == MCDE_CHIP_VERSION_3_0_8)
-				disable_flow(chnl);
-			mod_timer(&chnl->auto_sync_timer,
-				jiffies +
-				msecs_to_jiffies(MCDE_AUTO_SYNC_WATCHDOG
-								* 1000));
+	chnl->even_vcmp = !chnl->even_vcmp;
+	mcde_wreg_fld(MCDE_RISPP, 0x1 << int_fld, int_fld, 1);
+}
 
-		}
-	}
-	if (irq_status & MCDE_RISPP_VCMPC1RIS_MASK) {
-		chnl = &channels[MCDE_CHNL_C1];
-		chnl->transactionid_hw = chnl->transactionid_regs;
-		wake_up(&chnl->waitq_hw);
-		mcde_wfld(MCDE_RISPP, VCMPC1RIS, 1);
-		if (chnl->port.update_auto_trig &&
-				chnl->port.sync_src == MCDE_SYNCSRC_OFF &&
-				chnl->port.type == MCDE_PORTTYPE_DSI &&
-				chnl->continous_running) {
-			if (hardware_version == MCDE_CHIP_VERSION_3_0_8)
-				enable_channel(chnl);
+static irqreturn_t mcde_irq_handler(int irq, void *dev)
+{
+	int i;
+	u32 irq_status;
 
-			mcde_wreg(MCDE_CHNL0SYNCHSW +
-				chnl->id * MCDE_CHNL0SYNCHSW_GROUPOFFSET,
-				MCDE_CHNL0SYNCHSW_SW_TRIG(true));
+	/* Handle overlay irqs */
+	irq_status = mcde_rfld(MCDE_RISOVL, OVLFDRIS);
+	mcde_wfld(MCDE_RISOVL, OVLFDRIS, irq_status);
 
-			if (hardware_version == MCDE_CHIP_VERSION_3_0_8)
-				disable_flow(chnl);
-			mod_timer(&chnl->auto_sync_timer,
-				jiffies +
-				msecs_to_jiffies(MCDE_AUTO_SYNC_WATCHDOG
-								* 1000));
-		}
-	}
+	/* Handle channel irqs */
+	irq_status = mcde_rreg(MCDE_RISPP);
+	if (irq_status & MCDE_RISPP_VCMPARIS_MASK)
+		mcde_handle_vcmp(&channels[MCDE_CHNL_A],
+						MCDE_RISPP_VCMPARIS_SHIFT);
+	if (irq_status & MCDE_RISPP_VCMPBRIS_MASK)
+		mcde_handle_vcmp(&channels[MCDE_CHNL_B],
+						MCDE_RISPP_VCMPBRIS_SHIFT);
+	if (irq_status & MCDE_RISPP_VCMPC0RIS_MASK)
+		mcde_handle_vcmp(&channels[MCDE_CHNL_C0],
+						MCDE_RISPP_VCMPC0RIS_SHIFT);
+	if (irq_status & MCDE_RISPP_VCMPC1RIS_MASK)
+		mcde_handle_vcmp(&channels[MCDE_CHNL_C1],
+						MCDE_RISPP_VCMPC1RIS_SHIFT);
 	for (i = 0; i < num_dsilinks; i++) {
 		struct mcde_chnl_state *chnl_from_dsi;
 
@@ -1423,11 +1370,8 @@ static void update_overlay_registers(u8 idx, struct ovly_regs *regs,
 			sel_mod = MCDE_EXTSRC0CR_SEL_MOD_AUTO_TOGGLE;
 			break;
 		}
-	} else if (port->type == MCDE_PORTTYPE_DPI) {
-		sel_mod = port->update_auto_trig ?
-				MCDE_EXTSRC0CR_SEL_MOD_AUTO_TOGGLE :
-				MCDE_EXTSRC0CR_SEL_MOD_SOFTWARE_SEL;
-	}
+	} else if (port->type == MCDE_PORTTYPE_DPI)
+		sel_mod = MCDE_EXTSRC0CR_SEL_MOD_SOFTWARE_SEL;
 
 	regs->update = false;
 	mcde_wreg(MCDE_EXTSRC0CONF + idx * MCDE_EXTSRC0CONF_GROUPOFFSET,
@@ -2258,6 +2202,8 @@ static struct mcde_chnl_state *_mcde_chnl_get(enum mcde_chnl chnl_id,
 		}
 	} else if (chnl->port.type == MCDE_PORTTYPE_DPI) {
 		chnl->port.phy.dpi.clk_dpi = clock_dpi;
+		if (chnl->port.phy.dpi.tv_mode)
+			chnl->vcmp_per_field = true;
 	}
 
 #ifdef CONFIG_REGULATOR
@@ -2680,6 +2626,10 @@ void mcde_chnl_put(struct mcde_chnl_state *chnl)
 		}
 	} else if (chnl->port.type == MCDE_PORTTYPE_DPI) {
 		chnl->port.phy.dpi.clk_dpi = NULL;
+		if (chnl->port.phy.dpi.tv_mode) {
+			chnl->vcmp_per_field = false;
+			chnl->even_vcmp = false;
+		}
 	}
 
 	dev_vdbg(&mcde_dev->dev, "%s exit\n", __func__);
-- 
cgit v1.2.3


From ebd5db73430fd6e4ef3c717cce2bbd1bab5c2dfc Mon Sep 17 00:00:00 2001
From: Jimmy Rubin <jimmy.rubin@stericsson.com>
Date: Tue, 26 Apr 2011 13:40:37 +0200
Subject: ux500: mcde: Change rotbuf1/2 address for U5500

MCDE uses ESRAM to store a stripe of data when MCDE
is used for rotation.
MCDE should use ESRAM2 instead of ESRAM0.
ESRAM0 is currently used by DMA.

ST-Ericsson ID: 335354
ST-Ericsson Linux next: Not tested, ER 282779
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: Ia878fe34588ce7b103cb4298a52c46818ecd4fce
Signed-off-by: Jimmy Rubin <jimmy.rubin@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/21595
Reviewed-by: QATOOLS
Reviewed-by: QATEST
Reviewed-by: Dan JOHANSSON <dan.johansson@stericsson.com>
---
 arch/arm/mach-ux500/board-u5500-mcde.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-ux500/board-u5500-mcde.c b/arch/arm/mach-ux500/board-u5500-mcde.c
index 6ee14ee41ed..5570f5fd990 100644
--- a/arch/arm/mach-ux500/board-u5500-mcde.c
+++ b/arch/arm/mach-ux500/board-u5500-mcde.c
@@ -99,8 +99,8 @@ struct mcde_display_device u5500_generic_display0 = {
 	.synchronized_update = false,
 #endif
 	/* TODO: Remove rotation buffers once ESRAM driver is completed */
-	.rotbuf1 = U5500_ESRAM_BASE,
-	.rotbuf2 = U5500_ESRAM_BASE + 0x10000,
+	.rotbuf1 = U5500_ESRAM_BASE + 0x20000 * 2,
+	.rotbuf2 = U5500_ESRAM_BASE + 0x20000 * 2 + 0x10000,
 	.dev = {
 		.platform_data = &u5500_generic_display0_pdata,
 	},
-- 
cgit v1.2.3


From 6eb1637d89faefd90837acb5e9e368b9fae65ef1 Mon Sep 17 00:00:00 2001
From: Anders Bauer <anders.bauer@stericsson.com>
Date: Mon, 18 Apr 2011 12:47:34 +0200
Subject: mcde: make sure all data is sent to display before next command

There is no way of knowing if all display data has been
sent when calling mcde_dsi_dcs_read or mcde_dsi_dcs_write.
A wait_for_channel and a status bit read (CSM_RUNNING) is
added to make sure we don't send new dcs command before
all previous display data is done.

ST-Ericsson ID: 329670
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: Ife94b4164615c77c4a075a665ec8ee73fa7c0c1c
Signed-off-by: Anders Bauer <anders.bauer@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/21008
Reviewed-by: QATEST
Reviewed-by: Dan JOHANSSON <dan.johansson@stericsson.com>
---
 drivers/video/mcde/mcde_hw.c | 30 ++++++++++++++++++++++++++++++
 1 file changed, 30 insertions(+)

diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index c05ac38cca3..0ffba918e53 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -1941,6 +1941,21 @@ int mcde_dsi_dcs_write(struct mcde_chnl_state *chnl, u8 cmd, u8* data, int len)
 	if (!chnl->formatter_updated)
 		(void)update_channel_static_registers(chnl);
 
+	wait_for_channel(chnl);
+	if (chnl->port.type == MCDE_PORTTYPE_DSI) {
+		u8 counter = 10;
+		/*
+		* Wait for CSM_RUNNING,
+		* all data sent for display
+		*/
+		while (dsi_rfld(chnl->port.link,
+			DSI_CMD_MODE_STS, CSM_RUNNING)
+					&& counter--) {
+			cpu_relax();
+			udelay(100);
+		}
+	}
+
 	wrdat[0] = cmd;
 	for (i = 1; i <= len; i++)
 		wrdat[i>>2] |= ((u32)data[i-1] << ((i & 3) * 8));
@@ -2007,6 +2022,21 @@ int mcde_dsi_dcs_read(struct mcde_chnl_state *chnl, u8 cmd, u8* data, int *len)
 	if (!chnl->formatter_updated)
 		(void)update_channel_static_registers(chnl);
 
+	wait_for_channel(chnl);
+	if (chnl->port.type == MCDE_PORTTYPE_DSI) {
+		u8 counter = 10;
+		/*
+		* Wait for CSM_RUNNING,
+		* all data sent for display
+		*/
+		while (dsi_rfld(chnl->port.link,
+			DSI_CMD_MODE_STS, CSM_RUNNING)
+					&& counter--) {
+			cpu_relax();
+			udelay(100);
+		}
+	}
+
 	dsi_wfld(link, DSI_MCTL_MAIN_DATA_CTL, BTA_EN, true);
 	dsi_wfld(link, DSI_MCTL_MAIN_DATA_CTL, READ_EN, true);
 	settings = DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_NAT_ENUM(READ) |
-- 
cgit v1.2.3


From c58603900d889c15604a604ca03fb5b4af7fb7f2 Mon Sep 17 00:00:00 2001
From: Philippe Langlais <philippe.langlais@linaro.org>
Date: Tue, 10 May 2011 16:12:51 +0200
Subject: video: mcde_hdmi: Support for HDMI user space service

Add changes needed by HDMI service in user space.
HDMI service is a user space service that provide
functionality for applications using HDMI.

ST-Ericsson ID: 335747
ST-Ericsson Linux next: Not tested, ER 282779
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I7c2ffd5ae61310f9a152ca984c4f62152fc1e2e0
Signed-off-by: Per Persson <per.xb.persson@stericsson.com>

Conflicts:

	arch/arm/mach-ux500/board-mop500-mcde.c
	drivers/misc/dispdev/dispdev.c
	include/linux/dispdev.h
---
 arch/arm/mach-ux500/board-mop500-mcde.c | 148 +++++++++++----
 drivers/video/av8100/av8100.c           |  21 ++-
 drivers/video/av8100/hdmi.c             |  84 ++++++++-
 drivers/video/mcde/Kconfig              |   9 +
 drivers/video/mcde/display-av8100.c     | 309 +++++++++++++++++++++++++++++++-
 drivers/video/mcde/mcde_fb.c            |  24 ++-
 include/video/hdmi.h                    |   3 +
 include/video/mcde_display-av8100.h     |  14 ++
 include/video/mcde_display.h            |   6 +-
 include/video/mcde_fb.h                 |   4 +-
 10 files changed, 569 insertions(+), 53 deletions(-)

diff --git a/arch/arm/mach-ux500/board-mop500-mcde.c b/arch/arm/mach-ux500/board-mop500-mcde.c
index 5d8f0f9058b..3826fc5a337 100644
--- a/arch/arm/mach-ux500/board-mop500-mcde.c
+++ b/arch/arm/mach-ux500/board-mop500-mcde.c
@@ -42,8 +42,8 @@ static struct delayed_work work_dispreg_hdmi;
 #define DISPREG_HDMI_DELAY 6000
 #endif
 
-static struct fb_info *fbs[3] = { NULL, NULL, NULL };
-static struct mcde_display_device *displays[3] = { NULL, NULL, NULL };
+#define MCDE_NR_OF_DISPLAYS 3
+static struct mcde_display_device *displays[MCDE_NR_OF_DISPLAYS] = { NULL };
 static int display_initialized_during_boot;
 
 static int __init startup_graphics_setup(char *str)
@@ -91,7 +91,7 @@ static struct mcde_port port0 = {
 	},
 };
 
-struct mcde_display_generic_platform_data mop500_generic_display0_pdata = {
+struct mcde_display_generic_platform_data generic_display0_pdata = {
 	.reset_delay = 1,
 #ifdef CONFIG_REGULATOR
 	.regulator_id = "vaux12v5",
@@ -100,7 +100,7 @@ struct mcde_display_generic_platform_data mop500_generic_display0_pdata = {
 #endif
 };
 
-struct mcde_display_device mop500_generic_display0 = {
+struct mcde_display_device generic_display0 = {
 	.name = "mcde_disp_generic",
 	.id = PRIMARY_DISPLAY_ID,
 	.port = &port0,
@@ -118,7 +118,7 @@ struct mcde_display_device mop500_generic_display0 = {
 	.rotbuf1 = U8500_ESRAM_BASE + 0x20000 * 4,
 	.rotbuf2 = U8500_ESRAM_BASE + 0x20000 * 4 + 0x10000,
 	.dev = {
-		.platform_data = &mop500_generic_display0_pdata,
+		.platform_data = &generic_display0_pdata,
 	},
 };
 #endif /* CONFIG_DISPLAY_GENERIC_DSI_PRIMARY */
@@ -195,7 +195,7 @@ static struct mcde_port port0 = {
 	},
 };
 
-struct mcde_display_dpi_platform_data mop500_generic_display0_pdata = {0};
+struct mcde_display_dpi_platform_data generic_display0_pdata = {0};
 static struct ux500_pins *dpi_pins;
 
 static int dpi_display_platform_enable(struct mcde_display_device *ddev)
@@ -230,7 +230,7 @@ static int dpi_display_platform_disable(struct mcde_display_device *ddev)
 
 }
 
-struct mcde_display_device mop500_generic_display0 = {
+struct mcde_display_device generic_display0 = {
 	.name = "mcde_display_dpi",
 	.id = 0,
 	.port = &port0,
@@ -245,7 +245,7 @@ struct mcde_display_device mop500_generic_display0 = {
 	.native_y_res = 480,
 	/* .synchronized_update: Don't care: port is set to update_auto_trig */
 	.dev = {
-		.platform_data = &mop500_generic_display0_pdata,
+		.platform_data = &generic_display0_pdata,
 	},
 	.platform_enable = dpi_display_platform_enable,
 	.platform_disable = dpi_display_platform_disable,
@@ -413,12 +413,9 @@ struct mcde_display_device av8100_hdmi = {
 
 static void delayed_work_dispreg_hdmi(struct work_struct *ptr)
 {
-	int ret;
-
-	ret = mcde_display_device_register(&av8100_hdmi);
-	if (ret)
+	if (mcde_display_device_register(&av8100_hdmi))
 		pr_warning("Failed to register av8100_hdmi\n");
-	displays[2] = &av8100_hdmi;
+	displays[TERTIARY_DISPLAY_ID] = &av8100_hdmi;
 }
 #endif /* CONFIG_DISPLAY_AV8100_TERTIARY */
 
@@ -432,11 +429,12 @@ static int display_postregistered_callback(struct notifier_block *nb,
 	u16 width, height;
 	u16 virtual_width, virtual_height;
 	u32 rotate = FB_ROTATE_UR;
+	struct fb_info *fbi;
 
 	if (event != MCDE_DSS_EVENT_DISPLAY_REGISTERED)
 		return 0;
 
-	if (ddev->id < PRIMARY_DISPLAY_ID || ddev->id >= ARRAY_SIZE(fbs))
+	if (ddev->id < PRIMARY_DISPLAY_ID || ddev->id >= MCDE_NR_OF_DISPLAYS)
 		return 0;
 
 	mcde_dss_get_native_resolution(ddev, &width, &height);
@@ -474,17 +472,26 @@ static int display_postregistered_callback(struct notifier_block *nb,
 		virtual_height = height;
 #endif
 
-	/* Create frame buffer */
-	fbs[ddev->id] = mcde_fb_create(ddev,
-		width, height,
-		virtual_width, virtual_height,
-		ddev->default_pixel_format,
-		rotate);
-
-	if (IS_ERR(fbs[ddev->id]))
-		pr_warning("Failed to create fb for display %s\n", ddev->name);
-	else
-		pr_info("Framebuffer created (%s)\n", ddev->name);
+	if (ddev->id == TERTIARY_DISPLAY_ID) {
+#ifdef CONFIG_MCDE_DISPLAY_HDMI_FB_AUTO_CREATE
+		hdmi_fb_onoff(ddev, 1, 0, 0);
+#endif /* CONFIG_MCDE_DISPLAY_HDMI_FB_AUTO_CREATE */
+	} else {
+		/* Create frame buffer */
+		fbi = mcde_fb_create(ddev,
+			width, height,
+			virtual_width, virtual_height,
+			ddev->default_pixel_format,
+			rotate);
+
+		if (IS_ERR(fbi))
+			dev_warn(&ddev->dev,
+				"Failed to create fb for display %s\n",
+						ddev->name);
+		else
+			dev_info(&ddev->dev, "Framebuffer created (%s)\n",
+						ddev->name);
+	}
 
 	return 0;
 }
@@ -606,9 +613,9 @@ int __init init_display_devices(void)
 
 #ifdef CONFIG_DISPLAY_GENERIC_PRIMARY
 	if (machine_is_hrefv60())
-		mop500_generic_display0_pdata.reset_gpio = HREFV60_DISP1_RST_GPIO;
+		generic_display0_pdata.reset_gpio = HREFV60_DISP1_RST_GPIO;
 	else
-		mop500_generic_display0_pdata.reset_gpio = MOP500_DISP1_RST_GPIO;
+		generic_display0_pdata.reset_gpio = MOP500_DISP1_RST_GPIO;
 
 #ifdef CONFIG_DISPLAY_GENERIC_DSI_PRIMARY_VSYNC
 	i2c0 = i2c_get_adapter(0);
@@ -622,16 +629,16 @@ int __init init_display_devices(void)
 		i2c_put_adapter(i2c0);
 
 		/* ret == 0 => U8500 UIB connected */
-		mop500_generic_display0.synchronized_update = (ret == 0);
+		generic_display0.synchronized_update = (ret == 0);
 	}
 #endif
 
 	if (display_initialized_during_boot)
-		mop500_generic_display0.power_mode = MCDE_DISPLAY_PM_STANDBY;
-	ret = mcde_display_device_register(&mop500_generic_display0);
+		generic_display0.power_mode = MCDE_DISPLAY_PM_STANDBY;
+	ret = mcde_display_device_register(&generic_display0);
 	if (ret)
 		pr_warning("Failed to register generic display device 0\n");
-	displays[0] = &mop500_generic_display0;
+	displays[0] = &generic_display0;
 #endif
 
 #ifdef CONFIG_DISPLAY_GENERIC_DSI_SECONDARY
@@ -662,6 +669,85 @@ int __init init_display_devices(void)
 	return ret;
 }
 
+struct mcde_display_device *mcde_get_main_display(void)
+{
+#if defined(CONFIG_DISPLAY_GENERIC_DSI_PRIMARY)
+	return &generic_display0;
+#elif defined(CONFIG_DISPLAY_GENERIC_DSI_SECONDARY)
+	return &generic_subdisplay;
+#elif defined(CONFIG_DISPLAY_AV8100_TERTIARY)
+	return &av8100_hdmi;
+#elif defined(CONFIG_DISPLAY_AB8500_TERTIARY)
+	return &tvout_ab8500_display;
+#else
+	return NULL;
+#endif
+}
+EXPORT_SYMBOL(mcde_get_main_display);
+
+void hdmi_fb_onoff(struct mcde_display_device *ddev,
+		bool enable, u8 cea, u8 vesa_cea_nr)
+{
+	struct fb_info *fbi;
+	u16 w, h;
+	u16 vw, vh;
+	u32 rotate = FB_ROTATE_UR;
+	struct display_driver_data *driver_data = dev_get_drvdata(&ddev->dev);
+
+	dev_dbg(&ddev->dev, "%s\n", __func__);
+	dev_dbg(&ddev->dev, "en:%d cea:%d nr:%d\n", enable, cea, vesa_cea_nr);
+
+	if (enable) {
+		if (ddev->enabled) {
+			dev_dbg(&ddev->dev, "Display is already enabled.\n");
+			return;
+		}
+
+		/* Create fb */
+		if (ddev->fbi == NULL) {
+			/* Note: change when dynamic buffering is available */
+			int buffering = 2;
+
+			/* Get default values */
+			mcde_dss_get_native_resolution(ddev, &w, &h);
+			vw = w;
+			vh = h * buffering;
+
+			if (vesa_cea_nr != 0)
+				ddev->ceanr_convert(ddev, cea, vesa_cea_nr,
+						buffering, &w, &h, &vw, &vh);
+
+			fbi = mcde_fb_create(ddev, w, h, vw, vh,
+				ddev->default_pixel_format, rotate);
+
+			if (IS_ERR(fbi)) {
+				dev_warn(&ddev->dev,
+					"Failed to create fb for display %s\n",
+							ddev->name);
+				goto hdmi_fb_onoff_end;
+			} else {
+				dev_info(&ddev->dev,
+					"Framebuffer created (%s)\n",
+							ddev->name);
+			}
+			driver_data->fbdevname = (char *)dev_name(fbi->dev);
+		}
+	} else {
+		if (!ddev->enabled) {
+			dev_dbg(&ddev->dev, "Display %s is already disabled.\n",
+					ddev->name);
+			return;
+		}
+
+		mcde_fb_destroy(ddev);
+	}
+
+hdmi_fb_onoff_end:
+	return;
+}
+EXPORT_SYMBOL(hdmi_fb_onoff);
+
+
 module_init(init_display_devices);
 
 #endif
diff --git a/drivers/video/av8100/av8100.c b/drivers/video/av8100/av8100.c
index f2be10dc15f..3523aaa3e70 100644
--- a/drivers/video/av8100/av8100.c
+++ b/drivers/video/av8100/av8100.c
@@ -1059,10 +1059,7 @@ static void av8100_set_state(enum av8100_operating_mode state)
 {
 	g_av8100_status.av8100_state = state;
 
-	if (state == AV8100_OPMODE_UNDEFINED)
-		g_av8100_status.hdmi_on = false;
-
-	if (state == AV8100_OPMODE_STANDBY) {
+	if (state <= AV8100_OPMODE_STANDBY) {
 		clr_plug_status(AV8100_HDMI_PLUGIN);
 		clr_plug_status(AV8100_CVBS_PLUGIN);
 		g_av8100_status.hdmi_on = false;
@@ -1929,15 +1926,23 @@ static int av8100_powerup2(void)
 
 int av8100_powerup(void)
 {
+	int ret = 0;
+
 	if (av8100_status_get().av8100_state == AV8100_OPMODE_UNDEFINED)
 		return -EINVAL;
 
-	if (av8100_powerup1()) {
-		dev_err(av8100dev, "av8100_powerup1 fail\n");
-		return -EFAULT;
+	if (av8100_status_get().av8100_state < AV8100_OPMODE_STANDBY) {
+		ret = av8100_powerup1();
+		if (ret) {
+			dev_err(av8100dev, "av8100_powerup1 fail\n");
+			return -EFAULT;
+		}
 	}
 
-	return av8100_powerup2();
+	if (av8100_status_get().av8100_state < AV8100_OPMODE_SCAN)
+		ret = av8100_powerup2();
+
+	return ret;
 }
 EXPORT_SYMBOL(av8100_powerup);
 
diff --git a/drivers/video/av8100/hdmi.c b/drivers/video/av8100/hdmi.c
index 66ba66769b8..d502b878024 100644
--- a/drivers/video/av8100/hdmi.c
+++ b/drivers/video/av8100/hdmi.c
@@ -83,6 +83,10 @@ static ssize_t show_plugstatus(struct device *dev,
 		struct device_attribute *attr, char *buf);
 static ssize_t store_poweronoff(struct device *dev,
 		struct device_attribute *attr, const char *buf, size_t count);
+static ssize_t show_poweronoff(struct device *dev,
+		struct device_attribute *attr, char *buf);
+static ssize_t store_evwakeup(struct device *dev,
+		struct device_attribute *attr, const char *buf, size_t count);
 
 static DEVICE_ATTR(storeastext, S_IWUSR, NULL, store_storeastext);
 static DEVICE_ATTR(plugdeten, S_IWUSR, NULL, store_plugdeten);
@@ -104,7 +108,9 @@ static DEVICE_ATTR(evread, S_IRUGO, show_evread, NULL);
 static DEVICE_ATTR(evclr, S_IWUSR, NULL, store_evclr);
 static DEVICE_ATTR(audiocfg, S_IWUSR, NULL, store_audiocfg);
 static DEVICE_ATTR(plugstatus, S_IRUGO, show_plugstatus, NULL);
-static DEVICE_ATTR(poweronoff, S_IWUSR, NULL, store_poweronoff);
+static DEVICE_ATTR(poweronoff, S_IRUGO | S_IWUSR, show_poweronoff,
+		store_poweronoff);
+static DEVICE_ATTR(evwakeup, S_IWUSR, NULL, store_evwakeup);
 
 /* Hex to int conversion */
 static unsigned int htoi(const char *ptr)
@@ -609,6 +615,24 @@ static int events_clear(u8 ev)
 	return 0;
 }
 
+static int event_wakeup(void)
+{
+	struct kobject *kobj = &hdmidev->kobj;
+
+	dev_dbg(hdmidev, "%s", __func__);
+
+	LOCK_HDMI_EVENTS;
+	events |= HDMI_EVENT_WAKEUP;
+	events_received = true;
+	UNLOCK_HDMI_EVENTS;
+
+	/* Wake up application waiting for event via call to poll() */
+	sysfs_notify(kobj, NULL, SYSFS_EVENT_FILENAME);
+	wake_up_interruptible(&hdmi_event_wq);
+
+	return 0;
+}
+
 static int audiocfg(struct audio_cfg *cfg)
 {
 	union av8100_configuration config;
@@ -1615,6 +1639,44 @@ static ssize_t store_poweronoff(struct device *dev,
 	return count;
 }
 
+static ssize_t show_poweronoff(struct device *dev,
+		struct device_attribute *attr, char *buf)
+{
+	struct hdmi_driver_data *hdmi_driver_data;
+	int index = 0;
+	struct av8100_status status;
+	u8 power_state;
+
+	dev_dbg(hdmidev, "%s\n", __func__);
+
+	hdmi_driver_data = dev_get_drvdata(dev);
+
+	status = av8100_status_get();
+	if (status.av8100_state < AV8100_OPMODE_SCAN)
+		power_state = 0;
+	else
+		power_state = 1;
+
+	if (hdmi_driver_data->store_as_hextext) {
+		snprintf(buf + index, 3, "%02x", power_state);
+		index += 3;
+	} else {
+		*(buf + index++) = power_state;
+	}
+
+	return index;
+}
+
+static ssize_t store_evwakeup(struct device *dev,
+		struct device_attribute *attr, const char *buf, size_t count)
+{
+	dev_dbg(hdmidev, "%s\n", __func__);
+
+	event_wakeup();
+
+	return count;
+}
+
 static int hdmi_open(struct inode *inode, struct file *filp)
 {
 	if (device_open)
@@ -1916,6 +1978,21 @@ ioc_hdcploadaes_err:
 		}
 		break;
 
+	case IOC_EVENT_WAKEUP:
+		/* Trigger event */
+		event_wakeup();
+		break;
+
+	case IOC_POWERSTATE:
+		status = av8100_status_get();
+		value = status.av8100_state >= AV8100_OPMODE_SCAN;
+
+		if (copy_to_user((void *)arg, (void *)&value,
+						sizeof(u8))) {
+			return -EINVAL;
+		}
+		break;
+
 	/* Internal */
 	case IOC_HDMI_ENABLE_INTERRUPTS:
 		av8100_disable_interrupt();
@@ -2087,10 +2164,12 @@ void hdmi_event(enum av8100_hdmi_event ev)
 	/* Set event */
 	switch (ev) {
 	case AV8100_HDMI_EVENT_HDMI_PLUGIN:
+		events &= ~HDMI_EVENT_HDMI_PLUGOUT;
 		events |= events_mask & HDMI_EVENT_HDMI_PLUGIN;
 		break;
 
 	case AV8100_HDMI_EVENT_HDMI_PLUGOUT:
+		events &= ~HDMI_EVENT_HDMI_PLUGIN;
 		events |= events_mask & HDMI_EVENT_HDMI_PLUGOUT;
 		break;
 
@@ -2190,6 +2269,8 @@ int __init hdmi_init(void)
 		dev_info(hdmidev, "Unable to create plugstatus attribute\n");
 	if (device_create_file(hdmidev, &dev_attr_poweronoff))
 		dev_info(hdmidev, "Unable to create poweronoff attribute\n");
+	if (device_create_file(hdmidev, &dev_attr_evwakeup))
+		dev_info(hdmidev, "Unable to create evwakeup attribute\n");
 
 	/* Register event callback */
 	av8100_hdmi_event_cb_set(hdmi_event);
@@ -2224,6 +2305,7 @@ void hdmi_exit(void)
 	device_remove_file(hdmidev, &dev_attr_audiocfg);
 	device_remove_file(hdmidev, &dev_attr_plugstatus);
 	device_remove_file(hdmidev, &dev_attr_poweronoff);
+	device_remove_file(hdmidev, &dev_attr_evwakeup);
 
 	hdmi_driver_data = dev_get_drvdata(hdmidev);
 	kfree(hdmi_driver_data);
diff --git a/drivers/video/mcde/Kconfig b/drivers/video/mcde/Kconfig
index c97387a97ed..a1310332cf9 100644
--- a/drivers/video/mcde/Kconfig
+++ b/drivers/video/mcde/Kconfig
@@ -44,6 +44,15 @@ config MCDE_DISPLAY_AV8100
 	depends on FB_MCDE
 	select AV8100
 
+config MCDE_DISPLAY_HDMI_FB_AUTO_CREATE
+	bool "HDMI_FB_AUTO_CREATE"
+	default y
+	depends on MCDE_DISPLAY_AV8100
+	---help---
+	  Say Y if you want the HDMI frame buffer to be created on start
+	  Say N if you want the HDMI frame buffer to be created when HDMI
+	  cable is plugged (needs user space HDMIservice)
+
 config MCDE_DISPLAY_AB8500_DENC
 	tristate "AB8500 CVBS display driver"
 	depends on FB_MCDE
diff --git a/drivers/video/mcde/display-av8100.c b/drivers/video/mcde/display-av8100.c
index 84818a558fc..5d400a9958e 100644
--- a/drivers/video/mcde/display-av8100.c
+++ b/drivers/video/mcde/display-av8100.c
@@ -24,10 +24,10 @@
 
 #define SWITCH_HELPSTR ", 0=HDMI, 1=SDTV, 2=DVI\n"
 
-struct display_driver_data {
-	struct regulator *cvbs_regulator;
-	bool cvbs_regulator_enabled;
-	bool update_port_pixel_format;
+struct cea_vesa_video_mode {
+	u32 cea;
+	u32 vesa_cea_nr;
+	struct mcde_video_mode *video_mode;
 };
 
 static int hdmi_try_video_mode(
@@ -36,6 +36,8 @@ static int hdmi_set_video_mode(
 	struct mcde_display_device *ddev, struct mcde_video_mode *video_mode);
 static int hdmi_set_pixel_format(
 	struct mcde_display_device *ddev, enum mcde_ovly_pix_fmt format);
+static struct mcde_video_mode *video_mode_get(struct mcde_display_device *ddev,
+		u8 cea, u8 vesa_cea_nr);
 
 static ssize_t show_hdmisdtvswitch(struct device *dev,
 		struct device_attribute *attr, char *buf);
@@ -45,6 +47,23 @@ static ssize_t show_input_pixel_format(struct device *dev,
 		struct device_attribute *attr, char *buf);
 static ssize_t store_input_pixel_format(struct device *dev,
 		struct device_attribute *attr, const char *buf, size_t count);
+static ssize_t show_disponoff(struct device *dev,
+		struct device_attribute *attr, char *buf);
+static ssize_t store_disponoff(struct device *dev,
+		struct device_attribute *attr, const char *buf, size_t count);
+static ssize_t show_vesacea(struct device *dev,
+		struct device_attribute *attr, char *buf);
+static ssize_t show_timing(struct device *dev,
+		struct device_attribute *attr, char *buf);
+static ssize_t store_timing(struct device *dev,
+		struct device_attribute *attr, const char *buf, size_t count);
+static ssize_t store_stayalive(struct device *dev,
+		struct device_attribute *attr, const char *buf, size_t count);
+static DEVICE_ATTR(disponoff, S_IRUGO | S_IWUSR, show_disponoff,
+		store_disponoff);
+static DEVICE_ATTR(vesacea, S_IRUGO, show_vesacea, NULL);
+static DEVICE_ATTR(timing, S_IRUGO | S_IWUSR, show_timing, store_timing);
+static DEVICE_ATTR(stayalive, S_IWUSR, NULL, store_stayalive);
 
 static DEVICE_ATTR(hdmisdtvswitch, S_IRUGO | S_IWUSR, show_hdmisdtvswitch,
 			store_hdmisdtvswitch);
@@ -137,6 +156,134 @@ static ssize_t store_input_pixel_format(struct device *dev,
 	return count;
 }
 
+static ssize_t show_disponoff(struct device *dev,
+		struct device_attribute *attr, char *buf)
+{
+	struct mcde_display_device *ddev = to_mcde_display_device(dev);
+	struct display_driver_data *driver_data = dev_get_drvdata(&ddev->dev);
+
+	dev_dbg(dev, "%s\n", __func__);
+
+	if (ddev->fbi && driver_data->fbdevname) {
+		dev_dbg(dev, "name:%s\n", driver_data->fbdevname);
+		strcpy(buf, driver_data->fbdevname);
+		return strlen(driver_data->fbdevname) + 1;
+	}
+	return 0;
+}
+
+static ssize_t store_disponoff(struct device *dev,
+		struct device_attribute *attr, const char *buf, size_t count)
+{
+	struct mcde_display_device *mdev = to_mcde_display_device(dev);
+	bool enable = false;
+	u8 cea = 0;
+	u8 vesa_cea_nr = 0;
+
+	dev_dbg(dev, "%s\n", __func__);
+
+	if ((count != DISPONOFF_SIZE) && (count != DISPONOFF_SIZE + 1))
+		return -EINVAL;
+
+	if ((*buf == '0') && (*(buf + 1) == '1'))
+		enable = true;
+	cea = (hex_to_bin(buf[2]) << 4) + hex_to_bin(buf[3]);
+	vesa_cea_nr = (hex_to_bin(buf[4]) << 4) + hex_to_bin(buf[5]);
+	dev_dbg(dev, "enable:%d cea:%d nr:%d\n", enable, cea, vesa_cea_nr);
+
+	hdmi_fb_onoff(mdev, enable, cea, vesa_cea_nr);
+
+	return count;
+}
+
+static ssize_t show_timing(struct device *dev,
+		struct device_attribute *attr, char *buf)
+{
+	struct mcde_display_device *ddev = to_mcde_display_device(dev);
+	struct display_driver_data *driver_data = dev_get_drvdata(&ddev->dev);
+	struct mcde_video_mode *video_mode;
+	int index;
+
+	dev_dbg(dev, "%s\n", __func__);
+
+	index = 0;
+	if (driver_data->video_mode) {
+		video_mode = driver_data->video_mode;
+		memcpy(buf + index, &video_mode->xres, sizeof(u32));
+		index += sizeof(u32);
+		memcpy(buf + index, &video_mode->yres, sizeof(u32));
+		index += sizeof(u32);
+		memcpy(buf + index, &video_mode->pixclock, sizeof(u32));
+		index += sizeof(u32);
+		memcpy(buf + index, &video_mode->hbp, sizeof(u32));
+		index += sizeof(u32);
+		memcpy(buf + index, &video_mode->hfp, sizeof(u32));
+		index += sizeof(u32);
+		memcpy(buf + index, &video_mode->vbp, sizeof(u32));
+		index += sizeof(u32);
+		memcpy(buf + index, &video_mode->vfp, sizeof(u32));
+		index += sizeof(u32);
+		memcpy(buf + index, &video_mode->interlaced, sizeof(u32));
+		index += sizeof(u32);
+	}
+	return index;
+}
+
+static ssize_t store_timing(struct device *dev,
+		struct device_attribute *attr, const char *buf, size_t count)
+{
+	struct mcde_display_device *ddev = to_mcde_display_device(dev);
+	struct display_driver_data *driver_data = dev_get_drvdata(&ddev->dev);
+
+	dev_dbg(dev, "%s\n", __func__);
+
+	if (count != TIMING_SIZE)
+		return -EINVAL;
+
+	driver_data->video_mode = video_mode_get(ddev, *buf, *(buf + 1));
+
+	return count;
+}
+
+static ssize_t store_stayalive(struct device *dev,
+		struct device_attribute *attr, const char *buf, size_t count)
+{
+	struct mcde_display_device *ddev = to_mcde_display_device(dev);
+
+	if (count != STAYALIVE_SIZE)
+		return -EINVAL;
+
+	if ((*buf == 1) || (*buf == '1'))
+		ddev->stay_alive = true;
+	else
+		ddev->stay_alive = false;
+
+	dev_dbg(dev, "%s %d\n", __func__, ddev->stay_alive);
+
+	return count;
+}
+
+static int ceanr_convert(struct mcde_display_device *ddev,
+		u8 cea, u8 vesa_cea_nr, int buffering,
+		u16 *w, u16 *h, u16 *vw, u16 *vh)
+{
+	struct mcde_video_mode *video_mode;
+
+	dev_dbg(&ddev->dev, "%s\n", __func__);
+	video_mode = video_mode_get(ddev, cea, vesa_cea_nr);
+	if (video_mode) {
+		*w = video_mode->xres;
+		*h = video_mode->yres;
+		*vw = video_mode->xres;
+		*vh = video_mode->yres * buffering;
+		dev_dbg(&ddev->dev, "cea:%d nr:%d found\n",
+				cea, vesa_cea_nr);
+		return 0;
+	}
+
+	return -EINVAL;
+}
+
 /* Supported HDMI modes */
 static struct mcde_video_mode video_modes_supp_hdmi[] = {
 	/* 640_480_60_P */
@@ -249,6 +396,124 @@ static struct mcde_video_mode video_modes_supp_sdtv[] = {
 	},
 };
 
+static struct cea_vesa_video_mode cea_vesa_video_mode[] = {
+		/* 640_480_60_P */
+		{
+			.cea = 1,	.vesa_cea_nr = 1,
+			.video_mode = &video_modes_supp_hdmi[0],
+		},
+		/* 720_480_60_P */
+		{
+			.cea = 1,	.vesa_cea_nr = 2,
+			.video_mode = &video_modes_supp_hdmi[1],
+		},
+		/* 720_480_60_P */
+		{
+			.cea = 1,	.vesa_cea_nr = 3,
+			.video_mode = &video_modes_supp_hdmi[1],
+		},
+		/* 720_576_50_P */
+		{
+			.cea = 1,	.vesa_cea_nr = 17,
+			.video_mode = &video_modes_supp_hdmi[2],
+		},
+		/* 720_576_50_P */
+		{
+			.cea = 1,	.vesa_cea_nr = 18,
+			.video_mode = &video_modes_supp_hdmi[2],
+		},
+		/* 1280_720_60_P */
+		{
+			.cea = 1,	.vesa_cea_nr = 4,
+			.video_mode = &video_modes_supp_hdmi[3],
+		},
+		/* 1280_720_50_P */
+		{
+			.cea = 1,	.vesa_cea_nr = 19,
+			.video_mode = &video_modes_supp_hdmi[4],
+		},
+		/* 1920_1080_30_P */
+		{
+			.cea = 1,	.vesa_cea_nr = 34,
+			.video_mode = &video_modes_supp_hdmi[5],
+		},
+		/* 1920_1080_24_P */
+		{
+			.cea = 1,	.vesa_cea_nr = 32,
+			.video_mode = &video_modes_supp_hdmi[6],
+		},
+		/* 1920_1080_25_P */
+		{
+			.cea = 1,	.vesa_cea_nr = 33,
+			.video_mode = &video_modes_supp_hdmi[7],
+		},
+		/* 720_480_60_I) */
+		{
+			.cea = 1,	.vesa_cea_nr = 6,
+			.video_mode = &video_modes_supp_hdmi[8],
+		},
+		/* 720_480_60_I) */
+		{
+			.cea = 1,	.vesa_cea_nr = 7,
+			.video_mode = &video_modes_supp_hdmi[8],
+		},
+		/* 720_576_50_I) */
+		{
+			.cea = 1,	.vesa_cea_nr = 21,
+			.video_mode = &video_modes_supp_hdmi[9],
+		},
+		/* 720_576_50_I) */
+		{
+			.cea = 1,	.vesa_cea_nr = 22,
+			.video_mode = &video_modes_supp_hdmi[9],
+		},
+		/* 1920_1080_50_I) */
+		{
+			.cea = 1,	.vesa_cea_nr = 20,
+			.video_mode = &video_modes_supp_hdmi[10],
+		},
+		/* 1920_1080_60_I) */
+		{
+			.cea = 1,	.vesa_cea_nr = 5,
+			.video_mode = &video_modes_supp_hdmi[11],
+		},
+};
+
+static ssize_t show_vesacea(struct device *dev,
+		struct device_attribute *attr, char *buf)
+{
+	int findex;
+
+	dev_dbg(dev, "%s\n", __func__);
+
+	for (findex = 0; findex < ARRAY_SIZE(cea_vesa_video_mode); findex++) {
+		*(buf + findex * 2) = cea_vesa_video_mode[findex].cea;
+		*(buf + findex * 2 + 1) =
+				cea_vesa_video_mode[findex].vesa_cea_nr;
+	}
+	*(buf + findex * 2) = '\0';
+
+	return findex * 2 + 1;
+}
+
+static struct mcde_video_mode *video_mode_get(struct mcde_display_device *ddev,
+		u8 cea, u8 vesa_cea_nr)
+{
+	int findex;
+
+	dev_dbg(&ddev->dev, "%s\n", __func__);
+
+	for (findex = 0; findex < ARRAY_SIZE(cea_vesa_video_mode); findex++)
+		if ((cea == cea_vesa_video_mode[findex].cea) &&
+				(vesa_cea_nr ==
+				cea_vesa_video_mode[findex].vesa_cea_nr)) {
+			dev_dbg(&ddev->dev, "cea:%d nr:%d\n", cea, vesa_cea_nr);
+			return cea_vesa_video_mode[findex].video_mode;
+		}
+
+	return NULL;
+}
+
 #define AV8100_MAX_LEVEL 255
 
 static int hdmi_try_video_mode(
@@ -445,17 +710,20 @@ static int hdmi_set_video_mode(
 			dev_err(&dev->dev, "av8100_powerup failed\n");
 			return ret;
 		}
+	}
 
+	if (status.av8100_state < AV8100_OPMODE_IDLE) {
 		ret = av8100_download_firmware(NULL, 0, I2C_INTERFACE);
 		if (ret) {
 			dev_err(&dev->dev, "av8100_download_firmware failed\n");
 			av8100_powerdown();
 			return ret;
 		}
-	} else if (av8100_disable_interrupt()) {
-		return -EFAULT;
 	}
 
+	if (av8100_disable_interrupt())
+		return -EFAULT;
+
 	/*
 	 * Don't look at dev->port->hdmi_sdtv_switch; it states only which
 	 * one should be started, not which one is currently working
@@ -817,6 +1085,14 @@ static int hdmi_set_power_mode(struct mcde_display_device *ddev,
 			if (ret)
 				return ret;
 		}
+
+		ret = av8100_powerup();
+		if (ret) {
+			dev_err(&ddev->dev, "av8100_powerup failed\n");
+			return ret;
+		}
+		av8100_enable_interrupt();
+
 		/*
 		 * the regulator for analog TV out is only enabled here,
 		 * this means that one needs to switch to the OFF state
@@ -907,14 +1183,27 @@ static int __devinit hdmi_probe(struct mcde_display_device *dev)
 	dev->apply_config = hdmi_apply_config;
 	dev->set_pixel_format = hdmi_set_pixel_format;
 	dev->set_power_mode = hdmi_set_power_mode;
+	dev->ceanr_convert = ceanr_convert;
 
-	/* Create sysfs file for switching between hdmi and sdtv */
+	/* Create sysfs files */
 	if (device_create_file(&dev->dev, &dev_attr_hdmisdtvswitch))
 		dev_info(&dev->dev,
 			"Unable to create hdmisdtvswitch attr\n");
 	if (device_create_file(&dev->dev, &dev_attr_input_pixel_format))
 		dev_info(&dev->dev,
 			"Unable to create input_pixel_format attr\n");
+	if (device_create_file(&dev->dev, &dev_attr_disponoff))
+		dev_info(&dev->dev,
+			"Unable to create disponoff attr\n");
+	if (device_create_file(&dev->dev, &dev_attr_vesacea))
+		dev_info(&dev->dev,
+			"Unable to create ceavesa attr\n");
+	if (device_create_file(&dev->dev, &dev_attr_timing))
+		dev_info(&dev->dev,
+			"Unable to create timing attr\n");
+	if (device_create_file(&dev->dev, &dev_attr_stayalive))
+		dev_info(&dev->dev,
+			"Unable to create stayalive attr\n");
 
 	if (pdata->cvbs_regulator_id) {
 		driver_data->cvbs_regulator = regulator_get(&dev->dev,
@@ -944,9 +1233,13 @@ static int __devexit hdmi_remove(struct mcde_display_device *dev)
 	struct mcde_display_hdmi_platform_data *pdata =
 		dev->dev.platform_data;
 
-	/* Remove sysfs file */
+	/* Remove sysfs files */
 	device_remove_file(&dev->dev, &dev_attr_input_pixel_format);
 	device_remove_file(&dev->dev, &dev_attr_hdmisdtvswitch);
+	device_remove_file(&dev->dev, &dev_attr_disponoff);
+	device_remove_file(&dev->dev, &dev_attr_vesacea);
+	device_remove_file(&dev->dev, &dev_attr_timing);
+	device_remove_file(&dev->dev, &dev_attr_stayalive);
 
 	dev->set_power_mode(dev, MCDE_DISPLAY_PM_OFF);
 
diff --git a/drivers/video/mcde/mcde_fb.c b/drivers/video/mcde/mcde_fb.c
index a0c7d21a3fc..039a60ad05c 100644
--- a/drivers/video/mcde/mcde_fb.c
+++ b/drivers/video/mcde/mcde_fb.c
@@ -203,6 +203,7 @@ static int init_var_fmt(struct fb_var_screeninfo *var,
 	var->yoffset = 0;
 	var->activate = FB_ACTIVATE_NOW;
 	var->rotate = rotate;
+
 	return 0;
 };
 
@@ -668,6 +669,8 @@ struct fb_info *mcde_fb_create(struct mcde_display_device *ddev,
 	if (ret)
 		goto fb_register_failed;
 
+	ddev->fbi = fbi;
+
 #ifdef CONFIG_HAS_EARLYSUSPEND
 	mfb->early_suspend.level =
 				EARLY_SUSPEND_LEVEL_DISABLE_FB;
@@ -702,9 +705,26 @@ int mcde_fb_attach_overlay(struct fb_info *fb_info, struct mcde_overlay *ovl)
 	return -EINVAL;
 }
 
-void mcde_fb_destroy(struct fb_info *fb_info)
+void mcde_fb_destroy(struct mcde_display_device *dev)
 {
-	/* TODO: clean up */
+	struct mcde_fb *mfb;
+	int i;
+
+	dev_vdbg(&dev->dev, "%s\n", __func__);
+
+	mcde_dss_disable_display(dev);
+	mcde_dss_close_channel(dev);
+
+	mfb = to_mcde_fb(dev->fbi);
+	for (i = 0; i < mfb->num_ovlys; i++) {
+		if (mfb->ovlys[i])
+			mcde_dss_destroy_overlay(mfb->ovlys[i]);
+	}
+
+	unregister_framebuffer(dev->fbi);
+	free_fb_mem(dev->fbi);
+	framebuffer_release(dev->fbi);
+	dev->fbi = NULL;
 }
 
 /* Overlay fbs' platform device */
diff --git a/include/video/hdmi.h b/include/video/hdmi.h
index 18a8e34bd67..0a4dd723486 100644
--- a/include/video/hdmi.h
+++ b/include/video/hdmi.h
@@ -86,6 +86,8 @@
 #define IOC_AUDIO_CFG			_IOWR(HDMI_IOC_MAGIC, 15, int)
 #define IOC_PLUG_STATUS			_IOWR(HDMI_IOC_MAGIC, 16, int)
 #define IOC_POWERONOFF			_IOWR(HDMI_IOC_MAGIC, 17, int)
+#define IOC_EVENT_WAKEUP		_IOWR(HDMI_IOC_MAGIC, 18, int)
+#define IOC_POWERSTATE			_IOWR(HDMI_IOC_MAGIC, 19, int)
 
 
 /* HDMI driver */
@@ -100,6 +102,7 @@ enum hdmi_event {
 	HDMI_EVENT_CEC =		0x4,
 	HDMI_EVENT_HDCP =		0x8,
 	HDMI_EVENT_CECTXERR =		0x10,
+	HDMI_EVENT_WAKEUP =		0x20,
 };
 
 enum hdmi_hdcp_auth_type {
diff --git a/include/video/mcde_display-av8100.h b/include/video/mcde_display-av8100.h
index c508ebf1f17..b0bbc02c1f8 100644
--- a/include/video/mcde_display-av8100.h
+++ b/include/video/mcde_display-av8100.h
@@ -20,6 +20,9 @@
 #define NATIVE_YRES_HDMI	720
 #define NATIVE_XRES_SDTV	720
 #define NATIVE_YRES_SDTV	576
+#define DISPONOFF_SIZE		6
+#define TIMING_SIZE		2
+#define STAYALIVE_SIZE		1
 
 struct mcde_display_hdmi_platform_data {
 	/* Platform info */
@@ -36,4 +39,15 @@ struct mcde_display_hdmi_platform_data {
 	struct regulator *regulator;
 };
 
+struct display_driver_data {
+	struct regulator *cvbs_regulator;
+	bool cvbs_regulator_enabled;
+	bool update_port_pixel_format;
+	char *fbdevname;
+	struct mcde_video_mode *video_mode;
+};
+
+void hdmi_fb_onoff(struct mcde_display_device *ddev, bool enable,
+				u8 cea, u8 vesa_cea_nr);
+
 #endif /* __DISPLAY_AV8100__H__ */
diff --git a/include/video/mcde_display.h b/include/video/mcde_display.h
index aa184cb6162..69ff1de4ef2 100644
--- a/include/video/mcde_display.h
+++ b/include/video/mcde_display.h
@@ -29,6 +29,7 @@ struct mcde_display_device {
 	const char       *name;
 	int               id;
 	struct mcde_port *port;
+	struct fb_info   *fbi;
 
 	/* MCDE dss driver internal */
 	bool initialized;
@@ -56,6 +57,7 @@ struct mcde_display_device {
 	bool synchronized_update;
 	struct mcde_video_mode video_mode;
 	int update_flags;
+	bool stay_alive;
 
 	/* Driver API */
 	void (*get_native_resolution)(struct mcde_display_device *dev,
@@ -76,7 +78,6 @@ struct mcde_display_device {
 		struct mcde_video_mode *video_mode);
 	void (*get_video_mode)(struct mcde_display_device *dev,
 		struct mcde_video_mode *video_mode);
-
 	int (*set_pixel_format)(struct mcde_display_device *dev,
 		enum mcde_ovly_pix_fmt pix_fmt);
 	enum mcde_ovly_pix_fmt (*get_pixel_format)(
@@ -102,6 +103,9 @@ struct mcde_display_device {
 	int (*on_first_update)(struct mcde_display_device *dev);
 	int (*platform_enable)(struct mcde_display_device *dev);
 	int (*platform_disable)(struct mcde_display_device *dev);
+	int (*ceanr_convert)(struct mcde_display_device *ddev,
+			u8 cea, u8 vesa_cea_nr, int buffering,
+			u16 *w, u16 *h, u16 *vw, u16 *vh);
 };
 
 struct mcde_display_driver {
diff --git a/include/video/mcde_fb.h b/include/video/mcde_fb.h
index 60d8b244688..17556414aa0 100644
--- a/include/video/mcde_fb.h
+++ b/include/video/mcde_fb.h
@@ -50,11 +50,11 @@ struct mcde_fb {
 /* MCDE fbdev API */
 struct fb_info *mcde_fb_create(struct mcde_display_device *ddev,
 		uint16_t w, uint16_t h, uint16_t vw, uint16_t vh,
-		enum mcde_ovly_pix_fmt pix_fmt,	uint32_t rotate);
+		enum mcde_ovly_pix_fmt pix_fmt, uint32_t rotate);
 
 int mcde_fb_attach_overlay(struct fb_info *fb_info,
 	struct mcde_overlay *ovl);
-void mcde_fb_destroy(struct fb_info *fb_info);
+void mcde_fb_destroy(struct mcde_display_device *ddev);
 
 /* MCDE fb driver */
 int mcde_fb_init(void);
-- 
cgit v1.2.3


From d2f19e5a3d56d36e736283dec3dd47190f294d11 Mon Sep 17 00:00:00 2001
From: Philippe Langlais <philippe.langlais@stericsson.com>
Date: Wed, 12 Oct 2011 15:31:49 +0200
Subject: video: av8100: Add HDMI support for U5500

This patch adds support for HDMI on S5500 devices.
Trig method I2SDAT3 is used.

ST-Ericsson ID: 254484
ST-Ericsson Linux next: Not tested, ER 282779
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: Iddda36e2c03bf09641800e652040aae104f27e27
Signed-off-by: Jimmy Rubin <jimmy.rubin@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/21580
Reviewed-by: QATOOLS
Reviewed-by: QATEST
Reviewed-by: Jonas ABERG <jonas.aberg@stericsson.com>
---
 arch/arm/mach-ux500/Kconfig-arch       |   2 +-
 arch/arm/mach-ux500/board-u5500-mcde.c | 198 ++++++++++++++++++++++++++++++---
 drivers/video/av8100/av8100.c          |  12 +-
 drivers/video/mcde/mcde_hw.c           |  13 ++-
 include/video/av8100.h                 |   1 +
 5 files changed, 194 insertions(+), 32 deletions(-)

diff --git a/arch/arm/mach-ux500/Kconfig-arch b/arch/arm/mach-ux500/Kconfig-arch
index 596399284ad..cfdf0ea1265 100644
--- a/arch/arm/mach-ux500/Kconfig-arch
+++ b/arch/arm/mach-ux500/Kconfig-arch
@@ -138,7 +138,7 @@ config DISPLAY_AB8500_TERTIARY
 
 config DISPLAY_AV8100_TERTIARY
 	bool "AV8100 HDMI/CVBS display support"
-	depends on MACH_U8500
+	depends on (MACH_U8500_MOP || MACH_U5500)
 	select MCDE_DISPLAY_AV8100
 	help
 	  Say yes here if HDMI output support
diff --git a/arch/arm/mach-ux500/board-u5500-mcde.c b/arch/arm/mach-ux500/board-u5500-mcde.c
index 5570f5fd990..2568b0cf183 100644
--- a/arch/arm/mach-ux500/board-u5500-mcde.c
+++ b/arch/arm/mach-ux500/board-u5500-mcde.c
@@ -10,18 +10,30 @@
 #include <linux/kernel.h>
 #include <linux/gpio.h>
 #include <linux/delay.h>
+#include <video/av8100.h>
 #include <asm/mach-types.h>
 #include <video/mcde_display.h>
 #include <video/mcde_display-generic_dsi.h>
+#include <video/mcde_display-av8100.h>
 #include <video/mcde_fb.h>
 #include <video/mcde_dss.h>
 
 #define DSI_UNIT_INTERVAL_0	0xA
+#define DSI_UNIT_INTERVAL_2	0x5
+
 #define PRIMARY_DISPLAY_ID	0
+#define TERTIARY_DISPLAY_ID	1
 
 #ifdef CONFIG_FB_MCDE
-static struct fb_info *fbs[2] = { NULL, NULL };
-static struct mcde_display_device *displays[2] = { NULL, NULL };
+
+/* The initialization of hdmi disp driver must be delayed in order to
+ * ensure that inputclk will be available (needed by hdmi hw) */
+#ifdef CONFIG_DISPLAY_AV8100_TERTIARY
+static struct delayed_work work_dispreg_hdmi;
+#define DISPREG_HDMI_DELAY 6000
+#endif
+
+#define MCDE_NR_OF_DISPLAYS 2
 static int display_initialized_during_boot;
 
 static int __init startup_graphics_setup(char *str)
@@ -74,7 +86,7 @@ struct mcde_display_generic_platform_data u5500_generic_display0_pdata = {
 	.reset_delay = 10,
 	.sleep_out_delay = 140,
 #ifdef CONFIG_REGULATOR
-	.regulator_id = "ldo-h",
+	.regulator_id = "v-display",
 	.min_supply_voltage = 2500000, /* 2.5V */
 	.max_supply_voltage = 2700000 /* 2.7V */
 #endif
@@ -107,6 +119,78 @@ struct mcde_display_device u5500_generic_display0 = {
 };
 #endif /* CONFIG_DISPLAY_GENERIC_DSI_PRIMARY */
 
+#ifdef CONFIG_DISPLAY_AV8100_TERTIARY
+static struct mcde_port port2 = {
+	.type = MCDE_PORTTYPE_DSI,
+	.mode = MCDE_PORTMODE_CMD,
+	.pixel_format = MCDE_PORTPIXFMT_DSI_24BPP,
+	.ifc = DSI_VIDEO_MODE,
+	.link = 1,
+#ifdef CONFIG_AV8100_HWTRIG_INT
+	.sync_src = MCDE_SYNCSRC_TE0,
+#endif
+#ifdef CONFIG_AV8100_HWTRIG_I2SDAT3
+	.sync_src = MCDE_SYNCSRC_TE1,
+#endif
+#ifdef CONFIG_AV8100_HWTRIG_DSI_TE
+	.sync_src = MCDE_SYNCSRC_TE_POLLING,
+#endif
+#ifdef CONFIG_AV8100_HWTRIG_NONE
+	.sync_src = MCDE_SYNCSRC_OFF,
+#endif
+	.update_auto_trig = true,
+	.phy = {
+		.dsi = {
+			.virt_id = 0,
+			.num_data_lanes = 2,
+			.ui = DSI_UNIT_INTERVAL_2,
+			.clk_cont = false,
+			.data_lanes_swap = false,
+		},
+	},
+	.hdmi_sdtv_switch = HDMI_SWITCH,
+};
+
+struct mcde_display_hdmi_platform_data av8100_hdmi_pdata = {
+	.reset_gpio = 0,
+	.reset_delay = 1,
+	.regulator_id = NULL,
+	.cvbs_regulator_id = "v-av8100-AV-switch",
+	.ddb_id = 1,
+	.rgb_2_yCbCr_transform = {
+		.matrix = {
+			{0x42, 0x81, 0x19},
+			{0xffda, 0xffb6, 0x70},
+			{0x70, 0xffa2, 0xffee},
+		},
+		.offset = {0x80, 0x10, 0x80},
+	}
+};
+
+struct mcde_display_device av8100_hdmi = {
+	.name = "av8100_hdmi",
+	.id = TERTIARY_DISPLAY_ID,
+	.port = &port2,
+	.chnl_id = MCDE_CHNL_B,
+	.fifo = MCDE_FIFO_B,
+	.default_pixel_format = MCDE_OVLYPIXFMT_RGB565,
+	.native_x_res = 1280,
+	.native_y_res = 720,
+	.synchronized_update = false,
+	.dev = {
+		.platform_data = &av8100_hdmi_pdata,
+	},
+	.platform_enable = NULL,
+	.platform_disable = NULL,
+};
+
+static void delayed_work_dispreg_hdmi(struct work_struct *ptr)
+{
+	if (mcde_display_device_register(&av8100_hdmi))
+		pr_warning("Failed to register av8100_hdmi\n");
+}
+#endif /* CONFIG_DISPLAY_AV8100_TERTIARY */
+
 /*
 * This function will create the framebuffer for the display that is registered.
 */
@@ -117,11 +201,12 @@ static int display_postregistered_callback(struct notifier_block *nb,
 	u16 width, height;
 	u16 virtual_width, virtual_height;
 	u32 rotate = FB_ROTATE_UR;
+	struct fb_info *fbi;
 
 	if (event != MCDE_DSS_EVENT_DISPLAY_REGISTERED)
 		return 0;
 
-	if (ddev->id < PRIMARY_DISPLAY_ID || ddev->id >= ARRAY_SIZE(fbs))
+	if (ddev->id < PRIMARY_DISPLAY_ID || ddev->id >= MCDE_NR_OF_DISPLAYS)
 		return 0;
 
 	mcde_dss_get_native_resolution(ddev, &width, &height);
@@ -154,18 +239,26 @@ static int display_postregistered_callback(struct notifier_block *nb,
 		virtual_height = height;
 #endif
 
-	/* Create frame buffer */
-	fbs[ddev->id] = mcde_fb_create(ddev,
-		width, height,
-		virtual_width, virtual_height,
-		ddev->default_pixel_format,
-		rotate);
-
-	if (IS_ERR(fbs[ddev->id]))
-		dev_warn(&ddev->dev, "Failed to create fb for display %s\n",
-								ddev->name);
-	else
-		dev_info(&ddev->dev, "Framebuffer created (%s)\n", ddev->name);
+	if (ddev->id == TERTIARY_DISPLAY_ID) {
+#ifdef CONFIG_MCDE_DISPLAY_HDMI_FB_AUTO_CREATE
+		hdmi_fb_onoff(ddev, 1, 0, 0);
+#endif /* CONFIG_MCDE_DISPLAY_HDMI_FB_AUTO_CREATE */
+	} else {
+		/* Create frame buffer */
+		fbi = mcde_fb_create(ddev,
+			width, height,
+			virtual_width, virtual_height,
+			ddev->default_pixel_format,
+			rotate);
+
+		if (IS_ERR(fbi))
+			dev_warn(&ddev->dev,
+				"Failed to create fb for display %s\n",
+						ddev->name);
+		else
+			dev_info(&ddev->dev, "Framebuffer created (%s)\n",
+						ddev->name);
+	}
 
 	return 0;
 }
@@ -286,10 +379,79 @@ int __init init_display_devices_u5500(void)
 	ret = mcde_display_device_register(&u5500_generic_display0);
 	if (ret)
 		pr_warning("Failed to register generic display device 0\n");
-	displays[0] = &u5500_generic_display0;
 #endif
+
+#ifdef CONFIG_DISPLAY_AV8100_TERTIARY
+	INIT_DELAYED_WORK_DEFERRABLE(&work_dispreg_hdmi,
+			delayed_work_dispreg_hdmi);
+
+	schedule_delayed_work(&work_dispreg_hdmi,
+			msecs_to_jiffies(DISPREG_HDMI_DELAY));
+#endif
+
 	return ret;
 }
 
-module_init(init_display_devices_u5500);
+void hdmi_fb_onoff(struct mcde_display_device *ddev,
+		bool enable, u8 cea, u8 vesa_cea_nr)
+{
+	struct fb_info *fbi;
+	u16 w, h;
+	u16 vw, vh;
+	u32 rotate = FB_ROTATE_UR;
+	struct display_driver_data *driver_data = dev_get_drvdata(&ddev->dev);
+
+	dev_dbg(&ddev->dev, "%s\n", __func__);
+	dev_dbg(&ddev->dev, "en:%d cea:%d nr:%d\n", enable, cea, vesa_cea_nr);
+
+	if (enable) {
+		if (ddev->enabled) {
+			dev_dbg(&ddev->dev, "Display is already enabled.\n");
+			return;
+		}
+
+		/* Create fb */
+		if (ddev->fbi == NULL) {
+			/* Note: change when dynamic buffering is available */
+			int buffering = 2;
+
+			/* Get default values */
+			mcde_dss_get_native_resolution(ddev, &w, &h);
+			vw = w;
+			vh = h * buffering;
+
+			if (vesa_cea_nr != 0)
+				ddev->ceanr_convert(ddev, cea, vesa_cea_nr,
+						buffering, &w, &h, &vw, &vh);
+
+			fbi = mcde_fb_create(ddev, w, h, vw, vh,
+				ddev->default_pixel_format, rotate);
+
+			if (IS_ERR(fbi)) {
+				dev_warn(&ddev->dev,
+					"Failed to create fb for display %s\n",
+							ddev->name);
+				goto hdmi_fb_onoff_end;
+			} else {
+				dev_info(&ddev->dev,
+					"Framebuffer created (%s)\n",
+							ddev->name);
+			}
+			driver_data->fbdevname = (char *)dev_name(fbi->dev);
+		}
+	} else {
+		if (!ddev->enabled) {
+			dev_dbg(&ddev->dev, "Display %s is already disabled.\n",
+					ddev->name);
+			return;
+		}
+		mcde_fb_destroy(ddev);
+	}
+
+hdmi_fb_onoff_end:
+	return;
+}
+EXPORT_SYMBOL(hdmi_fb_onoff);
+
+module_init(init_display_devices);
 #endif
diff --git a/drivers/video/av8100/av8100.c b/drivers/video/av8100/av8100.c
index 3523aaa3e70..d1d77b3bf16 100644
--- a/drivers/video/av8100/av8100.c
+++ b/drivers/video/av8100/av8100.c
@@ -118,11 +118,6 @@
 #define MCLK_RNG_76_93	13
 #define MCLK_RNG_85_104	14
 #define MCLK_RNG_94_115	15
-/*
- *  Until there is an API for obtaining the input master clock
- *  frequency, the register value is hard coded.
- */
-#define MCLK_FREQ	MCLK_RNG_31_38
 
 DEFINE_MUTEX(av8100_hw_mutex);
 #define LOCK_AV8100_HW mutex_lock(&av8100_hw_mutex)
@@ -1831,7 +1826,7 @@ static int av8100_powerup1(void)
 		udelay(AV8100_WATTIME_100US);
 
 		retval = av8100_reg_stby_w(AV8100_STANDBY_CPD_LOW,
-				AV8100_STANDBY_STBY_HIGH, MCLK_FREQ);
+				AV8100_STANDBY_STBY_HIGH, pdata->mclk_freq);
 		if (retval) {
 			dev_err(av8100dev, "%s reg_wr err 3\n", __func__);
 			goto av8100_powerup1_err;
@@ -1840,7 +1835,7 @@ static int av8100_powerup1(void)
 		msleep(AV8100_WAITTIME_1MS);
 
 		retval = av8100_reg_stby_w(AV8100_STANDBY_CPD_LOW,
-				AV8100_STANDBY_STBY_LOW, MCLK_FREQ);
+				AV8100_STANDBY_STBY_LOW, pdata->mclk_freq);
 		if (retval) {
 			dev_err(av8100dev, "%s reg_wr err 4\n", __func__);
 			goto av8100_powerup1_err;
@@ -1894,10 +1889,11 @@ av8100_powerup1_err:
 static int av8100_powerup2(void)
 {
 	int retval;
+	struct av8100_platform_data *pdata = av8100dev->platform_data;
 
 	/* Master clock timing, running, search for plug */
 	retval = av8100_reg_stby_w(AV8100_STANDBY_CPD_HIGH,
-		AV8100_STANDBY_STBY_HIGH, MCLK_FREQ);
+		AV8100_STANDBY_STBY_HIGH, pdata->mclk_freq);
 	if (retval) {
 		dev_err(av8100dev,
 			"Failed to write the value to av8100 register\n");
diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index 0ffba918e53..7a0208df66e 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -2329,13 +2329,16 @@ static void chnl_update_continous(struct mcde_chnl_state *chnl)
 	if (!chnl->continous_running) {
 		if (chnl->transactionid_regs < chnl->transactionid)
 			chnl_update_registers(chnl);
-		if (chnl->port.sync_src == MCDE_SYNCSRC_TE0)
+		if (chnl->port.sync_src == MCDE_SYNCSRC_TE0) {
 			mcde_wfld(MCDE_CRC, SYCEN0, true);
-		else if (chnl->port.sync_src == MCDE_SYNCSRC_TE1) {
-			if (hardware_version == MCDE_CHIP_VERSION_3_0_8)
+		 } else if (chnl->port.sync_src == MCDE_SYNCSRC_TE1) {
+			if (hardware_version == MCDE_CHIP_VERSION_3_0_8) {
 				mcde_wfld(MCDE_VSCRC1, VSSEL, 1);
-
-			mcde_wfld(MCDE_CRC, SYCEN1, true);
+				mcde_wfld(MCDE_CRC, SYCEN1, true);
+			} else {
+				mcde_wfld(MCDE_VSCRC1, VSSEL, 0);
+				mcde_wfld(MCDE_CRC, SYCEN0, true);
+			}
 		}
 		chnl->continous_running = true;
 
diff --git a/include/video/av8100.h b/include/video/av8100.h
index 5225490420c..6f59cee5b70 100644
--- a/include/video/av8100.h
+++ b/include/video/av8100.h
@@ -25,6 +25,7 @@ struct av8100_platform_data {
 	const char	*inputclk_id;
 	const char	*regulator_pwr_id;
 	bool		alt_powerupseq;
+	unsigned char	mclk_freq;
 };
 
 enum av8100_error {
-- 
cgit v1.2.3


From 8c07839b5579caa069801923df99ed4ac62b08b0 Mon Sep 17 00:00:00 2001
From: Philippe Langlais <philippe.langlais@stericsson.com>
Date: Wed, 19 Oct 2011 14:23:16 +0200
Subject: mach-ux500: framebuffer: Changes to be able to compile with u5500 and
 u8500 both enable

Move mcde fb common part in devices-common.c

Signed-off-by: Philippe Langlais <philippe.langlais@linaro.org>
---
 arch/arm/mach-ux500/board-mop500-mcde.c | 67 +--------------------------------
 arch/arm/mach-ux500/board-mop500-mcde.h |  8 ----
 arch/arm/mach-ux500/board-u5500-mcde.c  | 67 ++-------------------------------
 3 files changed, 5 insertions(+), 137 deletions(-)

diff --git a/arch/arm/mach-ux500/board-mop500-mcde.c b/arch/arm/mach-ux500/board-mop500-mcde.c
index 3826fc5a337..bc7d596d88f 100644
--- a/arch/arm/mach-ux500/board-mop500-mcde.c
+++ b/arch/arm/mach-ux500/board-mop500-mcde.c
@@ -378,7 +378,7 @@ static struct mcde_port port2 = {
 	.hdmi_sdtv_switch = HDMI_SWITCH,
 };
 
-struct mcde_display_hdmi_platform_data av8100_hdmi_pdata = {
+static struct mcde_display_hdmi_platform_data av8100_hdmi_pdata = {
 	.reset_gpio = 0,
 	.reset_delay = 1,
 	.regulator_id = NULL, /* TODO: "display_main" */
@@ -394,7 +394,7 @@ struct mcde_display_hdmi_platform_data av8100_hdmi_pdata = {
 	}
 };
 
-struct mcde_display_device av8100_hdmi = {
+static struct mcde_display_device av8100_hdmi = {
 	.name = "av8100_hdmi",
 	.id = TERTIARY_DISPLAY_ID,
 	.port = &port2,
@@ -685,69 +685,6 @@ struct mcde_display_device *mcde_get_main_display(void)
 }
 EXPORT_SYMBOL(mcde_get_main_display);
 
-void hdmi_fb_onoff(struct mcde_display_device *ddev,
-		bool enable, u8 cea, u8 vesa_cea_nr)
-{
-	struct fb_info *fbi;
-	u16 w, h;
-	u16 vw, vh;
-	u32 rotate = FB_ROTATE_UR;
-	struct display_driver_data *driver_data = dev_get_drvdata(&ddev->dev);
-
-	dev_dbg(&ddev->dev, "%s\n", __func__);
-	dev_dbg(&ddev->dev, "en:%d cea:%d nr:%d\n", enable, cea, vesa_cea_nr);
-
-	if (enable) {
-		if (ddev->enabled) {
-			dev_dbg(&ddev->dev, "Display is already enabled.\n");
-			return;
-		}
-
-		/* Create fb */
-		if (ddev->fbi == NULL) {
-			/* Note: change when dynamic buffering is available */
-			int buffering = 2;
-
-			/* Get default values */
-			mcde_dss_get_native_resolution(ddev, &w, &h);
-			vw = w;
-			vh = h * buffering;
-
-			if (vesa_cea_nr != 0)
-				ddev->ceanr_convert(ddev, cea, vesa_cea_nr,
-						buffering, &w, &h, &vw, &vh);
-
-			fbi = mcde_fb_create(ddev, w, h, vw, vh,
-				ddev->default_pixel_format, rotate);
-
-			if (IS_ERR(fbi)) {
-				dev_warn(&ddev->dev,
-					"Failed to create fb for display %s\n",
-							ddev->name);
-				goto hdmi_fb_onoff_end;
-			} else {
-				dev_info(&ddev->dev,
-					"Framebuffer created (%s)\n",
-							ddev->name);
-			}
-			driver_data->fbdevname = (char *)dev_name(fbi->dev);
-		}
-	} else {
-		if (!ddev->enabled) {
-			dev_dbg(&ddev->dev, "Display %s is already disabled.\n",
-					ddev->name);
-			return;
-		}
-
-		mcde_fb_destroy(ddev);
-	}
-
-hdmi_fb_onoff_end:
-	return;
-}
-EXPORT_SYMBOL(hdmi_fb_onoff);
-
-
 module_init(init_display_devices);
 
 #endif
diff --git a/arch/arm/mach-ux500/board-mop500-mcde.h b/arch/arm/mach-ux500/board-mop500-mcde.h
index 38094b81b34..66447c95828 100644
--- a/arch/arm/mach-ux500/board-mop500-mcde.h
+++ b/arch/arm/mach-ux500/board-mop500-mcde.h
@@ -13,12 +13,4 @@
 
 #include <video/mcde_display.h>
 
-#ifdef CONFIG_DISPLAY_AB8500_TERTIARY
-extern struct mcde_display_device tvout_ab8500_display;
-#endif
-
-#ifdef CONFIG_DISPLAY_AV8100_TERTIARY
-extern struct mcde_display_device av8100_hdmi;
-#endif
-
 #endif /* __BOARD_MOP500_MCDE_H */
diff --git a/arch/arm/mach-ux500/board-u5500-mcde.c b/arch/arm/mach-ux500/board-u5500-mcde.c
index 2568b0cf183..eba695e5ed5 100644
--- a/arch/arm/mach-ux500/board-u5500-mcde.c
+++ b/arch/arm/mach-ux500/board-u5500-mcde.c
@@ -151,7 +151,7 @@ static struct mcde_port port2 = {
 	.hdmi_sdtv_switch = HDMI_SWITCH,
 };
 
-struct mcde_display_hdmi_platform_data av8100_hdmi_pdata = {
+static struct mcde_display_hdmi_platform_data av8100_hdmi_pdata = {
 	.reset_gpio = 0,
 	.reset_delay = 1,
 	.regulator_id = NULL,
@@ -167,7 +167,7 @@ struct mcde_display_hdmi_platform_data av8100_hdmi_pdata = {
 	}
 };
 
-struct mcde_display_device av8100_hdmi = {
+static struct mcde_display_device av8100_hdmi = {
 	.name = "av8100_hdmi",
 	.id = TERTIARY_DISPLAY_ID,
 	.port = &port2,
@@ -392,66 +392,5 @@ int __init init_display_devices_u5500(void)
 	return ret;
 }
 
-void hdmi_fb_onoff(struct mcde_display_device *ddev,
-		bool enable, u8 cea, u8 vesa_cea_nr)
-{
-	struct fb_info *fbi;
-	u16 w, h;
-	u16 vw, vh;
-	u32 rotate = FB_ROTATE_UR;
-	struct display_driver_data *driver_data = dev_get_drvdata(&ddev->dev);
-
-	dev_dbg(&ddev->dev, "%s\n", __func__);
-	dev_dbg(&ddev->dev, "en:%d cea:%d nr:%d\n", enable, cea, vesa_cea_nr);
-
-	if (enable) {
-		if (ddev->enabled) {
-			dev_dbg(&ddev->dev, "Display is already enabled.\n");
-			return;
-		}
-
-		/* Create fb */
-		if (ddev->fbi == NULL) {
-			/* Note: change when dynamic buffering is available */
-			int buffering = 2;
-
-			/* Get default values */
-			mcde_dss_get_native_resolution(ddev, &w, &h);
-			vw = w;
-			vh = h * buffering;
-
-			if (vesa_cea_nr != 0)
-				ddev->ceanr_convert(ddev, cea, vesa_cea_nr,
-						buffering, &w, &h, &vw, &vh);
-
-			fbi = mcde_fb_create(ddev, w, h, vw, vh,
-				ddev->default_pixel_format, rotate);
-
-			if (IS_ERR(fbi)) {
-				dev_warn(&ddev->dev,
-					"Failed to create fb for display %s\n",
-							ddev->name);
-				goto hdmi_fb_onoff_end;
-			} else {
-				dev_info(&ddev->dev,
-					"Framebuffer created (%s)\n",
-							ddev->name);
-			}
-			driver_data->fbdevname = (char *)dev_name(fbi->dev);
-		}
-	} else {
-		if (!ddev->enabled) {
-			dev_dbg(&ddev->dev, "Display %s is already disabled.\n",
-					ddev->name);
-			return;
-		}
-		mcde_fb_destroy(ddev);
-	}
-
-hdmi_fb_onoff_end:
-	return;
-}
-EXPORT_SYMBOL(hdmi_fb_onoff);
-
-module_init(init_display_devices);
+module_init(init_display_devices_u5500);
 #endif
-- 
cgit v1.2.3


From 3fd14c064eb8300e73380e3f99a42938fa8913d3 Mon Sep 17 00:00:00 2001
From: Philippe Langlais <philippe.langlais@linaro.org>
Date: Wed, 11 May 2011 10:04:48 +0200
Subject: video: mcde: Add tripple buffer support

This patch adds tripple buffer support to the mcde
driver. Useful for video mode devices (e.g. HDMI)
where a missed v-sync leads to half frame rate
(the client has to wait for the next v-sync).
Tripple buffering solves this problem since there
are two back buffers the client can use.

Tripple buffering for HDMI is activated in
menuconfig by enabling:
System Type -> Display selection -> Enable tripple
buffer for HDMI display

ST-Ericsson ID: 335004
ST-Ericsson Linux next: Not tested, ER 282779
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: Ice1f936a8a00e2fbc8fdf7e8c6621c539efe0ac4
Signed-off-by: Jimmy Rubin <jimmy.rubin@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/21839
Reviewed-by: QATOOLS
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
Reviewed-by: QATEST
Reviewed-by: Marcel TUNNISSEN <marcel.tuennissen@stericsson.com>

Conflicts:

	arch/arm/configs/u8500_defconfig
	drivers/misc/dispdev/dispdev.c
---
 arch/arm/mach-ux500/Kconfig-arch        |  6 ++++++
 arch/arm/mach-ux500/board-mop500-mcde.c |  6 ++++++
 drivers/video/mcde/mcde_display.c       |  8 +++++---
 drivers/video/mcde/mcde_dss.c           |  5 ++---
 drivers/video/mcde/mcde_fb.c            |  5 ++++-
 drivers/video/mcde/mcde_hw.c            | 29 ++++++++++++++++++-----------
 include/video/mcde.h                    |  3 ++-
 include/video/mcde_display.h            |  2 +-
 include/video/mcde_dss.h                |  2 +-
 9 files changed, 45 insertions(+), 21 deletions(-)

diff --git a/arch/arm/mach-ux500/Kconfig-arch b/arch/arm/mach-ux500/Kconfig-arch
index cfdf0ea1265..d16bf788392 100644
--- a/arch/arm/mach-ux500/Kconfig-arch
+++ b/arch/arm/mach-ux500/Kconfig-arch
@@ -143,6 +143,12 @@ config DISPLAY_AV8100_TERTIARY
 	help
 	  Say yes here if HDMI output support
 
+config DISPLAY_AV8100_TRIPPLE_BUFFER
+	bool "Enable tripple buffer for HDMI display"
+	depends on DISPLAY_AV8100_TERTIARY
+	help
+	  Say yes to enable tripple buffer. You'll get double buffer otherwise
+
 endmenu
 
 endif
diff --git a/arch/arm/mach-ux500/board-mop500-mcde.c b/arch/arm/mach-ux500/board-mop500-mcde.c
index bc7d596d88f..edf603dd0ce 100644
--- a/arch/arm/mach-ux500/board-mop500-mcde.c
+++ b/arch/arm/mach-ux500/board-mop500-mcde.c
@@ -462,6 +462,7 @@ static int display_postregistered_callback(struct notifier_block *nb,
 
 	virtual_width = width;
 	virtual_height = height * 2;
+
 #ifdef CONFIG_DISPLAY_GENERIC_DSI_PRIMARY_AUTO_SYNC
 	if (ddev->id == PRIMARY_DISPLAY_ID)
 		virtual_height = height;
@@ -472,6 +473,11 @@ static int display_postregistered_callback(struct notifier_block *nb,
 		virtual_height = height;
 #endif
 
+#ifdef CONFIG_DISPLAY_AV8100_TRIPPLE_BUFFER
+	if (ddev->id == TERTIARY_DISPLAY_ID)
+		virtual_height = height * 3;
+#endif
+
 	if (ddev->id == TERTIARY_DISPLAY_ID) {
 #ifdef CONFIG_MCDE_DISPLAY_HDMI_FB_AUTO_CREATE
 		hdmi_fb_onoff(ddev, 1, 0, 0);
diff --git a/drivers/video/mcde/mcde_display.c b/drivers/video/mcde/mcde_display.c
index 521446dc26f..144a1a67d02 100644
--- a/drivers/video/mcde/mcde_display.c
+++ b/drivers/video/mcde/mcde_display.c
@@ -328,9 +328,10 @@ static int mcde_display_invalidate_area_default(
 	return 0;
 }
 
-static int mcde_display_update_default(struct mcde_display_device *ddev)
+static int mcde_display_update_default(struct mcde_display_device *ddev,
+							bool tripple_buffer)
 {
-	int ret;
+	int ret = 0;
 
 	/* TODO: Dirty */
 	if (ddev->prepare_for_update) {
@@ -344,7 +345,8 @@ static int mcde_display_update_default(struct mcde_display_device *ddev)
 		}
 	}
 	/* TODO: Calculate & set update rect */
-	ret = mcde_chnl_update(ddev->chnl_state, &ddev->update_area);
+	ret = mcde_chnl_update(ddev->chnl_state, &ddev->update_area,
+							tripple_buffer);
 	if (ret < 0) {
 		dev_warn(&ddev->dev, "%s:Failed to update channel\n", __func__);
 		return ret;
diff --git a/drivers/video/mcde/mcde_dss.c b/drivers/video/mcde/mcde_dss.c
index a53040f48e1..361510b46fc 100644
--- a/drivers/video/mcde/mcde_dss.c
+++ b/drivers/video/mcde/mcde_dss.c
@@ -242,10 +242,9 @@ void mcde_dss_disable_overlay(struct mcde_overlay *ovly)
 }
 EXPORT_SYMBOL(mcde_dss_disable_overlay);
 
-int mcde_dss_update_overlay(struct mcde_overlay *ovly)
+int mcde_dss_update_overlay(struct mcde_overlay *ovly, bool tripple_buffer)
 {
 	int ret;
-
 	dev_vdbg(&ovly->ddev->dev, "Overlay update, chnl=%d\n",
 							ovly->ddev->chnl_id);
 
@@ -256,7 +255,7 @@ int mcde_dss_update_overlay(struct mcde_overlay *ovly)
 	if (ovly->ddev->get_power_mode(ovly->ddev) == MCDE_DISPLAY_PM_OFF)
 		return 0;
 
-	ret = ovly->ddev->update(ovly->ddev);
+	ret = ovly->ddev->update(ovly->ddev, tripple_buffer);
 	if (ret)
 		return ret;
 
diff --git a/drivers/video/mcde/mcde_fb.c b/drivers/video/mcde/mcde_fb.c
index 039a60ad05c..dc0812761c7 100644
--- a/drivers/video/mcde/mcde_fb.c
+++ b/drivers/video/mcde/mcde_fb.c
@@ -507,10 +507,13 @@ static int apply_var(struct fb_info *fbi, struct mcde_display_device *ddev)
 	for (i = 0; i < mfb->num_ovlys; i++) {
 		struct mcde_overlay *ovly = mfb->ovlys[i];
 		struct mcde_overlay_info info;
+		int num_buffers;
 
 		get_ovly_info(fbi, ovly, &info);
 		(void) mcde_dss_apply_overlay(ovly, &info);
-		ret = mcde_dss_update_overlay(ovly);
+
+		num_buffers = var->yres_virtual / var->yres;
+		mcde_dss_update_overlay(ovly, num_buffers == 3);
 	}
 
 	return 0;
diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index 7a0208df66e..9844dc1b2f7 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -964,18 +964,19 @@ static irqreturn_t mcde_irq_handler(int irq, void *dev)
 static void wait_for_channel(struct mcde_chnl_state *chnl)
 {
 	int ret;
+	u32 id = chnl->transactionid_regs;
 
-	if (chnl->transactionid_hw >= chnl->transactionid_regs)
+	if (chnl->transactionid_hw >= id)
 		return;
 
 	ret = wait_event_timeout(chnl->waitq_hw,
-		chnl->transactionid_hw == chnl->transactionid_regs,
+		chnl->transactionid_hw == id,
 		msecs_to_jiffies(CHNL_TIMEOUT));
 	if (!ret)
 		dev_warn(&mcde_dev->dev,
 			"Wait for channel timeout (chnl=%d,%d<%d)!\n",
 			chnl->id, chnl->transactionid_hw,
-			chnl->transactionid_regs);
+			id);
 }
 
 static int update_channel_static_registers(struct mcde_chnl_state *chnl)
@@ -2318,12 +2319,14 @@ static void chnl_update_registers(struct mcde_chnl_state *chnl)
 	chnl->transactionid_regs = chnl->transactionid;
 }
 
-static void chnl_update_continous(struct mcde_chnl_state *chnl)
+static void chnl_update_continous(struct mcde_chnl_state *chnl,
+						bool tripple_buffer)
 {
 
 	if (chnl->continous_running) {
 		chnl->transactionid_regs = chnl->transactionid;
-		wait_for_channel(chnl);
+		if (!tripple_buffer)
+			wait_for_channel(chnl);
 	}
 
 	if (!chnl->continous_running) {
@@ -2410,7 +2413,8 @@ static void chnl_update_overlay(struct mcde_chnl_state *chnl,
 }
 
 static int _mcde_chnl_update(struct mcde_chnl_state *chnl,
-					struct mcde_rectangle *update_area)
+					struct mcde_rectangle *update_area,
+					bool tripple_buffer)
 {
 	dev_vdbg(&mcde_dev->dev, "%s\n", __func__);
 
@@ -2420,6 +2424,9 @@ static int _mcde_chnl_update(struct mcde_chnl_state *chnl,
 		return -EINVAL;
 	}
 
+	if (chnl->port.update_auto_trig && tripple_buffer)
+		wait_for_channel(chnl);
+
 	chnl->regs.x   = update_area->x;
 	chnl->regs.y   = update_area->y;
 	/* TODO Crop against video_mode.xres and video_mode.yres */
@@ -2439,7 +2446,7 @@ static int _mcde_chnl_update(struct mcde_chnl_state *chnl,
 	chnl_update_overlay(chnl, chnl->ovly1);
 
 	if (chnl->port.update_auto_trig)
-		chnl_update_continous(chnl);
+		chnl_update_continous(chnl, tripple_buffer);
 	else
 		chnl_update_non_continous(chnl);
 
@@ -2608,10 +2615,10 @@ int mcde_chnl_apply(struct mcde_chnl_state *chnl)
 }
 
 int mcde_chnl_update(struct mcde_chnl_state *chnl,
-					struct mcde_rectangle *update_area)
+					struct mcde_rectangle *update_area,
+					bool tripple_buffer)
 {
 	int ret;
-
 	dev_vdbg(&mcde_dev->dev, "%s\n", __func__);
 
 	if (!chnl->reserved)
@@ -2623,7 +2630,6 @@ int mcde_chnl_update(struct mcde_chnl_state *chnl,
 		(void)update_channel_static_registers(chnl);
 
 	if (chnl->regs.roten && !chnl->esram_is_enabled) {
-		int ret;
 		ret = regulator_enable(chnl->port.reg_esram);
 		if (ret < 0) {
 			dev_warn(&mcde_dev->dev, "%s: disable failed\n",
@@ -2632,7 +2638,8 @@ int mcde_chnl_update(struct mcde_chnl_state *chnl,
 		chnl->esram_is_enabled = true;
 	}
 
-	ret = _mcde_chnl_update(chnl, update_area);
+	ret = _mcde_chnl_update(chnl, update_area, tripple_buffer);
+
 	mutex_unlock(&mcde_hw_lock);
 
 	dev_vdbg(&mcde_dev->dev, "%s exit with ret %d\n", __func__, ret);
diff --git a/include/video/mcde.h b/include/video/mcde.h
index ef828f0d560..4803779b36f 100644
--- a/include/video/mcde.h
+++ b/include/video/mcde.h
@@ -332,7 +332,8 @@ int mcde_chnl_set_power_mode(struct mcde_chnl_state *chnl,
 
 int mcde_chnl_apply(struct mcde_chnl_state *chnl);
 int mcde_chnl_update(struct mcde_chnl_state *chnl,
-					struct mcde_rectangle *update_area);
+			struct mcde_rectangle *update_area,
+			bool tripple_buffer);
 void mcde_chnl_put(struct mcde_chnl_state *chnl);
 
 void mcde_chnl_stop_flow(struct mcde_chnl_state *chnl);
diff --git a/include/video/mcde_display.h b/include/video/mcde_display.h
index 69ff1de4ef2..524e62904fc 100644
--- a/include/video/mcde_display.h
+++ b/include/video/mcde_display.h
@@ -97,7 +97,7 @@ struct mcde_display_device {
 	int (*apply_config)(struct mcde_display_device *dev);
 	int (*invalidate_area)(struct mcde_display_device *dev,
 						struct mcde_rectangle *area);
-	int (*update)(struct mcde_display_device *dev);
+	int (*update)(struct mcde_display_device *dev, bool tripple_buffer);
 	int (*prepare_for_update)(struct mcde_display_device *dev,
 		u16 x, u16 y, u16 w, u16 h);
 	int (*on_first_update)(struct mcde_display_device *dev);
diff --git a/include/video/mcde_dss.h b/include/video/mcde_dss.h
index 6a149a5dee6..c2603b87235 100644
--- a/include/video/mcde_dss.h
+++ b/include/video/mcde_dss.h
@@ -30,7 +30,7 @@ int mcde_dss_enable_overlay(struct mcde_overlay *ovl);
 void mcde_dss_disable_overlay(struct mcde_overlay *ovl);
 int mcde_dss_apply_overlay(struct mcde_overlay *ovl,
 						struct mcde_overlay_info *info);
-int mcde_dss_update_overlay(struct mcde_overlay *ovl);
+int mcde_dss_update_overlay(struct mcde_overlay *ovl, bool tripple_buffer);
 
 void mcde_dss_get_native_resolution(struct mcde_display_device *ddev,
 	u16 *x_res, u16 *y_res);
-- 
cgit v1.2.3


From 36141cc87ae125571daa3f75eba12b0add041f23 Mon Sep 17 00:00:00 2001
From: Philippe Langlais <philippe.langlais@linaro.org>
Date: Wed, 11 May 2011 10:49:52 +0200
Subject: mcde: Fix after adding tripple buffer support

Signed-off-by: Philippe Langlais <philippe.langlais@linaro.org>
---
 drivers/video/mcde/display-ab8500.c      | 7 ++++---
 drivers/video/mcde/display-av8100.c      | 2 +-
 drivers/video/mcde/display-generic_dsi.c | 2 +-
 3 files changed, 6 insertions(+), 5 deletions(-)

diff --git a/drivers/video/mcde/display-ab8500.c b/drivers/video/mcde/display-ab8500.c
index 8b932d3d8d2..bd6126d8a20 100644
--- a/drivers/video/mcde/display-ab8500.c
+++ b/drivers/video/mcde/display-ab8500.c
@@ -75,7 +75,7 @@ static int set_video_mode(struct mcde_display_device *ddev,
 static int set_power_mode(struct mcde_display_device *ddev,
 				enum mcde_display_power_mode power_mode);
 static int on_first_update(struct mcde_display_device *ddev);
-static int display_update(struct mcde_display_device *ddev);
+static int display_update(struct mcde_display_device *ddev, bool tripple_buf);
 
 static int __devinit ab8500_probe(struct mcde_display_device *ddev)
 {
@@ -447,7 +447,7 @@ static int on_first_update(struct mcde_display_device *ddev)
 	return 0;
 }
 
-static int display_update(struct mcde_display_device *ddev)
+static int display_update(struct mcde_display_device *ddev, bool tripple_buffer)
 {
 	int ret;
 
@@ -458,7 +458,8 @@ static int display_update(struct mcde_display_device *ddev)
 		if (ret < 0)
 			goto error;
 	}
-	ret = mcde_chnl_update(ddev->chnl_state, &ddev->update_area);
+	ret = mcde_chnl_update(ddev->chnl_state, &ddev->update_area,
+			tripple_buffer);
 	if (ret < 0)
 		goto error;
 out:
diff --git a/drivers/video/mcde/display-av8100.c b/drivers/video/mcde/display-av8100.c
index 5d400a9958e..1deda75068f 100644
--- a/drivers/video/mcde/display-av8100.c
+++ b/drivers/video/mcde/display-av8100.c
@@ -1269,7 +1269,7 @@ static int hdmi_resume(struct mcde_display_device *ddev)
 		dev_warn(&ddev->dev, "%s:Failed to resume display\n"
 			, __func__);
 
-	ddev->update(ddev);
+	ddev->update(ddev, 0);
 	return ret;
 }
 
diff --git a/drivers/video/mcde/display-generic_dsi.c b/drivers/video/mcde/display-generic_dsi.c
index 452da92f64a..c45885312af 100644
--- a/drivers/video/mcde/display-generic_dsi.c
+++ b/drivers/video/mcde/display-generic_dsi.c
@@ -246,7 +246,7 @@ static int generic_resume(struct mcde_display_device *ddev)
 			, __func__);
 	ddev->set_synchronized_update(ddev,
 					ddev->get_synchronized_update(ddev));
-	ddev->update(ddev);
+	ddev->update(ddev, 0);
 	return ret;
 }
 
-- 
cgit v1.2.3


From aed4ab72a4528e2fef04841d89f61c2510aba0c7 Mon Sep 17 00:00:00 2001
From: Johan Mossberg <johan.xx.mossberg@stericsson.com>
Date: Thu, 5 May 2011 16:42:46 +0200
Subject: MCDE: Use fifo A for main display

When DDR is clocked down to 25% the main display starts flickering.
When using the larger fifo A for the main display this problem goes
away.

ST-Ericsson ID: 338515

ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: Ie488e4839d94f26818439a13042b202dcdd98833
Signed-off-by: Johan Mossberg <johan.xx.mossberg@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/22462
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Reviewed-by: Linus WALLEIJ <linus.walleij@stericsson.com>
---
 arch/arm/mach-ux500/board-mop500-mcde.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-ux500/board-mop500-mcde.c b/arch/arm/mach-ux500/board-mop500-mcde.c
index edf603dd0ce..ce32ae71b4b 100644
--- a/arch/arm/mach-ux500/board-mop500-mcde.c
+++ b/arch/arm/mach-ux500/board-mop500-mcde.c
@@ -105,7 +105,11 @@ struct mcde_display_device generic_display0 = {
 	.id = PRIMARY_DISPLAY_ID,
 	.port = &port0,
 	.chnl_id = MCDE_CHNL_A,
-	.fifo = MCDE_FIFO_C0,
+	/*
+	 * A large fifo is needed when ddr is clocked down to 25% to not get
+	 * latency problems.
+	 */
+	.fifo = MCDE_FIFO_A,
 #ifdef CONFIG_MCDE_DISPLAY_PRIMARY_16BPP
 	.default_pixel_format = MCDE_OVLYPIXFMT_RGB565,
 #else
-- 
cgit v1.2.3


From 48a466e4ad2c752b3c42b12fd2e83b4f6ef639db Mon Sep 17 00:00:00 2001
From: Marcel Tunnissen <Marcel.Tuennissen@stericsson.com>
Date: Mon, 2 May 2011 16:28:16 +0200
Subject: video: av8100: Fix YUV port setting from startup

Fixes the problem that configuring the YUV 422 port pixel format for
AV8100 doesn't work from start up. The problem is that the function
hdmi_set_pixel_format doesn't really set up the FB pixel format.

ST-Ericsson ID: 338206
ST-Ericsson Linux next: Not tested, ER 282779
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: Ib5a7d3379c5853ea08c27fe94eae788c456c36ce
Signed-off-by: Marcel Tunnissen <Marcel.Tuennissen@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/22273
Tested-by: Marcel TUNNISSEN <marcel.tuennissen@stericsson.com>
Reviewed-by: QATOOLS
Reviewed-by: QATEST
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Reviewed-by: Linus WALLEIJ <linus.walleij@stericsson.com>
---
 drivers/video/mcde/display-av8100.c | 15 ++++++++++++---
 1 file changed, 12 insertions(+), 3 deletions(-)

diff --git a/drivers/video/mcde/display-av8100.c b/drivers/video/mcde/display-av8100.c
index 1deda75068f..a28edbc9217 100644
--- a/drivers/video/mcde/display-av8100.c
+++ b/drivers/video/mcde/display-av8100.c
@@ -947,18 +947,25 @@ static u16 map_u(u8 in)
 
 static int hdmi_set_pixel_format(
 	struct mcde_display_device *ddev, enum mcde_ovly_pix_fmt format)
+{
+	dev_dbg(&ddev->dev, "%s\n", __func__);
+	ddev->pixel_format = format;
+
+	return 0;
+}
+
+static int hdmi_set_port_pixel_format(struct mcde_display_device *ddev)
 {
 	int ret;
 
 	dev_dbg(&ddev->dev, "%s\n", __func__);
-	ddev->pixel_format = format;
 	mcde_chnl_stop_flow(ddev->chnl_state);
 	ret = mcde_chnl_set_pixel_format(ddev->chnl_state,
 						ddev->port->pixel_format);
 
 	if (ret < 0) {
-		dev_warn(&ddev->dev, "%s:Failed to set pixel format = %d\n",
-							__func__, format);
+		dev_warn(&ddev->dev, "%s: Failed to set pixel format = %d\n",
+					__func__, ddev->port->pixel_format);
 		return ret;
 	}
 
@@ -1105,6 +1112,8 @@ static int hdmi_set_power_mode(struct mcde_display_device *ddev,
 			driver_data->cvbs_regulator_enabled = true;
 		}
 		ddev->power_mode = MCDE_DISPLAY_PM_STANDBY;
+
+		hdmi_set_port_pixel_format(ddev);
 	}
 	/* STANDBY -> ON */
 	if (ddev->power_mode == MCDE_DISPLAY_PM_STANDBY &&
-- 
cgit v1.2.3


From a7839e60b6871819a8064bdf0be330797749251a Mon Sep 17 00:00:00 2001
From: Philippe Langlais <philippe.langlais@linaro.org>
Date: Wed, 11 May 2011 14:17:18 +0200
Subject: video: mcde: Change color convert offset fields

This patch changes the order of the color convert offset in such a way
that they make more sense when setting up the color convert for a
specific platform. Now the offsets are in line with the order in the
multiplication matrix.

ST-Ericsson ID: 338207
ST-Ericsson Linux next: Not tested, ER 282779
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: Ia39ca4ac52e5c21ff32739de207f0445aaf0e25c
Signed-off-by: Marcel Tunnissen <Marcel.Tuennissen@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/22274
Tested-by: Marcel TUNNISSEN <marcel.tuennissen@stericsson.com>
Reviewed-by: QATEST
Reviewed-by: Linus WALLEIJ <linus.walleij@stericsson.com>

Conflicts:

	arch/arm/mach-ux500/board-pdp-mcde.c
---
 arch/arm/mach-ux500/board-mop500-mcde.c |  4 ++--
 drivers/video/mcde/mcde_hw.c            | 18 +++++++++---------
 2 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/arch/arm/mach-ux500/board-mop500-mcde.c b/arch/arm/mach-ux500/board-mop500-mcde.c
index ce32ae71b4b..d9b36fcdb81 100644
--- a/arch/arm/mach-ux500/board-mop500-mcde.c
+++ b/arch/arm/mach-ux500/board-mop500-mcde.c
@@ -282,7 +282,7 @@ static struct ab8500_display_platform_data ab8500_display_pdata = {
 			{0xffda, 0xffb6, 0x70},
 			{0x70, 0xffa2, 0xffee},
 		},
-		.offset = {0x80, 0x10, 0x80},
+		.offset = {0x10, 0x80, 0x80},
 	}
 };
 
@@ -394,7 +394,7 @@ static struct mcde_display_hdmi_platform_data av8100_hdmi_pdata = {
 			{0xffda, 0xffb6, 0x70},
 			{0x70, 0xffa2, 0xffee},
 		},
-		.offset = {0x80, 0x10, 0x80},
+		.offset = {0x10, 0x80, 0x80},
 	}
 };
 
diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index 9844dc1b2f7..2bfd0c1f6ef 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -207,9 +207,9 @@ struct col_regs {
 	u16 cr_red;
 	u16 cr_green;
 	u16 cr_blue;
-	u16 off_red;
-	u16 off_green;
-	u16 off_blue;
+	u16 off_y;
+	u16 off_cb;
+	u16 off_cr;
 };
 
 struct tv_regs {
@@ -733,10 +733,10 @@ static void update_col_registers(enum mcde_chnl chnl_id, struct col_regs *regs)
 				MCDE_RGBCONV4A_CB_GREEN(regs->cb_green));
 	mcde_wreg(MCDE_RGBCONV5A + idx * MCDE_RGBCONV5A_GROUPOFFSET,
 				MCDE_RGBCONV5A_CB_BLUE(regs->cb_blue) |
-				MCDE_RGBCONV5A_OFF_RED(regs->off_red));
+				MCDE_RGBCONV5A_OFF_RED(regs->off_cr));
 	mcde_wreg(MCDE_RGBCONV6A + idx * MCDE_RGBCONV6A_GROUPOFFSET,
-				MCDE_RGBCONV6A_OFF_GREEN(regs->off_green) |
-				MCDE_RGBCONV6A_OFF_BLUE(regs->off_blue));
+				MCDE_RGBCONV6A_OFF_GREEN(regs->off_y) |
+				MCDE_RGBCONV6A_OFF_BLUE(regs->off_cb));
 }
 
 /* MCDE internal helpers */
@@ -2519,9 +2519,9 @@ void mcde_chnl_set_col_convert(struct mcde_chnl_state *chnl,
 	chnl->col_regs.cr_red    = col_convert->matrix[2][0];
 	chnl->col_regs.cr_green  = col_convert->matrix[2][1];
 	chnl->col_regs.cr_blue   = col_convert->matrix[2][2];
-	chnl->col_regs.off_red   = col_convert->offset[0];
-	chnl->col_regs.off_green = col_convert->offset[1];
-	chnl->col_regs.off_blue  = col_convert->offset[2];
+	chnl->col_regs.off_y     = col_convert->offset[0];
+	chnl->col_regs.off_cb    = col_convert->offset[1];
+	chnl->col_regs.off_cr    = col_convert->offset[2];
 
 	dev_vdbg(&mcde_dev->dev, "%s exit\n", __func__);
 }
-- 
cgit v1.2.3


From 95f2c7ea4e450e1469f8f08b9e5174a2408b99d5 Mon Sep 17 00:00:00 2001
From: Marcel Tunnissen <Marcel.Tuennissen@stericsson.com>
Date: Wed, 4 May 2011 11:02:38 +0200
Subject: video: av8100: Fix colors for HDMI with a YUV port

This patch changes the matrix that is used for HDMI out with a YUV 422
pixel format from MCDE. The effect was e.g. that yellow colors appeared
a bit greenish.

ST-Ericsson ID: 338207
ST-Ericsson Linux next: Not tested, ER 282779
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: Ic4e3c17bbe54d89fd060b682202cc9ea853c7989
Signed-off-by: Marcel Tunnissen <Marcel.Tuennissen@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/22275
Tested-by: Marcel TUNNISSEN <marcel.tuennissen@stericsson.com>
Reviewed-by: QATEST
Reviewed-by: Linus WALLEIJ <linus.walleij@stericsson.com>
---
 drivers/video/av8100/av8100.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/video/av8100/av8100.c b/drivers/video/av8100/av8100.c
index d1d77b3bf16..911ce24e1ed 100644
--- a/drivers/video/av8100/av8100.c
+++ b/drivers/video/av8100/av8100.c
@@ -433,10 +433,10 @@ const struct color_conversion_cmd col_trans_yuv_to_rgb_v1 = {
 };
 
 const struct color_conversion_cmd col_trans_yuv_to_rgb_v2 = {
-	.c0      = 0x0204, .c1      = 0x012a, .c2      = 0x0000,
-	.c3      = 0xff9c, .c4      = 0x012a, .c5      = 0xff30,
-	.c6      = 0x0000, .c7      = 0x012a, .c8      = 0x0198,
-	.aoffset = 0xfeeb, .boffset = 0x0088, .coffset = 0xff21,
+	.c0      = 0x0198, .c1      = 0x012a, .c2      = 0x0000,
+	.c3      = 0xff30, .c4      = 0x012a, .c5      = 0xff9c,
+	.c6      = 0x0000, .c7      = 0x012a, .c8      = 0x0204,
+	.aoffset = 0xff21, .boffset = 0x0088, .coffset = 0xfeeb,
 	.lmax    = 0xff,
 	.lmin    = 0x00,
 	.cmax    = 0xff,
-- 
cgit v1.2.3


From 459b97b32a81971c1ab734942902ee03ac54702a Mon Sep 17 00:00:00 2001
From: Per Persson <per.xb.persson@stericsson.com>
Date: Fri, 6 May 2011 14:08:08 +0200
Subject: video: av8100: Request DDR OPP

PRCMU QOS DDR OPP is requested when HDMI is active.

ST-Ericsson ID: 338919
ST-Ericsson Linux next: Not tested, ER 282779
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I20639ee6edd5d8c91c695917e4d4015eac1be02f
Signed-off-by: Per Persson <per.xb.persson@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/22681
Reviewed-by: QATOOLS
Reviewed-by: QATEST
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Reviewed-by: Marcel TUNNISSEN <marcel.tuennissen@stericsson.com>
---
 drivers/video/av8100/av8100.c | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/drivers/video/av8100/av8100.c b/drivers/video/av8100/av8100.c
index 911ce24e1ed..9ea73299091 100644
--- a/drivers/video/av8100/av8100.c
+++ b/drivers/video/av8100/av8100.c
@@ -1967,6 +1967,8 @@ int av8100_powerdown(void)
 	if (av8100_globals->opp_requested) {
 		prcmu_qos_remove_requirement(PRCMU_QOS_APE_OPP,
 				(char *)av8100_miscdev.name);
+		prcmu_qos_remove_requirement(PRCMU_QOS_DDR_OPP,
+				(char *)av8100_miscdev.name);
 		av8100_globals->opp_requested = false;
 	}
 
@@ -2035,7 +2037,12 @@ int av8100_download_firmware(char *fw_buff, int nbytes,
 	if (av8100_globals->opp_requested == false) {
 		if (prcmu_qos_add_requirement(PRCMU_QOS_APE_OPP,
 				(char *)av8100_miscdev.name, 100)) {
-			dev_err(av8100dev, "OPP 100 failed\n");
+			dev_err(av8100dev, "APE OPP 100 failed\n");
+			return -EFAULT;
+		}
+		if (prcmu_qos_add_requirement(PRCMU_QOS_DDR_OPP,
+				(char *)av8100_miscdev.name, 100)) {
+			dev_err(av8100dev, "DDR OPP 100 failed\n");
 			return -EFAULT;
 		}
 
-- 
cgit v1.2.3


From ed54dd4ff4bf4301b933ecb2a8ff98b59eaa613f Mon Sep 17 00:00:00 2001
From: Per Persson <per.xb.persson@stericsson.com>
Date: Fri, 6 May 2011 13:58:52 +0200
Subject: video: av8100: Filter plug event

Plug event indication is filtered when the plug state
is unchanged.

ST-Ericsson ID: 338923
ST-Ericsson Linux next: Not tested, ER 282779
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I8daf7ea946bbc5521d8c1d60296ee49ecdfcd161
Signed-off-by: Per Persson <per.xb.persson@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/22683
Reviewed-by: QATOOLS
Reviewed-by: QATEST
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Reviewed-by: Marcel TUNNISSEN <marcel.tuennissen@stericsson.com>
---
 drivers/video/av8100/av8100.c | 20 ++++++++++++--------
 1 file changed, 12 insertions(+), 8 deletions(-)

diff --git a/drivers/video/av8100/av8100.c b/drivers/video/av8100/av8100.c
index 9ea73299091..5a441755c75 100644
--- a/drivers/video/av8100/av8100.c
+++ b/drivers/video/av8100/av8100.c
@@ -623,6 +623,10 @@ static int av8100_plugstartup_event_handle(void)
 		} else {
 			av8100_globals->plug_state = AV8100_UNPLUGGED;
 			dev_dbg(av8100dev, "plug_state:0\n");
+
+			if (av8100_globals->hdmi_ev_cb)
+				av8100_globals->hdmi_ev_cb(
+					AV8100_HDMI_EVENT_HDMI_PLUGOUT);
 		}
 		break;
 	}
@@ -953,12 +957,12 @@ static void clr_plug_status(enum av8100_plugin_status status)
 			av8100_globals->plug_state =
 				AV8100_UNPLUGGED;
 			dev_dbg(av8100dev, "plug_state:0\n");
+
+			if (av8100_globals->hdmi_ev_cb)
+				av8100_globals->hdmi_ev_cb(
+					AV8100_HDMI_EVENT_HDMI_PLUGOUT);
 			break;
 		}
-
-		if (av8100_globals->hdmi_ev_cb)
-			av8100_globals->hdmi_ev_cb(
-				AV8100_HDMI_EVENT_HDMI_PLUGOUT);
 		break;
 
 	case AV8100_CVBS_PLUGIN:
@@ -1010,6 +1014,10 @@ static void set_plug_status(enum av8100_plugin_status status)
 					av8100_plugtimer_int;
 			av8100_plugtimer.data = 0;
 			add_timer(&av8100_plugtimer);
+
+			if (av8100_globals->hdmi_ev_cb)
+				av8100_globals->hdmi_ev_cb(
+					AV8100_HDMI_EVENT_HDMI_PLUGIN);
 			break;
 
 		case AV8100_PLUGGED_STARTUP:
@@ -1017,10 +1025,6 @@ static void set_plug_status(enum av8100_plugin_status status)
 		default:
 			break;
 		}
-
-		if (av8100_globals->hdmi_ev_cb)
-			av8100_globals->hdmi_ev_cb(
-				AV8100_HDMI_EVENT_HDMI_PLUGIN);
 		break;
 
 	case AV8100_CVBS_PLUGIN:
-- 
cgit v1.2.3


From a50444b97c0a09ae7e03167a9bb2fbb2e31a0029 Mon Sep 17 00:00:00 2001
From: Per Persson <per.xb.persson@stericsson.com>
Date: Tue, 10 May 2011 08:17:59 +0200
Subject: video: av8100: Change HW response timeout values

Allowed response time is increased when waiting for answer
from HW.

ST-Ericsson ID: 338924
ST-Ericsson Linux next: Not tested, ER 282779
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: Iec7bb594c52793c3b90da50ab8f8d109192b71c2
Signed-off-by: Per Persson <per.xb.persson@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/22688
Reviewed-by: QATOOLS
Reviewed-by: QATEST
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Reviewed-by: Marcel TUNNISSEN <marcel.tuennissen@stericsson.com>
---
 drivers/video/av8100/av8100.c | 31 +++++++++++++++++++------------
 1 file changed, 19 insertions(+), 12 deletions(-)

diff --git a/drivers/video/av8100/av8100.c b/drivers/video/av8100/av8100.c
index 5a441755c75..aa3a62fde4c 100644
--- a/drivers/video/av8100/av8100.c
+++ b/drivers/video/av8100/av8100.c
@@ -98,8 +98,6 @@
 #define AV8100_WAITTIME_10MS 10
 #define AV8100_WAITTIME_50MS 50
 #define AV8100_WATTIME_100US 100
-#define AV8100_CMD_RET_TRIES 10
-#define AV8100_FWDL_TRIES 10
 
 /* Master clock timing */
 #define MCLK_RNG_17_22	0	/* Use with 19.2 MHZ clock */
@@ -238,6 +236,8 @@ enum av8100_command_size {
 	AV8100_COMMAND_FUSE_AES_CHK_SIZE = 0x2,
 };
 
+static unsigned int waittime_retry[10] = {1, 2, 4, 6, 8, 10, 10, 10, 10, 10};
+
 static void clr_plug_status(enum av8100_plugin_status status);
 static void set_plug_status(enum av8100_plugin_status status);
 static void cec_rx(void);
@@ -2012,7 +2012,8 @@ int av8100_download_firmware(char *fw_buff, int nbytes,
 	int tempnext = 0x0;
 	char val = 0x0;
 	char CheckSum = 0;
-	int cnt = 10;
+	int cnt;
+	int cnt_max;
 	struct i2c_client *i2c;
 	u8 uc;
 	u8 fdl;
@@ -2175,11 +2176,12 @@ int av8100_download_firmware(char *fw_buff, int nbytes,
 	}
 
 	/* Wait Internal Micro controler ready */
-	cnt = AV8100_FWDL_TRIES;
+	cnt = 0;
+	cnt_max = ARRAY_SIZE(waittime_retry);
 	retval = av8100_reg_gen_status_r(NULL, NULL, NULL, &uc,
 		NULL, NULL);
-	while ((retval == 0) && (uc != 0x1) && (cnt-- > 0)) {
-		msleep(AV8100_WAITTIME_1MS);
+	while ((retval == 0) && (uc != 0x1) && (cnt++ < cnt_max)) {
+		msleep(waittime_retry[cnt]);
 		retval = av8100_reg_gen_status_r(NULL, NULL, NULL,
 			&uc, NULL, NULL);
 	}
@@ -3349,6 +3351,8 @@ int av8100_conf_w(enum av8100_command_type command_type,
 
 	if (if_type == I2C_INTERFACE) {
 		int cnt = 0;
+		int cnt_max;
+
 		dev_dbg(av8100dev, "av8100_conf_w cmd_type:%02x length:%02x ",
 			command_type, cmd_length);
 		dev_dbg(av8100dev, "buffer: ");
@@ -3376,10 +3380,11 @@ int av8100_conf_w(enum av8100_command_type command_type,
 
 		/* Get the first return byte */
 		msleep(AV8100_WAITTIME_1MS);
-		cnt = AV8100_CMD_RET_TRIES;
+		cnt = 0;
+		cnt_max = ARRAY_SIZE(waittime_retry);
 		retval = get_command_return_first(i2c, command_type);
-		while (retval && (cnt-- > 0)) {
-			msleep(AV8100_WAITTIME_1MS);
+		while (retval && (cnt++ < cnt_max)) {
+			msleep(waittime_retry[cnt]);
 			retval = get_command_return_first(i2c, command_type);
 		}
 		dev_dbg(av8100dev, "first return cnt:%d\n", cnt);
@@ -3418,6 +3423,7 @@ int av8100_conf_w_raw(enum av8100_command_type command_type,
 	int retval = 0;
 	struct i2c_client *i2c;
 	int cnt;
+	int cnt_max;
 
 	if (av8100_status_get().av8100_state == AV8100_OPMODE_UNDEFINED)
 		return -EINVAL;
@@ -3449,10 +3455,11 @@ int av8100_conf_w_raw(enum av8100_command_type command_type,
 
 	/* Get the first return byte */
 	msleep(AV8100_WAITTIME_1MS);
-	cnt = AV8100_CMD_RET_TRIES;
+	cnt = 0;
+	cnt_max = ARRAY_SIZE(waittime_retry);
 	retval = get_command_return_first(i2c, command_type);
-	while (retval && (cnt-- > 0)) {
-		msleep(AV8100_WAITTIME_1MS);
+	while (retval && (cnt++ < cnt_max)) {
+		msleep(waittime_retry[cnt]);
 		retval = get_command_return_first(i2c, command_type);
 	}
 	dev_dbg(av8100dev, "first return cnt:%d\n", cnt);
-- 
cgit v1.2.3


From 2304b9138ec9f36c48fc715226f18b340a2b1617 Mon Sep 17 00:00:00 2001
From: Jimmy Rubin <jimmy.rubin@stericsson.com>
Date: Mon, 9 May 2011 07:29:50 +0200
Subject: video: mcde: Fix chnl_disable for U5500

Channel disable is handled different for V1 and V2
hardware. If the channel is not properly disabled
problems with suspend/resume can occur

ST-Ericsson ID: 338578
ST-Ericsson Linux next: Not tested, ER 282779
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: Ib760b7bf2246ad017605ea24d14bcb5574834e23
Signed-off-by: Jimmy Rubin <jimmy.rubin@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/22661
Reviewed-by: QATOOLS
Reviewed-by: QATEST
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
Reviewed-by: Marcel TUNNISSEN <marcel.tuennissen@stericsson.com>
---
 drivers/video/mcde/mcde_hw.c | 128 +++++++++++++++++++++++++++----------------
 1 file changed, 81 insertions(+), 47 deletions(-)

diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index 2bfd0c1f6ef..05759bffd94 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -1504,59 +1504,93 @@ static void disable_channel(struct mcde_chnl_state *chnl)
 		chnl->continous_running = false;
 	}
 
-	switch (chnl->id) {
-	case MCDE_CHNL_A:
-		mcde_wfld(MCDE_CRA0, FLOEN, false);
-		wait_for_channel(chnl);
-		for (i = 0; i < MCDE_FLOWEN_MAX_TRIAL; i++) {
-			msleep(1);
-			if (!mcde_rfld(MCDE_CRA0, FLOEN)) {
-				dev_vdbg(&mcde_dev->dev,
-					"Flow (A) disable after >= %d ms\n", i);
-				goto break_switch;
+	if (hardware_version == MCDE_CHIP_VERSION_1_0_4) {
+		if (is_channel_enabled(chnl)) {
+			wait_for_channel(chnl);
+			/*
+			 * Just to make sure that a frame is triggered when
+			 * we try to disable the channel
+			 */
+			chnl->transactionid++;
+			mcde_wreg(MCDE_CHNL0SYNCHSW +
+				chnl->id * MCDE_CHNL0SYNCHSW_GROUPOFFSET,
+					MCDE_CHNL0SYNCHSW_SW_TRIG(true));
+			disable_flow(chnl);
+			wait_for_channel(chnl);
+			for (i = 0; i < MCDE_FLOWEN_MAX_TRIAL; i++) {
+				if (!is_channel_enabled(chnl)) {
+					dev_vdbg(&mcde_dev->dev,
+						"Flow %d off after >= %d ms\n",
+								chnl->id, i);
+					goto break_switch;
+				}
+				msleep(1);
 			}
+		} else {
+			dev_vdbg(&mcde_dev->dev,
+				"Flow %d disable after >= %d ms\n",
+								chnl->id, i);
+			goto break_switch;
 		}
-		dev_warn(&mcde_dev->dev, "%s: channel A timeout\n", __func__);
-		break;
-	case MCDE_CHNL_B:
-		mcde_wfld(MCDE_CRB0, FLOEN, false);
-		wait_for_channel(chnl);
-		for (i = 0; i < MCDE_FLOWEN_MAX_TRIAL; i++) {
-			msleep(1);
-			if (!mcde_rfld(MCDE_CRB0, FLOEN)) {
-				dev_vdbg(&mcde_dev->dev,
-				"Flow (B) disable after >= %d ms\n", i);
-				goto break_switch;
+	} else {
+		switch (chnl->id) {
+		case MCDE_CHNL_A:
+			mcde_wfld(MCDE_CRA0, FLOEN, false);
+			wait_for_channel(chnl);
+			for (i = 0; i < MCDE_FLOWEN_MAX_TRIAL; i++) {
+				msleep(1);
+				if (!mcde_rfld(MCDE_CRA0, FLOEN)) {
+					dev_vdbg(&mcde_dev->dev,
+					"Flow (A) off after >= %d ms\n", i);
+					goto break_switch;
+				}
 			}
-		}
-		dev_warn(&mcde_dev->dev, "%s: channel B timeout\n", __func__);
-		break;
-	case MCDE_CHNL_C0:
-		mcde_wfld(MCDE_CRC, C1EN, false);
-		wait_for_channel(chnl);
-		for (i = 0; i < MCDE_FLOWEN_MAX_TRIAL; i++) {
-			msleep(1);
-			if (!mcde_rfld(MCDE_CRC, C1EN)) {
-				dev_vdbg(&mcde_dev->dev,
-				"Flow (C1) disable after >= %d ms\n", i);
-				goto break_switch;
+			dev_warn(&mcde_dev->dev,
+					"%s: channel A timeout\n", __func__);
+			break;
+		case MCDE_CHNL_B:
+			mcde_wfld(MCDE_CRB0, FLOEN, false);
+			wait_for_channel(chnl);
+			for (i = 0; i < MCDE_FLOWEN_MAX_TRIAL; i++) {
+				msleep(1);
+				if (!mcde_rfld(MCDE_CRB0, FLOEN)) {
+					dev_vdbg(&mcde_dev->dev,
+					"Flow (B) off after >= %d ms\n", i);
+					goto break_switch;
+				}
 			}
-		}
-		dev_warn(&mcde_dev->dev, "%s: channel C0 timeout\n", __func__);
-		break;
-	case MCDE_CHNL_C1:
-		mcde_wfld(MCDE_CRC, C2EN, false);
-		wait_for_channel(chnl);
-		for (i = 0; i < MCDE_FLOWEN_MAX_TRIAL; i++) {
-			msleep(1);
-			if (!mcde_rfld(MCDE_CRC, C2EN)) {
-				dev_vdbg(&mcde_dev->dev,
-				"Flow (C2) disable after >= %d ms\n", i);
-				goto break_switch;
+			dev_warn(&mcde_dev->dev, "%s: channel B timeout\n",
+								__func__);
+			break;
+		case MCDE_CHNL_C0:
+			mcde_wfld(MCDE_CRC, C1EN, false);
+			wait_for_channel(chnl);
+			for (i = 0; i < MCDE_FLOWEN_MAX_TRIAL; i++) {
+				msleep(1);
+				if (!mcde_rfld(MCDE_CRC, C1EN)) {
+					dev_vdbg(&mcde_dev->dev,
+					"Flow (C1) off after >= %d ms\n", i);
+					goto break_switch;
+				}
+			}
+			dev_warn(&mcde_dev->dev, "%s: channel C0 timeout\n",
+								__func__);
+			break;
+		case MCDE_CHNL_C1:
+			mcde_wfld(MCDE_CRC, C2EN, false);
+			wait_for_channel(chnl);
+			for (i = 0; i < MCDE_FLOWEN_MAX_TRIAL; i++) {
+				msleep(1);
+				if (!mcde_rfld(MCDE_CRC, C2EN)) {
+					dev_vdbg(&mcde_dev->dev,
+					"Flow (C2) off after >= %d ms\n", i);
+					goto break_switch;
+				}
 			}
+			dev_warn(&mcde_dev->dev, "%s: channel C1 timeout\n",
+								__func__);
+			break;
 		}
-		dev_warn(&mcde_dev->dev, "%s: channel C1 timeout\n", __func__);
-		break;
 	}
 break_switch:
 	chnl->continous_running = false;
-- 
cgit v1.2.3


From 728b8d6e6436af312df9504f7e02f8d79dba101c Mon Sep 17 00:00:00 2001
From: Jimmy Rubin <jimmy.rubin@stericsson.com>
Date: Thu, 12 May 2011 10:37:18 +0200
Subject: video: mcde: Add mutex in dss

The display device has to be protected by mutexes on
DSS level.
The framebuffer device and the dispdev both uses dss at the same
time.

ST-Ericsson ID: 338979
ST-Ericsson Linux next: Not tested, ER 282779
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I10065488130a5c5400b4463ddffd71c3a7586f12
Signed-off-by: Jimmy Rubin <jimmy.rubin@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/22956
Reviewed-by: QATOOLS
Reviewed-by: QATEST
Reviewed-by: Marcel TUNNISSEN <marcel.tuennissen@stericsson.com>
Reviewed-by: Jonas ABERG <jonas.aberg@stericsson.com>
---
 drivers/video/mcde/mcde_display.c |   2 +
 drivers/video/mcde/mcde_dss.c     | 131 +++++++++++++++++++++++++++++++-------
 include/video/mcde_display.h      |   1 +
 3 files changed, 110 insertions(+), 24 deletions(-)

diff --git a/drivers/video/mcde/mcde_display.c b/drivers/video/mcde/mcde_display.c
index 144a1a67d02..04c0f1cebb1 100644
--- a/drivers/video/mcde/mcde_display.c
+++ b/drivers/video/mcde/mcde_display.c
@@ -426,5 +426,7 @@ void mcde_display_init_device(struct mcde_display_device *ddev)
 	ddev->update = mcde_display_update_default;
 	ddev->prepare_for_update = mcde_display_prepare_for_update_default;
 	ddev->on_first_update = mcde_display_on_first_update_default;
+
+	mutex_init(&ddev->display_lock);
 }
 
diff --git a/drivers/video/mcde/mcde_dss.c b/drivers/video/mcde/mcde_dss.c
index 361510b46fc..dd48be74217 100644
--- a/drivers/video/mcde/mcde_dss.c
+++ b/drivers/video/mcde/mcde_dss.c
@@ -38,7 +38,9 @@ static int apply_overlay(struct mcde_overlay *ovly,
 		 * add offset
 		 */
 		struct mcde_rectangle dirty = info->dirty;
+		mutex_lock(&ovly->ddev->display_lock);
 		ret = ovly->ddev->invalidate_area(ovly->ddev, &dirty);
+		mutex_unlock(&ovly->ddev->display_lock);
 	}
 
 	if (ovly->info.paddr != info->paddr || force)
@@ -69,25 +71,30 @@ static int apply_overlay(struct mcde_overlay *ovly,
 
 int mcde_dss_open_channel(struct mcde_display_device *ddev)
 {
-	int ret;
+	int ret = 0;
 	struct mcde_chnl_state *chnl;
 
+	mutex_lock(&ddev->display_lock);
 	/* Acquire MCDE resources */
 	chnl = mcde_chnl_get(ddev->chnl_id, ddev->fifo, ddev->port);
 	if (IS_ERR(chnl)) {
 		ret = PTR_ERR(chnl);
 		dev_warn(&ddev->dev, "Failed to acquire MCDE channel\n");
-		return ret;
+		goto chnl_get_failed;
 	}
 	ddev->chnl_state = chnl;
-	return 0;
+chnl_get_failed:
+	mutex_unlock(&ddev->display_lock);
+	return ret;
 }
 EXPORT_SYMBOL(mcde_dss_open_channel);
 
 void mcde_dss_close_channel(struct mcde_display_device *ddev)
 {
+	mutex_lock(&ddev->display_lock);
 	mcde_chnl_put(ddev->chnl_state);
 	ddev->chnl_state = NULL;
+	mutex_unlock(&ddev->display_lock);
 }
 EXPORT_SYMBOL(mcde_dss_close_channel);
 
@@ -98,6 +105,7 @@ int mcde_dss_enable_display(struct mcde_display_device *ddev)
 	if (ddev->enabled)
 		return 0;
 
+	mutex_lock(&ddev->display_lock);
 	mcde_chnl_enable(ddev->chnl_state);
 
 	/* Initiate display communication */
@@ -125,12 +133,15 @@ int mcde_dss_enable_display(struct mcde_display_device *ddev)
 	dev_dbg(&ddev->dev, "Display enabled, chnl=%d\n",
 					ddev->chnl_id);
 	ddev->enabled = true;
+	mutex_unlock(&ddev->display_lock);
+
 	return 0;
 
 enable_sync_failed:
 	ddev->set_power_mode(ddev, MCDE_DISPLAY_PM_OFF);
 display_failed:
 	mcde_chnl_disable(ddev->chnl_state);
+	mutex_unlock(&ddev->display_lock);
 	return ret;
 }
 EXPORT_SYMBOL(mcde_dss_enable_display);
@@ -141,6 +152,7 @@ void mcde_dss_disable_display(struct mcde_display_device *ddev)
 		return;
 
 	/* TODO: Disable overlays */
+	mutex_lock(&ddev->display_lock);
 
 	mcde_chnl_stop_flow(ddev->chnl_state);
 
@@ -149,6 +161,7 @@ void mcde_dss_disable_display(struct mcde_display_device *ddev)
 	mcde_chnl_disable(ddev->chnl_state);
 
 	ddev->enabled = false;
+	mutex_unlock(&ddev->display_lock);
 
 	dev_dbg(&ddev->dev, "Display disabled, chnl=%d\n", ddev->chnl_id);
 }
@@ -156,10 +169,14 @@ EXPORT_SYMBOL(mcde_dss_disable_display);
 
 int mcde_dss_apply_channel(struct mcde_display_device *ddev)
 {
+	int ret;
 	if (!ddev->apply_config)
 		return -EINVAL;
+	mutex_lock(&ddev->display_lock);
+	ret = ddev->apply_config(ddev);
+	mutex_unlock(&ddev->display_lock);
 
-	return ddev->apply_config(ddev);
+	return ret;
 }
 EXPORT_SYMBOL(mcde_dss_apply_channel);
 
@@ -175,7 +192,9 @@ struct mcde_overlay *mcde_dss_create_overlay(struct mcde_display_device *ddev,
 	kobject_init(&ovly->kobj, &ovly_type); /* Local ref */
 	kobject_get(&ovly->kobj); /* Creator ref */
 	INIT_LIST_HEAD(&ovly->list);
+	mutex_lock(&ddev->display_lock);
 	list_add(&ddev->ovlys, &ovly->list);
+	mutex_unlock(&ddev->display_lock);
 	ovly->info = *info;
 	ovly->ddev = ddev;
 
@@ -251,43 +270,63 @@ int mcde_dss_update_overlay(struct mcde_overlay *ovly, bool tripple_buffer)
 	if (!ovly->state || !ovly->ddev->update || !ovly->ddev->invalidate_area)
 		return -EINVAL;
 
+	mutex_lock(&ovly->ddev->display_lock);
 	/* Do not perform an update if power mode is off */
-	if (ovly->ddev->get_power_mode(ovly->ddev) == MCDE_DISPLAY_PM_OFF)
-		return 0;
+	if (ovly->ddev->get_power_mode(ovly->ddev) == MCDE_DISPLAY_PM_OFF) {
+		ret = 0;
+		goto power_mode_off;
+	}
 
 	ret = ovly->ddev->update(ovly->ddev, tripple_buffer);
 	if (ret)
-		return ret;
+		goto update_failed;
 
-	return ovly->ddev->invalidate_area(ovly->ddev, NULL);
+	ret = ovly->ddev->invalidate_area(ovly->ddev, NULL);
+
+power_mode_off:
+update_failed:
+	mutex_unlock(&ovly->ddev->display_lock);
+	return ret;
 }
 EXPORT_SYMBOL(mcde_dss_update_overlay);
 
 void mcde_dss_get_native_resolution(struct mcde_display_device *ddev,
 	u16 *x_res, u16 *y_res)
 {
+	mutex_lock(&ddev->display_lock);
 	ddev->get_native_resolution(ddev, x_res, y_res);
+	mutex_unlock(&ddev->display_lock);
 }
 EXPORT_SYMBOL(mcde_dss_get_native_resolution);
 
 enum mcde_ovly_pix_fmt mcde_dss_get_default_pixel_format(
 	struct mcde_display_device *ddev)
 {
-	return ddev->get_default_pixel_format(ddev);
+	int ret;
+	mutex_lock(&ddev->display_lock);
+	ret = ddev->get_default_pixel_format(ddev);
+	mutex_unlock(&ddev->display_lock);
+	return ret;
 }
 EXPORT_SYMBOL(mcde_dss_get_default_pixel_format);
 
 void mcde_dss_get_physical_size(struct mcde_display_device *ddev,
 	u16 *physical_width, u16 *physical_height)
 {
+	mutex_lock(&ddev->display_lock);
 	ddev->get_physical_size(ddev, physical_width, physical_height);
+	mutex_unlock(&ddev->display_lock);
 }
 EXPORT_SYMBOL(mcde_dss_get_physical_size);
 
 int mcde_dss_try_video_mode(struct mcde_display_device *ddev,
 	struct mcde_video_mode *video_mode)
 {
-	return ddev->try_video_mode(ddev, video_mode);
+	int ret;
+	mutex_lock(&ddev->display_lock);
+	ret = ddev->try_video_mode(ddev, video_mode);
+	mutex_unlock(&ddev->display_lock);
+	return ret;
 }
 EXPORT_SYMBOL(mcde_dss_try_video_mode);
 
@@ -297,22 +336,32 @@ int mcde_dss_set_video_mode(struct mcde_display_device *ddev,
 	int ret;
 	struct mcde_video_mode old_vmode;
 
+	mutex_lock(&ddev->display_lock);
 	ddev->get_video_mode(ddev, &old_vmode);
-	if (memcmp(vmode, &old_vmode, sizeof(old_vmode)) == 0)
-		return 0;
+	if (memcmp(vmode, &old_vmode, sizeof(old_vmode)) == 0) {
+		ret = 0;
+		goto same_video_mode;
+	}
 
 	ret = ddev->set_video_mode(ddev, vmode);
 	if (ret)
-		return ret;
+		goto set_video_mode_failed;
 
-	return ddev->invalidate_area(ddev, NULL);
+	if (ddev->invalidate_area)
+		ret = ddev->invalidate_area(ddev, NULL);
+same_video_mode:
+set_video_mode_failed:
+	mutex_unlock(&ddev->display_lock);
+	return ret;
 }
 EXPORT_SYMBOL(mcde_dss_set_video_mode);
 
 void mcde_dss_get_video_mode(struct mcde_display_device *ddev,
 	struct mcde_video_mode *video_mode)
 {
+	mutex_lock(&ddev->display_lock);
 	ddev->get_video_mode(ddev, video_mode);
+	mutex_unlock(&ddev->display_lock);
 }
 EXPORT_SYMBOL(mcde_dss_get_video_mode);
 
@@ -320,38 +369,61 @@ int mcde_dss_set_pixel_format(struct mcde_display_device *ddev,
 	enum mcde_ovly_pix_fmt pix_fmt)
 {
 	enum mcde_ovly_pix_fmt old_pix_fmt;
+	int ret;
 
+	mutex_lock(&ddev->display_lock);
 	old_pix_fmt = ddev->get_pixel_format(ddev);
-	if (old_pix_fmt == pix_fmt)
-		return 0;
+	if (old_pix_fmt == pix_fmt) {
+		ret = 0;
+		goto same_pixel_format;
+	}
 
-	return ddev->set_pixel_format(ddev, pix_fmt);
+	ret = ddev->set_pixel_format(ddev, pix_fmt);
+
+same_pixel_format:
+	mutex_unlock(&ddev->display_lock);
+	return ret;
 }
 EXPORT_SYMBOL(mcde_dss_set_pixel_format);
 
 int mcde_dss_get_pixel_format(struct mcde_display_device *ddev)
 {
-	return ddev->get_pixel_format(ddev);
+	int ret;
+	mutex_lock(&ddev->display_lock);
+	ret = ddev->get_pixel_format(ddev);
+	mutex_unlock(&ddev->display_lock);
+	return ret;
 }
 EXPORT_SYMBOL(mcde_dss_get_pixel_format);
 
 int mcde_dss_set_rotation(struct mcde_display_device *ddev,
 	enum mcde_display_rotation rotation)
 {
+	int ret;
 	enum mcde_display_rotation old_rotation;
 
+	mutex_lock(&ddev->display_lock);
 	old_rotation = ddev->get_rotation(ddev);
-	if (old_rotation == rotation)
-		return 0;
+	if (old_rotation == rotation) {
+		ret = 0;
+		goto same_rotation;
+	}
 
-	return ddev->set_rotation(ddev, rotation);
+	ret = ddev->set_rotation(ddev, rotation);
+same_rotation:
+	mutex_unlock(&ddev->display_lock);
+	return ret;
 }
 EXPORT_SYMBOL(mcde_dss_set_rotation);
 
 enum mcde_display_rotation mcde_dss_get_rotation(
 	struct mcde_display_device *ddev)
 {
-	return ddev->get_rotation(ddev);
+	int ret;
+	mutex_lock(&ddev->display_lock);
+	ret = ddev->get_rotation(ddev);
+	mutex_unlock(&ddev->display_lock);
+	return ret;
 }
 EXPORT_SYMBOL(mcde_dss_get_rotation);
 
@@ -359,18 +431,29 @@ int mcde_dss_set_synchronized_update(struct mcde_display_device *ddev,
 	bool enable)
 {
 	int ret;
+	mutex_lock(&ddev->display_lock);
 	ret = ddev->set_synchronized_update(ddev, enable);
 	if (ret)
-		return ret;
+		goto sync_update_failed;
+
 	if (ddev->chnl_state)
 		mcde_chnl_enable_synchronized_update(ddev->chnl_state, enable);
+	mutex_unlock(&ddev->display_lock);
 	return 0;
+
+sync_update_failed:
+	mutex_unlock(&ddev->display_lock);
+	return ret;
 }
 EXPORT_SYMBOL(mcde_dss_set_synchronized_update);
 
 bool mcde_dss_get_synchronized_update(struct mcde_display_device *ddev)
 {
-	return ddev->get_synchronized_update(ddev);
+	int ret;
+	mutex_lock(&ddev->display_lock);
+	ret = ddev->get_synchronized_update(ddev);
+	mutex_unlock(&ddev->display_lock);
+	return ret;
 }
 EXPORT_SYMBOL(mcde_dss_get_synchronized_update);
 
diff --git a/include/video/mcde_display.h b/include/video/mcde_display.h
index 524e62904fc..059d4a7e609 100644
--- a/include/video/mcde_display.h
+++ b/include/video/mcde_display.h
@@ -36,6 +36,7 @@ struct mcde_display_device {
 	enum mcde_chnl chnl_id;
 	enum mcde_fifo fifo;
 	bool first_update;
+	struct mutex display_lock;
 
 	bool enabled;
 	struct mcde_chnl_state *chnl_state;
-- 
cgit v1.2.3


From ab5b0679c86cbe69bd93159c38bed8583a0e39e4 Mon Sep 17 00:00:00 2001
From: Per Persson <per.xb.persson@stericsson.com>
Date: Wed, 11 May 2011 14:03:21 +0200
Subject: video: av8100: Control interrupts at power change

Interrupts are enabled by default at powerup,
and disabled at powerdown.

ST-Ericsson ID: 339603
ST-Ericsson Linux next: Not tested, ER 282779
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I69a358549dd077b33c097aebf74ad00825c0c55d
Signed-off-by: Per Persson <per.xb.persson@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/22957
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Reviewed-by: QATOOLS
Reviewed-by: QATEST
Reviewed-by: Marcel TUNNISSEN <marcel.tuennissen@stericsson.com>
Reviewed-by: Jonas ABERG <jonas.aberg@stericsson.com>
---
 drivers/video/av8100/av8100.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/video/av8100/av8100.c b/drivers/video/av8100/av8100.c
index aa3a62fde4c..06d8d9dad5d 100644
--- a/drivers/video/av8100/av8100.c
+++ b/drivers/video/av8100/av8100.c
@@ -1942,6 +1942,8 @@ int av8100_powerup(void)
 	if (av8100_status_get().av8100_state < AV8100_OPMODE_SCAN)
 		ret = av8100_powerup2();
 
+	av8100_enable_interrupt();
+
 	return ret;
 }
 EXPORT_SYMBOL(av8100_powerup);
@@ -1952,6 +1954,8 @@ int av8100_powerdown(void)
 
 	struct av8100_platform_data *pdata = av8100dev->platform_data;
 
+	av8100_disable_interrupt();
+
 	if (pdata->alt_powerupseq) {
 		retval = av8100_reg_stby_pend_int_w(
 				AV8100_STANDBY_PENDING_INTERRUPT_HPDI_LOW,
-- 
cgit v1.2.3


From 184c6e9169d6d0fad69d4c21f9a07b643831956b Mon Sep 17 00:00:00 2001
From: Per Persson <per.xb.persson@stericsson.com>
Date: Thu, 12 May 2011 10:56:36 +0200
Subject: video: av8100: Add HDMI resolutions

HW supported VESA resolutions are added.
CEA resolutions 60,61 and 62 are added.

ST-Ericsson ID: 339610
ST-Ericsson Linux next: Not tested, ER 282779
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: If86513ca2c3b2558dcb063a0c4d319fe39d0cd3f
Signed-off-by: Per Persson <per.xb.persson@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/22958
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Reviewed-by: QATOOLS
Reviewed-by: QATEST
Reviewed-by: Marcel TUNNISSEN <marcel.tuennissen@stericsson.com>
Reviewed-by: Jonas ABERG <jonas.aberg@stericsson.com>
---
 drivers/video/av8100/av8100.c       |  70 ++++++++-----
 drivers/video/mcde/display-av8100.c | 200 ++++++++++++++++++++++++++++++++----
 2 files changed, 224 insertions(+), 46 deletions(-)

diff --git a/drivers/video/av8100/av8100.c b/drivers/video/av8100/av8100.c
index 06d8d9dad5d..c3733c0ea40 100644
--- a/drivers/video/av8100/av8100.c
+++ b/drivers/video/av8100/av8100.c
@@ -64,7 +64,12 @@
 #define AV8100_TE_LINE_NB_18	18
 #define AV8100_TE_LINE_NB_21	21
 #define AV8100_TE_LINE_NB_22	22
+#define AV8100_TE_LINE_NB_24	24
+#define AV8100_TE_LINE_NB_25	25
+#define AV8100_TE_LINE_NB_26	26
+#define AV8100_TE_LINE_NB_29	29
 #define AV8100_TE_LINE_NB_30	30
+#define AV8100_TE_LINE_NB_32	32
 #define AV8100_TE_LINE_NB_38	38
 #define AV8100_TE_LINE_NB_40	40
 #define AV8100_UI_X4_DEFAULT	6
@@ -363,19 +368,19 @@ struct av8100_cea av8100_all_cea[29] = {
 	"+",	3413,	0x770,	5,	32,	1},/*RGB565*/
 { "20 VESA 9       800x600 @ 60 Hz      ",
 	109,	628,	600,	28,	4,
-	0,	"+",	1056,	800,	40,	128,	10,	20782080,
+	0,	"+",	1056,	800,	40,	128,	10,	40000000,
 	"+",	0,	0,	0,	0,	0},/*Settings to be define*/
 { "21 VESA 14      848x480  @ 60 Hz     ",
-	114,	500,	480,	20,	5,
-	0,	"+",	1056,	848,	24,	80,	10,	31680000,
+	114,	517,	480,	20,	5,
+	0,	"+",	1088,	848,	24,	80,	10,	33750000,
 	"-",	0,	0,	0,	0,	0},/*Settings to be define*/
 { "22 VESA 16      1024x768 @ 60 Hz     ",
 	116,	806,	768,	38,	6,
 	0,	"-",	1344,	1024,	24,	135,	10,	65000000,
 	"-",	0,	0,	0,	0,	0},/*Settings to be define*/
 { "23 VESA 22      1280x768 @ 60 Hz     ",
-	122,	802,	768,	34,	4,
-	0,	"+",	1688,	1280,	48,	160,	10,	81250000,
+	122,	790,	768,	34,	4,
+	0,	"+",	1440,	1280,	48,	160,	10,	68250000,
 	"-",	0,	0,	0,	0,	0},/*Settings to be define*/
 { "24 VESA 23      1280x768 @ 60 Hz     ",
 	123,	798,	768,	30,	7,
@@ -390,12 +395,12 @@ struct av8100_cea av8100_all_cea[29] = {
 	0,	"+",	1680,	1280,	72,	128,	10,	83500000,
 	"-",	0,	0,	0,	0,	0},/*Settings to be define*/
 { "27 VESA 39      1360x768 @ 60 Hz     ",
-	139,	790,	768,	22,	5,
-	0,	"-",	1520,	1360,	48,	32,	10,	72000000,
+	139,	795,	768,	22,	5,
+	0,	"-",	1792,	1360,	48,	32,	10,	85500000,
 	"+",	0,	0,	0,	0,	0},/*Settings to be define*/
-{ "28 VESA 81      1360x768 @ 60 Hz     ",
+{ "28 VESA 81      1366x768 @ 60 Hz     ",
 	181,	798,	768,	30,	5,
-	0,	"+",	1776,	1360,	72,	136,	10,	84750000,
+	0,	"+",	1792,	1366,	72,	136,	10,	85750000,
 	"-",	0,	0,	0,	0,	0} /*Settings to be define*/
 };
 
@@ -672,25 +677,36 @@ static u16 av8100_get_te_line_nb(
 	switch (output_video_format) {
 	case AV8100_CEA1_640X480P_59_94HZ:
 	case AV8100_CEA2_3_720X480P_59_94HZ:
+	case AV8100_VESA16_1024X768P_60HZ:
 		retval = AV8100_TE_LINE_NB_30;
 		break;
 
+	case AV8100_CEA4_1280X720P_60HZ:
+	case AV8100_CEA60_1280X720P_24HZ:
+	case AV8100_CEA61_1280X720P_25HZ:
+	case AV8100_CEA62_1280X720P_30HZ:
+		retval = AV8100_TE_LINE_NB_21;
+		break;
+
 	case AV8100_CEA5_1920X1080I_60HZ:
 	case AV8100_CEA6_7_NTSC_60HZ:
 	case AV8100_CEA20_1920X1080I_50HZ:
 	case AV8100_CEA21_22_576I_PAL_50HZ:
+	case AV8100_VESA27_1280X800P_59_91HZ:
 		retval = AV8100_TE_LINE_NB_18;
 		break;
 
-	case AV8100_CEA4_1280X720P_60HZ:
-		retval = AV8100_TE_LINE_NB_21;
+	case AV8100_CEA14_15_480p_60HZ:
+		retval = AV8100_TE_LINE_NB_32;
 		break;
 
 	case AV8100_CEA17_18_720X576P_50HZ:
+	case AV8100_CEA29_30_576P_50HZ:
 		retval = AV8100_TE_LINE_NB_40;
 		break;
 
 	case AV8100_CEA19_1280X720P_50HZ:
+	case AV8100_VESA39_1360X768P_60_02HZ:
 		retval = AV8100_TE_LINE_NB_22;
 		break;
 
@@ -700,28 +716,32 @@ static u16 av8100_get_te_line_nb(
 		retval = AV8100_TE_LINE_NB_38;
 		break;
 
-	case AV8100_CEA60_1280X720P_24HZ:
-	case AV8100_CEA62_1280X720P_30HZ:
-		retval = AV8100_TE_LINE_NB_21;
+	case AV8100_VESA9_800X600P_60_32HZ:
+		retval = AV8100_TE_LINE_NB_24;
 		break;
 
-	case AV8100_CEA14_15_480p_60HZ:
 	case AV8100_VESA14_848X480P_60HZ:
-	case AV8100_CEA61_1280X720P_25HZ:
-	case AV8100_CEA16_1920X1080P_60HZ:
-	case AV8100_CEA31_1920x1080P_50Hz:
-	case AV8100_CEA29_30_576P_50HZ:
-	case AV8100_VESA9_800X600P_60_32HZ:
-	case AV8100_VESA16_1024X768P_60HZ:
+		retval = AV8100_TE_LINE_NB_29;
+		break;
+
 	case AV8100_VESA22_1280X768P_59_99HZ:
+		retval = AV8100_TE_LINE_NB_17;
+		break;
+
 	case AV8100_VESA23_1280X768P_59_87HZ:
-	case AV8100_VESA27_1280X800P_59_91HZ:
-	case AV8100_VESA28_1280X800P_59_81HZ:
-	case AV8100_VESA39_1360X768P_60_02HZ:
 	case AV8100_VESA81_1366X768P_59_79HZ:
+		retval = AV8100_TE_LINE_NB_25;
+		break;
+
+	case AV8100_VESA28_1280X800P_59_81HZ:
+		retval = AV8100_TE_LINE_NB_26;
+		break;
+
+	case AV8100_CEA16_1920X1080P_60HZ:
+	case AV8100_CEA31_1920x1080P_50Hz:
 	default:
 		/* TODO */
-		retval = AV8100_TE_LINE_NB_14;
+		retval = AV8100_TE_LINE_NB_38;
 		break;
 	}
 
diff --git a/drivers/video/mcde/display-av8100.c b/drivers/video/mcde/display-av8100.c
index a28edbc9217..d5e1857a290 100644
--- a/drivers/video/mcde/display-av8100.c
+++ b/drivers/video/mcde/display-av8100.c
@@ -286,63 +286,84 @@ static int ceanr_convert(struct mcde_display_device *ddev,
 
 /* Supported HDMI modes */
 static struct mcde_video_mode video_modes_supp_hdmi[] = {
-	/* 640_480_60_P */
+	/* 0 CEA #1 640_480_60_P */
 	{
 		.xres = 640,	.yres = 480,
 		.pixclock = 39682,
 		.hbp = 112,	.hfp = 48,
 		.vbp = 33,	.vfp = 12
 	},
-	/* 720_480_60_P */
+	/* 1 720_480_60_P */
 	{
 		.xres = 720,	.yres = 480,
 		.pixclock = 37000,
 		.hbp = 104,	.hfp = 34,
 		.vbp = 30,	.vfp = 15
 	},
-	/* 720_576_50_P */
+	/* 2 720_576_50_P */
 	{
 		.xres = 720,	.yres = 576,
 		.pixclock = 37037,
 		.hbp = 132,	.hfp = 12,
 		.vbp = 44,	.vfp = 5
 	},
-	/* 1280_720_60_P */
+	/* 3 1280_720_60_P */
 	{
 		.xres = 1280,	.yres = 720,
 		.pixclock = 13468,
 		.hbp = 256,	.hfp = 114,
 		.vbp = 20,	.vfp = 10
 	},
-	/* 1280_720_50_P */
+	/* 4 1280_720_50_P */
 	{
 		.xres = 1280,	.yres = 720,
 		.pixclock = 13468,
 		.hbp = 260,	.hfp = 440,
 		.vbp = 25,	.vfp = 5
 	},
-	/* 1920_1080_30_P */
+	/* 5 1280_720_30_P */
+	{
+		.xres = 1280,	.yres = 720,
+		.pixclock = 13468,
+		.hbp = 260,	.hfp = 1760,
+		.vbp = 20,	.vfp = 10
+	},
+	/* 6 1280_720_24_P */
+	{
+		.xres = 1280,	.yres = 720,
+		.pixclock = 16835,
+		.hbp = 260,	.hfp = 1760,
+		.vbp = 20,	.vfp = 10
+	},
+	/* 7 1280_720_25_P */
+	{
+		.xres = 1280,	.yres = 720,
+		.pixclock = 13468,
+		.hbp = 260,	.hfp = 2420,
+		.vbp = 20,	.vfp = 10
+	},
+	/* 8 1920_1080_30_P */
 	{
 		.xres = 1920,	.yres = 1080,
 		.pixclock = 13468,
 		.hbp = 189,	.hfp = 91,
 		.vbp = 36,	.vfp = 9
 	},
-	/* 1920_1080_24_P */
+	/* 9 1920_1080_24_P */
 	{
 		.xres = 1920,	.yres = 1080,
 		.pixclock = 13468,
 		.hbp = 170,	.hfp = 660,
 		.vbp = 36,	.vfp = 9
 	},
-	/* 1920_1080_25_P */
+	/* 10 1920_1080_25_P */
 	{
 		.xres = 1920,	.yres = 1080,
 		.pixclock = 13468,
 		.hbp = 192,	.hfp = 528,
 		.vbp = 36,	.vfp = 9
 	},
-	/* 720_480_60_I) */
+	/* 11 720_480_60_I */
 	{
 		.xres = 720,	.yres = 480,
 		.pixclock = 74074,
@@ -350,7 +371,7 @@ static struct mcde_video_mode video_modes_supp_hdmi[] = {
 		.vbp = 44,	.vfp = 1,
 		.interlaced = true,
 	},
-	/* 720_576_50_I) */
+	/* 12 720_576_50_I */
 	{
 		.xres = 720,	.yres = 576,
 		.pixclock = 74074,
@@ -358,7 +379,7 @@ static struct mcde_video_mode video_modes_supp_hdmi[] = {
 		.vbp = 44,	.vfp = 5,
 		.interlaced = true,
 	},
-	/* 1920_1080_50_I) */
+	/* 13 1920_1080_50_I */
 	{
 		.xres = 1920,	.yres = 1080,
 		.pixclock = 13468,
@@ -366,7 +387,7 @@ static struct mcde_video_mode video_modes_supp_hdmi[] = {
 		.vbp = 20,	.vfp = 25,
 		.interlaced = true,
 	},
-	/* 1920_1080_60_I) */
+	/* 14 1920_1080_60_I */
 	{
 		.xres = 1920,	.yres = 1080,
 		.pixclock = 13468,
@@ -374,6 +395,78 @@ static struct mcde_video_mode video_modes_supp_hdmi[] = {
 		.vbp = 20,	.vfp = 25,
 		.interlaced = true,
 	},
+	/* 15 VESA #9 800_600_60_P */
+	{
+		.xres = 800,	.yres = 600,
+		.pixclock = 25000,
+		.hbp = 168,	.hfp = 88,
+		.vbp = 23,	.vfp = 5,
+		.interlaced = false,
+	},
+	/* 16 VESA #14 848_480_60_P */
+	{
+		.xres = 848,	.yres = 480,
+		.pixclock = 29630,
+		.hbp = 128,	.hfp = 112,
+		.vbp = 23,	.vfp = 14,
+		.interlaced = false,
+	},
+	/* 17 VESA #16 1024_768_60_P */
+	{
+		.xres = 1024,	.yres = 768,
+		.pixclock = 15385,
+		.hbp = 160,	.hfp = 160,
+		.vbp = 29,	.vfp = 9,
+		.interlaced = false,
+	},
+	/* 18 VESA #22 1280_768_60_P */
+	{
+		.xres = 1280,	.yres = 768,
+		.pixclock = 14652,
+		.hbp = 80,	.hfp = 80,
+		.vbp = 12,	.vfp = 10,
+		.interlaced = false,
+	},
+	/* 19 VESA #23 1280_768_60_P */
+	{
+		.xres = 1280,	.yres = 768,
+		.pixclock = 12579,
+		.hbp = 192,	.hfp = 192,
+		.vbp = 20,	.vfp = 10,
+		.interlaced = false,
+	},
+	/* 20 VESA #27 1280_800_60_P */
+	{
+		.xres = 1280,	.yres = 800,
+		.pixclock = 14085,
+		.hbp = 80,	.hfp = 80,
+		.vbp = 14,	.vfp = 9,
+		.interlaced = false,
+	},
+	/* 21 VESA #28 1280_800_60_P */
+	{
+		.xres = 1280,	.yres = 800,
+		.pixclock = 11976,
+		.hbp = 200,	.hfp = 200,
+		.vbp = 22,	.vfp = 9,
+		.interlaced = false,
+	},
+	/* 22 VESA #39 1360_768_60_P */
+	{
+		.xres = 1360,	.yres = 768,
+		.pixclock = 11696,
+		.hbp = 176,	.hfp = 256,
+		.vbp = 18,	.vfp = 9,
+		.interlaced = false,
+	},
+	/* 23 VESA #81 1366_768_60_P */
+	{
+		.xres = 1366,	.yres = 768,
+		.pixclock = 11662,
+		.hbp = 213,	.hfp = 213,
+		.vbp = 24,	.vfp = 6,
+		.interlaced = false,
+	},
 };
 
 /* Supported TVout modes */
@@ -432,50 +525,115 @@ static struct cea_vesa_video_mode cea_vesa_video_mode[] = {
 			.cea = 1,	.vesa_cea_nr = 19,
 			.video_mode = &video_modes_supp_hdmi[4],
 		},
+		/* 1280_720_30_P */
+		{
+			.cea = 1,	.vesa_cea_nr = 62,
+			.video_mode = &video_modes_supp_hdmi[5],
+		},
+		/* 1280_720_24_P */
+		{
+			.cea = 1,	.vesa_cea_nr = 60,
+			.video_mode = &video_modes_supp_hdmi[6],
+		},
+		/* 1280_720_25_P */
+		{
+			.cea = 1,	.vesa_cea_nr = 61,
+			.video_mode = &video_modes_supp_hdmi[7],
+		},
 		/* 1920_1080_30_P */
 		{
 			.cea = 1,	.vesa_cea_nr = 34,
-			.video_mode = &video_modes_supp_hdmi[5],
+			.video_mode = &video_modes_supp_hdmi[8],
 		},
 		/* 1920_1080_24_P */
 		{
 			.cea = 1,	.vesa_cea_nr = 32,
-			.video_mode = &video_modes_supp_hdmi[6],
+			.video_mode = &video_modes_supp_hdmi[9],
 		},
 		/* 1920_1080_25_P */
 		{
 			.cea = 1,	.vesa_cea_nr = 33,
-			.video_mode = &video_modes_supp_hdmi[7],
+			.video_mode = &video_modes_supp_hdmi[10],
 		},
 		/* 720_480_60_I) */
 		{
 			.cea = 1,	.vesa_cea_nr = 6,
-			.video_mode = &video_modes_supp_hdmi[8],
+			.video_mode = &video_modes_supp_hdmi[11],
 		},
 		/* 720_480_60_I) */
 		{
 			.cea = 1,	.vesa_cea_nr = 7,
-			.video_mode = &video_modes_supp_hdmi[8],
+			.video_mode = &video_modes_supp_hdmi[11],
 		},
 		/* 720_576_50_I) */
 		{
 			.cea = 1,	.vesa_cea_nr = 21,
-			.video_mode = &video_modes_supp_hdmi[9],
+			.video_mode = &video_modes_supp_hdmi[12],
 		},
 		/* 720_576_50_I) */
 		{
 			.cea = 1,	.vesa_cea_nr = 22,
-			.video_mode = &video_modes_supp_hdmi[9],
+			.video_mode = &video_modes_supp_hdmi[12],
 		},
 		/* 1920_1080_50_I) */
 		{
 			.cea = 1,	.vesa_cea_nr = 20,
-			.video_mode = &video_modes_supp_hdmi[10],
+			.video_mode = &video_modes_supp_hdmi[13],
 		},
 		/* 1920_1080_60_I) */
 		{
 			.cea = 1,	.vesa_cea_nr = 5,
-			.video_mode = &video_modes_supp_hdmi[11],
+			.video_mode = &video_modes_supp_hdmi[14],
+		},
+		/* VESA #4 640_480_60_P) */
+		{
+			.cea = 0,	.vesa_cea_nr = 4,
+			.video_mode = &video_modes_supp_hdmi[0],
+		},
+		/* VESA #9 800_600_60_P) */
+		{
+			.cea = 0,	.vesa_cea_nr = 9,
+			.video_mode = &video_modes_supp_hdmi[15],
+		},
+		/* VESA #14 848_480_60_P) */
+		{
+			.cea = 0,	.vesa_cea_nr = 14,
+			.video_mode = &video_modes_supp_hdmi[16],
+		},
+		/* VESA #16 1024_768_60_P) */
+		{
+			.cea = 0,	.vesa_cea_nr = 16,
+			.video_mode = &video_modes_supp_hdmi[17],
+		},
+		/* VESA #22 1280_768_60_P) */
+		{
+			.cea = 0,	.vesa_cea_nr = 22,
+			.video_mode = &video_modes_supp_hdmi[18],
+		},
+		/* VESA #23 1280_768_60_P) */
+		{
+			.cea = 0,	.vesa_cea_nr = 23,
+			.video_mode = &video_modes_supp_hdmi[19],
+		},
+		/* VESA #27 1280_800_60_P) */
+		{
+			.cea = 0,	.vesa_cea_nr = 27,
+			.video_mode = &video_modes_supp_hdmi[20],
+		},
+		/* VESA #28 1280_800_60_P) */
+		{
+			.cea = 0,	.vesa_cea_nr = 28,
+			.video_mode = &video_modes_supp_hdmi[21],
+		},
+		/* VESA #39 1360_768_60_P) */
+		{
+			.cea = 0,	.vesa_cea_nr = 39,
+			.video_mode = &video_modes_supp_hdmi[22],
+		},
+		/* VESA #81 1366_768_60_P) */
+		{
+			.cea = 0,	.vesa_cea_nr = 81,
+			.video_mode = &video_modes_supp_hdmi[23],
 		},
 };
 
-- 
cgit v1.2.3


From dec2e0876946e483e0406266b679a8c7f38e08fc Mon Sep 17 00:00:00 2001
From: Rabin Vincent <rabin.vincent@stericsson.com>
Date: Mon, 16 May 2011 12:43:02 +0530
Subject: mcde: fix build error with !EARLY_SUSPEND

This patch fixes build errors that were introduced by a patch
that added support for triple buffering for HDMI.

ST-Ericsson Linux next: Not tested, ER 282779
ST-Ericsson ID: WP257121
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I6c5b9c7b1f69b949848018248782f2d3ea227ad0
Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/23090
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Reviewed-by: QATEST
Reviewed-by: Marcel TUNNISSEN <marcel.tuennissen@stericsson.com>
---
 drivers/video/mcde/display-generic_dsi.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/video/mcde/display-generic_dsi.c b/drivers/video/mcde/display-generic_dsi.c
index c45885312af..b2d63ba06f7 100644
--- a/drivers/video/mcde/display-generic_dsi.c
+++ b/drivers/video/mcde/display-generic_dsi.c
@@ -246,7 +246,7 @@ static int generic_resume(struct mcde_display_device *ddev)
 			, __func__);
 	ddev->set_synchronized_update(ddev,
 					ddev->get_synchronized_update(ddev));
-	ddev->update(ddev, 0);
+	ddev->update(ddev, false);
 	return ret;
 }
 
-- 
cgit v1.2.3


From 74d04bc6d23c821a472af0892cac80fef6589129 Mon Sep 17 00:00:00 2001
From: Emeric Vigier <emeric.vigier@stericsson.com>
Date: Tue, 17 May 2011 09:50:32 +0200
Subject: video: mcde: Add dss overlay info

This patch adds the possbility to get info about an overlay
via the dss interface.
It will also add the virtual address to the overlay struct.

ST-Ericsson Linux next: not tested, ER 282779
ST-Ericsson ID: 339343
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I2ece60331ccc0075358f4ea820c1dbab1d2402e7
Signed-off-by: Philippe Cornu <philippe.cornu@stericsson.com>
Signed-off-by: Emeric Vigier <emeric.vigier@stericsson.com>
Signed-off-by: Jimmy Rubin <jimmy.rubin@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/23298
Reviewed-by: QATOOLS
Reviewed-by: Per-Daniel OLSSON <per-daniel.olsson@stericsson.com>
Reviewed-by: QATEST
Reviewed-by: Marcel TUNNISSEN <marcel.tuennissen@stericsson.com>
Reviewed-by: Jonas ABERG <jonas.aberg@stericsson.com>
---
 drivers/video/mcde/mcde_dss.c | 7 +++++++
 drivers/video/mcde/mcde_fb.c  | 6 +++++-
 include/video/mcde.h          | 1 +
 include/video/mcde_dss.h      | 2 ++
 4 files changed, 15 insertions(+), 1 deletion(-)

diff --git a/drivers/video/mcde/mcde_dss.c b/drivers/video/mcde/mcde_dss.c
index dd48be74217..2c5e4db20c6 100644
--- a/drivers/video/mcde/mcde_dss.c
+++ b/drivers/video/mcde/mcde_dss.c
@@ -290,6 +290,13 @@ update_failed:
 }
 EXPORT_SYMBOL(mcde_dss_update_overlay);
 
+void mcde_dss_get_overlay_info(struct mcde_overlay *ovly,
+				struct mcde_overlay_info *info) {
+	if (info)
+		*info = ovly->info;
+}
+EXPORT_SYMBOL(mcde_dss_get_overlay_info);
+
 void mcde_dss_get_native_resolution(struct mcde_display_device *ddev,
 	u16 *x_res, u16 *y_res)
 {
diff --git a/drivers/video/mcde/mcde_fb.c b/drivers/video/mcde/mcde_fb.c
index dc0812761c7..cd7dd70101d 100644
--- a/drivers/video/mcde/mcde_fb.c
+++ b/drivers/video/mcde/mcde_fb.c
@@ -316,10 +316,14 @@ static void get_ovly_info(struct fb_info *fbi, struct mcde_overlay *ovly,
 	memset(info, 0, sizeof(*info));
 	info->paddr = fbi->fix.smem_start +
 		fbi->fix.line_length * fbi->var.yoffset;
+	info->vaddr = (u32 *)(fbi->screen_base +
+		fbi->fix.line_length * fbi->var.yoffset);
 	/* TODO: move mem check to check_var/pan_display */
 	if (info->paddr + fbi->fix.line_length * fbi->var.yres >
-		fbi->fix.smem_start + fbi->fix.smem_len)
+		fbi->fix.smem_start + fbi->fix.smem_len) {
 		info->paddr = fbi->fix.smem_start;
+		info->vaddr = (u32 *)fbi->screen_base;
+	}
 	info->fmt = mfb->pix_fmt;
 	info->stride = fbi->fix.line_length;
 	if (ovly) {
diff --git a/include/video/mcde.h b/include/video/mcde.h
index 4803779b36f..7476b7b32f4 100644
--- a/include/video/mcde.h
+++ b/include/video/mcde.h
@@ -277,6 +277,7 @@ struct mcde_rectangle {
 
 struct mcde_overlay_info {
 	u32 paddr;
+	u32 *vaddr;
 	u16 stride; /* buffer line len in bytes */
 	enum mcde_ovly_pix_fmt fmt;
 
diff --git a/include/video/mcde_dss.h b/include/video/mcde_dss.h
index c2603b87235..efed79ad023 100644
--- a/include/video/mcde_dss.h
+++ b/include/video/mcde_dss.h
@@ -30,6 +30,8 @@ int mcde_dss_enable_overlay(struct mcde_overlay *ovl);
 void mcde_dss_disable_overlay(struct mcde_overlay *ovl);
 int mcde_dss_apply_overlay(struct mcde_overlay *ovl,
 						struct mcde_overlay_info *info);
+void mcde_dss_get_overlay_info(struct mcde_overlay *ovly,
+				struct mcde_overlay_info *info);
 int mcde_dss_update_overlay(struct mcde_overlay *ovl, bool tripple_buffer);
 
 void mcde_dss_get_native_resolution(struct mcde_display_device *ddev,
-- 
cgit v1.2.3


From f58c7e826ee6fd9af18808418d42def7bd38cb44 Mon Sep 17 00:00:00 2001
From: Per Persson <per.xb.persson@stericsson.com>
Date: Mon, 16 May 2011 13:56:03 +0200
Subject: video: hdmi: Fix wrong return status

Return status was indicating error when writing a
config command with IOC_HDMI_CONFIGURATION_WRITE.
This is now fixed.

ST-Ericsson ID: 341296
ST-Ericsson Linux next: Not tested, ER 282779
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: Ie780f444cdb4e6f36ed1d8ae3401a96ab58c1640
Signed-off-by: Per Persson <per.xb.persson@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/23544
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Reviewed-by: Marcel TUNNISSEN <marcel.tuennissen@stericsson.com>
Reviewed-by: Jonas ABERG <jonas.aberg@stericsson.com>
---
 drivers/video/av8100/hdmi.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/video/av8100/hdmi.c b/drivers/video/av8100/hdmi.c
index d502b878024..abd467b8d57 100644
--- a/drivers/video/av8100/hdmi.c
+++ b/drivers/video/av8100/hdmi.c
@@ -1718,7 +1718,6 @@ static int hdmi_ioctl(struct file *file,
 	u8 aes_status;
 
 	switch (cmd) {
-
 	case IOC_PLUG_DETECT_ENABLE:
 		if (copy_from_user(&plug_detect, (void *)arg,
 			sizeof(struct plug_detect)))
@@ -2074,11 +2073,12 @@ ioc_hdcploadaes_err:
 
 	case IOC_HDMI_CONFIGURATION_WRITE:
 		if (copy_from_user(&command_reg, (void *)arg,
-			sizeof(struct hdmi_command_register)) != 0) {
+				sizeof(struct hdmi_command_register)) != 0) {
 			dev_err(hdmidev, "IOC_HDMI_CONFIGURATION_WRITE "
 				"fail 1\n");
 			command_reg.return_status = EINVAL;
 		} else {
+			command_reg.return_status = 0;
 			if (av8100_conf_w_raw(command_reg.cmd_id,
 					command_reg.buf_len,
 					command_reg.buf,
@@ -2086,7 +2086,7 @@ ioc_hdcploadaes_err:
 					command_reg.buf) != 0) {
 				dev_err(hdmidev, "IOC_HDMI_CONFIGURATION_WRITE "
 					"fail 2\n");
-			command_reg.return_status = EINVAL;
+				command_reg.return_status = EINVAL;
 			}
 		}
 
-- 
cgit v1.2.3


From b440b6a92e07e3341d25db26a31f1da9fcc35a15 Mon Sep 17 00:00:00 2001
From: Per Persson <per.xb.persson@stericsson.com>
Date: Mon, 23 May 2011 15:11:29 +0200
Subject: arm: ux500: Correct FB height when triple buffer

When triple buffering is enabled, the correct virtual height
shall be used when the frame buffer is dynamicaly created.
Dispdev is removed for HDMI case.
board-u5500-mcde is updated.

ST-Ericsson ID: 341298
ST-Ericsson Linux next: Not tested, ER 282779
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: Id9dac8b436a6013e5bf3a775ef93d99705663fb2
Signed-off-by: Per Persson <per.xb.persson@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/23545
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Reviewed-by: Marcel TUNNISSEN <marcel.tuennissen@stericsson.com>
---
 arch/arm/mach-ux500/board-mop500-mcde.c | 13 ++++++-------
 arch/arm/mach-ux500/board-u5500-mcde.c  | 16 +++++++++++++---
 2 files changed, 19 insertions(+), 10 deletions(-)

diff --git a/arch/arm/mach-ux500/board-mop500-mcde.c b/arch/arm/mach-ux500/board-mop500-mcde.c
index d9b36fcdb81..bf4045f3965 100644
--- a/arch/arm/mach-ux500/board-mop500-mcde.c
+++ b/arch/arm/mach-ux500/board-mop500-mcde.c
@@ -43,7 +43,6 @@ static struct delayed_work work_dispreg_hdmi;
 #endif
 
 #define MCDE_NR_OF_DISPLAYS 3
-static struct mcde_display_device *displays[MCDE_NR_OF_DISPLAYS] = { NULL };
 static int display_initialized_during_boot;
 
 static int __init startup_graphics_setup(char *str)
@@ -419,7 +418,6 @@ static void delayed_work_dispreg_hdmi(struct work_struct *ptr)
 {
 	if (mcde_display_device_register(&av8100_hdmi))
 		pr_warning("Failed to register av8100_hdmi\n");
-	displays[TERTIARY_DISPLAY_ID] = &av8100_hdmi;
 }
 #endif /* CONFIG_DISPLAY_AV8100_TERTIARY */
 
@@ -494,16 +492,20 @@ static int display_postregistered_callback(struct notifier_block *nb,
 			ddev->default_pixel_format,
 			rotate);
 
-		if (IS_ERR(fbi))
+		if (IS_ERR(fbi)) {
 			dev_warn(&ddev->dev,
 				"Failed to create fb for display %s\n",
 						ddev->name);
-		else
+			goto display_postregistered_callback_err;
+		} else
 			dev_info(&ddev->dev, "Framebuffer created (%s)\n",
 						ddev->name);
 	}
 
 	return 0;
+
+display_postregistered_callback_err:
+	return -1;
 }
 
 static struct notifier_block display_nb = {
@@ -648,7 +650,6 @@ int __init init_display_devices(void)
 	ret = mcde_display_device_register(&generic_display0);
 	if (ret)
 		pr_warning("Failed to register generic display device 0\n");
-	displays[0] = &generic_display0;
 #endif
 
 #ifdef CONFIG_DISPLAY_GENERIC_DSI_SECONDARY
@@ -659,7 +660,6 @@ int __init init_display_devices(void)
 	ret = mcde_display_device_register(&generic_subdisplay);
 	if (ret)
 		pr_warning("Failed to register generic sub display device\n");
-	displays[1] = &generic_subdisplay;
 #endif
 
 #ifdef CONFIG_DISPLAY_AV8100_TERTIARY
@@ -673,7 +673,6 @@ int __init init_display_devices(void)
 	ret = mcde_display_device_register(&tvout_ab8500_display);
 	if (ret)
 		pr_warning("Failed to register ab8500 tvout device\n");
-	displays[2] = &tvout_ab8500_display;
 #endif
 
 	return ret;
diff --git a/arch/arm/mach-ux500/board-u5500-mcde.c b/arch/arm/mach-ux500/board-u5500-mcde.c
index eba695e5ed5..d1a49297965 100644
--- a/arch/arm/mach-ux500/board-u5500-mcde.c
+++ b/arch/arm/mach-ux500/board-u5500-mcde.c
@@ -163,7 +163,7 @@ static struct mcde_display_hdmi_platform_data av8100_hdmi_pdata = {
 			{0xffda, 0xffb6, 0x70},
 			{0x70, 0xffa2, 0xffee},
 		},
-		.offset = {0x80, 0x10, 0x80},
+		.offset = {0x10, 0x80, 0x80},
 	}
 };
 
@@ -234,11 +234,17 @@ static int display_postregistered_callback(struct notifier_block *nb,
 
 	virtual_width = width;
 	virtual_height = height * 2;
+
 #ifdef CONFIG_DISPLAY_GENERIC_DSI_PRIMARY_AUTO_SYNC
 	if (ddev->id == PRIMARY_DISPLAY_ID)
 		virtual_height = height;
 #endif
 
+#ifdef CONFIG_DISPLAY_AV8100_TRIPPLE_BUFFER
+	if (ddev->id == TERTIARY_DISPLAY_ID)
+		virtual_height = height * 3;
+#endif
+
 	if (ddev->id == TERTIARY_DISPLAY_ID) {
 #ifdef CONFIG_MCDE_DISPLAY_HDMI_FB_AUTO_CREATE
 		hdmi_fb_onoff(ddev, 1, 0, 0);
@@ -251,16 +257,20 @@ static int display_postregistered_callback(struct notifier_block *nb,
 			ddev->default_pixel_format,
 			rotate);
 
-		if (IS_ERR(fbi))
+		if (IS_ERR(fbi)) {
 			dev_warn(&ddev->dev,
 				"Failed to create fb for display %s\n",
 						ddev->name);
-		else
+			goto display_postregistered_callback_err;
+		} else
 			dev_info(&ddev->dev, "Framebuffer created (%s)\n",
 						ddev->name);
 	}
 
 	return 0;
+
+display_postregistered_callback_err:
+	return -1;
 }
 
 static struct notifier_block display_nb = {
-- 
cgit v1.2.3


From b8ea6441fb895e36269d3c0574a15bd246572a30 Mon Sep 17 00:00:00 2001
From: Philippe Langlais <philippe.langlais@stericsson.com>
Date: Wed, 19 Oct 2011 14:41:58 +0200
Subject: video: mcde: improve display configuration

Makes it possible to configure both AB8500 and AV8100 displays as long
as the MCDE channels are available. Also fixes build problems if main
display is not configured or if no display is configured, and fixes
configuration problems with TV out through AB8500.

Depends-On: Id9dac8b436a6013e5bf3a775ef93d99705663fb2

ST-Ericsson ID: 269500
ST-Ericsson Linux next: Not tested, ER 282779
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I57ad75c81ade899c3063033dfe0c81c644fc41c6
Signed-off-by: Marcel Tunnissen <Marcel.Tuennissen@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/21817
Tested-by: Marcel TUNNISSEN <marcel.tuennissen@stericsson.com>
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Reviewed-by: QATOOLS
Reviewed-by: Marcel TUNNISSEN <marcel.tuennissen@stericsson.com>
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
Reviewed-by: Jonas ABERG <jonas.aberg@stericsson.com>

fixmr to merge with video: mcde: improve display configuration 8d74729c8d5f7308ae7ca81f56ddd8811c3435ee
---
 arch/arm/mach-ux500/Kconfig-arch        |  2 +-
 arch/arm/mach-ux500/board-mop500-mcde.c | 26 +++++++++++++++-----------
 arch/arm/mach-ux500/board-u5500-mcde.c  | 17 ++++++++++-------
 3 files changed, 26 insertions(+), 19 deletions(-)

diff --git a/arch/arm/mach-ux500/Kconfig-arch b/arch/arm/mach-ux500/Kconfig-arch
index d16bf788392..580566baf99 100644
--- a/arch/arm/mach-ux500/Kconfig-arch
+++ b/arch/arm/mach-ux500/Kconfig-arch
@@ -138,7 +138,7 @@ config DISPLAY_AB8500_TERTIARY
 
 config DISPLAY_AV8100_TERTIARY
 	bool "AV8100 HDMI/CVBS display support"
-	depends on (MACH_U8500_MOP || MACH_U5500)
+	depends on (MACH_U8500 || MACH_U5500)
 	select MCDE_DISPLAY_AV8100
 	help
 	  Say yes here if HDMI output support
diff --git a/arch/arm/mach-ux500/board-mop500-mcde.c b/arch/arm/mach-ux500/board-mop500-mcde.c
index bf4045f3965..56201ccfffc 100644
--- a/arch/arm/mach-ux500/board-mop500-mcde.c
+++ b/arch/arm/mach-ux500/board-mop500-mcde.c
@@ -29,10 +29,6 @@
 #define DSI_UNIT_INTERVAL_1	0x9
 #define DSI_UNIT_INTERVAL_2	0x5
 
-#define PRIMARY_DISPLAY_ID	0
-#define SECONDARY_DISPLAY_ID	1
-#define TERTIARY_DISPLAY_ID	2
-
 #ifdef CONFIG_FB_MCDE
 
 /* The initialization of hdmi disp driver must be delayed in order to
@@ -42,7 +38,13 @@ static struct delayed_work work_dispreg_hdmi;
 #define DISPREG_HDMI_DELAY 6000
 #endif
 
-#define MCDE_NR_OF_DISPLAYS 3
+enum {
+	PRIMARY_DISPLAY_ID,
+	SECONDARY_DISPLAY_ID,
+	AV8100_DISPLAY_ID,
+	AB8500_DISPLAY_ID,
+	MCDE_NR_OF_DISPLAYS
+};
 static int display_initialized_during_boot;
 
 static int __init startup_graphics_setup(char *str)
@@ -327,7 +329,7 @@ failed:
 
 struct mcde_display_device tvout_ab8500_display = {
 	.name = "mcde_tv_ab8500",
-	.id = TERTIARY_DISPLAY_ID,
+	.id = AB8500_DISPLAY_ID,
 	.port = &port_tvout1,
 	.chnl_id = MCDE_CHNL_B,
 	.fifo = MCDE_FIFO_B,
@@ -399,7 +401,7 @@ static struct mcde_display_hdmi_platform_data av8100_hdmi_pdata = {
 
 static struct mcde_display_device av8100_hdmi = {
 	.name = "av8100_hdmi",
-	.id = TERTIARY_DISPLAY_ID,
+	.id = AV8100_DISPLAY_ID,
 	.port = &port2,
 	.chnl_id = MCDE_CHNL_B,
 	.fifo = MCDE_FIFO_B,
@@ -465,22 +467,24 @@ static int display_postregistered_callback(struct notifier_block *nb,
 	virtual_width = width;
 	virtual_height = height * 2;
 
-#ifdef CONFIG_DISPLAY_GENERIC_DSI_PRIMARY_AUTO_SYNC
+#if defined(CONFIG_DISPLAY_GENERIC_DSI_PRIMARY) &&	\
+			defined(CONFIG_DISPLAY_GENERIC_DSI_PRIMARY_AUTO_SYNC)
 	if (ddev->id == PRIMARY_DISPLAY_ID)
 		virtual_height = height;
 #endif
 
-#ifdef CONFIG_DISPLAY_GENERIC_DSI_SECONDARY_AUTO_SYNC
+#if defined(CONFIG_DISPLAY_GENERIC_DSI_SECONDARY) &&	\
+			defined(CONFIG_DISPLAY_GENERIC_DSI_SECONDARY_AUTO_SYNC)
 	if (ddev->id == SECONDARY_DISPLAY_ID)
 		virtual_height = height;
 #endif
 
 #ifdef CONFIG_DISPLAY_AV8100_TRIPPLE_BUFFER
-	if (ddev->id == TERTIARY_DISPLAY_ID)
+	if (ddev->id == AV8100_DISPLAY_ID)
 		virtual_height = height * 3;
 #endif
 
-	if (ddev->id == TERTIARY_DISPLAY_ID) {
+	if (ddev->id == AV8100_DISPLAY_ID) {
 #ifdef CONFIG_MCDE_DISPLAY_HDMI_FB_AUTO_CREATE
 		hdmi_fb_onoff(ddev, 1, 0, 0);
 #endif /* CONFIG_MCDE_DISPLAY_HDMI_FB_AUTO_CREATE */
diff --git a/arch/arm/mach-ux500/board-u5500-mcde.c b/arch/arm/mach-ux500/board-u5500-mcde.c
index d1a49297965..7394058881d 100644
--- a/arch/arm/mach-ux500/board-u5500-mcde.c
+++ b/arch/arm/mach-ux500/board-u5500-mcde.c
@@ -22,7 +22,7 @@
 #define DSI_UNIT_INTERVAL_2	0x5
 
 #define PRIMARY_DISPLAY_ID	0
-#define TERTIARY_DISPLAY_ID	1
+#define AV8100_DISPLAY_ID	2
 
 #ifdef CONFIG_FB_MCDE
 
@@ -63,7 +63,8 @@ static struct mcde_port port0 = {
 	.pixel_format = MCDE_PORTPIXFMT_DSI_24BPP,
 	.ifc = DSI_VIDEO_MODE,
 	.link = 0,
-#ifdef CONFIG_DISPLAY_GENERIC_DSI_PRIMARY_AUTO_SYNC
+#if defined(CONFIG_DISPLAY_GENERIC_DSI_PRIMARY) &&	\
+			defined(CONFIG_DISPLAY_GENERIC_DSI_PRIMARY_AUTO_SYNC)
 	.sync_src = MCDE_SYNCSRC_OFF,
 	.update_auto_trig = true,
 #else
@@ -169,7 +170,7 @@ static struct mcde_display_hdmi_platform_data av8100_hdmi_pdata = {
 
 static struct mcde_display_device av8100_hdmi = {
 	.name = "av8100_hdmi",
-	.id = TERTIARY_DISPLAY_ID,
+	.id = AV8100_DISPLAY_ID,
 	.port = &port2,
 	.chnl_id = MCDE_CHNL_B,
 	.fifo = MCDE_FIFO_B,
@@ -235,17 +236,18 @@ static int display_postregistered_callback(struct notifier_block *nb,
 	virtual_width = width;
 	virtual_height = height * 2;
 
-#ifdef CONFIG_DISPLAY_GENERIC_DSI_PRIMARY_AUTO_SYNC
+#if defined(CONFIG_DISPLAY_GENERIC_DSI_PRIMARY) &&	\
+			defined(CONFIG_DISPLAY_GENERIC_DSI_PRIMARY_AUTO_SYNC)
 	if (ddev->id == PRIMARY_DISPLAY_ID)
 		virtual_height = height;
 #endif
 
 #ifdef CONFIG_DISPLAY_AV8100_TRIPPLE_BUFFER
-	if (ddev->id == TERTIARY_DISPLAY_ID)
+	if (ddev->id == AV8100_DISPLAY_ID)
 		virtual_height = height * 3;
 #endif
 
-	if (ddev->id == TERTIARY_DISPLAY_ID) {
+	if (ddev->id == AV8100_DISPLAY_ID) {
 #ifdef CONFIG_MCDE_DISPLAY_HDMI_FB_AUTO_CREATE
 		hdmi_fb_onoff(ddev, 1, 0, 0);
 #endif /* CONFIG_MCDE_DISPLAY_HDMI_FB_AUTO_CREATE */
@@ -283,7 +285,8 @@ static struct notifier_block display_nb = {
 * The main display will not be updated if startup graphics is displayed
 * from u-boot.
 */
-#ifdef CONFIG_DISPLAY_GENERIC_DSI_PRIMARY_AUTO_SYNC
+#if defined(CONFIG_DISPLAY_GENERIC_DSI_PRIMARY) &&	\
+			defined(CONFIG_DISPLAY_GENERIC_DSI_PRIMARY_AUTO_SYNC)
 static int framebuffer_postregistered_callback(struct notifier_block *nb,
 	unsigned long event, void *data)
 {
-- 
cgit v1.2.3


From 0891ff74e160f27f534c34f89fdbb1e343524669 Mon Sep 17 00:00:00 2001
From: Marcel Tunnissen <Marcel.Tuennissen@stericsson.com>
Date: Tue, 10 May 2011 12:00:52 +0200
Subject: video: mcde: Support YUV 422 overlay pixel format

This patch adds support for converting an overlay with YUV 422 pixel
format.

ST-Ericsson ID: 339423
ST-Ericsson Linux next: Not tested, ER 282779
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I5a8536c12f12b6cf69f7053cc236e274d13295b4
Signed-off-by: Marcel Tunnissen <Marcel.Tuennissen@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/22867
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Tested-by: Marcel TUNNISSEN <marcel.tuennissen@stericsson.com>
Reviewed-by: QATOOLS
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
---
 arch/arm/mach-ux500/board-mop500-mcde.c |  30 +++---
 arch/arm/mach-ux500/board-u5500-mcde.c  |  20 ++--
 drivers/video/mcde/display-ab8500.c     |   6 +-
 drivers/video/mcde/display-av8100.c     |   6 +-
 drivers/video/mcde/mcde_hw.c            | 176 +++++++++++++++++++++++++-------
 include/video/mcde.h                    |  14 ++-
 include/video/mcde_display-ab8500.h     |   2 +-
 include/video/mcde_display-av8100.h     |   2 +-
 8 files changed, 186 insertions(+), 70 deletions(-)

diff --git a/arch/arm/mach-ux500/board-mop500-mcde.c b/arch/arm/mach-ux500/board-mop500-mcde.c
index 56201ccfffc..b553ba9db2c 100644
--- a/arch/arm/mach-ux500/board-mop500-mcde.c
+++ b/arch/arm/mach-ux500/board-mop500-mcde.c
@@ -67,6 +67,18 @@ static int __init startup_graphics_setup(char *str)
 }
 __setup("startup_graphics=", startup_graphics_setup);
 
+#if defined(CONFIG_DISPLAY_AB8500_TERTIARY) ||\
+					defined(CONFIG_DISPLAY_AV8100_TERTIARY)
+static struct mcde_col_transform rgb_2_yCbCr_transform = {
+	.matrix = {
+		{0x0042, 0x0081, 0x0019},
+		{0xffda, 0xffb6, 0x0070},
+		{0x0070, 0xffa2, 0xffee},
+	},
+	.offset = {0x10, 0x80, 0x80},
+};
+#endif
+
 #ifdef CONFIG_DISPLAY_GENERIC_DSI_PRIMARY
 static struct mcde_port port0 = {
 	.type = MCDE_PORTTYPE_DSI,
@@ -277,14 +289,7 @@ static struct mcde_port port_tvout1 = {
 static struct ab8500_display_platform_data ab8500_display_pdata = {
 	.nr_regulators = 2,
 	.regulator_id  = {"v-tvout", "v-ab8500-AV-switch"},
-	.rgb_2_yCbCr_transform = {
-		.matrix = {
-			{0x42, 0x81, 0x19},
-			{0xffda, 0xffb6, 0x70},
-			{0x70, 0xffa2, 0xffee},
-		},
-		.offset = {0x10, 0x80, 0x80},
-	}
+	.rgb_2_yCbCr_transform = &rgb_2_yCbCr_transform,
 };
 
 static struct ux500_pins *tvout_pins;
@@ -389,14 +394,7 @@ static struct mcde_display_hdmi_platform_data av8100_hdmi_pdata = {
 	.regulator_id = NULL, /* TODO: "display_main" */
 	.cvbs_regulator_id = "v-av8100-AV-switch",
 	.ddb_id = 1,
-	.rgb_2_yCbCr_transform = {
-		.matrix = {
-			{0x42, 0x81, 0x19},
-			{0xffda, 0xffb6, 0x70},
-			{0x70, 0xffa2, 0xffee},
-		},
-		.offset = {0x10, 0x80, 0x80},
-	}
+	.rgb_2_yCbCr_transform = &rgb_2_yCbCr_transform,
 };
 
 static struct mcde_display_device av8100_hdmi = {
diff --git a/arch/arm/mach-ux500/board-u5500-mcde.c b/arch/arm/mach-ux500/board-u5500-mcde.c
index 7394058881d..6c3bbe606fe 100644
--- a/arch/arm/mach-ux500/board-u5500-mcde.c
+++ b/arch/arm/mach-ux500/board-u5500-mcde.c
@@ -56,6 +56,17 @@ static int __init startup_graphics_setup(char *str)
 }
 __setup("startup_graphics=", startup_graphics_setup);
 
+#ifdef CONFIG_DISPLAY_AV8100_TERTIARY
+static struct mcde_col_transform rgb_2_yCbCr_transform = {
+	.matrix = {
+		{0x0042, 0x0081, 0x0019},
+		{0xffda, 0xffb6, 0x0070},
+		{0x0070, 0xffa2, 0xffee},
+	},
+	.offset = {0x10, 0x80, 0x80},
+};
+#endif
+
 #ifdef CONFIG_DISPLAY_GENERIC_DSI_PRIMARY
 static struct mcde_port port0 = {
 	.type = MCDE_PORTTYPE_DSI,
@@ -158,14 +169,7 @@ static struct mcde_display_hdmi_platform_data av8100_hdmi_pdata = {
 	.regulator_id = NULL,
 	.cvbs_regulator_id = "v-av8100-AV-switch",
 	.ddb_id = 1,
-	.rgb_2_yCbCr_transform = {
-		.matrix = {
-			{0x42, 0x81, 0x19},
-			{0xffda, 0xffb6, 0x70},
-			{0x70, 0xffa2, 0xffee},
-		},
-		.offset = {0x10, 0x80, 0x80},
-	}
+	.rgb_2_yCbCr_transform = &rgb_2_yCbCr_transform,
 };
 
 static struct mcde_display_device av8100_hdmi = {
diff --git a/drivers/video/mcde/display-ab8500.c b/drivers/video/mcde/display-ab8500.c
index bd6126d8a20..5d7f1bb92a6 100644
--- a/drivers/video/mcde/display-ab8500.c
+++ b/drivers/video/mcde/display-ab8500.c
@@ -337,8 +337,10 @@ static int set_video_mode(
 	driver_data->denc_conf.act_dc_output	= true;
 
 	set_power_mode(ddev, MCDE_DISPLAY_PM_STANDBY);
-	mcde_chnl_set_col_convert(ddev->chnl_state,
-						&pdata->rgb_2_yCbCr_transform);
+	if (pdata->rgb_2_yCbCr_transform)
+		mcde_chnl_set_col_convert(ddev->chnl_state,
+						pdata->rgb_2_yCbCr_transform,
+						MCDE_CONVERT_RGB_2_YCBCR);
 	mcde_chnl_stop_flow(ddev->chnl_state);
 	res = mcde_chnl_set_video_mode(ddev->chnl_state, &ddev->video_mode);
 	if (res < 0) {
diff --git a/drivers/video/mcde/display-av8100.c b/drivers/video/mcde/display-av8100.c
index d5e1857a290..9134e4bf33f 100644
--- a/drivers/video/mcde/display-av8100.c
+++ b/drivers/video/mcde/display-av8100.c
@@ -823,9 +823,11 @@ static int hdmi_set_video_mode(
 	memset(&(dev->video_mode), 0, sizeof(struct mcde_video_mode));
 	memcpy(&(dev->video_mode), video_mode, sizeof(struct mcde_video_mode));
 
-	if (dev->port->pixel_format == MCDE_PORTPIXFMT_DSI_YCBCR422)
+	if (dev->port->pixel_format == MCDE_PORTPIXFMT_DSI_YCBCR422 &&
+						pdata->rgb_2_yCbCr_transform)
 		mcde_chnl_set_col_convert(dev->chnl_state,
-						&pdata->rgb_2_yCbCr_transform);
+						pdata->rgb_2_yCbCr_transform,
+						MCDE_CONVERT_RGB_2_YCBCR);
 	mcde_chnl_stop_flow(dev->chnl_state);
 
 	ret = mcde_chnl_set_video_mode(dev->chnl_state, &dev->video_mode);
diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index 05759bffd94..c320670b5dd 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -266,6 +266,10 @@ struct mcde_chnl_state {
 	u32 rotbuf1;
 	u32 rotbuf2;
 
+	struct mcde_col_transform rgb_2_ycbcr;
+	struct mcde_col_transform ycbcr_2_rgb;
+	struct mcde_col_transform *transform;
+
 	/* Blending */
 	u8 blend_ctrl;
 	bool blend_en;
@@ -1306,6 +1310,82 @@ clk_dpi_err:
 	return -EINVAL;
 }
 
+void mcde_chnl_col_convert_apply(struct mcde_chnl_state *chnl,
+					struct mcde_col_transform *transform)
+{
+	dev_vdbg(&mcde_dev->dev, "%s\n", __func__);
+
+	if (chnl->transform != transform) {
+
+		chnl->col_regs.y_red     = transform->matrix[0][0];
+		chnl->col_regs.y_green   = transform->matrix[0][1];
+		chnl->col_regs.y_blue    = transform->matrix[0][2];
+		chnl->col_regs.cb_red    = transform->matrix[1][0];
+		chnl->col_regs.cb_green  = transform->matrix[1][1];
+		chnl->col_regs.cb_blue   = transform->matrix[1][2];
+		chnl->col_regs.cr_red    = transform->matrix[2][0];
+		chnl->col_regs.cr_green  = transform->matrix[2][1];
+		chnl->col_regs.cr_blue   = transform->matrix[2][2];
+		chnl->col_regs.off_y     = transform->offset[0];
+		chnl->col_regs.off_cb    = transform->offset[1];
+		chnl->col_regs.off_cr    = transform->offset[2];
+
+		chnl->transform = transform;
+	}
+
+	dev_vdbg(&mcde_dev->dev, "%s exit\n", __func__);
+}
+
+static void chnl_ovly_pixel_format_apply(struct mcde_chnl_state *chnl,
+						struct mcde_ovly_state *ovly)
+{
+	struct mcde_port *port = &chnl->port;
+	struct ovly_regs *regs = &ovly->regs;
+
+	/* Note: YUV -> YUV: blending YUV overlays will not make sense. */
+	static struct mcde_col_transform crycb_2_ycbcr = {
+		/* Note that in MCDE YUV 422 pixels come as VYU pixels */
+		.matrix = {
+			{0x0000, 0x0100, 0x0000},
+			{0x0000, 0x0000, 0x0100},
+			{0x0100, 0x0000, 0x0000},
+		},
+		.offset = {0, 0, 0},
+	};
+
+	if (port->type == MCDE_PORTTYPE_DSI) {
+		if (port->pixel_format != MCDE_PORTPIXFMT_DSI_YCBCR422) {
+			if (ovly->pix_fmt != MCDE_OVLYPIXFMT_YCbCr422) {
+				/* standard case: DSI: RGB -> RGB */
+				regs->col_conv = MCDE_OVL0CR_COLCCTRL_DISABLED;
+			} else {
+				/* DSI: YUV -> RGB */
+				/* TODO change matrix */
+				regs->col_conv =
+					MCDE_OVL0CR_COLCCTRL_ENABLED_SAT;
+				mcde_chnl_col_convert_apply(chnl,
+							&chnl->ycbcr_2_rgb);
+			}
+		} else {
+			if (ovly->pix_fmt != MCDE_OVLYPIXFMT_YCbCr422)
+				/* DSI: RGB -> YUV */
+				mcde_chnl_col_convert_apply(chnl,
+							&chnl->rgb_2_ycbcr);
+			else
+				/* DSI: YUV -> YUV */
+				mcde_chnl_col_convert_apply(chnl,
+							&crycb_2_ycbcr);
+			regs->col_conv = MCDE_OVL0CR_COLCCTRL_ENABLED_NO_SAT;
+		}
+	} else if (port->type == MCDE_PORTTYPE_DPI && port->phy.dpi.tv_mode) {
+		regs->col_conv = MCDE_OVL0CR_COLCCTRL_ENABLED_NO_SAT;
+		if (ovly->pix_fmt != MCDE_OVLYPIXFMT_YCbCr422)
+			mcde_chnl_col_convert_apply(chnl, &chnl->rgb_2_ycbcr);
+		else
+			mcde_chnl_col_convert_apply(chnl, &crycb_2_ycbcr);
+	}
+}
+
 /* REVIEW: Make update_* an mcde_rectangle? */
 static void update_overlay_registers(u8 idx, struct ovly_regs *regs,
 			struct mcde_port *port, enum mcde_fifo fifo,
@@ -1330,25 +1410,13 @@ static void update_overlay_registers(u8 idx, struct ovly_regs *regs,
 	}
 
 	/*
-	* TODO: Preferably most of this is done in some apply function instead
-	* of every update. Problem is however that at overlay apply
-	* there is no port type info available (and the question is
-	* whether it is appropriate to add a port type there).
-	* Note that lpf has a dependency on update_y.
-	*/
-	if (port->type == MCDE_PORTTYPE_DPI && port->phy.dpi.tv_mode)
-		/* REVIEW: Why not for DSI? enable in regs? */
-		regs->col_conv = MCDE_OVL0CR_COLCCTRL_ENABLED_NO_SAT;
-	else if (port->type == MCDE_PORTTYPE_DSI) {
-		if (port->pixel_format == MCDE_PORTPIXFMT_DSI_YCBCR422)
-			regs->col_conv = MCDE_OVL0CR_COLCCTRL_ENABLED_NO_SAT;
-		else
-			regs->col_conv = MCDE_OVL0CR_COLCCTRL_DISABLED;
-		if (interlaced) {
-			nr_of_bufs = 2;
-			lpf = lpf / 2;
-			ljinc *= 2;
-		}
+	 * Preferably most of this is done in some apply function instead of for
+	 * every update. However lpf has a dependency on update_y.
+	 */
+	if (interlaced && port->type == MCDE_PORTTYPE_DSI) {
+		nr_of_bufs = 2;
+		lpf = lpf / 2;
+		ljinc *= 2;
 	}
 
 	fifo_size = get_output_fifo_size(fifo);
@@ -2205,6 +2273,25 @@ static struct mcde_chnl_state *_mcde_chnl_get(enum mcde_chnl chnl_id,
 	enum mcde_chnl_path path;
 	const struct chnl_config *cfg = NULL;
 
+	static struct mcde_col_transform ycbcr_2_rgb = {
+		/* Note that in MCDE YUV 422 pixels come as VYU pixels */
+		.matrix = {
+			{0xff30, 0x012a, 0xff9c},
+			{0x0000, 0x012a, 0x0204},
+			{0x0199, 0x012a, 0x0000},
+		},
+		.offset = {0x0088, 0xfeeb, 0xff21},
+	};
+
+	static struct mcde_col_transform rgb_2_ycbcr = {
+		.matrix = {
+			{0x0042, 0x0081, 0x0019},
+			{0xffda, 0xffb6, 0x0070},
+			{0x0070, 0xffa2, 0xffee},
+		},
+		.offset = {0x0010, 0x0080, 0x0080},
+	};
+
 	/* Allocate channel */
 	for (i = 0; i < num_channels; i++) {
 		if (chnl_id == channels[i].id)
@@ -2242,6 +2329,8 @@ static struct mcde_chnl_state *_mcde_chnl_get(enum mcde_chnl chnl_id,
 	chnl->port = *port;
 	chnl->fifo = fifo;
 	chnl->formatter_updated = false;
+	chnl->ycbcr_2_rgb = ycbcr_2_rgb;
+	chnl->rgb_2_ycbcr = rgb_2_ycbcr;
 
 	chnl->blend_en = true;
 	chnl->blend_ctrl = MCDE_CRA0_BLENDCTRL_SOURCE;
@@ -2439,6 +2528,7 @@ static void chnl_update_overlay(struct mcde_chnl_state *chnl,
 
 	update_overlay_registers_on_the_fly(ovly->idx, &ovly->regs);
 	if (ovly->regs.update) {
+		chnl_ovly_pixel_format_apply(chnl, ovly);
 		update_overlay_registers(ovly->idx, &ovly->regs, &chnl->port,
 			chnl->fifo, chnl->regs.x, chnl->regs.y,
 			chnl->regs.ppl, chnl->regs.lpf, ovly->stride,
@@ -2540,24 +2630,36 @@ int mcde_chnl_set_palette(struct mcde_chnl_state *chnl,
 }
 
 void mcde_chnl_set_col_convert(struct mcde_chnl_state *chnl,
-					struct mcde_col_convert *col_convert)
-{
-	dev_vdbg(&mcde_dev->dev, "%s\n", __func__);
-
-	chnl->col_regs.y_red     = col_convert->matrix[0][0];
-	chnl->col_regs.y_green   = col_convert->matrix[0][1];
-	chnl->col_regs.y_blue    = col_convert->matrix[0][2];
-	chnl->col_regs.cb_red    = col_convert->matrix[1][0];
-	chnl->col_regs.cb_green  = col_convert->matrix[1][1];
-	chnl->col_regs.cb_blue   = col_convert->matrix[1][2];
-	chnl->col_regs.cr_red    = col_convert->matrix[2][0];
-	chnl->col_regs.cr_green  = col_convert->matrix[2][1];
-	chnl->col_regs.cr_blue   = col_convert->matrix[2][2];
-	chnl->col_regs.off_y     = col_convert->offset[0];
-	chnl->col_regs.off_cb    = col_convert->offset[1];
-	chnl->col_regs.off_cr    = col_convert->offset[2];
-
-	dev_vdbg(&mcde_dev->dev, "%s exit\n", __func__);
+					struct mcde_col_transform *transform,
+					enum   mcde_col_convert    convert)
+{
+	switch (convert) {
+	case MCDE_CONVERT_RGB_2_YCBCR:
+		memcpy(&chnl->rgb_2_ycbcr, transform,
+				sizeof(struct mcde_col_transform));
+		/* force update: */
+		if (chnl->transform == &chnl->rgb_2_ycbcr) {
+			chnl->transform = NULL;
+			chnl->ovly0->update = true;
+			chnl->ovly1->update = true;
+		}
+		break;
+	case MCDE_CONVERT_YCBCR_2_RGB:
+		memcpy(&chnl->ycbcr_2_rgb, transform,
+				sizeof(struct mcde_col_transform));
+		/* force update: */
+		if (chnl->transform == &chnl->ycbcr_2_rgb) {
+			chnl->transform = NULL;
+			chnl->ovly0->update = true;
+			chnl->ovly1->update = true;
+		}
+		break;
+	default:
+		/* Trivial transforms are handled internally */
+		dev_warn(&mcde_dev->dev,
+			"%s: unsupported col convert\n", __func__);
+		break;
+	}
 }
 
 int mcde_chnl_set_video_mode(struct mcde_chnl_state *chnl,
diff --git a/include/video/mcde.h b/include/video/mcde.h
index 7476b7b32f4..97eeef01c19 100644
--- a/include/video/mcde.h
+++ b/include/video/mcde.h
@@ -141,7 +141,14 @@ enum mcde_hdmi_sdtv_switch {
 	DVI_SWITCH
 };
 
-struct mcde_col_convert {
+enum mcde_col_convert {
+	MCDE_CONVERT_RGB_2_RGB,
+	MCDE_CONVERT_RGB_2_YCBCR,
+	MCDE_CONVERT_YCBCR_2_RGB,
+	MCDE_CONVERT_YCBCR_2_YCBCR,
+};
+
+struct mcde_col_transform {
 	u16 matrix[3][3];
 	u16 offset[3];
 };
@@ -197,7 +204,7 @@ enum mcde_ovly_pix_fmt {
 	MCDE_OVLYPIXFMT_RGB888   = 4,
 	MCDE_OVLYPIXFMT_RGBX8888 = 5,
 	MCDE_OVLYPIXFMT_RGBA8888 = 6,
-	MCDE_OVLYPIXFMT_YCbCr422 = 7,/* REVIEW: Capitalize */
+	MCDE_OVLYPIXFMT_YCbCr422 = 7,
 };
 
 /* Display power modes */
@@ -320,7 +327,8 @@ int mcde_chnl_set_pixel_format(struct mcde_chnl_state *chnl,
 int mcde_chnl_set_palette(struct mcde_chnl_state *chnl,
 					struct mcde_palette_table *palette);
 void mcde_chnl_set_col_convert(struct mcde_chnl_state *chnl,
-					struct mcde_col_convert *col_convert);
+					struct mcde_col_transform *transform,
+					enum   mcde_col_convert    convert);
 int mcde_chnl_set_video_mode(struct mcde_chnl_state *chnl,
 					struct mcde_video_mode *vmode);
 /* TODO: Remove rotbuf* parameters when ESRAM allocator is implemented*/
diff --git a/include/video/mcde_display-ab8500.h b/include/video/mcde_display-ab8500.h
index 336fe441f42..ffebe62af92 100644
--- a/include/video/mcde_display-ab8500.h
+++ b/include/video/mcde_display-ab8500.h
@@ -15,7 +15,7 @@
 
 struct ab8500_display_platform_data {
 	/* Platform info */
-	struct mcde_col_convert rgb_2_yCbCr_transform;
+	struct mcde_col_transform *rgb_2_yCbCr_transform;
 	int nr_regulators;
 	const char *regulator_id[];
 };
diff --git a/include/video/mcde_display-av8100.h b/include/video/mcde_display-av8100.h
index b0bbc02c1f8..52578a675f1 100644
--- a/include/video/mcde_display-av8100.h
+++ b/include/video/mcde_display-av8100.h
@@ -32,7 +32,7 @@ struct mcde_display_hdmi_platform_data {
 	const char *cvbs_regulator_id;
 	int reset_delay; /* ms */
 	u32 ddb_id;
-	struct mcde_col_convert rgb_2_yCbCr_transform;
+	struct mcde_col_transform *rgb_2_yCbCr_transform;
 
 	/* Driver data */ /* TODO: move to driver data instead */
 	bool hdmi_platform_enable;
-- 
cgit v1.2.3


From d247af1582448eae983a0f9c390680066f8aac3c Mon Sep 17 00:00:00 2001
From: Philippe Langlais <philippe.langlais@stericsson.com>
Date: Fri, 14 Oct 2011 12:01:19 +0200
Subject: arm: ux500: common dbx500 prcmu driver api

This patch updates the PRCMU driver API to be the same
(as far as possible) in U8500 and U4500.

- <mach/prcmu-fw-api.h> has been renamed <mach/prcmu.h>.
- The platform specific APIs have moved to <mach/prcmu-db5500.h>
  and <mach/prcmu-db8500.h> (but these should not be directly
  included).
- The PRCMU QoS API has been put in <mach/prcmu-qos.h>.

ST Ericsson ID: 334772
ST Ericsson FOSS-OUT ID: trivial
ST Ericsson Linux next: 318371

Change-Id: I6ce117ec35ebf2e987178ccacce09afb554d2736
Signed-off-by: Mattias Nilsson <mattias.i.nilsson@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/23863
Reviewed-by: Jonas ABERG <jonas.aberg@stericsson.com>
---
 drivers/video/av8100/av8100.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/video/av8100/av8100.c b/drivers/video/av8100/av8100.c
index c3733c0ea40..a5e2bf4e731 100644
--- a/drivers/video/av8100/av8100.c
+++ b/drivers/video/av8100/av8100.c
@@ -27,7 +27,7 @@
 #include <linux/slab.h>
 #include <linux/clk.h>
 #include <linux/regulator/consumer.h>
-#include <mach/prcmu-fw-api.h>
+#include <mach/prcmu.h>
 
 #include "av8100_regs.h"
 #include <video/av8100.h>
-- 
cgit v1.2.3


From e96c0664f6ae97c1ab5d75978d99c6fa15bc9120 Mon Sep 17 00:00:00 2001
From: Jimmy Rubin <jimmy.rubin@stericsson.com>
Date: Thu, 19 May 2011 11:21:13 +0200
Subject: ux500: mcde: Use 24 bpp overlay for HDMI

This patch will change the framebuffer bpp from 16 to 24.

ST-Ericsson ID: 326691
ST-Ericsson Linux next: Not tested, ER 282779
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I094c3845803f4c969b0f19bdae007aa85bebd495
Signed-off-by: Jimmy Rubin <jimmy.rubin@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/23411
Reviewed-by: QATOOLS
Reviewed-by: QATEST
Reviewed-by: Per-Daniel OLSSON <per-daniel.olsson@stericsson.com>
Reviewed-by: Marcel TUNNISSEN <marcel.tuennissen@stericsson.com>
Reviewed-by: Jonas ABERG <jonas.aberg@stericsson.com>
---
 arch/arm/mach-ux500/board-mop500-mcde.c | 2 +-
 arch/arm/mach-ux500/board-u5500-mcde.c  | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-ux500/board-mop500-mcde.c b/arch/arm/mach-ux500/board-mop500-mcde.c
index b553ba9db2c..42cec2c88a6 100644
--- a/arch/arm/mach-ux500/board-mop500-mcde.c
+++ b/arch/arm/mach-ux500/board-mop500-mcde.c
@@ -403,7 +403,7 @@ static struct mcde_display_device av8100_hdmi = {
 	.port = &port2,
 	.chnl_id = MCDE_CHNL_B,
 	.fifo = MCDE_FIFO_B,
-	.default_pixel_format = MCDE_OVLYPIXFMT_RGB565,
+	.default_pixel_format = MCDE_OVLYPIXFMT_RGB888,
 	.native_x_res = 1280,
 	.native_y_res = 720,
 	.synchronized_update = false,
diff --git a/arch/arm/mach-ux500/board-u5500-mcde.c b/arch/arm/mach-ux500/board-u5500-mcde.c
index 6c3bbe606fe..49b6c53d98e 100644
--- a/arch/arm/mach-ux500/board-u5500-mcde.c
+++ b/arch/arm/mach-ux500/board-u5500-mcde.c
@@ -178,7 +178,7 @@ static struct mcde_display_device av8100_hdmi = {
 	.port = &port2,
 	.chnl_id = MCDE_CHNL_B,
 	.fifo = MCDE_FIFO_B,
-	.default_pixel_format = MCDE_OVLYPIXFMT_RGB565,
+	.default_pixel_format = MCDE_OVLYPIXFMT_RGB888,
 	.native_x_res = 1280,
 	.native_y_res = 720,
 	.synchronized_update = false,
-- 
cgit v1.2.3


From 278f6f0c0237506842a26fed6466dc17f407db00 Mon Sep 17 00:00:00 2001
From: Per Persson <per.xb.persson@stericsson.com>
Date: Tue, 31 May 2011 17:45:24 +0200
Subject: video: av8100: Improve plug detection

- Set 5V cycle to always on when plugged.
- Keep existing 5V cycle when unplugged.
- Avoid changing 5V time value to zero.

ST-Ericsson ID: 343199
ST-Ericsson Linux next: Not tested, ER 282779
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I999eaa5ef0cfe4ee41bb47213c174a85fc7a04a3
Signed-off-by: Per Persson <per.xb.persson@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/24313
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Reviewed-by: QATOOLS
Reviewed-by: QATEST
Reviewed-by: Per-Daniel OLSSON <per-daniel.olsson@stericsson.com>
Reviewed-by: Marcel TUNNISSEN <marcel.tuennissen@stericsson.com>
Reviewed-by: Jonas ABERG <jonas.aberg@stericsson.com>
---
 drivers/video/av8100/av8100.c | 58 ++++++++++++++++++++++++++-----------------
 drivers/video/av8100/hdmi.c   | 46 +++++++++++++++++++---------------
 2 files changed, 61 insertions(+), 43 deletions(-)

diff --git a/drivers/video/av8100/av8100.c b/drivers/video/av8100/av8100.c
index a5e2bf4e731..1e17256194c 100644
--- a/drivers/video/av8100/av8100.c
+++ b/drivers/video/av8100/av8100.c
@@ -243,6 +243,7 @@ enum av8100_command_size {
 
 static unsigned int waittime_retry[10] = {1, 2, 4, 6, 8, 10, 10, 10, 10, 10};
 
+static int av8100_5V_w(u8 denc_off, u8 hdmi_off, u8 on);
 static void clr_plug_status(enum av8100_plugin_status status);
 static void set_plug_status(enum av8100_plugin_status status);
 static void cec_rx(void);
@@ -537,11 +538,21 @@ static int av8100_int_event_handle(void)
 	}
 
 	if (hpdi & av8100_globals->hpdm) {
+
 		/* HDMI plugin change */
 		if (hpds) {
+			/* Plugged */
+			/* Set 5V always on */
+			av8100_5V_w(av8100_globals->denc_off_time,
+					0,
+					av8100_globals->on_time);
 			dev_dbg(av8100dev, "hpds 1\n");
 			set_plug_status(AV8100_HDMI_PLUGIN);
 		} else {
+			/* Unplugged */
+			av8100_5V_w(av8100_globals->denc_off_time,
+					av8100_globals->hdmi_off_time,
+					av8100_globals->on_time);
 			dev_dbg(av8100dev, "hpds 0\n");
 			clr_plug_status(AV8100_HDMI_PLUGIN);
 		}
@@ -617,6 +628,8 @@ static int av8100_plugstartup_event_handle(void)
 				"av8100_reg_stby_int_mask_w fail\n");
 		}
 
+		msleep(1);
+
 		/* Get actual plug status */
 		if (av8100_reg_stby_r(NULL, NULL, &hpds, &cpds,	NULL))
 			dev_dbg(av8100dev, "av8100_reg_stby_r fail\n");
@@ -1814,17 +1827,8 @@ static int av8100_powerup1(void)
 	msleep(AV8100_WAITTIME_1MS);
 
 	if (pdata->alt_powerupseq) {
-		u8 denc_off_time;
-		u8 hdmi_off_time;
-		u8 on_time;
-
-		/* Save the cycle values */
-		denc_off_time = av8100_globals->denc_off_time;
-		hdmi_off_time = av8100_globals->hdmi_off_time;
-		on_time = av8100_globals->on_time;
-
 		dev_dbg(av8100dev, "powerup seq alt\n");
-		retval = av8100_reg_hdmi_5_volt_time_w(0, 0, AV8100_ON_TIME);
+		retval = av8100_5V_w(0, 0, AV8100_ON_TIME);
 		if (retval) {
 			dev_err(av8100dev, "%s reg_wr err 1\n", __func__);
 			goto av8100_powerup1_err;
@@ -1832,11 +1836,6 @@ static int av8100_powerup1(void)
 
 		udelay(AV8100_WATTIME_100US);
 
-		/* Get the cycle values */
-		av8100_globals->denc_off_time = denc_off_time;
-		av8100_globals->hdmi_off_time = hdmi_off_time;
-		av8100_globals->on_time = on_time;
-
 		retval = av8100_reg_stby_pend_int_w(
 				AV8100_STANDBY_PENDING_INTERRUPT_HPDI_LOW,
 				AV8100_STANDBY_PENDING_INTERRUPT_CPDI_LOW,
@@ -1927,10 +1926,9 @@ static int av8100_powerup2(void)
 	msleep(AV8100_WAITTIME_1MS);
 
 	/* ON time & OFF time on 5v HDMI plug detect */
-	retval = av8100_reg_hdmi_5_volt_time_w(
-			av8100_globals->denc_off_time,
-			av8100_globals->hdmi_off_time,
-			av8100_globals->on_time);
+	retval = av8100_5V_w(av8100_globals->denc_off_time,
+				av8100_globals->hdmi_off_time,
+				av8100_globals->on_time);
 	if (retval) {
 		dev_err(av8100dev,
 			"Failed to write the value to av8100 register\n");
@@ -2388,10 +2386,10 @@ int av8100_reg_stby_w(
 }
 EXPORT_SYMBOL(av8100_reg_stby_w);
 
-int av8100_reg_hdmi_5_volt_time_w(u8 denc_off, u8 hdmi_off, u8 on)
+static int av8100_5V_w(u8 denc_off, u8 hdmi_off, u8 on)
 {
-	int retval;
 	u8 val;
+	int retval;
 
 	if (av8100_status_get().av8100_state == AV8100_OPMODE_UNDEFINED)
 		return -EINVAL;
@@ -2412,14 +2410,28 @@ int av8100_reg_hdmi_5_volt_time_w(u8 denc_off, u8 hdmi_off, u8 on)
 	/* Write to register */
 	retval = register_write_internal(AV8100_HDMI_5_VOLT_TIME, val);
 
+	UNLOCK_AV8100_HW;
+
+	return retval;
+}
+
+int av8100_reg_hdmi_5_volt_time_w(u8 denc_off, u8 hdmi_off, u8 on)
+{
+	int retval;
+
+	if (av8100_status_get().av8100_state == AV8100_OPMODE_UNDEFINED)
+		return -EINVAL;
+
+	retval = av8100_5V_w(denc_off, hdmi_off, on);
+
 	/* Set vars */
 	if (chip_version > 1)
 		av8100_globals->denc_off_time = denc_off;
 
 	av8100_globals->hdmi_off_time = hdmi_off;
-	av8100_globals->on_time = on;
+	if (on)
+		av8100_globals->on_time = on;
 
-	UNLOCK_AV8100_HW;
 	return retval;
 }
 EXPORT_SYMBOL(av8100_reg_hdmi_5_volt_time_w);
diff --git a/drivers/video/av8100/hdmi.c b/drivers/video/av8100/hdmi.c
index abd467b8d57..8b409c6e6a5 100644
--- a/drivers/video/av8100/hdmi.c
+++ b/drivers/video/av8100/hdmi.c
@@ -139,20 +139,26 @@ static unsigned int htoi(const char *ptr)
 
 static int event_enable(bool enable, enum hdmi_event ev)
 {
-	struct av8100_status status;
+	struct kobject *kobj = &hdmidev->kobj;
 
 	dev_dbg(hdmidev, "enable_event %d %02x\n", enable, ev);
-	if (enable) {
-		status = av8100_status_get();
-		if (status.av8100_state < AV8100_OPMODE_IDLE) {
-			av8100_disable_interrupt();
-			av8100_enable_interrupt();
-		}
-
+	if (enable)
 		events_mask |= ev;
-	} else
+	else
 		events_mask &= ~ev;
 
+	if (events & ev) {
+		/* Report pending event */
+		/* Wake up application waiting for event via call to poll() */
+		sysfs_notify(kobj, NULL, SYSFS_EVENT_FILENAME);
+
+		LOCK_HDMI_EVENTS;
+		events_received = true;
+		UNLOCK_HDMI_EVENTS;
+
+		wake_up_interruptible(&hdmi_event_wq);
+	}
+
 	return 0;
 }
 
@@ -170,6 +176,11 @@ static int plugdeten(struct plug_detect *pldet)
 		}
 	}
 
+	event_enable(pldet->hdmi_detect_enable != 0,
+		HDMI_EVENT_HDMI_PLUGIN);
+	event_enable(pldet->hdmi_detect_enable != 0,
+		HDMI_EVENT_HDMI_PLUGOUT);
+
 	av8100_reg_hdmi_5_volt_time_r(&denc_off_time, NULL, NULL);
 
 	retval = av8100_reg_hdmi_5_volt_time_w(
@@ -183,11 +194,6 @@ static int plugdeten(struct plug_detect *pldet)
 		return -EFAULT;
 	}
 
-	event_enable(pldet->hdmi_detect_enable != 0,
-		HDMI_EVENT_HDMI_PLUGIN);
-	event_enable(pldet->hdmi_detect_enable != 0,
-		HDMI_EVENT_HDMI_PLUGOUT);
-
 	return retval;
 }
 
@@ -2165,31 +2171,31 @@ void hdmi_event(enum av8100_hdmi_event ev)
 	switch (ev) {
 	case AV8100_HDMI_EVENT_HDMI_PLUGIN:
 		events &= ~HDMI_EVENT_HDMI_PLUGOUT;
-		events |= events_mask & HDMI_EVENT_HDMI_PLUGIN;
+		events |= HDMI_EVENT_HDMI_PLUGIN;
 		break;
 
 	case AV8100_HDMI_EVENT_HDMI_PLUGOUT:
 		events &= ~HDMI_EVENT_HDMI_PLUGIN;
-		events |= events_mask & HDMI_EVENT_HDMI_PLUGOUT;
+		events |= HDMI_EVENT_HDMI_PLUGOUT;
 		break;
 
 	case AV8100_HDMI_EVENT_CEC:
-		events |= events_mask & HDMI_EVENT_CEC;
+		events |= HDMI_EVENT_CEC;
 		break;
 
 	case AV8100_HDMI_EVENT_HDCP:
-		events |= events_mask & HDMI_EVENT_HDCP;
+		events |= HDMI_EVENT_HDCP;
 		break;
 
 	case AV8100_HDMI_EVENT_CECTXERR:
-		events |= events_mask & HDMI_EVENT_CECTXERR;
+		events |= HDMI_EVENT_CECTXERR;
 		break;
 
 	default:
 		break;
 	}
 
-	events_new = events;
+	events_new = events_mask & events;
 
 	UNLOCK_HDMI_EVENTS;
 
-- 
cgit v1.2.3


From 1ba35db7702261636573c00e62a93bec5eb1a4a9 Mon Sep 17 00:00:00 2001
From: Marcel Tunnissen <Marcel.Tuennissen@stericsson.com>
Date: Wed, 23 Mar 2011 10:29:55 +0100
Subject: video: mcde: Log error interrupts as debug support

When built with debug support this patch takes care that some error
interrupts from MCDE are logged, e.g. FIFO underflow.

ST-Ericsson ID: 269500
Linux-next: ST-Ericsson ID: ER 282779

ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: Ie39129c09bdf3ac08a488cc90eed86575cc210d8
Signed-off-by: Marcel Tunnissen <Marcel.Tuennissen@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/21819
Tested-by: Marcel TUNNISSEN <marcel.tuennissen@stericsson.com>
Reviewed-by: QATEST
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
Reviewed-by: Linus WALLEIJ <linus.walleij@stericsson.com>
---
 drivers/video/mcde/mcde_hw.c | 94 ++++++++++++++++++++++++++++++++++++++++++--
 1 file changed, 90 insertions(+), 4 deletions(-)

diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index c320670b5dd..e2551075fe2 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -508,6 +508,18 @@ static void update_mcde_registers(void)
 			MCDE_IMSCPP_VCMPBIM(true) |
 			MCDE_IMSCPP_VCMPC0IM(true) |
 			MCDE_IMSCPP_VCMPC1IM(true));
+#ifdef DEBUG
+		/* Enable error interrupts */
+		mcde_wreg(MCDE_IMSCERR,
+			MCDE_IMSCERR_SCHBLCKDIM(true) |
+			MCDE_IMSCERR_OVLFERRIM_MASK |
+			MCDE_IMSCERR_FUAIM(true) |
+			MCDE_IMSCERR_FUBIM(true) |
+			MCDE_IMSCERR_FUC0IM(true) |
+			MCDE_IMSCERR_FUC1IM(true));
+		/* Enable channel abort interrupts */
+		mcde_wreg(MCDE_IMSCCHNL, MCDE_IMSCCHNL_CHNLAIM(0xf));
+#endif
 	}
 
 	/* Enable overlay fetch done interrupts */
@@ -892,12 +904,31 @@ static inline void mcde_handle_vcmp(struct mcde_chnl_state *chnl, u32 int_fld)
 	}
 	chnl->even_vcmp = !chnl->even_vcmp;
 	mcde_wreg_fld(MCDE_RISPP, 0x1 << int_fld, int_fld, 1);
+#ifdef DEBUG
+	if (chnl->ovly0 && mcde_rreg(MCDE_OVL0CR +
+				chnl->ovly0->idx * MCDE_OVL0CR_GROUPOFFSET) &
+				MCDE_OVL0CR_OVLB_MASK)
+		dev_warn(&mcde_dev->dev, "Overlay %d blocked\n",
+							chnl->ovly0->idx);
+	if (chnl->ovly1 && mcde_rreg(MCDE_OVL0CR +
+				chnl->ovly1->idx * MCDE_OVL0CR_GROUPOFFSET) &
+				MCDE_OVL0CR_OVLB_MASK)
+		dev_warn(&mcde_dev->dev, "Overlay %d blocked\n",
+							chnl->ovly1->idx);
+#endif
 }
 
 static irqreturn_t mcde_irq_handler(int irq, void *dev)
 {
 	int i;
 	u32 irq_status;
+#ifdef DEBUG
+	u32 irq_riserr_status;
+	u32 irq_rischnl_status;
+
+	irq_riserr_status = mcde_rreg(MCDE_RISERR);
+	irq_rischnl_status = mcde_rreg(MCDE_RISCHNL);
+#endif
 
 	/* Handle overlay irqs */
 	irq_status = mcde_rfld(MCDE_RISOVL, OVLFDRIS);
@@ -905,18 +936,73 @@ static irqreturn_t mcde_irq_handler(int irq, void *dev)
 
 	/* Handle channel irqs */
 	irq_status = mcde_rreg(MCDE_RISPP);
-	if (irq_status & MCDE_RISPP_VCMPARIS_MASK)
+	if (irq_status & MCDE_RISPP_VCMPARIS_MASK) {
 		mcde_handle_vcmp(&channels[MCDE_CHNL_A],
 						MCDE_RISPP_VCMPARIS_SHIFT);
-	if (irq_status & MCDE_RISPP_VCMPBRIS_MASK)
+#ifdef DEBUG
+		if (irq_riserr_status & MCDE_RISERR_FUARIS_MASK) {
+			dev_warn(&mcde_dev->dev, "FIFO A underflow\n");
+			mcde_wreg(MCDE_RISERR, MCDE_RISERR_FUARIS_MASK);
+		}
+		if (irq_rischnl_status & MCDE_RISCHNL_CHNLARIS(0)) {
+			dev_warn(&mcde_dev->dev, "Channel A abort\n");
+			mcde_wreg(MCDE_RISCHNL, MCDE_RISCHNL_CHNLARIS(0));
+		}
+#endif
+	}
+	if (irq_status & MCDE_RISPP_VCMPBRIS_MASK) {
 		mcde_handle_vcmp(&channels[MCDE_CHNL_B],
 						MCDE_RISPP_VCMPBRIS_SHIFT);
-	if (irq_status & MCDE_RISPP_VCMPC0RIS_MASK)
+#ifdef DEBUG
+		if (irq_riserr_status & MCDE_RISERR_FUBRIS_MASK) {
+			dev_warn(&mcde_dev->dev, "FIFO B underflow\n");
+			mcde_wreg(MCDE_RISERR, MCDE_RISERR_FUBRIS_MASK);
+		}
+		if (irq_rischnl_status & MCDE_RISCHNL_CHNLARIS(1)) {
+			dev_warn(&mcde_dev->dev, "Channel B abort\n");
+			mcde_wreg(MCDE_RISCHNL, MCDE_RISCHNL_CHNLARIS(1));
+		}
+#endif
+	}
+	if (irq_status & MCDE_RISPP_VCMPC0RIS_MASK) {
 		mcde_handle_vcmp(&channels[MCDE_CHNL_C0],
 						MCDE_RISPP_VCMPC0RIS_SHIFT);
-	if (irq_status & MCDE_RISPP_VCMPC1RIS_MASK)
+#ifdef DEBUG
+		if (irq_riserr_status & MCDE_RISERR_FUC0RIS_MASK) {
+			dev_warn(&mcde_dev->dev, "FIFO C0 underflow\n");
+			mcde_wreg(MCDE_RISERR, MCDE_RISERR_FUC0RIS_MASK);
+		}
+		if (irq_rischnl_status & MCDE_RISCHNL_CHNLARIS(2)) {
+			dev_warn(&mcde_dev->dev, "Channel C0 abort\n");
+			mcde_wreg(MCDE_RISCHNL, MCDE_RISCHNL_CHNLARIS(2));
+		}
+#endif
+	}
+	if (irq_status & MCDE_RISPP_VCMPC1RIS_MASK) {
 		mcde_handle_vcmp(&channels[MCDE_CHNL_C1],
 						MCDE_RISPP_VCMPC1RIS_SHIFT);
+#ifdef DEBUG
+		if (irq_riserr_status & MCDE_RISERR_FUC1RIS_MASK) {
+			dev_warn(&mcde_dev->dev, "FIFO C1 underflow\n");
+			mcde_wreg(MCDE_RISERR, MCDE_RISERR_FUC1RIS_MASK);
+		}
+		if (irq_rischnl_status & MCDE_RISCHNL_CHNLARIS(3)) {
+			dev_warn(&mcde_dev->dev, "Channel C1 abort\n");
+			mcde_wreg(MCDE_RISCHNL, MCDE_RISCHNL_CHNLARIS(3));
+		}
+#endif
+	}
+#ifdef DEBUG
+	/* Handle error irqs */
+	if (irq_riserr_status & MCDE_RISERR_SCHBLCKDRIS_MASK) {
+		dev_warn(&mcde_dev->dev, "Scheduler blocked\n");
+		mcde_wreg(MCDE_RISERR, MCDE_RISERR_SCHBLCKDRIS_MASK);
+	}
+	if (irq_riserr_status & MCDE_IMSCERR_OVLFERRIM_MASK) {
+		dev_warn(&mcde_dev->dev, "Overlay fetch error\n");
+		mcde_wreg(MCDE_RISERR, MCDE_IMSCERR_OVLFERRIM_MASK);
+	}
+#endif
 	for (i = 0; i < num_dsilinks; i++) {
 		struct mcde_chnl_state *chnl_from_dsi;
 
-- 
cgit v1.2.3


From a479d56a88969444bd77d9e0ed830ac907ae4980 Mon Sep 17 00:00:00 2001
From: Per Persson <per.xb.persson@stericsson.com>
Date: Tue, 7 Jun 2011 10:37:21 +0200
Subject: video: av8100: Add suspend resume

Parts of suspend/resume handling are moved from display
driver to av8100 driver.

ST-Ericsson ID: 326691
ST-Ericsson Linux next: Not tested, ER 282779
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I9a6ac38c138bfea4cf07d3b38d16d4ac95d05a84
Signed-off-by: Per Persson <per.xb.persson@stericsson.com>
---
 drivers/video/av8100/av8100.c       | 52 ++++++++++++++++++++++++++++++++++++-
 drivers/video/mcde/display-av8100.c | 12 +--------
 2 files changed, 52 insertions(+), 12 deletions(-)

diff --git a/drivers/video/av8100/av8100.c b/drivers/video/av8100/av8100.c
index 1e17256194c..39d32ba5cb6 100644
--- a/drivers/video/av8100/av8100.c
+++ b/drivers/video/av8100/av8100.c
@@ -476,9 +476,60 @@ static const struct i2c_device_id av8100_id[] = {
 	{ }
 };
 
+#ifdef CONFIG_PM
+static int av8100_suspend(struct i2c_client *i2c_client, pm_message_t state)
+{
+	int ret;
+
+	dev_dbg(av8100dev, "%s\n", __func__);
+
+	ret = av8100_powerdown();
+	if (ret)
+		dev_err(av8100dev, "av8100_powerdown failed\n");
+
+	return ret;
+}
+
+static int av8100_resume(struct i2c_client *i2c_client)
+{
+	int ret;
+	u8 hpds = 0;
+
+	dev_dbg(av8100dev, "%s\n", __func__);
+
+	ret = av8100_powerup();
+	if (ret) {
+		dev_err(av8100dev, "av8100_powerup failed\n");
+		return ret;
+	}
+
+	/* Check HDMI plug status */
+	if (av8100_reg_stby_r(NULL, NULL, &hpds, NULL, NULL)) {
+		dev_warn(av8100dev, "av8100_reg_stby_r failed\n");
+		goto av8100_resume_end;
+	}
+
+	if (hpds)
+		set_plug_status(AV8100_HDMI_PLUGIN); /* Plugged*/
+	else
+		clr_plug_status(AV8100_HDMI_PLUGIN); /* Unplugged*/
+
+	av8100_globals->hpdm = AV8100_STANDBY_INTERRUPT_MASK_HPDM_HIGH;
+	av8100_enable_interrupt();
+
+av8100_resume_end:
+	return 0;
+}
+#else
+#define av8100_suspend NULL
+#define av8100_resume NULL
+#endif
+
 static struct i2c_driver av8100_driver = {
 	.probe	= av8100_probe,
 	.remove = av8100_remove,
+	.suspend = av8100_suspend,
+	.resume = av8100_resume,
 	.driver = {
 		.name	= "av8100",
 	},
@@ -538,7 +589,6 @@ static int av8100_int_event_handle(void)
 	}
 
 	if (hpdi & av8100_globals->hpdm) {
-
 		/* HDMI plugin change */
 		if (hpds) {
 			/* Plugged */
diff --git a/drivers/video/mcde/display-av8100.c b/drivers/video/mcde/display-av8100.c
index 9134e4bf33f..99070b6071f 100644
--- a/drivers/video/mcde/display-av8100.c
+++ b/drivers/video/mcde/display-av8100.c
@@ -1253,13 +1253,6 @@ static int hdmi_set_power_mode(struct mcde_display_device *ddev,
 				return ret;
 		}
 
-		ret = av8100_powerup();
-		if (ret) {
-			dev_err(&ddev->dev, "av8100_powerup failed\n");
-			return ret;
-		}
-		av8100_enable_interrupt();
-
 		/*
 		 * the regulator for analog TV out is only enabled here,
 		 * this means that one needs to switch to the OFF state
@@ -1292,10 +1285,7 @@ static int hdmi_set_power_mode(struct mcde_display_device *ddev,
 	if (ddev->power_mode == MCDE_DISPLAY_PM_STANDBY &&
 				power_mode == MCDE_DISPLAY_PM_OFF) {
 		memset(&(ddev->video_mode), 0, sizeof(struct mcde_video_mode));
-		ret = av8100_powerdown();
-		if (ret)
-			dev_err(&ddev->dev, "%s:av8100_powerdown failed\n"
-								, __func__);
+
 		if (ddev->platform_disable) {
 			ret = ddev->platform_disable(ddev);
 			if (ret)
-- 
cgit v1.2.3


From 619264948145c32ed2b5c809594fc26fb302058d Mon Sep 17 00:00:00 2001
From: Marcel Tunnissen <Marcel.Tuennissen@stericsson.com>
Date: Wed, 1 Jun 2011 14:14:16 +0200
Subject: video: mcde: fix build problems with update

This patch fixes build problems that were introduced by the patch with
ID Ice1f936a8a00e2fbc8fdf7e8c6621c539efe0ac4. The problems are seen when
non-default configurations are used.

ST-Ericsson ID: 343242
ST-Ericsson Linux next: Not tested, ER 282779
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: Iac284116e8f33f059bb85cf9e10820fb51f8f6f2
Signed-off-by: Marcel Tunnissen <Marcel.Tuennissen@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/24347
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Tested-by: Marcel TUNNISSEN <marcel.tuennissen@stericsson.com>
Reviewed-by: QATOOLS
Reviewed-by: QATEST
Reviewed-by: Jonas ABERG <jonas.aberg@stericsson.com>
---
 arch/arm/mach-ux500/board-mop500-mcde.c  | 4 +++-
 arch/arm/mach-ux500/board-u5500-mcde.c   | 4 +++-
 drivers/video/mcde/display-av8100.c      | 1 -
 drivers/video/mcde/display-generic_dsi.c | 1 -
 4 files changed, 6 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-ux500/board-mop500-mcde.c b/arch/arm/mach-ux500/board-mop500-mcde.c
index 42cec2c88a6..d16c715ed86 100644
--- a/arch/arm/mach-ux500/board-mop500-mcde.c
+++ b/arch/arm/mach-ux500/board-mop500-mcde.c
@@ -549,6 +549,7 @@ static int framebuffer_postregistered_callback(struct notifier_block *nb,
 		struct mcde_overlay *ovly = mfb->ovlys[i];
 		struct mcde_overlay_info ovly_info;
 		struct mcde_fb *mfb = to_mcde_fb(info);
+		int num_buffers;
 		memset(&ovly_info, 0, sizeof(ovly_info));
 		ovly_info.paddr = fix.smem_start +
 			fix.line_length * var.yoffset;
@@ -562,7 +563,8 @@ static int framebuffer_postregistered_callback(struct notifier_block *nb,
 		ovly_info.dirty.w = var.xres;
 		ovly_info.dirty.h = var.yres;
 		(void) mcde_dss_apply_overlay(ovly, &ovly_info);
-		ret = mcde_dss_update_overlay(ovly);
+		num_buffers = var.yres_virtual / var.yres;
+		ret = mcde_dss_update_overlay(ovly, num_buffers == 3);
 		if (ret)
 			break;
 	}
diff --git a/arch/arm/mach-ux500/board-u5500-mcde.c b/arch/arm/mach-ux500/board-u5500-mcde.c
index 49b6c53d98e..34c29398c72 100644
--- a/arch/arm/mach-ux500/board-u5500-mcde.c
+++ b/arch/arm/mach-ux500/board-u5500-mcde.c
@@ -318,6 +318,7 @@ static int framebuffer_postregistered_callback(struct notifier_block *nb,
 		struct mcde_overlay *ovly = mfb->ovlys[i];
 		struct mcde_overlay_info ovly_info;
 		struct mcde_fb *mfb = to_mcde_fb(info);
+		int num_buffers;
 		memset(&ovly_info, 0, sizeof(ovly_info));
 		ovly_info.paddr = fix.smem_start +
 			fix.line_length * var.yoffset;
@@ -331,7 +332,8 @@ static int framebuffer_postregistered_callback(struct notifier_block *nb,
 		ovly_info.dirty.w = var.xres;
 		ovly_info.dirty.h = var.yres;
 		(void) mcde_dss_apply_overlay(ovly, &ovly_info);
-		ret = mcde_dss_update_overlay(ovly);
+		num_buffers = var.yres_virtual / var.yres;
+		ret = mcde_dss_update_overlay(ovly, num_buffers == 3);
 		if (ret)
 			break;
 	}
diff --git a/drivers/video/mcde/display-av8100.c b/drivers/video/mcde/display-av8100.c
index 99070b6071f..688a4d17688 100644
--- a/drivers/video/mcde/display-av8100.c
+++ b/drivers/video/mcde/display-av8100.c
@@ -1428,7 +1428,6 @@ static int hdmi_resume(struct mcde_display_device *ddev)
 		dev_warn(&ddev->dev, "%s:Failed to resume display\n"
 			, __func__);
 
-	ddev->update(ddev, 0);
 	return ret;
 }
 
diff --git a/drivers/video/mcde/display-generic_dsi.c b/drivers/video/mcde/display-generic_dsi.c
index b2d63ba06f7..64ed3d6daa9 100644
--- a/drivers/video/mcde/display-generic_dsi.c
+++ b/drivers/video/mcde/display-generic_dsi.c
@@ -246,7 +246,6 @@ static int generic_resume(struct mcde_display_device *ddev)
 			, __func__);
 	ddev->set_synchronized_update(ddev,
 					ddev->get_synchronized_update(ddev));
-	ddev->update(ddev, false);
 	return ret;
 }
 
-- 
cgit v1.2.3


From 2ea7e77d9ef8dc7415db7c4823ad9de1a07c5c5d Mon Sep 17 00:00:00 2001
From: Anders Bauer <anders.bauer@stericsson.com>
Date: Tue, 17 May 2011 15:22:59 +0200
Subject: video: mcde: add support for generic write commands

This patch adds function mcde_dsi_generic_write, used for
sending generic write commands to DSI display.

ST-Ericsson ID: 334291
ST-Ericsson FOSS-OUT ID: Trivial
ST-Ericsson Linux next: Not tested, ER 282779

Change-Id: I9c0bb3135321b7ab27067dc9d85a048bdce90f85
Signed-off-by: Anders Bauer <anders.bauer@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/23218
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
Reviewed-by: Linus WALLEIJ <linus.walleij@stericsson.com>
---
 drivers/video/mcde/dsilink_regs.h |  4 +++
 drivers/video/mcde/mcde_hw.c      | 63 +++++++++++++++++++++++++++++----------
 include/video/mcde.h              |  3 +-
 3 files changed, 53 insertions(+), 17 deletions(-)

diff --git a/drivers/video/mcde/dsilink_regs.h b/drivers/video/mcde/dsilink_regs.h
index 102d4fb0a56..2322041ffec 100644
--- a/drivers/video/mcde/dsilink_regs.h
+++ b/drivers/video/mcde/dsilink_regs.h
@@ -466,6 +466,10 @@
 	DSI_VAL2REG(DSI_DIRECT_CMD_MAIN_SETTINGS, CMD_LONGNOTSHORT, __x)
 #define DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_HEAD_SHIFT 8
 #define DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_HEAD_MASK 0x00003F00
+#define DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_HEAD_GENERIC_SHORT_WRITE_0 3
+#define DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_HEAD_GENERIC_SHORT_WRITE_1 19
+#define DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_HEAD_GENERIC_SHORT_WRITE_2 35
+#define DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_HEAD_GENERIC_LONG_WRITE 41
 #define DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_HEAD_DCS_SHORT_WRITE_0 5
 #define DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_HEAD_DCS_SHORT_WRITE_1 21
 #define DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_HEAD_DCS_LONG_WRITE 57
diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index e2551075fe2..93ee5c422d0 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -2106,7 +2106,8 @@ static int enable_mcde_hw(void)
 }
 
 /* DSI */
-int mcde_dsi_dcs_write(struct mcde_chnl_state *chnl, u8 cmd, u8* data, int len)
+static int mcde_dsi_direct_cmd_write(struct mcde_chnl_state *chnl,
+			bool dcs, u8 cmd, u8 *data, int len)
 {
 	int i;
 	u32 wrdat[4] = { 0, 0, 0, 0 };
@@ -2116,9 +2117,8 @@ int mcde_dsi_dcs_write(struct mcde_chnl_state *chnl, u8 cmd, u8* data, int len)
 	u32 ok;
 	u32 error;
 
-	/* REVIEW: One command at a time */
-	/* REVIEW: Allow read/write on unreserved ports */
-	if (len > MCDE_MAX_DCS_WRITE || chnl->port.type != MCDE_PORTTYPE_DSI)
+	if (len > MCDE_MAX_DSI_DIRECT_CMD_WRITE ||
+			chnl->port.type != MCDE_PORTTYPE_DSI)
 		return -EINVAL;
 
 	mutex_lock(&mcde_hw_lock);
@@ -2145,24 +2145,45 @@ int mcde_dsi_dcs_write(struct mcde_chnl_state *chnl, u8 cmd, u8* data, int len)
 		}
 	}
 
-	wrdat[0] = cmd;
-	for (i = 1; i <= len; i++)
-		wrdat[i>>2] |= ((u32)data[i-1] << ((i & 3) * 8));
+	if (dcs) {
+		wrdat[0] = cmd;
+		for (i = 1; i <= len; i++)
+			wrdat[i>>2] |= ((u32)data[i-1] << ((i & 3) * 8));
+	} else {
+		/* no explicit cmd byte for generic_write, only params */
+		for (i = 0; i < len; i++)
+			wrdat[i>>2] |= ((u32)data[i] << ((i & 3) * 8));
+	}
 
 	settings = DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_NAT_ENUM(WRITE) |
 		DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_LONGNOTSHORT(len > 1) |
 		DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_ID(virt_id) |
 		DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_SIZE(len+1) |
 		DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_LP_EN(true);
-	if (len == 0)
-		settings |= DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_HEAD_ENUM(
-			DCS_SHORT_WRITE_0);
-	else if (len == 1)
-		settings |= DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_HEAD_ENUM(
-			DCS_SHORT_WRITE_1);
-	else
-		settings |= DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_HEAD_ENUM(
-			DCS_LONG_WRITE);
+	if (dcs) {
+		if (len == 0)
+			settings |= DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_HEAD_ENUM(
+				DCS_SHORT_WRITE_0);
+		else if (len == 1)
+			settings |= DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_HEAD_ENUM(
+				DCS_SHORT_WRITE_1);
+		else
+			settings |= DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_HEAD_ENUM(
+				DCS_LONG_WRITE);
+	} else {
+		if (len == 0)
+			settings |= DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_HEAD_ENUM(
+				GENERIC_SHORT_WRITE_0);
+		else if (len == 1)
+			settings |= DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_HEAD_ENUM(
+				GENERIC_SHORT_WRITE_1);
+		else if (len == 2)
+			settings |= DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_HEAD_ENUM(
+				GENERIC_SHORT_WRITE_2);
+		else
+			settings |= DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_HEAD_ENUM(
+				GENERIC_LONG_WRITE);
+	}
 
 	dsi_wreg(link, DSI_DIRECT_CMD_MAIN_SETTINGS, settings);
 	dsi_wreg(link, DSI_DIRECT_CMD_WRDAT0, wrdat[0]);
@@ -2190,6 +2211,16 @@ int mcde_dsi_dcs_write(struct mcde_chnl_state *chnl, u8 cmd, u8* data, int len)
 	return 0;
 }
 
+int mcde_dsi_generic_write(struct mcde_chnl_state *chnl, u8* para, int len)
+{
+	return mcde_dsi_direct_cmd_write(chnl, false, 0, para, len);
+}
+
+int mcde_dsi_dcs_write(struct mcde_chnl_state *chnl, u8 cmd, u8* data, int len)
+{
+	return mcde_dsi_direct_cmd_write(chnl, true, cmd, data, len);
+}
+
 int mcde_dsi_dcs_read(struct mcde_chnl_state *chnl, u8 cmd, u8* data, int *len)
 {
 	int ret = 0;
diff --git a/include/video/mcde.h b/include/video/mcde.h
index 97eeef01c19..213f33e43fe 100644
--- a/include/video/mcde.h
+++ b/include/video/mcde.h
@@ -409,8 +409,9 @@ void mcde_ovly_put(struct mcde_ovly_state *ovly);
 #define DCS_CMD_WRITE_START           0x2C
 
 #define MCDE_MAX_DCS_READ   4
-#define MCDE_MAX_DCS_WRITE 15
+#define MCDE_MAX_DSI_DIRECT_CMD_WRITE 15
 
+int mcde_dsi_generic_write(struct mcde_chnl_state *chnl, u8* para, int len);
 int mcde_dsi_dcs_write(struct mcde_chnl_state *chnl, u8 cmd, u8* data, int len);
 int mcde_dsi_dcs_read(struct mcde_chnl_state *chnl, u8 cmd, u8* data, int *len);
 
-- 
cgit v1.2.3


From ba570bb200ec70ed04d1c1f76dcae3fce28332ac Mon Sep 17 00:00:00 2001
From: Jayarami Reddy <jayarami.reddy@stericsson.com>
Date: Tue, 7 Jun 2011 18:37:15 +0530
Subject: video: av8100: Correct hdmi display id

This patch will add enum for display id's.

ST-Ericsson ID: 343774
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: Idbf726c9b04b4db682f6a2db959bf74dd893d286
Signed-off-by: Jayarami Reddy <jayarami.reddy@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/24547
Reviewed-by: QATOOLS
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
Reviewed-by: QATEST
Reviewed-by: Hemanth P SETHURAM <hemanth.sethuram@stericsson.com>
Reviewed-by: Marcel TUNNISSEN <marcel.tuennissen@stericsson.com>
Reviewed-by: Jonas ABERG <jonas.aberg@stericsson.com>
---
 arch/arm/mach-ux500/board-u5500-mcde.c | 21 +++++++++++++++------
 1 file changed, 15 insertions(+), 6 deletions(-)

diff --git a/arch/arm/mach-ux500/board-u5500-mcde.c b/arch/arm/mach-ux500/board-u5500-mcde.c
index 34c29398c72..535f3d41bba 100644
--- a/arch/arm/mach-ux500/board-u5500-mcde.c
+++ b/arch/arm/mach-ux500/board-u5500-mcde.c
@@ -21,8 +21,16 @@
 #define DSI_UNIT_INTERVAL_0	0xA
 #define DSI_UNIT_INTERVAL_2	0x5
 
-#define PRIMARY_DISPLAY_ID	0
-#define AV8100_DISPLAY_ID	2
+enum {
+#ifdef CONFIG_DISPLAY_GENERIC_DSI_PRIMARY
+	PRIMARY_DISPLAY_ID,
+#endif
+#ifdef CONFIG_DISPLAY_AV8100_TERTIARY
+	AV8100_DISPLAY_ID,
+#endif
+	MCDE_NR_OF_DISPLAYS
+};
+
 
 #ifdef CONFIG_FB_MCDE
 
@@ -33,7 +41,6 @@ static struct delayed_work work_dispreg_hdmi;
 #define DISPREG_HDMI_DELAY 6000
 #endif
 
-#define MCDE_NR_OF_DISPLAYS 2
 static int display_initialized_during_boot;
 
 static int __init startup_graphics_setup(char *str)
@@ -250,12 +257,14 @@ static int display_postregistered_callback(struct notifier_block *nb,
 	if (ddev->id == AV8100_DISPLAY_ID)
 		virtual_height = height * 3;
 #endif
-
-	if (ddev->id == AV8100_DISPLAY_ID) {
+#ifdef CONFIG_DISPLAY_AV8100_TERTIARY
+	if (ddev->id == AV8100_DISPLAY_ID)
 #ifdef CONFIG_MCDE_DISPLAY_HDMI_FB_AUTO_CREATE
 		hdmi_fb_onoff(ddev, 1, 0, 0);
 #endif /* CONFIG_MCDE_DISPLAY_HDMI_FB_AUTO_CREATE */
-	} else {
+	else
+#endif /* CONFIG_DISPLAY_AV8100_TERTIARY */
+	{
 		/* Create frame buffer */
 		fbi = mcde_fb_create(ddev,
 			width, height,
-- 
cgit v1.2.3


From bf424a53be6633b8c3f2993a29ccffa2ebf4ac52 Mon Sep 17 00:00:00 2001
From: Per Persson <per.xb.persson@stericsson.com>
Date: Tue, 7 Jun 2011 12:52:15 +0200
Subject: video: hdmi: Correct hdcp acc to documentation

The hdcp management data sent to av8100 is synchronised
with the av8100 documentation.

ST-Ericsson ID: 344063
ST-Ericsson Linux next: Not tested, ER 282779
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I00f54abe266178be0141ee1c4a46cc9bd2de91d5
Signed-off-by: Per Persson <per.xb.persson@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/24522
Reviewed-by: QATOOLS
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Reviewed-by: QATEST
Reviewed-by: Marcel TUNNISSEN <marcel.tuennissen@stericsson.com>
---
 drivers/video/av8100/av8100.c |  5 ++---
 drivers/video/av8100/hdmi.c   | 12 +-----------
 include/video/av8100.h        |  6 ------
 include/video/hdmi.h          |  5 ++---
 4 files changed, 5 insertions(+), 23 deletions(-)

diff --git a/drivers/video/av8100/av8100.c b/drivers/video/av8100/av8100.c
index 39d32ba5cb6..a6160e088eb 100644
--- a/drivers/video/av8100/av8100.c
+++ b/drivers/video/av8100/av8100.c
@@ -233,7 +233,7 @@ enum av8100_command_size {
 	AV8100_COMMAND_DENC_SIZE = 0x6,
 	AV8100_COMMAND_HDMI_SIZE = 0x4,
 	AV8100_COMMAND_HDCP_SENDKEY_SIZE = 0xA,
-	AV8100_COMMAND_HDCP_MANAGEMENT_SIZE = 0x4,
+	AV8100_COMMAND_HDCP_MANAGEMENT_SIZE = 0x3,
 	AV8100_COMMAND_INFOFRAMES_SIZE = 0x21,
 	AV8100_COMMAND_EDID_SECTION_READBACK_SIZE  = 0x3,
 	AV8100_COMMAND_PATTERNGENERATOR_SIZE  = 0x4,
@@ -1523,8 +1523,7 @@ static int configuration_hdcp_management_get(char *buffer,
 		return AV8100_FAIL;
 
 	buffer[0] = av8100_config->hdmi_hdcp_management_format_cmd.req_type;
-	buffer[1] = av8100_config->hdmi_hdcp_management_format_cmd.req_encr;
-	buffer[2] = av8100_config->hdmi_hdcp_management_format_cmd.encr_use;
+	buffer[1] = av8100_config->hdmi_hdcp_management_format_cmd.encr_use;
 
 	*length = AV8100_COMMAND_HDCP_MANAGEMENT_SIZE - 1;
 	return 0;
diff --git a/drivers/video/av8100/hdmi.c b/drivers/video/av8100/hdmi.c
index 8b409c6e6a5..0cf85655b7f 100644
--- a/drivers/video/av8100/hdmi.c
+++ b/drivers/video/av8100/hdmi.c
@@ -561,23 +561,13 @@ static int hdcpauthencr(u8 auth_type, u8 encr_type, u8 *len, u8 *data)
 	}
 
 	switch (encr_type) {
-	case HDMI_HDCP_ENCR_OFF:
-		config.hdcp_management_format.req_encr =
-				AV8100_HDCP_ENCR_REQ_OFF;
-		config.hdcp_management_format.encr_use =
-				AV8100_HDCP_ENCR_USE_OESS;
-		break;
-
 	case HDMI_HDCP_ENCR_OESS:
-		config.hdcp_management_format.req_encr =
-				AV8100_HDCP_ENCR_REQ_ON;
+	default:
 		config.hdcp_management_format.encr_use =
 				AV8100_HDCP_ENCR_USE_OESS;
 		break;
 
 	case HDMI_HDCP_ENCR_EESS:
-		config.hdcp_management_format.req_encr =
-				AV8100_HDCP_ENCR_REQ_ON;
 		config.hdcp_management_format.encr_use =
 				AV8100_HDCP_ENCR_USE_EESS;
 		break;
diff --git a/include/video/av8100.h b/include/video/av8100.h
index 6f59cee5b70..b0dc7b7f1cb 100644
--- a/include/video/av8100.h
+++ b/include/video/av8100.h
@@ -321,11 +321,6 @@ enum av8100_hdcp_auth_req_type {
 	AV8100_HDCP_AUTH_CONT = 3,
 };
 
-enum av8100_hdcp_encr_req_type {
-	AV8100_HDCP_ENCR_REQ_OFF = 0,
-	AV8100_HDCP_ENCR_REQ_ON = 1,
-};
-
 enum av8100_hdcp_encr_use {
 	AV8100_HDCP_ENCR_USE_OESS = 0,
 	AV8100_HDCP_ENCR_USE_EESS = 1,
@@ -333,7 +328,6 @@ enum av8100_hdcp_encr_use {
 
 struct av8100_hdcp_management_format_cmd {
 	unsigned char req_type;
-	unsigned char req_encr;
 	unsigned char encr_use;
 };
 
diff --git a/include/video/hdmi.h b/include/video/hdmi.h
index 0a4dd723486..d2ef87f910a 100644
--- a/include/video/hdmi.h
+++ b/include/video/hdmi.h
@@ -113,9 +113,8 @@ enum hdmi_hdcp_auth_type {
 };
 
 enum hdmi_hdcp_encr_type {
-	HDMI_HDCP_ENCR_OFF = 0,
-	HDMI_HDCP_ENCR_OESS = 1,
-	HDMI_HDCP_ENCR_EESS = 2,
+	HDMI_HDCP_ENCR_OESS = 0,
+	HDMI_HDCP_ENCR_EESS = 1,
 };
 
 struct plug_detect {
-- 
cgit v1.2.3


From 1f114ff55c59f835689ceda2884bbe2ac5a1902f Mon Sep 17 00:00:00 2001
From: Robert Marklund <robert.marklund@stericsson.com>
Date: Thu, 23 Jun 2011 13:22:25 +0200
Subject: av8100: Big kernel lock removed in 3.0

Removed the use of big kernel lock, this must be fixed properly
otherwise this will fail.

Change-Id: I3af5e0a0b76355563454f046e2297f56bdf8e3df
Signed-off-by: Robert Marklund <robert.marklund@stericsson.com>
---
 drivers/video/av8100/hdmi.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/drivers/video/av8100/hdmi.c b/drivers/video/av8100/hdmi.c
index 0cf85655b7f..b023048d810 100644
--- a/drivers/video/av8100/hdmi.c
+++ b/drivers/video/av8100/hdmi.c
@@ -23,7 +23,6 @@
 #include "hdmi_loc.h"
 #include <linux/slab.h>
 #include <linux/sched.h>
-#include <linux/smp_lock.h>
 
 #define SYSFS_EVENT_FILENAME "evread"
 
@@ -2104,9 +2103,7 @@ static long hdmi_unlocked_ioctl(struct file *file, unsigned int cmd,
 {
 	int ret;
 
-	lock_kernel();
 	ret = hdmi_ioctl(file, cmd, arg);
-	unlock_kernel();
 
 	return ret;
 }
-- 
cgit v1.2.3


From ed81984fcf6fb71a29c095f25ce06eb0a689f40e Mon Sep 17 00:00:00 2001
From: Maciej Socha <maciej.socha@stericsson.com>
Date: Fri, 17 Jun 2011 15:09:02 +0200
Subject: b2r2: Correct support for 24/32bit (A)YUV(8)888

Order of the color components has been corrected to match
the specification of the formats.

ST-Ericsson ID: 341178
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I9211ccce6a099b89fe247bc2ed486aa2bc6c6ac8
Signed-off-by: Maciej Socha <maciej.socha@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/25429
Reviewed-by: QATOOLS
Reviewed-by: QATEST
Reviewed-by: Robert FEKETE <robert.fekete@stericsson.com>
Reviewed-by: Linus WALLEIJ <linus.walleij@stericsson.com>
---
 drivers/video/b2r2/b2r2_generic.c    | 147 ++++++++++++++++++++++++-----------
 drivers/video/b2r2/b2r2_hw.h         |  48 +++++++++++-
 drivers/video/b2r2/b2r2_node_split.c |  62 +++++++++++++++
 3 files changed, 212 insertions(+), 45 deletions(-)

diff --git a/drivers/video/b2r2/b2r2_generic.c b/drivers/video/b2r2/b2r2_generic.c
index d2228e3cf8a..738e11bf4ba 100644
--- a/drivers/video/b2r2/b2r2_generic.c
+++ b/drivers/video/b2r2/b2r2_generic.c
@@ -543,22 +543,27 @@ static void setup_fill_input_stage(const struct b2r2_blt_request *req,
 	case B2R2_BLT_FMT_YVU422_PACKED_SEMI_PLANAR:
 	case B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE:
 	case B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE:
-		/*
-		 * Set up IVMX
-		 * The destination format is in fact YUV,
-		 * but the input stage stores the data in
-		 * an intermediate buffer which is RGB.
-		 * Hence the conversion from YUV to RGB.
-		 */
-		node->node.GROUP0.B2R2_INS |= B2R2_INS_IVMX_ENABLED;
-		node->node.GROUP0.B2R2_CIC |= B2R2_CIC_IVMX;
-		node->node.GROUP15.B2R2_VMX0 = B2R2_VMX0_YUV_TO_RGB_601_VIDEO;
-		node->node.GROUP15.B2R2_VMX1 = B2R2_VMX1_YUV_TO_RGB_601_VIDEO;
-		node->node.GROUP15.B2R2_VMX2 = B2R2_VMX2_YUV_TO_RGB_601_VIDEO;
-		node->node.GROUP15.B2R2_VMX3 = B2R2_VMX3_YUV_TO_RGB_601_VIDEO;
-
 		if ((req->user_req.flags & B2R2_BLT_FLAG_SOURCE_FILL) != 0) {
 			fill_fmt = B2R2_NATIVE_AYCBCR8888;
+			/*
+			 * Set up IVMX
+			 * The destination format is in fact YUV,
+			 * but the input stage stores the data in
+			 * an intermediate buffer which is RGB.
+			 * Hence the conversion from YUV to RGB.
+			 * Format of the supplied src_color is
+			 * B2R2_BLT_FMT_32_BIT_AYUV8888.
+			 */
+			node->node.GROUP0.B2R2_INS |= B2R2_INS_IVMX_ENABLED;
+			node->node.GROUP0.B2R2_CIC |= B2R2_CIC_IVMX;
+			node->node.GROUP15.B2R2_VMX0 =
+					B2R2_VMX0_BLT_YUV888_TO_RGB_601_VIDEO;
+			node->node.GROUP15.B2R2_VMX1 =
+					B2R2_VMX1_BLT_YUV888_TO_RGB_601_VIDEO;
+			node->node.GROUP15.B2R2_VMX2 =
+					B2R2_VMX2_BLT_YUV888_TO_RGB_601_VIDEO;
+			node->node.GROUP15.B2R2_VMX3 =
+					B2R2_VMX3_BLT_YUV888_TO_RGB_601_VIDEO;
 		} else {
 			/* SOURCE_FILL_RAW */
 			bool dst_yuv_planar =
@@ -599,7 +604,22 @@ static void setup_fill_input_stage(const struct b2r2_blt_request *req,
 				fill_fmt = to_native_fmt(dst_img->fmt);
 			}
 
-			if (dst_img->fmt == B2R2_BLT_FMT_Y_CB_Y_CR) {
+			switch (dst_img->fmt) {
+			case B2R2_BLT_FMT_24_BIT_YUV888:
+			case B2R2_BLT_FMT_32_BIT_AYUV8888:
+				node->node.GROUP0.B2R2_INS |=
+					B2R2_INS_IVMX_ENABLED;
+				node->node.GROUP0.B2R2_CIC |= B2R2_CIC_IVMX;
+				node->node.GROUP15.B2R2_VMX0 =
+					B2R2_VMX0_BLT_YUV888_TO_RGB_601_VIDEO;
+				node->node.GROUP15.B2R2_VMX1 =
+					B2R2_VMX1_BLT_YUV888_TO_RGB_601_VIDEO;
+				node->node.GROUP15.B2R2_VMX2 =
+					B2R2_VMX2_BLT_YUV888_TO_RGB_601_VIDEO;
+				node->node.GROUP15.B2R2_VMX3 =
+					B2R2_VMX3_BLT_YUV888_TO_RGB_601_VIDEO;
+				break;
+			case B2R2_BLT_FMT_Y_CB_Y_CR:
 				/*
 				 * Setup input VMX to convert YVU to
 				 * RGB 601 VIDEO
@@ -614,6 +634,27 @@ static void setup_fill_input_stage(const struct b2r2_blt_request *req,
 					B2R2_VMX2_YVU_TO_RGB_601_VIDEO;
 				node->node.GROUP15.B2R2_VMX3 =
 					B2R2_VMX3_YVU_TO_RGB_601_VIDEO;
+				break;
+			default:
+				/*
+				 * Set up IVMX
+				 * The destination format is in fact YUV,
+				 * but the input stage stores the data in
+				 * an intermediate buffer which is RGB.
+				 * Hence the conversion from YUV to RGB.
+				 */
+				node->node.GROUP0.B2R2_INS |=
+					B2R2_INS_IVMX_ENABLED;
+				node->node.GROUP0.B2R2_CIC |= B2R2_CIC_IVMX;
+				node->node.GROUP15.B2R2_VMX0 =
+					B2R2_VMX0_YUV_TO_RGB_601_VIDEO;
+				node->node.GROUP15.B2R2_VMX1 =
+					B2R2_VMX1_YUV_TO_RGB_601_VIDEO;
+				node->node.GROUP15.B2R2_VMX2 =
+					B2R2_VMX2_YUV_TO_RGB_601_VIDEO;
+				node->node.GROUP15.B2R2_VMX3 =
+					B2R2_VMX3_YUV_TO_RGB_601_VIDEO;
+				break;
 			}
 		}
 		break;
@@ -766,36 +807,54 @@ static void setup_input_stage(const struct b2r2_blt_request *req,
 		node->node.GROUP15.B2R2_VMX3 = B2R2_VMX3_RGB_TO_BGR;
 		break;
 	case B2R2_BLT_FMT_Y_CB_Y_CR:
+		/*
+		 * Setup input VMX to convert YVU to RGB 601 VIDEO
+		 * Chroma components are swapped so
+		 * it is YVU and not YUV.
+		 */
+		node->node.GROUP0.B2R2_INS |= B2R2_INS_IVMX_ENABLED;
+		node->node.GROUP0.B2R2_CIC |= B2R2_CIC_IVMX;
+		node->node.GROUP15.B2R2_VMX0 =
+			B2R2_VMX0_YVU_TO_RGB_601_VIDEO;
+		node->node.GROUP15.B2R2_VMX1 =
+			B2R2_VMX1_YVU_TO_RGB_601_VIDEO;
+		node->node.GROUP15.B2R2_VMX2 =
+			B2R2_VMX2_YVU_TO_RGB_601_VIDEO;
+		node->node.GROUP15.B2R2_VMX3 =
+			B2R2_VMX3_YVU_TO_RGB_601_VIDEO;
+		break;
 	case B2R2_BLT_FMT_CB_Y_CR_Y:
+		/* Set up IVMX */
+		node->node.GROUP0.B2R2_INS |= B2R2_INS_IVMX_ENABLED;
+		node->node.GROUP0.B2R2_CIC |= B2R2_CIC_IVMX;
+		node->node.GROUP15.B2R2_VMX0 =
+			B2R2_VMX0_YUV_TO_RGB_601_VIDEO;
+		node->node.GROUP15.B2R2_VMX1 =
+			B2R2_VMX1_YUV_TO_RGB_601_VIDEO;
+		node->node.GROUP15.B2R2_VMX2 =
+			B2R2_VMX2_YUV_TO_RGB_601_VIDEO;
+		node->node.GROUP15.B2R2_VMX3 =
+			B2R2_VMX3_YUV_TO_RGB_601_VIDEO;
+		break;
 	case B2R2_BLT_FMT_24_BIT_YUV888:
 	case B2R2_BLT_FMT_32_BIT_AYUV8888:
-		/* Set up IVMX */
+		/*
+		 * Set up IVMX.
+		 * Color components are laid out in memory as V, U, Y, (A)
+		 * with V at the first byte (due to little endian addressing).
+		 * B2R2 expects them to be as U, Y, V, (A)
+		 * with U at the first byte.
+		 */
 		node->node.GROUP0.B2R2_INS |= B2R2_INS_IVMX_ENABLED;
 		node->node.GROUP0.B2R2_CIC |= B2R2_CIC_IVMX;
-		if (src_img->fmt == B2R2_BLT_FMT_Y_CB_Y_CR) {
-			/*
-			 * Setup input VMX to convert YVU to RGB 601 VIDEO
-			 * Chroma components are swapped so
-			 * it is YVU and not YUV.
-			 */
-			node->node.GROUP15.B2R2_VMX0 =
-				B2R2_VMX0_YVU_TO_RGB_601_VIDEO;
-			node->node.GROUP15.B2R2_VMX1 =
-				B2R2_VMX1_YVU_TO_RGB_601_VIDEO;
-			node->node.GROUP15.B2R2_VMX2 =
-				B2R2_VMX2_YVU_TO_RGB_601_VIDEO;
-			node->node.GROUP15.B2R2_VMX3 =
-				B2R2_VMX3_YVU_TO_RGB_601_VIDEO;
-		} else {
-			node->node.GROUP15.B2R2_VMX0 =
-				B2R2_VMX0_YUV_TO_RGB_601_VIDEO;
-			node->node.GROUP15.B2R2_VMX1 =
-				B2R2_VMX1_YUV_TO_RGB_601_VIDEO;
-			node->node.GROUP15.B2R2_VMX2 =
-				B2R2_VMX2_YUV_TO_RGB_601_VIDEO;
-			node->node.GROUP15.B2R2_VMX3 =
-				B2R2_VMX3_YUV_TO_RGB_601_VIDEO;
-		}
+		node->node.GROUP15.B2R2_VMX0 =
+			B2R2_VMX0_BLT_YUV888_TO_RGB_601_VIDEO;
+		node->node.GROUP15.B2R2_VMX1 =
+			B2R2_VMX1_BLT_YUV888_TO_RGB_601_VIDEO;
+		node->node.GROUP15.B2R2_VMX2 =
+			B2R2_VMX2_BLT_YUV888_TO_RGB_601_VIDEO;
+		node->node.GROUP15.B2R2_VMX3 =
+			B2R2_VMX3_BLT_YUV888_TO_RGB_601_VIDEO;
 		break;
 	case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
 	case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:
@@ -2002,13 +2061,13 @@ static void setup_writeback_stage(const struct b2r2_blt_request *req,
 			node->node.GROUP0.B2R2_INS |= B2R2_INS_OVMX_ENABLED;
 			node->node.GROUP0.B2R2_CIC |= B2R2_CIC_OVMX;
 			node->node.GROUP16.B2R2_VMX0 =
-				B2R2_VMX0_RGB_TO_YUV_601_VIDEO;
+				B2R2_VMX0_RGB_TO_BLT_YUV888_601_VIDEO;
 			node->node.GROUP16.B2R2_VMX1 =
-				B2R2_VMX1_RGB_TO_YUV_601_VIDEO;
+				B2R2_VMX1_RGB_TO_BLT_YUV888_601_VIDEO;
 			node->node.GROUP16.B2R2_VMX2 =
-				B2R2_VMX2_RGB_TO_YUV_601_VIDEO;
+				B2R2_VMX2_RGB_TO_BLT_YUV888_601_VIDEO;
 			node->node.GROUP16.B2R2_VMX3 =
-				B2R2_VMX3_RGB_TO_YUV_601_VIDEO;
+				B2R2_VMX3_RGB_TO_BLT_YUV888_601_VIDEO;
 			break;
 		default:
 			break;
diff --git a/drivers/video/b2r2/b2r2_hw.h b/drivers/video/b2r2/b2r2_hw.h
index 2112a34dfe9..0dd5f758eb5 100644
--- a/drivers/video/b2r2/b2r2_hw.h
+++ b/drivers/video/b2r2/b2r2_hw.h
@@ -143,7 +143,8 @@ enum b2r2_ack {
 	B2R2_ACK_MODE_BYPASS_S2_S3 =                 0x7 << B2R2_ACK_MODE_SHIFT,
 	B2R2_ACK_MODE_CLIPMASK_LOGICAL_SECOND_PASS = 0x8 << B2R2_ACK_MODE_SHIFT,
 	B2R2_ACK_MODE_CLIPMASK_XYL_LOGICAL =         0x9 << B2R2_ACK_MODE_SHIFT,
-	B2R2_ACK_MODE_CLIPMASK_XYL_BLEND_NOT_PREMULT = 0xa << B2R2_ACK_MODE_SHIFT,
+	B2R2_ACK_MODE_CLIPMASK_XYL_BLEND_NOT_PREMULT =
+						     0xa << B2R2_ACK_MODE_SHIFT,
 	B2R2_ACK_MODE_CLIPMASK_XYL_BLEND_PREMULT =   0xb << B2R2_ACK_MODE_SHIFT,
 
 	/* ALU channel selection */
@@ -634,4 +635,49 @@ enum b2r2_plug_page_size {
 #define B2R2_VMX2_YVU_TO_YUV_601_VIDEO 0x20000000
 #define B2R2_VMX3_YVU_TO_YUV_601_VIDEO 0x00000000
 
+/* VMX register values for RGB to BLT_YUV888 conversion */
+
+/* 601 Video Matrix (standard 601 conversion) */
+/*
+ * BLT_YUV888 has color components laid out in memory as V, U, Y, (Alpha)
+ * with V at the first byte (due to little endian addressing).
+ * B2R2 expects them to be as U, Y, V, (A)
+ * with U at the first byte.
+ * Note: RGB -> BLT_YUV888 values are calculated by multiplying
+ * the RGB -> YUV matrix [A], with [S] to form [S]x[A] where
+ *     |0 1 0|
+ * S = |0 0 1|
+ *     |1 0 0|
+ * Essentially changing the order of rows in the original
+ * matrix [A].
+ * row1 -> row3
+ * row2 -> row1
+ * row3 -> row2
+ * Values in the offset vector are swapped in the same manner.
+ */
+#define B2R2_VMX0_RGB_TO_BLT_YUV888_601_VIDEO 0x0982581d
+#define B2R2_VMX1_RGB_TO_BLT_YUV888_601_VIDEO 0xfa9ea483
+#define B2R2_VMX2_RGB_TO_BLT_YUV888_601_VIDEO 0x107e4beb
+#define B2R2_VMX3_RGB_TO_BLT_YUV888_601_VIDEO 0x00020080
+
+/* VMX register values for BLT_YUV888 to RGB conversion */
+
+/*
+ * Note: BLT_YUV888 -> RGB values are calculated by multiplying
+ * the YUV -> RGB matrix [A], with [S] to form [A]x[S] where
+ *     |0 0 1|
+ * S = |1 0 0|
+ *     |0 1 0|
+ * Essentially changing the order of columns in the original
+ * matrix [A].
+ * col1 -> col3
+ * col2 -> col1
+ * col3 -> col2
+ * Values in the offset vector remain unchanged.
+ */
+#define B2R2_VMX0_BLT_YUV888_TO_RGB_601_VIDEO 0x20000121
+#define B2R2_VMX1_BLT_YUV888_TO_RGB_601_VIDEO 0x201ea74c
+#define B2R2_VMX2_BLT_YUV888_TO_RGB_601_VIDEO 0x2006f000
+#define B2R2_VMX3_BLT_YUV888_TO_RGB_601_VIDEO 0x34f21322
+
 #endif /* B2R2_HW_H__ */
diff --git a/drivers/video/b2r2/b2r2_node_split.c b/drivers/video/b2r2/b2r2_node_split.c
index c2b7e048dd5..90674e0e540 100644
--- a/drivers/video/b2r2/b2r2_node_split.c
+++ b/drivers/video/b2r2/b2r2_node_split.c
@@ -46,6 +46,13 @@ static const u32 vmx_rgb_to_yuv[] = {
 	B2R2_VMX3_RGB_TO_YUV_601_VIDEO,
 };
 
+static const u32 vmx_rgb_to_blt_yuv888[] = {
+	B2R2_VMX0_RGB_TO_BLT_YUV888_601_VIDEO,
+	B2R2_VMX1_RGB_TO_BLT_YUV888_601_VIDEO,
+	B2R2_VMX2_RGB_TO_BLT_YUV888_601_VIDEO,
+	B2R2_VMX3_RGB_TO_BLT_YUV888_601_VIDEO,
+};
+
 static const u32 vmx_yuv_to_rgb[] = {
 	B2R2_VMX0_YUV_TO_RGB_601_VIDEO,
 	B2R2_VMX1_YUV_TO_RGB_601_VIDEO,
@@ -53,6 +60,13 @@ static const u32 vmx_yuv_to_rgb[] = {
 	B2R2_VMX3_YUV_TO_RGB_601_VIDEO,
 };
 
+static const u32 vmx_blt_yuv888_to_rgb[] = {
+	B2R2_VMX0_BLT_YUV888_TO_RGB_601_VIDEO,
+	B2R2_VMX1_BLT_YUV888_TO_RGB_601_VIDEO,
+	B2R2_VMX2_BLT_YUV888_TO_RGB_601_VIDEO,
+	B2R2_VMX3_BLT_YUV888_TO_RGB_601_VIDEO,
+};
+
 static const u32 vmx_yvu_to_rgb[] = {
 	B2R2_VMX0_YVU_TO_RGB_601_VIDEO,
 	B2R2_VMX1_YVU_TO_RGB_601_VIDEO,
@@ -252,6 +266,32 @@ int b2r2_node_split_analyze(const struct b2r2_blt_request *req,
 		goto unsupported;
 	}
 
+	/* Unsupported formats on src */
+	switch (req->user_req.src_img.fmt) {
+	case B2R2_BLT_FMT_24_BIT_YUV888:
+	case B2R2_BLT_FMT_32_BIT_AYUV8888:
+		if (!is_rgb_fmt(req->user_req.dst_img.fmt)) {
+			ret = -ENOSYS;
+			goto unsupported;
+		}
+		break;
+	default:
+		break;
+	}
+
+	/* Unsupported formats on dst */
+	switch (req->user_req.dst_img.fmt) {
+	case B2R2_BLT_FMT_24_BIT_YUV888:
+	case B2R2_BLT_FMT_32_BIT_AYUV8888:
+		if (!is_rgb_fmt(req->user_req.src_img.fmt)) {
+			ret = -ENOSYS;
+			goto unsupported;
+		}
+		break;
+	default:
+		break;
+	}
+
 	if ((this->flags & B2R2_BLT_FLAG_SOURCE_COLOR_KEY) &&
 			(is_yuv_fmt(req->user_req.src_img.fmt) ||
 			req->user_req.src_img.fmt == B2R2_BLT_FMT_1_BIT_A1 ||
@@ -651,6 +691,9 @@ static int analyze_fmt_conv(struct b2r2_node_split_buf *src,
 	if (is_rgb_fmt(src->fmt)) {
 		if (is_yvu_fmt(dst->fmt))
 			*vmx = &vmx_rgb_to_yvu[0];
+		else if (dst->fmt == B2R2_BLT_FMT_24_BIT_YUV888 ||
+				dst->fmt == B2R2_BLT_FMT_32_BIT_AYUV8888)
+			*vmx = &vmx_rgb_to_blt_yuv888[0];
 		else if (is_yuv_fmt(dst->fmt))
 			*vmx = &vmx_rgb_to_yuv[0];
 		else if (is_bgr_fmt(dst->fmt))
@@ -660,14 +703,30 @@ static int analyze_fmt_conv(struct b2r2_node_split_buf *src,
 			*vmx = &vmx_yvu_to_rgb[0];
 		else if (is_bgr_fmt(dst->fmt))
 			*vmx = &vmx_yvu_to_bgr[0];
+		else if (dst->fmt == B2R2_BLT_FMT_24_BIT_YUV888 ||
+				dst->fmt == B2R2_BLT_FMT_32_BIT_AYUV8888)
+			BUG_ON(1);
 		else if (is_yuv_fmt(dst->fmt) &&
 				!is_yvu_fmt(dst->fmt))
 			*vmx = &vmx_yvu_to_yuv[0];
+	} else if (src->fmt == B2R2_BLT_FMT_24_BIT_YUV888 ||
+			src->fmt == B2R2_BLT_FMT_32_BIT_AYUV8888) {
+		if (is_rgb_fmt(dst->fmt))
+			*vmx = &vmx_blt_yuv888_to_rgb[0];
+		else
+			/*
+			 * not supported, b2r2_node_split_analyze()
+			 * should have returned ENOSYS.
+			 */
+			BUG_ON(1);
 	} else if (is_yuv_fmt(src->fmt)) {
 		if (is_rgb_fmt(dst->fmt))
 			*vmx = &vmx_yuv_to_rgb[0];
 		else if (is_bgr_fmt(dst->fmt))
 			*vmx = &vmx_yuv_to_bgr[0];
+		else if (dst->fmt == B2R2_BLT_FMT_24_BIT_YUV888 ||
+				dst->fmt == B2R2_BLT_FMT_32_BIT_AYUV8888)
+			BUG_ON(1);
 		else if (is_yvu_fmt(dst->fmt))
 			*vmx = &vmx_yvu_to_yuv[0];
 	} else if (is_bgr_fmt(src->fmt)) {
@@ -675,6 +734,9 @@ static int analyze_fmt_conv(struct b2r2_node_split_buf *src,
 			*vmx = &vmx_rgb_to_bgr[0];
 		else if (is_yvu_fmt(dst->fmt))
 			*vmx = &vmx_bgr_to_yvu[0];
+		else if (dst->fmt == B2R2_BLT_FMT_24_BIT_YUV888 ||
+				dst->fmt == B2R2_BLT_FMT_32_BIT_AYUV8888)
+			BUG_ON(1);
 		else if (is_yuv_fmt(dst->fmt))
 			*vmx = &vmx_bgr_to_yuv[0];
 	}
-- 
cgit v1.2.3


From 0451214e6aec37069f621822ad782ec9820db715 Mon Sep 17 00:00:00 2001
From: Per Persson <per.xb.persson@stericsson.com>
Date: Thu, 9 Jun 2011 13:26:31 +0200
Subject: video: mcde: Add Fictive display

The possibility to use a fictive display that is
not using HW, is added.

Depends-On: I1ba92f35528518c9a9e2c805973dac8033a17f39

ST-Ericsson ID: 344358
ST-Ericsson Linux next: Not tested, ER 282779
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I8ddc6069e037d879582c810f9298273b3d75cc15
Signed-off-by: Per Persson <per.xb.persson@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/24716
Reviewed-by: QATOOLS
Reviewed-by: QATEST
Reviewed-by: Marcel TUNNISSEN <marcel.tuennissen@stericsson.com>
Reviewed-by: Linus WALLEIJ <linus.walleij@stericsson.com>
---
 arch/arm/mach-ux500/Kconfig-arch        |  6 ++++
 arch/arm/mach-ux500/board-mop500-mcde.c | 38 ++++++++++++++++----
 drivers/video/mcde/Makefile             |  1 +
 drivers/video/mcde/display-fictive.c    | 64 +++++++++++++++++++++++++++++++++
 drivers/video/mcde/mcde_fb.c            | 45 ++++++++++++++---------
 include/video/mcde_display.h            |  1 +
 6 files changed, 133 insertions(+), 22 deletions(-)
 create mode 100644 drivers/video/mcde/display-fictive.c

diff --git a/arch/arm/mach-ux500/Kconfig-arch b/arch/arm/mach-ux500/Kconfig-arch
index 580566baf99..7f7a52de9eb 100644
--- a/arch/arm/mach-ux500/Kconfig-arch
+++ b/arch/arm/mach-ux500/Kconfig-arch
@@ -149,6 +149,12 @@ config DISPLAY_AV8100_TRIPPLE_BUFFER
 	help
 	  Say yes to enable tripple buffer. You'll get double buffer otherwise
 
+config DISPLAY_FICTIVE
+	bool "DISPLAY fictive"
+	default n
+	---help---
+	  Say Y if you want a fictive display that doesn't access hardware
+
 endmenu
 
 endif
diff --git a/arch/arm/mach-ux500/board-mop500-mcde.c b/arch/arm/mach-ux500/board-mop500-mcde.c
index d16c715ed86..a0ae5944b0b 100644
--- a/arch/arm/mach-ux500/board-mop500-mcde.c
+++ b/arch/arm/mach-ux500/board-mop500-mcde.c
@@ -39,10 +39,21 @@ static struct delayed_work work_dispreg_hdmi;
 #endif
 
 enum {
+#ifdef CONFIG_DISPLAY_GENERIC_DSI_PRIMARY
 	PRIMARY_DISPLAY_ID,
+#endif
+#ifdef CONFIG_DISPLAY_GENERIC_DSI_SECONDARY
 	SECONDARY_DISPLAY_ID,
+#endif
+#ifdef CONFIG_DISPLAY_FICTIVE
+	FICTIVE_DISPLAY_ID,
+#endif
+#ifdef CONFIG_DISPLAY_AV8100_TERTIARY
 	AV8100_DISPLAY_ID,
+#endif
+#ifdef CONFIG_DISPLAY_AB8500_TERTIARY
 	AB8500_DISPLAY_ID,
+#endif
 	MCDE_NR_OF_DISPLAYS
 };
 static int display_initialized_during_boot;
@@ -79,6 +90,17 @@ static struct mcde_col_transform rgb_2_yCbCr_transform = {
 };
 #endif
 
+#ifdef CONFIG_DISPLAY_FICTIVE
+static struct mcde_display_device fictive_display = {
+	.name = "mcde_disp_fictive",
+	.id = FICTIVE_DISPLAY_ID,
+	.fictive = true,
+	.default_pixel_format = MCDE_OVLYPIXFMT_RGB565,
+	.native_x_res = 1280,
+	.native_y_res = 720,
+};
+#endif /* CONFIG_DISPLAY_FICTIVE */
+
 #ifdef CONFIG_DISPLAY_GENERIC_DSI_PRIMARY
 static struct mcde_port port0 = {
 	.type = MCDE_PORTTYPE_DSI,
@@ -104,7 +126,7 @@ static struct mcde_port port0 = {
 	},
 };
 
-struct mcde_display_generic_platform_data generic_display0_pdata = {
+static struct mcde_display_generic_platform_data generic_display0_pdata = {
 	.reset_delay = 1,
 #ifdef CONFIG_REGULATOR
 	.regulator_id = "vaux12v5",
@@ -113,7 +135,7 @@ struct mcde_display_generic_platform_data generic_display0_pdata = {
 #endif
 };
 
-struct mcde_display_device generic_display0 = {
+static struct mcde_display_device generic_display0 = {
 	.name = "mcde_disp_generic",
 	.id = PRIMARY_DISPLAY_ID,
 	.port = &port0,
@@ -212,7 +234,7 @@ static struct mcde_port port0 = {
 	},
 };
 
-struct mcde_display_dpi_platform_data generic_display0_pdata = {0};
+static struct mcde_display_dpi_platform_data generic_display0_pdata = {0};
 static struct ux500_pins *dpi_pins;
 
 static int dpi_display_platform_enable(struct mcde_display_device *ddev)
@@ -247,7 +269,7 @@ static int dpi_display_platform_disable(struct mcde_display_device *ddev)
 
 }
 
-struct mcde_display_device generic_display0 = {
+static struct mcde_display_device generic_display0 = {
 	.name = "mcde_display_dpi",
 	.id = 0,
 	.port = &port0,
@@ -406,7 +428,6 @@ static struct mcde_display_device av8100_hdmi = {
 	.default_pixel_format = MCDE_OVLYPIXFMT_RGB888,
 	.native_x_res = 1280,
 	.native_y_res = 720,
-	.synchronized_update = false,
 	.dev = {
 		.platform_data = &av8100_hdmi_pdata,
 	},
@@ -436,7 +457,7 @@ static int display_postregistered_callback(struct notifier_block *nb,
 	if (event != MCDE_DSS_EVENT_DISPLAY_REGISTERED)
 		return 0;
 
-	if (ddev->id < PRIMARY_DISPLAY_ID || ddev->id >= MCDE_NR_OF_DISPLAYS)
+	if (ddev->id < 0 || ddev->id >= MCDE_NR_OF_DISPLAYS)
 		return 0;
 
 	mcde_dss_get_native_resolution(ddev, &width, &height);
@@ -626,6 +647,11 @@ int __init init_display_devices(void)
 	ret = mcde_dss_register_notifier(&display_nb);
 	if (ret)
 		pr_warning("Failed to register dss notifier\n");
+#ifdef CONFIG_DISPLAY_FICTIVE
+	ret = mcde_display_device_register(&fictive_display);
+	if (ret)
+		pr_warning("Failed to register fictive display device\n");
+#endif
 
 #ifdef CONFIG_DISPLAY_GENERIC_PRIMARY
 	if (machine_is_hrefv60())
diff --git a/drivers/video/mcde/Makefile b/drivers/video/mcde/Makefile
index 93097f8961e..7c9324ded3a 100644
--- a/drivers/video/mcde/Makefile
+++ b/drivers/video/mcde/Makefile
@@ -7,6 +7,7 @@ obj-$(CONFIG_MCDE_DISPLAY_SONY_SY35560_DSI)	+= display-sony_sy35560_dsi.o
 obj-$(CONFIG_MCDE_DISPLAY_VUIB500_DPI)		+= display-vuib500-dpi.o
 obj-$(CONFIG_MCDE_DISPLAY_AB8500_DENC)		+= display-ab8500.o
 obj-$(CONFIG_MCDE_DISPLAY_AV8100)		+= display-av8100.o
+obj-$(CONFIG_DISPLAY_FICTIVE)			+= display-fictive.o
 
 ifdef CONFIG_FB_MCDE_DEBUG
 EXTRA_CFLAGS += -DDEBUG
diff --git a/drivers/video/mcde/display-fictive.c b/drivers/video/mcde/display-fictive.c
new file mode 100644
index 00000000000..8389357a693
--- /dev/null
+++ b/drivers/video/mcde/display-fictive.c
@@ -0,0 +1,64 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2011
+ *
+ * ST-Ericsson MCDE fictive display driver
+ *
+ * Author: Per Persson <per.xb.persson@stericsson.com>
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+
+#include <linux/kernel.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/gpio.h>
+#include <linux/err.h>
+
+#include <video/mcde_display.h>
+
+static int __devinit fictive_probe(struct mcde_display_device *dev)
+{
+	dev->prepare_for_update = NULL;
+	dev->platform_enable = NULL,
+	dev->platform_disable = NULL,
+	dev->set_power_mode = NULL;
+
+	dev_info(&dev->dev, "Fictive display probed\n");
+
+	return 0;
+}
+
+static int __devexit fictive_remove(struct mcde_display_device *dev)
+{
+	return 0;
+}
+
+static struct mcde_display_driver fictive_driver = {
+	.probe	= fictive_probe,
+	.remove = fictive_remove,
+	.driver = {
+		.name	= "mcde_disp_fictive",
+	},
+};
+
+/* Module init */
+static int __init mcde_display_fictive_init(void)
+{
+	pr_info("%s\n", __func__);
+
+	return mcde_display_driver_register(&fictive_driver);
+}
+module_init(mcde_display_fictive_init);
+
+static void __exit mcde_display_fictive_exit(void)
+{
+	pr_info("%s\n", __func__);
+
+	mcde_display_driver_unregister(&fictive_driver);
+}
+module_exit(mcde_display_fictive_exit);
+
+MODULE_AUTHOR("Per Persson <per.xb.persson@stericsson.com>");
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("ST-Ericsson MCDE fictive display driver");
diff --git a/drivers/video/mcde/mcde_fb.c b/drivers/video/mcde/mcde_fb.c
index cd7dd70101d..3b464cd8024 100644
--- a/drivers/video/mcde/mcde_fb.c
+++ b/drivers/video/mcde/mcde_fb.c
@@ -490,6 +490,9 @@ static int apply_var(struct fb_info *fbi, struct mcde_display_device *ddev)
 	}
 	fbi->fix.line_length = line_len;
 
+	if (ddev->fictive)
+		goto apply_var_end;
+
 	if (ddev) {
 		/* Apply pixel format */
 		fmt = var_to_pix_fmt_info(var);
@@ -520,6 +523,7 @@ static int apply_var(struct fb_info *fbi, struct mcde_display_device *ddev)
 		mcde_dss_update_overlay(ovly, num_buffers == 3);
 	}
 
+apply_var_end:
 	return 0;
 }
 
@@ -638,13 +642,15 @@ struct fb_info *mcde_fb_create(struct mcde_display_device *ddev,
 	init_fb(fbi);
 	mfb = to_mcde_fb(fbi);
 
-	ret = mcde_dss_open_channel(ddev);
-	if (ret)
-		goto channel_open_failed;
+	if (ddev->fictive == false) {
+		ret = mcde_dss_open_channel(ddev);
+		if (ret)
+			goto channel_open_failed;
 
-	ret = mcde_dss_enable_display(ddev);
-	if (ret)
-		goto display_enable_failed;
+		ret = mcde_dss_enable_display(ddev);
+		if (ret)
+			goto display_enable_failed;
+	}
 
 	/* Prepare var and allocate frame buffer memory */
 	init_var_fmt(&fbi->var, w, h, vw, vh, pix_fmt, rotate);
@@ -653,7 +659,8 @@ struct fb_info *mcde_fb_create(struct mcde_display_device *ddev,
 	if (ret)
 		goto apply_var_failed;
 
-	mcde_dss_set_pixel_format(ddev, ddev->port->pixel_format);
+	if (ddev->fictive == false)
+		mcde_dss_set_pixel_format(ddev, ddev->port->pixel_format);
 
 	/* Setup overlay */
 	get_ovly_info(fbi, NULL, &ovly_info);
@@ -665,9 +672,11 @@ struct fb_info *mcde_fb_create(struct mcde_display_device *ddev,
 	mfb->ovlys[0] = ovly;
 	mfb->num_ovlys = 1;
 
-	ret = mcde_dss_enable_overlay(ovly);
-	if (ret)
-		goto ovly_enable_failed;
+	if (ddev->fictive == false) {
+		ret = mcde_dss_enable_overlay(ovly);
+		if (ret)
+			goto ovly_enable_failed;
+	}
 
 	mfb->id = ddev->id;
 
@@ -679,11 +688,13 @@ struct fb_info *mcde_fb_create(struct mcde_display_device *ddev,
 	ddev->fbi = fbi;
 
 #ifdef CONFIG_HAS_EARLYSUSPEND
-	mfb->early_suspend.level =
+	if (ddev->fictive == false) {
+		mfb->early_suspend.level =
 				EARLY_SUSPEND_LEVEL_DISABLE_FB;
-	mfb->early_suspend.suspend = early_suspend;
-	mfb->early_suspend.resume = late_resume;
-	register_early_suspend(&mfb->early_suspend);
+		mfb->early_suspend.suspend = early_suspend;
+		mfb->early_suspend.resume = late_resume;
+		register_early_suspend(&mfb->early_suspend);
+	}
 #endif
 
 	goto out;
@@ -719,8 +730,10 @@ void mcde_fb_destroy(struct mcde_display_device *dev)
 
 	dev_vdbg(&dev->dev, "%s\n", __func__);
 
-	mcde_dss_disable_display(dev);
-	mcde_dss_close_channel(dev);
+	if (dev->fictive == false) {
+		mcde_dss_disable_display(dev);
+		mcde_dss_close_channel(dev);
+	}
 
 	mfb = to_mcde_fb(dev->fbi);
 	for (i = 0; i < mfb->num_ovlys; i++) {
diff --git a/include/video/mcde_display.h b/include/video/mcde_display.h
index 059d4a7e609..a5e449f6b5b 100644
--- a/include/video/mcde_display.h
+++ b/include/video/mcde_display.h
@@ -30,6 +30,7 @@ struct mcde_display_device {
 	int               id;
 	struct mcde_port *port;
 	struct fb_info   *fbi;
+	bool              fictive;
 
 	/* MCDE dss driver internal */
 	bool initialized;
-- 
cgit v1.2.3


From 1450bdfea451f7d09dbf044798d1a04cb8b4cf2d Mon Sep 17 00:00:00 2001
From: Anders Bauer <anders.bauer@stericsson.com>
Date: Tue, 21 Jun 2011 16:49:08 +0200
Subject: video: mcde: DSI link wait for csm_running

Before using the DSI lane we need to make sure
all data is sent to the display. This patch adds
a loop checking for the CSM_RUNNING bit in the
DSI link command status field.

ST-Ericsson ID: 344921
ST-Ericsson FOSS-OUT ID: Trivial
ST-Ericsson Linux next: Not tested, ER 282779

Change-Id: I6c9e6369eceb888e88e202f351b87351f8816ac8
Signed-off-by: Anders Bauer <anders.bauer@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/25602
Reviewed-by: QATOOLS
Reviewed-by: Jonas ABERG <jonas.aberg@stericsson.com>
Reviewed-by: QATEST
Reviewed-by: Marcel TUNNISSEN <marcel.tuennissen@stericsson.com>
---
 drivers/video/mcde/mcde_hw.c | 83 +++++++++++++++-----------------------------
 1 file changed, 28 insertions(+), 55 deletions(-)

diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index 93ee5c422d0..585b22f9111 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -390,6 +390,26 @@ static /* TODO: const, compiler bug? */ struct chnl_config chnl_configs[] = {
 	  .fabmux = true, .fabmux_set = true },
 };
 
+#define DSI_READ_TIMEOUT 10
+#define DSI_READ_DELAY 100
+
+/*
+ * Wait for CSM_RUNNING, all data sent for display
+ */
+static inline void wait_while_dsi_running(int lnk)
+{
+	u8 counter = DSI_READ_TIMEOUT;
+	while (dsi_rfld(lnk, DSI_CMD_MODE_STS, CSM_RUNNING) && --counter) {
+		dev_vdbg(&mcde_dev->dev,
+			"%s: DSI link %u read running state retry %u times\n"
+			, __func__, lnk, (DSI_READ_TIMEOUT - counter));
+		udelay(DSI_READ_DELAY);
+	}
+	if (!counter)
+		dev_warn(&mcde_dev->dev,
+			"%s: DSI link %u read timeout!\n", __func__, lnk);
+}
+
 static int enable_clocks_and_power(struct platform_device *pdev)
 {
 	struct mcde_platform_data *pdata = pdev->dev.platform_data;
@@ -565,19 +585,10 @@ static int disable_mcde_hw(bool force_disable)
 		struct mcde_chnl_state *chnl = &channels[i];
 		if (force_disable ||
 			(chnl->enabled && !chnl->continous_running)) {
-			u8 counter = 10;
 			disable_channel(chnl);
 			if (chnl->port.type == MCDE_PORTTYPE_DSI)
-				/*
-				* Wait for CSM_RUNNING,
-				* all data sent for display
-				*/
-				while (dsi_rfld(chnl->port.link,
-					DSI_CMD_MODE_STS, CSM_RUNNING)
-							&& counter--) {
-					cpu_relax();
-					udelay(100);
-				}
+				wait_while_dsi_running(chnl->port.link);
+
 			if (chnl->formatter_updated) {
 				disable_formatter(&chnl->port);
 				chnl->formatter_updated = false;
@@ -2131,19 +2142,7 @@ static int mcde_dsi_direct_cmd_write(struct mcde_chnl_state *chnl,
 		(void)update_channel_static_registers(chnl);
 
 	wait_for_channel(chnl);
-	if (chnl->port.type == MCDE_PORTTYPE_DSI) {
-		u8 counter = 10;
-		/*
-		* Wait for CSM_RUNNING,
-		* all data sent for display
-		*/
-		while (dsi_rfld(chnl->port.link,
-			DSI_CMD_MODE_STS, CSM_RUNNING)
-					&& counter--) {
-			cpu_relax();
-			udelay(100);
-		}
-	}
+	wait_while_dsi_running(chnl->port.link);
 
 	if (dcs) {
 		wrdat[0] = cmd;
@@ -2243,19 +2242,7 @@ int mcde_dsi_dcs_read(struct mcde_chnl_state *chnl, u8 cmd, u8* data, int *len)
 		(void)update_channel_static_registers(chnl);
 
 	wait_for_channel(chnl);
-	if (chnl->port.type == MCDE_PORTTYPE_DSI) {
-		u8 counter = 10;
-		/*
-		* Wait for CSM_RUNNING,
-		* all data sent for display
-		*/
-		while (dsi_rfld(chnl->port.link,
-			DSI_CMD_MODE_STS, CSM_RUNNING)
-					&& counter--) {
-			cpu_relax();
-			udelay(100);
-		}
-	}
+	wait_while_dsi_running(chnl->port.link);
 
 	dsi_wfld(link, DSI_MCTL_MAIN_DATA_CTL, BTA_EN, true);
 	dsi_wfld(link, DSI_MCTL_MAIN_DATA_CTL, READ_EN, true);
@@ -2622,11 +2609,7 @@ static void chnl_update_non_continous(struct mcde_chnl_state *chnl)
 			chnl->port.sync_src == MCDE_SYNCSRC_BTA) {
 			if (hardware_version == MCDE_CHIP_VERSION_3_0_8)
 				enable_channel(chnl);
-			while (dsi_rfld(chnl->port.link, DSI_CMD_MODE_STS,
-				CSM_RUNNING)) {
-				cpu_relax();
-				udelay(100);
-			}
+			wait_while_dsi_running(chnl->port.link);
 			dsi_te_request(chnl);
 		}
 	} else {
@@ -2960,19 +2943,9 @@ void mcde_chnl_disable(struct mcde_chnl_state *chnl)
 	/* This channel is disabled here */
 	chnl->enabled = false;
 	if (mcde_is_enabled && chnl->formatter_updated
-				&& chnl->port.type == MCDE_PORTTYPE_DSI) {
-		u8 counter = 10;
-		/*
-		* Wait for CSM_RUNNING,
-		* all data sent for display
-		*/
-		while (dsi_rfld(chnl->port.link,
-			DSI_CMD_MODE_STS, CSM_RUNNING)
-					&& counter--) {
-			cpu_relax();
-			udelay(100);
-		}
-	}
+				&& chnl->port.type == MCDE_PORTTYPE_DSI)
+		wait_while_dsi_running(chnl->port.link);
+
 	if (chnl->formatter_updated) {
 		disable_formatter(&chnl->port);
 		chnl->formatter_updated = false;
-- 
cgit v1.2.3


From 0523c74b11bad33c2f4f0b1d876528f9ebcb65bd Mon Sep 17 00:00:00 2001
From: Robert Fekete <robert.fekete@stericsson.com>
Date: Fri, 1 Jul 2011 11:28:05 +0200
Subject: video: mcde: Add fake color map functionality

Implements a non functional cmap functionality in order
to make X11/fbdev happy. Lack of functionality will make
no difference on modern panels due to the fact that most
panels use 16 or more bits for color depth anyway.
Corresponds to bug 803814 on Linaro-ubuntu

ST-Ericsson ID: N/A
ST-Ericsson FOSS-OUT ID: Trivial
ST-Ericsson Linux next: Not tested, ER 282779

Change-Id: I9080b6879641ebc2f051204a630ae152f8d73fc1
Signed-off-by: Robert Fekete <robert.fekete@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/26353
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Reviewed-by: Marcel TUNNISSEN <marcel.tuennissen@stericsson.com>
Reviewed-by: Jonas ABERG <jonas.aberg@stericsson.com>
---
 drivers/video/mcde/mcde_fb.c | 25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)

diff --git a/drivers/video/mcde/mcde_fb.c b/drivers/video/mcde/mcde_fb.c
index 3b464cd8024..a69b18e6a32 100644
--- a/drivers/video/mcde/mcde_fb.c
+++ b/drivers/video/mcde/mcde_fb.c
@@ -562,6 +562,23 @@ static int mcde_fb_set_par(struct fb_info *fbi)
 	return apply_var(fbi, fb_to_display(fbi));
 }
 
+static int mcde_fb_setcolreg(unsigned regno, unsigned red, unsigned green,
+			unsigned blue, unsigned transp, struct fb_info *fbi)
+{
+	dev_vdbg(fbi->dev, "%s\n", __func__);
+
+	/*Nothing to see here, move along*/
+	return 0;
+}
+
+static int mcde_fb_setcmap(struct fb_cmap *cmap, struct fb_info *fbi)
+{
+	dev_vdbg(fbi->dev, "%s\n", __func__);
+
+	/*Nothing to see here, move along*/
+	return 0;
+}
+
 static int mcde_fb_blank(int blank, struct fb_info *fbi)
 {
 	return 0;
@@ -609,6 +626,8 @@ static struct fb_ops fb_ops = {
 	.fb_imageblit   = sys_imageblit,
 	.fb_check_var   = mcde_fb_check_var,
 	.fb_set_par     = mcde_fb_set_par,
+	.fb_setcolreg   = mcde_fb_setcolreg,
+	.fb_setcmap     = mcde_fb_setcmap,
 	.fb_blank       = mcde_fb_blank,
 	.fb_pan_display = mcde_fb_pan_display,
 	.fb_rotate      = mcde_fb_rotate,
@@ -685,6 +704,10 @@ struct fb_info *mcde_fb_create(struct mcde_display_device *ddev,
 	if (ret)
 		goto fb_register_failed;
 
+	ret = fb_alloc_cmap(&fbi->cmap, 256, 0);
+	if (ret)
+		dev_warn(&ddev->dev, "%s: Allocate color map memory failed!\n", __func__);
+
 	ddev->fbi = fbi;
 
 #ifdef CONFIG_HAS_EARLYSUSPEND
@@ -741,6 +764,8 @@ void mcde_fb_destroy(struct mcde_display_device *dev)
 			mcde_dss_destroy_overlay(mfb->ovlys[i]);
 	}
 
+	fb_dealloc_cmap(&dev->fbi->cmap);
+
 	unregister_framebuffer(dev->fbi);
 	free_fb_mem(dev->fbi);
 	framebuffer_release(dev->fbi);
-- 
cgit v1.2.3


From 7c280975d541d9216a55f6fa4e91ab12aeb600f0 Mon Sep 17 00:00:00 2001
From: "Mathieu J. Poirier" <mathieu.poirier@linaro.org>
Date: Mon, 25 Jul 2011 09:20:56 -0600
Subject: Moving default pixel format from RGB888 to RGB565.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
---
 arch/arm/mach-ux500/board-mop500-mcde.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/mach-ux500/board-mop500-mcde.c b/arch/arm/mach-ux500/board-mop500-mcde.c
index a0ae5944b0b..79c09f98a50 100644
--- a/arch/arm/mach-ux500/board-mop500-mcde.c
+++ b/arch/arm/mach-ux500/board-mop500-mcde.c
@@ -425,7 +425,7 @@ static struct mcde_display_device av8100_hdmi = {
 	.port = &port2,
 	.chnl_id = MCDE_CHNL_B,
 	.fifo = MCDE_FIFO_B,
-	.default_pixel_format = MCDE_OVLYPIXFMT_RGB888,
+	.default_pixel_format = MCDE_OVLYPIXFMT_RGB565,
 	.native_x_res = 1280,
 	.native_y_res = 720,
 	.dev = {
-- 
cgit v1.2.3


From 9f264bfd2541bef989e8e8e198d6b66b9b29f03f Mon Sep 17 00:00:00 2001
From: Jimmy Rubin <jimmy.rubin@stericsson.com>
Date: Wed, 20 Apr 2011 13:42:44 +0200
Subject: video: mcde: Add console semaphore

Earlysuspend and Lateresume has to use the console semphore.
This semaphore is taken in fbmem.c for every call to mcde_fb.

If this semaphore is not acquired in earlysuspend, a suspend can
occur at the same time as a refresh is ongoing.
This can result in unbalanced disables for VAUX1.

Signed-off-by: Jimmy Rubin <jimmy.rubin@stericsson.com>
---
 drivers/video/mcde/mcde_fb.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/video/mcde/mcde_fb.c b/drivers/video/mcde/mcde_fb.c
index a69b18e6a32..6d341dde8b5 100644
--- a/drivers/video/mcde/mcde_fb.c
+++ b/drivers/video/mcde/mcde_fb.c
@@ -19,6 +19,8 @@
 #include <linux/hwmem.h>
 #include <linux/io.h>
 
+#include <linux/console.h>
+
 #include <video/mcde_fb.h>
 
 #define MCDE_FB_BPP_MAX		16
@@ -98,10 +100,12 @@ static void early_suspend(struct early_suspend *data)
 	struct mcde_fb *mfb =
 		container_of(data, struct mcde_fb, early_suspend);
 
+	console_lock();
 	for (i = 0; i < mfb->num_ovlys; i++) {
 		if (mfb->ovlys[i])
 			mcde_dss_disable_display(mfb->ovlys[i]->ddev);
 	}
+	console_unlock();
 }
 
 static void late_resume(struct early_suspend *data)
@@ -110,12 +114,14 @@ static void late_resume(struct early_suspend *data)
 	struct mcde_fb *mfb =
 		container_of(data, struct mcde_fb, early_suspend);
 
+	console_lock();
 	for (i = 0; i < mfb->num_ovlys; i++) {
 		if (mfb->ovlys[i]) {
 			struct mcde_overlay *ovly = mfb->ovlys[i];
 			(void) mcde_dss_enable_display(ovly->ddev);
 		}
 	}
+	console_unlock();
 }
 #endif
 
-- 
cgit v1.2.3


From b2affc6c1f398e34e2f96766f88325108e767a0e Mon Sep 17 00:00:00 2001
From: Per Persson <per.xb.persson@stericsson.com>
Date: Thu, 28 Apr 2011 12:19:09 +0200
Subject: video: mcde: Allow HDMI to stay alive

Add possibility to avoid Early suspend when HDMI cable is
connected.

ST-Ericsson ID: 336500
ST-Ericsson Linux next: Not tested, ER 282779
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I5ce2b3f16ad405066f5345c0651374ce634aa171
Signed-off-by: Per Persson <per.xb.persson@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/21257
Reviewed-by: QATOOLS
Reviewed-by: QATEST
Reviewed-by: Marcel TUNNISSEN <marcel.tuennissen@stericsson.com>
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Reviewed-by: Jonas ABERG <jonas.aberg@stericsson.com>
---
 drivers/video/mcde/mcde_fb.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/video/mcde/mcde_fb.c b/drivers/video/mcde/mcde_fb.c
index 6d341dde8b5..628b10953f6 100644
--- a/drivers/video/mcde/mcde_fb.c
+++ b/drivers/video/mcde/mcde_fb.c
@@ -102,7 +102,8 @@ static void early_suspend(struct early_suspend *data)
 
 	console_lock();
 	for (i = 0; i < mfb->num_ovlys; i++) {
-		if (mfb->ovlys[i])
+		if (mfb->ovlys[i] && mfb->ovlys[i]->ddev &&
+				(mfb->ovlys[i]->ddev->stay_alive == false))
 			mcde_dss_disable_display(mfb->ovlys[i]->ddev);
 	}
 	console_unlock();
@@ -772,6 +773,9 @@ void mcde_fb_destroy(struct mcde_display_device *dev)
 
 	fb_dealloc_cmap(&dev->fbi->cmap);
 
+#ifdef CONFIG_HAS_EARLYSUSPEND
+	unregister_early_suspend(&mfb->early_suspend);
+#endif
 	unregister_framebuffer(dev->fbi);
 	free_fb_mem(dev->fbi);
 	framebuffer_release(dev->fbi);
-- 
cgit v1.2.3


From 112665f9be8a5840c365302c3f5e993d1e876c57 Mon Sep 17 00:00:00 2001
From: Rabin Vincent <rabin.vincent@stericsson.com>
Date: Thu, 25 Aug 2011 15:01:00 +0530
Subject: ux500: regulators: update

Regulator updates from:

commit 7ff261a375cf1da4b9a701b7106d42f11df50b3d
Author: Avinash A <Avinash.a@stericsson.com>
Date:   Fri Aug 12 16:01:23 2011 +0530

    mach-ux500:ts-cypress add support on u8500

    platform related changes to add support for the
    cypress touchscreen on u8500

    ST-Ericsson ID: CR321190

commit c7f9ac5e687f8df6f2b48f48370d2cd4479237fa
Author: Bengt Jonsson <bengt.g.jonsson@stericsson.com>
Date:   Wed Jul 13 14:19:41 2011 +0200

    regulators: ab8500: Removed initialization of body biasing

    Body biasing is handled by PRCMU and should not be
    overwritten by the kernel.

    ST-Ericsson ID: 350693

commit 2b74dbcb79a288e709b18dbda9cf592209ad1cdf
Author: Mian Yousaf Kaukab <mian.yousaf.kaukab@stericsson.com>
Date:   Fri Jul 1 18:18:18 2011 +0200

    regulator: change vsmps3 from 1.0V to 0.925V

    ST-Ericsson ID: 350469

commit fcfcc8a7e23970134aeb557d23726e3213e5c79d
Author: Bengt Jonsson <bengt.g.jonsson@stericsson.com>
Date:   Tue May 31 15:43:29 2011 +0200

    regulators: ab8500: Added more configurable bits

    ST Ericsson ID: 334602

commit 4faa6311bef9c32ebc39d7318ec8d1ced45dce31
Author: Bengt Jonsson <bengt.g.jonsson@stericsson.com>
Date:   Tue May 31 15:54:25 2011 +0200

    ARM: ux500: regulators: add mask for configuration

    There is already before a register mask in the regulator driver
    to allow some bits of a register to be initialized. The register
    value is defined in the board configuration. This patch puts a
    mask in the board configuration to specify which bits should
    actually be altered. The purpose with this patch is to avoid
    future mistakes when updating the allowed bits in the regulator
    driver.

    ST Ericsson ID: 334602

commit a8d27ada3b9bed3f57691fa6a32c831dd48a8e3b
Author: Mian Yousaf Kaukab <mian.yousaf.kaukab@stericsson.com>
Date:   Thu Jun 30 14:22:57 2011 +0200

    regulator: update suspend force value for ExtSupplyRegu

    For HREFP_2.2 Vext1 needs to be on otherwise AB8500 looses its register
    contents during suspend. Vext2 is not connected to any regulator.
    Vext3 must be turned off. Rework is need on HREFP_2.2 in order to turn off
    VSMPS4_EXT_3V4

    ST-Ericsson ID: 349114

commit a5dcb7001a7a42812f92461401675168943e2806
Author: Mian Yousaf Kaukab <mian.yousaf.kaukab@stericsson.com>
Date:   Tue Jun 28 16:45:26 2011 +0200

    regulators: update VextSupplies fix

    VextSupplies fix is not need on boards with DB8500v2.1. Add check to remove
    forcing of the VextSupply only for DB8500v2.2.

    ST-Ericsson ID: 349724

Change-Id: Ied04ee6546d3ddcda28635d221ec1b9b5306439c
---
 arch/arm/mach-ux500/board-mop500-mcde.c | 2 +-
 arch/arm/mach-ux500/board-mop500-mcde.h | 4 ++++
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-ux500/board-mop500-mcde.c b/arch/arm/mach-ux500/board-mop500-mcde.c
index 79c09f98a50..85e486f4732 100644
--- a/arch/arm/mach-ux500/board-mop500-mcde.c
+++ b/arch/arm/mach-ux500/board-mop500-mcde.c
@@ -419,7 +419,7 @@ static struct mcde_display_hdmi_platform_data av8100_hdmi_pdata = {
 	.rgb_2_yCbCr_transform = &rgb_2_yCbCr_transform,
 };
 
-static struct mcde_display_device av8100_hdmi = {
+struct mcde_display_device av8100_hdmi = {
 	.name = "av8100_hdmi",
 	.id = AV8100_DISPLAY_ID,
 	.port = &port2,
diff --git a/arch/arm/mach-ux500/board-mop500-mcde.h b/arch/arm/mach-ux500/board-mop500-mcde.h
index 66447c95828..f84b70cc568 100644
--- a/arch/arm/mach-ux500/board-mop500-mcde.h
+++ b/arch/arm/mach-ux500/board-mop500-mcde.h
@@ -13,4 +13,8 @@
 
 #include <video/mcde_display.h>
 
+#ifdef CONFIG_DISPLAY_AV8100_TERTIARY
+extern struct mcde_display_device av8100_hdmi;
+#endif
+
 #endif /* __BOARD_MOP500_MCDE_H */
-- 
cgit v1.2.3


From 14178eb2a0ce3c4601ca94f7c771297ed0b7d5cc Mon Sep 17 00:00:00 2001
From: Naveen Kumar Gaddipati <naveen.gaddipati@stericsson.com>
Date: Fri, 26 Aug 2011 21:33:14 +0530
Subject: mcde:Migrate the patches for kernel3.0

Migrate the following commits for mcde driver files
0c80403 video: mcde: Add sony display support for DB5500
42c4245 Revert "video: mcde: Add sony display support for DB5500"
190e10f video: mcde: check for driver at suspend - resume
8a5da1e video: mcde: Configure channels and overlays for DB5500
4b15316 video: mcde: apply color conversion for DPI mode
409f44a video: mcde: Add sony display support for DB5500
585663b video: mcde: don't fail on no VANA
04ad4ac video: av8100: Add HDMI AVI Infoframe
7587405 video: mcde: Add DB5500 V2 support
91406cb video: mcde: remove PDP config
6bf7c79 video: mcde: fix suspend crash if no channel state
6d71d02 video: av8100: Add new firmware version
de0af16 mcde: fix crash on unsupported hardware version
5d46943 video: mcde: remove mdelay in DSI write
bc272e8 video: av8100: Reduce power consumption
2a22b39 video: mcde: enable mcde channel for DSI command
b441a21 video: mcde: enable reading > 1 byte in DCS cmd

ST-Ericsson ID: 352334
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: NA

Change-Id: If64e30ccb3bb789f0c6bc062d95623c4aad08be1
Signed-off-by: Naveen Kumar Gaddipati <naveen.gaddipati@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/29549
---
 drivers/video/mcde/Kconfig                      |   4 +
 drivers/video/mcde/Makefile                     |   1 +
 drivers/video/mcde/display-ab8500.c             |   5 +-
 drivers/video/mcde/display-av8100.c             |  94 +++++-
 drivers/video/mcde/display-sony_acx424akp_dsi.c | 400 ++++++++++++++++++++++++
 drivers/video/mcde/dsilink_regs.h               |   1 +
 drivers/video/mcde/mcde_bus.c                   |   4 +-
 drivers/video/mcde/mcde_fb.c                    |  61 ++--
 drivers/video/mcde/mcde_hw.c                    | 170 ++++++++--
 include/video/mcde.h                            |  10 +-
 include/video/mcde_display-sony_acx424akp_dsi.h |  41 +++
 include/video/mcde_display.h                    |   1 +
 12 files changed, 730 insertions(+), 62 deletions(-)
 create mode 100644 drivers/video/mcde/display-sony_acx424akp_dsi.c
 create mode 100644 include/video/mcde_display-sony_acx424akp_dsi.h

diff --git a/drivers/video/mcde/Kconfig b/drivers/video/mcde/Kconfig
index a1310332cf9..a2bca06b128 100644
--- a/drivers/video/mcde/Kconfig
+++ b/drivers/video/mcde/Kconfig
@@ -15,6 +15,10 @@ config MCDE_DISPLAY_GENERIC_DSI
 	tristate "Generic DSI display driver"
 	depends on FB_MCDE
 
+config MCDE_DISPLAY_SONY_ACX424AKP_DSI
+	tristate "Sony acx424akp DSI display driver"
+	depends on FB_MCDE
+
 config MCDE_DISPLAY_SONY_SY35560_DSI
 	tristate "Sony sy35560 display driver"
 	depends on FB_MCDE
diff --git a/drivers/video/mcde/Makefile b/drivers/video/mcde/Makefile
index 7c9324ded3a..1c6e5cde42b 100644
--- a/drivers/video/mcde/Makefile
+++ b/drivers/video/mcde/Makefile
@@ -3,6 +3,7 @@ mcde-objs			:= mcde_mod.o mcde_hw.o mcde_dss.o mcde_display.o mcde_bus.o mcde_fb
 obj-$(CONFIG_FB_MCDE)		+= mcde.o
 
 obj-$(CONFIG_MCDE_DISPLAY_GENERIC_DSI)		+= display-generic_dsi.o
+obj-$(CONFIG_MCDE_DISPLAY_SONY_ACX424AKP_DSI)   += display-sony_acx424akp_dsi.o
 obj-$(CONFIG_MCDE_DISPLAY_SONY_SY35560_DSI)	+= display-sony_sy35560_dsi.o
 obj-$(CONFIG_MCDE_DISPLAY_VUIB500_DPI)		+= display-vuib500-dpi.o
 obj-$(CONFIG_MCDE_DISPLAY_AB8500_DENC)		+= display-ab8500.o
diff --git a/drivers/video/mcde/display-ab8500.c b/drivers/video/mcde/display-ab8500.c
index 5d7f1bb92a6..789bf28cdf1 100644
--- a/drivers/video/mcde/display-ab8500.c
+++ b/drivers/video/mcde/display-ab8500.c
@@ -75,7 +75,8 @@ static int set_video_mode(struct mcde_display_device *ddev,
 static int set_power_mode(struct mcde_display_device *ddev,
 				enum mcde_display_power_mode power_mode);
 static int on_first_update(struct mcde_display_device *ddev);
-static int display_update(struct mcde_display_device *ddev, bool tripple_buf);
+static int display_update(struct mcde_display_device *ddev,
+							bool tripple_buffer);
 
 static int __devinit ab8500_probe(struct mcde_display_device *ddev)
 {
@@ -461,7 +462,7 @@ static int display_update(struct mcde_display_device *ddev, bool tripple_buffer)
 			goto error;
 	}
 	ret = mcde_chnl_update(ddev->chnl_state, &ddev->update_area,
-			tripple_buffer);
+								tripple_buffer);
 	if (ret < 0)
 		goto error;
 out:
diff --git a/drivers/video/mcde/display-av8100.c b/drivers/video/mcde/display-av8100.c
index 688a4d17688..5602ec37ba5 100644
--- a/drivers/video/mcde/display-av8100.c
+++ b/drivers/video/mcde/display-av8100.c
@@ -24,6 +24,13 @@
 
 #define SWITCH_HELPSTR ", 0=HDMI, 1=SDTV, 2=DVI\n"
 
+/* AVI Infoframe */
+#define AVI_INFOFRAME_DATA_SIZE	13
+#define AVI_INFOFRAME_TYPE	0x82
+#define AVI_INFOFRAME_VERSION	0x02
+#define AVI_INFOFRAME_DB1	0x10	/* Active Information present */
+#define AVI_INFOFRAME_DB2	0x08	/* Active Portion Aspect ratio */
+
 struct cea_vesa_video_mode {
 	u32 cea;
 	u32 vesa_cea_nr;
@@ -672,6 +679,40 @@ static struct mcde_video_mode *video_mode_get(struct mcde_display_device *ddev,
 	return NULL;
 }
 
+static u8 ceanr_get(struct mcde_display_device *ddev)
+{
+	int cnt;
+	int cea;
+	int vesa_cea_nr;
+	struct mcde_video_mode *vmode = &ddev->video_mode;
+	struct mcde_video_mode *vmode_try;
+
+	if (!vmode)
+		return 0;
+
+	dev_dbg(&ddev->dev, "%s\n", __func__);
+
+	for (cnt = 0; cnt < ARRAY_SIZE(cea_vesa_video_mode); cnt++) {
+		vmode_try = cea_vesa_video_mode[cnt].video_mode;
+		cea = cea_vesa_video_mode[cnt].cea;
+		vesa_cea_nr = cea_vesa_video_mode[cnt].vesa_cea_nr;
+
+		if (cea && vmode_try->xres == vmode->xres &&
+				vmode_try->yres == vmode->yres &&
+				vmode_try->pixclock == vmode->pixclock &&
+				vmode_try->hbp == vmode->hbp &&
+				vmode_try->hfp == vmode->hfp &&
+				vmode_try->vbp == vmode->vbp &&
+				vmode_try->vfp == vmode->vfp &&
+				vmode_try->interlaced == vmode->interlaced) {
+			dev_dbg(&ddev->dev, "ceanr:%d\n", vesa_cea_nr);
+			return vesa_cea_nr;
+		}
+	}
+
+	return 0;
+}
+
 #define AV8100_MAX_LEVEL 255
 
 static int hdmi_try_video_mode(
@@ -1167,6 +1208,9 @@ static int hdmi_on_first_update(struct mcde_display_device *dev)
 {
 	int ret;
 	union av8100_configuration av8100_config;
+	u8 *infofr_data;
+	int infofr_crc;
+	int cnt;
 
 	dev->first_update = false;
 
@@ -1235,6 +1279,45 @@ static int hdmi_on_first_update(struct mcde_display_device *dev)
 		return ret;
 	}
 
+	/* AVI Infoframe only if HDMI */
+	if (dev->port->hdmi_sdtv_switch != HDMI_SWITCH)
+		goto hdmi_on_first_update_end;
+
+	/* Create AVI Infoframe */
+	av8100_config.infoframes_format.type = AVI_INFOFRAME_TYPE;
+	av8100_config.infoframes_format.version = AVI_INFOFRAME_VERSION;
+	av8100_config.infoframes_format.length = AVI_INFOFRAME_DATA_SIZE;
+
+	/* AVI Infoframe data */
+	infofr_data = &av8100_config.infoframes_format.data[0];
+	memset(infofr_data, 0, AVI_INFOFRAME_DATA_SIZE);
+	infofr_data[0] = AVI_INFOFRAME_DB1;
+	infofr_data[1] = AVI_INFOFRAME_DB2;
+	infofr_data[3] = ceanr_get(dev);
+
+	/* Calculate AVI Infoframe checksum */
+	infofr_crc = av8100_config.infoframes_format.type +
+			av8100_config.infoframes_format.version +
+			av8100_config.infoframes_format.length;
+	for (cnt = 0; cnt < AVI_INFOFRAME_DATA_SIZE; cnt++)
+		infofr_crc += infofr_data[cnt];
+	infofr_crc &= 0xFF;
+	av8100_config.infoframes_format.crc = 0x100 - infofr_crc;
+
+	/* Send AVI Infoframe */
+	if (av8100_conf_prep(AV8100_COMMAND_INFOFRAMES,
+		&av8100_config) != 0) {
+		dev_err(&dev->dev, "av8100_conf_prep FAIL\n");
+		return -EINVAL;
+	}
+
+	if (av8100_conf_w(AV8100_COMMAND_INFOFRAMES,
+		NULL, NULL, I2C_INTERFACE) != 0) {
+		dev_err(&dev->dev, "av8100_conf_w FAIL\n");
+		return -EINVAL;
+	}
+
+hdmi_on_first_update_end:
 	return ret;
 }
 
@@ -1285,7 +1368,10 @@ static int hdmi_set_power_mode(struct mcde_display_device *ddev,
 	if (ddev->power_mode == MCDE_DISPLAY_PM_STANDBY &&
 				power_mode == MCDE_DISPLAY_PM_OFF) {
 		memset(&(ddev->video_mode), 0, sizeof(struct mcde_video_mode));
-
+		ret = av8100_powerscan();
+		if (ret)
+			dev_err(&ddev->dev, "%s:av8100_powerscan failed\n"
+								, __func__);
 		if (ddev->platform_disable) {
 			ret = ddev->platform_disable(ddev);
 			if (ret)
@@ -1422,6 +1508,9 @@ static int hdmi_resume(struct mcde_display_device *ddev)
 {
 	int ret;
 
+	if (ddev->chnl_state == NULL)
+		return 0;
+
 	/* set_power_mode will handle call platform_enable */
 	ret = ddev->set_power_mode(ddev, MCDE_DISPLAY_PM_STANDBY);
 	if (ret < 0)
@@ -1435,6 +1524,9 @@ static int hdmi_suspend(struct mcde_display_device *ddev, pm_message_t state)
 {
 	int ret;
 
+	if (ddev->chnl_state == NULL)
+		return 0;
+
 	/* set_power_mode will handle call platform_disable */
 	ret = ddev->set_power_mode(ddev, MCDE_DISPLAY_PM_OFF);
 	if (ret < 0)
diff --git a/drivers/video/mcde/display-sony_acx424akp_dsi.c b/drivers/video/mcde/display-sony_acx424akp_dsi.c
new file mode 100644
index 00000000000..602c85f229f
--- /dev/null
+++ b/drivers/video/mcde/display-sony_acx424akp_dsi.c
@@ -0,0 +1,400 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2010
+ *
+ * ST-Ericsson MCDE Sony acx424akp DCS display driver
+ *
+ * Author: Marcus Lorentzon <marcus.xm.lorentzon@stericsson.com>
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+
+#include <linux/kernel.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/gpio.h>
+#include <linux/err.h>
+
+#include <video/mcde_display.h>
+#include <video/mcde_display-sony_acx424akp_dsi.h>
+
+static int display_read_deviceid(struct mcde_display_device *dev, u16 *id)
+{
+	struct mcde_chnl_state *chnl;
+
+	u8  id1, id2, id3;
+	int len = 1;
+	int ret = 0;
+	int readret = 0;
+
+	dev_dbg(&dev->dev, "%s: Read device id of the display\n", __func__);
+
+	/* Acquire MCDE resources */
+	chnl = mcde_chnl_get(dev->chnl_id, dev->fifo, dev->port);
+	if (IS_ERR(chnl)) {
+		ret = PTR_ERR(chnl);
+		dev_warn(&dev->dev, "Failed to acquire MCDE channel\n");
+		goto out;
+	}
+
+	/* plugnplay: use registers DA, DBh and DCh to detect display */
+	readret = mcde_dsi_dcs_read(chnl, 0xDA, (u32 *)&id1, &len);
+	if (!readret)
+		readret = mcde_dsi_dcs_read(chnl, 0xDB, (u32 *)&id2, &len);
+	if (!readret)
+		readret = mcde_dsi_dcs_read(chnl, 0xDC, (u32 *)&id3, &len);
+
+	if (readret) {
+		dev_info(&dev->dev,
+			"mcde_dsi_dcs_read failed to read display ID\n");
+		goto read_fail;
+	}
+
+	*id = (id3 << 8) | id2;
+read_fail:
+	/* close  MCDE channel */
+	mcde_chnl_put(chnl);
+out:
+	return 0;
+}
+
+static int sony_acx424akp_platform_enable(struct mcde_display_device *dev)
+{
+	struct mcde_display_sony_acx424akp_platform_data *pdata =
+		dev->dev.platform_data;
+
+	dev_dbg(&dev->dev, "%s: Reset & power on sony display\n", __func__);
+
+	if (pdata->regulator) {
+		if (regulator_enable(pdata->regulator) < 0) {
+			dev_err(&dev->dev, "%s:Failed to enable regulator\n"
+				, __func__);
+			return -EINVAL;
+		}
+	}
+	if (pdata->reset_gpio)
+		gpio_set_value(pdata->reset_gpio, pdata->reset_high);
+	msleep(pdata->reset_delay);	/* as per sony lcd spec */
+	if (pdata->reset_gpio)
+		gpio_set_value(pdata->reset_gpio, !pdata->reset_high);
+	msleep(pdata->reset_low_delay);	/* as per sony lcd spec */
+	if (pdata->reset_gpio)
+		gpio_set_value(pdata->reset_gpio, pdata->reset_high);
+	msleep(pdata->reset_delay);	/* as per sony lcd spec */
+
+	return 0;
+}
+
+static int sony_acx424akp_platform_disable(struct mcde_display_device *dev)
+{
+	struct mcde_display_sony_acx424akp_platform_data *pdata =
+		dev->dev.platform_data;
+
+	dev_dbg(&dev->dev, "%s:Reset & power off sony display\n", __func__);
+
+	if (pdata->regulator) {
+		if (regulator_disable(pdata->regulator) < 0) {
+			dev_err(&dev->dev, "%s:Failed to disable regulator\n"
+				, __func__);
+			return -EINVAL;
+		}
+	}
+	return 0;
+}
+
+static int sony_acx424akp_set_scan_mode(struct mcde_display_device *ddev,
+		enum mcde_display_power_mode power_mode)
+{
+	int ret = 0;
+	u8 param[MCDE_MAX_DSI_DIRECT_CMD_WRITE];
+
+	dev_dbg(&ddev->dev, "%s:Set Power mode\n", __func__);
+
+	/* 180 rotation for SONY ACX424AKP display */
+	if (ddev->power_mode == MCDE_DISPLAY_PM_STANDBY) {
+		param[0] = 0xAA;
+		ret = mcde_dsi_dcs_write(ddev->chnl_state, 0xf3, param, 1);
+		if (ret)
+			return ret;
+
+		param[0] = 0x00;
+		param[1] = 0x00;
+		ret = mcde_dsi_generic_write(ddev->chnl_state, param, 3);
+		if (ret)
+			return ret;
+
+		param[0] = 0xC9;
+		param[1] = 0x01;
+		ret = mcde_dsi_generic_write(ddev->chnl_state, param, 3);
+		if (ret)
+			return ret;
+
+		param[0] = 0xA2;
+		param[1] = 0x00;
+		ret = mcde_dsi_generic_write(ddev->chnl_state, param, 3);
+		if (ret)
+			return ret;
+
+		param[0] = 0xFF;
+		param[1] = 0xAA;
+		ret = mcde_dsi_generic_write(ddev->chnl_state, param, 3);
+		if (ret)
+			return ret;
+	}
+	return ret;
+}
+
+static int sony_acx424akp_set_power_mode(struct mcde_display_device *ddev,
+	enum mcde_display_power_mode power_mode)
+{
+	int ret = 0;
+	struct mcde_display_sony_acx424akp_platform_data *pdata =
+		ddev->dev.platform_data;
+
+	dev_dbg(&ddev->dev, "%s:Set Power mode\n", __func__);
+
+	/* OFF -> STANDBY */
+	if (ddev->power_mode == MCDE_DISPLAY_PM_OFF &&
+		power_mode != MCDE_DISPLAY_PM_OFF) {
+
+		if (ddev->platform_enable) {
+			ret = ddev->platform_enable(ddev);
+			if (ret)
+				return ret;
+		}
+
+		ddev->power_mode = MCDE_DISPLAY_PM_STANDBY;
+	}
+
+	/* STANDBY -> ON */
+	if (ddev->power_mode == MCDE_DISPLAY_PM_STANDBY &&
+		power_mode == MCDE_DISPLAY_PM_ON) {
+
+		ret = mcde_dsi_dcs_write(ddev->chnl_state,
+		DCS_CMD_EXIT_SLEEP_MODE, NULL, 0);
+		if (ret)
+			return ret;
+
+		msleep(pdata->sleep_out_delay);
+
+		ret = mcde_dsi_dcs_write(ddev->chnl_state,
+			DCS_CMD_SET_DISPLAY_ON, NULL, 0);
+		if (ret)
+			return ret;
+
+		ddev->power_mode = MCDE_DISPLAY_PM_ON;
+		goto set_power_and_exit;
+	}
+	/* ON -> STANDBY */
+	else if (ddev->power_mode == MCDE_DISPLAY_PM_ON &&
+		power_mode <= MCDE_DISPLAY_PM_STANDBY) {
+		ret = mcde_dsi_dcs_write(ddev->chnl_state,
+			DCS_CMD_SET_DISPLAY_OFF, NULL, 0);
+		if (ret)
+			return ret;
+
+		ret = mcde_dsi_dcs_write(ddev->chnl_state,
+			DCS_CMD_ENTER_SLEEP_MODE, NULL, 0);
+		if (ret)
+			return ret;
+
+		ddev->power_mode = MCDE_DISPLAY_PM_STANDBY;
+	}
+
+	/* SLEEP -> OFF */
+	if (ddev->power_mode == MCDE_DISPLAY_PM_STANDBY &&
+		power_mode == MCDE_DISPLAY_PM_OFF) {
+		if (ddev->platform_disable) {
+			ret = ddev->platform_disable(ddev);
+			if (ret)
+				return ret;
+		}
+		ddev->power_mode = MCDE_DISPLAY_PM_OFF;
+	}
+
+set_power_and_exit:
+	mcde_chnl_set_power_mode(ddev->chnl_state, ddev->power_mode);
+	ret = sony_acx424akp_set_scan_mode(ddev, power_mode);
+
+	return ret;
+}
+
+static int __devinit sony_acx424akp_probe(struct mcde_display_device *dev)
+{
+	int ret = 0;
+	u16 id;
+	struct mcde_display_sony_acx424akp_platform_data *pdata =
+		dev->dev.platform_data;
+
+	if (pdata == NULL) {
+		dev_err(&dev->dev, "%s:Platform data missing\n", __func__);
+		return -EINVAL;
+	}
+
+	if (dev->port->type != MCDE_PORTTYPE_DSI) {
+		dev_err(&dev->dev,
+			"%s:Invalid port type %d\n",
+			__func__, dev->port->type);
+		return -EINVAL;
+	}
+
+	if (!dev->platform_enable && !dev->platform_disable) {
+		pdata->sony_acx424akp_platform_enable = true;
+		if (pdata->reset_gpio) {
+			ret = gpio_request(pdata->reset_gpio, NULL);
+			if (ret) {
+				dev_warn(&dev->dev,
+					"%s:Failed to request gpio %d\n",
+					__func__, pdata->reset_gpio);
+				goto gpio_request_failed;
+			}
+			gpio_direction_output(pdata->reset_gpio,
+				!pdata->reset_high);
+		}
+		if (pdata->regulator_id) {
+			pdata->regulator = regulator_get(NULL,
+				pdata->regulator_id);
+			if (IS_ERR(pdata->regulator)) {
+				ret = PTR_ERR(pdata->regulator);
+				dev_warn(&dev->dev,
+					"%s:Failed to get regulator '%s'\n",
+					__func__, pdata->regulator_id);
+				pdata->regulator = NULL;
+				goto regulator_get_failed;
+			}
+			regulator_set_voltage(pdata->regulator,
+					pdata->min_supply_voltage,
+					pdata->max_supply_voltage);
+			/*
+			* When u-boot has display a startup screen.
+			* U-boot has turned on display power however the
+			* regulator framework does not know about that
+			* This is the case here, the display driver has to
+			* enable the regulator for the display.
+			*/
+			if (dev->power_mode == MCDE_DISPLAY_PM_STANDBY) {
+				ret = regulator_enable(pdata->regulator);
+				if (ret < 0) {
+					dev_err(&dev->dev,
+					"%s:Failed to enable regulator\n"
+					, __func__);
+					goto regulator_enable_failed;
+				}
+			}
+		}
+	}
+
+	/* TODO: Remove when DSI send command uses interrupts */
+	dev->prepare_for_update = NULL;
+	dev->platform_enable = sony_acx424akp_platform_enable,
+	dev->platform_disable = sony_acx424akp_platform_disable,
+	dev->set_power_mode = sony_acx424akp_set_power_mode;
+
+	ret = display_read_deviceid(dev, &id);
+
+	switch (id) {
+	case DISPLAY_SONY_ACX424AKP:
+		pdata->disp_panel = DISPLAY_SONY_ACX424AKP;
+		dev_info(&dev->dev, "Sony ACX424AKP display (ID 0x%.4X) \
+								probed\n", id);
+		goto out;
+
+	default:
+		pdata->disp_panel = DISPLAY_NONE;
+		dev_warn(&dev->dev, "Display not recognized\n");
+		break;
+	}
+
+regulator_enable_failed:
+regulator_get_failed:
+	if (pdata->sony_acx424akp_platform_enable && pdata->reset_gpio)
+		gpio_free(pdata->reset_gpio);
+gpio_request_failed:
+out:
+	return ret;
+}
+
+static int __devexit sony_acx424akp_remove(struct mcde_display_device *dev)
+{
+	struct mcde_display_sony_acx424akp_platform_data *pdata =
+		dev->dev.platform_data;
+
+	dev->set_power_mode(dev, MCDE_DISPLAY_PM_OFF);
+
+	if (!pdata->sony_acx424akp_platform_enable)
+		return 0;
+
+	if (pdata->regulator)
+		regulator_put(pdata->regulator);
+	if (pdata->reset_gpio) {
+		gpio_direction_input(pdata->reset_gpio);
+		gpio_free(pdata->reset_gpio);
+	}
+
+	return 0;
+}
+
+#if !defined(CONFIG_HAS_EARLYSUSPEND) && defined(CONFIG_PM)
+static int sony_acx424akp_resume(struct mcde_display_device *ddev)
+{
+	int ret;
+
+	/* set_power_mode will handle call platform_enable */
+	ret = ddev->set_power_mode(ddev, MCDE_DISPLAY_PM_STANDBY);
+	if (ret < 0)
+		dev_warn(&ddev->dev, "%s:Failed to resume display\n"
+			, __func__);
+	ddev->set_synchronized_update(ddev,
+					ddev->get_synchronized_update(ddev));
+	return ret;
+}
+
+static int sony_acx424akp_suspend(struct mcde_display_device *ddev, \
+							pm_message_t state)
+{
+	int ret;
+
+	/* set_power_mode will handle call platform_disable */
+	ret = ddev->set_power_mode(ddev, MCDE_DISPLAY_PM_OFF);
+	if (ret < 0)
+		dev_warn(&ddev->dev, "%s:Failed to suspend display\n"
+			, __func__);
+	return ret;
+}
+#endif
+
+static struct mcde_display_driver sony_acx424akp_driver = {
+	.probe	= sony_acx424akp_probe,
+	.remove = sony_acx424akp_remove,
+#if !defined(CONFIG_HAS_EARLYSUSPEND) && defined(CONFIG_PM)
+	.suspend = sony_acx424akp_suspend,
+	.resume = sony_acx424akp_resume,
+#else
+	.suspend = NULL,
+	.resume = NULL,
+#endif
+	.driver = {
+		.name	= "mcde_disp_sony_acx424akp",
+	},
+};
+
+/* Module init */
+static int __init mcde_display_sony_acx424akp_init(void)
+{
+	pr_info("%s\n", __func__);
+
+	return mcde_display_driver_register(&sony_acx424akp_driver);
+}
+module_init(mcde_display_sony_acx424akp_init);
+
+static void __exit mcde_display_sony_acx424akp_exit(void)
+{
+	pr_info("%s\n", __func__);
+
+	mcde_display_driver_unregister(&sony_acx424akp_driver);
+}
+module_exit(mcde_display_sony_acx424akp_exit);
+
+MODULE_AUTHOR("Marcus Lorentzon <marcus.xm.lorentzon@stericsson.com>");
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("ST-Ericsson MCDE Sony ACX424AKP DCS display driver");
diff --git a/drivers/video/mcde/dsilink_regs.h b/drivers/video/mcde/dsilink_regs.h
index 2322041ffec..29fa75a1752 100644
--- a/drivers/video/mcde/dsilink_regs.h
+++ b/drivers/video/mcde/dsilink_regs.h
@@ -474,6 +474,7 @@
 #define DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_HEAD_DCS_SHORT_WRITE_1 21
 #define DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_HEAD_DCS_LONG_WRITE 57
 #define DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_HEAD_DCS_READ 6
+#define DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_HEAD_SET_MAX_PKT_SIZE 55
 #define DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_HEAD_ENUM(__x) \
 	DSI_VAL2REG(DSI_DIRECT_CMD_MAIN_SETTINGS, CMD_HEAD, \
 	DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_HEAD_##__x)
diff --git a/drivers/video/mcde/mcde_bus.c b/drivers/video/mcde/mcde_bus.c
index 3d7049652a1..a742aea5b3d 100644
--- a/drivers/video/mcde/mcde_bus.c
+++ b/drivers/video/mcde/mcde_bus.c
@@ -30,14 +30,14 @@ struct bus_type mcde_bus_type;
 static int mcde_suspend_device(struct device *dev, void *data)
 {
 	pm_message_t* state = (pm_message_t *) data;
-	if (dev->driver->suspend)
+	if (dev->driver && dev->driver->suspend)
 		return dev->driver->suspend(dev, *state);
 	return 0;
 }
 
 static int mcde_resume_device(struct device *dev, void *data)
 {
-	if (dev->driver->resume)
+	if (dev->driver && dev->driver->resume)
 		return dev->driver->resume(dev);
 	return 0;
 }
diff --git a/drivers/video/mcde/mcde_fb.c b/drivers/video/mcde/mcde_fb.c
index 628b10953f6..332e371d54b 100644
--- a/drivers/video/mcde/mcde_fb.c
+++ b/drivers/video/mcde/mcde_fb.c
@@ -485,6 +485,8 @@ static int apply_var(struct fb_info *fbi, struct mcde_display_device *ddev)
 
 	var = &fbi->var;
 
+	ddev->check_transparency = 60;
+
 	/* Reallocate memory */
 	line_len = (fbi->var.bits_per_pixel * var->xres_virtual) / 8;
 	line_len = ALIGN(line_len, MCDE_BUF_LINE_ALIGMENT);
@@ -564,31 +566,47 @@ static int mcde_fb_check_var(struct fb_var_screeninfo *var, struct fb_info *fbi)
 
 static int mcde_fb_set_par(struct fb_info *fbi)
 {
+	struct mcde_fb *mfb = to_mcde_fb(fbi);
+	struct mcde_display_device *ddev = fb_to_display(fbi);
 	dev_vdbg(fbi->dev, "%s\n", __func__);
 
-	return apply_var(fbi, fb_to_display(fbi));
-}
-
-static int mcde_fb_setcolreg(unsigned regno, unsigned red, unsigned green,
-			unsigned blue, unsigned transp, struct fb_info *fbi)
-{
-	dev_vdbg(fbi->dev, "%s\n", __func__);
+	if (mfb->ovlys[0]->state == NULL &&
+		ddev->fictive == false) {
+		printk(KERN_INFO "%s() - Enable fb %p\n",
+			__func__,
+			mfb->ovlys[0]);
+		mcde_dss_enable_overlay(mfb->ovlys[0]);
+	}
 
-	/*Nothing to see here, move along*/
-	return 0;
+	return apply_var(fbi, ddev);
 }
 
-static int mcde_fb_setcmap(struct fb_cmap *cmap, struct fb_info *fbi)
+static int mcde_fb_blank(int blank, struct fb_info *fbi)
 {
+	int ret = 0;
+	struct mcde_display_device *ddev = fb_to_display(fbi);
+
 	dev_vdbg(fbi->dev, "%s\n", __func__);
 
-	/*Nothing to see here, move along*/
-	return 0;
-}
+	if (ddev->fictive)
+		goto mcde_fb_blank_end;
+
+	switch (blank) {
+	case FB_BLANK_NORMAL:
+	case FB_BLANK_VSYNC_SUSPEND:
+	case FB_BLANK_HSYNC_SUSPEND:
+	case FB_BLANK_POWERDOWN:
+		mcde_dss_disable_display(ddev);
+	break;
+	case FB_BLANK_UNBLANK:
+		ret = mcde_dss_enable_display(ddev);
+	break;
+	default:
+		ret = -EINVAL;
+	}
 
-static int mcde_fb_blank(int blank, struct fb_info *fbi)
-{
-	return 0;
+mcde_fb_blank_end:
+	return ret;
 }
 
 static int mcde_fb_pan_display(struct fb_var_screeninfo *var,
@@ -633,8 +651,6 @@ static struct fb_ops fb_ops = {
 	.fb_imageblit   = sys_imageblit,
 	.fb_check_var   = mcde_fb_check_var,
 	.fb_set_par     = mcde_fb_set_par,
-	.fb_setcolreg   = mcde_fb_setcolreg,
-	.fb_setcmap     = mcde_fb_setcmap,
 	.fb_blank       = mcde_fb_blank,
 	.fb_pan_display = mcde_fb_pan_display,
 	.fb_rotate      = mcde_fb_rotate,
@@ -711,10 +727,6 @@ struct fb_info *mcde_fb_create(struct mcde_display_device *ddev,
 	if (ret)
 		goto fb_register_failed;
 
-	ret = fb_alloc_cmap(&fbi->cmap, 256, 0);
-	if (ret)
-		dev_warn(&ddev->dev, "%s: Allocate color map memory failed!\n", __func__);
-
 	ddev->fbi = fbi;
 
 #ifdef CONFIG_HAS_EARLYSUSPEND
@@ -771,10 +783,9 @@ void mcde_fb_destroy(struct mcde_display_device *dev)
 			mcde_dss_destroy_overlay(mfb->ovlys[i]);
 	}
 
-	fb_dealloc_cmap(&dev->fbi->cmap);
-
 #ifdef CONFIG_HAS_EARLYSUSPEND
-	unregister_early_suspend(&mfb->early_suspend);
+	if (dev->fictive == false)
+		unregister_early_suspend(&mfb->early_suspend);
 #endif
 	unregister_framebuffer(dev->fbi);
 	free_fb_mem(dev->fbi);
diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index 585b22f9111..4653f148b7f 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -32,6 +32,7 @@
 
 static void disable_channel(struct mcde_chnl_state *chnl);
 static void watchdog_auto_sync_timer_function(unsigned long arg);
+static int _mcde_chnl_enable(struct mcde_chnl_state *chnl);
 static int _mcde_chnl_apply(struct mcde_chnl_state *chnl);
 static void disable_flow(struct mcde_chnl_state *chnl);
 static void enable_channel(struct mcde_chnl_state *chnl);
@@ -654,7 +655,8 @@ static void dpi_video_mode_apply(struct mcde_chnl_state *chnl)
 			chnl->tv_regs.tv_mode = MCDE_TVCRA_TVMODE_SDTV_656P_BE;
 		else
 			chnl->tv_regs.tv_mode = MCDE_TVCRA_TVMODE_SDTV_656P;
-		if (hardware_version == MCDE_CHIP_VERSION_3_0_8)
+		if (hardware_version == MCDE_CHIP_VERSION_3_0_8 ||
+			hardware_version == MCDE_CHIP_VERSION_4_0_4)
 			chnl->tv_regs.inv_clk = true;
 		else {
 			chnl->tv_regs.dho  = MCDE_CONFIG_TVOUT_HBORDER;
@@ -720,7 +722,8 @@ static void update_dpi_registers(enum mcde_chnl chnl_id, struct tv_regs *regs)
 
 	/* Horizontal timing registers */
 	if (!regs->sel_mode_tv ||
-			hardware_version == MCDE_CHIP_VERSION_3_0_8) {
+			hardware_version == MCDE_CHIP_VERSION_3_0_8 ||
+			hardware_version == MCDE_CHIP_VERSION_4_0_4) {
 		mcde_wreg(MCDE_TVLBALWA + idx * MCDE_TVLBALWA_GROUPOFFSET,
 					MCDE_TVLBALWA_LBW(regs->hsw) |
 					MCDE_TVLBALWA_ALW(regs->alw));
@@ -898,14 +901,16 @@ static inline void mcde_handle_vcmp(struct mcde_chnl_state *chnl, u32 int_fld)
 				chnl->port.sync_src == MCDE_SYNCSRC_OFF &&
 				chnl->port.type == MCDE_PORTTYPE_DSI &&
 				chnl->continous_running) {
-			if (hardware_version == MCDE_CHIP_VERSION_3_0_8)
+			if (hardware_version == MCDE_CHIP_VERSION_3_0_8 ||
+				hardware_version == MCDE_CHIP_VERSION_4_0_4)
 				enable_channel(chnl);
 
 			mcde_wreg(MCDE_CHNL0SYNCHSW +
 				chnl->id * MCDE_CHNL0SYNCHSW_GROUPOFFSET,
 				MCDE_CHNL0SYNCHSW_SW_TRIG(true));
 
-			if (hardware_version == MCDE_CHIP_VERSION_3_0_8)
+			if (hardware_version == MCDE_CHIP_VERSION_3_0_8 ||
+				hardware_version == MCDE_CHIP_VERSION_4_0_4)
 				disable_flow(chnl);
 			mod_timer(&chnl->auto_sync_timer,
 				jiffies +
@@ -1025,7 +1030,8 @@ static irqreturn_t mcde_irq_handler(int irq, void *dev)
 		irq_status = dsi_rfld(i, DSI_DIRECT_CMD_STS_FLAG,
 			TE_RECEIVED_FLAG);
 		if (irq_status) {
-			if (hardware_version == MCDE_CHIP_VERSION_3_0_8)
+			if (hardware_version == MCDE_CHIP_VERSION_3_0_8 ||
+				hardware_version == MCDE_CHIP_VERSION_4_0_4)
 				disable_flow(chnl_from_dsi);
 			dsi_wreg(i, DSI_DIRECT_CMD_STS_CLR,
 				DSI_DIRECT_CMD_STS_CLR_TE_RECEIVED_CLR(true));
@@ -1037,7 +1043,8 @@ static irqreturn_t mcde_irq_handler(int irq, void *dev)
 
 		irq_status = dsi_rfld(i, DSI_CMD_MODE_STS_FLAG, ERR_NO_TE_FLAG);
 		if (irq_status) {
-			if (hardware_version == MCDE_CHIP_VERSION_3_0_8)
+			if (hardware_version == MCDE_CHIP_VERSION_3_0_8 ||
+				hardware_version == MCDE_CHIP_VERSION_4_0_4)
 				disable_flow(chnl_from_dsi);
 			dsi_wreg(i, DSI_CMD_MODE_STS_CLR,
 				DSI_CMD_MODE_STS_CLR_ERR_NO_TE_CLR(true));
@@ -1130,7 +1137,8 @@ static int update_channel_static_registers(struct mcde_chnl_state *chnl)
 					(port->sync_src == MCDE_SYNCSRC_TE1))
 			mcde_wreg(MCDE_CTRLC1, MCDE_CTRLC1_FIFOWTRMRK(
 					get_output_fifo_size(MCDE_FIFO_C1)));
-	} else if (hardware_version == MCDE_CHIP_VERSION_3_0_8) {
+	} else if (hardware_version == MCDE_CHIP_VERSION_3_0_8 ||
+			hardware_version == MCDE_CHIP_VERSION_4_0_4) {
 		switch (chnl->fifo) {
 		case MCDE_FIFO_A:
 			mcde_wreg(MCDE_CHNL0MUXING_V2 + chnl->id *
@@ -1480,6 +1488,18 @@ static void chnl_ovly_pixel_format_apply(struct mcde_chnl_state *chnl,
 			mcde_chnl_col_convert_apply(chnl, &chnl->rgb_2_ycbcr);
 		else
 			mcde_chnl_col_convert_apply(chnl, &crycb_2_ycbcr);
+	} else if (port->type == MCDE_PORTTYPE_DPI) {
+		/* Note: YUV is not support port pixel format for DPI */
+		if (ovly->pix_fmt != MCDE_OVLYPIXFMT_YCbCr422) {
+			/* standard case: DPI: RGB -> RGB */
+			regs->col_conv = MCDE_OVL0CR_COLCCTRL_DISABLED;
+		} else {
+			/* DPI: YUV -> RGB */
+			regs->col_conv =
+				MCDE_OVL0CR_COLCCTRL_ENABLED_SAT;
+			mcde_chnl_col_convert_apply(chnl,
+						&chnl->ycbcr_2_rgb);
+		}
 	}
 }
 
@@ -1611,7 +1631,8 @@ static void do_softwaretrig(struct mcde_chnl_state *chnl)
 	* However FLOWEN must not be triggered before SOFTWARE TRIG
 	* if rotation is enabled
 	*/
-	if (hardware_version == MCDE_CHIP_VERSION_3_0_8)
+	if (hardware_version == MCDE_CHIP_VERSION_3_0_8 ||
+		hardware_version == MCDE_CHIP_VERSION_4_0_4)
 		enable_channel(chnl);
 	else if ((!is_channel_enabled(chnl) && !chnl->regs.roten)
 				|| chnl->power_mode != MCDE_DISPLAY_PM_ON)
@@ -1621,7 +1642,8 @@ static void do_softwaretrig(struct mcde_chnl_state *chnl)
 		chnl->id * MCDE_CHNL0SYNCHSW_GROUPOFFSET,
 		MCDE_CHNL0SYNCHSW_SW_TRIG(true));
 
-	if (hardware_version == MCDE_CHIP_VERSION_3_0_8)
+	if (hardware_version == MCDE_CHIP_VERSION_3_0_8 ||
+		hardware_version == MCDE_CHIP_VERSION_4_0_4)
 		disable_flow(chnl);
 	else
 		enable_channel(chnl);
@@ -2116,17 +2138,18 @@ static int enable_mcde_hw(void)
 	return 0;
 }
 
+#define DSI_WRITE_CMD_TIMEOUT 1000
+
 /* DSI */
 static int mcde_dsi_direct_cmd_write(struct mcde_chnl_state *chnl,
 			bool dcs, u8 cmd, u8 *data, int len)
 {
-	int i;
+	int i, ret = 0;
 	u32 wrdat[4] = { 0, 0, 0, 0 };
 	u32 settings;
 	u8 link = chnl->port.link;
 	u8 virt_id = chnl->port.phy.dsi.virt_id;
-	u32 ok;
-	u32 error;
+	u32 counter = DSI_WRITE_CMD_TIMEOUT;
 
 	if (len > MCDE_MAX_DSI_DIRECT_CMD_WRITE ||
 			chnl->port.type != MCDE_PORTTYPE_DSI)
@@ -2134,6 +2157,7 @@ static int mcde_dsi_direct_cmd_write(struct mcde_chnl_state *chnl,
 
 	mutex_lock(&mcde_hw_lock);
 
+	_mcde_chnl_enable(chnl);
 	if (enable_mcde_hw()) {
 		mutex_unlock(&mcde_hw_lock);
 		return -EINVAL;
@@ -2193,21 +2217,35 @@ static int mcde_dsi_direct_cmd_write(struct mcde_chnl_state *chnl,
 	if (len > 11)
 		dsi_wreg(link, DSI_DIRECT_CMD_WRDAT3, wrdat[3]);
 	dsi_wreg(link, DSI_DIRECT_CMD_STS_CLR, ~0);
+	dsi_wreg(link, DSI_CMD_MODE_STS_CLR, ~0);
 	dsi_wreg(link, DSI_DIRECT_CMD_SEND, true);
 
-	/* TODO: irq wait and error check */
-	mdelay(10);
+	/* loop will normally run zero or one time until WRITE_COMPLETED */
+	while (!dsi_rfld(link, DSI_DIRECT_CMD_STS, WRITE_COMPLETED)
+			&& --counter)
+		cpu_relax();
 
-	ok = dsi_rreg(link, DSI_DIRECT_CMD_STS);
-	error = dsi_rreg(link, DSI_CMD_MODE_STS);
-	dev_vdbg(&mcde_dev->dev, "DSI Write ok %x error %x\n", ok, error);
+	if (!counter) {
+		dev_err(&mcde_dev->dev,
+			"%s: DSI write cmd 0x%x timeout on DSI link %u!\n",
+			__func__, cmd, link);
+		ret = -ETIME;
+	} else {
+		/* inform if >100 loops before command completion */
+		if (counter < (DSI_WRITE_CMD_TIMEOUT-DSI_WRITE_CMD_TIMEOUT/10))
+			dev_vdbg(&mcde_dev->dev,
+				"%s: %u loops for DSI command %x completion\n",
+				__func__, (DSI_WRITE_CMD_TIMEOUT - counter),
+				cmd);
 
-	dsi_wreg(link, DSI_CMD_MODE_STS_CLR, ~0);
-	dsi_wreg(link, DSI_DIRECT_CMD_STS_CLR, ~0);
+		dev_vdbg(&mcde_dev->dev, "DSI Write ok %x error %x\n",
+			dsi_rreg(link, DSI_DIRECT_CMD_STS_FLAG),
+			dsi_rreg(link, DSI_CMD_MODE_STS_FLAG));
+	}
 
 	mutex_unlock(&mcde_hw_lock);
 
-	return 0;
+	return ret;
 }
 
 int mcde_dsi_generic_write(struct mcde_chnl_state *chnl, u8* para, int len)
@@ -2220,7 +2258,8 @@ int mcde_dsi_dcs_write(struct mcde_chnl_state *chnl, u8 cmd, u8* data, int len)
 	return mcde_dsi_direct_cmd_write(chnl, true, cmd, data, len);
 }
 
-int mcde_dsi_dcs_read(struct mcde_chnl_state *chnl, u8 cmd, u8* data, int *len)
+int mcde_dsi_dcs_read(struct mcde_chnl_state *chnl,
+			u8 cmd, u32 *data, int *len)
 {
 	int ret = 0;
 	u8 link = chnl->port.link;
@@ -2234,6 +2273,7 @@ int mcde_dsi_dcs_read(struct mcde_chnl_state *chnl, u8 cmd, u8* data, int *len)
 
 	mutex_lock(&mcde_hw_lock);
 
+	_mcde_chnl_enable(chnl);
 	if (enable_mcde_hw()) {
 		mutex_unlock(&mcde_hw_lock);
 		return -EINVAL;
@@ -2288,6 +2328,61 @@ int mcde_dsi_dcs_read(struct mcde_chnl_state *chnl, u8 cmd, u8* data, int *len)
 
 	return ret;
 }
+/*
+ * Set Maximum Return Packet size is a command that specifies the
+ * maximum size of the payload transmitted from peripheral back to
+ * the host processor.
+ *
+ * During power-on or reset sequence, the Maximum Return Packet Size
+ * is set to a default value of one. In order to be able to use
+ * mcde_dsi_dcs_read for reading more than 1 byte at a time, this
+ * parameter should be set by the host processor to the desired value
+ * in the initialization routine before commencing normal operation.
+ */
+int mcde_dsi_set_max_pkt_size(struct mcde_chnl_state *chnl, int size)
+{
+	u32 settings;
+	u8 link = chnl->port.link;
+	u8 virt_id = chnl->port.phy.dsi.virt_id;
+
+	if (chnl->port.type != MCDE_PORTTYPE_DSI)
+		return -EINVAL;
+
+	if (size > 4)
+		return -EINVAL;
+
+	mutex_lock(&mcde_hw_lock);
+
+	if (enable_mcde_hw()) {
+		mutex_unlock(&mcde_hw_lock);
+		return -EINVAL;
+	}
+
+	/*
+	 * Set Maximum Return Packet Size is a four-byte command packet
+	 * (including ECC) that specifies the maximum size of the payload.
+	 * The order of bytes is:
+	 * Data ID, two-byte value for maximum return packet size,
+	 * followed by the ECC byte.
+	 */
+
+	settings = DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_NAT_ENUM(WRITE) |
+		DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_LONGNOTSHORT(1) |
+		DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_ID(virt_id) |
+		DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_SIZE(size) |
+		DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_LP_EN(true);
+	settings |= DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_HEAD_ENUM(
+		SET_MAX_PKT_SIZE);
+	dsi_wreg(link, DSI_DIRECT_CMD_MAIN_SETTINGS, settings);
+	dsi_wreg(link, DSI_DIRECT_CMD_STS_CLR, ~0);
+	dsi_wreg(link, DSI_DIRECT_CMD_SEND, true);
+
+	dsi_wreg(link, DSI_CMD_MODE_STS_CLR, ~0);
+	dsi_wreg(link, DSI_DIRECT_CMD_STS_CLR, ~0);
+
+	mutex_unlock(&mcde_hw_lock);
+	return 0;
+}
 
 static void dsi_te_poll_req(struct mcde_chnl_state *chnl)
 {
@@ -2562,7 +2657,8 @@ static void chnl_update_continous(struct mcde_chnl_state *chnl,
 		if (chnl->port.sync_src == MCDE_SYNCSRC_TE0) {
 			mcde_wfld(MCDE_CRC, SYCEN0, true);
 		 } else if (chnl->port.sync_src == MCDE_SYNCSRC_TE1) {
-			if (hardware_version == MCDE_CHIP_VERSION_3_0_8) {
+			if (hardware_version == MCDE_CHIP_VERSION_3_0_8 ||
+				hardware_version == MCDE_CHIP_VERSION_4_0_4) {
 				mcde_wfld(MCDE_VSCRC1, VSSEL, 1);
 				mcde_wfld(MCDE_CRC, SYCEN1, true);
 			} else {
@@ -2582,7 +2678,8 @@ static void chnl_update_continous(struct mcde_chnl_state *chnl,
 		if (chnl->port.type == MCDE_PORTTYPE_DSI &&
 				chnl->port.sync_src == MCDE_SYNCSRC_OFF) {
 			chnl->disable_software_trig = false;
-			if (hardware_version == MCDE_CHIP_VERSION_3_0_8) {
+			if (hardware_version == MCDE_CHIP_VERSION_3_0_8 ||
+				hardware_version == MCDE_CHIP_VERSION_4_0_4) {
 				mcde_wreg(MCDE_CHNL0SYNCHSW +
 				chnl->id * MCDE_CHNL0SYNCHSW_GROUPOFFSET,
 					MCDE_CHNL0SYNCHSW_SW_TRIG(true));
@@ -2607,7 +2704,8 @@ static void chnl_update_non_continous(struct mcde_chnl_state *chnl)
 			chnl->power_mode == MCDE_DISPLAY_PM_ON) {
 		if (chnl->port.type == MCDE_PORTTYPE_DSI &&
 			chnl->port.sync_src == MCDE_SYNCSRC_BTA) {
-			if (hardware_version == MCDE_CHIP_VERSION_3_0_8)
+			if (hardware_version == MCDE_CHIP_VERSION_3_0_8 ||
+				hardware_version == MCDE_CHIP_VERSION_4_0_4)
 				enable_channel(chnl);
 			wait_while_dsi_running(chnl->port.link);
 			dsi_te_request(chnl);
@@ -2633,6 +2731,8 @@ static void chnl_update_overlay(struct mcde_chnl_state *chnl,
 			chnl->fifo, chnl->regs.x, chnl->regs.y,
 			chnl->regs.ppl, chnl->regs.lpf, ovly->stride,
 			chnl->vmode.interlaced, chnl->rotation);
+		if (chnl->id == MCDE_CHNL_A || chnl->id == MCDE_CHNL_B)
+			update_col_registers(chnl->id, &chnl->col_regs);
 	}
 }
 
@@ -2678,6 +2778,13 @@ static int _mcde_chnl_update(struct mcde_chnl_state *chnl,
 	return 0;
 }
 
+static int _mcde_chnl_enable(struct mcde_chnl_state *chnl)
+{
+	dev_vdbg(&mcde_dev->dev, "%s\n", __func__);
+	chnl->enabled = true;
+	return 0;
+}
+
 /* API entry points */
 /* MCDE channels */
 struct mcde_chnl_state *mcde_chnl_get(enum mcde_chnl chnl_id,
@@ -2928,7 +3035,7 @@ void mcde_chnl_enable(struct mcde_chnl_state *chnl)
 	dev_vdbg(&mcde_dev->dev, "%s\n", __func__);
 
 	mutex_lock(&mcde_hw_lock);
-	chnl->enabled = true;
+	_mcde_chnl_enable(chnl);
 	mutex_unlock(&mcde_hw_lock);
 
 	dev_vdbg(&mcde_dev->dev, "%s exit\n", __func__);
@@ -3209,8 +3316,6 @@ static int init_clocks_and_power(struct platform_device *pdev)
 	} else {
 		dev_dbg(&pdev->dev, "%s: No regulator id supplied\n",
 								__func__);
-		ret = -EINVAL;
-		goto regulator_vana_err;
 	}
 #endif
 
@@ -3421,7 +3526,13 @@ static int __devinit mcde_probe(struct platform_device *pdev)
 					development_version >= 4) {
 		hardware_version = MCDE_CHIP_VERSION_1_0_4;
 		mcde_dynamic_power_management = false;
+		num_channels = 2;
+		num_overlays = 3;
 		dev_info(&mcde_dev->dev, "V1_U5500 HW\n");
+	} else if (major_version == 4 && minor_version == 0 &&
+					development_version >= 4) {
+		hardware_version = MCDE_CHIP_VERSION_4_0_4;
+		dev_info(&mcde_dev->dev, "V2_U5500 HW\n");
 	} else {
 		dev_err(&mcde_dev->dev, "Unsupported HW version\n");
 		ret = -ENOTSUPP;
@@ -3458,6 +3569,7 @@ static int __devinit mcde_probe(struct platform_device *pdev)
 		init_timer(&channels[i].auto_sync_timer);
 		channels[i].auto_sync_timer.function =
 					watchdog_auto_sync_timer_function;
+
 		init_timer(&channels[i].dsi_te_timer);
 		channels[i].dsi_te_timer.function =
 					dsi_te_timer_function;
@@ -3467,7 +3579,6 @@ static int __devinit mcde_probe(struct platform_device *pdev)
 	return 0;
 
 failed_hardware_version:
-	free_irq(mcde_irq, &pdev->dev);
 failed_request_irq:
 	disable_mcde_hw(true);
 failed_enable_clocks:
@@ -3492,6 +3603,8 @@ failed_overlays_alloc:
 	kfree(channels);
 	channels = NULL;
 failed_channels_alloc:
+	num_channels = 0;
+	num_overlays = 0;
 	return ret;
 }
 
@@ -3570,7 +3683,6 @@ static struct platform_driver mcde_driver = {
 int __init mcde_init(void)
 {
 	mutex_init(&mcde_hw_lock);
-
 	return platform_driver_register(&mcde_driver);
 }
 
diff --git a/include/video/mcde.h b/include/video/mcde.h
index 213f33e43fe..75992bf7d57 100644
--- a/include/video/mcde.h
+++ b/include/video/mcde.h
@@ -236,7 +236,7 @@ enum mcde_display_rotation {
 #define MCDE_FIFO_AB_SIZE 640
 #define MCDE_FIFO_C0C1_SIZE 160
 
-#define MCDE_PIXFETCH_LARGE_WTRMRKLVL 128
+#define MCDE_PIXFETCH_LARGE_WTRMRKLVL 256
 #define MCDE_PIXFETCH_MEDIUM_WTRMRKLVL 64
 #define MCDE_PIXFETCH_SMALL_WTRMRKLVL 16
 
@@ -251,6 +251,7 @@ enum mcde_display_rotation {
 #define MCDE_AUTO_SYNC_WATCHDOG 5
 
 /* Hardware versions */
+#define MCDE_CHIP_VERSION_4_0_4 4       /* U5500 V2 */
 #define MCDE_CHIP_VERSION_1_0_4 3	/* U5500 V1 */
 #define MCDE_CHIP_VERSION_3_0_8 2	/* U8500 V2 */
 #define MCDE_CHIP_VERSION_3_0_5 1	/* U8500 V1 */
@@ -412,8 +413,11 @@ void mcde_ovly_put(struct mcde_ovly_state *ovly);
 #define MCDE_MAX_DSI_DIRECT_CMD_WRITE 15
 
 int mcde_dsi_generic_write(struct mcde_chnl_state *chnl, u8* para, int len);
-int mcde_dsi_dcs_write(struct mcde_chnl_state *chnl, u8 cmd, u8* data, int len);
-int mcde_dsi_dcs_read(struct mcde_chnl_state *chnl, u8 cmd, u8* data, int *len);
+int mcde_dsi_dcs_write(struct mcde_chnl_state *chnl,
+		u8 cmd, u8 *data, int len);
+int mcde_dsi_dcs_read(struct mcde_chnl_state *chnl,
+		u8 cmd, u32 *data, int *len);
+int mcde_dsi_set_max_pkt_size(struct mcde_chnl_state *chnl, int size);
 
 /* MCDE */
 
diff --git a/include/video/mcde_display-sony_acx424akp_dsi.h b/include/video/mcde_display-sony_acx424akp_dsi.h
new file mode 100644
index 00000000000..de862a3f28b
--- /dev/null
+++ b/include/video/mcde_display-sony_acx424akp_dsi.h
@@ -0,0 +1,41 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2010
+ *
+ * ST-Ericsson MCDE Sony acx424akp DCS display driver
+ *
+ * Author: Marcus Lorentzon <marcus.xm.lorentzon@stericsson.com>
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+#ifndef __MCDE_DISPLAY_SONY_ACX424AKP__H__
+#define __MCDE_DISPLAY_SONY_ACX424AKP__H__
+
+#include <linux/regulator/consumer.h>
+
+#include "mcde_display.h"
+
+enum display_panel_type {
+	DISPLAY_NONE			= 0,
+	DISPLAY_SONY_ACX424AKP          = 0x1b81,
+};
+
+struct  mcde_display_sony_acx424akp_platform_data {
+	/* Platform info */
+	int reset_gpio;
+	bool reset_high;
+	const char *regulator_id;
+	int reset_delay; /* ms */
+	int reset_low_delay; /* ms */
+	int sleep_out_delay; /* ms */
+	enum display_panel_type disp_panel; /* display panel types */
+
+	/* Driver data */
+	bool sony_acx424akp_platform_enable;
+	struct regulator *regulator;
+	int max_supply_voltage;
+	int min_supply_voltage;
+};
+
+#endif /* __MCDE_DISPLAY_SONY_ACX424AKP__H__ */
+
diff --git a/include/video/mcde_display.h b/include/video/mcde_display.h
index a5e449f6b5b..6519660f489 100644
--- a/include/video/mcde_display.h
+++ b/include/video/mcde_display.h
@@ -60,6 +60,7 @@ struct mcde_display_device {
 	struct mcde_video_mode video_mode;
 	int update_flags;
 	bool stay_alive;
+	int check_transparency;
 
 	/* Driver API */
 	void (*get_native_resolution)(struct mcde_display_device *dev,
-- 
cgit v1.2.3


From 44e567d83a7baeb3d0021fd75f8b634ca52590d5 Mon Sep 17 00:00:00 2001
From: Naveen Kumar Gaddipati <naveen.gaddipati@stericsson.com>
Date: Fri, 26 Aug 2011 20:41:41 +0530
Subject: b2r2:Migrate driver to kernel 3.0

Migrate the following b2r2 driver patches to kernel3.0
dbc424d b2r2: Add optimized path for VUY(A)888(8) 24/32-bit formats
2142b2d b2r2: Add VUY(A)888(8) 24/32-bit formats
797c68c [b2r2] Fix QA tools warning in b2r2_node_split.c

ST-Ericsson ID: 352334
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: NA

Change-Id: I5f3160a9568ad17eb05eae0b7b8adba146153ea9
Signed-off-by: Naveen Kumar Gaddipati <naveen.gaddipati@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/29563
---
 drivers/video/b2r2/b2r2_blt_main.c         | 112 ++++++++++++++--------
 drivers/video/b2r2/b2r2_generic.c          | 147 ++++++++++++++++++++++-------
 drivers/video/b2r2/b2r2_hw.h               |  24 +++++
 drivers/video/b2r2/b2r2_input_validation.c |   5 +
 drivers/video/b2r2/b2r2_node_split.c       | 123 +++++++++++++++++++++---
 drivers/video/b2r2/b2r2_utils.c            |  12 +++
 include/video/b2r2_blt.h                   |   6 ++
 7 files changed, 341 insertions(+), 88 deletions(-)

diff --git a/drivers/video/b2r2/b2r2_blt_main.c b/drivers/video/b2r2/b2r2_blt_main.c
index a2b21f4a2c1..097d2854a83 100644
--- a/drivers/video/b2r2/b2r2_blt_main.c
+++ b/drivers/video/b2r2/b2r2_blt_main.c
@@ -339,7 +339,7 @@ static int b2r2_blt_release(struct inode *inode, struct file *filp)
 		job = b2r2_core_job_find_first_with_tag((int) instance);
 		while (job) {
 			b2r2_core_job_cancel(job);
-			/* This release matches addref in b2r2_core_job_find... */
+			/* Matches addref in b2r2_core_job_find... */
 			b2r2_core_job_release(job, __func__);
 			job = b2r2_core_job_find_first_with_tag((int) instance);
 		}
@@ -483,8 +483,8 @@ static long b2r2_blt_ioctl(struct file *file,
 			b2r2_log_info("b2r2_blt=%d Going generic.\n", ret);
 			request_gen = kmalloc(sizeof(*request_gen), GFP_KERNEL);
 			if (!request_gen) {
-				b2r2_log_err(
-					"%s: Failed to alloc mem for request_gen\n", __func__);
+				b2r2_log_err("%s: Failed to alloc mem for "
+					"request_gen\n", __func__);
 				return -ENOMEM;
 			}
 
@@ -513,19 +513,27 @@ static long b2r2_blt_ioctl(struct file *file,
 			 * make a copy that the HW can use.
 			 */
 			if ((request_gen->user_req.flags &
-					B2R2_BLT_FLAG_CLUT_COLOR_CORRECTION) != 0) {
-				request_gen->clut = dma_alloc_coherent(b2r2_blt_device(),
-					CLUT_SIZE, &(request_gen->clut_phys_addr),
+					B2R2_BLT_FLAG_CLUT_COLOR_CORRECTION)
+					!= 0) {
+				request_gen->clut =
+					dma_alloc_coherent(b2r2_blt_device(),
+					CLUT_SIZE,
+					&(request_gen->clut_phys_addr),
 					GFP_DMA | GFP_KERNEL);
 				if (request_gen->clut == NULL) {
-					b2r2_log_err("%s CLUT allocation failed.\n", __func__);
+					b2r2_log_err("%s CLUT allocation "
+						"failed.\n", __func__);
 					kfree(request_gen);
 					return -ENOMEM;
 				}
 
-				if (copy_from_user(request_gen->clut, request_gen->user_req.clut, CLUT_SIZE)) {
-					b2r2_log_err("%s: CLUT copy_from_user failed\n", __func__);
-					dma_free_coherent(b2r2_blt_device(), CLUT_SIZE, request_gen->clut,
+				if (copy_from_user(request_gen->clut,
+						request_gen->user_req.clut,
+						CLUT_SIZE)) {
+					b2r2_log_err("%s: CLUT copy_from_user "
+						"failed\n", __func__);
+					dma_free_coherent(b2r2_blt_device(),
+						CLUT_SIZE, request_gen->clut,
 						request_gen->clut_phys_addr);
 					request_gen->clut = NULL;
 					request_gen->clut_phys_addr = 0;
@@ -537,7 +545,8 @@ static long b2r2_blt_ioctl(struct file *file,
 			request_gen->profile = is_profiler_registered_approx();
 
 			ret = b2r2_generic_blt(instance, request_gen);
-			b2r2_log_info("\nb2r2_generic_blt=%d Generic done.\n", ret);
+			b2r2_log_info("\nb2r2_generic_blt=%d Generic done.\n",
+				ret);
 		}
 #endif /* CONFIG_B2R2_GENERIC_FALLBACK */
 
@@ -1339,9 +1348,8 @@ static void tile_job_callback_gen(struct b2r2_core_job *job)
 
 #ifdef CONFIG_DEBUG_FS
 	/* Notify if a tile job is cancelled */
-	if (job->job_state == B2R2_CORE_JOB_CANCELED) {
+	if (job->job_state == B2R2_CORE_JOB_CANCELED)
 		b2r2_log_info("%s: Tile job cancelled:\n", __func__);
-	}
 #endif
 
 	/* Local addref / release within this func */
@@ -1832,19 +1840,24 @@ static int b2r2_generic_blt(struct b2r2_blt_instance *instance,
 			x = -dst_rect->x;
 
 		for (; x < dst_rect->width &&
-				x + dst_rect->x < dst_img_width; x += tmp_buf_width) {
+				x + dst_rect->x < dst_img_width;
+				x += tmp_buf_width) {
 			/*
 			 * Tile jobs are freed by the supplied release function
 			 * when ref_count on a tile_job reaches zero.
 			 */
-			struct b2r2_core_job *tile_job = kmalloc(sizeof(*tile_job), GFP_KERNEL);
+			struct b2r2_core_job *tile_job =
+				kmalloc(sizeof(*tile_job), GFP_KERNEL);
 			if (tile_job == NULL) {
 				/*
-				 * Skip this tile. Do not abort, just hope for better luck
-				 * with rest of the tiles. Memory might become available.
+				 * Skip this tile. Do not abort,
+				 * just hope for better luck
+				 * with rest of the tiles.
+				 * Memory might become available.
 				 */
 				b2r2_log_info("%s: Failed to alloc job. "
-					"Skipping tile at (x, y)=(%d, %d)\n", __func__, x, y);
+					"Skipping tile at (x, y)=(%d, %d)\n",
+					__func__, x, y);
 				continue;
 			}
 			tile_job->tag = request->job.tag;
@@ -1865,7 +1878,8 @@ static int b2r2_generic_blt(struct b2r2_blt_instance *instance,
 				 * Only a part of the tile can be written.
 				 * Limit imposed by buffer size.
 				 */
-				dst_rect_tile.width = dst_img_width - (x + dst_rect->x);
+				dst_rect_tile.width =
+					dst_img_width - (x + dst_rect->x);
 			} else if (x + tmp_buf_width > dst_rect->width) {
 				/*
 				 * Only a part of the tile can be written.
@@ -1877,10 +1891,12 @@ static int b2r2_generic_blt(struct b2r2_blt_instance *instance,
 				dst_rect_tile.width = tmp_buf_width;
 			}
 			/*
-			 * Where applicable, calculate area in src buffer that is needed
-			 * to generate the specified part of destination rectangle.
+			 * Where applicable, calculate area in src buffer
+			 * that is needed to generate the specified part
+			 * of destination rectangle.
 			 */
-			b2r2_generic_set_areas(request, request->first_node, &dst_rect_tile);
+			b2r2_generic_set_areas(request,
+				request->first_node, &dst_rect_tile);
 			/* Submit the job */
 			b2r2_log_info("%s: Submitting job\n", __func__);
 
@@ -1940,7 +1956,8 @@ static int b2r2_generic_blt(struct b2r2_blt_instance *instance,
 			x + dst_rect->x < dst_img_width; x += tmp_buf_width) {
 		struct b2r2_core_job *tile_job = NULL;
 		if (x + tmp_buf_width < dst_rect->width &&
-				x + dst_rect->x + tmp_buf_width < dst_img_width) {
+				x + dst_rect->x + tmp_buf_width <
+				dst_img_width) {
 			/*
 			 * Tile jobs are freed by the supplied release function
 			 * when ref_count on a tile_job reaches zero.
@@ -1987,26 +2004,29 @@ static int b2r2_generic_blt(struct b2r2_blt_instance *instance,
 		}
 		/*
 		 * y is now the last row. Either because the whole dst_rect
-		 * has been processed, or because the last row that will be written
-		 * to dst_img has been reached. Limits imposed in the same way
-		 * as for width.
+		 * has been processed, or because the last row that will be
+		 * written to dst_img has been reached. Limits imposed in
+		 * the same way as for width.
 		 */
 		dst_rect_tile.y = y;
 		if (y + dst_rect->y + tmp_buf_height > dst_img_height)
-			dst_rect_tile.height = dst_img_height - (y + dst_rect->y);
+			dst_rect_tile.height =
+				dst_img_height - (y + dst_rect->y);
 		else if (y + tmp_buf_height > dst_rect->height)
 			dst_rect_tile.height = dst_rect->height - y;
 		else
 			dst_rect_tile.height = tmp_buf_height;
 
-		b2r2_generic_set_areas(request, request->first_node, &dst_rect_tile);
+		b2r2_generic_set_areas(request,
+			request->first_node, &dst_rect_tile);
 
 		b2r2_log_info("%s: Submitting job\n", __func__);
 		inc_stat(&stat_n_in_blt_add);
 
 		mutex_lock(&instance->lock);
 		if (x + tmp_buf_width < dst_rect->width &&
-				x + dst_rect->x + tmp_buf_width < dst_img_width) {
+				x + dst_rect->x + tmp_buf_width <
+				dst_img_width) {
 			request_id = b2r2_core_job_add(tile_job);
 		} else {
 			/*
@@ -2036,7 +2056,8 @@ static int b2r2_generic_blt(struct b2r2_blt_instance *instance,
 
 		inc_stat(&stat_n_in_blt_wait);
 		if (x + tmp_buf_width < dst_rect->width &&
-				x + dst_rect->x + tmp_buf_width < dst_img_width) {
+				x + dst_rect->x + tmp_buf_width <
+				dst_img_width) {
 			ret = b2r2_core_job_wait(tile_job);
 		} else {
 			/*
@@ -2056,8 +2077,10 @@ static int b2r2_generic_blt(struct b2r2_blt_instance *instance,
 				"%s: Synchronous wait done\n", __func__);
 
 			if (x + tmp_buf_width < dst_rect->width &&
-					x + dst_rect->x + tmp_buf_width < dst_img_width)
-				nsec_active_in_b2r2 += tile_job->nsec_active_in_hw;
+					x + dst_rect->x + tmp_buf_width <
+					dst_img_width)
+				nsec_active_in_b2r2 +=
+					tile_job->nsec_active_in_hw;
 			else
 				nsec_active_in_b2r2 +=
 					request->job.nsec_active_in_hw;
@@ -2069,7 +2092,8 @@ static int b2r2_generic_blt(struct b2r2_blt_instance *instance,
 		 * when the last tile is processed.
 		 */
 		if (x + tmp_buf_width < dst_rect->width &&
-				x + dst_rect->x + tmp_buf_width < dst_img_width) {
+				x + dst_rect->x + tmp_buf_width <
+				dst_img_width) {
 			b2r2_core_job_release(tile_job, __func__);
 		} else {
 			b2r2_core_job_release(&request->job, __func__);
@@ -2100,7 +2124,8 @@ static int b2r2_generic_blt(struct b2r2_blt_instance *instance,
 
 	if (request->profile) {
 		request->nsec_active_in_cpu =
-			(s32)((u32)task_sched_runtime(current) - thread_runtime_at_start);
+			(s32)((u32)task_sched_runtime(current) -
+			thread_runtime_at_start);
 		request->total_time_nsec =
 			(s32)(b2r2_get_curr_nsec() - request->start_time_nsec);
 		request->job.nsec_active_in_hw = nsec_active_in_b2r2;
@@ -2433,7 +2458,8 @@ static int resolve_buf(struct b2r2_blt_img *img,
 			if (file == NULL)
 				return -EINVAL;
 #ifdef CONFIG_FB
-			if (MAJOR(file->f_dentry->d_inode->i_rdev) == FB_MAJOR) {
+			if (MAJOR(file->f_dentry->d_inode->i_rdev) ==
+					FB_MAJOR) {
 				/*
 				 * This is a frame buffer device, find fb_info
 				 * (OK to do it like this, no locking???)
@@ -2503,7 +2529,8 @@ static int resolve_buf(struct b2r2_blt_img *img,
  * @resolved_buf: Gathered info (physical address etc.) about buffer
  * @is_dst: true if the buffer is a destination buffer, false if the buffer is a
  *          source buffer.
- * @rect: rectangle in the image buffer that should be synced. NULL the buffer is a source mask.
+ * @rect: rectangle in the image buffer that should be synced.
+ *        NULL if the buffer is a source mask.
  * @img_width: width of the complete image buffer
  * @fmt: buffer format
 */
@@ -2554,11 +2581,15 @@ static void sync_buf(struct b2r2_blt_img *img,
 			(img->fmt ==
 				B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE)) {
 		sa.start = (unsigned long)resolved->virtual_address;
-		sa.end = (unsigned long)resolved->virtual_address + img->buf.len;
+		sa.end = (unsigned long)resolved->virtual_address +
+			img->buf.len;
 		start_phys = resolved->physical_address;
 		end_phys = resolved->physical_address + img->buf.len;
 	} else {
-		/* buffer is not a src_mask so make use of rect when clean & flush caches*/
+		/*
+		 * buffer is not a src_mask so make use of rect when
+		 * clean & flush caches
+		 */
 		u32 bpp;	/* Bits per pixel */
 		u32 pitch;
 
@@ -2573,11 +2604,13 @@ static void sync_buf(struct b2r2_blt_img *img,
 		case B2R2_BLT_FMT_24_BIT_RGB888:   /* Fall through */
 		case B2R2_BLT_FMT_24_BIT_ARGB8565: /* Fall through */
 		case B2R2_BLT_FMT_24_BIT_YUV888:
+		case B2R2_BLT_FMT_24_BIT_VUY888:
 			bpp =  24;
 			break;
 		case B2R2_BLT_FMT_32_BIT_ARGB8888: /* Fall through */
 		case B2R2_BLT_FMT_32_BIT_ABGR8888: /* Fall through */
 		case B2R2_BLT_FMT_32_BIT_AYUV8888:
+		case B2R2_BLT_FMT_32_BIT_VUYA8888:
 			bpp = 32;
 			break;
 		default:
@@ -2930,7 +2963,8 @@ static int debugfs_b2r2_blt_request_read(struct file *filp, char __user *buf,
 		goto out;
 	}
 
-	dev_size = sprintf_req(&debugfs_latest_request, Buf, sizeof(char) * 4096);
+	dev_size = sprintf_req(&debugfs_latest_request, Buf,
+		sizeof(char) * 4096);
 
 	/* No more to read if offset != 0 */
 	if (*f_pos > dev_size)
diff --git a/drivers/video/b2r2/b2r2_generic.c b/drivers/video/b2r2/b2r2_generic.c
index 738e11bf4ba..5941e39be91 100644
--- a/drivers/video/b2r2/b2r2_generic.c
+++ b/drivers/video/b2r2/b2r2_generic.c
@@ -180,11 +180,13 @@ static inline enum b2r2_native_fmt to_native_fmt(enum b2r2_blt_fmt fmt)
 		return B2R2_NATIVE_ARGB8565;
 	case B2R2_BLT_FMT_24_BIT_RGB888:
 		return B2R2_NATIVE_RGB888;
+	case B2R2_BLT_FMT_24_BIT_VUY888:
 	case B2R2_BLT_FMT_24_BIT_YUV888:
 		return B2R2_NATIVE_YCBCR888;
 	case B2R2_BLT_FMT_32_BIT_ABGR8888: /* Not actually supported by HW */
 	case B2R2_BLT_FMT_32_BIT_ARGB8888:
 		return B2R2_NATIVE_ARGB8888;
+	case B2R2_BLT_FMT_32_BIT_VUYA8888: /* fall through */
 	case B2R2_BLT_FMT_32_BIT_AYUV8888:
 		return B2R2_NATIVE_AYCBCR8888;
 	case B2R2_BLT_FMT_CB_Y_CR_Y:
@@ -220,6 +222,7 @@ static inline enum b2r2_ty get_alpha_range(enum b2r2_blt_fmt fmt)
 	case B2R2_BLT_FMT_24_BIT_ARGB8565:
 	case B2R2_BLT_FMT_32_BIT_ARGB8888:
 	case B2R2_BLT_FMT_32_BIT_AYUV8888:
+	case B2R2_BLT_FMT_32_BIT_VUYA8888:
 	case B2R2_BLT_FMT_8_BIT_A8:
 	case B2R2_BLT_FMT_32_BIT_ABGR8888:
 		return B2R2_TY_ALPHA_RANGE_255; /* 0 - 255 */
@@ -250,15 +253,15 @@ static unsigned int get_pitch(enum b2r2_blt_fmt format, u32 width)
 	case B2R2_BLT_FMT_16_BIT_ARGB4444:
 		return width * 2;
 		break;
-	case B2R2_BLT_FMT_24_BIT_RGB888: /* all 24 bits/pixel RGB formats */
+	case B2R2_BLT_FMT_24_BIT_RGB888: /* all 24 bits/pixel raster formats */
 	case B2R2_BLT_FMT_24_BIT_ARGB8565:
 	case B2R2_BLT_FMT_24_BIT_YUV888:
+	case B2R2_BLT_FMT_24_BIT_VUY888:
 		return width * 3;
 		break;
-	case B2R2_BLT_FMT_32_BIT_ARGB8888: /* all 32 bits/pixel RGB formats */
+	case B2R2_BLT_FMT_32_BIT_ARGB8888: /* all 32 bits/pixel formats */
 	case B2R2_BLT_FMT_32_BIT_ABGR8888:
-		return width * 4;
-		break;
+	case B2R2_BLT_FMT_32_BIT_VUYA8888:
 	case B2R2_BLT_FMT_32_BIT_AYUV8888:
 		return width * 4;
 		break;
@@ -532,6 +535,8 @@ static void setup_fill_input_stage(const struct b2r2_blt_request *req,
 	case B2R2_BLT_FMT_CB_Y_CR_Y:
 	case B2R2_BLT_FMT_24_BIT_YUV888:
 	case B2R2_BLT_FMT_32_BIT_AYUV8888:
+	case B2R2_BLT_FMT_24_BIT_VUY888:
+	case B2R2_BLT_FMT_32_BIT_VUYA8888:
 	case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
 	case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:
 	case B2R2_BLT_FMT_YVU420_PACKED_PLANAR:
@@ -607,6 +612,8 @@ static void setup_fill_input_stage(const struct b2r2_blt_request *req,
 			switch (dst_img->fmt) {
 			case B2R2_BLT_FMT_24_BIT_YUV888:
 			case B2R2_BLT_FMT_32_BIT_AYUV8888:
+			case B2R2_BLT_FMT_24_BIT_VUY888:
+			case B2R2_BLT_FMT_32_BIT_VUYA8888:
 				node->node.GROUP0.B2R2_INS |=
 					B2R2_INS_IVMX_ENABLED;
 				node->node.GROUP0.B2R2_CIC |= B2R2_CIC_IVMX;
@@ -618,6 +625,27 @@ static void setup_fill_input_stage(const struct b2r2_blt_request *req,
 					B2R2_VMX2_BLT_YUV888_TO_RGB_601_VIDEO;
 				node->node.GROUP15.B2R2_VMX3 =
 					B2R2_VMX3_BLT_YUV888_TO_RGB_601_VIDEO;
+				/*
+				 * Re-arrange the color components from
+				 * VUY(A) to (A)YUV
+				 */
+				if (dst_img->fmt ==
+					B2R2_BLT_FMT_24_BIT_VUY888) {
+					u32 Y = src_color & 0xff;
+					u32 U = src_color & 0xff00;
+					u32 V = src_color & 0xff0000;
+					src_color = (Y << 16) | U | (V >> 16);
+				} else if (dst_img->fmt ==
+						B2R2_BLT_FMT_32_BIT_VUYA8888) {
+					u32 A = src_color & 0xff;
+					u32 Y = src_color & 0xff00;
+					u32 U = src_color & 0xff0000;
+					u32 V = src_color & 0xff000000;
+					src_color = (A << 24) |
+							(Y << 8) |
+							(U >> 8) |
+							(V >> 24);
+				}
 				break;
 			case B2R2_BLT_FMT_Y_CB_Y_CR:
 				/*
@@ -703,6 +731,7 @@ static void setup_input_stage(const struct b2r2_blt_request *req,
 	/* horizontal and vertical scan order for out_buf */
 	enum b2r2_ty dst_hso = B2R2_TY_HSO_LEFT_TO_RIGHT;
 	enum b2r2_ty dst_vso = B2R2_TY_VSO_TOP_TO_BOTTOM;
+	u32 endianness = 0;
 	u32 fctl = 0;
 	u32 rsf = 0;
 	u32 rzi = 0;
@@ -838,9 +867,13 @@ static void setup_input_stage(const struct b2r2_blt_request *req,
 		break;
 	case B2R2_BLT_FMT_24_BIT_YUV888:
 	case B2R2_BLT_FMT_32_BIT_AYUV8888:
+	case B2R2_BLT_FMT_24_BIT_VUY888:
+	case B2R2_BLT_FMT_32_BIT_VUYA8888:
 		/*
 		 * Set up IVMX.
-		 * Color components are laid out in memory as V, U, Y, (A)
+		 * For B2R2_BLT_FMT_32_BIT_YUV888 and
+		 * B2R2_BLT_FMT_32_BIT_AYUV8888
+		 * the color components are laid out in memory as V, U, Y, (A)
 		 * with V at the first byte (due to little endian addressing).
 		 * B2R2 expects them to be as U, Y, V, (A)
 		 * with U at the first byte.
@@ -855,6 +888,14 @@ static void setup_input_stage(const struct b2r2_blt_request *req,
 			B2R2_VMX2_BLT_YUV888_TO_RGB_601_VIDEO;
 		node->node.GROUP15.B2R2_VMX3 =
 			B2R2_VMX3_BLT_YUV888_TO_RGB_601_VIDEO;
+
+		/*
+		 * Re-arrange color components from VUY(A) to (A)YUV
+		 * for input VMX to work on them further.
+		 */
+		if (src_img->fmt == B2R2_BLT_FMT_24_BIT_VUY888 ||
+				src_img->fmt == B2R2_BLT_FMT_32_BIT_VUYA8888)
+			endianness = B2R2_TY_ENDIAN_BIG_NOT_LITTLE;
 		break;
 	case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
 	case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:
@@ -1161,7 +1202,8 @@ static void setup_input_stage(const struct b2r2_blt_request *req,
 			to_native_fmt(src_img->fmt) |
 			get_alpha_range(src_img->fmt) |
 			B2R2_TY_HSO_LEFT_TO_RIGHT |
-			B2R2_TY_VSO_TOP_TO_BOTTOM;
+			B2R2_TY_VSO_TOP_TO_BOTTOM |
+			endianness;
 
 		node->node.GROUP0.B2R2_INS |= B2R2_INS_SOURCE_2_FETCH_FROM_MEM;
 		node->node.GROUP0.B2R2_CIC |= B2R2_CIC_SOURCE_2;
@@ -1240,6 +1282,7 @@ static void setup_dst_read_stage(const struct b2r2_blt_request *req,
 	const struct b2r2_blt_img *dst_img = &(req->user_req.dst_img);
 	u32 fctl = 0;
 	u32 rsf = 0;
+	u32 endianness = 0;
 	bool yuv_semi_planar =
 		dst_img->fmt == B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR ||
 		dst_img->fmt == B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR ||
@@ -1278,36 +1321,59 @@ static void setup_dst_read_stage(const struct b2r2_blt_request *req,
 		node->node.GROUP15.B2R2_VMX3 = B2R2_VMX3_RGB_TO_BGR;
 		break;
 	case B2R2_BLT_FMT_Y_CB_Y_CR:
+		/* Set up IVMX */
+		node->node.GROUP0.B2R2_INS |= B2R2_INS_IVMX_ENABLED;
+		node->node.GROUP0.B2R2_CIC |= B2R2_CIC_IVMX;
+		/*
+		 * Setup input VMX to convert YVU to RGB 601 VIDEO
+		 * Chroma components are swapped
+		 * so it is YVU and not YUV.
+		 */
+		node->node.GROUP15.B2R2_VMX0 = B2R2_VMX0_YVU_TO_RGB_601_VIDEO;
+		node->node.GROUP15.B2R2_VMX1 = B2R2_VMX1_YVU_TO_RGB_601_VIDEO;
+		node->node.GROUP15.B2R2_VMX2 = B2R2_VMX2_YVU_TO_RGB_601_VIDEO;
+		node->node.GROUP15.B2R2_VMX3 = B2R2_VMX3_YVU_TO_RGB_601_VIDEO;
+		break;
 	case B2R2_BLT_FMT_CB_Y_CR_Y:
+		/* Set up IVMX */
+		node->node.GROUP0.B2R2_INS |= B2R2_INS_IVMX_ENABLED;
+		node->node.GROUP0.B2R2_CIC |= B2R2_CIC_IVMX;
+		node->node.GROUP15.B2R2_VMX0 = B2R2_VMX0_YUV_TO_RGB_601_VIDEO;
+		node->node.GROUP15.B2R2_VMX1 = B2R2_VMX1_YUV_TO_RGB_601_VIDEO;
+		node->node.GROUP15.B2R2_VMX2 = B2R2_VMX2_YUV_TO_RGB_601_VIDEO;
+		node->node.GROUP15.B2R2_VMX3 = B2R2_VMX3_YUV_TO_RGB_601_VIDEO;
+		break;
 	case B2R2_BLT_FMT_24_BIT_YUV888:
 	case B2R2_BLT_FMT_32_BIT_AYUV8888:
-		/* Set up IVMX */
+	case B2R2_BLT_FMT_24_BIT_VUY888:
+	case B2R2_BLT_FMT_32_BIT_VUYA8888:
+		/*
+		 * Set up IVMX.
+		 * For B2R2_BLT_FMT_32_BIT_YUV888 and
+		 * B2R2_BLT_FMT_32_BIT_AYUV8888
+		 * the color components are laid out in memory as V, U, Y, (A)
+		 * with V at the first byte (due to little endian addressing).
+		 * B2R2 expects them to be as U, Y, V, (A)
+		 * with U at the first byte.
+		 */
 		node->node.GROUP0.B2R2_INS |= B2R2_INS_IVMX_ENABLED;
 		node->node.GROUP0.B2R2_CIC |= B2R2_CIC_IVMX;
-		if (dst_img->fmt == B2R2_BLT_FMT_Y_CB_Y_CR) {
-			/*
-			 * Setup input VMX to convert YVU to RGB 601 VIDEO
-			 * Chroma components are swapped
-			 * so it is YVU and not YUV.
-			 */
-			node->node.GROUP15.B2R2_VMX0 =
-				B2R2_VMX0_YVU_TO_RGB_601_VIDEO;
-			node->node.GROUP15.B2R2_VMX1 =
-				B2R2_VMX1_YVU_TO_RGB_601_VIDEO;
-			node->node.GROUP15.B2R2_VMX2 =
-				B2R2_VMX2_YVU_TO_RGB_601_VIDEO;
-			node->node.GROUP15.B2R2_VMX3 =
-				B2R2_VMX3_YVU_TO_RGB_601_VIDEO;
-		} else {
-			node->node.GROUP15.B2R2_VMX0 =
-				B2R2_VMX0_YUV_TO_RGB_601_VIDEO;
-			node->node.GROUP15.B2R2_VMX1 =
-				B2R2_VMX1_YUV_TO_RGB_601_VIDEO;
-			node->node.GROUP15.B2R2_VMX2 =
-				B2R2_VMX2_YUV_TO_RGB_601_VIDEO;
-			node->node.GROUP15.B2R2_VMX3 =
-				B2R2_VMX3_YUV_TO_RGB_601_VIDEO;
-		}
+		node->node.GROUP15.B2R2_VMX0 =
+			B2R2_VMX0_BLT_YUV888_TO_RGB_601_VIDEO;
+		node->node.GROUP15.B2R2_VMX1 =
+			B2R2_VMX1_BLT_YUV888_TO_RGB_601_VIDEO;
+		node->node.GROUP15.B2R2_VMX2 =
+			B2R2_VMX2_BLT_YUV888_TO_RGB_601_VIDEO;
+		node->node.GROUP15.B2R2_VMX3 =
+			B2R2_VMX3_BLT_YUV888_TO_RGB_601_VIDEO;
+
+		/*
+		 * Re-arrange color components from VUY(A) to (A)YUV
+		 * for input VMX to work on them further.
+		 */
+		if (dst_img->fmt == B2R2_BLT_FMT_24_BIT_VUY888 ||
+				dst_img->fmt == B2R2_BLT_FMT_32_BIT_VUYA8888)
+			endianness = B2R2_TY_ENDIAN_BIG_NOT_LITTLE;
 		break;
 	case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
 	case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:
@@ -1536,7 +1602,8 @@ static void setup_dst_read_stage(const struct b2r2_blt_request *req,
 			to_native_fmt(dst_img->fmt) |
 			get_alpha_range(dst_img->fmt) |
 			B2R2_TY_HSO_LEFT_TO_RIGHT |
-			B2R2_TY_VSO_TOP_TO_BOTTOM;
+			B2R2_TY_VSO_TOP_TO_BOTTOM |
+			endianness;
 
 		node->node.GROUP0.B2R2_INS |=
 			B2R2_INS_SOURCE_2_FETCH_FROM_MEM;
@@ -1689,6 +1756,7 @@ static void setup_writeback_stage(const struct b2r2_blt_request *req,
 
 	u32 dst_dither = 0;
 	u32 dst_pitch = 0;
+	u32 endianness = 0;
 
 	b2r2_log_info("%s ENTRY\n", __func__);
 
@@ -2057,7 +2125,9 @@ static void setup_writeback_stage(const struct b2r2_blt_request *req,
 				B2R2_VMX3_RGB_TO_YVU_601_VIDEO;
 			break;
 		case B2R2_BLT_FMT_24_BIT_YUV888: /* fall through */
-		case B2R2_BLT_FMT_32_BIT_AYUV8888:
+		case B2R2_BLT_FMT_32_BIT_AYUV8888: /* fall through */
+		case B2R2_BLT_FMT_24_BIT_VUY888: /* fall through */
+		case B2R2_BLT_FMT_32_BIT_VUYA8888:
 			node->node.GROUP0.B2R2_INS |= B2R2_INS_OVMX_ENABLED;
 			node->node.GROUP0.B2R2_CIC |= B2R2_CIC_OVMX;
 			node->node.GROUP16.B2R2_VMX0 =
@@ -2068,6 +2138,14 @@ static void setup_writeback_stage(const struct b2r2_blt_request *req,
 				B2R2_VMX2_RGB_TO_BLT_YUV888_601_VIDEO;
 			node->node.GROUP16.B2R2_VMX3 =
 				B2R2_VMX3_RGB_TO_BLT_YUV888_601_VIDEO;
+
+			/*
+			 * Re-arrange color components from (A)YUV to VUY(A)
+			 * when bytes are stored in memory.
+			 */
+			if (dst_fmt == B2R2_BLT_FMT_24_BIT_VUY888 ||
+					dst_fmt == B2R2_BLT_FMT_32_BIT_VUYA8888)
+				endianness = B2R2_TY_ENDIAN_BIG_NOT_LITTLE;
 			break;
 		default:
 			break;
@@ -2080,7 +2158,8 @@ static void setup_writeback_stage(const struct b2r2_blt_request *req,
 			get_alpha_range(dst_img->fmt) |
 			B2R2_TY_HSO_LEFT_TO_RIGHT |
 			B2R2_TY_VSO_TOP_TO_BOTTOM |
-			dst_dither;
+			dst_dither |
+			endianness;
 
 		node->node.GROUP0.B2R2_ACK = B2R2_ACK_MODE_BYPASS_S2_S3;
 		node->node.GROUP0.B2R2_INS |=
diff --git a/drivers/video/b2r2/b2r2_hw.h b/drivers/video/b2r2/b2r2_hw.h
index 0dd5f758eb5..d492168913a 100644
--- a/drivers/video/b2r2/b2r2_hw.h
+++ b/drivers/video/b2r2/b2r2_hw.h
@@ -680,4 +680,28 @@ enum b2r2_plug_page_size {
 #define B2R2_VMX2_BLT_YUV888_TO_RGB_601_VIDEO 0x2006f000
 #define B2R2_VMX3_BLT_YUV888_TO_RGB_601_VIDEO 0x34f21322
 
+/* VMX register values for YUV to BLT_YUV888 conversion */
+#define B2R2_VMX0_YUV_TO_BLT_YUV888 0x00040000
+#define B2R2_VMX1_YUV_TO_BLT_YUV888 0x00000100
+#define B2R2_VMX2_YUV_TO_BLT_YUV888 0x20000000
+#define B2R2_VMX3_YUV_TO_BLT_YUV888 0x00000000
+
+/* VMX register values for BLT_YUV888 to YUV conversion */
+#define B2R2_VMX0_BLT_YUV888_TO_YUV 0x00000100
+#define B2R2_VMX1_BLT_YUV888_TO_YUV 0x20000000
+#define B2R2_VMX2_BLT_YUV888_TO_YUV 0x00040000
+#define B2R2_VMX3_BLT_YUV888_TO_YUV 0x00000000
+
+/* VMX register values for YVU to BLT_YUV888 conversion */
+#define B2R2_VMX0_YVU_TO_BLT_YUV888 0x00040000
+#define B2R2_VMX1_YVU_TO_BLT_YUV888 0x20000000
+#define B2R2_VMX2_YVU_TO_BLT_YUV888 0x00000100
+#define B2R2_VMX3_YVU_TO_BLT_YUV888 0x00000000
+
+/* VMX register values for BLT_YUV888 to YVU conversion */
+#define B2R2_VMX0_BLT_YUV888_TO_YVU 0x00040000
+#define B2R2_VMX1_BLT_YUV888_TO_YVU 0x20000000
+#define B2R2_VMX2_BLT_YUV888_TO_YVU 0x00000100
+#define B2R2_VMX3_BLT_YUV888_TO_YVU 0x00000000
+
 #endif /* B2R2_HW_H__ */
diff --git a/drivers/video/b2r2/b2r2_input_validation.c b/drivers/video/b2r2/b2r2_input_validation.c
index 2604d8f77e0..0de714f1161 100644
--- a/drivers/video/b2r2/b2r2_input_validation.c
+++ b/drivers/video/b2r2/b2r2_input_validation.c
@@ -70,6 +70,8 @@ static bool is_valid_format(enum b2r2_blt_fmt fmt)
 	case B2R2_BLT_FMT_32_BIT_ABGR8888:
 	case B2R2_BLT_FMT_32_BIT_AYUV8888:
 	case B2R2_BLT_FMT_YUV444_PACKED_PLANAR:
+	case B2R2_BLT_FMT_24_BIT_VUY888:
+	case B2R2_BLT_FMT_32_BIT_VUYA8888:
 		return true;
 
 	default:
@@ -105,9 +107,11 @@ static bool is_valid_pitch_for_fmt(u32 pitch, s32 width, enum b2r2_blt_fmt fmt)
 	case B2R2_BLT_FMT_24_BIT_RGB888:
 	case B2R2_BLT_FMT_24_BIT_ARGB8565:
 	case B2R2_BLT_FMT_24_BIT_YUV888:
+	case B2R2_BLT_FMT_24_BIT_VUY888:
 	case B2R2_BLT_FMT_32_BIT_ARGB8888:
 	case B2R2_BLT_FMT_32_BIT_ABGR8888:
 	case B2R2_BLT_FMT_32_BIT_AYUV8888:
+	case B2R2_BLT_FMT_32_BIT_VUYA8888:
 		if (!b2r2_is_aligned(pitch, 4))
 			return false;
 
@@ -127,6 +131,7 @@ static bool is_aligned_width_for_fmt(s32 width, enum b2r2_blt_fmt fmt)
 	case B2R2_BLT_FMT_24_BIT_RGB888:
 	case B2R2_BLT_FMT_24_BIT_ARGB8565:
 	case B2R2_BLT_FMT_24_BIT_YUV888:
+	case B2R2_BLT_FMT_24_BIT_VUY888:
 		if (!b2r2_is_aligned(width, 4))
 			return false;
 
diff --git a/drivers/video/b2r2/b2r2_node_split.c b/drivers/video/b2r2/b2r2_node_split.c
index 90674e0e540..5aa62be8b4b 100644
--- a/drivers/video/b2r2/b2r2_node_split.c
+++ b/drivers/video/b2r2/b2r2_node_split.c
@@ -67,6 +67,33 @@ static const u32 vmx_blt_yuv888_to_rgb[] = {
 	B2R2_VMX3_BLT_YUV888_TO_RGB_601_VIDEO,
 };
 
+static const u32 vmx_yuv_to_blt_yuv888[] = {
+	B2R2_VMX0_YUV_TO_BLT_YUV888,
+	B2R2_VMX1_YUV_TO_BLT_YUV888,
+	B2R2_VMX2_YUV_TO_BLT_YUV888,
+	B2R2_VMX3_YUV_TO_BLT_YUV888,
+};
+
+static const u32 vmx_blt_yuv888_to_yuv[] = {
+	B2R2_VMX0_BLT_YUV888_TO_YUV,
+	B2R2_VMX1_BLT_YUV888_TO_YUV,
+	B2R2_VMX2_BLT_YUV888_TO_YUV,
+	B2R2_VMX3_BLT_YUV888_TO_YUV,
+};
+
+static const u32 vmx_yvu_to_blt_yuv888[] = {
+	B2R2_VMX0_YVU_TO_BLT_YUV888,
+	B2R2_VMX1_YVU_TO_BLT_YUV888,
+	B2R2_VMX2_YVU_TO_BLT_YUV888,
+	B2R2_VMX3_YVU_TO_BLT_YUV888,
+};
+
+static const u32 vmx_blt_yuv888_to_yvu[] = {
+	B2R2_VMX0_BLT_YUV888_TO_YVU,
+	B2R2_VMX1_BLT_YUV888_TO_YVU,
+	B2R2_VMX2_BLT_YUV888_TO_YVU,
+	B2R2_VMX3_BLT_YUV888_TO_YVU,
+};
 static const u32 vmx_yvu_to_rgb[] = {
 	B2R2_VMX0_YVU_TO_RGB_601_VIDEO,
 	B2R2_VMX1_YVU_TO_RGB_601_VIDEO,
@@ -270,6 +297,8 @@ int b2r2_node_split_analyze(const struct b2r2_blt_request *req,
 	switch (req->user_req.src_img.fmt) {
 	case B2R2_BLT_FMT_24_BIT_YUV888:
 	case B2R2_BLT_FMT_32_BIT_AYUV8888:
+	case B2R2_BLT_FMT_24_BIT_VUY888:
+	case B2R2_BLT_FMT_32_BIT_VUYA8888:
 		if (!is_rgb_fmt(req->user_req.dst_img.fmt)) {
 			ret = -ENOSYS;
 			goto unsupported;
@@ -283,6 +312,8 @@ int b2r2_node_split_analyze(const struct b2r2_blt_request *req,
 	switch (req->user_req.dst_img.fmt) {
 	case B2R2_BLT_FMT_24_BIT_YUV888:
 	case B2R2_BLT_FMT_32_BIT_AYUV8888:
+	case B2R2_BLT_FMT_24_BIT_VUY888:
+	case B2R2_BLT_FMT_32_BIT_VUYA8888:
 		if (!is_rgb_fmt(req->user_req.src_img.fmt)) {
 			ret = -ENOSYS;
 			goto unsupported;
@@ -692,7 +723,14 @@ static int analyze_fmt_conv(struct b2r2_node_split_buf *src,
 		if (is_yvu_fmt(dst->fmt))
 			*vmx = &vmx_rgb_to_yvu[0];
 		else if (dst->fmt == B2R2_BLT_FMT_24_BIT_YUV888 ||
-				dst->fmt == B2R2_BLT_FMT_32_BIT_AYUV8888)
+				dst->fmt == B2R2_BLT_FMT_32_BIT_AYUV8888 ||
+				dst->fmt == B2R2_BLT_FMT_24_BIT_VUY888 ||
+				dst->fmt == B2R2_BLT_FMT_32_BIT_VUYA8888)
+			/*
+			 * (A)YUV/VUY(A) formats differ only in component
+			 * order. This is handled by the endianness bit
+			 * in B2R2_STY/TTY registers when src/target are set.
+			 */
 			*vmx = &vmx_rgb_to_blt_yuv888[0];
 		else if (is_yuv_fmt(dst->fmt))
 			*vmx = &vmx_rgb_to_yuv[0];
@@ -704,29 +742,48 @@ static int analyze_fmt_conv(struct b2r2_node_split_buf *src,
 		else if (is_bgr_fmt(dst->fmt))
 			*vmx = &vmx_yvu_to_bgr[0];
 		else if (dst->fmt == B2R2_BLT_FMT_24_BIT_YUV888 ||
-				dst->fmt == B2R2_BLT_FMT_32_BIT_AYUV8888)
-			BUG_ON(1);
+				dst->fmt == B2R2_BLT_FMT_32_BIT_AYUV8888 ||
+				dst->fmt == B2R2_BLT_FMT_24_BIT_VUY888 ||
+				dst->fmt == B2R2_BLT_FMT_32_BIT_VUYA8888)
+			*vmx = &vmx_yvu_to_blt_yuv888[0];
 		else if (is_yuv_fmt(dst->fmt) &&
 				!is_yvu_fmt(dst->fmt))
 			*vmx = &vmx_yvu_to_yuv[0];
 	} else if (src->fmt == B2R2_BLT_FMT_24_BIT_YUV888 ||
-			src->fmt == B2R2_BLT_FMT_32_BIT_AYUV8888) {
-		if (is_rgb_fmt(dst->fmt))
+			src->fmt == B2R2_BLT_FMT_32_BIT_AYUV8888 ||
+			src->fmt == B2R2_BLT_FMT_24_BIT_VUY888 ||
+			src->fmt == B2R2_BLT_FMT_32_BIT_VUYA8888) {
+		/*
+		 * (A)YUV/VUY(A) formats differ only in component
+		 * order. This is handled by the endianness bit
+		 * in B2R2_STY/TTY registers when src/target are set.
+		 */
+		if (is_rgb_fmt(dst->fmt)) {
 			*vmx = &vmx_blt_yuv888_to_rgb[0];
-		else
-			/*
-			 * not supported, b2r2_node_split_analyze()
-			 * should have returned ENOSYS.
-			 */
-			BUG_ON(1);
+		} else if (is_yvu_fmt(dst->fmt)) {
+			*vmx = &vmx_blt_yuv888_to_yvu[0];
+		} else if (is_yuv_fmt(dst->fmt)) {
+			switch (dst->fmt) {
+			case B2R2_BLT_FMT_24_BIT_YUV888:
+			case B2R2_BLT_FMT_32_BIT_AYUV8888:
+			case B2R2_BLT_FMT_24_BIT_VUY888:
+			case B2R2_BLT_FMT_32_BIT_VUYA8888: /* do nothing */
+				break;
+			default:
+				*vmx = &vmx_blt_yuv888_to_yuv[0];
+				break;
+			}
+		}
 	} else if (is_yuv_fmt(src->fmt)) {
 		if (is_rgb_fmt(dst->fmt))
 			*vmx = &vmx_yuv_to_rgb[0];
 		else if (is_bgr_fmt(dst->fmt))
 			*vmx = &vmx_yuv_to_bgr[0];
 		else if (dst->fmt == B2R2_BLT_FMT_24_BIT_YUV888 ||
-				dst->fmt == B2R2_BLT_FMT_32_BIT_AYUV8888)
-			BUG_ON(1);
+				dst->fmt == B2R2_BLT_FMT_32_BIT_AYUV8888 ||
+				dst->fmt == B2R2_BLT_FMT_24_BIT_VUY888 ||
+				dst->fmt == B2R2_BLT_FMT_32_BIT_VUYA8888)
+			*vmx = &vmx_yuv_to_blt_yuv888[0];
 		else if (is_yvu_fmt(dst->fmt))
 			*vmx = &vmx_yvu_to_yuv[0];
 	} else if (is_bgr_fmt(src->fmt)) {
@@ -735,7 +792,9 @@ static int analyze_fmt_conv(struct b2r2_node_split_buf *src,
 		else if (is_yvu_fmt(dst->fmt))
 			*vmx = &vmx_bgr_to_yvu[0];
 		else if (dst->fmt == B2R2_BLT_FMT_24_BIT_YUV888 ||
-				dst->fmt == B2R2_BLT_FMT_32_BIT_AYUV8888)
+				dst->fmt == B2R2_BLT_FMT_32_BIT_AYUV8888 ||
+				dst->fmt == B2R2_BLT_FMT_24_BIT_VUY888 ||
+				dst->fmt == B2R2_BLT_FMT_32_BIT_VUYA8888)
 			BUG_ON(1);
 		else if (is_yuv_fmt(dst->fmt))
 			*vmx = &vmx_bgr_to_yuv[0];
@@ -778,7 +837,8 @@ static int analyze_color_fill(struct b2r2_node_split_job *this,
 	if ((!this->blend) && ((this->flags & B2R2_BLT_FLAG_SOURCE_FILL_RAW) ||
 			(this->dst.fmt == B2R2_BLT_FMT_32_BIT_ARGB8888) ||
 			(this->dst.fmt == B2R2_BLT_FMT_32_BIT_ABGR8888) ||
-			(this->dst.fmt == B2R2_BLT_FMT_32_BIT_AYUV8888))) {
+			(this->dst.fmt == B2R2_BLT_FMT_32_BIT_AYUV8888) ||
+			(this->dst.fmt == B2R2_BLT_FMT_32_BIT_VUYA8888))) {
 		this->type = B2R2_DIRECT_FILL;
 
 		/* The color format will be the same as the dst fmt */
@@ -2707,6 +2767,7 @@ static enum b2r2_ty get_alpha_range(enum b2r2_blt_fmt fmt)
 	case B2R2_BLT_FMT_24_BIT_ARGB8565:
 	case B2R2_BLT_FMT_32_BIT_ARGB8888:
 	case B2R2_BLT_FMT_32_BIT_AYUV8888:
+	case B2R2_BLT_FMT_32_BIT_VUYA8888:
 	case B2R2_BLT_FMT_8_BIT_A8:
 	case B2R2_BLT_FMT_32_BIT_ABGR8888:
 		return B2R2_TY_ALPHA_RANGE_255; /* 0 - 255 */
@@ -2725,6 +2786,8 @@ static u8 get_alpha(enum b2r2_blt_fmt fmt, u32 pixel)
 	case B2R2_BLT_FMT_32_BIT_ABGR8888:
 	case B2R2_BLT_FMT_32_BIT_AYUV8888:
 		return (pixel >> 24) & 0xff;
+	case B2R2_BLT_FMT_32_BIT_VUYA8888:
+		return pixel & 0xff;
 	case B2R2_BLT_FMT_24_BIT_ARGB8565:
 		return (pixel & 0xfff) >> 16;
 	case B2R2_BLT_FMT_16_BIT_ARGB4444:
@@ -2754,6 +2817,10 @@ static u32 set_alpha(enum b2r2_blt_fmt fmt, u8 alpha, u32 color)
 		color &= 0x00ffffff;
 		alpha_mask = alpha << 24;
 		break;
+	case B2R2_BLT_FMT_32_BIT_VUYA8888:
+		color &= 0xffffff00;
+		alpha_mask = alpha;
+		break;
 	case B2R2_BLT_FMT_24_BIT_ARGB8565:
 		color &= 0x00ffff;
 		alpha_mask = alpha << 16;
@@ -2793,6 +2860,7 @@ static bool fmt_has_alpha(enum b2r2_blt_fmt fmt)
 	case B2R2_BLT_FMT_32_BIT_ABGR8888:
 	case B2R2_BLT_FMT_24_BIT_ARGB8565:
 	case B2R2_BLT_FMT_32_BIT_AYUV8888:
+	case B2R2_BLT_FMT_32_BIT_VUYA8888:
 	case B2R2_BLT_FMT_1_BIT_A1:
 	case B2R2_BLT_FMT_8_BIT_A8:
 		return true;
@@ -2837,6 +2905,8 @@ static bool is_yuv_fmt(enum b2r2_blt_fmt fmt)
 	switch (fmt) {
 	case B2R2_BLT_FMT_24_BIT_YUV888:
 	case B2R2_BLT_FMT_32_BIT_AYUV8888:
+	case B2R2_BLT_FMT_24_BIT_VUY888:
+	case B2R2_BLT_FMT_32_BIT_VUYA8888:
 	case B2R2_BLT_FMT_Y_CB_Y_CR:
 	case B2R2_BLT_FMT_CB_Y_CR_Y:
 	case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
@@ -2942,6 +3012,8 @@ static bool is_yuv444_fmt(enum b2r2_blt_fmt fmt)
 	switch (fmt) {
 	case B2R2_BLT_FMT_24_BIT_YUV888:
 	case B2R2_BLT_FMT_32_BIT_AYUV8888:
+	case B2R2_BLT_FMT_24_BIT_VUY888:
+	case B2R2_BLT_FMT_32_BIT_VUYA8888:
 	case B2R2_BLT_FMT_YUV444_PACKED_PLANAR:
 		return true;
 	default:
@@ -2988,11 +3060,13 @@ static int fmt_byte_pitch(enum b2r2_blt_fmt fmt, u32 width)
 	case B2R2_BLT_FMT_24_BIT_RGB888:   /* Fall through */
 	case B2R2_BLT_FMT_24_BIT_ARGB8565: /* Fall through */
 	case B2R2_BLT_FMT_24_BIT_YUV888:
+	case B2R2_BLT_FMT_24_BIT_VUY888:
 		return width * 3;
 
 	case B2R2_BLT_FMT_32_BIT_ARGB8888: /* Fall through */
 	case B2R2_BLT_FMT_32_BIT_ABGR8888: /* Fall through */
 	case B2R2_BLT_FMT_32_BIT_AYUV8888:
+	case B2R2_BLT_FMT_32_BIT_VUYA8888:
 		return width << 2;
 
 	default:
@@ -3026,11 +3100,13 @@ static enum b2r2_native_fmt to_native_fmt(enum b2r2_blt_fmt fmt)
 	case B2R2_BLT_FMT_24_BIT_RGB888:
 		return B2R2_NATIVE_RGB888;
 	case B2R2_BLT_FMT_24_BIT_YUV888:
+	case B2R2_BLT_FMT_24_BIT_VUY888: /* Not actually supported by HW */
 		return B2R2_NATIVE_YCBCR888;
 	case B2R2_BLT_FMT_32_BIT_ABGR8888: /* Not actually supported by HW */
 	case B2R2_BLT_FMT_32_BIT_ARGB8888:
 		return B2R2_NATIVE_ARGB8888;
 	case B2R2_BLT_FMT_32_BIT_AYUV8888:
+	case B2R2_BLT_FMT_32_BIT_VUYA8888: /* Not actually supported by HW */
 		return B2R2_NATIVE_AYCBCR8888;
 	case B2R2_BLT_FMT_CB_Y_CR_Y:
 		return B2R2_NATIVE_YCBCR422R;
@@ -3125,6 +3201,8 @@ static enum b2r2_fmt_type get_fmt_type(enum b2r2_blt_fmt fmt)
 	case B2R2_BLT_FMT_24_BIT_ARGB8565:
 	case B2R2_BLT_FMT_24_BIT_YUV888:
 	case B2R2_BLT_FMT_32_BIT_AYUV8888:
+	case B2R2_BLT_FMT_24_BIT_VUY888:
+	case B2R2_BLT_FMT_32_BIT_VUYA8888:
 	case B2R2_BLT_FMT_1_BIT_A1:
 	case B2R2_BLT_FMT_8_BIT_A8:
 		return B2R2_FMT_TYPE_RASTER;
@@ -3256,6 +3334,11 @@ static void set_target(struct b2r2_node *node, u32 addr,
 	node->node.GROUP1.B2R2_TTY = buf->pitch | to_native_fmt(buf->fmt) |
 			buf->alpha_range | buf->chroma_selection | buf->hso |
 			buf->vso | buf->dither | buf->plane_selection;
+
+	if (buf->fmt == B2R2_BLT_FMT_24_BIT_VUY888 ||
+			buf->fmt == B2R2_BLT_FMT_32_BIT_VUYA8888)
+		node->node.GROUP1.B2R2_TTY |= B2R2_TY_ENDIAN_BIG_NOT_LITTLE;
+
 	node->node.GROUP1.B2R2_TSZ =
 			((buf->win.width & 0xfff) << B2R2_SZ_WIDTH_SHIFT) |
 			((buf->win.height & 0xfff) << B2R2_SZ_HEIGHT_SHIFT);
@@ -3306,6 +3389,11 @@ static void set_src(struct b2r2_src_config *src, u32 addr,
 	src->B2R2_SBA = addr;
 	src->B2R2_STY = buf->pitch | to_native_fmt(buf->fmt) |
 			buf->alpha_range | buf->hso | buf->vso;
+
+	if (buf->fmt == B2R2_BLT_FMT_24_BIT_VUY888 ||
+			buf->fmt == B2R2_BLT_FMT_32_BIT_VUYA8888)
+		src->B2R2_STY |= B2R2_TY_ENDIAN_BIG_NOT_LITTLE;
+
 	src->B2R2_SSZ = ((buf->win.width & 0xfff) << B2R2_SZ_WIDTH_SHIFT) |
 			((buf->win.height & 0xfff) << B2R2_SZ_HEIGHT_SHIFT);
 	src->B2R2_SXY = ((buf->win.x & 0xffff) << B2R2_XY_X_SHIFT) |
@@ -3330,6 +3418,11 @@ static void set_src_1(struct b2r2_node *node, u32 addr,
 	node->node.GROUP3.B2R2_SBA = addr;
 	node->node.GROUP3.B2R2_STY = buf->pitch | to_native_fmt(buf->fmt) |
 			buf->alpha_range | buf->hso | buf->vso;
+
+	if (buf->fmt == B2R2_BLT_FMT_24_BIT_VUY888 ||
+			buf->fmt == B2R2_BLT_FMT_32_BIT_VUYA8888)
+		node->node.GROUP3.B2R2_STY |= B2R2_TY_ENDIAN_BIG_NOT_LITTLE;
+
 	node->node.GROUP3.B2R2_SXY =
 			((buf->win.x & 0xffff) << B2R2_XY_X_SHIFT) |
 			((buf->win.y & 0xffff) << B2R2_XY_Y_SHIFT);
diff --git a/drivers/video/b2r2/b2r2_utils.c b/drivers/video/b2r2/b2r2_utils.c
index 44ea06e51fd..ad0e7a42fa1 100644
--- a/drivers/video/b2r2/b2r2_utils.c
+++ b/drivers/video/b2r2/b2r2_utils.c
@@ -101,12 +101,14 @@ int b2r2_get_fmt_bpp(enum b2r2_blt_fmt fmt)
 	case B2R2_BLT_FMT_24_BIT_RGB888:
 	case B2R2_BLT_FMT_24_BIT_ARGB8565:
 	case B2R2_BLT_FMT_24_BIT_YUV888:
+	case B2R2_BLT_FMT_24_BIT_VUY888:
 	case B2R2_BLT_FMT_YUV444_PACKED_PLANAR:
 		return 24;
 
 	case B2R2_BLT_FMT_32_BIT_ARGB8888:
 	case B2R2_BLT_FMT_32_BIT_ABGR8888:
 	case B2R2_BLT_FMT_32_BIT_AYUV8888:
+	case B2R2_BLT_FMT_32_BIT_VUYA8888:
 		return 32;
 
 	default:
@@ -134,6 +136,8 @@ int b2r2_get_fmt_y_bpp(enum b2r2_blt_fmt fmt)
 	case B2R2_BLT_FMT_YUV444_PACKED_PLANAR:
 	case B2R2_BLT_FMT_24_BIT_YUV888:
 	case B2R2_BLT_FMT_32_BIT_AYUV8888:
+	case B2R2_BLT_FMT_24_BIT_VUY888:
+	case B2R2_BLT_FMT_32_BIT_VUYA8888:
 		return 8;
 
 	default:
@@ -155,9 +159,11 @@ bool b2r2_is_single_plane_fmt(enum b2r2_blt_fmt fmt)
 	case B2R2_BLT_FMT_24_BIT_RGB888:
 	case B2R2_BLT_FMT_24_BIT_ARGB8565:
 	case B2R2_BLT_FMT_24_BIT_YUV888:
+	case B2R2_BLT_FMT_24_BIT_VUY888:
 	case B2R2_BLT_FMT_32_BIT_ARGB8888:
 	case B2R2_BLT_FMT_32_BIT_ABGR8888:
 	case B2R2_BLT_FMT_32_BIT_AYUV8888:
+	case B2R2_BLT_FMT_32_BIT_VUYA8888:
 	case B2R2_BLT_FMT_Y_CB_Y_CR:
 	case B2R2_BLT_FMT_CB_Y_CR_Y:
 		return true;
@@ -178,9 +184,11 @@ bool b2r2_is_independent_pixel_fmt(enum b2r2_blt_fmt fmt)
 	case B2R2_BLT_FMT_24_BIT_RGB888:
 	case B2R2_BLT_FMT_24_BIT_ARGB8565:
 	case B2R2_BLT_FMT_24_BIT_YUV888:
+	case B2R2_BLT_FMT_24_BIT_VUY888:
 	case B2R2_BLT_FMT_32_BIT_ARGB8888:
 	case B2R2_BLT_FMT_32_BIT_ABGR8888:
 	case B2R2_BLT_FMT_32_BIT_AYUV8888:
+	case B2R2_BLT_FMT_32_BIT_VUYA8888:
 	case B2R2_BLT_FMT_YUV444_PACKED_PLANAR:
 		return true;
 
@@ -196,6 +204,8 @@ bool b2r2_is_ycbcri_fmt(enum b2r2_blt_fmt fmt)
 	case B2R2_BLT_FMT_CB_Y_CR_Y:
 	case B2R2_BLT_FMT_24_BIT_YUV888:
 	case B2R2_BLT_FMT_32_BIT_AYUV8888:
+	case B2R2_BLT_FMT_24_BIT_VUY888:
+	case B2R2_BLT_FMT_32_BIT_VUYA8888:
 		return true;
 
 	default:
@@ -270,6 +280,8 @@ bool b2r2_is_ycbcr444_fmt(enum b2r2_blt_fmt fmt)
 	case B2R2_BLT_FMT_YUV444_PACKED_PLANAR:
 	case B2R2_BLT_FMT_32_BIT_AYUV8888:
 	case B2R2_BLT_FMT_24_BIT_YUV888:
+	case B2R2_BLT_FMT_32_BIT_VUYA8888:
+	case B2R2_BLT_FMT_24_BIT_VUY888:
 		return true;
 
 	default:
diff --git a/include/video/b2r2_blt.h b/include/video/b2r2_blt.h
index 1cf5f661598..a992155f0da 100644
--- a/include/video/b2r2_blt.h
+++ b/include/video/b2r2_blt.h
@@ -127,6 +127,10 @@ struct b2r2_blt_rect {
  * The buffer shall contain a plane of Y, V, and U data in this order.
  * (Same as B2R2_BLT_FMT_YUV422_PACKED_PLANAR except that chroma
  * order is swapped.)
+ * @B2R2_BLT_FMT_24_BIT_VUY888: 24 bits per pixel VUY format with colors
+ * stored as V 23:16, U 15:8, and Y 7:0.
+ * @B2R2_BLT_FMT_32_BIT_VUYA8888: 32 bits per pixel VUYA format with colors
+ * stored as V 31:24, U 23:16, Y 15:8, and Alpha 7:0.
  */
 enum b2r2_blt_fmt {
     B2R2_BLT_FMT_UNUSED = 0,
@@ -155,6 +159,8 @@ enum b2r2_blt_fmt {
     B2R2_BLT_FMT_YVU422_PACKED_SEMI_PLANAR = 0x7F00000A,
     B2R2_BLT_FMT_YVU420_PACKED_PLANAR = 0x7F00000B,
     B2R2_BLT_FMT_YVU422_PACKED_PLANAR = 0x7F00000C,
+    B2R2_BLT_FMT_24_BIT_VUY888 = 0x7F00000D,
+    B2R2_BLT_FMT_32_BIT_VUYA8888 = 0x7F00000E,
 };
 
 /**
-- 
cgit v1.2.3


From e594659d746f9c403c5f3db4c51b2bbf82deb371 Mon Sep 17 00:00:00 2001
From: Naveen Kumar Gaddipati <naveen.gaddipati@stericsson.com>
Date: Fri, 26 Aug 2011 21:31:10 +0530
Subject: av8100:Migration to kernel 3.0 patch

Add the following patches changes in av8100 driver
files.
1828f43 video: hdmi: Improve HDMI CEC
04ad4ac video: av8100: Add HDMI AVI Infoframe
577214f video: hdmi: Add return data for hdcp request
6d71d02 video: av8100: Add new firmware version
9c42120 video: av8100: Avoid HW access in power off mode
bc272e8 video: av8100: Reduce power consumption

ST-Ericsson ID: 352334
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: NA

Change-Id: I49914c2b8e733bf2802b7916bc1958364fe41118
Signed-off-by: Naveen Kumar Gaddipati <naveen.gaddipati@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/29569
---
 drivers/video/av8100/av8100.c    |  514 +++++++++++------
 drivers/video/av8100/av8100_fw.h | 1165 --------------------------------------
 drivers/video/av8100/hdmi.c      |  204 +++++--
 drivers/video/av8100/hdmi_loc.h  |   10 +-
 include/video/av8100.h           |    2 +
 include/video/hdmi.h             |   31 +-
 6 files changed, 546 insertions(+), 1380 deletions(-)
 delete mode 100644 drivers/video/av8100/av8100_fw.h

diff --git a/drivers/video/av8100/av8100.c b/drivers/video/av8100/av8100.c
index a6160e088eb..924bf502c77 100644
--- a/drivers/video/av8100/av8100.c
+++ b/drivers/video/av8100/av8100.c
@@ -32,7 +32,9 @@
 #include "av8100_regs.h"
 #include <video/av8100.h>
 #include <video/hdmi.h>
-#include "av8100_fw.h"
+#include <linux/firmware.h>
+
+#define AV8100_FW_FILENAME "av8100.fw"
 
 /* Interrupts */
 #define AV8100_INT_EVENT 0x1
@@ -82,7 +84,10 @@
 #define HDMI_FUSE_AES_KEY_RET_SIZE 2
 #define HDMI_LOADAES_END_BLK_NR 145
 #define HDMI_CRC32_SIZE 4
-#define HDMI_REVOC_LIST_SIZE 30
+#define HDMI_HDCP_MGMT_BKSV_SIZE 5
+#define HDMI_HDCP_MGMT_SHA_SIZE 20
+#define HDMI_HDCP_MGMT_MAX_DEVICES_SIZE 20
+#define HDMI_HDCP_MGMT_DEVICE_MASK 0x7F
 #define HDMI_EDIDREAD_SIZE 0x7F
 
 #define HPDS_INVALID 0xF
@@ -190,6 +195,8 @@ struct av8100_globals_t {
 	bool opp_requested;
 	struct regulator *regulator_pwr;
 	bool regulator_requested;
+	bool pre_suspend_power;
+	bool ints_enabled;
 };
 
 /**
@@ -247,6 +254,7 @@ static int av8100_5V_w(u8 denc_off, u8 hdmi_off, u8 on);
 static void clr_plug_status(enum av8100_plugin_status status);
 static void set_plug_status(enum av8100_plugin_status status);
 static void cec_rx(void);
+static void cec_tx(void);
 static void cec_txerr(void);
 static void hdcp_changed(void);
 static const struct color_conversion_cmd *get_color_transform_cmd(
@@ -266,7 +274,6 @@ static wait_queue_head_t av8100_event;
 static int av8100_flag = 0x0;
 static struct av8100_globals_t *av8100_globals;
 static u8 chip_version;
-static char av8100_receivetab[AV8100_FW_SIZE];
 struct device *av8100dev;
 
 static const struct file_operations av8100_fops = {
@@ -479,13 +486,21 @@ static const struct i2c_device_id av8100_id[] = {
 #ifdef CONFIG_PM
 static int av8100_suspend(struct i2c_client *i2c_client, pm_message_t state)
 {
-	int ret;
+	int ret = 0;
 
 	dev_dbg(av8100dev, "%s\n", __func__);
 
-	ret = av8100_powerdown();
-	if (ret)
-		dev_err(av8100dev, "av8100_powerdown failed\n");
+	if (!av8100_globals)
+		return ret;
+
+	av8100_globals->pre_suspend_power =
+		(av8100_status_get().av8100_state > AV8100_OPMODE_SHUTDOWN);
+
+	if (av8100_globals->pre_suspend_power) {
+		ret = av8100_powerdown();
+		if (ret)
+			dev_err(av8100dev, "av8100_powerdown failed\n");
+	}
 
 	return ret;
 }
@@ -497,6 +512,7 @@ static int av8100_resume(struct i2c_client *i2c_client)
 
 	dev_dbg(av8100dev, "%s\n", __func__);
 
+	if (av8100_globals->pre_suspend_power) {
 	ret = av8100_powerup();
 	if (ret) {
 		dev_err(av8100dev, "av8100_powerup failed\n");
@@ -516,6 +532,7 @@ static int av8100_resume(struct i2c_client *i2c_client)
 
 	av8100_globals->hpdm = AV8100_STANDBY_INTERRUPT_MASK_HPDM_HIGH;
 	av8100_enable_interrupt();
+	}
 
 av8100_resume_end:
 	return 0;
@@ -631,7 +648,19 @@ av8100_int_event_handle_1:
 
 	/* CEC received */
 	if (ceci && cecrx) {
+		u8 val;
+
 		dev_dbg(av8100dev, "cecrx\n");
+
+		/* Clear cecrx in status reg*/
+		if (av8100_reg_r(AV8100_GENERAL_STATUS, &val) == 0) {
+			if (av8100_reg_w(AV8100_GENERAL_STATUS,
+				val & ~AV8100_GENERAL_STATUS_CECREC_MASK))
+				dev_info(av8100dev, "gen_stat write error\n");
+		} else {
+			dev_info(av8100dev, "gen_stat read error\n");
+		}
+
 		/* Report CEC event */
 		cec_rx();
 	}
@@ -641,6 +670,10 @@ av8100_int_event_handle_1:
 		dev_dbg(av8100dev, "cectxerr\n");
 		/* Report CEC tx error event */
 		cec_txerr();
+	} else if (ceci && cectx) {
+		dev_dbg(av8100dev, "cectx\n");
+		/* Report CEC tx event */
+		cec_tx();
 	}
 
 	/* HDCP event */
@@ -1125,6 +1158,12 @@ static void cec_rx(void)
 		av8100_globals->hdmi_ev_cb(AV8100_HDMI_EVENT_CEC);
 }
 
+static void cec_tx(void)
+{
+	if (av8100_globals && av8100_globals->hdmi_ev_cb)
+		av8100_globals->hdmi_ev_cb(AV8100_HDMI_EVENT_CECTX);
+}
+
 static void cec_txerr(void)
 {
 	if (av8100_globals && av8100_globals->hdmi_ev_cb)
@@ -1456,9 +1495,10 @@ static int configuration_cec_message_write_get(char *buffer,
 
 	buffer[0] = av8100_config->hdmi_cec_message_write_cmd.buffer_length;
 	memcpy(&buffer[1], av8100_config->hdmi_cec_message_write_cmd.buffer,
-		HDMI_CEC_MESSAGE_WRITE_BUFFER_SIZE);
+		av8100_config->hdmi_cec_message_write_cmd.buffer_length);
+
+	*length = av8100_config->hdmi_cec_message_write_cmd.buffer_length + 1;
 
-	*length = AV8100_COMMAND_CEC_MESSAGE_WRITE_SIZE - 1;
 	return 0;
 }
 
@@ -1542,7 +1582,7 @@ static int configuration_infoframe_get(char *buffer,
 	memcpy(&buffer[4], av8100_config->hdmi_infoframes_cmd.data,
 	HDMI_INFOFRAME_DATA_SIZE);
 
-	*length = AV8100_COMMAND_INFOFRAMES_SIZE - 1;
+	*length = av8100_config->hdmi_infoframes_cmd.length + 4;
 	return 0;
 }
 
@@ -1658,8 +1698,6 @@ static int get_command_return_data(struct i2c_client *i2c,
 		if (retval)
 			goto get_command_return_data_fail;
 
-		/* TODO: buffer_length is always zero */
-		/* *buffer_length = val;*/
 		dev_dbg(av8100dev, "cec buflen:%d\n", val);
 		*buffer_length = val;
 
@@ -1689,6 +1727,11 @@ static int get_command_return_data(struct i2c_client *i2c,
 		break;
 
 	case AV8100_COMMAND_HDCP_MANAGEMENT:
+		{
+		u8 nrdev;
+		u8 devcnt;
+		int cnt;
+
 		/* Get the second return byte */
 		retval = read_single_byte(i2c,
 			AV8100_2ND_RET_BYTE_OFFSET, &val);
@@ -1704,18 +1747,70 @@ static int get_command_return_data(struct i2c_client *i2c,
 			/* Ignore return data */
 			break;
 
-		/* Get the return buffer length */
-		if (command_buffer[0] ==
+		dev_dbg(av8100dev, "req_type:%02x ", command_buffer[0]);
+
+		/* Check if revoc list data is requested */
+		if (command_buffer[0] !=
 			HDMI_REQUEST_FOR_REVOCATION_LIST_INPUT) {
-			*buffer_length = HDMI_REVOC_LIST_SIZE;
-		} else {
-			*buffer_length = 0x0;
+			*buffer_length = 0;
+			break;
 		}
 
 		dev_dbg(av8100dev, "return data: ");
 
 		/* Get the return buffer */
-		for (index = 0; index < *buffer_length; ++index) {
+		for (cnt = 0; cnt < HDMI_HDCP_MGMT_BKSV_SIZE; cnt++) {
+			retval = read_single_byte(i2c,
+				AV8100_HDCP_RET_BUF_OFFSET + index, &val);
+			if (retval) {
+				*buffer_length = 0;
+				goto get_command_return_data_fail;
+			} else {
+				*(buffer + index) = val;
+				dev_dbg(av8100dev, "%02x ", *(buffer + index));
+			}
+			index++;
+		}
+
+		/* Get Device count */
+		retval = read_single_byte(i2c,
+			AV8100_HDCP_RET_BUF_OFFSET + index, &nrdev);
+		if (retval) {
+			*buffer_length = 0;
+			goto get_command_return_data_fail;
+		} else {
+			*(buffer + index) = nrdev;
+			dev_dbg(av8100dev, "%02x ", *(buffer + index));
+		}
+		index++;
+
+		/* Determine number of devices */
+		nrdev &= HDMI_HDCP_MGMT_DEVICE_MASK;
+		if (nrdev > HDMI_HDCP_MGMT_MAX_DEVICES_SIZE)
+			nrdev = HDMI_HDCP_MGMT_MAX_DEVICES_SIZE;
+
+		/* Get Bksv for each connected equipment */
+		for (devcnt = 0; devcnt < nrdev; devcnt++)
+			for (cnt = 0; cnt < HDMI_HDCP_MGMT_BKSV_SIZE; cnt++) {
+				retval = read_single_byte(i2c,
+					AV8100_HDCP_RET_BUF_OFFSET + index,
+									&val);
+				if (retval) {
+					*buffer_length = 0;
+					goto get_command_return_data_fail;
+				} else {
+					*(buffer + index) = val;
+					dev_dbg(av8100dev, "%02x ",
+							*(buffer + index));
+				}
+				index++;
+			}
+
+		if (nrdev == 0)
+			goto hdcp_management_end;
+
+		/* Get SHA signature */
+		for (cnt = 0; cnt < HDMI_HDCP_MGMT_SHA_SIZE - 1; cnt++) {
 			retval = read_single_byte(i2c,
 				AV8100_HDCP_RET_BUF_OFFSET + index, &val);
 			if (retval) {
@@ -1725,9 +1820,14 @@ static int get_command_return_data(struct i2c_client *i2c,
 				*(buffer + index) = val;
 				dev_dbg(av8100dev, "%02x ", *(buffer + index));
 			}
+			index++;
 		}
 
+hdcp_management_end:
+		*buffer_length = index;
+
 		dev_dbg(av8100dev, "\n");
+		}
 		break;
 
 	case AV8100_COMMAND_EDID_SECTION_READBACK:
@@ -1875,6 +1975,8 @@ static int av8100_powerup1(void)
 	/* Need to wait before proceeding */
 	msleep(AV8100_WAITTIME_1MS);
 
+	av8100_set_state(AV8100_OPMODE_STANDBY);
+
 	if (pdata->alt_powerupseq) {
 		dev_dbg(av8100dev, "powerup seq alt\n");
 		retval = av8100_5V_w(0, 0, AV8100_ON_TIME);
@@ -1928,8 +2030,6 @@ static int av8100_powerup1(void)
 		msleep(AV8100_WAITTIME_1MS);
 	}
 
-	av8100_set_state(AV8100_OPMODE_STANDBY);
-
 	/* Get chip version */
 	retval = av8100_reg_stby_pend_int_r(NULL, NULL, NULL, &chip_version);
 	if (retval) {
@@ -1961,18 +2061,6 @@ av8100_powerup1_err:
 static int av8100_powerup2(void)
 {
 	int retval;
-	struct av8100_platform_data *pdata = av8100dev->platform_data;
-
-	/* Master clock timing, running, search for plug */
-	retval = av8100_reg_stby_w(AV8100_STANDBY_CPD_HIGH,
-		AV8100_STANDBY_STBY_HIGH, pdata->mclk_freq);
-	if (retval) {
-		dev_err(av8100dev,
-			"Failed to write the value to av8100 register\n");
-		return retval;
-	}
-
-	msleep(AV8100_WAITTIME_1MS);
 
 	/* ON time & OFF time on 5v HDMI plug detect */
 	retval = av8100_5V_w(av8100_globals->denc_off_time,
@@ -1991,6 +2079,99 @@ static int av8100_powerup2(void)
 	return 0;
 }
 
+static int register_read_internal(u8 offset, u8 *value)
+{
+	int retval = 0;
+	struct i2c_client *i2c;
+
+	if (av8100_status_get().av8100_state <= AV8100_OPMODE_SHUTDOWN)
+		return -EINVAL;
+
+	if (!av8100_config)
+		return -EINVAL;
+
+	i2c = av8100_config->client;
+
+	/* Read from register */
+	retval = read_single_byte(i2c, offset, value);
+	if (retval)	{
+		dev_dbg(av8100dev,
+			"Failed to read the value from av8100 register\n");
+		return -EFAULT;
+	}
+
+	return retval;
+}
+
+static int register_write_internal(u8 offset, u8 value)
+{
+	int retval;
+	struct i2c_client *i2c;
+
+	if (!av8100_config)
+		return -EINVAL;
+
+	i2c = av8100_config->client;
+
+	/* Write to register */
+	retval = write_single_byte(i2c, offset, value);
+	if (retval) {
+		dev_dbg(av8100dev,
+			"Failed to write the value to av8100 register\n");
+		return -EFAULT;
+	}
+
+	return 0;
+}
+
+int av8100_powerscan(void)
+{
+	int retval;
+	struct av8100_platform_data *pdata = av8100dev->platform_data;
+
+	dev_dbg(av8100dev, "%s\n", __func__);
+
+	if (av8100_status_get().av8100_state > AV8100_OPMODE_SCAN) {
+		dev_dbg(av8100dev, "set to scan mode\n");
+
+		av8100_disable_interrupt();
+
+		/* Stby mode */
+		retval = av8100_reg_stby_w(AV8100_STANDBY_CPD_LOW,
+			AV8100_STANDBY_STBY_LOW, pdata->mclk_freq);
+		if (retval) {
+			dev_err(av8100dev,
+				"Failed to write to av8100 register\n");
+			return retval;
+		}
+
+		/* Remove APE OPP requirement */
+		if (av8100_globals->opp_requested) {
+			prcmu_qos_remove_requirement(PRCMU_QOS_APE_OPP,
+					(char *)av8100_miscdev.name);
+			prcmu_qos_remove_requirement(PRCMU_QOS_DDR_OPP,
+					(char *)av8100_miscdev.name);
+			av8100_globals->opp_requested = false;
+		}
+
+		/* Clock disable */
+		if (av8100_globals->inputclk &&
+				av8100_globals->inputclk_requested) {
+			clk_disable(av8100_globals->inputclk);
+			av8100_globals->inputclk_requested = false;
+		}
+
+		msleep(AV8100_WAITTIME_1MS);
+
+		av8100_enable_interrupt();
+
+		av8100_set_state(AV8100_OPMODE_SCAN);
+	}
+
+	return 0;
+}
+EXPORT_SYMBOL(av8100_powerscan);
+
 int av8100_powerup(void)
 {
 	int ret = 0;
@@ -2021,6 +2202,8 @@ int av8100_powerdown(void)
 
 	struct av8100_platform_data *pdata = av8100dev->platform_data;
 
+	if (av8100_status_get().av8100_state <= AV8100_OPMODE_SHUTDOWN)
+		goto av8100_powerdown_end;
 	av8100_disable_interrupt();
 
 	if (pdata->alt_powerupseq) {
@@ -2035,9 +2218,6 @@ int av8100_powerdown(void)
 		msleep(AV8100_WAITTIME_50MS);
 	}
 
-	if (gpio_get_value(pdata->reset) == 0)
-		return 0;
-
 	/* Remove APE OPP requirement */
 	if (av8100_globals->opp_requested) {
 		prcmu_qos_remove_requirement(PRCMU_QOS_APE_OPP,
@@ -2068,11 +2248,12 @@ int av8100_powerdown(void)
 
 	av8100_set_state(AV8100_OPMODE_SHUTDOWN);
 
+av8100_powerdown_end:
 	return retval;
 }
 EXPORT_SYMBOL(av8100_powerdown);
 
-int av8100_download_firmware(char *fw_buff, int nbytes,
+int av8100_download_firmware(char *fw_buf, int nbytes,
 	enum interface_type if_type)
 {
 	int retval;
@@ -2080,9 +2261,8 @@ int av8100_download_firmware(char *fw_buff, int nbytes,
 	int increment = 15;
 	int index = 0;
 	int size = 0x0;
-	int tempnext = 0x0;
 	char val = 0x0;
-	char CheckSum = 0;
+	char checksum = 0;
 	int cnt;
 	int cnt_max;
 	struct i2c_client *i2c;
@@ -2091,19 +2271,43 @@ int av8100_download_firmware(char *fw_buff, int nbytes,
 	u8 hld;
 	u8 wa;
 	u8 ra;
+	struct av8100_platform_data *pdata = av8100dev->platform_data;
+	const struct firmware *fw_file;
+	u8 *fw_buff;
+	int fw_bytes;
 
-	if (av8100_status_get().av8100_state == AV8100_OPMODE_UNDEFINED)
+	if (av8100_status_get().av8100_state <= AV8100_OPMODE_SHUTDOWN)
 		return -EINVAL;
 
 	if (!av8100_config)
 		return -EINVAL;
 
+	/* Request firmware */
+	if (request_firmware(&fw_file,
+			       AV8100_FW_FILENAME,
+			       av8100dev)) {
+		dev_err(av8100dev, "fw request failed\n");
+		return -EFAULT;
+	}
+
+	/* Master clock timing, running */
+	retval = av8100_reg_stby_w(AV8100_STANDBY_CPD_LOW,
+		AV8100_STANDBY_STBY_HIGH, pdata->mclk_freq);
+	if (retval) {
+		dev_err(av8100dev,
+			"Failed to write the value to av8100 register\n");
+		goto av8100_download_firmware_err;
+	}
+
+	msleep(AV8100_WAITTIME_1MS);
+
 	/* Clock enable */
 	if (av8100_globals->inputclk &&
 			av8100_globals->inputclk_requested == false) {
 		if (clk_enable(av8100_globals->inputclk)) {
 			dev_err(av8100dev, "inputclk en failed\n");
-			return -EFAULT;
+			retval = -EFAULT;
+			goto av8100_download_firmware_err;
 		}
 
 		av8100_globals->inputclk_requested = true;
@@ -2114,12 +2318,16 @@ int av8100_download_firmware(char *fw_buff, int nbytes,
 		if (prcmu_qos_add_requirement(PRCMU_QOS_APE_OPP,
 				(char *)av8100_miscdev.name, 100)) {
 			dev_err(av8100dev, "APE OPP 100 failed\n");
-			return -EFAULT;
+			retval = -EFAULT;
+			goto av8100_download_firmware_err;
 		}
 		if (prcmu_qos_add_requirement(PRCMU_QOS_DDR_OPP,
 				(char *)av8100_miscdev.name, 100)) {
 			dev_err(av8100dev, "DDR OPP 100 failed\n");
-			return -EFAULT;
+			prcmu_qos_remove_requirement(PRCMU_QOS_APE_OPP,
+					(char *)av8100_miscdev.name);
+			retval = -EFAULT;
+			goto av8100_download_firmware_err;
 		}
 
 		av8100_globals->opp_requested = true;
@@ -2127,8 +2335,10 @@ int av8100_download_firmware(char *fw_buff, int nbytes,
 
 	msleep(AV8100_WAITTIME_10MS);
 
-	fw_buff = av8100_fw_buff;
-	nbytes = AV8100_FW_SIZE;
+	/* Prepare firmware data */
+	fw_bytes = fw_file->size;
+	fw_buff = (u8 *)fw_file->data;
+	dev_dbg(av8100dev, "fw size:%d\n", fw_bytes);
 
 	i2c = av8100_config->client;
 
@@ -2141,14 +2351,16 @@ int av8100_download_firmware(char *fw_buff, int nbytes,
 	if (retval) {
 		dev_err(av8100dev,
 			"Failed to write the value to av8100 register\n");
-		return -EFAULT;
+		retval = -EFAULT;
+		goto av8100_download_firmware_err;
 	}
 
 	retval = av8100_reg_gen_ctrl_r(&fdl, &hld, &wa, &ra);
 	if (retval) {
 		dev_err(av8100dev,
 			"Failed to read the value from av8100 register\n");
-		return -EFAULT;
+		retval = -EFAULT;
+		goto av8100_download_firmware_err;
 	} else {
 		dev_dbg(av8100dev, "GENERAL_CONTROL_REG register fdl:%d "
 			"hld:%d wa:%d ra:%d\n", fdl, hld, wa, ra);
@@ -2156,8 +2368,8 @@ int av8100_download_firmware(char *fw_buff, int nbytes,
 
 	LOCK_AV8100_HW;
 
-	temp = nbytes % increment;
-	for (size = 0; size < (nbytes-temp); size = size + increment,
+	temp = fw_bytes % increment;
+	for (size = 0; size < (fw_bytes-temp); size = size + increment,
 		index += increment) {
 		if (if_type == I2C_INTERFACE) {
 			retval = write_multi_byte(i2c,
@@ -2167,20 +2379,20 @@ int av8100_download_firmware(char *fw_buff, int nbytes,
 				dev_dbg(av8100dev, "Failed to download the "
 					"av8100 firmware\n");
 				UNLOCK_AV8100_HW;
-				return -EFAULT;
+				retval = -EFAULT;
+				goto av8100_download_firmware_err;
 			}
 		} else if (if_type == DSI_INTERFACE) {
 			dev_dbg(av8100dev,
 				"DSI_INTERFACE is currently not supported\n");
 			UNLOCK_AV8100_HW;
-			return -EINVAL;
+			retval = -EINVAL;
+			goto av8100_download_firmware_err;
 		} else {
 			UNLOCK_AV8100_HW;
-			return -EINVAL;
+			retval = -EINVAL;
+			goto av8100_download_firmware_err;
 		}
-
-		for (tempnext = size; tempnext < (increment+size); tempnext++)
-			av8100_receivetab[tempnext] = fw_buff[tempnext];
 	}
 
 	/* Transfer last firmware bytes */
@@ -2191,29 +2403,23 @@ int av8100_download_firmware(char *fw_buff, int nbytes,
 			dev_dbg(av8100dev,
 				"Failed to download the av8100 firmware\n");
 			UNLOCK_AV8100_HW;
-			return -EFAULT;
+			retval = -EFAULT;
+			goto av8100_download_firmware_err;
 		}
 	} else if (if_type == DSI_INTERFACE) {
 		/* TODO: Add support for DSI firmware download */
 		UNLOCK_AV8100_HW;
-		return -EINVAL;
+		retval = -EINVAL;
+		goto av8100_download_firmware_err;
 	} else {
 		UNLOCK_AV8100_HW;
-		return -EINVAL;
+		retval = -EINVAL;
+		goto av8100_download_firmware_err;
 	}
 
-	for (tempnext = size; tempnext < (size+temp); tempnext++)
-		av8100_receivetab[tempnext] = fw_buff[tempnext];
-
 	/* check transfer*/
-	for (size = 0; size < nbytes; size++) {
-		CheckSum = CheckSum ^ fw_buff[size];
-		if (av8100_receivetab[size] != fw_buff[size]) {
-			dev_dbg(av8100dev, ">Fw download fail....i=%d\n", size);
-			dev_dbg(av8100dev, "Transm = %x, Receiv = %x\n",
-				fw_buff[size], av8100_receivetab[size]);
-		}
-	}
+	for (size = 0; size < fw_bytes; size++)
+		checksum = checksum ^ fw_buff[size];
 
 	UNLOCK_AV8100_HW;
 
@@ -2221,17 +2427,19 @@ int av8100_download_firmware(char *fw_buff, int nbytes,
 	if (retval) {
 		dev_dbg(av8100dev,
 			"Failed to read the value from the av8100 register\n");
-		return -EFAULT;
+		retval = -EFAULT;
+		goto av8100_download_firmware_err;
 	}
 
-	dev_dbg(av8100dev, "CheckSum:%x,val:%x\n", CheckSum, val);
+	dev_dbg(av8100dev, "checksum:%x,val:%x\n", checksum, val);
 
-	if (CheckSum != val) {
+	if (checksum != val) {
 		dev_dbg(av8100dev,
-			">Fw downloading.... FAIL CheckSum issue\n");
-		dev_dbg(av8100dev, "Checksum = %d\n", CheckSum);
-		dev_dbg(av8100dev, "Checksum read: %d\n", val);
-		return -EFAULT;
+			">Fw downloading.... FAIL checksum issue\n");
+		dev_dbg(av8100dev, "checksum = %d\n", checksum);
+		dev_dbg(av8100dev, "checksum read: %d\n", val);
+		retval = -EFAULT;
+		goto av8100_download_firmware_err;
 	} else {
 		dev_dbg(av8100dev, ">Fw downloading.... success\n");
 	}
@@ -2243,12 +2451,13 @@ int av8100_download_firmware(char *fw_buff, int nbytes,
 	if (retval) {
 		dev_dbg(av8100dev,
 			"Failed to write the value to the av8100 register\n");
-		return -EFAULT;
+		retval = -EFAULT;
+		goto av8100_download_firmware_err;
 	}
 
 	/* Wait Internal Micro controler ready */
 	cnt = 0;
-	cnt_max = ARRAY_SIZE(waittime_retry);
+	cnt_max = sizeof(waittime_retry);
 	retval = av8100_reg_gen_status_r(NULL, NULL, NULL, &uc,
 		NULL, NULL);
 	while ((retval == 0) && (uc != 0x1) && (cnt++ < cnt_max)) {
@@ -2261,15 +2470,38 @@ int av8100_download_firmware(char *fw_buff, int nbytes,
 	if (retval)	{
 		dev_dbg(av8100dev,
 			"Failed to read the value from the av8100 register\n");
-		return -EFAULT;
+		retval = -EFAULT;
+		goto av8100_download_firmware_err;
 	}
 
 	if (uc != 0x1)
 		dev_dbg(av8100dev, "UC is not ready\n");
 
+	release_firmware(fw_file);
+
 	av8100_set_state(AV8100_OPMODE_IDLE);
 
 	return 0;
+
+av8100_download_firmware_err:
+	release_firmware(fw_file);
+
+	/* Remove APE OPP requirement */
+	if (av8100_globals->opp_requested) {
+		prcmu_qos_remove_requirement(PRCMU_QOS_APE_OPP,
+				(char *)av8100_miscdev.name);
+		prcmu_qos_remove_requirement(PRCMU_QOS_DDR_OPP,
+				(char *)av8100_miscdev.name);
+		av8100_globals->opp_requested = false;
+	}
+
+	/* Clock disable */
+	if (av8100_globals->inputclk && av8100_globals->inputclk_requested) {
+		clk_disable(av8100_globals->inputclk);
+		av8100_globals->inputclk_requested = false;
+	}
+
+	return retval;
 }
 EXPORT_SYMBOL(av8100_download_firmware);
 
@@ -2280,12 +2512,15 @@ int av8100_disable_interrupt(void)
 	u8 hpdm = 0;
 	u8 cpdm = 0;
 
-	if (av8100_status_get().av8100_state == AV8100_OPMODE_UNDEFINED)
+	if (av8100_status_get().av8100_state <= AV8100_OPMODE_SHUTDOWN)
 		return -EINVAL;
 
-	if (!av8100_config)
+	if (!av8100_globals || !av8100_config)
 		return -EINVAL;
 
+	if (!av8100_globals->ints_enabled)
+		return 0;
+
 	i2c = av8100_config->client;
 
 	retval = av8100_reg_stby_pend_int_w(
@@ -2313,10 +2548,8 @@ int av8100_disable_interrupt(void)
 		return -EFAULT;
 	}
 
-	if (av8100_globals) {
-		hpdm = av8100_globals->hpdm;
-		cpdm = av8100_globals->cpdm;
-	}
+	hpdm = av8100_globals->hpdm;
+	cpdm = av8100_globals->cpdm;
 
 	retval = av8100_reg_stby_int_mask_w(
 			AV8100_STANDBY_INTERRUPT_MASK_HPDM_LOW,
@@ -2329,10 +2562,9 @@ int av8100_disable_interrupt(void)
 		return -EFAULT;
 	}
 
-	if (av8100_globals) {
-		av8100_globals->hpdm = hpdm;
-		av8100_globals->cpdm = cpdm;
-	}
+	av8100_globals->hpdm = hpdm;
+	av8100_globals->cpdm = cpdm;
+	av8100_globals->ints_enabled = false;
 
 	return 0;
 }
@@ -2343,12 +2575,15 @@ int av8100_enable_interrupt(void)
 	int retval;
 	struct i2c_client *i2c;
 
-	if (av8100_status_get().av8100_state == AV8100_OPMODE_UNDEFINED)
+	if (av8100_status_get().av8100_state <= AV8100_OPMODE_SHUTDOWN)
 		return -EINVAL;
 
 	if (!av8100_globals || !av8100_config)
 		return -EINVAL;
 
+	if (av8100_globals->ints_enabled)
+		return 0;
+
 	i2c = av8100_config->client;
 
 	retval = av8100_reg_stby_pend_int_w(
@@ -2387,31 +2622,11 @@ int av8100_enable_interrupt(void)
 		return -EFAULT;
 	}
 
-	return 0;
-}
-EXPORT_SYMBOL(av8100_enable_interrupt);
-
-static int register_write_internal(u8 offset, u8 value)
-{
-	int retval;
-	struct i2c_client *i2c;
-
-	if (!av8100_config)
-		return -EINVAL;
-
-	i2c = av8100_config->client;
-
-	/* Write to register */
-	retval = write_single_byte(i2c, offset, value);
-	if (retval) {
-		dev_dbg(av8100dev,
-			"Failed to write the value to av8100 register\n");
-		return -EFAULT;
-	}
+	av8100_globals->ints_enabled = true;
 
 	return 0;
 }
-EXPORT_SYMBOL(register_write_internal);
+EXPORT_SYMBOL(av8100_enable_interrupt);
 
 int av8100_reg_stby_w(
 		u8 cpd, u8 stby, u8 mclkrng)
@@ -2419,7 +2634,7 @@ int av8100_reg_stby_w(
 	int retval;
 	u8 val;
 
-	if (av8100_status_get().av8100_state == AV8100_OPMODE_UNDEFINED)
+	if (av8100_status_get().av8100_state <= AV8100_OPMODE_SHUTDOWN)
 		return -EINVAL;
 
 	LOCK_AV8100_HW;
@@ -2440,7 +2655,7 @@ static int av8100_5V_w(u8 denc_off, u8 hdmi_off, u8 on)
 	u8 val;
 	int retval;
 
-	if (av8100_status_get().av8100_state == AV8100_OPMODE_UNDEFINED)
+	if (av8100_status_get().av8100_state <= AV8100_OPMODE_SHUTDOWN)
 		return -EINVAL;
 
 	LOCK_AV8100_HW;
@@ -2468,7 +2683,7 @@ int av8100_reg_hdmi_5_volt_time_w(u8 denc_off, u8 hdmi_off, u8 on)
 {
 	int retval;
 
-	if (av8100_status_get().av8100_state == AV8100_OPMODE_UNDEFINED)
+	if (av8100_status_get().av8100_state <= AV8100_OPMODE_SHUTDOWN)
 		return -EINVAL;
 
 	retval = av8100_5V_w(denc_off, hdmi_off, on);
@@ -2491,7 +2706,7 @@ int av8100_reg_stby_int_mask_w(
 	int retval;
 	u8 val;
 
-	if (av8100_status_get().av8100_state == AV8100_OPMODE_UNDEFINED)
+	if (av8100_status_get().av8100_state <= AV8100_OPMODE_SHUTDOWN)
 		return -EINVAL;
 
 	LOCK_AV8100_HW;
@@ -2519,7 +2734,7 @@ int av8100_reg_stby_pend_int_w(
 	int retval;
 	u8 val;
 
-	if (av8100_status_get().av8100_state == AV8100_OPMODE_UNDEFINED)
+	if (av8100_status_get().av8100_state <= AV8100_OPMODE_SHUTDOWN)
 		return -EINVAL;
 
 	LOCK_AV8100_HW;
@@ -2544,7 +2759,7 @@ int av8100_reg_gen_int_mask_w(
 	int retval;
 	u8 val;
 
-	if (av8100_status_get().av8100_state == AV8100_OPMODE_UNDEFINED)
+	if (av8100_status_get().av8100_state <= AV8100_OPMODE_SHUTDOWN)
 		return -EINVAL;
 
 	LOCK_AV8100_HW;
@@ -2572,7 +2787,7 @@ int av8100_reg_gen_int_w(
 	int retval;
 	u8 val;
 
-	if (av8100_status_get().av8100_state == AV8100_OPMODE_UNDEFINED)
+	if (av8100_status_get().av8100_state <= AV8100_OPMODE_SHUTDOWN)
 		return -EINVAL;
 
 	LOCK_AV8100_HW;
@@ -2599,7 +2814,7 @@ int av8100_reg_gpio_conf_w(
 	int retval;
 	u8 val;
 
-	if (av8100_status_get().av8100_state == AV8100_OPMODE_UNDEFINED)
+	if (av8100_status_get().av8100_state <= AV8100_OPMODE_SHUTDOWN)
 		return -EINVAL;
 
 	LOCK_AV8100_HW;
@@ -2626,7 +2841,7 @@ int av8100_reg_gen_ctrl_w(
 	int retval;
 	u8 val;
 
-	if (av8100_status_get().av8100_state == AV8100_OPMODE_UNDEFINED)
+	if (av8100_status_get().av8100_state <= AV8100_OPMODE_SHUTDOWN)
 		return -EINVAL;
 
 	LOCK_AV8100_HW;
@@ -2650,7 +2865,7 @@ int av8100_reg_fw_dl_entry_w(
 	int retval;
 	u8 val;
 
-	if (av8100_status_get().av8100_state == AV8100_OPMODE_UNDEFINED)
+	if (av8100_status_get().av8100_state <= AV8100_OPMODE_SHUTDOWN)
 		return -EINVAL;
 
 	LOCK_AV8100_HW;
@@ -2672,7 +2887,7 @@ int av8100_reg_w(
 	int retval = 0;
 	struct i2c_client *i2c;
 
-	if (av8100_status_get().av8100_state == AV8100_OPMODE_UNDEFINED)
+	if (av8100_status_get().av8100_state <= AV8100_OPMODE_SHUTDOWN)
 		return -EINVAL;
 
 	LOCK_AV8100_HW;
@@ -2698,38 +2913,13 @@ int av8100_reg_w(
 }
 EXPORT_SYMBOL(av8100_reg_w);
 
-int register_read_internal(u8 offset, u8 *value)
-{
-	int retval = 0;
-	struct i2c_client *i2c;
-
-	if (av8100_status_get().av8100_state == AV8100_OPMODE_UNDEFINED)
-		return -EINVAL;
-
-	if (!av8100_config)
-		return -EINVAL;
-
-	i2c = av8100_config->client;
-
-	/* Read from register */
-	retval = read_single_byte(i2c, offset, value);
-	if (retval)	{
-		dev_dbg(av8100dev,
-			"Failed to read the value from av8100 register\n");
-		return -EFAULT;
-	}
-
-	return retval;
-}
-EXPORT_SYMBOL(register_read_internal);
-
 int av8100_reg_stby_r(
 		u8 *cpd, u8 *stby, u8 *hpds, u8 *cpds, u8 *mclkrng)
 {
 	int retval;
 	u8 val;
 
-	if (av8100_status_get().av8100_state == AV8100_OPMODE_UNDEFINED)
+	if (av8100_status_get().av8100_state <= AV8100_OPMODE_SHUTDOWN)
 		return -EINVAL;
 
 	LOCK_AV8100_HW;
@@ -2760,7 +2950,7 @@ int av8100_reg_hdmi_5_volt_time_r(
 	int retval;
 	u8 val;
 
-	if (av8100_status_get().av8100_state == AV8100_OPMODE_UNDEFINED)
+	if (av8100_status_get().av8100_state <= AV8100_OPMODE_SHUTDOWN)
 		return -EINVAL;
 
 	LOCK_AV8100_HW;
@@ -2798,7 +2988,7 @@ int av8100_reg_stby_int_mask_r(
 	int retval;
 	u8 val;
 
-	if (av8100_status_get().av8100_state == AV8100_OPMODE_UNDEFINED)
+	if (av8100_status_get().av8100_state <= AV8100_OPMODE_SHUTDOWN)
 		return -EINVAL;
 
 	LOCK_AV8100_HW;
@@ -2828,7 +3018,7 @@ int av8100_reg_stby_pend_int_r(
 	int retval;
 	u8 val;
 
-	if (av8100_status_get().av8100_state == AV8100_OPMODE_UNDEFINED)
+	if (av8100_status_get().av8100_state <= AV8100_OPMODE_SHUTDOWN)
 		return -EINVAL;
 
 	LOCK_AV8100_HW;
@@ -2864,7 +3054,7 @@ int av8100_reg_gen_int_mask_r(
 	int retval;
 	u8 val;
 
-	if (av8100_status_get().av8100_state == AV8100_OPMODE_UNDEFINED)
+	if (av8100_status_get().av8100_state <= AV8100_OPMODE_SHUTDOWN)
 		return -EINVAL;
 
 	LOCK_AV8100_HW;
@@ -2905,7 +3095,7 @@ int av8100_reg_gen_int_r(
 	int retval;
 	u8 val;
 
-	if (av8100_status_get().av8100_state == AV8100_OPMODE_UNDEFINED)
+	if (av8100_status_get().av8100_state <= AV8100_OPMODE_SHUTDOWN)
 		return -EINVAL;
 
 	LOCK_AV8100_HW;
@@ -2945,7 +3135,7 @@ int av8100_reg_gen_status_r(
 	int retval;
 	u8 val;
 
-	if (av8100_status_get().av8100_state == AV8100_OPMODE_UNDEFINED)
+	if (av8100_status_get().av8100_state <= AV8100_OPMODE_SHUTDOWN)
 		return -EINVAL;
 
 	LOCK_AV8100_HW;
@@ -2984,7 +3174,7 @@ int av8100_reg_gpio_conf_r(
 	int retval;
 	u8 val;
 
-	if (av8100_status_get().av8100_state == AV8100_OPMODE_UNDEFINED)
+	if (av8100_status_get().av8100_state <= AV8100_OPMODE_SHUTDOWN)
 		return -EINVAL;
 
 	LOCK_AV8100_HW;
@@ -3022,7 +3212,7 @@ int av8100_reg_gen_ctrl_r(
 	int retval;
 	u8 val;
 
-	if (av8100_status_get().av8100_state == AV8100_OPMODE_UNDEFINED)
+	if (av8100_status_get().av8100_state <= AV8100_OPMODE_SHUTDOWN)
 		return -EINVAL;
 
 	LOCK_AV8100_HW;
@@ -3050,7 +3240,7 @@ int av8100_reg_fw_dl_entry_r(
 	int retval;
 	u8 val;
 
-	if (av8100_status_get().av8100_state == AV8100_OPMODE_UNDEFINED)
+	if (av8100_status_get().av8100_state <= AV8100_OPMODE_SHUTDOWN)
 		return -EINVAL;
 
 	LOCK_AV8100_HW;
@@ -3075,7 +3265,7 @@ int av8100_reg_r(
 	int retval = 0;
 	struct i2c_client *i2c;
 
-	if (av8100_status_get().av8100_state == AV8100_OPMODE_UNDEFINED)
+	if (av8100_status_get().av8100_state <= AV8100_OPMODE_SHUTDOWN)
 		return -EINVAL;
 
 	LOCK_AV8100_HW;
@@ -3328,7 +3518,7 @@ int av8100_conf_w(enum av8100_command_type command_type,
 	u32 cmd_length = 0;
 	struct i2c_client *i2c;
 
-	if (av8100_status_get().av8100_state == AV8100_OPMODE_UNDEFINED)
+	if (av8100_status_get().av8100_state <= AV8100_OPMODE_SHUTDOWN)
 		return -EINVAL;
 
 	if (return_buffer_length)
@@ -3466,7 +3656,7 @@ int av8100_conf_w(enum av8100_command_type command_type,
 		/* Get the first return byte */
 		msleep(AV8100_WAITTIME_1MS);
 		cnt = 0;
-		cnt_max = ARRAY_SIZE(waittime_retry);
+		cnt_max = sizeof(waittime_retry);
 		retval = get_command_return_first(i2c, command_type);
 		while (retval && (cnt++ < cnt_max)) {
 			msleep(waittime_retry[cnt]);
@@ -3510,7 +3700,7 @@ int av8100_conf_w_raw(enum av8100_command_type command_type,
 	int cnt;
 	int cnt_max;
 
-	if (av8100_status_get().av8100_state == AV8100_OPMODE_UNDEFINED)
+	if (av8100_status_get().av8100_state <= AV8100_OPMODE_SHUTDOWN)
 		return -EINVAL;
 
 	LOCK_AV8100_HW;
@@ -3541,7 +3731,7 @@ int av8100_conf_w_raw(enum av8100_command_type command_type,
 	/* Get the first return byte */
 	msleep(AV8100_WAITTIME_1MS);
 	cnt = 0;
-	cnt_max = ARRAY_SIZE(waittime_retry);
+	cnt_max = sizeof(waittime_retry);
 	retval = get_command_return_first(i2c, command_type);
 	while (retval && (cnt++ < cnt_max)) {
 		msleep(waittime_retry[cnt]);
diff --git a/drivers/video/av8100/av8100_fw.h b/drivers/video/av8100/av8100_fw.h
deleted file mode 100644
index 2beb0736922..00000000000
--- a/drivers/video/av8100/av8100_fw.h
+++ /dev/null
@@ -1,1165 +0,0 @@
-/*
- * Copyright (C) ST-Ericsson AB 2010
- *
- * Author: Per Persson <per.xb.persson@stericsson.com>
- * for ST-Ericsson.
- *
- * License terms: GNU General Public License (GPL), version 2.
- */
-
-/* AV8100 Firmware version : Unified version V2.2 for av8100v1 and av8100v2.x */
-#define AV8100_FW_SIZE 18432
-char av8100_fw_buff[AV8100_FW_SIZE] = {
-0x80,0xfe,0xcb,0xfe,0x6b,0xf4,0x22,0xf6,0x22,0xf6,0xb9,0xf7,0x21,0xf5,0xbe,0xf7,
-0x06,0xf9,0xc8,0xfa,0xe5,0xfa,0xf6,0xfa,0x08,0xfb,0x1b,0xfb,0x20,0xfb,0x25,0xfb,
-0x2a,0xfb,0x2f,0xfb,0x44,0xfb,0x7e,0xfb,0x23,0xfc,0x65,0xf4,0x65,0xf4,0x66,0xf4,
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-0x35,0x78,0x84,0x00,0x35,0x79,0x84,0x00,0x35,0x7a,0x84,0x00,0x35,0x7b,0x84,0x00,
-0x35,0x3f,0x20,0x01,0x35,0x3d,0x20,0xc7,0xff,0xa6,0x3c,0x20,0xc7,0x04,0xa6,0x6c,
-0x01,0x01,0x35,0x6d,0x01,0x86,0x35,0x6e,0x01,0xa0,0x35,0x6f,0x01,0xc7,0x0f,0x20,
-0x6c,0x01,0x02,0x35,0x6d,0x01,0x49,0x35,0x6e,0x01,0xf0,0x35,0x6f,0x01,0xc7,0x1c,
-0x20,0x6d,0x01,0x9b,0x35,0x6e,0x01,0xfc,0x35,0x6f,0x01,0xc0,0x35,0x2a,0x20,0x6d,
-0x01,0x8c,0x35,0x6e,0x01,0xba,0x35,0x6f,0x01,0x80,0x35,0x38,0x20,0x6d,0x01,0x24,
-0x35,0x6e,0x01,0xf8,0x35,0x6f,0x01,0xc7,0x49,0x20,0x6c,0x01,0x5f,0x72,0x6d,0x01,
-0x5f,0x72,0x6e,0x01,0x5f,0x72,0x6f,0x01,0x5f,0x72,0x4c,0x27,0x08,0xa0,0x3f,0x27,
-0x4a,0x34,0x27,0x4a,0x29,0x27,0x4a,0x1f,0x27,0x0f,0xa4,0x08,0x20,0xc6,0xea,0x01,
-0x5f,0x72,0xeb,0x01,0xc7,0x01,0xa6,0x3e,0x20,0xfe,0x35,0xf3,0x01,0x10,0x35,0x0a,
-0x20,0x03,0xa6,0x3e,0x20,0x20,0x35,0xf3,0x01,0xc7,0x21,0xa6,0x11,0x3f,0x04,0x20,
-0x22,0xa6,0x11,0x00,0x01,0x35,0x08,0x27,0x9b,0xfc,0xcd,0xa0,0x3f,0xa1,0x3f,0xa2,
-0xb7,0x02,0xa4,0xa2,0xb6,0xa3,0x3f,0x1e,0xfe,0xcd,0xa4,0xb7,0x00,0xa9,0x41,0x01,
-0xab,0x5b,0x01,0x6b,0x94,0x84,0xc6,0x02,0x6b,0x95,0x84,0xc6,0x03,0x6b,0x96,0x84,
-0xc6,0x04,0x6b,0x97,0x84,0xc6,0x47,0x25,0x10,0xa1,0x03,0x20,0xc6,0xf2,0x25,0x10,
-0xa1,0x05,0x6b,0x4c,0xc9,0x01,0x4f,0x72,0x05,0xee,0x72,0x05,0x6b,0x4f,0xd2,0x00,
-0x5f,0x72,0xd3,0x00,0x5f,0x72,0xe4,0x01,0x5f,0x72,0xbb,0x00,0x5f,0x72,0xbd,0x00,
-0x5f,0x72,0xbc,0x00,0x5f,0x72,0xda,0x01,0x5f,0x72,0xd9,0x01,0x5f,0x72,0x9b,0x01,
-0x0a,0x35,0x9e,0x01,0x5f,0x72,0x9f,0x01,0x5f,0x72,0xa9,0x01,0x5f,0x72,0xa0,0x01,
-0x5f,0x72,0xa1,0x01,0x5f,0x72,0xa2,0x01,0x5f,0x72,0x86,0x01,0x5f,0x72,0xe9,0x01,
-0x5f,0x72,0xee,0x01,0x5f,0x72,0x71,0x01,0x5f,0x72,0x72,0x01,0x5f,0x72,0xaa,0x00,
-0x5f,0x72,0x74,0x01,0x5f,0x72,0x87,0x01,0x5f,0x72,0x75,0x01,0x5f,0x72,0xbf,0x00,
-0x5f,0x72,0xc0,0x00,0x5f,0x72,0xc1,0x00,0x5f,0x72,0xc2,0x00,0x5f,0x72,0x70,0x01,
-0x5f,0x72,0x11,0x3f,0x10,0x3f,0x73,0x01,0x5f,0x72,0xc7,0x01,0x5f,0x72,0xc8,0x01,
-0x5f,0x72,0xef,0x01,0x5f,0x72,0xf0,0x01,0xff,0x35,0xf2,0x01,0x5f,0x72,0xe8,0x01,
-0x5f,0x72,0x9b,0x06,0x20,0x5f,0x72,0x88,0x88,0x88,0x88,0x88,0x81,0x84,0xe3,0xad,
-0xf4,0x25,0x40,0xa1,0x01,0x6b,0x4c,0x12,0x6f,0x01,0xee,0x72,0x01,0x6b,0x4f,0x88,
-0x81,0x05,0x20,0x10,0x72,0x15,0x20,0x11,0x72,0x10,0x1e,0x23,0x1b,0xcc,0x8b,0xff,
-0xa6,0x04,0xae,0x81,0x85,0x01,0x7b,0x9a,0xc7,0x01,0xc7,0x0f,0xa4,0xc7,0x01,0xc6,
-0xc9,0x01,0x4f,0x72,0xc7,0x01,0x5c,0x72,0x01,0x6b,0xc9,0x01,0xd6,0xc7,0x01,0xce,
-0x18,0x27,0xc7,0x01,0xc1,0xc8,0x01,0xc6,0x9b,0x01,0x6b,0x4f,0x88,0x81,0xc8,0x01,
-0xc7,0x0f,0xa4,0xc8,0x01,0xc6,0xc9,0x01,0xd7,0xc8,0x01,0x5c,0x72,0xc8,0x01,0xce,
-};
diff --git a/drivers/video/av8100/hdmi.c b/drivers/video/av8100/hdmi.c
index b023048d810..af9dcfac892 100644
--- a/drivers/video/av8100/hdmi.c
+++ b/drivers/video/av8100/hdmi.c
@@ -23,6 +23,7 @@
 #include "hdmi_loc.h"
 #include <linux/slab.h>
 #include <linux/sched.h>
+#include <linux/delay.h>
 
 #define SYSFS_EVENT_FILENAME "evread"
 
@@ -285,10 +286,35 @@ static int cecread(u8 *src, u8 *dest, u8 *data_len, u8 *data)
 	return 0;
 }
 
+/* CEC tx status can be set or read */
+static bool cec_tx_status(enum cec_tx_status_action action)
+{
+	static bool cec_tx_busy;
+
+	switch (action) {
+	case CEC_TX_SET_FREE:
+		cec_tx_busy = false;
+		dev_dbg(hdmidev, "cec_tx_busy set:%d\n", cec_tx_busy);
+		break;
+
+	case CEC_TX_SET_BUSY:
+		cec_tx_busy = true;
+		dev_dbg(hdmidev, "cec_tx_busy set:%d\n", cec_tx_busy);
+		break;
+
+	case CEC_TX_CHECK:
+	default:
+		dev_dbg(hdmidev, "cec_tx_busy chk:%d\n", cec_tx_busy);
+		break;
+	}
+
+	return cec_tx_busy;
+}
 static int cecsend(u8 src, u8 dest, u8 data_len, u8 *data)
 {
 	union av8100_configuration config;
 	struct av8100_status status;
+	int cnt;
 
 	status = av8100_status_get();
 	if (status.av8100_state < AV8100_OPMODE_STANDBY) {
@@ -316,11 +342,25 @@ static int cecsend(u8 src, u8 dest, u8 data_len, u8 *data)
 		return -EINVAL;
 	}
 
+	if (av8100_enable_interrupt() != 0) {
+		dev_err(hdmidev, "av8100_ei FAIL\n");
+		return -EINVAL;
+	}
+
+	cnt = 0;
+	while ((cnt < CECTX_TRY) && cec_tx_status(CEC_TX_CHECK)) {
+		/* Wait for pending CEC to be finished */
+		msleep(CECTX_WAITTIME);
+		cnt++;
+	}
+	dev_dbg(hdmidev, "cectxcnt:%d\n", cnt);
+
 	if (av8100_conf_w(AV8100_COMMAND_CEC_MESSAGE_WRITE,
 		NULL, NULL, I2C_INTERFACE) != 0) {
 		dev_err(hdmidev, "av8100_conf_w FAIL\n");
 		return -EINVAL;
 	}
+	cec_tx_status(CEC_TX_SET_BUSY);
 
 	return 0;
 }
@@ -838,7 +878,8 @@ static ssize_t store_ceceven(struct device *dev,
 			enable = true;
 	}
 
-	event_enable(enable, HDMI_EVENT_CEC | HDMI_EVENT_CECTXERR);
+	event_enable(enable, HDMI_EVENT_CEC | HDMI_EVENT_CECTXERR |
+						HDMI_EVENT_CECTX);
 
 	return count;
 }
@@ -900,17 +941,24 @@ static ssize_t store_cecsend(struct device *dev,
 	struct cec_rw cec_w;
 	int index = 0;
 	int cnt;
+	int store_as_text;
 
 	dev_dbg(hdmidev, "%s\n", __func__);
 
 	hdmi_driver_data = dev_get_drvdata(dev);
 
-	if (hdmi_driver_data->store_as_hextext) {
+	if ((*buf == 'F') || (*buf == 'f'))
+		/* To be able to override bin format for test purpose */
+		store_as_text = 1;
+	else
+		store_as_text = hdmi_driver_data->store_as_hextext;
+
+	if (store_as_text) {
 		if ((count < HDMI_CECSEND_TEXT_SIZE_MIN) ||
 			(count > HDMI_CECSEND_TEXT_SIZE_MAX))
 			return -EINVAL;
 
-		cec_w.src = htoi(buf + index);
+		cec_w.src = htoi(buf + index) & 0x0F;
 		index += 2;
 		cec_w.dest = htoi(buf + index);
 		index += 2;
@@ -1343,28 +1391,30 @@ static ssize_t store_hdcpauthencr(struct device *dev,
 	int index = 0;
 	u8 crc;
 	u8 progged;
-	int result = HDMI_RESULT_OK;
+	int result = HDMI_RESULT_NOT_OK;
 
 	dev_dbg(hdmidev, "%s\n", __func__);
 
 	hdmi_driver_data = dev_get_drvdata(dev);
 
 	/* Default not OK */
-	hdmi_driver_data->authencr.result = HDMI_RESULT_NOT_OK;
+	hdmi_driver_data->authencr.buf_len = 0;
 
-	if (hdcpchkaesotp(&crc, &progged))
-		return -EINVAL;
+	if (hdcpchkaesotp(&crc, &progged)) {
+		result = HDMI_AES_NOT_FUSED;
+		goto store_hdcpauthencr_end;
+	}
 
 	if (!progged) {
 		/* AES is not fused */
 		result = HDMI_AES_NOT_FUSED;
-		goto store_hdcpauthencr_err;
+		goto store_hdcpauthencr_end;
 	}
 
 	if (hdmi_driver_data->store_as_hextext) {
 		if ((count != HDMI_HDCPAUTHENCR_TEXT_SIZE) &&
 			(count != HDMI_HDCPAUTHENCR_TEXT_SIZE + 1))
-			return -EINVAL;
+			goto store_hdcpauthencr_end;
 
 		hdcp_authencr.auth_type = htoi(buf + index);
 		index += 2;
@@ -1372,7 +1422,7 @@ static ssize_t store_hdcpauthencr(struct device *dev,
 		index += 2;
 	} else {
 		if (count != HDMI_HDCPAUTHENCR_BIN_SIZE)
-			return -EINVAL;
+			goto store_hdcpauthencr_end;
 
 		hdcp_authencr.auth_type = *(buf + index++);
 		hdcp_authencr.encr_type = *(buf + index++);
@@ -1381,9 +1431,11 @@ static ssize_t store_hdcpauthencr(struct device *dev,
 	if (hdcpauthencr(hdcp_authencr.auth_type, hdcp_authencr.encr_type,
 		 &hdmi_driver_data->authencr.buf_len,
 		 hdmi_driver_data->authencr.buf))
-		return -EINVAL;
+		goto store_hdcpauthencr_end;
 
-store_hdcpauthencr_err:
+	result = HDMI_RESULT_OK;
+
+store_hdcpauthencr_end:
 	hdmi_driver_data->authencr.result = result;
 	return count;
 }
@@ -1400,9 +1452,6 @@ static ssize_t show_hdcpauthencr(struct device *dev,
 
 	hdmi_driver_data = dev_get_drvdata(dev);
 
-	len = hdmi_driver_data->authencr.buf_len;
-	if (len > AUTH_BUF_LEN)
-		len = AUTH_BUF_LEN;
 
 	if (hdmi_driver_data->store_as_hextext) {
 		snprintf(buf + index, 3, "%02x",
@@ -1411,6 +1460,15 @@ static ssize_t show_hdcpauthencr(struct device *dev,
 	} else
 		*(buf + index++) = hdmi_driver_data->authencr.result;
 
+	dev_dbg(hdmidev, "result:%02x\n", hdmi_driver_data->authencr.result);
+
+	/* resp_size */
+	len = hdmi_driver_data->authencr.buf_len;
+	if (len > AUTH_BUF_LEN)
+		len = AUTH_BUF_LEN;
+	dev_dbg(hdmidev, "resp_size:%d\n", len);
+
+	/* resp */
 	cnt = 0;
 	while (cnt < len) {
 		if (hdmi_driver_data->store_as_hextext) {
@@ -1427,8 +1485,6 @@ static ssize_t show_hdcpauthencr(struct device *dev,
 		cnt++;
 	}
 
-	dev_dbg(hdmidev, "result:%02x\n", hdmi_driver_data->authencr.result);
-
 	if (hdmi_driver_data->store_as_hextext)
 		index++;
 
@@ -1695,34 +1751,28 @@ static int hdmi_ioctl(struct file *file,
 		       unsigned int cmd, unsigned long arg)
 {
 	u8 value = 0;
-	struct plug_detect plug_detect;
-	struct edid_read edid_read;
-	struct cec_rw cec_read;
-	struct cec_rw cec_send;
-	struct info_fr info_fr;
-	struct hdcp_fuseaes hdcp_fuseaes;
-	struct hdcp_loadaesall hdcp_loadaesall;
-	int block_cnt;
-	struct hdcp_loadaesone hdcp_loadaesone;
-	struct hdcp_authencr hdcp_authencr;
-	struct audio_cfg audio_cfg;
-	union av8100_configuration config;
 	struct hdmi_register reg;
-	struct hdmi_command_register command_reg;
 	struct av8100_status status;
 	u8 aes_status;
 
 	switch (cmd) {
 	case IOC_PLUG_DETECT_ENABLE:
+		{
+		struct plug_detect plug_detect;
+
 		if (copy_from_user(&plug_detect, (void *)arg,
 			sizeof(struct plug_detect)))
 			return -EINVAL;
 
 		if (plugdeten(&plug_detect))
 			return -EINVAL;
+		}
 		break;
 
 	case IOC_EDID_READ:
+		{
+		struct edid_read edid_read;
+
 		if (copy_from_user(&edid_read, (void *)arg,
 				sizeof(struct edid_read)))
 			return -EINVAL;
@@ -1735,16 +1785,21 @@ static int hdmi_ioctl(struct file *file,
 			sizeof(struct edid_read))) {
 			return -EINVAL;
 		}
+		}
 		break;
 
 	case IOC_CEC_EVENT_ENABLE:
 		if (copy_from_user(&value, (void *)arg, sizeof(u8)))
 			return -EINVAL;
 
-		event_enable(value != 0, HDMI_EVENT_CEC | HDMI_EVENT_CECTXERR);
+		event_enable(value != 0, HDMI_EVENT_CEC | HDMI_EVENT_CECTXERR |
+							HDMI_EVENT_CECTX);
 		break;
 
 	case IOC_CEC_READ:
+		{
+		struct cec_rw cec_read;
+
 		if (cecread(&cec_read.src, &cec_read.dest, &cec_read.length,
 			cec_read.data))
 			return -EINVAL;
@@ -1753,9 +1808,13 @@ static int hdmi_ioctl(struct file *file,
 			sizeof(struct cec_rw))) {
 			return -EINVAL;
 		}
+		}
 		break;
 
 	case IOC_CEC_SEND:
+		{
+		struct cec_rw cec_send;
+
 		if (copy_from_user(&cec_send, (void *)arg,
 				sizeof(struct cec_rw)))
 			return -EINVAL;
@@ -1765,9 +1824,13 @@ static int hdmi_ioctl(struct file *file,
 				cec_send.length,
 				cec_send.data))
 			return -EINVAL;
+		}
 		break;
 
 	case IOC_INFOFRAME_SEND:
+		{
+		struct info_fr info_fr;
+
 		if (copy_from_user(&info_fr, (void *)arg,
 				sizeof(struct info_fr)))
 			return -EINVAL;
@@ -1775,6 +1838,7 @@ static int hdmi_ioctl(struct file *file,
 		if (infofrsend(info_fr.type, info_fr.ver, info_fr.crc,
 			info_fr.length, info_fr.data))
 			return -EINVAL;
+		}
 		break;
 
 	case IOC_HDCP_EVENT_ENABLE:
@@ -1795,6 +1859,9 @@ static int hdmi_ioctl(struct file *file,
 		break;
 
 	case IOC_HDCP_FUSEAES:
+		{
+		struct hdcp_fuseaes hdcp_fuseaes;
+
 		if (copy_from_user(&hdcp_fuseaes, (void *)arg,
 				sizeof(struct hdcp_fuseaes)))
 			return -EINVAL;
@@ -1807,9 +1874,15 @@ static int hdmi_ioctl(struct file *file,
 			sizeof(struct hdcp_fuseaes))) {
 			return -EINVAL;
 		}
+		}
 		break;
 
 	case IOC_HDCP_LOADAES:
+		{
+		int block_cnt;
+		struct hdcp_loadaesone hdcp_loadaesone;
+		struct hdcp_loadaesall hdcp_loadaesall;
+
 		if (copy_from_user(&hdcp_loadaesall, (void *)arg,
 				sizeof(struct hdcp_loadaesall)))
 			return -EINVAL;
@@ -1878,32 +1951,55 @@ ioc_hdcploadaes_err:
 			sizeof(struct hdcp_loadaesall))) {
 			return -EINVAL;
 		}
+		}
 		break;
 
 	case IOC_HDCP_AUTHENCR_REQ:
+		{
+		struct hdcp_authencr hdcp_authencr;
+		int result = HDMI_RESULT_NOT_OK;
+
+		u8 buf[AUTH_BUF_LEN];
+
 		if (copy_from_user(&hdcp_authencr, (void *)arg,
 				sizeof(struct hdcp_authencr)))
 			return -EINVAL;
 
 		/* Default not OK */
-		hdcp_authencr.result = HDMI_RESULT_NOT_OK;
+		hdcp_authencr.resp_size = 0;
 
-		if (hdcpchkaesotp(&value, &aes_status))
-			return -EINVAL;
+		if (hdcpchkaesotp(&value, &aes_status)) {
+			result = HDMI_AES_NOT_FUSED;
+			goto hdcp_authencr_end;
+		}
 
 		if (!aes_status) {
 			/* AES is not fused */
-			hdcp_authencr.result = HDMI_AES_NOT_FUSED;
-			break;
+			result = HDMI_AES_NOT_FUSED;
+			goto hdcp_authencr_end;
 		}
 
 		if (hdcpauthencr(hdcp_authencr.auth_type,
 				hdcp_authencr.encr_type,
 				&value,
-				hdcp_authencr.revoc_list))
-			return -EINVAL;
+				buf)) {
+			result = HDMI_RESULT_NOT_OK;
+			goto hdcp_authencr_end;
+		}
+
+		if (value > AUTH_BUF_LEN)
+			value = AUTH_BUF_LEN;
+
+		result = HDMI_RESULT_OK;
+		hdcp_authencr.resp_size = value;
+		memcpy(hdcp_authencr.resp, buf, value);
 
-		hdcp_authencr.result = HDMI_RESULT_OK;
+hdcp_authencr_end:
+		hdcp_authencr.result = result;
+		if (copy_to_user((void *)arg, (void *)&hdcp_authencr,
+			sizeof(struct hdcp_authencr)))
+			return -EINVAL;
+		}
 		break;
 
 	case IOC_HDCP_STATE_GET:
@@ -1937,11 +2033,15 @@ ioc_hdcploadaes_err:
 		break;
 
 	case IOC_AUDIO_CFG:
+		{
+		struct audio_cfg audio_cfg;
+
 		if (copy_from_user(&audio_cfg, (void *)arg,
 				sizeof(struct audio_cfg)))
 			return -EINVAL;
 
 		audiocfg(&audio_cfg);
+		}
 		break;
 
 	case IOC_PLUG_STATUS:
@@ -2004,6 +2104,9 @@ ioc_hdcploadaes_err:
 		break;
 
 	case IOC_HDMI_ONOFF:
+		{
+		union av8100_configuration config;
+
 		/* Get desired HDMI mode on or off */
 		if (copy_from_user(&value, (void *)arg, sizeof(u8)))
 			return -EFAULT;
@@ -2026,6 +2129,7 @@ ioc_hdcploadaes_err:
 			dev_err(hdmidev, "av8100_conf_w FAIL\n");
 			return -EINVAL;
 		}
+		}
 		break;
 
 	case IOC_HDMI_REGISTER_WRITE:
@@ -2067,6 +2171,8 @@ ioc_hdcploadaes_err:
 		break;
 
 	case IOC_HDMI_CONFIGURATION_WRITE:
+		{
+		struct hdmi_command_register command_reg;
 		if (copy_from_user(&command_reg, (void *)arg,
 				sizeof(struct hdmi_command_register)) != 0) {
 			dev_err(hdmidev, "IOC_HDMI_CONFIGURATION_WRITE "
@@ -2089,6 +2195,7 @@ ioc_hdcploadaes_err:
 			sizeof(struct hdmi_command_register)) != 0) {
 			return -EINVAL;
 		}
+		}
 		break;
 
 	default:
@@ -2098,16 +2205,6 @@ ioc_hdcploadaes_err:
 	return 0;
 }
 
-static long hdmi_unlocked_ioctl(struct file *file, unsigned int cmd, 
-							unsigned long arg)
-{
-	int ret;
-
-	ret = hdmi_ioctl(file, cmd, arg);
-
-	return ret;
-}
-
 static unsigned int
 hdmi_poll(struct file *filp, poll_table *wait)
 {
@@ -2131,7 +2228,7 @@ static const struct file_operations hdmi_fops = {
 	.owner =    THIS_MODULE,
 	.open =     hdmi_open,
 	.release =  hdmi_release,
-	.unlocked_ioctl = hdmi_unlocked_ioctl,
+	.unlocked_ioctl = hdmi_ioctl,
 	.poll = hdmi_poll
 };
 
@@ -2164,6 +2261,7 @@ void hdmi_event(enum av8100_hdmi_event ev)
 	case AV8100_HDMI_EVENT_HDMI_PLUGOUT:
 		events &= ~HDMI_EVENT_HDMI_PLUGIN;
 		events |= HDMI_EVENT_HDMI_PLUGOUT;
+		cec_tx_status(CEC_TX_SET_FREE);
 		break;
 
 	case AV8100_HDMI_EVENT_CEC:
@@ -2176,6 +2274,12 @@ void hdmi_event(enum av8100_hdmi_event ev)
 
 	case AV8100_HDMI_EVENT_CECTXERR:
 		events |= HDMI_EVENT_CECTXERR;
+		cec_tx_status(CEC_TX_SET_FREE);
+		break;
+
+	case AV8100_HDMI_EVENT_CECTX:
+		events |= HDMI_EVENT_CECTX;
+		cec_tx_status(CEC_TX_SET_FREE);
 		break;
 
 	default:
diff --git a/drivers/video/av8100/hdmi_loc.h b/drivers/video/av8100/hdmi_loc.h
index 5db30e7526b..063c1066334 100644
--- a/drivers/video/av8100/hdmi_loc.h
+++ b/drivers/video/av8100/hdmi_loc.h
@@ -13,7 +13,9 @@
 #define COMMAND_BUF_LEN	128
 #define AES_KEY_SIZE	16
 #define CRC32_SIZE	4
-#define AUTH_BUF_LEN	30
+#define AUTH_BUF_LEN	126
+#define CECTX_TRY	20
+#define CECTX_WAITTIME	25
 
 struct edid_data {
 	u8 buf_len;
@@ -55,6 +57,12 @@ struct hdmi_command_register {
 	unsigned char return_status;		/* output */
 };
 
+enum cec_tx_status_action {
+	CEC_TX_SET_FREE,
+	CEC_TX_SET_BUSY,
+	CEC_TX_CHECK
+};
+
 /* Internal */
 #define IOC_HDMI_ENABLE_INTERRUPTS	_IOWR(HDMI_IOC_MAGIC, 32, int)
 #define IOC_HDMI_DOWNLOAD_FW		_IOWR(HDMI_IOC_MAGIC, 33, int)
diff --git a/include/video/av8100.h b/include/video/av8100.h
index b0dc7b7f1cb..dcc9d51992f 100644
--- a/include/video/av8100.h
+++ b/include/video/av8100.h
@@ -404,6 +404,7 @@ enum av8100_hdmi_event {
 	AV8100_HDMI_EVENT_CEC =			0x4,
 	AV8100_HDMI_EVENT_HDCP =		0x8,
 	AV8100_HDMI_EVENT_CECTXERR =		0x10,
+	AV8100_HDMI_EVENT_CECTX =		0x20,	/* Transm no error */
 };
 
 struct av8100_status {
@@ -415,6 +416,7 @@ struct av8100_status {
 
 int av8100_init(void);
 void av8100_exit(void);
+int av8100_powerscan(void);
 int av8100_powerup(void);
 int av8100_powerdown(void);
 int av8100_disable_interrupt(void);
diff --git a/include/video/hdmi.h b/include/video/hdmi.h
index d2ef87f910a..4ade6140e5b 100644
--- a/include/video/hdmi.h
+++ b/include/video/hdmi.h
@@ -33,7 +33,7 @@
 #define HDMI_AES_KSVSIZE		5
 #define HDMI_AES_KEYSIZE		288
 #define HDMI_CRC32_SIZE			4
-#define HDMI_REVOC_LIST_SIZE		30
+#define HDMI_HDCPAUTHRESP_SIZE		126
 
 #define HDMI_STOREASTEXT_TEXT_SIZE	2
 #define HDMI_STOREASTEXT_BIN_SIZE	1
@@ -103,6 +103,7 @@ enum hdmi_event {
 	HDMI_EVENT_HDCP =		0x8,
 	HDMI_EVENT_CECTXERR =		0x10,
 	HDMI_EVENT_WAKEUP =		0x20,
+	HDMI_EVENT_CECTX =		0x40,
 };
 
 enum hdmi_hdcp_auth_type {
@@ -158,11 +159,37 @@ struct hdcp_loadaesall {
 	u8 result;
 };
 
+
+/* hdcp_authencr resp coding
+ *
+ * When encr_type is 2 (request revoc list), the response is given by
+ * resp_size is != 0 and resp containing the folllowing:
+ *
+ * u8[5]		Bksv from sink (not belonging to revocation list)
+ * u8			Device count
+ * Additional output if Nrofdevices > 0:
+ * u8[5 * Nrofdevices]	Bksv per connected equipment
+ * u8[20]			SHA signature
+ *
+ * Device count coding:
+ *	0 = a simple receiver is connected
+ *	0x80 = a repeater is connected without downstream equipment
+ *	0x81 = a repeater is connected with one downstream equipment
+ *	up to 0x94 = (0x80 + 0x14) a repeater is connected with downstream
+ *	equipment (thus up to 20 connected equipments)
+ *	1  = repeater without sink equipment connected
+ *	>1 = number of connected equipment on the repeater
+ * Nrofdevices = Device count & 0x7F (max 20)
+ *
+ * Max resp_size is 5 + 1 + 5 * 20 + 20 = 126 bytes
+ *
+ */
 struct hdcp_authencr {
 	u8 auth_type;
 	u8 encr_type;
 	u8 result;
-	u8 revoc_list[HDMI_REVOC_LIST_SIZE];
+	u8 resp_size;
+	u8 resp[HDMI_HDCPAUTHRESP_SIZE];
 };
 
 struct audio_cfg {
-- 
cgit v1.2.3


From e0f79b47fc1ef476d78d83172c7d3fca9a84c20c Mon Sep 17 00:00:00 2001
From: Marcel Tunnissen <Marcel.Tuennissen@stericsson.com>
Date: Tue, 14 Jun 2011 10:22:34 +0200
Subject: mcde: mach-ux500: Migrate the patches for kernel3.0

Migrate following patches for Kernel3.0

video: av8100: move GPIO pin setup to driver
arm: u8500: Correct build error
video: mcde: remove unused GPIO pin setup

ST-Ericsson ID: 352334
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: NA

Signed-off-by: Rajagopala V <rajagopala.v@stericsson.com>
Change-Id: I34cef77b3fdcc1a21eb1f457ee4a829d885a8130
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/29591
---
 arch/arm/mach-ux500/board-mop500-mcde.c | 113 ++++++++++++++++++++++++--------
 1 file changed, 87 insertions(+), 26 deletions(-)

diff --git a/arch/arm/mach-ux500/board-mop500-mcde.c b/arch/arm/mach-ux500/board-mop500-mcde.c
index 85e486f4732..df9b2cbe79a 100644
--- a/arch/arm/mach-ux500/board-mop500-mcde.c
+++ b/arch/arm/mach-ux500/board-mop500-mcde.c
@@ -129,7 +129,7 @@ static struct mcde_port port0 = {
 static struct mcde_display_generic_platform_data generic_display0_pdata = {
 	.reset_delay = 1,
 #ifdef CONFIG_REGULATOR
-	.regulator_id = "vaux12v5",
+	.regulator_id = "v-display",
 	.min_supply_voltage = 2500000, /* 2.5V */
 	.max_supply_voltage = 2700000 /* 2.7V */
 #endif
@@ -326,7 +326,7 @@ static int ab8500_platform_enable(struct mcde_display_device *ddev)
 			return -EINVAL;
 	}
 
-	dev_info(&ddev->dev, "%s\n", __func__);
+	dev_dbg(&ddev->dev, "%s\n", __func__);
 	res = ux500_pins_enable(tvout_pins);
 	if (res != 0)
 		goto failed;
@@ -342,7 +342,7 @@ static int ab8500_platform_disable(struct mcde_display_device *ddev)
 {
 	int res;
 
-	dev_info(&ddev->dev, "%s\n", __func__);
+	dev_dbg(&ddev->dev, "%s\n", __func__);
 
 	res = ux500_pins_disable(tvout_pins);
 	if (res != 0)
@@ -419,6 +419,47 @@ static struct mcde_display_hdmi_platform_data av8100_hdmi_pdata = {
 	.rgb_2_yCbCr_transform = &rgb_2_yCbCr_transform,
 };
 
+static struct ux500_pins *av8100_pins;
+static int av8100_platform_enable(struct mcde_display_device *ddev)
+{
+	int res;
+
+	dev_dbg(&ddev->dev, "%s\n", __func__);
+	if (!av8100_pins) {
+		av8100_pins = ux500_pins_get("av8100-hdmi");
+		if (!av8100_pins) {
+			res = -EINVAL;
+			goto failed;
+		}
+	}
+
+	res = ux500_pins_enable(av8100_pins);
+	if (res != 0)
+		goto failed;
+
+	return res;
+
+failed:
+	dev_warn(&ddev->dev, "Failure during %s\n", __func__);
+	return res;
+}
+
+static int av8100_platform_disable(struct mcde_display_device *ddev)
+{
+	int res;
+
+	dev_dbg(&ddev->dev, "%s\n", __func__);
+
+	res = ux500_pins_disable(av8100_pins);
+	if (res != 0)
+		goto failed;
+	return res;
+
+failed:
+	dev_warn(&ddev->dev, "Failure during %s\n", __func__);
+	return res;
+}
+
 struct mcde_display_device av8100_hdmi = {
 	.name = "av8100_hdmi",
 	.id = AV8100_DISPLAY_ID,
@@ -431,8 +472,8 @@ struct mcde_display_device av8100_hdmi = {
 	.dev = {
 		.platform_data = &av8100_hdmi_pdata,
 	},
-	.platform_enable = NULL,
-	.platform_disable = NULL,
+	.platform_enable = av8100_platform_enable,
+	.platform_disable = av8100_platform_disable,
 };
 
 static void delayed_work_dispreg_hdmi(struct work_struct *ptr)
@@ -453,6 +494,9 @@ static int display_postregistered_callback(struct notifier_block *nb,
 	u16 virtual_width, virtual_height;
 	u32 rotate = FB_ROTATE_UR;
 	struct fb_info *fbi;
+#ifdef CONFIG_DISPDEV
+	struct mcde_fb *mfb;
+#endif
 
 	if (event != MCDE_DSS_EVENT_DISPLAY_REGISTERED)
 		return 0;
@@ -498,33 +542,50 @@ static int display_postregistered_callback(struct notifier_block *nb,
 		virtual_height = height;
 #endif
 
-#ifdef CONFIG_DISPLAY_AV8100_TRIPPLE_BUFFER
-	if (ddev->id == AV8100_DISPLAY_ID)
-		virtual_height = height * 3;
-#endif
-
+#ifdef CONFIG_DISPLAY_AV8100_TERTIARY
 	if (ddev->id == AV8100_DISPLAY_ID) {
 #ifdef CONFIG_MCDE_DISPLAY_HDMI_FB_AUTO_CREATE
 		hdmi_fb_onoff(ddev, 1, 0, 0);
-#endif /* CONFIG_MCDE_DISPLAY_HDMI_FB_AUTO_CREATE */
+#endif
+		goto display_postregistered_callback_end;
+	}
+#endif /* CONFIG_DISPLAY_AV8100_TERTIARY */
+
+	/* Create frame buffer */
+	fbi = mcde_fb_create(ddev,
+		width, height,
+		virtual_width, virtual_height,
+		ddev->default_pixel_format,
+		rotate);
+
+	if (IS_ERR(fbi)) {
+		dev_warn(&ddev->dev,
+			"Failed to create fb for display %s\n",
+					ddev->name);
+		goto display_postregistered_callback_err;
+	} else {
+		dev_info(&ddev->dev, "Framebuffer created (%s)\n",
+					ddev->name);
+	}
+
+#ifdef CONFIG_DISPDEV
+	mfb = to_mcde_fb(fbi);
+
+	/* Create a dispdev overlay for this display */
+	if (dispdev_create(ddev, true, mfb->ovlys[0]) < 0) {
+		dev_warn(&ddev->dev,
+			"Failed to create disp for display %s\n",
+					ddev->name);
+		goto display_postregistered_callback_err;
 	} else {
-		/* Create frame buffer */
-		fbi = mcde_fb_create(ddev,
-			width, height,
-			virtual_width, virtual_height,
-			ddev->default_pixel_format,
-			rotate);
-
-		if (IS_ERR(fbi)) {
-			dev_warn(&ddev->dev,
-				"Failed to create fb for display %s\n",
-						ddev->name);
-			goto display_postregistered_callback_err;
-		} else
-			dev_info(&ddev->dev, "Framebuffer created (%s)\n",
-						ddev->name);
+		dev_info(&ddev->dev, "Disp dev created for (%s)\n",
+					ddev->name);
 	}
+#endif
 
+#ifdef CONFIG_DISPLAY_AV8100_TERTIARY
+display_postregistered_callback_end:
+#endif
 	return 0;
 
 display_postregistered_callback_err:
-- 
cgit v1.2.3


From 73eaee5472b04de11fec019f65bcf6fcea53d142 Mon Sep 17 00:00:00 2001
From: xvatnag <vathsala.nagaraju@stericsson.com>
Date: Thu, 18 Aug 2011 19:18:44 +0530
Subject: video: mcde: Add sony display support for DB5500

This patch supports sony ACX424AKP-7 display for DB5500.

ST-Ericsson ID: 279760
ST-Ericsson Linux next: Not tested, ER 282779
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: If50c59ac409cb999fc74d1bf287418fe19eead2b
Signed-off-by: xvatnag <vathsala.nagaraju@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/29048
Reviewed-by: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/29640
Reviewed-by: Rajagopala VENKATARAVANAPPA X <rajagopala.v@stericsson.com>
Tested-by: Rajagopala VENKATARAVANAPPA X <rajagopala.v@stericsson.com>
---
 arch/arm/mach-ux500/Kconfig-arch       |   6 +
 arch/arm/mach-ux500/board-u5500-mcde.c | 200 +++++++++++++++++++++++++++++++--
 2 files changed, 195 insertions(+), 11 deletions(-)

diff --git a/arch/arm/mach-ux500/Kconfig-arch b/arch/arm/mach-ux500/Kconfig-arch
index 7f7a52de9eb..55e5d4f6b30 100644
--- a/arch/arm/mach-ux500/Kconfig-arch
+++ b/arch/arm/mach-ux500/Kconfig-arch
@@ -103,6 +103,12 @@ config DISPLAY_GENERIC_DSI_PRIMARY_AUTO_SYNC
 	help
 	  Say yes to enable auto sync for primary display
 
+config DISPLAY_SONY_ACX424AKP_DSI_PRIMARY
+	bool "Sony acx424akp DSI display"
+	select MCDE_DISPLAY_SONY_ACX424AKP_DSI
+	help
+	  Say yes here when using a sony acx424akp DSI display
+
 config SONY_SY35560_ENABLE_ESD_CHECK
 	bool "Enable esd status check for primary display"
 	depends on DISPLAY_SONY_SY35560_DSI_PRIMARY
diff --git a/arch/arm/mach-ux500/board-u5500-mcde.c b/arch/arm/mach-ux500/board-u5500-mcde.c
index 535f3d41bba..7bae2bc1bd7 100644
--- a/arch/arm/mach-ux500/board-u5500-mcde.c
+++ b/arch/arm/mach-ux500/board-u5500-mcde.c
@@ -14,6 +14,7 @@
 #include <asm/mach-types.h>
 #include <video/mcde_display.h>
 #include <video/mcde_display-generic_dsi.h>
+#include <video/mcde_display-sony_acx424akp_dsi.h>
 #include <video/mcde_display-av8100.h>
 #include <video/mcde_fb.h>
 #include <video/mcde_dss.h>
@@ -22,7 +23,8 @@
 #define DSI_UNIT_INTERVAL_2	0x5
 
 enum {
-#ifdef CONFIG_DISPLAY_GENERIC_DSI_PRIMARY
+#if defined(CONFIG_DISPLAY_GENERIC_DSI_PRIMARY) || \
+		defined(CONFIG_DISPLAY_SONY_ACX424AKP_DSI_PRIMARY)
 	PRIMARY_DISPLAY_ID,
 #endif
 #ifdef CONFIG_DISPLAY_AV8100_TERTIARY
@@ -138,6 +140,73 @@ struct mcde_display_device u5500_generic_display0 = {
 };
 #endif /* CONFIG_DISPLAY_GENERIC_DSI_PRIMARY */
 
+#ifdef CONFIG_DISPLAY_SONY_ACX424AKP_DSI_PRIMARY
+static struct mcde_port port1 = {
+	.type = MCDE_PORTTYPE_DSI,
+	.mode = MCDE_PORTMODE_CMD,
+	.pixel_format = MCDE_PORTPIXFMT_DSI_24BPP,
+	.ifc = DSI_VIDEO_MODE,
+	.link = 0,
+#if defined(CONFIG_DISPLAY_SONY_ACX424AKP_DSI_PRIMARY) &&      \
+		defined(CONFIG_DISPLAY_GENERIC_DSI_PRIMARY_AUTO_SYNC)
+	.sync_src = MCDE_SYNCSRC_OFF,
+	.update_auto_trig = true,
+#else
+	.sync_src = MCDE_SYNCSRC_BTA,
+	.update_auto_trig = false,
+#endif
+	.phy = {
+		.dsi = {
+			.virt_id = 0,
+			.num_data_lanes = 2,
+			.ui = DSI_UNIT_INTERVAL_0,
+			.clk_cont = false,
+			.data_lanes_swap = false,
+		},
+	},
+};
+
+struct mcde_display_sony_acx424akp_platform_data \
+			sony_acx424akp_display0_pdata = {
+	.reset_gpio = 226,
+	.reset_high = true,
+	.reset_delay = 11,
+	.reset_low_delay = 1,
+	.sleep_out_delay = 140,
+#ifdef CONFIG_REGULATOR
+	.regulator_id = "v-display",
+	.min_supply_voltage = 2800000, /* 2.8V */
+	.max_supply_voltage = 2800000 /* 2.8V */
+#endif
+};
+
+struct mcde_display_device sony_acx424akp_display0 = {
+	.name = "mcde_disp_sony_acx424akp",
+	.id = PRIMARY_DISPLAY_ID,
+	.port = &port1,
+	.chnl_id = MCDE_CHNL_A,
+	.fifo = MCDE_FIFO_A,
+#ifdef CONFIG_MCDE_DISPLAY_PRIMARY_16BPP
+	.default_pixel_format = MCDE_OVLYPIXFMT_RGB565,
+#else
+	.default_pixel_format = MCDE_OVLYPIXFMT_RGBA8888,
+#endif
+	.native_x_res = 480,
+	.native_y_res = 854,
+#ifdef CONFIG_DISPLAY_GENERIC_DSI_PRIMARY_VSYNC
+	.synchronized_update = true,
+#else
+	.synchronized_update = false,
+#endif
+	/* TODO: Remove rotation buffers once ESRAM driver is completed */
+	.rotbuf1 = U5500_ESRAM_BASE + 0x20000 * 2,
+	.rotbuf2 = U5500_ESRAM_BASE + 0x20000 * 2 + 0x10000,
+	.dev = {
+		.platform_data = &sony_acx424akp_display0_pdata,
+	},
+};
+#endif /* CONFIG_DISPLAY_SONY_ACX424AKP_DSI_PRIMARY */
+
 #ifdef CONFIG_DISPLAY_AV8100_TERTIARY
 static struct mcde_port port2 = {
 	.type = MCDE_PORTTYPE_DSI,
@@ -213,8 +282,12 @@ static int display_postregistered_callback(struct notifier_block *nb,
 	u16 width, height;
 	u16 virtual_width, virtual_height;
 	u32 rotate = FB_ROTATE_UR;
+	u32 rotate_angle = 0;
 	struct fb_info *fbi;
 
+	struct mcde_display_sony_acx424akp_platform_data *pdata =
+					ddev->dev.platform_data;
+
 	if (event != MCDE_DSS_EVENT_DISPLAY_REGISTERED)
 		return 0;
 
@@ -223,9 +296,16 @@ static int display_postregistered_callback(struct notifier_block *nb,
 
 	mcde_dss_get_native_resolution(ddev, &width, &height);
 
-#ifdef CONFIG_DISPLAY_GENERIC_DSI_PRIMARY
+	if (pdata->disp_panel == DISPLAY_SONY_ACX424AKP)
+		rotate_angle = 0;
+	else
+		rotate_angle = \
+			CONFIG_DISPLAY_GENERIC_DSI_PRIMARY_ROTATION_ANGLE;
+
+#if defined(CONFIG_DISPLAY_GENERIC_DSI_PRIMARY) || \
+		defined(CONFIG_DISPLAY_SONY_ACX424AKP_DSI_PRIMARY)
 	if (ddev->id == PRIMARY_DISPLAY_ID) {
-		switch (CONFIG_DISPLAY_GENERIC_DSI_PRIMARY_ROTATION_ANGLE) {
+		switch (rotate_angle) {
 		case 0:
 			rotate = FB_ROTATE_UR;
 			break;
@@ -247,7 +327,8 @@ static int display_postregistered_callback(struct notifier_block *nb,
 	virtual_width = width;
 	virtual_height = height * 2;
 
-#if defined(CONFIG_DISPLAY_GENERIC_DSI_PRIMARY) &&	\
+#if (defined(CONFIG_DISPLAY_GENERIC_DSI_PRIMARY) || \
+		defined(CONFIG_DISPLAY_SONY_ACX424AKP_DSI_PRIMARY)) &&	\
 			defined(CONFIG_DISPLAY_GENERIC_DSI_PRIMARY_AUTO_SYNC)
 	if (ddev->id == PRIMARY_DISPLAY_ID)
 		virtual_height = height;
@@ -298,8 +379,9 @@ static struct notifier_block display_nb = {
 * The main display will not be updated if startup graphics is displayed
 * from u-boot.
 */
-#if defined(CONFIG_DISPLAY_GENERIC_DSI_PRIMARY) &&	\
-			defined(CONFIG_DISPLAY_GENERIC_DSI_PRIMARY_AUTO_SYNC)
+#if (defined(CONFIG_DISPLAY_GENERIC_DSI_PRIMARY) || \
+		defined(CONFIG_DISPLAY_SONY_ACX424AKP_DSI_PRIMARY))  && \
+		defined(CONFIG_DISPLAY_GENERIC_DSI_PRIMARY_AUTO_SYNC)
 static int framebuffer_postregistered_callback(struct notifier_block *nb,
 	unsigned long event, void *data)
 {
@@ -402,11 +484,26 @@ int __init init_display_devices_u5500(void)
 		pr_warning("Failed to register dss notifier\n");
 
 #ifdef CONFIG_DISPLAY_GENERIC_PRIMARY
-	if (display_initialized_during_boot)
-		u5500_generic_display0.power_mode = MCDE_DISPLAY_PM_STANDBY;
-	ret = mcde_display_device_register(&u5500_generic_display0);
-	if (ret)
-		pr_warning("Failed to register generic display device 0\n");
+	if (cpu_is_u5500v1()) {
+		if (display_initialized_during_boot)
+			generic_display0.power_mode = MCDE_DISPLAY_PM_STANDBY;
+		ret = mcde_display_device_register(&generic_display0);
+		if (ret)
+			pr_warning("Failed to register generic \
+							display device 0\n");
+	}
+#endif
+
+#ifdef CONFIG_DISPLAY_SONY_ACX424AKP_DSI_PRIMARY
+	if (cpu_is_u5500v2()) {
+		if (display_initialized_during_boot)
+			sony_acx424akp_display0.power_mode = \
+						 MCDE_DISPLAY_PM_STANDBY;
+		ret = mcde_display_device_register(&sony_acx424akp_display0);
+		if (ret)
+			pr_warning("Failed to register sony acx424akp \
+							display device 0\n");
+	}
 #endif
 
 #ifdef CONFIG_DISPLAY_AV8100_TERTIARY
@@ -420,5 +517,86 @@ int __init init_display_devices_u5500(void)
 	return ret;
 }
 
+struct mcde_display_device *mcde_get_main_display(void)
+{
+#if defined(CONFIG_DISPLAY_GENERIC_DSI_PRIMARY) || \
+		defined(CONFIG_DISPLAY_SONY_ACX424AKP_DSI_PRIMARY)
+	if (cpu_is_u5500v1())
+		return &generic_display0;
+	if (cpu_is_u5500v2())
+		return &sony_acx424akp_display0;
+#elif defined(CONFIG_DISPLAY_AV8100_TERTIARY)
+	return &av8100_hdmi;
+#else
+	return NULL;
+#endif
+}
+EXPORT_SYMBOL(mcde_get_main_display);
+
+void hdmi_fb_onoff(struct mcde_display_device *ddev,
+		bool enable, u8 cea, u8 vesa_cea_nr)
+{
+	u16 w, h;
+	u16 vw, vh;
+	u32 rotate = FB_ROTATE_UR;
+	struct display_driver_data *driver_data = dev_get_drvdata(&ddev->dev);
+
+	dev_dbg(&ddev->dev, "%s\n", __func__);
+	dev_dbg(&ddev->dev, "en:%d cea:%d nr:%d\n", enable, cea, vesa_cea_nr);
+
+	if (enable) {
+		struct fb_info *fbi;
+		if (ddev->enabled) {
+			dev_dbg(&ddev->dev, "Display is already enabled.\n");
+			return;
+		}
+
+		/* Create fb */
+		if (ddev->fbi == NULL) {
+#ifdef CONFIG_DISPLAY_AV8100_TRIPPLE_BUFFER
+			int buffering = 3;
+#else
+			int buffering = 2;
+#endif
+
+			/* Get default values */
+			mcde_dss_get_native_resolution(ddev, &w, &h);
+			vw = w;
+			vh = h * buffering;
+
+			if (vesa_cea_nr != 0)
+				ddev->ceanr_convert(ddev, cea, vesa_cea_nr,
+						buffering, &w, &h, &vw, &vh);
+
+			fbi = mcde_fb_create(ddev, w, h, vw, vh,
+				ddev->default_pixel_format, rotate);
+
+			if (IS_ERR(fbi)) {
+				dev_warn(&ddev->dev,
+					"Failed to create fb for display %s\n",
+							ddev->name);
+				goto hdmi_fb_onoff_end;
+			} else {
+				dev_info(&ddev->dev,
+					"Framebuffer created (%s)\n",
+							ddev->name);
+			}
+			driver_data->fbdevname = (char *)dev_name(fbi->dev);
+		}
+	} else {
+		if (!ddev->enabled) {
+			dev_dbg(&ddev->dev, "Display %s is already disabled.\n",
+					ddev->name);
+			return;
+		}
+
+		mcde_fb_destroy(ddev);
+	}
+
+hdmi_fb_onoff_end:
+	return;
+}
+EXPORT_SYMBOL(hdmi_fb_onoff);
+
 module_init(init_display_devices_u5500);
 #endif
-- 
cgit v1.2.3


From 25c91457d0acb097a672ded0418a97fb75884c75 Mon Sep 17 00:00:00 2001
From: xvatnag <vathsala.nagaraju@stericsson.com>
Date: Wed, 24 Aug 2011 16:17:54 +0530
Subject: video: HDMI: HDMI support for v2 board for DB5500

HDMI formId changed from 2 to 1 for CTRLB register

ST-Ericsson ID: 355893
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I32759a5f3733134732a520847b046d15f27ca0e3
Signed-off-by: xvatnag <vathsala.nagaraju@stericsson.com>
Signed-off-by: xjosevp <joseph.vp@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/29381
Reviewed-by: QATOOLS
Reviewed-by: QABUILD
Reviewed-by: Nils CALMSUND <nils.calmsund@stericsson.com>
Reviewed-by: QATEST
Reviewed-by: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/29641
Reviewed-by: Rajagopala VENKATARAVANAPPA X <rajagopala.v@stericsson.com>
Tested-by: Rajagopala VENKATARAVANAPPA X <rajagopala.v@stericsson.com>
---
 arch/arm/mach-ux500/board-u5500-mcde.c |  7 +-----
 drivers/video/mcde/mcde_hw.c           | 44 +++++++++++++++++++++-------------
 2 files changed, 28 insertions(+), 23 deletions(-)

diff --git a/arch/arm/mach-ux500/board-u5500-mcde.c b/arch/arm/mach-ux500/board-u5500-mcde.c
index 7bae2bc1bd7..c74c4995d48 100644
--- a/arch/arm/mach-ux500/board-u5500-mcde.c
+++ b/arch/arm/mach-ux500/board-u5500-mcde.c
@@ -239,12 +239,7 @@ static struct mcde_port port2 = {
 	.hdmi_sdtv_switch = HDMI_SWITCH,
 };
 
-static struct mcde_display_hdmi_platform_data av8100_hdmi_pdata = {
-	.reset_gpio = 0,
-	.reset_delay = 1,
-	.regulator_id = NULL,
-	.cvbs_regulator_id = "v-av8100-AV-switch",
-	.ddb_id = 1,
+struct mcde_display_hdmi_platform_data av8100_hdmi_pdata = {
 	.rgb_2_yCbCr_transform = &rgb_2_yCbCr_transform,
 };
 
diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index 4653f148b7f..8cf48ecad4b 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -866,18 +866,25 @@ static u32 get_output_fifo_size(enum mcde_fifo fifo)
 
 static u8 get_dsi_formid(const struct mcde_port *port)
 {
-	if (port->ifc == DSI_VIDEO_MODE && port->link == 0)
-		return MCDE_CTRLA_FORMID_DSI0VID;
-	else if (port->ifc == DSI_VIDEO_MODE && port->link == 1)
-		return MCDE_CTRLA_FORMID_DSI1VID;
-	else if (port->ifc == DSI_VIDEO_MODE && port->link == 2)
-		return MCDE_CTRLA_FORMID_DSI2VID;
-	else if (port->ifc == DSI_CMD_MODE && port->link == 0)
-		return MCDE_CTRLA_FORMID_DSI0CMD;
-	else if (port->ifc == DSI_CMD_MODE && port->link == 1)
-		return MCDE_CTRLA_FORMID_DSI1CMD;
-	else if (port->ifc == DSI_CMD_MODE && port->link == 2)
-		return MCDE_CTRLA_FORMID_DSI2CMD;
+	if (hardware_version == MCDE_CHIP_VERSION_4_0_4) {
+		if (port->link == 0)
+			return MCDE_CTRLA_FORMID_DSI0VID;
+		if (port->link == 1)
+			return MCDE_CTRLA_FORMID_DSI0CMD;
+	} else {
+		if (port->ifc == DSI_VIDEO_MODE && port->link == 0)
+			return MCDE_CTRLA_FORMID_DSI0VID;
+		else if (port->ifc == DSI_VIDEO_MODE && port->link == 1)
+			return MCDE_CTRLA_FORMID_DSI1VID;
+		else if (port->ifc == DSI_VIDEO_MODE && port->link == 2)
+			return MCDE_CTRLA_FORMID_DSI2VID;
+		else if (port->ifc == DSI_CMD_MODE && port->link == 0)
+			return MCDE_CTRLA_FORMID_DSI0CMD;
+		else if (port->ifc == DSI_CMD_MODE && port->link == 1)
+			return MCDE_CTRLA_FORMID_DSI1CMD;
+		else if (port->ifc == DSI_CMD_MODE && port->link == 2)
+			return MCDE_CTRLA_FORMID_DSI2CMD;
+	}
 	return 0;
 }
 
@@ -1283,8 +1290,9 @@ static int update_channel_static_registers(struct mcde_chnl_state *chnl)
 			}
 		}
 
-		if (hardware_version == MCDE_CHIP_VERSION_1_0_4)
-			idx = chnl->id;
+		if (hardware_version == MCDE_CHIP_VERSION_1_0_4 ||
+		    hardware_version == MCDE_CHIP_VERSION_4_0_4)
+			idx = port->link;
 		else
 			idx = 2 * port->link + port->ifc;
 
@@ -1994,8 +2002,9 @@ void update_channel_registers(enum mcde_chnl chnl_id, struct chnl_regs *regs,
 		u32 dsi_delay0 = 0;
 		u32 screen_ppl, screen_lpf;
 
-		if (hardware_version == MCDE_CHIP_VERSION_1_0_4)
-			fidx = chnl_id;
+		if (hardware_version == MCDE_CHIP_VERSION_1_0_4 ||
+		    hardware_version == MCDE_CHIP_VERSION_4_0_4)
+			fidx = port->link;
 		else
 			fidx = 2 * port->link + port->ifc;
 
@@ -3542,7 +3551,8 @@ static int __devinit mcde_probe(struct platform_device *pdev)
 	for (i = 0; i < num_overlays; i++)
 		overlays[i].idx = i;
 
-	if (hardware_version == MCDE_CHIP_VERSION_1_0_4) {
+	if (hardware_version == MCDE_CHIP_VERSION_1_0_4 ||
+	    hardware_version == MCDE_CHIP_VERSION_4_0_4) {
 		channels[0].ovly0 = &overlays[0];
 		channels[0].ovly1 = &overlays[1];
 		channels[1].ovly0 = &overlays[2];
-- 
cgit v1.2.3


From 904f74b08521a0c993b4408ae92ce1311ca9f486 Mon Sep 17 00:00:00 2001
From: Philippe Langlais <philippe.langlais@stericsson.com>
Date: Thu, 20 Oct 2011 09:57:12 +0200
Subject: misc: dispdev: Migrate to kernel 3.0

Following dispdev driver patches are migrate to kernel3.0
1e0deae misc: dispdev: Send config with a queued buffer
7d17183 [ANDROID] misc: dispdev: Release mutex in dequeue
121d315 [ANDROID] misc:dispdev: Update queue_buffer
ba5bc5e [ANDROID] misc: dispdev: Disable UI overlay
24ab123 [ANDROID]misc:dispdev: Fix garbage during rotation
751c5a1 [ANDROID] misc: dispdev: Update whole screen
530a12e [ANDROID] misc: dispdev: Only update x,y to MCDE
02e9402 video: mcde: Add tripple buffer support
6044b9d video: mcde_hdmi: Support for HDMI user space service
506b8ac misc : dispdev: Allow changing configuration on the fly.
bd93261 HWMEM: Update API
4e635a4 [ANDROID] misc: dispdev: Add dispdev driver

ST-Ericsson ID: 352334
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: NA

Signed-off-by: Naveen Kumar Gaddipati <naveen.gaddipati@stericsson.com>
Change-Id: I0f06ed83618f18f8f1ddf8c72f485900459960b9
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/29654
Reviewed-by: Rajagopala VENKATARAVANAPPA X <rajagopala.v@stericsson.com>
Tested-by: Rajagopala VENKATARAVANAPPA X <rajagopala.v@stericsson.com>
---
 drivers/misc/dispdev/Makefile  |   1 +
 drivers/misc/dispdev/dispdev.c | 657 +++++++++++++++++++++++++++++++++++++++++
 include/linux/dispdev.h        |  66 +++++
 3 files changed, 724 insertions(+)
 create mode 100644 drivers/misc/dispdev/Makefile
 create mode 100644 drivers/misc/dispdev/dispdev.c
 create mode 100644 include/linux/dispdev.h

diff --git a/drivers/misc/dispdev/Makefile b/drivers/misc/dispdev/Makefile
new file mode 100644
index 00000000000..11dc7611d26
--- /dev/null
+++ b/drivers/misc/dispdev/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_DISPDEV) += dispdev.o
diff --git a/drivers/misc/dispdev/dispdev.c b/drivers/misc/dispdev/dispdev.c
new file mode 100644
index 00000000000..00fab078fc3
--- /dev/null
+++ b/drivers/misc/dispdev/dispdev.c
@@ -0,0 +1,657 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2011
+ *
+ * Display output device driver
+ *
+ * Author: Marcus Lorentzon <marcus.xm.lorentzon@stericsson.com>
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+
+#include <linux/kernel.h>
+#include <linux/fs.h>
+#include <linux/idr.h>
+#include <linux/err.h>
+#include <linux/slab.h>
+#include <linux/miscdevice.h>
+#include <linux/uaccess.h>
+#include <linux/list.h>
+#include <linux/mutex.h>
+#include <linux/wait.h>
+#include <linux/sched.h>
+#include <linux/ioctl.h>
+
+#include <linux/dispdev.h>
+#include <linux/hwmem.h>
+#include <video/mcde_dss.h>
+
+#define DENSITY_CHECK (16)
+#define MAX_BUFFERS 4
+
+static LIST_HEAD(dev_list);
+static DEFINE_MUTEX(dev_list_lock);
+
+enum buffer_state {
+	BUF_UNUSED = 0,
+	BUF_QUEUED,
+	BUF_ACTIVATED,
+/*TODO:waitfordone	BUF_DEACTIVATED,*/
+	BUF_FREE,
+	BUF_DEQUEUED,
+};
+
+struct dispdev_buffer {
+	struct hwmem_alloc *alloc;
+	u32 size;
+	enum buffer_state state;
+	u32 paddr; /* if pinned */
+};
+
+struct dispdev {
+	bool open;
+	struct mutex lock;
+	struct miscdevice mdev;
+	struct list_head list;
+	struct mcde_display_device *ddev;
+	struct mcde_overlay *ovly;
+	struct mcde_overlay *parent_ovly;
+	struct dispdev_config config;
+	bool overlay;
+	struct dispdev_buffer buffers[MAX_BUFFERS];
+	wait_queue_head_t waitq_dq;
+	/*
+	 * For the rotation use case
+	 * buffers_need_update is used to ensure that a set_config that
+	 * changes width or height is followed by a unregister_buffer.
+	 */
+	bool buffers_need_update;
+	/*
+	 * For the overlay startup use case.
+	 * first_update is used to handle the first update after a set_config.
+	 * In this case a queue_buffer will arrive after set_config and not a
+	 * unregister_buffer as in the rotation use case.
+	 */
+	bool first_update;
+};
+
+static int find_buf(struct dispdev *dd, enum buffer_state state)
+{
+	int i;
+	for (i = 0; i < MAX_BUFFERS; i++)
+		if (dd->buffers[i].state == state)
+			return i;
+	return -1;
+}
+
+int dispdev_open(struct inode *inode, struct file *file)
+{
+	int ret;
+	struct dispdev *dd = NULL;
+
+	mutex_lock(&dev_list_lock);
+	list_for_each_entry(dd, &dev_list, list)
+		if (dd->mdev.minor == iminor(inode))
+			break;
+
+	if (&dd->list == &dev_list) {
+		mutex_unlock(&dev_list_lock);
+		return -ENODEV;
+	}
+
+	if (dd->open) {
+		mutex_unlock(&dev_list_lock);
+		return -EBUSY;
+	}
+
+	dd->open = true;
+
+	mutex_unlock(&dev_list_lock);
+
+	ret = mcde_dss_enable_overlay(dd->ovly);
+	if (ret)
+		return ret;
+
+	file->private_data = dd;
+
+	return 0;
+}
+
+int dispdev_release(struct inode *inode, struct file *file)
+{
+	int i;
+	struct dispdev *dd = NULL;
+
+	mutex_lock(&dev_list_lock);
+	list_for_each_entry(dd, &dev_list, list)
+		if (dd->mdev.minor == iminor(inode))
+			break;
+	mutex_unlock(&dev_list_lock);
+
+	if (&dd->list == &dev_list)
+		return -ENODEV;
+
+	/* TODO: Make sure it waits for completion */
+	mcde_dss_disable_overlay(dd->ovly);
+	for (i = 0; i < MAX_BUFFERS; i++) {
+		if (dd->buffers[i].paddr)
+			hwmem_unpin(dd->buffers[i].alloc);
+		if (dd->buffers[i].alloc)
+			hwmem_release(dd->buffers[i].alloc);
+		dd->buffers[i].alloc = NULL;
+		dd->buffers[i].state = BUF_UNUSED;
+		dd->buffers[i].size = 0;
+		dd->buffers[i].paddr = 0;
+	}
+	dd->open = false;
+	wake_up(&dd->waitq_dq);
+	return 0;
+}
+
+static enum mcde_ovly_pix_fmt get_ovly_fmt(enum dispdev_fmt fmt)
+{
+	switch (fmt) {
+	default:
+	case DISPDEV_FMT_RGB565:
+		return MCDE_OVLYPIXFMT_RGB565;
+	case DISPDEV_FMT_RGB888:
+		return MCDE_OVLYPIXFMT_RGB888;
+	case DISPDEV_FMT_RGBA8888:
+		return MCDE_OVLYPIXFMT_RGBA8888;
+	case DISPDEV_FMT_RGBX8888:
+		return MCDE_OVLYPIXFMT_RGBX8888;
+	case DISPDEV_FMT_YUV422:
+		return MCDE_OVLYPIXFMT_YCbCr422;
+	}
+}
+
+static void get_ovly_info(struct dispdev_config *cfg,
+				struct mcde_video_mode *vmode,
+				struct mcde_overlay_info *info, bool overlay)
+{
+	info->paddr = 0;
+	info->stride = cfg->stride;
+	info->fmt = get_ovly_fmt(cfg->format);
+	info->src_x = 0;
+	info->src_y = 0;
+	info->dst_x = cfg->x;
+	info->dst_y = cfg->y;
+	info->dst_z = cfg->z;
+	info->w = cfg->width;
+	info->h = cfg->height;
+	info->dirty.x = 0;
+	info->dirty.y = 0;
+	info->dirty.w = vmode->xres;
+	info->dirty.h = vmode->yres;
+}
+
+static int dispdev_set_config(struct dispdev *dd, struct dispdev_config *cfg)
+{
+	int ret = 0;
+	if (memcmp(&dd->config, cfg, sizeof(struct dispdev_config)) == 0)
+		return 0;
+
+	/*
+	 * Only update MCDE if format, stride, width and height
+	 * is the same. Otherwise just store the new config and update
+	 * MCDE in the next queue buffer. This because the buffer that is
+	 * active can be have the wrong format, width ...
+	 */
+	if (cfg->format == dd->config.format &&
+			cfg->stride == dd->config.stride &&
+			cfg->width == dd->config.width &&
+			cfg->height == dd->config.height) {
+
+		int buf_index;
+		if (!dd->buffers_need_update) {
+			buf_index = find_buf(dd, BUF_ACTIVATED);
+			if (buf_index >= 0) {
+				struct mcde_overlay_info info;
+				struct dispdev_buffer *buf;
+				struct mcde_video_mode vmode;
+
+				buf = &dd->buffers[buf_index];
+				mcde_dss_get_video_mode(dd->ddev, &vmode);
+				get_ovly_info(cfg, &vmode, &info, dd->overlay);
+				info.paddr = buf->paddr;
+				ret = mcde_dss_apply_overlay(dd->ovly, &info);
+				if (!ret)
+					mcde_dss_update_overlay(dd->ovly,
+									false);
+			}
+		}
+	} else {
+		dd->buffers_need_update = true;
+	}
+
+	dd->config = *cfg;
+
+	return ret;
+}
+
+static int dispdev_register_buffer(struct dispdev *dd, s32 hwmem_name)
+{
+	int ret;
+	struct dispdev_buffer *buf;
+	enum hwmem_mem_type memtype;
+	enum hwmem_access access;
+
+	ret = find_buf(dd, BUF_UNUSED);
+	if (ret < 0)
+		return -ENOMEM;
+	buf = &dd->buffers[ret];
+	buf->alloc = hwmem_resolve_by_name(hwmem_name);
+	if (IS_ERR(buf->alloc)) {
+		ret = PTR_ERR(buf->alloc);
+		goto resolve_failed;
+	}
+
+	hwmem_get_info(buf->alloc, &buf->size, &memtype, &access);
+
+	if (!(access & HWMEM_ACCESS_READ) ||
+					memtype != HWMEM_MEM_CONTIGUOUS_SYS) {
+		ret = -EACCES;
+		goto invalid_mem;
+	}
+
+	buf->state = BUF_FREE;
+	goto out;
+invalid_mem:
+	hwmem_release(buf->alloc);
+resolve_failed:
+out:
+	return ret;
+}
+
+static int dispdev_unregister_buffer(struct dispdev *dd, u32 buf_idx)
+{
+	struct dispdev_buffer *buf = &dd->buffers[buf_idx];
+
+	if (buf_idx >= ARRAY_SIZE(dd->buffers))
+		return -EINVAL;
+
+	if (buf->state == BUF_UNUSED)
+		return -EINVAL;
+
+	if (dd->buffers_need_update)
+		dd->buffers_need_update = false;
+
+	if (buf->state == BUF_ACTIVATED) {
+		/* Disable the overlay */
+		struct mcde_overlay_info info;
+		struct mcde_video_mode vmode;
+		/* TODO Wait for frame done */
+		mcde_dss_get_video_mode(dd->ddev, &vmode);
+		get_ovly_info(&dd->config, &vmode, &info, dd->overlay);
+		mcde_dss_apply_overlay(dd->ovly, &info);
+		mcde_dss_update_overlay(dd->ovly, false);
+		hwmem_unpin(dd->buffers[buf_idx].alloc);
+	}
+
+	hwmem_release(buf->alloc);
+	buf->state = BUF_UNUSED;
+	buf->alloc = NULL;
+	buf->size = 0;
+	buf->paddr = 0;
+	dd->first_update = false;
+
+	return 0;
+}
+
+
+/**
+ * @brief Check if the buffer is transparent or black (ARGB = X000)
+ *        Note: Only for ARGB32.
+ *        Worst case: a ~full transparent buffer
+ *        Results: ~2200us @800Mhz for a WVGA screen, with DENSITY_CHECK=8
+ *                 ~520us  @800Mhz for a WVGA screen, with DENSITY_CHECK=16
+ *
+ * @param w witdh
+ * @param h height
+ * @param addr buffer addr
+ *
+ * @return 1 if the buffer is transparent, else 0
+ */
+static int is_transparent(int w, int h, u32 *addr)
+{
+	int i, j;
+	u32 *c, *next_line;
+	u32 sum;
+
+	next_line = addr;
+	sum = 0;
+
+	/* TODO Optimize me */
+	for (j = 0; j < h; j += DENSITY_CHECK) {
+		c = next_line;
+		for (i = 0; i < w; i += DENSITY_CHECK) {
+			sum += ((*c) & 0x00FFFFFF);
+			c += DENSITY_CHECK;
+		}
+		if (sum)
+			return 0; /* Not "transparent" */
+		next_line += (w * DENSITY_CHECK);
+	}
+
+	return 1; /* "Transparent" */
+}
+
+static int dispdev_queue_buffer(struct dispdev *dd,
+					struct dispdev_buffer_info *buffer)
+{
+	int ret, i;
+	struct mcde_overlay_info info;
+	struct hwmem_mem_chunk mem_chunk;
+	size_t mem_chunk_length = 1;
+	struct hwmem_region rgn = { .offset = 0, .count = 1, .start = 0 };
+	struct hwmem_alloc *alloc;
+	struct mcde_video_mode vmode;
+	u32 buf_idx = buffer->buf_idx;
+
+	if (buf_idx >= ARRAY_SIZE(dd->buffers) ||
+				 dd->buffers[buf_idx].state != BUF_DEQUEUED)
+		return -EINVAL;
+
+	alloc = dd->buffers[buf_idx].alloc;
+	mcde_dss_get_video_mode(dd->ddev, &vmode);
+	get_ovly_info(&dd->config, &vmode, &info, dd->overlay);
+	ret = hwmem_pin(alloc, &mem_chunk, &mem_chunk_length);
+	if (ret) {
+		dev_warn(dd->mdev.this_device, "Pin failed, %d\n", ret);
+		return -EINVAL;
+	}
+
+	rgn.size = rgn.end = dd->buffers[buf_idx].size;
+	ret = hwmem_set_domain(alloc, HWMEM_ACCESS_READ,
+		HWMEM_DOMAIN_SYNC, &rgn);
+	if (ret)
+		dev_warn(dd->mdev.this_device, "Set domain failed, %d\n", ret);
+
+	i = find_buf(dd, BUF_ACTIVATED);
+	if (i >= 0) {
+		dd->buffers[i].state = BUF_FREE;
+		wake_up(&dd->waitq_dq);
+	}
+
+	if (!dd->first_update) {
+		dd->first_update = true;
+		dd->buffers_need_update = false;
+	}
+
+	dd->buffers[buf_idx].paddr = mem_chunk.paddr;
+
+	if (buffer->display_update && !dd->buffers_need_update &&
+			dd->config.width == buffer->buf_cfg.width &&
+			dd->config.height == buffer->buf_cfg.height &&
+			dd->config.format == buffer->buf_cfg.format &&
+			dd->config.stride == buffer->buf_cfg.stride) {
+		info.paddr = mem_chunk.paddr;
+		mcde_dss_apply_overlay(dd->ovly, &info);
+		mcde_dss_update_overlay(dd->ovly, false);
+	} else {
+		dd->buffers_need_update = true;
+	}
+
+	/* Disable the MCDE FB overlay */
+	if ((dd->parent_ovly->state != NULL) &&
+			(dd->ddev->check_transparency)) {
+		dd->ddev->check_transparency--;
+		mcde_dss_get_overlay_info(dd->parent_ovly, &info);
+		if (dd->ddev->check_transparency == 0) {
+			if (is_transparent(info.w, info.h, info.vaddr)) {
+				mcde_dss_disable_overlay(dd->parent_ovly);
+				printk(KERN_INFO "%s Disable overlay\n",
+								__func__);
+			}
+		}
+	}
+
+	dd->buffers[buf_idx].state = BUF_ACTIVATED;
+
+	return 0;
+}
+
+static int dispdev_dequeue_buffer(struct dispdev *dd)
+{
+	int i;
+
+	i = find_buf(dd, BUF_FREE);
+	if (i < 0) {
+		if (find_buf(dd, BUF_ACTIVATED) < 0)
+			return -EINVAL;
+		mutex_unlock(&dd->lock);
+		wait_event(dd->waitq_dq, (i = find_buf(dd, BUF_FREE)) >= 0);
+		mutex_lock(&dd->lock);
+	}
+	hwmem_unpin(dd->buffers[i].alloc);
+	dd->buffers[i].state = BUF_DEQUEUED;
+	dd->buffers[i].paddr = 0;
+
+	return i;
+}
+
+int dispdev_ioctl(struct file *file, unsigned int cmd,
+							unsigned long arg)
+{
+	int ret;
+	struct dispdev *dd = (struct dispdev *)file->private_data;
+
+	mutex_lock(&dd->lock);
+
+	switch (cmd) {
+	case DISPDEV_SET_CONFIG_IOC:
+		{
+			struct dispdev_config cfg;
+			if (copy_from_user(&cfg, (void __user *)arg,
+								sizeof(cfg)))
+				ret = -EFAULT;
+			else
+				ret = dispdev_set_config(dd, &cfg);
+		}
+		break;
+	case DISPDEV_GET_CONFIG_IOC:
+		ret = copy_to_user((void __user *)arg, &dd->config,
+							sizeof(dd->config));
+		if (ret)
+			ret = -EFAULT;
+		break;
+	case DISPDEV_REGISTER_BUFFER_IOC:
+		ret = dispdev_register_buffer(dd, (s32)arg);
+		break;
+	case DISPDEV_UNREGISTER_BUFFER_IOC:
+		ret = dispdev_unregister_buffer(dd, (u32)arg);
+		break;
+	case DISPDEV_QUEUE_BUFFER_IOC:
+	{
+		struct dispdev_buffer_info buffer;
+		if (copy_from_user(&buffer, (void __user *)arg,
+							sizeof(buffer)))
+			ret = -EFAULT;
+		else
+			ret = dispdev_queue_buffer(dd, &buffer);
+		break;
+	}
+	case DISPDEV_DEQUEUE_BUFFER_IOC:
+		ret = dispdev_dequeue_buffer(dd);
+		break;
+	default:
+		ret = -ENOSYS;
+	}
+
+	mutex_unlock(&dd->lock);
+
+	return ret;
+}
+
+static const struct file_operations dispdev_fops = {
+	.open = dispdev_open,
+	.release = dispdev_release,
+	.unlocked_ioctl = dispdev_ioctl,
+};
+
+static void init_dispdev(struct dispdev *dd, struct mcde_display_device *ddev,
+						const char *name, bool overlay)
+{
+	u16 w, h;
+	int rotation;
+
+	mutex_init(&dd->lock);
+	INIT_LIST_HEAD(&dd->list);
+	dd->ddev = ddev;
+	dd->overlay = overlay;
+	mcde_dss_get_native_resolution(ddev, &w, &h);
+	rotation = mcde_dss_get_rotation(ddev);
+
+	if ((rotation == MCDE_DISPLAY_ROT_90_CCW) ||
+			(rotation == MCDE_DISPLAY_ROT_90_CW)) {
+		dd->config.width = h;
+		dd->config.height = w;
+	} else {
+		dd->config.width  = w;
+		dd->config.height = h;
+	}
+	dd->config.format = DISPDEV_FMT_RGB565;
+	dd->config.stride = sizeof(u16) * w;
+	dd->config.x = 0;
+	dd->config.y = 0;
+	dd->config.z = 0;
+	dd->buffers_need_update = false;
+	dd->first_update = false;
+	init_waitqueue_head(&dd->waitq_dq);
+	dd->mdev.minor = MISC_DYNAMIC_MINOR;
+	dd->mdev.name = name;
+	dd->mdev.fops = &dispdev_fops;
+	pr_info("%s: name=%s w=%d, h=%d, fmt=%d, stride=%d\n", __func__, name,
+			dd->config.width, dd->config.height, dd->config.format,
+							dd->config.stride);
+}
+
+int dispdev_create(struct mcde_display_device *ddev, bool overlay,
+					struct mcde_overlay *parent_ovly)
+{
+	int ret = 0;
+	struct dispdev *dd;
+	struct mcde_video_mode vmode;
+	struct mcde_overlay_info info;
+
+	static int counter;
+	char *name = "dispdev0";
+
+	dd = kzalloc(sizeof(struct dispdev), GFP_KERNEL);
+	if (!dd)
+		return -ENOMEM;
+
+	sprintf(name, "%s%d", DISPDEV_DEFAULT_DEVICE_PREFIX, counter++);
+	init_dispdev(dd, ddev, name, overlay);
+
+	if (!overlay) {
+		ret = mcde_dss_enable_display(ddev);
+		if (ret)
+			goto fail_enable_display;
+		mcde_dss_get_video_mode(ddev, &vmode);
+		mcde_dss_try_video_mode(ddev, &vmode);
+		ret = mcde_dss_set_video_mode(ddev, &vmode);
+		if (ret)
+			goto fail_set_video_mode;
+		mcde_dss_set_pixel_format(ddev, info.fmt);
+		mcde_dss_apply_channel(ddev);
+	} else
+		mcde_dss_get_video_mode(ddev, &vmode);
+	get_ovly_info(&dd->config, &vmode, &info, overlay);
+
+	/* Save the MCDE FB overlay */
+	dd->parent_ovly = parent_ovly;
+
+	dd->ovly = mcde_dss_create_overlay(ddev, &info);
+	if (!dd->ovly) {
+		ret = -ENOMEM;
+		goto fail_create_ovly;
+	}
+
+	ret = misc_register(&dd->mdev);
+	if (ret)
+		goto fail_register_misc;
+	mutex_lock(&dev_list_lock);
+	list_add_tail(&dd->list, &dev_list);
+	mutex_unlock(&dev_list_lock);
+
+	goto out;
+
+fail_register_misc:
+	mcde_dss_destroy_overlay(dd->ovly);
+fail_create_ovly:
+	if (!overlay)
+		mcde_dss_disable_display(ddev);
+fail_set_video_mode:
+fail_enable_display:
+	kfree(dd);
+out:
+	return ret;
+}
+
+void dispdev_destroy(struct mcde_display_device *ddev)
+{
+	struct dispdev *dd;
+	struct dispdev *tmp;
+
+	mutex_lock(&dev_list_lock);
+	list_for_each_entry_safe(dd, tmp, &dev_list, list) {
+		if (dd->ddev == ddev) {
+			list_del(&dd->list);
+			misc_deregister(&dd->mdev);
+			mcde_dss_destroy_overlay(dd->ovly);
+			/*
+			 * TODO: Uncomment when DSS has reference
+			 * counting of enable/disable
+			 */
+			/* mcde_dss_disable_display(dd->ddev); */
+			kfree(dd);
+			break;
+		}
+	}
+	mutex_unlock(&dev_list_lock);
+}
+
+static void dispdev_destroy_all(void)
+{
+	struct dispdev *dd;
+	struct dispdev *tmp;
+
+	mutex_lock(&dev_list_lock);
+	list_for_each_entry_safe(dd, tmp, &dev_list, list) {
+		list_del(&dd->list);
+		misc_deregister(&dd->mdev);
+		mcde_dss_destroy_overlay(dd->ovly);
+		/*
+		 * TODO: Uncomment when DSS has reference
+		 * counting of enable/disable
+		 */
+		/* mcde_dss_disable_display(dd->ddev); */
+		kfree(dd);
+	}
+	mutex_unlock(&dev_list_lock);
+
+	mutex_destroy(&dev_list_lock);
+}
+
+static int __init dispdev_init(void)
+{
+	pr_info("%s\n", __func__);
+
+	mutex_init(&dev_list_lock);
+
+	return 0;
+}
+module_init(dispdev_init);
+
+static void __exit dispdev_exit(void)
+{
+	dispdev_destroy_all();
+	pr_info("%s\n", __func__);
+}
+module_exit(dispdev_exit);
+
+MODULE_AUTHOR("Marcus Lorentzon <marcus.xm.lorentzon@stericsson.com>");
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("Display output device driver");
+
diff --git a/include/linux/dispdev.h b/include/linux/dispdev.h
new file mode 100644
index 00000000000..cbcf6705150
--- /dev/null
+++ b/include/linux/dispdev.h
@@ -0,0 +1,66 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2011
+ *
+ * ST-Ericsson Display device driver
+ *
+ * Author: Marcus Lorentzon <marcus.xm.lorentzon@stericsson.com>
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+
+#ifndef _DISPDEV_H_
+#define _DISPDEV_H_
+
+#if !defined(__KERNEL__) && !defined(_KERNEL)
+#include <stdint.h>
+#else
+#include <linux/types.h>
+#include <video/mcde.h>
+#endif
+
+#define DISPDEV_DEFAULT_DEVICE_PREFIX "disp"
+
+enum dispdev_fmt {
+	DISPDEV_FMT_RGB565,
+	DISPDEV_FMT_RGB888,
+	DISPDEV_FMT_RGBX8888,
+	DISPDEV_FMT_RGBA8888,
+	DISPDEV_FMT_YUV422,
+};
+
+struct dispdev_config {
+	uint16_t format;
+	uint16_t stride;
+	uint16_t x;
+	uint16_t y;
+	uint16_t z;
+	uint16_t width;
+	uint16_t height;
+
+	uint32_t user_flags;
+};
+
+struct dispdev_buffer_info {
+	uint16_t buf_idx;
+	uint16_t display_update;
+	struct dispdev_config buf_cfg;
+};
+
+#define DISPDEV_SET_CONFIG_IOC        _IOW('D', 1, struct dispdev_config)
+#define DISPDEV_GET_CONFIG_IOC        _IOR('D', 2, struct dispdev_config)
+#define DISPDEV_REGISTER_BUFFER_IOC   _IO('D', 3)
+#define DISPDEV_UNREGISTER_BUFFER_IOC _IO('D', 4)
+#define DISPDEV_QUEUE_BUFFER_IOC      _IOW('D', 5, struct dispdev_buffer_info)
+#define DISPDEV_DEQUEUE_BUFFER_IOC    _IO('D', 6)
+
+#ifdef __KERNEL__
+
+int dispdev_create(struct mcde_display_device *ddev, bool overlay,
+					struct mcde_overlay *parent_ovly);
+void dispdev_destroy(struct mcde_display_device *ddev);
+
+#endif /* __KERNEL__ */
+
+#endif /* _DISPDEV_H_ */
+
-- 
cgit v1.2.3


From fd03e4f4ad8e72ec18014cd5958b08cc2bbae9d5 Mon Sep 17 00:00:00 2001
From: Fredrik Allansson <fredrik.allansson@stericsson.com>
Date: Fri, 15 Oct 2010 16:07:53 +0200
Subject: misc: dispdev: Migrate to kernel 3.0

apply below mcde mach-ux500 patches for kernel3.0 migration

ce479ee [ANDROID] misc: dispdev: Add dispdev driver
f499637 misc: dispdev: Enable dispdev in U5500
b07b4c [ANDROID] misc: dispdev: Disable UI overlay

ST-Ericsson ID: 352334
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: NA

Signed-off-by: Rajagopala V <rajagopala.v@stericsson.com>
Change-Id: I4afae8f61b28754cb0380d44c9b2273c958572a9
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/29655
---
 arch/arm/mach-ux500/board-mop500-mcde.c |  1 +
 arch/arm/mach-ux500/board-u5500-mcde.c  | 78 ++++++---------------------------
 2 files changed, 14 insertions(+), 65 deletions(-)

diff --git a/arch/arm/mach-ux500/board-mop500-mcde.c b/arch/arm/mach-ux500/board-mop500-mcde.c
index df9b2cbe79a..3e4d0691b8c 100644
--- a/arch/arm/mach-ux500/board-mop500-mcde.c
+++ b/arch/arm/mach-ux500/board-mop500-mcde.c
@@ -11,6 +11,7 @@
 #include <linux/gpio.h>
 #include <linux/mfd/ab8500/denc.h>
 #include <linux/workqueue.h>
+#include <linux/dispdev.h>
 #include <asm/mach-types.h>
 #include <video/av8100.h>
 #include <video/mcde_display.h>
diff --git a/arch/arm/mach-ux500/board-u5500-mcde.c b/arch/arm/mach-ux500/board-u5500-mcde.c
index c74c4995d48..68ddc3e1f7b 100644
--- a/arch/arm/mach-ux500/board-u5500-mcde.c
+++ b/arch/arm/mach-ux500/board-u5500-mcde.c
@@ -10,6 +10,7 @@
 #include <linux/kernel.h>
 #include <linux/gpio.h>
 #include <linux/delay.h>
+#include <linux/dispdev.h>
 #include <video/av8100.h>
 #include <asm/mach-types.h>
 #include <video/mcde_display.h>
@@ -341,6 +342,7 @@ static int display_postregistered_callback(struct notifier_block *nb,
 	else
 #endif /* CONFIG_DISPLAY_AV8100_TERTIARY */
 	{
+		struct mcde_fb *mfb;
 		/* Create frame buffer */
 		fbi = mcde_fb_create(ddev,
 			width, height,
@@ -356,6 +358,17 @@ static int display_postregistered_callback(struct notifier_block *nb,
 		} else
 			dev_info(&ddev->dev, "Framebuffer created (%s)\n",
 						ddev->name);
+#ifdef CONFIG_DISPDEV
+		mfb = to_mcde_fb(fbi);
+		/* Create a dispdev overlay for this display */
+		if (dispdev_create(ddev, true, mfb->ovlys[0]) < 0)
+			dev_warn(&ddev->dev,
+				"Failed to create disp for display %s\n",
+						ddev->name);
+		else
+			dev_info(&ddev->dev, "Disp dev created for (%s)\n",
+						ddev->name);
+#endif
 	}
 
 	return 0;
@@ -528,70 +541,5 @@ struct mcde_display_device *mcde_get_main_display(void)
 }
 EXPORT_SYMBOL(mcde_get_main_display);
 
-void hdmi_fb_onoff(struct mcde_display_device *ddev,
-		bool enable, u8 cea, u8 vesa_cea_nr)
-{
-	u16 w, h;
-	u16 vw, vh;
-	u32 rotate = FB_ROTATE_UR;
-	struct display_driver_data *driver_data = dev_get_drvdata(&ddev->dev);
-
-	dev_dbg(&ddev->dev, "%s\n", __func__);
-	dev_dbg(&ddev->dev, "en:%d cea:%d nr:%d\n", enable, cea, vesa_cea_nr);
-
-	if (enable) {
-		struct fb_info *fbi;
-		if (ddev->enabled) {
-			dev_dbg(&ddev->dev, "Display is already enabled.\n");
-			return;
-		}
-
-		/* Create fb */
-		if (ddev->fbi == NULL) {
-#ifdef CONFIG_DISPLAY_AV8100_TRIPPLE_BUFFER
-			int buffering = 3;
-#else
-			int buffering = 2;
-#endif
-
-			/* Get default values */
-			mcde_dss_get_native_resolution(ddev, &w, &h);
-			vw = w;
-			vh = h * buffering;
-
-			if (vesa_cea_nr != 0)
-				ddev->ceanr_convert(ddev, cea, vesa_cea_nr,
-						buffering, &w, &h, &vw, &vh);
-
-			fbi = mcde_fb_create(ddev, w, h, vw, vh,
-				ddev->default_pixel_format, rotate);
-
-			if (IS_ERR(fbi)) {
-				dev_warn(&ddev->dev,
-					"Failed to create fb for display %s\n",
-							ddev->name);
-				goto hdmi_fb_onoff_end;
-			} else {
-				dev_info(&ddev->dev,
-					"Framebuffer created (%s)\n",
-							ddev->name);
-			}
-			driver_data->fbdevname = (char *)dev_name(fbi->dev);
-		}
-	} else {
-		if (!ddev->enabled) {
-			dev_dbg(&ddev->dev, "Display %s is already disabled.\n",
-					ddev->name);
-			return;
-		}
-
-		mcde_fb_destroy(ddev);
-	}
-
-hdmi_fb_onoff_end:
-	return;
-}
-EXPORT_SYMBOL(hdmi_fb_onoff);
-
 module_init(init_display_devices_u5500);
 #endif
-- 
cgit v1.2.3


From 070aa42f2875328b83daafac201a5f187dc135ff Mon Sep 17 00:00:00 2001
From: Rajagopala V <rajagopala.v@stericsson.com>
Date: Tue, 30 Aug 2011 12:53:46 +0530
Subject: mcde: u5500: Migrate to kernel3.0

Migrate following patches

video: mcde: Configure channels and overlays for DB5500
video: av8100: Add HDMI support for U5500

ST-Ericsson ID: 352334
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: NA

Signed-off-by: Rajagopala V <rajagopala.v@stericsson.com>
Change-Id: I8ec8b1700baf195bcba952d0f2a2e3b88e7264b9
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/29696
---
 arch/arm/mach-ux500/board-u5500-mcde.c | 25 +++++++++++++++++--------
 1 file changed, 17 insertions(+), 8 deletions(-)

diff --git a/arch/arm/mach-ux500/board-u5500-mcde.c b/arch/arm/mach-ux500/board-u5500-mcde.c
index 68ddc3e1f7b..afea7315432 100644
--- a/arch/arm/mach-ux500/board-u5500-mcde.c
+++ b/arch/arm/mach-ux500/board-u5500-mcde.c
@@ -103,7 +103,7 @@ static struct mcde_port port0 = {
 	},
 };
 
-struct mcde_display_generic_platform_data u5500_generic_display0_pdata = {
+struct mcde_display_generic_platform_data generic_display0_pdata = {
 	.reset_gpio = 226,
 	.reset_delay = 10,
 	.sleep_out_delay = 140,
@@ -114,7 +114,7 @@ struct mcde_display_generic_platform_data u5500_generic_display0_pdata = {
 #endif
 };
 
-struct mcde_display_device u5500_generic_display0 = {
+struct mcde_display_device generic_display0 = {
 	.name = "mcde_disp_generic",
 	.id = PRIMARY_DISPLAY_ID,
 	.port = &port0,
@@ -136,7 +136,7 @@ struct mcde_display_device u5500_generic_display0 = {
 	.rotbuf1 = U5500_ESRAM_BASE + 0x20000 * 2,
 	.rotbuf2 = U5500_ESRAM_BASE + 0x20000 * 2 + 0x10000,
 	.dev = {
-		.platform_data = &u5500_generic_display0_pdata,
+		.platform_data = &generic_display0_pdata,
 	},
 };
 #endif /* CONFIG_DISPLAY_GENERIC_DSI_PRIMARY */
@@ -241,6 +241,11 @@ static struct mcde_port port2 = {
 };
 
 struct mcde_display_hdmi_platform_data av8100_hdmi_pdata = {
+	.reset_gpio = 0,
+	.reset_delay = 1,
+	.regulator_id = NULL,
+	.cvbs_regulator_id = "v-av8100-AV-switch",
+	.ddb_id = 1,
 	.rgb_2_yCbCr_transform = &rgb_2_yCbCr_transform,
 };
 
@@ -355,19 +360,23 @@ static int display_postregistered_callback(struct notifier_block *nb,
 				"Failed to create fb for display %s\n",
 						ddev->name);
 			goto display_postregistered_callback_err;
-		} else
+		} else {
 			dev_info(&ddev->dev, "Framebuffer created (%s)\n",
 						ddev->name);
+		}
+
 #ifdef CONFIG_DISPDEV
 		mfb = to_mcde_fb(fbi);
 		/* Create a dispdev overlay for this display */
-		if (dispdev_create(ddev, true, mfb->ovlys[0]) < 0)
+		if (dispdev_create(ddev, true, mfb->ovlys[0]) < 0) {
 			dev_warn(&ddev->dev,
 				"Failed to create disp for display %s\n",
 						ddev->name);
-		else
+			goto display_postregistered_callback_err;
+		} else {
 			dev_info(&ddev->dev, "Disp dev created for (%s)\n",
 						ddev->name);
+		}
 #endif
 	}
 
@@ -476,7 +485,7 @@ static struct notifier_block framebuffer_nb = {
 	.notifier_call = framebuffer_postregistered_callback,
 };
 
-int __init init_display_devices_u5500(void)
+int __init init_display_devices(void)
 {
 	int ret = 0;
 
@@ -541,5 +550,5 @@ struct mcde_display_device *mcde_get_main_display(void)
 }
 EXPORT_SYMBOL(mcde_get_main_display);
 
-module_init(init_display_devices_u5500);
+module_init(init_display_devices);
 #endif
-- 
cgit v1.2.3


From f2ee7aec59209c06ab528dd3fae6189d3f10405c Mon Sep 17 00:00:00 2001
From: Philippe Langlais <philippe.langlais@stericsson.com>
Date: Wed, 19 Oct 2011 14:24:47 +0200
Subject: mach-ux500:mcde:Kernel 3.0 migration

Add the platform data to merge into kernel 3.0 migration

ST-Ericsson ID: 352334
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: NA

Signed-off-by: Naveen Kumar Gaddipati <naveen.gaddipati@stericsson.com>
Change-Id: Ia060a4e35453d43ed1dbb970ecadad9084d03237
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/29762
---
 arch/arm/mach-ux500/board-mop500-mcde.h | 4 ++++
 arch/arm/mach-ux500/board-u5500-mcde.c  | 5 -----
 2 files changed, 4 insertions(+), 5 deletions(-)

diff --git a/arch/arm/mach-ux500/board-mop500-mcde.h b/arch/arm/mach-ux500/board-mop500-mcde.h
index f84b70cc568..38094b81b34 100644
--- a/arch/arm/mach-ux500/board-mop500-mcde.h
+++ b/arch/arm/mach-ux500/board-mop500-mcde.h
@@ -13,6 +13,10 @@
 
 #include <video/mcde_display.h>
 
+#ifdef CONFIG_DISPLAY_AB8500_TERTIARY
+extern struct mcde_display_device tvout_ab8500_display;
+#endif
+
 #ifdef CONFIG_DISPLAY_AV8100_TERTIARY
 extern struct mcde_display_device av8100_hdmi;
 #endif
diff --git a/arch/arm/mach-ux500/board-u5500-mcde.c b/arch/arm/mach-ux500/board-u5500-mcde.c
index afea7315432..9d3f5d82d4d 100644
--- a/arch/arm/mach-ux500/board-u5500-mcde.c
+++ b/arch/arm/mach-ux500/board-u5500-mcde.c
@@ -241,11 +241,6 @@ static struct mcde_port port2 = {
 };
 
 struct mcde_display_hdmi_platform_data av8100_hdmi_pdata = {
-	.reset_gpio = 0,
-	.reset_delay = 1,
-	.regulator_id = NULL,
-	.cvbs_regulator_id = "v-av8100-AV-switch",
-	.ddb_id = 1,
 	.rgb_2_yCbCr_transform = &rgb_2_yCbCr_transform,
 };
 
-- 
cgit v1.2.3


From 765609b488a2175bd4cfee5cbc25e85cf2b0ebdf Mon Sep 17 00:00:00 2001
From: Naveen Kumar Gaddipati <naveen.gaddipati@stericsson.com>
Date: Fri, 2 Sep 2011 10:19:34 +0530
Subject: mach-ux500:hdmi:Kernel 3.0 migration

Add the platform data to merge into kernel 3.0 migration

ST-Ericsson ID: 352334
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: NA

Signed-off-by: Naveen Kumar Gaddipati <naveen.gaddipati@stericsson.com>
Change-Id: I284f8aeb0c775cb5a1a366f2bc4a2d1d1bbc71a3
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/29974
---
 arch/arm/mach-ux500/board-mop500-mcde.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/mach-ux500/board-mop500-mcde.c b/arch/arm/mach-ux500/board-mop500-mcde.c
index 3e4d0691b8c..9ee3e3c4ff5 100644
--- a/arch/arm/mach-ux500/board-mop500-mcde.c
+++ b/arch/arm/mach-ux500/board-mop500-mcde.c
@@ -467,7 +467,7 @@ struct mcde_display_device av8100_hdmi = {
 	.port = &port2,
 	.chnl_id = MCDE_CHNL_B,
 	.fifo = MCDE_FIFO_B,
-	.default_pixel_format = MCDE_OVLYPIXFMT_RGB565,
+	.default_pixel_format = MCDE_OVLYPIXFMT_RGB888,
 	.native_x_res = 1280,
 	.native_y_res = 720,
 	.dev = {
-- 
cgit v1.2.3


From 5741b0feaa068de2cfdea297300960684e1ce4b2 Mon Sep 17 00:00:00 2001
From: Naveen Kumar Gaddipati <naveen.gaddipati@stericsson.com>
Date: Fri, 2 Sep 2011 10:30:32 +0530
Subject: hdmi: dispdev: Kernel 3.0 migration changes

Add the kernel 3.0 migration changes for
dispdev and hdmi drivers

ST-Ericsson ID: 352334
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: NA

Signed-off-by: Naveen Kumar Gaddipati <naveen.gaddipati@stericsson.com>
Change-Id: Ifbc20e018077fb9589e00c658cfdd697437b41ce
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/29975
---
 drivers/misc/dispdev/dispdev.c | 2 +-
 drivers/video/av8100/hdmi.c    | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/misc/dispdev/dispdev.c b/drivers/misc/dispdev/dispdev.c
index 00fab078fc3..a8b612bdd26 100644
--- a/drivers/misc/dispdev/dispdev.c
+++ b/drivers/misc/dispdev/dispdev.c
@@ -430,7 +430,7 @@ static int dispdev_dequeue_buffer(struct dispdev *dd)
 	return i;
 }
 
-int dispdev_ioctl(struct file *file, unsigned int cmd,
+long dispdev_ioctl(struct file *file, unsigned int cmd,
 							unsigned long arg)
 {
 	int ret;
diff --git a/drivers/video/av8100/hdmi.c b/drivers/video/av8100/hdmi.c
index af9dcfac892..4e6baf59200 100644
--- a/drivers/video/av8100/hdmi.c
+++ b/drivers/video/av8100/hdmi.c
@@ -1747,7 +1747,7 @@ static int hdmi_release(struct inode *inode, struct file *filp)
 }
 
 /* ioctl */
-static int hdmi_ioctl(struct file *file,
+static long hdmi_ioctl(struct file *file,
 		       unsigned int cmd, unsigned long arg)
 {
 	u8 value = 0;
-- 
cgit v1.2.3


From ad80a9b90974f8962be2b9670d73f9b50ddffa7e Mon Sep 17 00:00:00 2001
From: Naveen Kumar Gaddipati <naveen.gaddipati@stericsson.com>
Date: Fri, 2 Sep 2011 12:14:15 +0530
Subject: mcde:Migrate the patches to kernel 3.0

Migrate the mcde driver following patches to kernel 3.0
bf78368 video: mcde: correct DSI command set max pkt size
0dd4c53 video: mcde: Fix Coverity defects

ST-Ericsson ID: 352334
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: NA

Signed-off-by: Naveen Kumar Gaddipati <naveen.gaddipati@stericsson.com>
Change-Id: I2e89ca822915dc4c5f979f402e881b04f419b4f1
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/30012
---
 drivers/video/mcde/display-generic_dsi.c |  8 +++++++-
 drivers/video/mcde/mcde_fb.c             | 31 ++++++++++++++++---------------
 drivers/video/mcde/mcde_hw.c             | 26 +++++++++-----------------
 include/video/mcde.h                     |  2 +-
 4 files changed, 33 insertions(+), 34 deletions(-)

diff --git a/drivers/video/mcde/display-generic_dsi.c b/drivers/video/mcde/display-generic_dsi.c
index 64ed3d6daa9..86c87303fa4 100644
--- a/drivers/video/mcde/display-generic_dsi.c
+++ b/drivers/video/mcde/display-generic_dsi.c
@@ -174,9 +174,15 @@ static int __devinit generic_probe(struct mcde_display_device *dev)
 				pdata->regulator = NULL;
 				goto regulator_get_failed;
 			}
-			regulator_set_voltage(pdata->regulator,
+			ret = regulator_set_voltage(pdata->regulator,
 					pdata->min_supply_voltage,
 					pdata->max_supply_voltage);
+			if (ret < 0) {
+				dev_warn(&dev->dev,
+					"%s:Failed to set regulator '%s'\n",
+					__func__, pdata->regulator_id);
+			}
+
 			/*
 			* When u-boot has display a startup screen.
 			* U-boot has turned on display power however the
diff --git a/drivers/video/mcde/mcde_fb.c b/drivers/video/mcde/mcde_fb.c
index 332e371d54b..3de569dded0 100644
--- a/drivers/video/mcde/mcde_fb.c
+++ b/drivers/video/mcde/mcde_fb.c
@@ -481,6 +481,9 @@ static int apply_var(struct fb_info *fbi, struct mcde_display_device *ddev)
 	struct pix_fmt_info *fmt;
 	u32 line_len, size;
 
+	if (!ddev)
+		return -ENODEV;
+
 	dev_vdbg(&(ddev->dev), "%s\n", __func__);
 
 	var = &fbi->var;
@@ -502,22 +505,20 @@ static int apply_var(struct fb_info *fbi, struct mcde_display_device *ddev)
 	if (ddev->fictive)
 		goto apply_var_end;
 
-	if (ddev) {
-		/* Apply pixel format */
-		fmt = var_to_pix_fmt_info(var);
-		mfb->pix_fmt = fmt->pix_fmt;
-
-		/* Apply rotation */
-		mcde_dss_set_rotation(ddev, var_to_rotation(var));
-		/* Apply video mode */
-		memset(&vmode, 0, sizeof(struct mcde_video_mode));
-		var_to_vmode(var, &vmode);
-		ret = mcde_dss_set_video_mode(ddev, &vmode);
-		if (ret)
-			return ret;
+	/* Apply pixel format */
+	fmt = var_to_pix_fmt_info(var);
+	mfb->pix_fmt = fmt->pix_fmt;
 
-		mcde_dss_apply_channel(ddev);
-	}
+	/* Apply rotation */
+	mcde_dss_set_rotation(ddev, var_to_rotation(var));
+	/* Apply video mode */
+	memset(&vmode, 0, sizeof(struct mcde_video_mode));
+	var_to_vmode(var, &vmode);
+	ret = mcde_dss_set_video_mode(ddev, &vmode);
+	if (ret)
+		return ret;
+
+	mcde_dss_apply_channel(ddev);
 
 	/* Apply overlay info */
 	for (i = 0; i < mfb->num_ovlys; i++) {
diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index 8cf48ecad4b..d2105f0d29d 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -2337,6 +2337,7 @@ int mcde_dsi_dcs_read(struct mcde_chnl_state *chnl,
 
 	return ret;
 }
+
 /*
  * Set Maximum Return Packet size is a command that specifies the
  * maximum size of the payload transmitted from peripheral back to
@@ -2348,7 +2349,7 @@ int mcde_dsi_dcs_read(struct mcde_chnl_state *chnl,
  * parameter should be set by the host processor to the desired value
  * in the initialization routine before commencing normal operation.
  */
-int mcde_dsi_set_max_pkt_size(struct mcde_chnl_state *chnl, int size)
+int mcde_dsi_set_max_pkt_size(struct mcde_chnl_state *chnl)
 {
 	u32 settings;
 	u8 link = chnl->port.link;
@@ -2357,38 +2358,29 @@ int mcde_dsi_set_max_pkt_size(struct mcde_chnl_state *chnl, int size)
 	if (chnl->port.type != MCDE_PORTTYPE_DSI)
 		return -EINVAL;
 
-	if (size > 4)
-		return -EINVAL;
-
 	mutex_lock(&mcde_hw_lock);
 
 	if (enable_mcde_hw()) {
 		mutex_unlock(&mcde_hw_lock);
-		return -EINVAL;
+		return -EIO;
 	}
 
 	/*
 	 * Set Maximum Return Packet Size is a four-byte command packet
 	 * (including ECC) that specifies the maximum size of the payload.
 	 * The order of bytes is:
-	 * Data ID, two-byte value for maximum return packet size,
-	 * followed by the ECC byte.
 	 */
-
 	settings = DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_NAT_ENUM(WRITE) |
-		DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_LONGNOTSHORT(1) |
+		DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_LONGNOTSHORT(false) |
 		DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_ID(virt_id) |
-		DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_SIZE(size) |
-		DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_LP_EN(true);
-	settings |= DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_HEAD_ENUM(
-		SET_MAX_PKT_SIZE);
+		DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_SIZE(2) |
+		DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_LP_EN(true) |
+		DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_HEAD_ENUM(
+							SET_MAX_PKT_SIZE);
 	dsi_wreg(link, DSI_DIRECT_CMD_MAIN_SETTINGS, settings);
-	dsi_wreg(link, DSI_DIRECT_CMD_STS_CLR, ~0);
+	dsi_wreg(link, DSI_DIRECT_CMD_WRDAT0, MCDE_MAX_DCS_READ);
 	dsi_wreg(link, DSI_DIRECT_CMD_SEND, true);
 
-	dsi_wreg(link, DSI_CMD_MODE_STS_CLR, ~0);
-	dsi_wreg(link, DSI_DIRECT_CMD_STS_CLR, ~0);
-
 	mutex_unlock(&mcde_hw_lock);
 	return 0;
 }
diff --git a/include/video/mcde.h b/include/video/mcde.h
index 75992bf7d57..220ac167b0b 100644
--- a/include/video/mcde.h
+++ b/include/video/mcde.h
@@ -417,7 +417,7 @@ int mcde_dsi_dcs_write(struct mcde_chnl_state *chnl,
 		u8 cmd, u8 *data, int len);
 int mcde_dsi_dcs_read(struct mcde_chnl_state *chnl,
 		u8 cmd, u32 *data, int *len);
-int mcde_dsi_set_max_pkt_size(struct mcde_chnl_state *chnl, int size);
+int mcde_dsi_set_max_pkt_size(struct mcde_chnl_state *chnl);
 
 /* MCDE */
 
-- 
cgit v1.2.3


From e93779c0ff373da86b408f3ee92a9e28ddcc8b32 Mon Sep 17 00:00:00 2001
From: Naveen Kumar Gaddipati <naveen.gaddipati@stericsson.com>
Date: Fri, 2 Sep 2011 14:32:44 +0530
Subject: hdmi: Kernel 3.0 migration changes

Migrate the following hdmi driver patches to kernel 3.0
6b7eafe video: av8100: Resume time too long
f1f105b video: av8100: Fix warnings
4de90f0 video: av8100: Add underflow detection
10470aa video: av8100: Use Linux error codes
223a03b video: av8100: Get chip cut version
0dd4c53 video: mcde: Fix Coverity defects
59346ca video: av8100: Avoid multiple firmware downloads
2814baa video: hdmi: Avoid global variables

ST-Ericsson ID: 352334
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: NA

Signed-off-by: Naveen Kumar Gaddipati <naveen.gaddipati@stericsson.com>
Change-Id: I853eb0351e9ed4e0e7f806e76d3df6ab3e4419b2
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/30013
---
 drivers/video/av8100/av8100.c   | 1689 +++++++++++++++++++++------------------
 drivers/video/av8100/hdmi.c     |  975 +++++++++++-----------
 drivers/video/av8100/hdmi_loc.h |    2 +-
 include/video/av8100.h          |   10 -
 4 files changed, 1438 insertions(+), 1238 deletions(-)

diff --git a/drivers/video/av8100/av8100.c b/drivers/video/av8100/av8100.c
index 924bf502c77..7ce61a83f1f 100644
--- a/drivers/video/av8100/av8100.c
+++ b/drivers/video/av8100/av8100.c
@@ -26,6 +26,7 @@
 #include <linux/mutex.h>
 #include <linux/slab.h>
 #include <linux/clk.h>
+#include <linux/list.h>
 #include <linux/regulator/consumer.h>
 #include <mach/prcmu.h>
 
@@ -36,6 +37,8 @@
 
 #define AV8100_FW_FILENAME "av8100.fw"
 
+#define AV8100_DEVNR_DEFAULT 0
+
 /* Interrupts */
 #define AV8100_INT_EVENT 0x1
 #define AV8100_PLUGSTARTUP_EVENT 0x4
@@ -49,6 +52,7 @@
 
 /* Command offsets */
 #define AV8100_COMMAND_OFFSET		0x10
+#define AV8100_CUTVER_OFFSET		0x11
 #define AV8100_COMMAND_MAX_LENGTH	0x81
 #define AV8100_CMD_BUF_OFFSET		(AV8100_COMMAND_OFFSET + 1)
 #define AV8100_2ND_RET_BYTE_OFFSET	(AV8100_COMMAND_OFFSET + 1)
@@ -109,27 +113,12 @@
 #define AV8100_WAITTIME_50MS 50
 #define AV8100_WATTIME_100US 100
 
-/* Master clock timing */
-#define MCLK_RNG_17_22	0	/* Use with 19.2 MHZ clock */
-#define MCLK_RNG_22_27	1
-#define MCLK_RNG_27_33	2
-#define MCLK_RNG_31_38	3	/* Use with 38.4 MHZ clock */
-#define MCLK_RNG_36_44	4
-#define MCLK_RNG_40_49	5
-#define MCLK_RNG_45_55	6
-#define MCLK_RNG_49_60	7
-#define MCLK_RNG_54_66	8
-#define MCLK_RNG_58_71	9
-#define MCLK_RNG_63_77	10
-#define MCLK_RNG_67_82	11
-#define MCLK_RNG_72_88	12
-#define MCLK_RNG_76_93	13
-#define MCLK_RNG_85_104	14
-#define MCLK_RNG_94_115	15
-
-DEFINE_MUTEX(av8100_hw_mutex);
+static DEFINE_MUTEX(av8100_hw_mutex);
 #define LOCK_AV8100_HW mutex_lock(&av8100_hw_mutex)
 #define UNLOCK_AV8100_HW mutex_unlock(&av8100_hw_mutex)
+static DEFINE_MUTEX(av8100_fwdl_mutex);
+#define LOCK_AV8100_FWDL mutex_lock(&av8100_fwdl_mutex)
+#define UNLOCK_AV8100_FWDL mutex_unlock(&av8100_fwdl_mutex)
 
 struct color_conversion_cmd {
 	unsigned short	c0;
@@ -150,7 +139,7 @@ struct color_conversion_cmd {
 	unsigned char	cmin;
 };
 
-struct av8100_config_t {
+struct av8100_config {
 	struct i2c_client *client;
 	struct i2c_device_id *id;
 	struct av8100_video_input_format_cmd hdmi_video_input_cmd;
@@ -180,7 +169,7 @@ enum av8100_plug_state {
 	AV8100_PLUGGED
 };
 
-struct av8100_globals_t {
+struct av8100_params {
 	int denc_off_time;/* 5 volt time */
 	int hdmi_off_time;/* 5 volt time */
 	int on_time;/* 5 volt time */
@@ -188,6 +177,7 @@ struct av8100_globals_t {
 	u8 cpdm;/*stby_int_mask*/
 	u8 cecm;/*gen_int_mask*/
 	u8 hdcpm;/*gen_int_mask*/
+	u8 uovbm;/*gen_int_mask*/
 	void (*hdmi_ev_cb)(enum av8100_hdmi_event);
 	enum av8100_plug_state plug_state;
 	struct clk *inputclk;
@@ -248,33 +238,41 @@ enum av8100_command_size {
 	AV8100_COMMAND_FUSE_AES_CHK_SIZE = 0x2,
 };
 
-static unsigned int waittime_retry[10] = {1, 2, 4, 6, 8, 10, 10, 10, 10, 10};
+struct av8100_device {
+	struct list_head	list;
+	struct miscdevice	miscdev;
+	struct device		*dev;
+	struct av8100_config	config;
+	struct av8100_status	status;
+	struct timer_list	timer;
+	wait_queue_head_t	event;
+	int			flag;
+	struct av8100_params	params;
+	u8			chip_version;
+};
+
+static const unsigned int waittime_retry[10] =	{
+					1, 2, 4, 6, 8, 10, 10, 10, 10, 10};
 
 static int av8100_5V_w(u8 denc_off, u8 hdmi_off, u8 on);
-static void clr_plug_status(enum av8100_plugin_status status);
-static void set_plug_status(enum av8100_plugin_status status);
-static void cec_rx(void);
-static void cec_tx(void);
-static void cec_txerr(void);
-static void hdcp_changed(void);
+static void clr_plug_status(struct av8100_device *adev,
+	enum av8100_plugin_status status);
+static void set_plug_status(struct av8100_device *adev,
+	enum av8100_plugin_status status);
+static void cec_rx(struct av8100_device *adev);
+static void cec_tx(struct av8100_device *adev);
+static void cec_txerr(struct av8100_device *adev);
+static void hdcp_changed(struct av8100_device *adev);
 static const struct color_conversion_cmd *get_color_transform_cmd(
+				struct av8100_device *adev,
 				enum av8100_color_transform transform);
 static int av8100_open(struct inode *inode, struct file *filp);
 static int av8100_release(struct inode *inode, struct file *filp);
 static long av8100_ioctl(struct file *file,
 				unsigned int cmd, unsigned long arg);
-static int __devinit av8100_probe(struct i2c_client *i2cClient,
+static int __devinit av8100_probe(struct i2c_client *i2c_client,
 	const struct i2c_device_id *id);
-static int __devexit av8100_remove(struct i2c_client *i2cClient);
-
-static struct av8100_config_t *av8100_config;
-static struct av8100_status	g_av8100_status = {0};
-static struct timer_list av8100_plugtimer;
-static wait_queue_head_t av8100_event;
-static int av8100_flag = 0x0;
-static struct av8100_globals_t *av8100_globals;
-static u8 chip_version;
-struct device *av8100dev;
+static int __devexit av8100_remove(struct i2c_client *i2c_client);
 
 static const struct file_operations av8100_fops = {
 	.owner =    THIS_MODULE,
@@ -283,13 +281,10 @@ static const struct file_operations av8100_fops = {
 	.unlocked_ioctl = av8100_ioctl
 };
 
-static struct miscdevice av8100_miscdev = {
-	MISC_DYNAMIC_MINOR,
-	"av8100",
-	&av8100_fops
-};
+/* List of devices */
+static LIST_HEAD(av8100_device_list);
 
-struct av8100_cea av8100_all_cea[29] = {
+static const struct av8100_cea av8100_all_cea[29] = {
 /* cea id
  *	cea_nr	vtot	vact	vsbpp	vslen
  *	vsfp	vpol	htot	hact	hbp	hslen	hfp	freq
@@ -483,23 +478,76 @@ static const struct i2c_device_id av8100_id[] = {
 	{ }
 };
 
+static struct av8100_device *devnr_to_adev(int devnr)
+{
+	/* Get device from list of devices */
+	struct list_head *element;
+	struct av8100_device *av8100_dev;
+	int cnt = 0;
+
+	list_for_each(element, &av8100_device_list) {
+		av8100_dev = list_entry(element, struct av8100_device, list);
+		if (cnt == devnr)
+			return av8100_dev;
+		cnt++;
+	}
+
+	return NULL;
+}
+
+static struct av8100_device *dev_to_adev(struct device *dev)
+{
+	/* Get device from list of devices */
+	struct list_head *element;
+	struct av8100_device *av8100_dev;
+	int cnt = 0;
+
+	list_for_each(element, &av8100_device_list) {
+		av8100_dev = list_entry(element, struct av8100_device, list);
+		if (av8100_dev->dev == dev)
+			return av8100_dev;
+		cnt++;
+	}
+
+	return NULL;
+}
+
+static int adev_to_devnr(struct av8100_device *adev)
+{
+	/* Get devnr from list of devices */
+	struct list_head *element;
+	struct av8100_device *av8100_dev;
+	int cnt = 0;
+
+	list_for_each(element, &av8100_device_list) {
+		av8100_dev = list_entry(element, struct av8100_device, list);
+		if (av8100_dev == adev)
+			return cnt;
+		cnt++;
+	}
+
+	return -EINVAL;
+}
+
 #ifdef CONFIG_PM
 static int av8100_suspend(struct i2c_client *i2c_client, pm_message_t state)
 {
 	int ret = 0;
+	struct av8100_device *adev;
 
-	dev_dbg(av8100dev, "%s\n", __func__);
+	adev = dev_to_adev(&i2c_client->dev);
+	if (!adev)
+		return -EFAULT;
 
-	if (!av8100_globals)
-		return ret;
+	dev_dbg(adev->dev, "%s\n", __func__);
 
-	av8100_globals->pre_suspend_power =
+	adev->params.pre_suspend_power =
 		(av8100_status_get().av8100_state > AV8100_OPMODE_SHUTDOWN);
 
-	if (av8100_globals->pre_suspend_power) {
+	if (adev->params.pre_suspend_power) {
 		ret = av8100_powerdown();
 		if (ret)
-			dev_err(av8100dev, "av8100_powerdown failed\n");
+			dev_err(adev->dev, "av8100_powerdown failed\n");
 	}
 
 	return ret;
@@ -509,29 +557,35 @@ static int av8100_resume(struct i2c_client *i2c_client)
 {
 	int ret;
 	u8 hpds = 0;
+	struct av8100_device *adev;
 
-	dev_dbg(av8100dev, "%s\n", __func__);
+	adev = dev_to_adev(&i2c_client->dev);
+	if (!adev)
+		return -EFAULT;
 
-	if (av8100_globals->pre_suspend_power) {
-	ret = av8100_powerup();
-	if (ret) {
-		dev_err(av8100dev, "av8100_powerup failed\n");
-		return ret;
-	}
+	dev_dbg(adev->dev, "%s\n", __func__);
 
-	/* Check HDMI plug status */
-	if (av8100_reg_stby_r(NULL, NULL, &hpds, NULL, NULL)) {
-		dev_warn(av8100dev, "av8100_reg_stby_r failed\n");
-		goto av8100_resume_end;
-	}
+	if (adev->params.pre_suspend_power) {
+		ret = av8100_powerup();
+		if (ret) {
+			dev_err(adev->dev, "av8100_powerup failed\n");
+			return ret;
+		}
 
-	if (hpds)
-		set_plug_status(AV8100_HDMI_PLUGIN); /* Plugged*/
-	else
-		clr_plug_status(AV8100_HDMI_PLUGIN); /* Unplugged*/
+		/* Check HDMI plug status */
+		if (av8100_reg_stby_r(NULL, NULL, &hpds, NULL, NULL)) {
+			dev_warn(adev->dev, "av8100_reg_stby_r failed\n");
+			goto av8100_resume_end;
+		}
 
-	av8100_globals->hpdm = AV8100_STANDBY_INTERRUPT_MASK_HPDM_HIGH;
-	av8100_enable_interrupt();
+		if (hpds)
+			set_plug_status(adev, AV8100_HDMI_PLUGIN); /* Plugged*/
+		else
+			clr_plug_status(adev,
+					AV8100_HDMI_PLUGIN); /* Unplugged*/
+
+		adev->params.hpdm = AV8100_STANDBY_INTERRUPT_MASK_HPDM_HIGH;
+		av8100_enable_interrupt();
 	}
 
 av8100_resume_end:
@@ -555,30 +609,32 @@ static struct i2c_driver av8100_driver = {
 
 static void av8100_plugtimer_int(unsigned long value)
 {
-	av8100_flag |= AV8100_PLUGSTARTUP_EVENT;
-	wake_up_interruptible(&av8100_event);
-	del_timer(&av8100_plugtimer);
+	struct av8100_device *adev;
+
+	adev = devnr_to_adev((int)value);
+	adev->flag |= AV8100_PLUGSTARTUP_EVENT;
+	wake_up_interruptible(&adev->event);
+	del_timer(&adev->timer);
 }
 
-static int av8100_int_event_handle(void)
+static int av8100_int_event_handle(struct av8100_device *adev)
 {
 	u8 hpdi = 0;
 	u8 cpdi = 0;
+	u8 uovbi = 0;
 	u8 hdcpi = 0;
 	u8 ceci = 0;
 	u8 hpds = 0;
 	u8 cpds = 0;
 	u8 hdcps = 0;
+	u8 onuvb = 0;
 	u8 cectxerr = 0;
 	u8 cecrx = 0;
 	u8 cectx = 0;
 
-	if (!av8100_globals)
-		return -EINVAL;
-
 	/* STANDBY_PENDING_INTERRUPT reg */
 	if (av8100_reg_stby_pend_int_r(&hpdi, &cpdi, NULL, NULL)) {
-		dev_dbg(av8100dev, "av8100_reg_stby_pend_int_r failed\n");
+		dev_dbg(adev->dev, "av8100_reg_stby_pend_int_r failed\n");
 		goto av8100_int_event_handle_1;
 	}
 
@@ -589,112 +645,113 @@ static int av8100_int_event_handle(void)
 
 		/* STANDBY reg */
 		if (av8100_reg_stby_r(NULL, NULL, &hpds, &cpds, NULL)) {
-			dev_dbg(av8100dev, "av8100_reg_stby_r failed\n");
+			dev_dbg(adev->dev, "av8100_reg_stby_r failed\n");
 			goto av8100_int_event_handle_1;
 		}
 	}
 
-	if (cpdi & av8100_globals->cpdm) {
+	if (cpdi & adev->params.cpdm) {
 		/* TVout plugin change */
 		if (cpds) {
-			dev_dbg(av8100dev, "cpds 1\n");
-			set_plug_status(AV8100_CVBS_PLUGIN);
+			dev_dbg(adev->dev, "cpds 1\n");
+			set_plug_status(adev, AV8100_CVBS_PLUGIN);
 		} else {
-			dev_dbg(av8100dev, "cpds 0\n");
-			clr_plug_status(AV8100_CVBS_PLUGIN);
+			dev_dbg(adev->dev, "cpds 0\n");
+			clr_plug_status(adev, AV8100_CVBS_PLUGIN);
 		}
 	}
 
-	if (hpdi & av8100_globals->hpdm) {
+	if (hpdi & adev->params.hpdm) {
 		/* HDMI plugin change */
 		if (hpds) {
 			/* Plugged */
 			/* Set 5V always on */
-			av8100_5V_w(av8100_globals->denc_off_time,
+			av8100_5V_w(adev->params.denc_off_time,
 					0,
-					av8100_globals->on_time);
-			dev_dbg(av8100dev, "hpds 1\n");
-			set_plug_status(AV8100_HDMI_PLUGIN);
+					adev->params.on_time);
+			dev_dbg(adev->dev, "hpds 1\n");
+			set_plug_status(adev, AV8100_HDMI_PLUGIN);
 		} else {
 			/* Unplugged */
-			av8100_5V_w(av8100_globals->denc_off_time,
-					av8100_globals->hdmi_off_time,
-					av8100_globals->on_time);
-			dev_dbg(av8100dev, "hpds 0\n");
-			clr_plug_status(AV8100_HDMI_PLUGIN);
+			av8100_5V_w(adev->params.denc_off_time,
+					adev->params.hdmi_off_time,
+					adev->params.on_time);
+			dev_dbg(adev->dev, "hpds 0\n");
+			clr_plug_status(adev, AV8100_HDMI_PLUGIN);
 		}
 	}
 
 av8100_int_event_handle_1:
 	/* GENERAL_INTERRUPT reg */
 	if (av8100_reg_gen_int_r(NULL, NULL, NULL, &ceci,
-			&hdcpi, NULL, NULL)) {
-		dev_dbg(av8100dev, "av8100_reg_stby_pend_int_r failed\n");
+			&hdcpi, &uovbi, NULL)) {
+		dev_dbg(adev->dev, "av8100_reg_gen_int_r failed\n");
 		return -EINVAL;
 	}
 
 	/* CEC or HDCP event */
-	if (ceci | hdcpi) {
+	if (ceci | hdcpi | uovbi) {
 		/* Clear pending interrupts */
 		av8100_reg_gen_int_w(1, 1, 1, 1, 1, 1);
 
 		/* GENERAL_STATUS reg */
 		if (av8100_reg_gen_status_r(&cectxerr, &cecrx, &cectx, NULL,
-				NULL, &hdcps) != 0) {
-			dev_dbg(av8100dev, "av8100_reg_gen_status_r fail\n");
+				&onuvb, &hdcps) != 0) {
+			dev_dbg(adev->dev, "av8100_reg_gen_status_r fail\n");
 			return -EINVAL;
 		}
 	}
 
+	/* Underflow or overflow */
+	if (uovbi)
+		dev_dbg(adev->dev, "uovbi %d\n", onuvb);
+
 	/* CEC received */
 	if (ceci && cecrx) {
 		u8 val;
 
-		dev_dbg(av8100dev, "cecrx\n");
+		dev_dbg(adev->dev, "cecrx\n");
 
 		/* Clear cecrx in status reg*/
 		if (av8100_reg_r(AV8100_GENERAL_STATUS, &val) == 0) {
 			if (av8100_reg_w(AV8100_GENERAL_STATUS,
 				val & ~AV8100_GENERAL_STATUS_CECREC_MASK))
-				dev_info(av8100dev, "gen_stat write error\n");
+				dev_info(adev->dev, "gen_stat write error\n");
 		} else {
-			dev_info(av8100dev, "gen_stat read error\n");
+			dev_info(adev->dev, "gen_stat read error\n");
 		}
 
 		/* Report CEC event */
-		cec_rx();
+		cec_rx(adev);
 	}
 
 	/* CEC tx error */
 	if (ceci && cectx && cectxerr) {
-		dev_dbg(av8100dev, "cectxerr\n");
+		dev_dbg(adev->dev, "cectxerr\n");
 		/* Report CEC tx error event */
-		cec_txerr();
+		cec_txerr(adev);
 	} else if (ceci && cectx) {
-		dev_dbg(av8100dev, "cectx\n");
+		dev_dbg(adev->dev, "cectx\n");
 		/* Report CEC tx event */
-		cec_tx();
+		cec_tx(adev);
 	}
 
 	/* HDCP event */
 	if (hdcpi) {
-		dev_dbg(av8100dev, "hdcpch:%0x\n", hdcps);
+		dev_dbg(adev->dev, "hdcpch:%0x\n", hdcps);
 		/* Report HDCP status change event */
-		hdcp_changed();
+		hdcp_changed(adev);
 	}
 
 	return 0;
 }
 
-static int av8100_plugstartup_event_handle(void)
+static int av8100_plugstartup_event_handle(struct av8100_device *adev)
 {
 	u8 hpds = 0;
 	u8 cpds = 0;
 
-	if (!av8100_globals)
-		return -EINVAL;
-
-	switch (av8100_globals->plug_state) {
+	switch (adev->params.plug_state) {
 	case AV8100_UNPLUGGED:
 	case AV8100_PLUGGED:
 	default:
@@ -702,31 +759,31 @@ static int av8100_plugstartup_event_handle(void)
 
 	case AV8100_PLUGGED_STARTUP:
 		/* Unmask interrupt */
-		av8100_globals->hpdm = AV8100_STANDBY_INTERRUPT_MASK_HPDM_HIGH;
-		if (av8100_reg_stby_int_mask_w(av8100_globals->hpdm,
-			av8100_globals->cpdm,
+		adev->params.hpdm = AV8100_STANDBY_INTERRUPT_MASK_HPDM_HIGH;
+		if (av8100_reg_stby_int_mask_w(adev->params.hpdm,
+				adev->params.cpdm,
 			AV8100_STANDBY_INTERRUPT_MASK_STBYGPIOCFG_INPUT,
 			AV8100_STANDBY_INTERRUPT_MASK_IPOL_LOW)) {
-			dev_dbg(av8100dev,
+			dev_dbg(adev->dev,
 				"av8100_reg_stby_int_mask_w fail\n");
 		}
 
-		msleep(1);
+		mdelay(AV8100_WAITTIME_1MS);
 
 		/* Get actual plug status */
 		if (av8100_reg_stby_r(NULL, NULL, &hpds, &cpds,	NULL))
-			dev_dbg(av8100dev, "av8100_reg_stby_r fail\n");
+			dev_dbg(adev->dev, "av8100_reg_stby_r fail\n");
 
 		/* Set plugstate */
 		if (hpds) {
-			av8100_globals->plug_state = AV8100_PLUGGED;
-			dev_dbg(av8100dev, "plug_state:2\n");
+			adev->params.plug_state = AV8100_PLUGGED;
+			dev_dbg(adev->dev, "plug_state:2\n");
 		} else {
-			av8100_globals->plug_state = AV8100_UNPLUGGED;
-			dev_dbg(av8100dev, "plug_state:0\n");
+			adev->params.plug_state = AV8100_UNPLUGGED;
+			dev_dbg(adev->dev, "plug_state:0\n");
 
-			if (av8100_globals->hdmi_ev_cb)
-				av8100_globals->hdmi_ev_cb(
+			if (adev->params.hdmi_ev_cb)
+				adev->params.hdmi_ev_cb(
 					AV8100_HDMI_EVENT_HDMI_PLUGOUT);
 		}
 		break;
@@ -737,22 +794,22 @@ static int av8100_plugstartup_event_handle(void)
 
 static int av8100_thread(void *p)
 {
-	u8 flags;
+	u8			flags;
+	struct av8100_device	*adev = p;
 
 	while (1) {
-		wait_event_interruptible(av8100_event, (av8100_flag != 0));
-		flags = av8100_flag;
-		av8100_flag = 0;
+		wait_event_interruptible(adev->event, (adev->flag != 0));
+		flags = adev->flag;
+		adev->flag = 0;
 
-		if (!av8100_globals ||
-			g_av8100_status.av8100_state < AV8100_OPMODE_STANDBY)
+		if (adev->status.av8100_state < AV8100_OPMODE_STANDBY)
 			continue;
 
 		if (flags & AV8100_INT_EVENT)
-			(void)av8100_int_event_handle();
+			(void)av8100_int_event_handle(adev);
 
 		if (flags & AV8100_PLUGSTARTUP_EVENT)
-			(void)av8100_plugstartup_event_handle();
+			(void)av8100_plugstartup_event_handle(adev);
 	}
 
 	return 0;
@@ -760,8 +817,12 @@ static int av8100_thread(void *p)
 
 static irqreturn_t av8100_intr_handler(int irq, void *p)
 {
-	av8100_flag |= AV8100_INT_EVENT;
-	wake_up_interruptible(&av8100_event);
+	struct av8100_device *adev;
+
+	adev = (struct av8100_device *) p;
+	adev->flag |= AV8100_INT_EVENT;
+	wake_up_interruptible(&adev->event);
+
 	return IRQ_HANDLED;
 }
 
@@ -850,8 +911,8 @@ static u16 av8100_get_ui_x4(
 	return AV8100_UI_X4_DEFAULT;
 }
 
-static int av8100_config_video_output_dep(enum av8100_output_CEA_VESA
-	output_format)
+static int av8100_config_video_output_dep(
+		enum av8100_output_CEA_VESA output_format)
 {
 	int retval;
 	union av8100_configuration config;
@@ -919,21 +980,15 @@ static int av8100_config_video_output_dep(enum av8100_output_CEA_VESA
 	return 0;
 }
 
-static int av8100_config_init(void)
+static int av8100_config_init(struct av8100_device *adev)
 {
 	int retval;
 	union av8100_configuration config;
 
-	dev_dbg(av8100dev, "%s\n", __func__);
-
-	av8100_config = kzalloc(sizeof(struct av8100_config_t), GFP_KERNEL);
-	if (!av8100_config) {
-		dev_err(av8100dev, "%s: Failed to allocate config\n", __func__);
-		return AV8100_FAIL;
-	}
+	dev_dbg(adev->dev, "%s\n", __func__);
 
 	memset(&config, 0, sizeof(union av8100_configuration));
-	memset(av8100_config, 0, sizeof(union av8100_configuration));
+	memset(&adev->config, 0, sizeof(struct av8100_config));
 
 	/* Color conversion */
 	config.color_transform = AV8100_COLOR_TRANSFORM_INDENTITY;
@@ -1010,72 +1065,49 @@ static int av8100_config_init(void)
 	return 0;
 }
 
-static void av8100_config_exit(void)
+static int av8100_params_init(struct av8100_device *adev)
 {
-	dev_dbg(av8100dev, "%s\n", __func__);
-
-	kfree(av8100_config);
-	av8100_config = NULL;
-}
-
-static int av8100_globals_init(void)
-{
-	dev_dbg(av8100dev, "%s\n", __func__);
-
-	av8100_globals = kzalloc(sizeof(struct av8100_globals_t), GFP_KERNEL);
-	if (!av8100_globals) {
-		dev_err(av8100dev, "%s: Alloc failure\n", __func__);
-		return AV8100_FAIL;
-	}
+	dev_dbg(adev->dev, "%s\n", __func__);
 
-	av8100_globals->denc_off_time = AV8100_DENC_OFF_TIME;
-	av8100_globals->hdmi_off_time = AV8100_HDMI_OFF_TIME;
-	av8100_globals->on_time = AV8100_ON_TIME;
+	adev->params.denc_off_time = AV8100_DENC_OFF_TIME;
+	adev->params.hdmi_off_time = AV8100_HDMI_OFF_TIME;
+	adev->params.on_time = AV8100_ON_TIME;
 
-	av8100_globals->hpdm = AV8100_STANDBY_INTERRUPT_MASK_HPDM_HIGH;
-	av8100_globals->cpdm = AV8100_STANDBY_INTERRUPT_MASK_CPDM_HIGH;
-	av8100_globals->hdcpm = AV8100_GENERAL_INTERRUPT_MASK_HDCPM_HIGH;
-	av8100_globals->cecm = AV8100_GENERAL_INTERRUPT_MASK_CECM_HIGH;
+	adev->params.hpdm = AV8100_STANDBY_INTERRUPT_MASK_HPDM_HIGH;
+	adev->params.cpdm = AV8100_STANDBY_INTERRUPT_MASK_CPDM_HIGH;
+	adev->params.hdcpm = AV8100_GENERAL_INTERRUPT_MASK_HDCPM_HIGH;
+	adev->params.cecm = AV8100_GENERAL_INTERRUPT_MASK_CECM_HIGH;
+	adev->params.uovbm = AV8100_GENERAL_INTERRUPT_MASK_UOVBM_HIGH;
 
-	av8100_globals->plug_state = AV8100_UNPLUGGED;
-	av8100_globals->inputclk = NULL;
-	av8100_globals->inputclk_requested = false;
-	av8100_globals->opp_requested = false;
-	av8100_globals->regulator_requested = false;
+	adev->params.plug_state = AV8100_UNPLUGGED;
+	adev->params.inputclk = NULL;
+	adev->params.inputclk_requested = false;
+	adev->params.opp_requested = false;
+	adev->params.regulator_requested = false;
 
 	return 0;
 }
 
-static void av8100_globals_exit(void)
+static void clr_plug_status(struct av8100_device *adev,
+			enum av8100_plugin_status status)
 {
-	dev_dbg(av8100dev, "%s\n", __func__);
-
-	kfree(av8100_globals);
-	av8100_globals = NULL;
-}
-
-static void clr_plug_status(enum av8100_plugin_status status)
-{
-	g_av8100_status.av8100_plugin_status &= ~status;
+	adev->status.av8100_plugin_status &= ~status;
 
 	switch (status) {
 	case AV8100_HDMI_PLUGIN:
-		if (!av8100_globals)
-			return;
-
-		switch (av8100_globals->plug_state) {
+		switch (adev->params.plug_state) {
 		case AV8100_UNPLUGGED:
 		case AV8100_PLUGGED_STARTUP:
 		default:
 			break;
 
 		case AV8100_PLUGGED:
-			av8100_globals->plug_state =
+			adev->params.plug_state =
 				AV8100_UNPLUGGED;
-			dev_dbg(av8100dev, "plug_state:0\n");
+			dev_dbg(adev->dev, "plug_state:0\n");
 
-			if (av8100_globals->hdmi_ev_cb)
-				av8100_globals->hdmi_ev_cb(
+			if (adev->params.hdmi_ev_cb)
+				adev->params.hdmi_ev_cb(
 					AV8100_HDMI_EVENT_HDMI_PLUGOUT);
 			break;
 		}
@@ -1090,49 +1122,47 @@ static void clr_plug_status(enum av8100_plugin_status status)
 	}
 }
 
-static void set_plug_status(enum av8100_plugin_status status)
+static void set_plug_status(struct av8100_device *adev,
+			enum av8100_plugin_status status)
 {
-	g_av8100_status.av8100_plugin_status |= status;
+	adev->status.av8100_plugin_status |= status;
 
 	switch (status) {
 	case AV8100_HDMI_PLUGIN:
-		if (!av8100_globals)
-			return;
-
-		switch (av8100_globals->plug_state) {
+		switch (adev->params.plug_state) {
 		case AV8100_UNPLUGGED:
-			av8100_globals->plug_state =
+			adev->params.plug_state =
 				AV8100_PLUGGED_STARTUP;
 
-			dev_dbg(av8100dev, "plug_state:1\n");
+			dev_dbg(adev->dev, "plug_state:1\n");
 
 			/*
 			 * Mask interrupts to avoid plug detect during
 			 * startup
 			 *  */
-			av8100_globals->hpdm =
+			adev->params.hpdm =
 				AV8100_STANDBY_INTERRUPT_MASK_HPDM_LOW;
 			if (av8100_reg_stby_int_mask_w(
-				av8100_globals->hpdm,
-				av8100_globals->cpdm,
+					adev->params.hpdm,
+					adev->params.cpdm,
 				AV8100_STANDBY_INTERRUPT_MASK_STBYGPIOCFG_INPUT,
 				AV8100_STANDBY_INTERRUPT_MASK_IPOL_LOW)) {
-				dev_dbg(av8100dev,
-					"av8100_reg_stby_int_mask_w"
-					"fail\n");
+				dev_dbg(adev->dev,
+					"av8100_reg_stby_int_mask_w fail\n");
 			}
 
 			/* Set plug startup timer */
-			init_timer(&av8100_plugtimer);
-			av8100_plugtimer.expires = jiffies +
+			init_timer(&adev->timer);
+			adev->timer.expires = jiffies +
 					AV8100_PLUGSTARTUP_TIME;
-			av8100_plugtimer.function =
+			adev->timer.function =
 					av8100_plugtimer_int;
-			av8100_plugtimer.data = 0;
-			add_timer(&av8100_plugtimer);
+			adev->timer.data = 0;
+			adev->timer.data = adev_to_devnr(adev);
+			mod_timer(&adev->timer, adev->timer.expires);
 
-			if (av8100_globals->hdmi_ev_cb)
-				av8100_globals->hdmi_ev_cb(
+			if (adev->params.hdmi_ev_cb)
+				adev->params.hdmi_ev_cb(
 					AV8100_HDMI_EVENT_HDMI_PLUGIN);
 			break;
 
@@ -1152,38 +1182,39 @@ static void set_plug_status(enum av8100_plugin_status status)
 	}
 }
 
-static void cec_rx(void)
+static void cec_rx(struct av8100_device *adev)
 {
-	if (av8100_globals && av8100_globals->hdmi_ev_cb)
-		av8100_globals->hdmi_ev_cb(AV8100_HDMI_EVENT_CEC);
+	if (adev->params.hdmi_ev_cb)
+		adev->params.hdmi_ev_cb(AV8100_HDMI_EVENT_CEC);
 }
 
-static void cec_tx(void)
+static void cec_tx(struct av8100_device *adev)
 {
-	if (av8100_globals && av8100_globals->hdmi_ev_cb)
-		av8100_globals->hdmi_ev_cb(AV8100_HDMI_EVENT_CECTX);
+	if (adev->params.hdmi_ev_cb)
+		adev->params.hdmi_ev_cb(AV8100_HDMI_EVENT_CECTX);
 }
 
-static void cec_txerr(void)
+static void cec_txerr(struct av8100_device *adev)
 {
-	if (av8100_globals && av8100_globals->hdmi_ev_cb)
-		av8100_globals->hdmi_ev_cb(AV8100_HDMI_EVENT_CECTXERR);
+	if (adev->params.hdmi_ev_cb)
+		adev->params.hdmi_ev_cb(AV8100_HDMI_EVENT_CECTXERR);
 }
 
-static void hdcp_changed(void)
+static void hdcp_changed(struct av8100_device *adev)
 {
-	if (av8100_globals && av8100_globals->hdmi_ev_cb)
-		av8100_globals->hdmi_ev_cb(AV8100_HDMI_EVENT_HDCP);
+	if (adev->params.hdmi_ev_cb)
+		adev->params.hdmi_ev_cb(AV8100_HDMI_EVENT_HDCP);
 }
 
-static void av8100_set_state(enum av8100_operating_mode state)
+static void av8100_set_state(struct av8100_device *adev,
+			enum av8100_operating_mode state)
 {
-	g_av8100_status.av8100_state = state;
+	adev->status.av8100_state = state;
 
 	if (state <= AV8100_OPMODE_STANDBY) {
-		clr_plug_status(AV8100_HDMI_PLUGIN);
-		clr_plug_status(AV8100_CVBS_PLUGIN);
-		g_av8100_status.hdmi_on = false;
+		clr_plug_status(adev, AV8100_HDMI_PLUGIN);
+		clr_plug_status(adev, AV8100_CVBS_PLUGIN);
+		adev->status.hdmi_on = false;
 	}
 }
 
@@ -1200,10 +1231,11 @@ static int write_single_byte(struct i2c_client *client, u8 reg,
 	u8 data)
 {
 	int ret;
+	struct device *dev = &client->dev;
 
 	ret = i2c_smbus_write_byte_data(client, reg, data);
 	if (ret < 0)
-		dev_dbg(av8100dev, "i2c smbus write byte failed\n");
+		dev_dbg(dev, "i2c smbus write byte failed\n");
 
 	return ret;
 }
@@ -1221,12 +1253,13 @@ static int write_single_byte(struct i2c_client *client, u8 reg,
 static int read_single_byte(struct i2c_client *client, u8 reg, u8 *val)
 {
 	int value;
+	struct device *dev = &client->dev;
 
 	value = i2c_smbus_read_byte_data(client, reg);
 	if (value < 0) {
-		dev_dbg(av8100dev, "i2c smbus read byte failed,read data = %x "
+		dev_dbg(dev, "i2c smbus read byte failed,read data = %x "
 			"from offset:%x\n" , value, reg);
-		return AV8100_FAIL;
+		return -EFAULT;
 	}
 
 	*val = (u8) value;
@@ -1247,150 +1280,139 @@ static int write_multi_byte(struct i2c_client *client, u8 reg,
 		u8 *buf, u8 nbytes)
 {
 	int ret;
+	struct device *dev = &client->dev;
 
 	ret = i2c_smbus_write_i2c_block_data(client, reg, nbytes, buf);
 	if (ret < 0)
-		dev_dbg(av8100dev, "i2c smbus write multi byte error\n");
+		dev_dbg(dev, "i2c smbus write multi byte error\n");
 
 	return ret;
 }
 
-static int configuration_video_input_get(char *buffer,
-	unsigned int *length)
+static int configuration_video_input_get(struct av8100_device *adev,
+			char *buffer, unsigned int *length)
 {
-	if (!av8100_config)
-		return AV8100_FAIL;
-
-	buffer[0] = av8100_config->hdmi_video_input_cmd.dsi_input_mode;
-	buffer[1] = av8100_config->hdmi_video_input_cmd.input_pixel_format;
-	buffer[2] = REG_16_8_MSB(av8100_config->hdmi_video_input_cmd.
+	buffer[0] = adev->config.hdmi_video_input_cmd.dsi_input_mode;
+	buffer[1] = adev->config.hdmi_video_input_cmd.input_pixel_format;
+	buffer[2] = REG_16_8_MSB(adev->config.hdmi_video_input_cmd.
 		total_horizontal_pixel);
-	buffer[3] = REG_16_8_LSB(av8100_config->hdmi_video_input_cmd.
+	buffer[3] = REG_16_8_LSB(adev->config.hdmi_video_input_cmd.
 		total_horizontal_pixel);
-	buffer[4] = REG_16_8_MSB(av8100_config->hdmi_video_input_cmd.
+	buffer[4] = REG_16_8_MSB(adev->config.hdmi_video_input_cmd.
 		total_horizontal_active_pixel);
-	buffer[5] = REG_16_8_LSB(av8100_config->hdmi_video_input_cmd.
+	buffer[5] = REG_16_8_LSB(adev->config.hdmi_video_input_cmd.
 		total_horizontal_active_pixel);
-	buffer[6] = REG_16_8_MSB(av8100_config->hdmi_video_input_cmd.
+	buffer[6] = REG_16_8_MSB(adev->config.hdmi_video_input_cmd.
 		total_vertical_lines);
-	buffer[7] = REG_16_8_LSB(av8100_config->hdmi_video_input_cmd.
+	buffer[7] = REG_16_8_LSB(adev->config.hdmi_video_input_cmd.
 		total_vertical_lines);
-	buffer[8] = REG_16_8_MSB(av8100_config->hdmi_video_input_cmd.
+	buffer[8] = REG_16_8_MSB(adev->config.hdmi_video_input_cmd.
 		total_vertical_active_lines);
-	buffer[9] = REG_16_8_LSB(av8100_config->hdmi_video_input_cmd.
+	buffer[9] = REG_16_8_LSB(adev->config.hdmi_video_input_cmd.
 		total_vertical_active_lines);
-	buffer[10] = av8100_config->hdmi_video_input_cmd.video_mode;
-	buffer[11] = av8100_config->hdmi_video_input_cmd.nb_data_lane;
-	buffer[12] = av8100_config->hdmi_video_input_cmd.
+	buffer[10] = adev->config.hdmi_video_input_cmd.video_mode;
+	buffer[11] = adev->config.hdmi_video_input_cmd.nb_data_lane;
+	buffer[12] = adev->config.hdmi_video_input_cmd.
 		nb_virtual_ch_command_mode;
-	buffer[13] = av8100_config->hdmi_video_input_cmd.
+	buffer[13] = adev->config.hdmi_video_input_cmd.
 		nb_virtual_ch_video_mode;
-	buffer[14] = REG_16_8_MSB(av8100_config->hdmi_video_input_cmd.
+	buffer[14] = REG_16_8_MSB(adev->config.hdmi_video_input_cmd.
 		TE_line_nb);
-	buffer[15] = REG_16_8_LSB(av8100_config->hdmi_video_input_cmd.
+	buffer[15] = REG_16_8_LSB(adev->config.hdmi_video_input_cmd.
 		TE_line_nb);
-	buffer[16] = av8100_config->hdmi_video_input_cmd.TE_config;
-	buffer[17] = REG_32_8_MSB(av8100_config->hdmi_video_input_cmd.
+	buffer[16] = adev->config.hdmi_video_input_cmd.TE_config;
+	buffer[17] = REG_32_8_MSB(adev->config.hdmi_video_input_cmd.
 		master_clock_freq);
-	buffer[18] = REG_32_8_MMSB(av8100_config->hdmi_video_input_cmd.
+	buffer[18] = REG_32_8_MMSB(adev->config.hdmi_video_input_cmd.
 		master_clock_freq);
-	buffer[19] = REG_32_8_MLSB(av8100_config->hdmi_video_input_cmd.
+	buffer[19] = REG_32_8_MLSB(adev->config.hdmi_video_input_cmd.
 		master_clock_freq);
-	buffer[20] = REG_32_8_LSB(av8100_config->hdmi_video_input_cmd.
+	buffer[20] = REG_32_8_LSB(adev->config.hdmi_video_input_cmd.
 		master_clock_freq);
-	buffer[21] = av8100_config->hdmi_video_input_cmd.ui_x4;
+	buffer[21] = adev->config.hdmi_video_input_cmd.ui_x4;
 
 	*length = AV8100_COMMAND_VIDEO_INPUT_FORMAT_SIZE - 1;
 	return 0;
 
 }
 
-static int configuration_audio_input_get(char *buffer,
-	unsigned int *length)
+static int configuration_audio_input_get(struct av8100_device *adev,
+			char *buffer, unsigned int *length)
 {
-	if (!av8100_config)
-		return AV8100_FAIL;
-
-	buffer[0] = av8100_config->hdmi_audio_input_cmd.
-		audio_input_if_format;
-	buffer[1] = av8100_config->hdmi_audio_input_cmd.i2s_input_nb;
-	buffer[2] = av8100_config->hdmi_audio_input_cmd.sample_audio_freq;
-	buffer[3] = av8100_config->hdmi_audio_input_cmd.audio_word_lg;
-	buffer[4] = av8100_config->hdmi_audio_input_cmd.audio_format;
-	buffer[5] = av8100_config->hdmi_audio_input_cmd.audio_if_mode;
-	buffer[6] = av8100_config->hdmi_audio_input_cmd.audio_mute;
+	buffer[0] = adev->config.hdmi_audio_input_cmd.audio_input_if_format;
+	buffer[1] = adev->config.hdmi_audio_input_cmd.i2s_input_nb;
+	buffer[2] = adev->config.hdmi_audio_input_cmd.sample_audio_freq;
+	buffer[3] = adev->config.hdmi_audio_input_cmd.audio_word_lg;
+	buffer[4] = adev->config.hdmi_audio_input_cmd.audio_format;
+	buffer[5] = adev->config.hdmi_audio_input_cmd.audio_if_mode;
+	buffer[6] = adev->config.hdmi_audio_input_cmd.audio_mute;
 
 	*length = AV8100_COMMAND_AUDIO_INPUT_FORMAT_SIZE - 1;
 	return 0;
 }
 
-static int configuration_video_output_get(char *buffer,
-	unsigned int *length)
+static int configuration_video_output_get(struct av8100_device *adev,
+			char *buffer, unsigned int *length)
 {
-	if (!av8100_config)
-		return AV8100_FAIL;
-
-	buffer[0] = av8100_config->hdmi_video_output_cmd.
+	buffer[0] = adev->config.hdmi_video_output_cmd.
 		video_output_cea_vesa;
 
 	if (buffer[0] == AV8100_CUSTOM) {
-		buffer[1] = av8100_config->hdmi_video_output_cmd.
+		buffer[1] = adev->config.hdmi_video_output_cmd.
 			vsync_polarity;
-		buffer[2] = av8100_config->hdmi_video_output_cmd.
+		buffer[2] = adev->config.hdmi_video_output_cmd.
 			hsync_polarity;
-		buffer[3] = REG_16_8_MSB(av8100_config->
+		buffer[3] = REG_16_8_MSB(adev->config.
 			hdmi_video_output_cmd.total_horizontal_pixel);
-		buffer[4] = REG_16_8_LSB(av8100_config->
+		buffer[4] = REG_16_8_LSB(adev->config.
 			hdmi_video_output_cmd.total_horizontal_pixel);
-		buffer[5] = REG_16_8_MSB(av8100_config->
+		buffer[5] = REG_16_8_MSB(adev->config.
 			hdmi_video_output_cmd.total_horizontal_active_pixel);
-		buffer[6] = REG_16_8_LSB(av8100_config->
+		buffer[6] = REG_16_8_LSB(adev->config.
 			hdmi_video_output_cmd.total_horizontal_active_pixel);
-		buffer[7] = REG_16_8_MSB(av8100_config->
+		buffer[7] = REG_16_8_MSB(adev->config.
 			hdmi_video_output_cmd.total_vertical_in_half_lines);
-		buffer[8] = REG_16_8_LSB(av8100_config->
+		buffer[8] = REG_16_8_LSB(adev->config.
 			hdmi_video_output_cmd.total_vertical_in_half_lines);
-		buffer[9] = REG_16_8_MSB(av8100_config->
+		buffer[9] = REG_16_8_MSB(adev->config.
 			hdmi_video_output_cmd.
 				total_vertical_active_in_half_lines);
-		buffer[10] = REG_16_8_LSB(av8100_config->
+		buffer[10] = REG_16_8_LSB(adev->config.
 			hdmi_video_output_cmd.
 				total_vertical_active_in_half_lines);
-		buffer[11] = REG_16_8_MSB(av8100_config->
+		buffer[11] = REG_16_8_MSB(adev->config.
 			hdmi_video_output_cmd.hsync_start_in_pixel);
-		buffer[12] = REG_16_8_LSB(av8100_config->
+		buffer[12] = REG_16_8_LSB(adev->config.
 			hdmi_video_output_cmd.hsync_start_in_pixel);
-		buffer[13] = REG_16_8_MSB(av8100_config->
+		buffer[13] = REG_16_8_MSB(adev->config.
 			hdmi_video_output_cmd.hsync_length_in_pixel);
-		buffer[14] = REG_16_8_LSB(av8100_config->
+		buffer[14] = REG_16_8_LSB(adev->config.
 			hdmi_video_output_cmd.hsync_length_in_pixel);
-		buffer[15] = REG_16_8_MSB(av8100_config->
+		buffer[15] = REG_16_8_MSB(adev->config.
 			hdmi_video_output_cmd.vsync_start_in_half_line);
-		buffer[16] = REG_16_8_LSB(av8100_config->
+		buffer[16] = REG_16_8_LSB(adev->config.
 			hdmi_video_output_cmd.vsync_start_in_half_line);
-		buffer[17] = REG_16_8_MSB(av8100_config->
+		buffer[17] = REG_16_8_MSB(adev->config.
 			hdmi_video_output_cmd.vsync_length_in_half_line);
-		buffer[18] = REG_16_8_LSB(av8100_config->
+		buffer[18] = REG_16_8_LSB(adev->config.
 			hdmi_video_output_cmd.vsync_length_in_half_line);
-		buffer[19] = REG_16_8_MSB(av8100_config->
+		buffer[19] = REG_16_8_MSB(adev->config.
 			hdmi_video_output_cmd.hor_video_start_pixel);
-		buffer[20] = REG_16_8_LSB(av8100_config->
+		buffer[20] = REG_16_8_LSB(adev->config.
 			hdmi_video_output_cmd.hor_video_start_pixel);
-		buffer[21] = REG_16_8_MSB(av8100_config->
+		buffer[21] = REG_16_8_MSB(adev->config.
 			hdmi_video_output_cmd.vert_video_start_pixel);
-		buffer[22] = REG_16_8_LSB(av8100_config->
+		buffer[22] = REG_16_8_LSB(adev->config.
 			hdmi_video_output_cmd.vert_video_start_pixel);
-		buffer[23] = av8100_config->
-			hdmi_video_output_cmd.video_type;
-		buffer[24] = av8100_config->
-			hdmi_video_output_cmd.pixel_repeat;
-		buffer[25] = REG_32_8_MSB(av8100_config->
+		buffer[23] = adev->config.hdmi_video_output_cmd.video_type;
+		buffer[24] = adev->config.hdmi_video_output_cmd.pixel_repeat;
+		buffer[25] = REG_32_8_MSB(adev->config.
 			hdmi_video_output_cmd.pixel_clock_freq_Hz);
-		buffer[26] = REG_32_8_MMSB(av8100_config->
+		buffer[26] = REG_32_8_MMSB(adev->config.
 			hdmi_video_output_cmd.pixel_clock_freq_Hz);
-		buffer[27] = REG_32_8_MLSB(av8100_config->
+		buffer[27] = REG_32_8_MLSB(adev->config.
 			hdmi_video_output_cmd.pixel_clock_freq_Hz);
-		buffer[28] = REG_32_8_LSB(av8100_config->
+		buffer[28] = REG_32_8_LSB(adev->config.
 			hdmi_video_output_cmd.pixel_clock_freq_Hz);
 
 		*length = AV8100_COMMAND_VIDEO_OUTPUT_FORMAT_SIZE - 1;
@@ -1401,58 +1423,53 @@ static int configuration_video_output_get(char *buffer,
 	return 0;
 }
 
-static int configuration_video_scaling_get(char *buffer,
-	unsigned int *length)
+static int configuration_video_scaling_get(struct av8100_device *adev,
+			char *buffer, unsigned int *length)
 {
-	if (!av8100_config)
-		return AV8100_FAIL;
-
-	buffer[0] = REG_16_8_MSB(av8100_config->hdmi_video_scaling_cmd.
+	buffer[0] = REG_16_8_MSB(adev->config.hdmi_video_scaling_cmd.
 		h_start_in_pixel);
-	buffer[1] = REG_16_8_LSB(av8100_config->hdmi_video_scaling_cmd.
+	buffer[1] = REG_16_8_LSB(adev->config.hdmi_video_scaling_cmd.
 		h_start_in_pixel);
-	buffer[2] = REG_16_8_MSB(av8100_config->hdmi_video_scaling_cmd.
+	buffer[2] = REG_16_8_MSB(adev->config.hdmi_video_scaling_cmd.
 		h_stop_in_pixel);
-	buffer[3] = REG_16_8_LSB(av8100_config->hdmi_video_scaling_cmd.
+	buffer[3] = REG_16_8_LSB(adev->config.hdmi_video_scaling_cmd.
 		h_stop_in_pixel);
-	buffer[4] = REG_16_8_MSB(av8100_config->hdmi_video_scaling_cmd.
+	buffer[4] = REG_16_8_MSB(adev->config.hdmi_video_scaling_cmd.
 		v_start_in_line);
-	buffer[5] = REG_16_8_LSB(av8100_config->hdmi_video_scaling_cmd.
+	buffer[5] = REG_16_8_LSB(adev->config.hdmi_video_scaling_cmd.
 		v_start_in_line);
-	buffer[6] = REG_16_8_MSB(av8100_config->hdmi_video_scaling_cmd.
+	buffer[6] = REG_16_8_MSB(adev->config.hdmi_video_scaling_cmd.
 		v_stop_in_line);
-	buffer[7] = REG_16_8_LSB(av8100_config->hdmi_video_scaling_cmd.
+	buffer[7] = REG_16_8_LSB(adev->config.hdmi_video_scaling_cmd.
 		v_stop_in_line);
-	buffer[8] = REG_16_8_MSB(av8100_config->hdmi_video_scaling_cmd.
+	buffer[8] = REG_16_8_MSB(adev->config.hdmi_video_scaling_cmd.
 		h_start_out_pixel);
-	buffer[9] = REG_16_8_LSB(av8100_config->hdmi_video_scaling_cmd
+	buffer[9] = REG_16_8_LSB(adev->config.hdmi_video_scaling_cmd
 		.h_start_out_pixel);
-	buffer[10] = REG_16_8_MSB(av8100_config->hdmi_video_scaling_cmd.
+	buffer[10] = REG_16_8_MSB(adev->config.hdmi_video_scaling_cmd.
 		h_stop_out_pixel);
-	buffer[11] = REG_16_8_LSB(av8100_config->hdmi_video_scaling_cmd.
+	buffer[11] = REG_16_8_LSB(adev->config.hdmi_video_scaling_cmd.
 		h_stop_out_pixel);
-	buffer[12] = REG_16_8_MSB(av8100_config->hdmi_video_scaling_cmd.
+	buffer[12] = REG_16_8_MSB(adev->config.hdmi_video_scaling_cmd.
 		v_start_out_line);
-	buffer[13] = REG_16_8_LSB(av8100_config->hdmi_video_scaling_cmd.
+	buffer[13] = REG_16_8_LSB(adev->config.hdmi_video_scaling_cmd.
 		v_start_out_line);
-	buffer[14] = REG_16_8_MSB(av8100_config->hdmi_video_scaling_cmd.
+	buffer[14] = REG_16_8_MSB(adev->config.hdmi_video_scaling_cmd.
 		v_stop_out_line);
-	buffer[15] = REG_16_8_LSB(av8100_config->hdmi_video_scaling_cmd.
+	buffer[15] = REG_16_8_LSB(adev->config.hdmi_video_scaling_cmd.
 		v_stop_out_line);
 
 	*length = AV8100_COMMAND_VIDEO_SCALING_FORMAT_SIZE - 1;
 	return 0;
 }
 
-static int configuration_colorspace_conversion_get(char *buffer,
-	unsigned int *length)
+static int configuration_colorspace_conversion_get(struct av8100_device *adev,
+			char *buffer, unsigned int *length)
 {
 	const struct color_conversion_cmd *hdmi_color_space_conversion_cmd;
-	if (!av8100_config)
-		return AV8100_FAIL;
 
 	hdmi_color_space_conversion_cmd =
-		get_color_transform_cmd(av8100_config->color_transform);
+		get_color_transform_cmd(adev, adev->config.color_transform);
 
 	buffer[0] = REG_12_8_MSB(hdmi_color_space_conversion_cmd->c0);
 	buffer[1] = REG_16_8_LSB(hdmi_color_space_conversion_cmd->c0);
@@ -1487,17 +1504,14 @@ static int configuration_colorspace_conversion_get(char *buffer,
 	return 0;
 }
 
-static int configuration_cec_message_write_get(char *buffer,
-	unsigned int *length)
+static int configuration_cec_message_write_get(struct av8100_device *adev,
+			char *buffer, unsigned int *length)
 {
-	if (!av8100_config)
-		return AV8100_FAIL;
-
-	buffer[0] = av8100_config->hdmi_cec_message_write_cmd.buffer_length;
-	memcpy(&buffer[1], av8100_config->hdmi_cec_message_write_cmd.buffer,
-		av8100_config->hdmi_cec_message_write_cmd.buffer_length);
+	buffer[0] = adev->config.hdmi_cec_message_write_cmd.buffer_length;
+	memcpy(&buffer[1], adev->config.hdmi_cec_message_write_cmd.buffer,
+			adev->config.hdmi_cec_message_write_cmd.buffer_length);
 
-	*length = av8100_config->hdmi_cec_message_write_cmd.buffer_length + 1;
+	*length = adev->config.hdmi_cec_message_write_cmd.buffer_length + 1;
 
 	return 0;
 }
@@ -1505,123 +1519,101 @@ static int configuration_cec_message_write_get(char *buffer,
 static int configuration_cec_message_read_get(char *buffer,
 	unsigned int *length)
 {
-	if (!av8100_config)
-		return AV8100_FAIL;
-
 	/* No buffer data */
 	*length = AV8100_COMMAND_CEC_MESSAGE_READ_BACK_SIZE - 1;
 	return 0;
 }
 
-static int configuration_denc_get(char *buffer,
-	unsigned int *length)
+static int configuration_denc_get(struct av8100_device *adev,
+			char *buffer, unsigned int *length)
 {
-	if (!av8100_config)
-		return AV8100_FAIL;
-
-	buffer[0] = av8100_config->hdmi_denc_cmd.cvbs_video_format;
-	buffer[1] = av8100_config->hdmi_denc_cmd.standard_selection;
-	buffer[2] = av8100_config->hdmi_denc_cmd.enable;
-	buffer[3] = av8100_config->hdmi_denc_cmd.macrovision_enable;
-	buffer[4] = av8100_config->hdmi_denc_cmd.internal_generator;
+	buffer[0] = adev->config.hdmi_denc_cmd.cvbs_video_format;
+	buffer[1] = adev->config.hdmi_denc_cmd.standard_selection;
+	buffer[2] = adev->config.hdmi_denc_cmd.enable;
+	buffer[3] = adev->config.hdmi_denc_cmd.macrovision_enable;
+	buffer[4] = adev->config.hdmi_denc_cmd.internal_generator;
 
 	*length = AV8100_COMMAND_DENC_SIZE - 1;
 	return 0;
 }
 
-static int configuration_hdmi_get(char *buffer, unsigned int *length)
+static int configuration_hdmi_get(struct av8100_device *adev,
+			char *buffer, unsigned int *length)
 {
-	if (!av8100_config)
-		return AV8100_FAIL;
-
-	buffer[0] = av8100_config->hdmi_cmd.hdmi_mode;
-	buffer[1] = av8100_config->hdmi_cmd.hdmi_format;
-	buffer[2] = av8100_config->hdmi_cmd.dvi_format;
+	buffer[0] = adev->config.hdmi_cmd.hdmi_mode;
+	buffer[1] = adev->config.hdmi_cmd.hdmi_format;
+	buffer[2] = adev->config.hdmi_cmd.dvi_format;
 
 	*length = AV8100_COMMAND_HDMI_SIZE - 1;
 	return 0;
 }
 
-static int configuration_hdcp_sendkey_get(char *buffer,
-	unsigned int *length)
+static int configuration_hdcp_sendkey_get(struct av8100_device *adev,
+			char *buffer, unsigned int *length)
 {
-	if (!av8100_config)
-		return AV8100_FAIL;
+	buffer[0] = adev->config.hdmi_hdcp_send_key_cmd.key_number;
+	memcpy(&buffer[1], adev->config.hdmi_hdcp_send_key_cmd.data,
+			adev->config.hdmi_hdcp_send_key_cmd.data_len);
 
-	buffer[0] = av8100_config->hdmi_hdcp_send_key_cmd.key_number;
-	memcpy(&buffer[1], av8100_config->hdmi_hdcp_send_key_cmd.data,
-		av8100_config->hdmi_hdcp_send_key_cmd.data_len);
-
-	*length = av8100_config->hdmi_hdcp_send_key_cmd.data_len + 1;
+	*length = adev->config.hdmi_hdcp_send_key_cmd.data_len + 1;
 	return 0;
 }
 
-static int configuration_hdcp_management_get(char *buffer,
-	unsigned int *length)
+static int configuration_hdcp_management_get(struct av8100_device *adev,
+			char *buffer, unsigned int *length)
 {
-	if (!av8100_config)
-		return AV8100_FAIL;
-
-	buffer[0] = av8100_config->hdmi_hdcp_management_format_cmd.req_type;
-	buffer[1] = av8100_config->hdmi_hdcp_management_format_cmd.encr_use;
+	buffer[0] = adev->config.hdmi_hdcp_management_format_cmd.req_type;
+	buffer[1] = adev->config.hdmi_hdcp_management_format_cmd.encr_use;
 
 	*length = AV8100_COMMAND_HDCP_MANAGEMENT_SIZE - 1;
 	return 0;
 }
 
-static int configuration_infoframe_get(char *buffer,
-	unsigned int *length)
+static int configuration_infoframe_get(struct av8100_device *adev,
+			char *buffer, unsigned int *length)
 {
-	if (!av8100_config)
-		return AV8100_FAIL;
-
-	buffer[0] = av8100_config->hdmi_infoframes_cmd.type;
-	buffer[1] = av8100_config->hdmi_infoframes_cmd.version;
-	buffer[2] = av8100_config->hdmi_infoframes_cmd.length;
-	buffer[3] = av8100_config->hdmi_infoframes_cmd.crc;
-	memcpy(&buffer[4], av8100_config->hdmi_infoframes_cmd.data,
+	buffer[0] = adev->config.hdmi_infoframes_cmd.type;
+	buffer[1] = adev->config.hdmi_infoframes_cmd.version;
+	buffer[2] = adev->config.hdmi_infoframes_cmd.length;
+	buffer[3] = adev->config.hdmi_infoframes_cmd.crc;
+	memcpy(&buffer[4], adev->config.hdmi_infoframes_cmd.data,
 	HDMI_INFOFRAME_DATA_SIZE);
 
-	*length = av8100_config->hdmi_infoframes_cmd.length + 4;
+	*length = adev->config.hdmi_infoframes_cmd.length + 4;
 	return 0;
 }
 
-static int av8100_edid_section_readback_get(char *buffer, unsigned int *length)
+static int av8100_edid_section_readback_get(struct av8100_device *adev,
+			char *buffer, unsigned int *length)
 {
-	buffer[0] = av8100_config->hdmi_edid_section_readback_cmd.address;
-	buffer[1] = av8100_config->hdmi_edid_section_readback_cmd.
+	buffer[0] = adev->config.hdmi_edid_section_readback_cmd.address;
+	buffer[1] = adev->config.hdmi_edid_section_readback_cmd.
 		block_number;
 
 	*length = AV8100_COMMAND_EDID_SECTION_READBACK_SIZE - 1;
 	return 0;
 }
 
-static int configuration_pattern_generator_get(char *buffer,
-	unsigned int *length)
+static int configuration_pattern_generator_get(struct av8100_device *adev,
+			char *buffer, unsigned int *length)
 {
-	if (!av8100_config)
-		return AV8100_FAIL;
-
-	buffer[0] = av8100_config->hdmi_pattern_generator_cmd.pattern_type;
-	buffer[1] = av8100_config->hdmi_pattern_generator_cmd.
+	buffer[0] = adev->config.hdmi_pattern_generator_cmd.pattern_type;
+	buffer[1] = adev->config.hdmi_pattern_generator_cmd.
 		pattern_video_format;
-	buffer[2] = av8100_config->hdmi_pattern_generator_cmd.
+	buffer[2] = adev->config.hdmi_pattern_generator_cmd.
 		pattern_audio_mode;
 
 	*length = AV8100_COMMAND_PATTERNGENERATOR_SIZE - 1;
 	return 0;
 }
 
-static int configuration_fuse_aes_key_get(char *buffer,
-	unsigned int *length)
+static int configuration_fuse_aes_key_get(struct av8100_device *adev,
+			char *buffer, unsigned int *length)
 {
-	if (!av8100_config)
-		return AV8100_FAIL;
-
-	buffer[0] = av8100_config->hdmi_fuse_aes_key_cmd.fuse_operation;
-	if (av8100_config->hdmi_fuse_aes_key_cmd.fuse_operation) {
+	buffer[0] = adev->config.hdmi_fuse_aes_key_cmd.fuse_operation;
+	if (adev->config.hdmi_fuse_aes_key_cmd.fuse_operation) {
 		/* Write key command */
-		memcpy(&buffer[1], av8100_config->hdmi_fuse_aes_key_cmd.key,
+		memcpy(&buffer[1], adev->config.hdmi_fuse_aes_key_cmd.key,
 			HDMI_FUSE_AES_KEY_SIZE);
 
 		*length = AV8100_COMMAND_FUSE_AES_KEY_SIZE - 1;
@@ -1636,15 +1628,16 @@ static int get_command_return_first(struct i2c_client *i2c,
 		enum av8100_command_type command_type) {
 	int retval = 0;
 	char val;
+	struct device *dev = &i2c->dev;
 
 	retval = read_single_byte(i2c, AV8100_COMMAND_OFFSET, &val);
 	if (retval) {
-		dev_dbg(av8100dev, "%s 1st ret failed\n", __func__);
+		dev_dbg(dev, "%s 1st ret failed\n", __func__);
 		return retval;
 	}
 
 	if (val != (0x80 | command_type)) {
-		dev_dbg(av8100dev, "%s 1st ret wrong:%x\n", __func__, val);
+		dev_dbg(dev, "%s 1st ret wrong:%x\n", __func__, val);
 		return -EFAULT;
 	}
 
@@ -1660,6 +1653,7 @@ static int get_command_return_data(struct i2c_client *i2c,
 	int retval = 0;
 	char val;
 	int index = 0;
+	struct device *dev = &i2c->dev;
 
 	if (buffer_length)
 		*buffer_length = 0;
@@ -1682,14 +1676,14 @@ static int get_command_return_data(struct i2c_client *i2c,
 			goto get_command_return_data_fail2r;
 
 		if (val) {
-			retval = AV8100_FAIL;
+			retval = -EFAULT;
 			goto get_command_return_data_fail2v;
 		}
 		break;
 
 	case AV8100_COMMAND_CEC_MESSAGE_READ_BACK:
 		if ((buffer == NULL) ||	(buffer_length == NULL)) {
-			retval = AV8100_FAIL;
+			retval = -EINVAL;
 			goto get_command_return_data_fail;
 		}
 
@@ -1698,17 +1692,17 @@ static int get_command_return_data(struct i2c_client *i2c,
 		if (retval)
 			goto get_command_return_data_fail;
 
-		dev_dbg(av8100dev, "cec buflen:%d\n", val);
+		dev_dbg(dev, "cec buflen:%d\n", val);
 		*buffer_length = val;
 
 		if (*buffer_length >
 			HDMI_CEC_READ_MAXSIZE) {
-			dev_dbg(av8100dev, "CEC size too large %d\n",
+			dev_dbg(dev, "CEC size too large %d\n",
 				*buffer_length);
 			*buffer_length = HDMI_CEC_READ_MAXSIZE;
 		}
 
-		dev_dbg(av8100dev, "return data: ");
+		dev_dbg(dev, "return data: ");
 
 		/* Get the return buffer */
 		for (index = 0; index < *buffer_length; ++index) {
@@ -1719,11 +1713,11 @@ static int get_command_return_data(struct i2c_client *i2c,
 				goto get_command_return_data_fail;
 			} else {
 				*(buffer + index) = val;
-				dev_dbg(av8100dev, "%02x ", *(buffer + index));
+				dev_dbg(dev, "%02x ", *(buffer + index));
 			}
 		}
 
-		dev_dbg(av8100dev, "\n");
+		dev_dbg(dev, "\n");
 		break;
 
 	case AV8100_COMMAND_HDCP_MANAGEMENT:
@@ -1747,7 +1741,7 @@ static int get_command_return_data(struct i2c_client *i2c,
 			/* Ignore return data */
 			break;
 
-		dev_dbg(av8100dev, "req_type:%02x ", command_buffer[0]);
+		dev_dbg(dev, "req_type:%02x ", command_buffer[0]);
 
 		/* Check if revoc list data is requested */
 		if (command_buffer[0] !=
@@ -1756,7 +1750,7 @@ static int get_command_return_data(struct i2c_client *i2c,
 			break;
 		}
 
-		dev_dbg(av8100dev, "return data: ");
+		dev_dbg(dev, "return data: ");
 
 		/* Get the return buffer */
 		for (cnt = 0; cnt < HDMI_HDCP_MGMT_BKSV_SIZE; cnt++) {
@@ -1767,7 +1761,7 @@ static int get_command_return_data(struct i2c_client *i2c,
 				goto get_command_return_data_fail;
 			} else {
 				*(buffer + index) = val;
-				dev_dbg(av8100dev, "%02x ", *(buffer + index));
+				dev_dbg(dev, "%02x ", *(buffer + index));
 			}
 			index++;
 		}
@@ -1780,7 +1774,7 @@ static int get_command_return_data(struct i2c_client *i2c,
 			goto get_command_return_data_fail;
 		} else {
 			*(buffer + index) = nrdev;
-			dev_dbg(av8100dev, "%02x ", *(buffer + index));
+			dev_dbg(dev, "%02x ", *(buffer + index));
 		}
 		index++;
 
@@ -1800,7 +1794,7 @@ static int get_command_return_data(struct i2c_client *i2c,
 					goto get_command_return_data_fail;
 				} else {
 					*(buffer + index) = val;
-					dev_dbg(av8100dev, "%02x ",
+					dev_dbg(dev, "%02x ",
 							*(buffer + index));
 				}
 				index++;
@@ -1818,7 +1812,7 @@ static int get_command_return_data(struct i2c_client *i2c,
 				goto get_command_return_data_fail;
 			} else {
 				*(buffer + index) = val;
-				dev_dbg(av8100dev, "%02x ", *(buffer + index));
+				dev_dbg(dev, "%02x ", *(buffer + index));
 			}
 			index++;
 		}
@@ -1826,20 +1820,20 @@ static int get_command_return_data(struct i2c_client *i2c,
 hdcp_management_end:
 		*buffer_length = index;
 
-		dev_dbg(av8100dev, "\n");
+		dev_dbg(dev, "\n");
 		}
 		break;
 
 	case AV8100_COMMAND_EDID_SECTION_READBACK:
 		if ((buffer == NULL) ||	(buffer_length == NULL)) {
-			retval = AV8100_FAIL;
+			retval = -EINVAL;
 			goto get_command_return_data_fail;
 		}
 
 		/* Return buffer length is fixed */
 		*buffer_length = HDMI_EDIDREAD_SIZE;
 
-		dev_dbg(av8100dev, "return data: ");
+		dev_dbg(dev, "return data: ");
 
 		/* Get the return buffer */
 		for (index = 0; index < *buffer_length; ++index) {
@@ -1850,16 +1844,16 @@ hdcp_management_end:
 				goto get_command_return_data_fail;
 			} else {
 				*(buffer + index) = val;
-				dev_dbg(av8100dev, "%02x ", *(buffer + index));
+				dev_dbg(dev, "%02x ", *(buffer + index));
 			}
 		}
 
-		dev_dbg(av8100dev, "\n");
+		dev_dbg(dev, "\n");
 		break;
 
 	case AV8100_COMMAND_FUSE_AES_KEY:
 		if ((buffer == NULL) ||	(buffer_length == NULL)) {
-			retval = AV8100_FAIL;
+			retval = -EINVAL;
 			goto get_command_return_data_fail;
 		}
 
@@ -1872,7 +1866,7 @@ hdcp_management_end:
 
 		/* Check the second return byte */
 		if (val) {
-			retval = AV8100_FAIL;
+			retval = -EFAULT;
 			goto get_command_return_data_fail2v;
 		}
 
@@ -1886,7 +1880,7 @@ hdcp_management_end:
 			goto get_command_return_data_fail;
 
 		*buffer = val;
-		dev_dbg(av8100dev, "CRC:%02x ", val);
+		dev_dbg(dev, "CRC:%02x ", val);
 
 		/* Get programmed status */
 		retval = read_single_byte(i2c,
@@ -1896,13 +1890,13 @@ hdcp_management_end:
 
 		*(buffer + 1) = val;
 
-		dev_dbg(av8100dev, "programmed:%02x ", val);
+		dev_dbg(dev, "programmed:%02x ", val);
 		break;
 
 	case AV8100_COMMAND_HDCP_SENDKEY:
 		if ((command_buffer[0] == HDMI_LOADAES_END_BLK_NR) &&
 			((buffer == NULL) || (buffer_length == NULL))) {
-			retval = AV8100_FAIL;
+			retval = -EINVAL;
 			goto get_command_return_data_fail;
 		}
 
@@ -1913,7 +1907,7 @@ hdcp_management_end:
 			goto get_command_return_data_fail2r;
 
 		if (val) {
-			retval = AV8100_FAIL;
+			retval = -EFAULT;
 			goto get_command_return_data_fail2v;
 		}
 
@@ -1921,13 +1915,13 @@ hdcp_management_end:
 			/* Return CRC32 if last AES block */
 			int cnt;
 
-			dev_dbg(av8100dev, "CRC32:");
+			dev_dbg(dev, "CRC32:");
 			for (cnt = 0; cnt < HDMI_CRC32_SIZE; cnt++) {
 				if (read_single_byte(i2c,
 					AV8100_CRC32_OFFSET + cnt, &val))
 					goto get_command_return_data_fail;
 				*(buffer + cnt) = val;
-				dev_dbg(av8100dev, "%02x", val);
+				dev_dbg(dev, "%02x", val);
 			}
 
 			*buffer_length = HDMI_CRC32_SIZE;
@@ -1935,53 +1929,53 @@ hdcp_management_end:
 		break;
 
 	default:
-		retval = AV8100_INVALID_COMMAND;
+		retval = -EFAULT;
 		break;
 	}
 
 	return retval;
 get_command_return_data_fail2r:
-	dev_dbg(av8100dev, "%s Reading 2nd return byte failed\n", __func__);
+	dev_dbg(dev, "%s Reading 2nd return byte failed\n", __func__);
 	return retval;
 get_command_return_data_fail2v:
-	dev_dbg(av8100dev, "%s 2nd return byte is wrong:%x\n", __func__, val);
+	dev_dbg(dev, "%s 2nd return byte is wrong:%x\n", __func__, val);
 	return retval;
 get_command_return_data_fail:
-	dev_dbg(av8100dev, "%s FAIL\n", __func__);
+	dev_dbg(dev, "%s FAIL\n", __func__);
 	return retval;
 }
 
-static int av8100_powerup1(void)
+static int av8100_powerup1(struct av8100_device *adev)
 {
 	int retval;
-	struct av8100_platform_data *pdata = av8100dev->platform_data;
+	struct av8100_platform_data *pdata = adev->dev->platform_data;
 
 	/* Regulator enable */
-	if ((av8100_globals->regulator_pwr) &&
-			(av8100_globals->regulator_requested == false)) {
-		retval = regulator_enable(av8100_globals->regulator_pwr);
+	if ((adev->params.regulator_pwr) &&
+			(adev->params.regulator_requested == false)) {
+		retval = regulator_enable(adev->params.regulator_pwr);
 		if (retval < 0) {
-			dev_warn(av8100dev, "%s: regulator_enable failed\n",
+			dev_warn(adev->dev, "%s: regulator_enable failed\n",
 			__func__);
 			return retval;
 		}
-		dev_dbg(av8100dev, "regulator_enable ok\n");
-		av8100_globals->regulator_requested = true;
+		dev_dbg(adev->dev, "regulator_enable ok\n");
+		adev->params.regulator_requested = true;
 	}
 
 	/* Reset av8100 */
 	gpio_set_value(pdata->reset, 1);
 
 	/* Need to wait before proceeding */
-	msleep(AV8100_WAITTIME_1MS);
+	mdelay(AV8100_WAITTIME_1MS);
 
-	av8100_set_state(AV8100_OPMODE_STANDBY);
+	av8100_set_state(adev, AV8100_OPMODE_STANDBY);
 
 	if (pdata->alt_powerupseq) {
-		dev_dbg(av8100dev, "powerup seq alt\n");
+		dev_dbg(adev->dev, "powerup seq alt\n");
 		retval = av8100_5V_w(0, 0, AV8100_ON_TIME);
 		if (retval) {
-			dev_err(av8100dev, "%s reg_wr err 1\n", __func__);
+			dev_err(adev->dev, "%s reg_wr err 1\n", __func__);
 			goto av8100_powerup1_err;
 		}
 
@@ -1993,7 +1987,7 @@ static int av8100_powerup1(void)
 				AV8100_STANDBY_PENDING_INTERRUPT_ONI_LOW,
 				AV8100_STANDBY_PENDING_INTERRUPT_BPDIG_HIGH);
 		if (retval) {
-			dev_err(av8100dev, "%s reg_wr err 2\n", __func__);
+			dev_err(adev->dev, "%s reg_wr err 2\n", __func__);
 			goto av8100_powerup1_err;
 		}
 
@@ -2002,20 +1996,20 @@ static int av8100_powerup1(void)
 		retval = av8100_reg_stby_w(AV8100_STANDBY_CPD_LOW,
 				AV8100_STANDBY_STBY_HIGH, pdata->mclk_freq);
 		if (retval) {
-			dev_err(av8100dev, "%s reg_wr err 3\n", __func__);
+			dev_err(adev->dev, "%s reg_wr err 3\n", __func__);
 			goto av8100_powerup1_err;
 		}
 
-		msleep(AV8100_WAITTIME_1MS);
+		mdelay(AV8100_WAITTIME_1MS);
 
 		retval = av8100_reg_stby_w(AV8100_STANDBY_CPD_LOW,
 				AV8100_STANDBY_STBY_LOW, pdata->mclk_freq);
 		if (retval) {
-			dev_err(av8100dev, "%s reg_wr err 4\n", __func__);
+			dev_err(adev->dev, "%s reg_wr err 4\n", __func__);
 			goto av8100_powerup1_err;
 		}
 
-		msleep(AV8100_WAITTIME_1MS);
+		mdelay(AV8100_WAITTIME_1MS);
 
 		retval = av8100_reg_stby_pend_int_w(
 				AV8100_STANDBY_PENDING_INTERRUPT_HPDI_LOW,
@@ -2023,30 +2017,31 @@ static int av8100_powerup1(void)
 				AV8100_STANDBY_PENDING_INTERRUPT_ONI_LOW,
 				AV8100_STANDBY_PENDING_INTERRUPT_BPDIG_LOW);
 		if (retval) {
-			dev_err(av8100dev, "%s reg_wr err 5\n", __func__);
+			dev_err(adev->dev, "%s reg_wr err 5\n", __func__);
 			goto av8100_powerup1_err;
 		}
 
-		msleep(AV8100_WAITTIME_1MS);
+		mdelay(AV8100_WAITTIME_1MS);
 	}
 
 	/* Get chip version */
-	retval = av8100_reg_stby_pend_int_r(NULL, NULL, NULL, &chip_version);
+	retval = av8100_reg_stby_pend_int_r(NULL, NULL, NULL,
+					&adev->chip_version);
 	if (retval) {
-		dev_err(av8100dev, "Failed to read chip version\n");
+		dev_err(adev->dev, "Failed to read chip version\n");
 		goto av8100_powerup1_err;
 	}
 
-	dev_info(av8100dev, "chip version:%d\n", chip_version);
+	dev_info(adev->dev, "chip version:%d\n", adev->chip_version);
 
-	switch (chip_version) {
+	switch (adev->chip_version) {
 	case AV8100_CHIPVER_1:
 	case AV8100_CHIPVER_2:
 		break;
 
 	default:
-		dev_err(av8100dev, "Unsupported chip version:%d\n",
-			chip_version);
+		dev_err(adev->dev, "Unsupported chip version:%d\n",
+				adev->chip_version);
 		goto av8100_powerup1_err;
 		break;
 	}
@@ -2058,23 +2053,23 @@ av8100_powerup1_err:
 	return -EFAULT;
 }
 
-static int av8100_powerup2(void)
+static int av8100_powerup2(struct av8100_device *adev)
 {
 	int retval;
 
 	/* ON time & OFF time on 5v HDMI plug detect */
-	retval = av8100_5V_w(av8100_globals->denc_off_time,
-				av8100_globals->hdmi_off_time,
-				av8100_globals->on_time);
+	retval = av8100_5V_w(adev->params.denc_off_time,
+				adev->params.hdmi_off_time,
+				adev->params.on_time);
 	if (retval) {
-		dev_err(av8100dev,
+		dev_err(adev->dev,
 			"Failed to write the value to av8100 register\n");
 		return retval;
 	}
 
-	msleep(AV8100_WAITTIME_1MS);
+	mdelay(AV8100_WAITTIME_1MS);
 
-	av8100_set_state(AV8100_OPMODE_SCAN);
+	av8100_set_state(adev, AV8100_OPMODE_SCAN);
 
 	return 0;
 }
@@ -2083,19 +2078,21 @@ static int register_read_internal(u8 offset, u8 *value)
 {
 	int retval = 0;
 	struct i2c_client *i2c;
+	struct av8100_device *adev;
 
-	if (av8100_status_get().av8100_state <= AV8100_OPMODE_SHUTDOWN)
-		return -EINVAL;
+	adev = devnr_to_adev(AV8100_DEVNR_DEFAULT);
+	if (!adev)
+		return -EFAULT;
 
-	if (!av8100_config)
+	if (av8100_status_get().av8100_state <= AV8100_OPMODE_SHUTDOWN)
 		return -EINVAL;
 
-	i2c = av8100_config->client;
+	i2c = adev->config.client;
 
 	/* Read from register */
 	retval = read_single_byte(i2c, offset, value);
 	if (retval)	{
-		dev_dbg(av8100dev,
+		dev_dbg(adev->dev,
 			"Failed to read the value from av8100 register\n");
 		return -EFAULT;
 	}
@@ -2107,16 +2104,18 @@ static int register_write_internal(u8 offset, u8 value)
 {
 	int retval;
 	struct i2c_client *i2c;
+	struct av8100_device *adev;
 
-	if (!av8100_config)
-		return -EINVAL;
+	adev = devnr_to_adev(AV8100_DEVNR_DEFAULT);
+	if (!adev)
+		return -EFAULT;
 
-	i2c = av8100_config->client;
+	i2c = adev->config.client;
 
 	/* Write to register */
 	retval = write_single_byte(i2c, offset, value);
 	if (retval) {
-		dev_dbg(av8100dev,
+		dev_dbg(adev->dev,
 			"Failed to write the value to av8100 register\n");
 		return -EFAULT;
 	}
@@ -2127,12 +2126,19 @@ static int register_write_internal(u8 offset, u8 value)
 int av8100_powerscan(void)
 {
 	int retval;
-	struct av8100_platform_data *pdata = av8100dev->platform_data;
+	struct av8100_device *adev;
+	struct av8100_platform_data *pdata;
 
-	dev_dbg(av8100dev, "%s\n", __func__);
+	adev = devnr_to_adev(AV8100_DEVNR_DEFAULT);
+	if (!adev)
+		return -EFAULT;
+
+	pdata = adev->dev->platform_data;
+
+	dev_dbg(adev->dev, "%s\n", __func__);
 
 	if (av8100_status_get().av8100_state > AV8100_OPMODE_SCAN) {
-		dev_dbg(av8100dev, "set to scan mode\n");
+		dev_dbg(adev->dev, "set to scan mode\n");
 
 		av8100_disable_interrupt();
 
@@ -2140,32 +2146,32 @@ int av8100_powerscan(void)
 		retval = av8100_reg_stby_w(AV8100_STANDBY_CPD_LOW,
 			AV8100_STANDBY_STBY_LOW, pdata->mclk_freq);
 		if (retval) {
-			dev_err(av8100dev,
+			dev_err(adev->dev,
 				"Failed to write to av8100 register\n");
 			return retval;
 		}
 
 		/* Remove APE OPP requirement */
-		if (av8100_globals->opp_requested) {
+		if (adev->params.opp_requested) {
 			prcmu_qos_remove_requirement(PRCMU_QOS_APE_OPP,
-					(char *)av8100_miscdev.name);
+					(char *)adev->miscdev.name);
 			prcmu_qos_remove_requirement(PRCMU_QOS_DDR_OPP,
-					(char *)av8100_miscdev.name);
-			av8100_globals->opp_requested = false;
+					(char *)adev->miscdev.name);
+			adev->params.opp_requested = false;
 		}
 
 		/* Clock disable */
-		if (av8100_globals->inputclk &&
-				av8100_globals->inputclk_requested) {
-			clk_disable(av8100_globals->inputclk);
-			av8100_globals->inputclk_requested = false;
+		if (adev->params.inputclk &&
+				adev->params.inputclk_requested) {
+			clk_disable(adev->params.inputclk);
+			adev->params.inputclk_requested = false;
 		}
 
-		msleep(AV8100_WAITTIME_1MS);
+		mdelay(AV8100_WAITTIME_1MS);
 
 		av8100_enable_interrupt();
 
-		av8100_set_state(AV8100_OPMODE_SCAN);
+		av8100_set_state(adev, AV8100_OPMODE_SCAN);
 	}
 
 	return 0;
@@ -2175,20 +2181,25 @@ EXPORT_SYMBOL(av8100_powerscan);
 int av8100_powerup(void)
 {
 	int ret = 0;
+	struct av8100_device *adev;
+
+	adev = devnr_to_adev(AV8100_DEVNR_DEFAULT);
+	if (!adev)
+		return -EFAULT;
 
 	if (av8100_status_get().av8100_state == AV8100_OPMODE_UNDEFINED)
 		return -EINVAL;
 
 	if (av8100_status_get().av8100_state < AV8100_OPMODE_STANDBY) {
-		ret = av8100_powerup1();
+		ret = av8100_powerup1(adev);
 		if (ret) {
-			dev_err(av8100dev, "av8100_powerup1 fail\n");
+			dev_err(adev->dev, "av8100_powerup1 fail\n");
 			return -EFAULT;
 		}
 	}
 
 	if (av8100_status_get().av8100_state < AV8100_OPMODE_SCAN)
-		ret = av8100_powerup2();
+		ret = av8100_powerup2(adev);
 
 	av8100_enable_interrupt();
 
@@ -2199,11 +2210,18 @@ EXPORT_SYMBOL(av8100_powerup);
 int av8100_powerdown(void)
 {
 	int retval = 0;
+	struct av8100_device *adev;
+	struct av8100_platform_data *pdata;
+
+	adev = devnr_to_adev(AV8100_DEVNR_DEFAULT);
+	if (!adev)
+		return -EFAULT;
 
-	struct av8100_platform_data *pdata = av8100dev->platform_data;
+	pdata = adev->dev->platform_data;
 
 	if (av8100_status_get().av8100_state <= AV8100_OPMODE_SHUTDOWN)
 		goto av8100_powerdown_end;
+
 	av8100_disable_interrupt();
 
 	if (pdata->alt_powerupseq) {
@@ -2214,39 +2232,39 @@ int av8100_powerdown(void)
 				AV8100_STANDBY_PENDING_INTERRUPT_BPDIG_HIGH);
 
 		if (retval)
-			dev_err(av8100dev, "%s reg_wr err\n", __func__);
+			dev_err(adev->dev, "%s reg_wr err\n", __func__);
 		msleep(AV8100_WAITTIME_50MS);
 	}
 
 	/* Remove APE OPP requirement */
-	if (av8100_globals->opp_requested) {
+	if (adev->params.opp_requested) {
 		prcmu_qos_remove_requirement(PRCMU_QOS_APE_OPP,
-				(char *)av8100_miscdev.name);
+				(char *)adev->miscdev.name);
 		prcmu_qos_remove_requirement(PRCMU_QOS_DDR_OPP,
-				(char *)av8100_miscdev.name);
-		av8100_globals->opp_requested = false;
+				(char *)adev->miscdev.name);
+		adev->params.opp_requested = false;
 	}
 
 	/* Clock disable */
-	if (av8100_globals->inputclk && av8100_globals->inputclk_requested) {
-		clk_disable(av8100_globals->inputclk);
-		av8100_globals->inputclk_requested = false;
+	if (adev->params.inputclk && adev->params.inputclk_requested) {
+		clk_disable(adev->params.inputclk);
+		adev->params.inputclk_requested = false;
 	}
 
 	/* Regulator disable */
-	if ((av8100_globals->regulator_pwr) &&
-			(av8100_globals->regulator_requested)) {
-		dev_dbg(av8100dev, "regulator_disable\n");
-		regulator_disable(av8100_globals->regulator_pwr);
-		av8100_globals->regulator_requested = false;
+	if ((adev->params.regulator_pwr) &&
+			(adev->params.regulator_requested)) {
+		dev_dbg(adev->dev, "regulator_disable\n");
+		regulator_disable(adev->params.regulator_pwr);
+		adev->params.regulator_requested = false;
 	}
 
 	gpio_set_value(pdata->reset, 0);
 
 	if (pdata->alt_powerupseq)
-		msleep(AV8100_WAITTIME_5MS);
+		mdelay(AV8100_WAITTIME_5MS);
 
-	av8100_set_state(AV8100_OPMODE_SHUTDOWN);
+	av8100_set_state(adev, AV8100_OPMODE_SHUTDOWN);
 
 av8100_powerdown_end:
 	return retval;
@@ -2271,66 +2289,85 @@ int av8100_download_firmware(char *fw_buf, int nbytes,
 	u8 hld;
 	u8 wa;
 	u8 ra;
-	struct av8100_platform_data *pdata = av8100dev->platform_data;
+	struct av8100_platform_data *pdata;
 	const struct firmware *fw_file;
 	u8 *fw_buff;
 	int fw_bytes;
+	struct av8100_device *adev;
+	struct av8100_status status;
 
-	if (av8100_status_get().av8100_state <= AV8100_OPMODE_SHUTDOWN)
+	adev = devnr_to_adev(AV8100_DEVNR_DEFAULT);
+	if (!adev)
 		return -EINVAL;
 
-	if (!av8100_config)
-		return -EINVAL;
+	LOCK_AV8100_FWDL;
+
+	status = av8100_status_get();
+	if (status.av8100_state <= AV8100_OPMODE_SHUTDOWN) {
+		retval = -EINVAL;
+		goto av8100_download_firmware_err2;
+	}
+
+	if (status.av8100_state >= AV8100_OPMODE_INIT) {
+		dev_dbg(adev->dev, "FW already ok\n");
+		retval = 0;
+		goto av8100_download_firmware_err2;
+	}
+
+	av8100_set_state(adev, AV8100_OPMODE_INIT);
+
+	pdata = adev->dev->platform_data;
 
 	/* Request firmware */
 	if (request_firmware(&fw_file,
 			       AV8100_FW_FILENAME,
-			       av8100dev)) {
-		dev_err(av8100dev, "fw request failed\n");
-		return -EFAULT;
+			       adev->dev)) {
+		dev_err(adev->dev, "fw request failed\n");
+		retval = -EFAULT;
+		goto av8100_download_firmware_err2;
 	}
 
 	/* Master clock timing, running */
 	retval = av8100_reg_stby_w(AV8100_STANDBY_CPD_LOW,
 		AV8100_STANDBY_STBY_HIGH, pdata->mclk_freq);
 	if (retval) {
-		dev_err(av8100dev,
+		dev_err(adev->dev,
 			"Failed to write the value to av8100 register\n");
 		goto av8100_download_firmware_err;
 	}
 
-	msleep(AV8100_WAITTIME_1MS);
+	mdelay(AV8100_WAITTIME_1MS);
 
 	/* Clock enable */
-	if (av8100_globals->inputclk &&
-			av8100_globals->inputclk_requested == false) {
-		if (clk_enable(av8100_globals->inputclk)) {
-			dev_err(av8100dev, "inputclk en failed\n");
+	if (adev->params.inputclk &&
+			adev->params.inputclk_requested == false) {
+		if (clk_enable(adev->params.inputclk)) {
+			dev_err(adev->dev, "inputclk en failed\n");
 			retval = -EFAULT;
 			goto av8100_download_firmware_err;
 		}
 
-		av8100_globals->inputclk_requested = true;
+		adev->params.inputclk_requested = true;
 	}
 
 	/* Request 100% APE OPP */
-	if (av8100_globals->opp_requested == false) {
+	if (adev->params.opp_requested == false) {
 		if (prcmu_qos_add_requirement(PRCMU_QOS_APE_OPP,
-				(char *)av8100_miscdev.name, 100)) {
-			dev_err(av8100dev, "APE OPP 100 failed\n");
+				(char *)adev->miscdev.name, 100)) {
+			dev_err(adev->dev, "APE OPP 100 failed\n");
 			retval = -EFAULT;
 			goto av8100_download_firmware_err;
 		}
 		if (prcmu_qos_add_requirement(PRCMU_QOS_DDR_OPP,
-				(char *)av8100_miscdev.name, 100)) {
-			dev_err(av8100dev, "DDR OPP 100 failed\n");
+				(char *)adev->miscdev.name, 100)) {
+			dev_err(adev->dev, "DDR OPP 100 failed\n");
 			prcmu_qos_remove_requirement(PRCMU_QOS_APE_OPP,
-					(char *)av8100_miscdev.name);
+					(char *)adev->miscdev.name);
 			retval = -EFAULT;
 			goto av8100_download_firmware_err;
 		}
 
-		av8100_globals->opp_requested = true;
+		adev->params.opp_requested = true;
 	}
 
 	msleep(AV8100_WAITTIME_10MS);
@@ -2338,9 +2375,9 @@ int av8100_download_firmware(char *fw_buf, int nbytes,
 	/* Prepare firmware data */
 	fw_bytes = fw_file->size;
 	fw_buff = (u8 *)fw_file->data;
-	dev_dbg(av8100dev, "fw size:%d\n", fw_bytes);
+	dev_dbg(adev->dev, "fw size:%d\n", fw_bytes);
 
-	i2c = av8100_config->client;
+	i2c = adev->config.client;
 
 	/* Enable firmware download */
 	retval = av8100_reg_gen_ctrl_w(
@@ -2349,7 +2386,7 @@ int av8100_download_firmware(char *fw_buf, int nbytes,
 		AV8100_GENERAL_CONTROL_WA_LOW,
 		AV8100_GENERAL_CONTROL_RA_LOW);
 	if (retval) {
-		dev_err(av8100dev,
+		dev_err(adev->dev,
 			"Failed to write the value to av8100 register\n");
 		retval = -EFAULT;
 		goto av8100_download_firmware_err;
@@ -2357,12 +2394,12 @@ int av8100_download_firmware(char *fw_buf, int nbytes,
 
 	retval = av8100_reg_gen_ctrl_r(&fdl, &hld, &wa, &ra);
 	if (retval) {
-		dev_err(av8100dev,
+		dev_err(adev->dev,
 			"Failed to read the value from av8100 register\n");
 		retval = -EFAULT;
 		goto av8100_download_firmware_err;
 	} else {
-		dev_dbg(av8100dev, "GENERAL_CONTROL_REG register fdl:%d "
+		dev_dbg(adev->dev, "GENERAL_CONTROL_REG register fdl:%d "
 			"hld:%d wa:%d ra:%d\n", fdl, hld, wa, ra);
 	}
 
@@ -2376,14 +2413,14 @@ int av8100_download_firmware(char *fw_buf, int nbytes,
 				AV8100_FIRMWARE_DOWNLOAD_ENTRY, fw_buff + size,
 				increment);
 			if (retval) {
-				dev_dbg(av8100dev, "Failed to download the "
+				dev_dbg(adev->dev, "Failed to download the "
 					"av8100 firmware\n");
 				UNLOCK_AV8100_HW;
 				retval = -EFAULT;
 				goto av8100_download_firmware_err;
 			}
 		} else if (if_type == DSI_INTERFACE) {
-			dev_dbg(av8100dev,
+			dev_dbg(adev->dev,
 				"DSI_INTERFACE is currently not supported\n");
 			UNLOCK_AV8100_HW;
 			retval = -EINVAL;
@@ -2400,7 +2437,7 @@ int av8100_download_firmware(char *fw_buf, int nbytes,
 		retval = write_multi_byte(i2c,
 			AV8100_FIRMWARE_DOWNLOAD_ENTRY, fw_buff + size, temp);
 		if (retval) {
-			dev_dbg(av8100dev,
+			dev_dbg(adev->dev,
 				"Failed to download the av8100 firmware\n");
 			UNLOCK_AV8100_HW;
 			retval = -EFAULT;
@@ -2425,23 +2462,23 @@ int av8100_download_firmware(char *fw_buf, int nbytes,
 
 	retval = av8100_reg_fw_dl_entry_r(&val);
 	if (retval) {
-		dev_dbg(av8100dev,
+		dev_dbg(adev->dev,
 			"Failed to read the value from the av8100 register\n");
 		retval = -EFAULT;
 		goto av8100_download_firmware_err;
 	}
 
-	dev_dbg(av8100dev, "checksum:%x,val:%x\n", checksum, val);
+	dev_dbg(adev->dev, "checksum:%x,val:%x\n", checksum, val);
 
 	if (checksum != val) {
-		dev_dbg(av8100dev,
+		dev_dbg(adev->dev,
 			">Fw downloading.... FAIL checksum issue\n");
-		dev_dbg(av8100dev, "checksum = %d\n", checksum);
-		dev_dbg(av8100dev, "checksum read: %d\n", val);
+		dev_dbg(adev->dev, "checksum = %d\n", checksum);
+		dev_dbg(adev->dev, "checksum read: %d\n", val);
 		retval = -EFAULT;
 		goto av8100_download_firmware_err;
 	} else {
-		dev_dbg(av8100dev, ">Fw downloading.... success\n");
+		dev_dbg(adev->dev, ">Fw downloading.... success\n");
 	}
 
 	/* Set to idle mode */
@@ -2449,7 +2486,7 @@ int av8100_download_firmware(char *fw_buf, int nbytes,
 		AV8100_GENERAL_CONTROL_HLD_LOW,	AV8100_GENERAL_CONTROL_WA_LOW,
 		AV8100_GENERAL_CONTROL_RA_LOW);
 	if (retval) {
-		dev_dbg(av8100dev,
+		dev_dbg(adev->dev,
 			"Failed to write the value to the av8100 register\n");
 		retval = -EFAULT;
 		goto av8100_download_firmware_err;
@@ -2460,47 +2497,75 @@ int av8100_download_firmware(char *fw_buf, int nbytes,
 	cnt_max = sizeof(waittime_retry);
 	retval = av8100_reg_gen_status_r(NULL, NULL, NULL, &uc,
 		NULL, NULL);
-	while ((retval == 0) && (uc != 0x1) && (cnt++ < cnt_max)) {
-		msleep(waittime_retry[cnt]);
+	while ((retval == 0) && (uc != 0x1) && (cnt < cnt_max)) {
+		mdelay(waittime_retry[cnt]);
 		retval = av8100_reg_gen_status_r(NULL, NULL, NULL,
 			&uc, NULL, NULL);
+		cnt++;
 	}
-	dev_dbg(av8100dev, "av8100 fwdl cnt:%d\n", cnt);
+	dev_dbg(adev->dev, "av8100 fwdl cnt:%d\n", cnt);
 
 	if (retval)	{
-		dev_dbg(av8100dev,
+		dev_dbg(adev->dev,
 			"Failed to read the value from the av8100 register\n");
 		retval = -EFAULT;
 		goto av8100_download_firmware_err;
 	}
 
 	if (uc != 0x1)
-		dev_dbg(av8100dev, "UC is not ready\n");
+		dev_dbg(adev->dev, "UC is not ready\n");
 
 	release_firmware(fw_file);
 
-	av8100_set_state(AV8100_OPMODE_IDLE);
+	if (adev->chip_version != 1) {
+		/* Get cut version */
+		retval = read_single_byte(i2c, AV8100_CUTVER_OFFSET, &val);
+		if (retval) {
+			dev_err(adev->dev, "Read cut ver failed\n");
+			return retval;
+		}
 
+		switch (val) {
+		case 0:
+			dev_dbg(adev->dev, "Cut ver 0 (2.1)\n");
+			break;
+		case 1:
+			dev_dbg(adev->dev, "Cut ver 1 (2.2)\n");
+			break;
+		case 3:
+			dev_dbg(adev->dev, "Cut ver 3 (2.3)\n");
+			break;
+		default:
+			dev_dbg(adev->dev, "Cut ver %d\n", val);
+			break;
+		}
+	}
+
+	av8100_set_state(adev, AV8100_OPMODE_IDLE);
+
+	UNLOCK_AV8100_FWDL;
 	return 0;
 
 av8100_download_firmware_err:
 	release_firmware(fw_file);
 
 	/* Remove APE OPP requirement */
-	if (av8100_globals->opp_requested) {
+	if (adev->params.opp_requested) {
 		prcmu_qos_remove_requirement(PRCMU_QOS_APE_OPP,
-				(char *)av8100_miscdev.name);
+				(char *)adev->miscdev.name);
 		prcmu_qos_remove_requirement(PRCMU_QOS_DDR_OPP,
-				(char *)av8100_miscdev.name);
-		av8100_globals->opp_requested = false;
+				(char *)adev->miscdev.name);
+		adev->params.opp_requested = false;
 	}
 
 	/* Clock disable */
-	if (av8100_globals->inputclk && av8100_globals->inputclk_requested) {
-		clk_disable(av8100_globals->inputclk);
-		av8100_globals->inputclk_requested = false;
+	if (adev->params.inputclk && adev->params.inputclk_requested) {
+		clk_disable(adev->params.inputclk);
+		adev->params.inputclk_requested = false;
 	}
 
+av8100_download_firmware_err2:
+	UNLOCK_AV8100_FWDL;
 	return retval;
 }
 EXPORT_SYMBOL(av8100_download_firmware);
@@ -2508,28 +2573,27 @@ EXPORT_SYMBOL(av8100_download_firmware);
 int av8100_disable_interrupt(void)
 {
 	int retval;
-	struct i2c_client *i2c;
 	u8 hpdm = 0;
 	u8 cpdm = 0;
+	struct av8100_device *adev;
 
-	if (av8100_status_get().av8100_state <= AV8100_OPMODE_SHUTDOWN)
+	adev = devnr_to_adev(AV8100_DEVNR_DEFAULT);
+	if (!adev)
 		return -EINVAL;
 
-	if (!av8100_globals || !av8100_config)
+	if (av8100_status_get().av8100_state <= AV8100_OPMODE_SHUTDOWN)
 		return -EINVAL;
 
-	if (!av8100_globals->ints_enabled)
+	if (!adev->params.ints_enabled)
 		return 0;
 
-	i2c = av8100_config->client;
-
 	retval = av8100_reg_stby_pend_int_w(
 			AV8100_STANDBY_PENDING_INTERRUPT_HPDI_LOW,
 			AV8100_STANDBY_PENDING_INTERRUPT_CPDI_LOW,
 			AV8100_STANDBY_PENDING_INTERRUPT_ONI_LOW,
 			AV8100_STANDBY_PENDING_INTERRUPT_BPDIG_LOW);
 	if (retval) {
-		dev_dbg(av8100dev,
+		dev_dbg(adev->dev,
 			"Failed to write the value to av8100 register\n");
 		return -EFAULT;
 	}
@@ -2543,13 +2607,13 @@ int av8100_disable_interrupt(void)
 			AV8100_GENERAL_INTERRUPT_MASK_UOVBM_LOW,
 			AV8100_GENERAL_INTERRUPT_MASK_TEM_LOW);
 	if (retval) {
-		dev_dbg(av8100dev,
+		dev_dbg(adev->dev,
 			"Failed to write the value to av8100 register\n");
 		return -EFAULT;
 	}
 
-	hpdm = av8100_globals->hpdm;
-	cpdm = av8100_globals->cpdm;
+	hpdm = adev->params.hpdm;
+	cpdm = adev->params.cpdm;
 
 	retval = av8100_reg_stby_int_mask_w(
 			AV8100_STANDBY_INTERRUPT_MASK_HPDM_LOW,
@@ -2557,14 +2621,14 @@ int av8100_disable_interrupt(void)
 			AV8100_STANDBY_INTERRUPT_MASK_STBYGPIOCFG_INPUT,
 			AV8100_STANDBY_INTERRUPT_MASK_IPOL_LOW);
 	if (retval) {
-		dev_dbg(av8100dev,
+		dev_dbg(adev->dev,
 			"Failed to write the value to av8100 register\n");
 		return -EFAULT;
 	}
 
-	av8100_globals->hpdm = hpdm;
-	av8100_globals->cpdm = cpdm;
-	av8100_globals->ints_enabled = false;
+	adev->params.hpdm = hpdm;
+	adev->params.cpdm = cpdm;
+	adev->params.ints_enabled = false;
 
 	return 0;
 }
@@ -2573,26 +2637,25 @@ EXPORT_SYMBOL(av8100_disable_interrupt);
 int av8100_enable_interrupt(void)
 {
 	int retval;
-	struct i2c_client *i2c;
+	struct av8100_device *adev;
 
-	if (av8100_status_get().av8100_state <= AV8100_OPMODE_SHUTDOWN)
+	adev = devnr_to_adev(AV8100_DEVNR_DEFAULT);
+	if (!adev)
 		return -EINVAL;
 
-	if (!av8100_globals || !av8100_config)
+	if (av8100_status_get().av8100_state <= AV8100_OPMODE_SHUTDOWN)
 		return -EINVAL;
 
-	if (av8100_globals->ints_enabled)
+	if (adev->params.ints_enabled)
 		return 0;
 
-	i2c = av8100_config->client;
-
 	retval = av8100_reg_stby_pend_int_w(
 			AV8100_STANDBY_PENDING_INTERRUPT_HPDI_LOW,
 			AV8100_STANDBY_PENDING_INTERRUPT_CPDI_LOW,
 			AV8100_STANDBY_PENDING_INTERRUPT_ONI_LOW,
 			AV8100_STANDBY_PENDING_INTERRUPT_BPDIG_LOW);
 	if (retval) {
-		dev_dbg(av8100dev,
+		dev_dbg(adev->dev,
 			"Failed to write the value to av8100 register\n");
 		return -EFAULT;
 	}
@@ -2601,28 +2664,28 @@ int av8100_enable_interrupt(void)
 			AV8100_GENERAL_INTERRUPT_MASK_EOCM_LOW,
 			AV8100_GENERAL_INTERRUPT_MASK_VSIM_LOW,
 			AV8100_GENERAL_INTERRUPT_MASK_VSOM_LOW,
-			av8100_globals->cecm,
-			av8100_globals->hdcpm,
-			AV8100_GENERAL_INTERRUPT_MASK_UOVBM_LOW,
+			adev->params.cecm,
+			adev->params.hdcpm,
+			adev->params.uovbm,
 			AV8100_GENERAL_INTERRUPT_MASK_TEM_LOW);
 	if (retval) {
-		dev_dbg(av8100dev,
+		dev_dbg(adev->dev,
 			"Failed to write the value to av8100 register\n");
 		return -EFAULT;
 	}
 
 	retval = av8100_reg_stby_int_mask_w(
-			av8100_globals->hpdm,
-			av8100_globals->cpdm,
+			adev->params.hpdm,
+			adev->params.cpdm,
 			AV8100_STANDBY_INTERRUPT_MASK_STBYGPIOCFG_INPUT,
 			AV8100_STANDBY_INTERRUPT_MASK_IPOL_LOW);
 	if (retval) {
-		dev_dbg(av8100dev,
+		dev_dbg(adev->dev,
 			"Failed to write the value to av8100 register\n");
 		return -EFAULT;
 	}
 
-	av8100_globals->ints_enabled = true;
+	adev->params.ints_enabled = true;
 
 	return 0;
 }
@@ -2654,6 +2717,11 @@ static int av8100_5V_w(u8 denc_off, u8 hdmi_off, u8 on)
 {
 	u8 val;
 	int retval;
+	struct av8100_device *adev;
+
+	adev = devnr_to_adev(AV8100_DEVNR_DEFAULT);
+	if (!adev)
+		return -EINVAL;
 
 	if (av8100_status_get().av8100_state <= AV8100_OPMODE_SHUTDOWN)
 		return -EINVAL;
@@ -2663,7 +2731,7 @@ static int av8100_5V_w(u8 denc_off, u8 hdmi_off, u8 on)
 	/* Set register value.
 	 * chip_version == 1 have one common off time
 	 * chip_version > 1 support different off time for hdmi and tvout. */
-	if (chip_version == 1)
+	if (adev->chip_version == 1)
 		val = AV8100_HDMI_5_VOLT_TIME_OFF_TIME(hdmi_off) |
 			AV8100_HDMI_5_VOLT_TIME_ON_TIME(on);
 	else
@@ -2682,6 +2750,11 @@ static int av8100_5V_w(u8 denc_off, u8 hdmi_off, u8 on)
 int av8100_reg_hdmi_5_volt_time_w(u8 denc_off, u8 hdmi_off, u8 on)
 {
 	int retval;
+	struct av8100_device *adev;
+
+	adev = devnr_to_adev(AV8100_DEVNR_DEFAULT);
+	if (!adev)
+		return -EINVAL;
 
 	if (av8100_status_get().av8100_state <= AV8100_OPMODE_SHUTDOWN)
 		return -EINVAL;
@@ -2689,12 +2762,12 @@ int av8100_reg_hdmi_5_volt_time_w(u8 denc_off, u8 hdmi_off, u8 on)
 	retval = av8100_5V_w(denc_off, hdmi_off, on);
 
 	/* Set vars */
-	if (chip_version > 1)
-		av8100_globals->denc_off_time = denc_off;
+	if (adev->chip_version > 1)
+		adev->params.denc_off_time = denc_off;
 
-	av8100_globals->hdmi_off_time = hdmi_off;
+	adev->params.hdmi_off_time = hdmi_off;
 	if (on)
-		av8100_globals->on_time = on;
+		adev->params.on_time = on;
 
 	return retval;
 }
@@ -2705,6 +2778,11 @@ int av8100_reg_stby_int_mask_w(
 {
 	int retval;
 	u8 val;
+	struct av8100_device *adev;
+
+	adev = devnr_to_adev(AV8100_DEVNR_DEFAULT);
+	if (!adev)
+		return -EINVAL;
 
 	if (av8100_status_get().av8100_state <= AV8100_OPMODE_SHUTDOWN)
 		return -EINVAL;
@@ -2720,8 +2798,8 @@ int av8100_reg_stby_int_mask_w(
 	/* Write to register */
 	retval = register_write_internal(AV8100_STANDBY_INTERRUPT_MASK, val);
 
-	av8100_globals->hpdm = hpdm;
-	av8100_globals->cpdm = cpdm;
+	adev->params.hpdm = hpdm;
+	adev->params.cpdm = cpdm;
 
 	UNLOCK_AV8100_HW;
 	return retval;
@@ -2886,23 +2964,23 @@ int av8100_reg_w(
 {
 	int retval = 0;
 	struct i2c_client *i2c;
+	struct av8100_device *adev;
+
+	adev = devnr_to_adev(AV8100_DEVNR_DEFAULT);
+	if (!adev)
+		return -EINVAL;
 
 	if (av8100_status_get().av8100_state <= AV8100_OPMODE_SHUTDOWN)
 		return -EINVAL;
 
 	LOCK_AV8100_HW;
 
-	if (!av8100_config) {
-		UNLOCK_AV8100_HW;
-		return -EINVAL;
-	}
-
-	i2c = av8100_config->client;
+	i2c = adev->config.client;
 
 	/* Write to register */
 	retval = write_single_byte(i2c, offset, value);
 	if (retval) {
-		dev_dbg(av8100dev,
+		dev_dbg(adev->dev,
 			"Failed to write the value to av8100 register\n");
 		UNLOCK_AV8100_HW;
 		return -EFAULT;
@@ -2949,6 +3027,11 @@ int av8100_reg_hdmi_5_volt_time_r(
 {
 	int retval;
 	u8 val;
+	struct av8100_device *adev;
+
+	adev = devnr_to_adev(AV8100_DEVNR_DEFAULT);
+	if (!adev)
+		return -EINVAL;
 
 	if (av8100_status_get().av8100_state <= AV8100_OPMODE_SHUTDOWN)
 		return -EINVAL;
@@ -2959,7 +3042,7 @@ int av8100_reg_hdmi_5_volt_time_r(
 	retval = register_read_internal(AV8100_HDMI_5_VOLT_TIME, &val);
 
 	/* Set return params */
-	if (chip_version == 1) {
+	if (adev->chip_version == 1) {
 		if (denc_off_time)
 			*denc_off_time = 0;
 		if (hdmi_off_time)
@@ -3264,23 +3347,23 @@ int av8100_reg_r(
 {
 	int retval = 0;
 	struct i2c_client *i2c;
+	struct av8100_device *adev;
+
+	adev = devnr_to_adev(AV8100_DEVNR_DEFAULT);
+	if (!adev)
+		return -EINVAL;
 
 	if (av8100_status_get().av8100_state <= AV8100_OPMODE_SHUTDOWN)
 		return -EINVAL;
 
 	LOCK_AV8100_HW;
 
-	if (!av8100_config) {
-		retval = AV8100_FAIL;
-		goto av8100_register_read_out;
-	}
-
-	i2c = av8100_config->client;
+	i2c = adev->config.client;
 
 	/* Read from register */
 	retval = read_single_byte(i2c, offset, value);
 	if (retval)	{
-		dev_dbg(av8100dev,
+		dev_dbg(adev->dev,
 			"Failed to read the value from av8100 register\n");
 		retval = -EFAULT;
 		goto av8100_register_read_out;
@@ -3295,104 +3378,107 @@ EXPORT_SYMBOL(av8100_reg_r);
 int av8100_conf_get(enum av8100_command_type command_type,
 	union av8100_configuration *config)
 {
-	if (av8100_status_get().av8100_state == AV8100_OPMODE_UNDEFINED)
+	struct av8100_device *adev;
+
+	adev = devnr_to_adev(AV8100_DEVNR_DEFAULT);
+	if (!adev)
 		return -EINVAL;
 
-	if (!av8100_config || !config)
-		return AV8100_FAIL;
+	if (av8100_status_get().av8100_state == AV8100_OPMODE_UNDEFINED)
+		return -EINVAL;
 
 	/* Put configuration data to the corresponding data struct depending
 	 * on command type */
 	switch (command_type) {
 	case AV8100_COMMAND_VIDEO_INPUT_FORMAT:
 		memcpy(&config->video_input_format,
-			&av8100_config->hdmi_video_input_cmd,
+			&adev->config.hdmi_video_input_cmd,
 			sizeof(struct av8100_video_input_format_cmd));
 		break;
 
 	case AV8100_COMMAND_AUDIO_INPUT_FORMAT:
 		memcpy(&config->audio_input_format,
-			&av8100_config->hdmi_audio_input_cmd,
+			&adev->config.hdmi_audio_input_cmd,
 			sizeof(struct av8100_audio_input_format_cmd));
 		break;
 
 	case AV8100_COMMAND_VIDEO_OUTPUT_FORMAT:
 		memcpy(&config->video_output_format,
-			&av8100_config->hdmi_video_output_cmd,
+			&adev->config.hdmi_video_output_cmd,
 			sizeof(struct av8100_video_output_format_cmd));
 		break;
 
 	case AV8100_COMMAND_VIDEO_SCALING_FORMAT:
 		memcpy(&config->video_scaling_format,
-			&av8100_config->hdmi_video_scaling_cmd,
+			&adev->config.hdmi_video_scaling_cmd,
 			sizeof(struct av8100_video_scaling_format_cmd));
 		break;
 
 	case AV8100_COMMAND_COLORSPACECONVERSION:
-		config->color_transform = av8100_config->color_transform;
+		config->color_transform = adev->config.color_transform;
 		break;
 
 	case AV8100_COMMAND_CEC_MESSAGE_WRITE:
 		memcpy(&config->cec_message_write_format,
-			&av8100_config->hdmi_cec_message_write_cmd,
+			&adev->config.hdmi_cec_message_write_cmd,
 			sizeof(struct av8100_cec_message_write_format_cmd));
 		break;
 
 	case AV8100_COMMAND_CEC_MESSAGE_READ_BACK:
 		memcpy(&config->cec_message_read_back_format,
-			&av8100_config->hdmi_cec_message_read_back_cmd,
+			&adev->config.hdmi_cec_message_read_back_cmd,
 			sizeof(struct av8100_cec_message_read_back_format_cmd));
 		break;
 
 	case AV8100_COMMAND_DENC:
-		memcpy(&config->denc_format, &av8100_config->hdmi_denc_cmd,
+		memcpy(&config->denc_format, &adev->config.hdmi_denc_cmd,
 				sizeof(struct av8100_denc_format_cmd));
 		break;
 
 	case AV8100_COMMAND_HDMI:
-		memcpy(&config->hdmi_format, &av8100_config->hdmi_cmd,
+		memcpy(&config->hdmi_format, &adev->config.hdmi_cmd,
 				sizeof(struct av8100_hdmi_cmd));
 		break;
 
 	case AV8100_COMMAND_HDCP_SENDKEY:
 		memcpy(&config->hdcp_send_key_format,
-			&av8100_config->hdmi_hdcp_send_key_cmd,
+			&adev->config.hdmi_hdcp_send_key_cmd,
 			sizeof(struct av8100_hdcp_send_key_format_cmd));
 		break;
 
 	case AV8100_COMMAND_HDCP_MANAGEMENT:
 		memcpy(&config->hdcp_management_format,
-			&av8100_config->hdmi_hdcp_management_format_cmd,
+			&adev->config.hdmi_hdcp_management_format_cmd,
 			sizeof(struct av8100_hdcp_management_format_cmd));
 		break;
 
 	case AV8100_COMMAND_INFOFRAMES:
 		memcpy(&config->infoframes_format,
-			&av8100_config->hdmi_infoframes_cmd,
+			&adev->config.hdmi_infoframes_cmd,
 			sizeof(struct av8100_infoframes_format_cmd));
 		break;
 
 	case AV8100_COMMAND_EDID_SECTION_READBACK:
 		memcpy(&config->edid_section_readback_format,
-			&av8100_config->hdmi_edid_section_readback_cmd,
+			&adev->config.hdmi_edid_section_readback_cmd,
 			sizeof(struct
 				av8100_edid_section_readback_format_cmd));
 		break;
 
 	case AV8100_COMMAND_PATTERNGENERATOR:
 		memcpy(&config->pattern_generator_format,
-			&av8100_config->hdmi_pattern_generator_cmd,
+			&adev->config.hdmi_pattern_generator_cmd,
 			sizeof(struct av8100_pattern_generator_format_cmd));
 		break;
 
 	case AV8100_COMMAND_FUSE_AES_KEY:
 		memcpy(&config->fuse_aes_key_format,
-			&av8100_config->hdmi_fuse_aes_key_cmd,
+			&adev->config.hdmi_fuse_aes_key_cmd,
 			sizeof(struct av8100_fuse_aes_key_format_cmd));
 		break;
 
 	default:
-		return AV8100_FAIL;
+		return -EINVAL;
 		break;
 	}
 
@@ -3403,105 +3489,108 @@ EXPORT_SYMBOL(av8100_conf_get);
 int av8100_conf_prep(enum av8100_command_type command_type,
 	union av8100_configuration *config)
 {
-	if (!av8100_config || !config)
-		return AV8100_FAIL;
+	struct av8100_device *adev;
+
+	adev = devnr_to_adev(AV8100_DEVNR_DEFAULT);
+	if (!config || !adev)
+		return -EINVAL;
 
 	/* Put configuration data to the corresponding data struct depending
 	 * on command type */
 	switch (command_type) {
 	case AV8100_COMMAND_VIDEO_INPUT_FORMAT:
-		memcpy(&av8100_config->hdmi_video_input_cmd,
+		memcpy(&adev->config.hdmi_video_input_cmd,
 			&config->video_input_format,
 			sizeof(struct av8100_video_input_format_cmd));
 		break;
 
 	case AV8100_COMMAND_AUDIO_INPUT_FORMAT:
-		memcpy(&av8100_config->hdmi_audio_input_cmd,
+		memcpy(&adev->config.hdmi_audio_input_cmd,
 			&config->audio_input_format,
 			sizeof(struct av8100_audio_input_format_cmd));
 		break;
 
 	case AV8100_COMMAND_VIDEO_OUTPUT_FORMAT:
-		memcpy(&av8100_config->hdmi_video_output_cmd,
+		memcpy(&adev->config.hdmi_video_output_cmd,
 			&config->video_output_format,
 			sizeof(struct av8100_video_output_format_cmd));
 
 		/* Set params that depend on video output */
-		av8100_config_video_output_dep(av8100_config->
+		av8100_config_video_output_dep(adev->config.
 			hdmi_video_output_cmd.video_output_cea_vesa);
 		break;
 
 	case AV8100_COMMAND_VIDEO_SCALING_FORMAT:
-		memcpy(&av8100_config->hdmi_video_scaling_cmd,
+		memcpy(&adev->config.hdmi_video_scaling_cmd,
 			&config->video_scaling_format,
 			sizeof(struct av8100_video_scaling_format_cmd));
 		break;
 
 	case AV8100_COMMAND_COLORSPACECONVERSION:
-		av8100_config->color_transform = config->color_transform;
+		adev->config.color_transform = config->color_transform;
 		break;
 
 	case AV8100_COMMAND_CEC_MESSAGE_WRITE:
-		memcpy(&av8100_config->hdmi_cec_message_write_cmd,
+		memcpy(&adev->config.hdmi_cec_message_write_cmd,
 			&config->cec_message_write_format,
 			sizeof(struct av8100_cec_message_write_format_cmd));
 		break;
 
 	case AV8100_COMMAND_CEC_MESSAGE_READ_BACK:
-		memcpy(&av8100_config->hdmi_cec_message_read_back_cmd,
+		memcpy(&adev->config.hdmi_cec_message_read_back_cmd,
 			&config->cec_message_read_back_format,
 			sizeof(struct av8100_cec_message_read_back_format_cmd));
 		break;
 
 	case AV8100_COMMAND_DENC:
-		memcpy(&av8100_config->hdmi_denc_cmd, &config->denc_format,
+		memcpy(&adev->config.hdmi_denc_cmd, &config->denc_format,
 				sizeof(struct av8100_denc_format_cmd));
 		break;
 
 	case AV8100_COMMAND_HDMI:
-		memcpy(&av8100_config->hdmi_cmd, &config->hdmi_format,
+		memcpy(&adev->config.hdmi_cmd, &config->hdmi_format,
 				sizeof(struct av8100_hdmi_cmd));
 		break;
 
 	case AV8100_COMMAND_HDCP_SENDKEY:
-		memcpy(&av8100_config->hdmi_hdcp_send_key_cmd,
+		memcpy(&adev->config.hdmi_hdcp_send_key_cmd,
 			&config->hdcp_send_key_format,
 			sizeof(struct av8100_hdcp_send_key_format_cmd));
 		break;
 
 	case AV8100_COMMAND_HDCP_MANAGEMENT:
-		memcpy(&av8100_config->hdmi_hdcp_management_format_cmd,
+		memcpy(&adev->config.hdmi_hdcp_management_format_cmd,
 			&config->hdcp_management_format,
 			sizeof(struct av8100_hdcp_management_format_cmd));
 		break;
 
 	case AV8100_COMMAND_INFOFRAMES:
-		memcpy(&av8100_config->hdmi_infoframes_cmd,
+		memcpy(&adev->config.hdmi_infoframes_cmd,
 			&config->infoframes_format,
 			sizeof(struct av8100_infoframes_format_cmd));
 		break;
 
 	case AV8100_COMMAND_EDID_SECTION_READBACK:
-		memcpy(&av8100_config->hdmi_edid_section_readback_cmd,
+		memcpy(&adev->config.hdmi_edid_section_readback_cmd,
 			&config->edid_section_readback_format,
 			sizeof(struct
 				av8100_edid_section_readback_format_cmd));
 		break;
 
 	case AV8100_COMMAND_PATTERNGENERATOR:
-		memcpy(&av8100_config->hdmi_pattern_generator_cmd,
+		memcpy(&adev->config.hdmi_pattern_generator_cmd,
 			&config->pattern_generator_format,
 			sizeof(struct av8100_pattern_generator_format_cmd));
 		break;
 
 	case AV8100_COMMAND_FUSE_AES_KEY:
-		memcpy(&av8100_config->hdmi_fuse_aes_key_cmd,
+		memcpy(&adev->config.hdmi_fuse_aes_key_cmd,
 			&config->fuse_aes_key_format,
 			sizeof(struct av8100_fuse_aes_key_format_cmd));
 		break;
 
 	default:
-		return AV8100_FAIL;
+		return -EINVAL;
 		break;
 	}
 
@@ -3517,6 +3606,11 @@ int av8100_conf_w(enum av8100_command_type command_type,
 	u8 cmd_buffer[AV8100_COMMAND_MAX_LENGTH];
 	u32 cmd_length = 0;
 	struct i2c_client *i2c;
+	struct av8100_device *adev;
+
+	adev = devnr_to_adev(AV8100_DEVNR_DEFAULT);
+	if (!adev)
+		return -EINVAL;
 
 	if (av8100_status_get().av8100_state <= AV8100_OPMODE_SHUTDOWN)
 		return -EINVAL;
@@ -3524,47 +3618,44 @@ int av8100_conf_w(enum av8100_command_type command_type,
 	if (return_buffer_length)
 		*return_buffer_length = 0;
 
-	if (!av8100_config)
-		return AV8100_FAIL;
-
-	i2c = av8100_config->client;
+	i2c = adev->config.client;
 
 	memset(&cmd_buffer, 0x00, AV8100_COMMAND_MAX_LENGTH);
 
-#define PRNK_MODE(_m) dev_dbg(av8100dev, "cmd: " #_m "\n");
+#define PRNK_MODE(_m) dev_dbg(adev->dev, "cmd: " #_m "\n");
 
 	/* Fill the command buffer with configuration data */
 	switch (command_type) {
 	case AV8100_COMMAND_VIDEO_INPUT_FORMAT:
 		PRNK_MODE(AV8100_COMMAND_VIDEO_INPUT_FORMAT);
-		configuration_video_input_get(cmd_buffer, &cmd_length);
+		configuration_video_input_get(adev, cmd_buffer, &cmd_length);
 		break;
 
 	case AV8100_COMMAND_AUDIO_INPUT_FORMAT:
 		PRNK_MODE(AV8100_COMMAND_AUDIO_INPUT_FORMAT);
-		configuration_audio_input_get(cmd_buffer, &cmd_length);
+		configuration_audio_input_get(adev, cmd_buffer, &cmd_length);
 		break;
 
 	case AV8100_COMMAND_VIDEO_OUTPUT_FORMAT:
 		PRNK_MODE(AV8100_COMMAND_VIDEO_OUTPUT_FORMAT);
-		configuration_video_output_get(cmd_buffer, &cmd_length);
+		configuration_video_output_get(adev, cmd_buffer, &cmd_length);
 		break;
 
 	case AV8100_COMMAND_VIDEO_SCALING_FORMAT:
 		PRNK_MODE(AV8100_COMMAND_VIDEO_SCALING_FORMAT);
-		configuration_video_scaling_get(cmd_buffer,
+		configuration_video_scaling_get(adev, cmd_buffer,
 			&cmd_length);
 		break;
 
 	case AV8100_COMMAND_COLORSPACECONVERSION:
 		PRNK_MODE(AV8100_COMMAND_COLORSPACECONVERSION);
-		configuration_colorspace_conversion_get(cmd_buffer,
+		configuration_colorspace_conversion_get(adev, cmd_buffer,
 			&cmd_length);
 		break;
 
 	case AV8100_COMMAND_CEC_MESSAGE_WRITE:
 		PRNK_MODE(AV8100_COMMAND_CEC_MESSAGE_WRITE);
-		configuration_cec_message_write_get(cmd_buffer,
+		configuration_cec_message_write_get(adev, cmd_buffer,
 			&cmd_length);
 		break;
 
@@ -3576,49 +3667,49 @@ int av8100_conf_w(enum av8100_command_type command_type,
 
 	case AV8100_COMMAND_DENC:
 		PRNK_MODE(AV8100_COMMAND_DENC);
-		configuration_denc_get(cmd_buffer, &cmd_length);
+		configuration_denc_get(adev, cmd_buffer, &cmd_length);
 		break;
 
 	case AV8100_COMMAND_HDMI:
 		PRNK_MODE(AV8100_COMMAND_HDMI);
-		configuration_hdmi_get(cmd_buffer, &cmd_length);
+		configuration_hdmi_get(adev, cmd_buffer, &cmd_length);
 		break;
 
 	case AV8100_COMMAND_HDCP_SENDKEY:
 		PRNK_MODE(AV8100_COMMAND_HDCP_SENDKEY);
-		configuration_hdcp_sendkey_get(cmd_buffer, &cmd_length);
+		configuration_hdcp_sendkey_get(adev, cmd_buffer, &cmd_length);
 		break;
 
 	case AV8100_COMMAND_HDCP_MANAGEMENT:
 		PRNK_MODE(AV8100_COMMAND_HDCP_MANAGEMENT);
-		configuration_hdcp_management_get(cmd_buffer,
+		configuration_hdcp_management_get(adev, cmd_buffer,
 			&cmd_length);
 		break;
 
 	case AV8100_COMMAND_INFOFRAMES:
 		PRNK_MODE(AV8100_COMMAND_INFOFRAMES);
-		configuration_infoframe_get(cmd_buffer, &cmd_length);
+		configuration_infoframe_get(adev, cmd_buffer, &cmd_length);
 		break;
 
 	case AV8100_COMMAND_EDID_SECTION_READBACK:
 		PRNK_MODE(AV8100_COMMAND_EDID_SECTION_READBACK);
-		av8100_edid_section_readback_get(cmd_buffer, &cmd_length);
+		av8100_edid_section_readback_get(adev, cmd_buffer, &cmd_length);
 		break;
 
 	case AV8100_COMMAND_PATTERNGENERATOR:
 		PRNK_MODE(AV8100_COMMAND_PATTERNGENERATOR);
-		configuration_pattern_generator_get(cmd_buffer,
+		configuration_pattern_generator_get(adev, cmd_buffer,
 			&cmd_length);
 		break;
 
 	case AV8100_COMMAND_FUSE_AES_KEY:
 		PRNK_MODE(AV8100_COMMAND_FUSE_AES_KEY);
-		configuration_fuse_aes_key_get(cmd_buffer, &cmd_length);
+		configuration_fuse_aes_key_get(adev, cmd_buffer, &cmd_length);
 		break;
 
 	default:
-		dev_dbg(av8100dev, "Invalid command type\n");
-		retval = AV8100_INVALID_COMMAND;
+		dev_dbg(adev->dev, "Invalid command type\n");
+		retval = -EFAULT;
 		break;
 	}
 
@@ -3628,11 +3719,11 @@ int av8100_conf_w(enum av8100_command_type command_type,
 		int cnt = 0;
 		int cnt_max;
 
-		dev_dbg(av8100dev, "av8100_conf_w cmd_type:%02x length:%02x ",
+		dev_dbg(adev->dev, "av8100_conf_w cmd_type:%02x length:%02x ",
 			command_type, cmd_length);
-		dev_dbg(av8100dev, "buffer: ");
+		dev_dbg(adev->dev, "buffer: ");
 		while (cnt < cmd_length) {
-			dev_dbg(av8100dev, "%02x ", cmd_buffer[cnt]);
+			dev_dbg(adev->dev, "%02x ", cmd_buffer[cnt]);
 			cnt++;
 		}
 
@@ -3654,15 +3745,16 @@ int av8100_conf_w(enum av8100_command_type command_type,
 
 
 		/* Get the first return byte */
-		msleep(AV8100_WAITTIME_1MS);
+		mdelay(AV8100_WAITTIME_1MS);
 		cnt = 0;
 		cnt_max = sizeof(waittime_retry);
 		retval = get_command_return_first(i2c, command_type);
-		while (retval && (cnt++ < cnt_max)) {
-			msleep(waittime_retry[cnt]);
+		while (retval && (cnt < cnt_max)) {
+			mdelay(waittime_retry[cnt]);
 			retval = get_command_return_first(i2c, command_type);
+			cnt++;
 		}
-		dev_dbg(av8100dev, "first return cnt:%d\n", cnt);
+		dev_dbg(adev->dev, "first return cnt:%d\n", cnt);
 
 		if (retval) {
 			UNLOCK_AV8100_HW;
@@ -3674,14 +3766,14 @@ int av8100_conf_w(enum av8100_command_type command_type,
 	} else if (if_type == DSI_INTERFACE) {
 		/* TODO */
 	} else {
-		retval = AV8100_INVALID_INTERFACE;
-		dev_dbg(av8100dev, "Invalid command type\n");
+		retval = -EINVAL;
+		dev_dbg(adev->dev, "Invalid command type\n");
 	}
 
 	if (command_type == AV8100_COMMAND_HDMI) {
-		g_av8100_status.hdmi_on = ((av8100_config->hdmi_cmd.
+		adev->status.hdmi_on = ((adev->config.hdmi_cmd.
 			hdmi_mode == AV8100_HDMI_ON) &&
-			(av8100_config->hdmi_cmd.hdmi_format == AV8100_HDMI));
+			(adev->config.hdmi_cmd.hdmi_format == AV8100_HDMI));
 	}
 
 	UNLOCK_AV8100_HW;
@@ -3699,6 +3791,11 @@ int av8100_conf_w_raw(enum av8100_command_type command_type,
 	struct i2c_client *i2c;
 	int cnt;
 	int cnt_max;
+	struct av8100_device *adev;
+
+	adev = devnr_to_adev(AV8100_DEVNR_DEFAULT);
+	if (!adev)
+		return -EINVAL;
 
 	if (av8100_status_get().av8100_state <= AV8100_OPMODE_SHUTDOWN)
 		return -EINVAL;
@@ -3708,12 +3805,7 @@ int av8100_conf_w_raw(enum av8100_command_type command_type,
 	if (return_buffer_length)
 		*return_buffer_length = 0;
 
-	if (!av8100_config) {
-		retval = AV8100_FAIL;
-		goto av8100_conf_w_raw_out;
-	}
-
-	i2c = av8100_config->client;
+	i2c = adev->config.client;
 
 	/* Write the command buffer */
 	retval = write_multi_byte(i2c,
@@ -3729,15 +3821,16 @@ int av8100_conf_w_raw(enum av8100_command_type command_type,
 
 
 	/* Get the first return byte */
-	msleep(AV8100_WAITTIME_1MS);
+	mdelay(AV8100_WAITTIME_1MS);
 	cnt = 0;
 	cnt_max = sizeof(waittime_retry);
 	retval = get_command_return_first(i2c, command_type);
-	while (retval && (cnt++ < cnt_max)) {
-		msleep(waittime_retry[cnt]);
+	while (retval && (cnt < cnt_max)) {
+		mdelay(waittime_retry[cnt]);
 		retval = get_command_return_first(i2c, command_type);
+		cnt++;
 	}
-	dev_dbg(av8100dev, "first return cnt:%d\n", cnt);
+	dev_dbg(adev->dev, "first return cnt:%d\n", cnt);
 	if (retval)
 		goto av8100_conf_w_raw_out;
 
@@ -3752,7 +3845,14 @@ EXPORT_SYMBOL(av8100_conf_w_raw);
 
 struct av8100_status av8100_status_get(void)
 {
-	return g_av8100_status;
+	struct av8100_status status = {0};
+	struct av8100_device *adev;
+
+	adev = devnr_to_adev(AV8100_DEVNR_DEFAULT);
+	if (adev)
+		return adev->status;
+	else
+		return status;
 }
 EXPORT_SYMBOL(av8100_status_get);
 
@@ -3768,6 +3868,11 @@ enum av8100_output_CEA_VESA av8100_video_output_format_get(int xres,
 	int hres_div = 1;
 	long freq1;
 	long freq2;
+	struct av8100_device *adev;
+
+	adev = devnr_to_adev(AV8100_DEVNR_DEFAULT);
+	if (!adev)
+		return -EINVAL;
 
 	/*
 	* 720_576_I need a divider for hact and htot since
@@ -3783,7 +3888,7 @@ enum av8100_output_CEA_VESA av8100_video_output_format_get(int xres,
 			av8100_all_cea[index].htotale /
 			av8100_all_cea[index].vtotale;
 
-		dev_dbg(av8100dev, "freq1:%ld freq2:%ld\n", freq1, freq2);
+		dev_dbg(adev->dev, "freq1:%ld freq2:%ld\n", freq1, freq2);
 		if ((xres == av8100_all_cea[index].hactive / hres_div) &&
 			(yres == av8100_all_cea[index].vactive * yres_div) &&
 			(htot == av8100_all_cea[index].htotale / hres_div) &&
@@ -3795,7 +3900,7 @@ enum av8100_output_CEA_VESA av8100_video_output_format_get(int xres,
 	}
 
 av8100_video_output_format_get_out:
-	dev_dbg(av8100dev, "av8100_video_output_format_get %d %d %d %d %d\n",
+	dev_dbg(adev->dev, "av8100_video_output_format_get %d %d %d %d %d\n",
 		xres, yres, htot, vtot, index);
 	return index;
 }
@@ -3803,25 +3908,29 @@ EXPORT_SYMBOL(av8100_video_output_format_get);
 
 void av8100_hdmi_event_cb_set(void (*hdmi_ev_cb)(enum av8100_hdmi_event))
 {
-	if (av8100_globals)
-		av8100_globals->hdmi_ev_cb = hdmi_ev_cb;
+	struct av8100_device *adev;
+
+	adev = devnr_to_adev(AV8100_DEVNR_DEFAULT);
+	if (adev)
+		adev->params.hdmi_ev_cb = hdmi_ev_cb;
 }
 EXPORT_SYMBOL(av8100_hdmi_event_cb_set);
 
 u8 av8100_ver_get(void)
 {
-	u8 ret;
+	struct av8100_device *adev;
 
-	LOCK_AV8100_HW;
-	ret = chip_version;
-	UNLOCK_AV8100_HW;
+	adev = devnr_to_adev(AV8100_DEVNR_DEFAULT);
+	if (!adev)
+		return -EINVAL;
 
-	return ret;
+	return adev->chip_version;
 }
 EXPORT_SYMBOL(av8100_ver_get);
 
 static const struct color_conversion_cmd *get_color_transform_cmd(
-				enum av8100_color_transform transform)
+			struct av8100_device *adev,
+			enum av8100_color_transform transform)
 {
 	const struct color_conversion_cmd *result;
 
@@ -3833,7 +3942,7 @@ static const struct color_conversion_cmd *get_color_transform_cmd(
 		result = &col_trans_identity_clamp_yuv;
 		break;
 	case AV8100_COLOR_TRANSFORM_YUV_TO_RGB:
-		if (chip_version == AV8100_CHIPVER_1)
+		if (adev->chip_version == AV8100_CHIPVER_1)
 			result = &col_trans_yuv_to_rgb_v1;
 		else
 			result = &col_trans_yuv_to_rgb_v2;
@@ -3845,7 +3954,7 @@ static const struct color_conversion_cmd *get_color_transform_cmd(
 		result = &col_trans_rgb_to_denc;
 		break;
 	default:
-		dev_warn(av8100dev, "Unknown color space transform\n");
+		dev_warn(adev->dev, "Unknown color space transform\n");
 		result = &col_trans_identity;
 		break;
 	}
@@ -3854,13 +3963,13 @@ static const struct color_conversion_cmd *get_color_transform_cmd(
 
 static int av8100_open(struct inode *inode, struct file *filp)
 {
-	dev_dbg(av8100dev, "av8100_open is called\n");
+	pr_debug("%s\n", __func__);
 	return 0;
 }
 
 static int av8100_release(struct inode *inode, struct file *filp)
 {
-	dev_dbg(av8100dev, "av8100_release is called\n");
+	pr_debug("%s\n", __func__);
 	return 0;
 }
 
@@ -3870,50 +3979,83 @@ static long av8100_ioctl(struct file *file,
 	return 0;
 }
 
-static int __devinit av8100_probe(struct i2c_client *i2cClient,
-	const struct i2c_device_id *id)
+int av8100_device_register(struct av8100_device *adev)
 {
-	int ret = 0;
-	struct av8100_platform_data *pdata = i2cClient->dev.platform_data;
+	adev->miscdev.minor = MISC_DYNAMIC_MINOR;
+	adev->miscdev.name = "av8100";
+	adev->miscdev.fops = &av8100_fops;
 
-	av8100dev = &i2cClient->dev;
+	if (misc_register(&adev->miscdev)) {
+		pr_err("av8100 misc_register failed\n");
+		return -EFAULT;
+	}
+	return 0;
+}
 
-	dev_dbg(av8100dev, "%s\n", __func__);
+int av8100_init_device(struct av8100_device *adev, struct device *dev)
+{
+	adev->dev = dev;
 
-	av8100_set_state(AV8100_OPMODE_UNDEFINED);
+	if (av8100_config_init(adev)) {
+		dev_info(dev, "av8100_config_init failed\n");
+		return -EFAULT;
+	}
 
-	ret = av8100_config_init();
-	if (ret) {
-		dev_info(av8100dev, "av8100_config_init failed\n");
-		goto err;
+	if (av8100_params_init(adev)) {
+		dev_info(dev, "av8100_params_init failed\n");
+		return -EFAULT;
 	}
+	return 0;
+}
 
-	ret = av8100_globals_init();
-	if (ret) {
-		dev_info(av8100dev, "av8100_globals_init failed\n");
-		goto err;
+static int __devinit av8100_probe(struct i2c_client *i2c_client,
+	const struct i2c_device_id *id)
+{
+	int ret = 0;
+	struct av8100_platform_data *pdata = i2c_client->dev.platform_data;
+	struct device *dev;
+	struct av8100_device *adev;
+
+	dev = &i2c_client->dev;
+
+	dev_dbg(dev, "%s\n", __func__);
+
+	/* Allocate device data */
+	adev = kzalloc(sizeof(struct av8100_device), GFP_KERNEL);
+	if (!adev) {
+		dev_info(dev, "%s: Alloc failure\n", __func__);
+		return -ENOMEM;
 	}
 
-	if (!i2c_check_functionality(i2cClient->adapter,
-		I2C_FUNC_SMBUS_BYTE_DATA |
-		I2C_FUNC_SMBUS_READ_WORD_DATA)) {
+	/* Add to list */
+	list_add_tail(&adev->list, &av8100_device_list);
+
+	av8100_device_register(adev);
+
+	av8100_init_device(adev, dev);
+
+	av8100_set_state(adev, AV8100_OPMODE_UNDEFINED);
+
+	if (!i2c_check_functionality(i2c_client->adapter,
+			I2C_FUNC_SMBUS_BYTE_DATA |
+			I2C_FUNC_SMBUS_READ_WORD_DATA)) {
 		ret = -ENODEV;
-		dev_info(av8100dev, "av8100 i2c_check_functionality failed\n");
+		dev_info(dev, "av8100 i2c_check_functionality failed\n");
 		goto err;
 	}
 
-	init_waitqueue_head(&av8100_event);
+	init_waitqueue_head(&adev->event);
 
-	av8100_config->client = i2cClient;
-	av8100_config->id = (struct i2c_device_id *) id;
-	i2c_set_clientdata(i2cClient, av8100_config);
+	adev->config.client = i2c_client;
+	adev->config.id = (struct i2c_device_id *) id;
+	i2c_set_clientdata(i2c_client, &adev->config);
 
-	kthread_run(av8100_thread, NULL, "av8100_thread");
+	kthread_run(av8100_thread, adev, "av8100_thread");
 
 	ret = request_irq(pdata->irq, av8100_intr_handler,
-			IRQF_TRIGGER_RISING, "av8100", av8100_config);
+			IRQF_TRIGGER_RISING, "av8100", adev);
 	if (ret) {
-		dev_err(av8100dev, "av8100_hw request_irq %d failed %d\n",
+		dev_err(dev, "av8100_hw request_irq %d failed %d\n",
 			pdata->irq, ret);
 		gpio_free(pdata->irq);
 		goto err;
@@ -3921,33 +4063,33 @@ static int __devinit av8100_probe(struct i2c_client *i2cClient,
 
 	/* Get regulator resource */
 	if (pdata->regulator_pwr_id) {
-		av8100_globals->regulator_pwr = regulator_get(av8100dev,
+		adev->params.regulator_pwr = regulator_get(dev,
 				pdata->regulator_pwr_id);
-		if (IS_ERR(av8100_globals->regulator_pwr)) {
-			ret = PTR_ERR(av8100_globals->regulator_pwr);
-			dev_warn(av8100dev,
+		if (IS_ERR(adev->params.regulator_pwr)) {
+			ret = PTR_ERR(adev->params.regulator_pwr);
+			dev_warn(dev,
 				"%s: Failed to get regulator '%s'\n",
 				__func__, pdata->regulator_pwr_id);
-			av8100_globals->regulator_pwr = NULL;
+			adev->params.regulator_pwr = NULL;
 			return ret;
 		}
 	}
 
 	/* Get clock resource */
 	if (pdata->inputclk_id) {
-		av8100_globals->inputclk = clk_get(NULL, pdata->inputclk_id);
-		if (IS_ERR(av8100_globals->inputclk)) {
-			av8100_globals->inputclk = NULL;
-			dev_warn(av8100dev, "%s: Failed to get clock '%s'\n",
+		adev->params.inputclk = clk_get(NULL, pdata->inputclk_id);
+		if (IS_ERR(adev->params.inputclk)) {
+			adev->params.inputclk = NULL;
+			dev_warn(dev, "%s: Failed to get clock '%s'\n",
 					__func__, pdata->inputclk_id);
 		}
 	}
 
-	av8100_set_state(AV8100_OPMODE_SHUTDOWN);
+	av8100_set_state(adev, AV8100_OPMODE_SHUTDOWN);
 
 	/* Obtain the chip version */
-	if (av8100_powerup1()) {
-		dev_err(av8100dev, "av8100_powerup1 fail\n");
+	if (av8100_powerup1(adev)) {
+		dev_err(adev->dev, "av8100_powerup1 fail\n");
 		return -EFAULT;
 	}
 
@@ -3957,44 +4099,44 @@ err:
 	return ret;
 }
 
-static int __devexit av8100_remove(struct i2c_client *i2cClient)
+static int __devexit av8100_remove(struct i2c_client *i2c_client)
 {
-	dev_dbg(av8100dev, "%s\n", __func__);
+	struct av8100_device *adev;
 
-	av8100_config_exit();
-	av8100_globals_exit();
-	if (av8100_globals->inputclk)
-		clk_put(av8100_globals->inputclk);
+	adev = dev_to_adev(&i2c_client->dev);
+	if (!adev)
+		return -EFAULT;
+
+	dev_dbg(adev->dev, "%s\n", __func__);
+
+	if (adev->params.inputclk)
+		clk_put(adev->params.inputclk);
 
 	/* Release regulator resource */
-	if (av8100_globals->regulator_pwr)
-		regulator_put(av8100_globals->regulator_pwr);
+	if (adev->params.regulator_pwr)
+		regulator_put(adev->params.regulator_pwr);
+
+	misc_deregister(&adev->miscdev);
+
+	/* Remove from list */
+	list_del(&adev->list);
+
+	/* Free device data */
+	kfree(adev);
 
 	return 0;
 }
 
 int av8100_init(void)
 {
-	int ret;
-
 	pr_debug("%s\n", __func__);
 
-	ret = i2c_add_driver(&av8100_driver);
-	if (ret) {
+	if (i2c_add_driver(&av8100_driver)) {
 		pr_err("av8100 i2c_add_driver failed\n");
-		goto av8100_init_err;
-	}
-
-	ret = misc_register(&av8100_miscdev);
-	if (ret) {
-		pr_err("av8100 misc_register failed\n");
-		goto av8100_init_err;
+		return -EFAULT;
 	}
 
-	return ret;
-
-av8100_init_err:
-	return ret;
+	return 0;
 }
 module_init(av8100_init);
 
@@ -4002,7 +4144,6 @@ void av8100_exit(void)
 {
 	pr_debug("%s\n", __func__);
 
-	misc_deregister(&av8100_miscdev);
 	i2c_del_driver(&av8100_driver);
 }
 module_exit(av8100_exit);
diff --git a/drivers/video/av8100/hdmi.c b/drivers/video/av8100/hdmi.c
index 4e6baf59200..c926f65ac26 100644
--- a/drivers/video/av8100/hdmi.c
+++ b/drivers/video/av8100/hdmi.c
@@ -24,20 +24,30 @@
 #include <linux/slab.h>
 #include <linux/sched.h>
 #include <linux/delay.h>
+#include <linux/list.h>
 
 #define SYSFS_EVENT_FILENAME "evread"
+#define HDMI_DEVNR_DEFAULT	0
 
 DEFINE_MUTEX(hdmi_events_mutex);
 #define LOCK_HDMI_EVENTS mutex_lock(&hdmi_events_mutex)
 #define UNLOCK_HDMI_EVENTS mutex_unlock(&hdmi_events_mutex)
 #define EVENTS_MASK 0xFF
 
-static int device_open;
-static int events;
-static int events_mask;
-static bool events_received;
-static wait_queue_head_t hdmi_event_wq;
-struct device *hdmidev;
+struct hdmi_device {
+	struct list_head	list;
+	struct miscdevice	miscdev;
+	struct device		*dev;
+	struct hdmi_sysfs_data	sysfs_data;
+	int			events;
+	int			events_mask;
+	wait_queue_head_t	event_wq;
+	bool			events_received;
+	int			devnr;
+};
+
+/* List of devices */
+static LIST_HEAD(hdmi_device_list);
 
 static ssize_t store_storeastext(struct device *dev,
 		struct device_attribute *attr, const char *buf, size_t count);
@@ -88,39 +98,43 @@ static ssize_t show_poweronoff(struct device *dev,
 static ssize_t store_evwakeup(struct device *dev,
 		struct device_attribute *attr, const char *buf, size_t count);
 
-static DEVICE_ATTR(storeastext, S_IWUSR, NULL, store_storeastext);
-static DEVICE_ATTR(plugdeten, S_IWUSR, NULL, store_plugdeten);
-static DEVICE_ATTR(edidread, S_IRUGO | S_IWUSR, show_edidread, store_edidread);
-static DEVICE_ATTR(ceceven, S_IWUSR, NULL, store_ceceven);
-static DEVICE_ATTR(cecread, S_IRUGO, show_cecread, NULL);
-static DEVICE_ATTR(cecsend, S_IWUSR, NULL, store_cecsend);
-static DEVICE_ATTR(infofrsend, S_IWUSR, NULL, store_infofrsend);
-static DEVICE_ATTR(hdcpeven, S_IWUSR, NULL, store_hdcpeven);
-static DEVICE_ATTR(hdcpchkaesotp, S_IRUGO, show_hdcpchkaesotp, NULL);
-static DEVICE_ATTR(hdcpfuseaes, S_IRUGO | S_IWUSR, show_hdcpfuseaes,
-		store_hdcpfuseaes);
-static DEVICE_ATTR(hdcploadaes, S_IRUGO | S_IWUSR, show_hdcploadaes,
-		store_hdcploadaes);
-static DEVICE_ATTR(hdcpauthencr, S_IRUGO | S_IWUSR, show_hdcpauthencr,
-		store_hdcpauthencr);
-static DEVICE_ATTR(hdcpstateget, S_IRUGO, show_hdcpstateget, NULL);
-static DEVICE_ATTR(evread, S_IRUGO, show_evread, NULL);
-static DEVICE_ATTR(evclr, S_IWUSR, NULL, store_evclr);
-static DEVICE_ATTR(audiocfg, S_IWUSR, NULL, store_audiocfg);
-static DEVICE_ATTR(plugstatus, S_IRUGO, show_plugstatus, NULL);
-static DEVICE_ATTR(poweronoff, S_IRUGO | S_IWUSR, show_poweronoff,
-		store_poweronoff);
-static DEVICE_ATTR(evwakeup, S_IWUSR, NULL, store_evwakeup);
+static const struct device_attribute hdmi_sysfs_attrs[] = {
+	__ATTR(storeastext, S_IWUSR, NULL, store_storeastext),
+	__ATTR(plugdeten, S_IWUSR, NULL, store_plugdeten),
+	__ATTR(edidread, S_IRUGO | S_IWUSR, show_edidread, store_edidread),
+	__ATTR(ceceven, S_IWUSR, NULL, store_ceceven),
+	__ATTR(cecread, S_IRUGO, show_cecread, NULL),
+	__ATTR(cecsend, S_IWUSR, NULL, store_cecsend),
+	__ATTR(infofrsend, S_IWUSR, NULL, store_infofrsend),
+	__ATTR(hdcpeven, S_IWUSR, NULL, store_hdcpeven),
+	__ATTR(hdcpchkaesotp, S_IRUGO, show_hdcpchkaesotp, NULL),
+	__ATTR(hdcpfuseaes, S_IRUGO | S_IWUSR, show_hdcpfuseaes,
+			store_hdcpfuseaes),
+	__ATTR(hdcploadaes, S_IRUGO | S_IWUSR, show_hdcploadaes,
+			store_hdcploadaes),
+	__ATTR(hdcpauthencr, S_IRUGO | S_IWUSR, show_hdcpauthencr,
+			store_hdcpauthencr),
+	__ATTR(hdcpstateget, S_IRUGO, show_hdcpstateget, NULL),
+	__ATTR(evread, S_IRUGO, show_evread, NULL),
+	__ATTR(evclr, S_IWUSR, NULL, store_evclr),
+	__ATTR(audiocfg, S_IWUSR, NULL, store_audiocfg),
+	__ATTR(plugstatus, S_IRUGO, show_plugstatus, NULL),
+	__ATTR(poweronoff, S_IRUGO | S_IWUSR, show_poweronoff,
+			store_poweronoff),
+	__ATTR(evwakeup, S_IWUSR, NULL, store_evwakeup),
+	__ATTR_NULL
+};
 
 /* Hex to int conversion */
 static unsigned int htoi(const char *ptr)
 {
 	unsigned int value = 0;
-	char ch = *ptr;
+	char ch;
 
 	if (!ptr)
 		return 0;
 
+	ch = *ptr;
 	if (isdigit(ch))
 		value = ch - '0';
 	else
@@ -137,32 +151,67 @@ static unsigned int htoi(const char *ptr)
 	return value;
 }
 
-static int event_enable(bool enable, enum hdmi_event ev)
+static struct hdmi_device *dev_to_hdev(struct device *dev)
 {
-	struct kobject *kobj = &hdmidev->kobj;
+	/* Get device from list of devices */
+	struct list_head *element;
+	struct hdmi_device *hdmi_dev;
+	int cnt = 0;
+
+	list_for_each(element, &hdmi_device_list) {
+		hdmi_dev = list_entry(element, struct hdmi_device, list);
+		if (hdmi_dev->dev == dev)
+			return hdmi_dev;
+		cnt++;
+	}
+
+	return NULL;
+}
+
+static struct hdmi_device *devnr_to_hdev(int devnr)
+{
+	/* Get device from list of devices */
+	struct list_head *element;
+	struct hdmi_device *hdmi_dev;
+	int cnt = 0;
+
+	list_for_each(element, &hdmi_device_list) {
+		hdmi_dev = list_entry(element, struct hdmi_device, list);
+		if (cnt == devnr)
+			return hdmi_dev;
+		cnt++;
+	}
 
-	dev_dbg(hdmidev, "enable_event %d %02x\n", enable, ev);
+	return NULL;
+}
+
+static int event_enable(struct hdmi_device *hdev, bool enable,
+		enum hdmi_event ev)
+{
+	struct kobject *kobj = &hdev->dev->kobj;
+
+	dev_dbg(hdev->dev, "enable_event %d %02x\n", enable, ev);
 	if (enable)
-		events_mask |= ev;
+		hdev->events_mask |= ev;
 	else
-		events_mask &= ~ev;
+		hdev->events_mask &= ~ev;
 
-	if (events & ev) {
+	if (hdev->events & ev) {
 		/* Report pending event */
 		/* Wake up application waiting for event via call to poll() */
 		sysfs_notify(kobj, NULL, SYSFS_EVENT_FILENAME);
 
 		LOCK_HDMI_EVENTS;
-		events_received = true;
+		hdev->events_received = true;
 		UNLOCK_HDMI_EVENTS;
 
-		wake_up_interruptible(&hdmi_event_wq);
+		wake_up_interruptible(&hdev->event_wq);
 	}
 
 	return 0;
 }
 
-static int plugdeten(struct plug_detect *pldet)
+static int plugdeten(struct hdmi_device *hdev, struct plug_detect *pldet)
 {
 	struct av8100_status status;
 	u8 denc_off_time = 0;
@@ -171,14 +220,14 @@ static int plugdeten(struct plug_detect *pldet)
 	status = av8100_status_get();
 	if (status.av8100_state < AV8100_OPMODE_STANDBY) {
 		if (av8100_powerup() != 0) {
-			dev_err(hdmidev, "av8100_powerup failed\n");
+			dev_err(hdev->dev, "av8100_powerup failed\n");
 			return -EINVAL;
 		}
 	}
 
-	event_enable(pldet->hdmi_detect_enable != 0,
+	event_enable(hdev, pldet->hdmi_detect_enable != 0,
 		HDMI_EVENT_HDMI_PLUGIN);
-	event_enable(pldet->hdmi_detect_enable != 0,
+	event_enable(hdev, pldet->hdmi_detect_enable != 0,
 		HDMI_EVENT_HDMI_PLUGOUT);
 
 	av8100_reg_hdmi_5_volt_time_r(&denc_off_time, NULL, NULL);
@@ -189,7 +238,7 @@ static int plugdeten(struct plug_detect *pldet)
 			pldet->on_time);
 
 	if (retval) {
-		dev_err(hdmidev, "Failed to write the value to av8100 "
+		dev_err(hdev->dev, "Failed to write the value to av8100 "
 			"register\n");
 		return -EFAULT;
 	}
@@ -197,7 +246,8 @@ static int plugdeten(struct plug_detect *pldet)
 	return retval;
 }
 
-static int edidread(struct edid_read *edidread, u8 *len, u8 *data)
+static int edidread(struct hdmi_device *hdev, struct edid_read *edidread,
+			u8 *len, u8 *data)
 {
 	union av8100_configuration config;
 	struct av8100_status status;
@@ -205,14 +255,14 @@ static int edidread(struct edid_read *edidread, u8 *len, u8 *data)
 	status = av8100_status_get();
 	if (status.av8100_state < AV8100_OPMODE_STANDBY) {
 		if (av8100_powerup() != 0) {
-			dev_err(hdmidev, "av8100_powerup failed\n");
+			dev_err(hdev->dev, "av8100_powerup failed\n");
 			return -EINVAL;
 		}
 	}
 
 	if (status.av8100_state < AV8100_OPMODE_INIT) {
 		if (av8100_download_firmware(NULL, 0, I2C_INTERFACE) != 0) {
-			dev_err(hdmidev, "av8100 dl fw FAIL\n");
+			dev_err(hdev->dev, "av8100 dl fw FAIL\n");
 			return -EINVAL;
 		}
 	}
@@ -220,28 +270,29 @@ static int edidread(struct edid_read *edidread, u8 *len, u8 *data)
 	config.edid_section_readback_format.address = edidread->address;
 	config.edid_section_readback_format.block_number = edidread->block_nr;
 
-	dev_dbg(hdmidev, "addr:%0x blnr:%0x",
+	dev_dbg(hdev->dev, "addr:%0x blnr:%0x",
 		config.edid_section_readback_format.address,
 		config.edid_section_readback_format.block_number);
 
 	if (av8100_conf_prep(AV8100_COMMAND_EDID_SECTION_READBACK,
 		&config) != 0) {
-		dev_err(hdmidev, "av8100_conf_prep FAIL\n");
+		dev_err(hdev->dev, "av8100_conf_prep FAIL\n");
 		return -EINVAL;
 	}
 
 	if (av8100_conf_w(AV8100_COMMAND_EDID_SECTION_READBACK,
 		len, data, I2C_INTERFACE) != 0) {
-		dev_err(hdmidev, "av8100_conf_w FAIL\n");
+		dev_err(hdev->dev, "av8100_conf_w FAIL\n");
 		return -EINVAL;
 	}
 
-	dev_dbg(hdmidev, "len:%0x\n", *len);
+	dev_dbg(hdev->dev, "len:%0x\n", *len);
 
 	return 0;
 }
 
-static int cecread(u8 *src, u8 *dest, u8 *data_len, u8 *data)
+static int cecread(struct hdmi_device *hdev, u8 *src, u8 *dest, u8 *data_len,
+			u8 *data)
 {
 	union av8100_configuration config;
 	struct av8100_status status;
@@ -251,27 +302,27 @@ static int cecread(u8 *src, u8 *dest, u8 *data_len, u8 *data)
 	status = av8100_status_get();
 	if (status.av8100_state < AV8100_OPMODE_STANDBY) {
 		if (av8100_powerup() != 0) {
-			dev_err(hdmidev, "av8100_powerup failed\n");
+			dev_err(hdev->dev, "av8100_powerup failed\n");
 			return -EINVAL;
 		}
 	}
 
 	if (status.av8100_state < AV8100_OPMODE_INIT) {
-		if (av8100_download_firmware(NULL, 0, I2C_INTERFACE) !=	0) {
-			dev_err(hdmidev, "av8100 dl fw FAIL\n");
+		if (av8100_download_firmware(NULL, 0, I2C_INTERFACE) != 0) {
+			dev_err(hdev->dev, "av8100 dl fw FAIL\n");
 			return -EINVAL;
 		}
 	}
 
 	if (av8100_conf_prep(AV8100_COMMAND_CEC_MESSAGE_READ_BACK,
 			&config) != 0) {
-		dev_err(hdmidev, "av8100_conf_prep FAIL\n");
+		dev_err(hdev->dev, "av8100_conf_prep FAIL\n");
 		return -EINVAL;
 	}
 
 	if (av8100_conf_w(AV8100_COMMAND_CEC_MESSAGE_READ_BACK,
 		&buf_len, buff, I2C_INTERFACE) != 0) {
-		dev_err(hdmidev, "av8100_conf_w FAIL\n");
+		dev_err(hdev->dev, "av8100_conf_w FAIL\n");
 		return -EINVAL;
 	}
 
@@ -287,30 +338,33 @@ static int cecread(u8 *src, u8 *dest, u8 *data_len, u8 *data)
 }
 
 /* CEC tx status can be set or read */
-static bool cec_tx_status(enum cec_tx_status_action action)
+static bool cec_tx_status(struct hdmi_device *hdev,
+				enum cec_tx_status_action action)
 {
 	static bool cec_tx_busy;
 
 	switch (action) {
 	case CEC_TX_SET_FREE:
 		cec_tx_busy = false;
-		dev_dbg(hdmidev, "cec_tx_busy set:%d\n", cec_tx_busy);
+		dev_dbg(hdev->dev, "cec_tx_busy set:%d\n", cec_tx_busy);
 		break;
 
 	case CEC_TX_SET_BUSY:
 		cec_tx_busy = true;
-		dev_dbg(hdmidev, "cec_tx_busy set:%d\n", cec_tx_busy);
+		dev_dbg(hdev->dev, "cec_tx_busy set:%d\n", cec_tx_busy);
 		break;
 
 	case CEC_TX_CHECK:
 	default:
-		dev_dbg(hdmidev, "cec_tx_busy chk:%d\n", cec_tx_busy);
+		dev_dbg(hdev->dev, "cec_tx_busy chk:%d\n", cec_tx_busy);
 		break;
 	}
 
 	return cec_tx_busy;
 }
-static int cecsend(u8 src, u8 dest, u8 data_len, u8 *data)
+
+static int cecsend(struct hdmi_device *hdev, u8 src, u8 dest, u8 data_len,
+			u8 *data)
 {
 	union av8100_configuration config;
 	struct av8100_status status;
@@ -319,14 +373,14 @@ static int cecsend(u8 src, u8 dest, u8 data_len, u8 *data)
 	status = av8100_status_get();
 	if (status.av8100_state < AV8100_OPMODE_STANDBY) {
 		if (av8100_powerup() != 0) {
-			dev_err(hdmidev, "av8100_powerup failed\n");
+			dev_err(hdev->dev, "av8100_powerup failed\n");
 			return -EINVAL;
 		}
 	}
 
 	if (status.av8100_state < AV8100_OPMODE_INIT) {
 		if (av8100_download_firmware(NULL, 0, I2C_INTERFACE) != 0) {
-			dev_err(hdmidev, "av8100 dl fw FAIL\n");
+			dev_err(hdev->dev, "av8100 dl fw FAIL\n");
 			return -EINVAL;
 		}
 	}
@@ -338,34 +392,35 @@ static int cecsend(u8 src, u8 dest, u8 data_len, u8 *data)
 
 	if (av8100_conf_prep(AV8100_COMMAND_CEC_MESSAGE_WRITE,
 		&config) != 0) {
-		dev_err(hdmidev, "av8100_conf_prep FAIL\n");
+		dev_err(hdev->dev, "av8100_conf_prep FAIL\n");
 		return -EINVAL;
 	}
 
 	if (av8100_enable_interrupt() != 0) {
-		dev_err(hdmidev, "av8100_ei FAIL\n");
+		dev_err(hdev->dev, "av8100_ei FAIL\n");
 		return -EINVAL;
 	}
 
 	cnt = 0;
-	while ((cnt < CECTX_TRY) && cec_tx_status(CEC_TX_CHECK)) {
+	while ((cnt < CECTX_TRY) && cec_tx_status(hdev, CEC_TX_CHECK)) {
 		/* Wait for pending CEC to be finished */
 		msleep(CECTX_WAITTIME);
 		cnt++;
 	}
-	dev_dbg(hdmidev, "cectxcnt:%d\n", cnt);
+	dev_dbg(hdev->dev, "cectxcnt:%d\n", cnt);
 
 	if (av8100_conf_w(AV8100_COMMAND_CEC_MESSAGE_WRITE,
 		NULL, NULL, I2C_INTERFACE) != 0) {
-		dev_err(hdmidev, "av8100_conf_w FAIL\n");
+		dev_err(hdev->dev, "av8100_conf_w FAIL\n");
 		return -EINVAL;
 	}
-	cec_tx_status(CEC_TX_SET_BUSY);
+	cec_tx_status(hdev, CEC_TX_SET_BUSY);
 
 	return 0;
 }
 
-static int infofrsend(u8 type, u8 version, u8 crc, u8 data_len, u8 *data)
+static int infofrsend(struct hdmi_device *hdev, u8 type, u8 version, u8 crc,
+			u8 data_len, u8 *data)
 {
 	union av8100_configuration config;
 	struct av8100_status status;
@@ -373,14 +428,14 @@ static int infofrsend(u8 type, u8 version, u8 crc, u8 data_len, u8 *data)
 	status = av8100_status_get();
 	if (status.av8100_state < AV8100_OPMODE_STANDBY) {
 		if (av8100_powerup() != 0) {
-			dev_err(hdmidev, "av8100_powerup failed\n");
+			dev_err(hdev->dev, "av8100_powerup failed\n");
 			return -EINVAL;
 		}
 	}
 
 	if (status.av8100_state < AV8100_OPMODE_INIT) {
 		if (av8100_download_firmware(NULL, 0, I2C_INTERFACE) != 0) {
-			dev_err(hdmidev, "av8100 dl fw FAIL\n");
+			dev_err(hdev->dev, "av8100 dl fw FAIL\n");
 			return -EINVAL;
 		}
 	}
@@ -395,20 +450,20 @@ static int infofrsend(u8 type, u8 version, u8 crc, u8 data_len, u8 *data)
 	memcpy(&config.infoframes_format.data, data, data_len);
 	if (av8100_conf_prep(AV8100_COMMAND_INFOFRAMES,
 		&config) != 0) {
-		dev_err(hdmidev, "av8100_conf_prep FAIL\n");
+		dev_err(hdev->dev, "av8100_conf_prep FAIL\n");
 		return -EINVAL;
 	}
 
 	if (av8100_conf_w(AV8100_COMMAND_INFOFRAMES,
 		NULL, NULL, I2C_INTERFACE) != 0) {
-		dev_err(hdmidev, "av8100_conf_w FAIL\n");
+		dev_err(hdev->dev, "av8100_conf_w FAIL\n");
 		return -EINVAL;
 	}
 
 	return 0;
 }
 
-static int hdcpchkaesotp(u8 *crc, u8 *progged)
+static int hdcpchkaesotp(struct hdmi_device *hdev, u8 *crc, u8 *progged)
 {
 	union av8100_configuration config;
 	struct av8100_status status;
@@ -418,7 +473,7 @@ static int hdcpchkaesotp(u8 *crc, u8 *progged)
 	status = av8100_status_get();
 	if (status.av8100_state < AV8100_OPMODE_STANDBY) {
 		if (av8100_powerup() != 0) {
-			dev_err(hdmidev, "av8100_powerup failed\n");
+			dev_err(hdev->dev, "av8100_powerup failed\n");
 			return -EINVAL;
 		}
 	}
@@ -426,7 +481,7 @@ static int hdcpchkaesotp(u8 *crc, u8 *progged)
 	if (status.av8100_state < AV8100_OPMODE_INIT) {
 		if (av8100_download_firmware(NULL, 0, I2C_INTERFACE) !=
 			0) {
-			dev_err(hdmidev, "av8100 dl fw FAIL\n");
+			dev_err(hdev->dev, "av8100 dl fw FAIL\n");
 			return -EINVAL;
 		}
 	}
@@ -435,13 +490,13 @@ static int hdcpchkaesotp(u8 *crc, u8 *progged)
 	memset(config.fuse_aes_key_format.key, 0, AV8100_FUSE_KEY_SIZE);
 	if (av8100_conf_prep(AV8100_COMMAND_FUSE_AES_KEY,
 		&config) != 0) {
-		dev_err(hdmidev, "av8100_conf_prep FAIL\n");
+		dev_err(hdev->dev, "av8100_conf_prep FAIL\n");
 		return -EINVAL;
 	}
 
 	if (av8100_conf_w(AV8100_COMMAND_FUSE_AES_KEY,
 		&buf_len, buf, I2C_INTERFACE) != 0) {
-		dev_err(hdmidev, "av8100_conf_w FAIL\n");
+		dev_err(hdev->dev, "av8100_conf_w FAIL\n");
 		return -EINVAL;
 	}
 
@@ -453,7 +508,7 @@ static int hdcpchkaesotp(u8 *crc, u8 *progged)
 	return 0;
 }
 
-static int hdcpfuseaes(u8 *key, u8 crc, u8 *result)
+static int hdcpfuseaes(struct hdmi_device *hdev, u8 *key, u8 crc, u8 *result)
 {
 	union av8100_configuration config;
 	struct av8100_status status;
@@ -466,7 +521,7 @@ static int hdcpfuseaes(u8 *key, u8 crc, u8 *result)
 	status = av8100_status_get();
 	if (status.av8100_state < AV8100_OPMODE_STANDBY) {
 		if (av8100_powerup() != 0) {
-			dev_err(hdmidev, "av8100_powerup failed\n");
+			dev_err(hdev->dev, "av8100_powerup failed\n");
 			return -EINVAL;
 		}
 	}
@@ -474,7 +529,7 @@ static int hdcpfuseaes(u8 *key, u8 crc, u8 *result)
 	if (status.av8100_state < AV8100_OPMODE_INIT) {
 		if (av8100_download_firmware(NULL, 0, I2C_INTERFACE) !=
 			0) {
-			dev_err(hdmidev, "av8100 dl fw FAIL\n");
+			dev_err(hdev->dev, "av8100 dl fw FAIL\n");
 			return -EINVAL;
 		}
 	}
@@ -483,18 +538,18 @@ static int hdcpfuseaes(u8 *key, u8 crc, u8 *result)
 	memcpy(config.fuse_aes_key_format.key, key, AV8100_FUSE_KEY_SIZE);
 	if (av8100_conf_prep(AV8100_COMMAND_FUSE_AES_KEY,
 		&config) != 0) {
-		dev_err(hdmidev, "av8100_conf_prep FAIL\n");
+		dev_err(hdev->dev, "av8100_conf_prep FAIL\n");
 		return -EINVAL;
 	}
 
 	if (av8100_conf_w(AV8100_COMMAND_FUSE_AES_KEY,
 		&buf_len, buf, I2C_INTERFACE) != 0) {
-		dev_err(hdmidev, "av8100_conf_w FAIL\n");
+		dev_err(hdev->dev, "av8100_conf_w FAIL\n");
 		return -EINVAL;
 	}
 
 	if (buf_len == 2) {
-		dev_dbg(hdmidev, "buf[0]:%02x buf[1]:%02x\n", buf[0], buf[1]);
+		dev_dbg(hdev->dev, "buf[0]:%02x buf[1]:%02x\n", buf[0], buf[1]);
 		if ((crc == buf[0]) && (buf[1] == 1))
 			/* OK */
 			*result = HDMI_RESULT_OK;
@@ -505,7 +560,8 @@ static int hdcpfuseaes(u8 *key, u8 crc, u8 *result)
 	return 0;
 }
 
-static int hdcploadaes(u8 block, u8 key_len, u8 *key, u8 *result, u8 *crc32)
+static int hdcploadaes(struct hdmi_device *hdev, u8 block, u8 key_len, u8 *key,
+			u8 *result, u8 *crc32)
 {
 	union av8100_configuration config;
 	struct av8100_status status;
@@ -515,19 +571,19 @@ static int hdcploadaes(u8 block, u8 key_len, u8 *key, u8 *result, u8 *crc32)
 	/* Default not OK */
 	*result = HDMI_RESULT_NOT_OK;
 
-	dev_dbg(hdmidev, "%s block:%d\n", __func__, block);
+	dev_dbg(hdev->dev, "%s block:%d\n", __func__, block);
 
 	status = av8100_status_get();
 	if (status.av8100_state < AV8100_OPMODE_STANDBY) {
 		if (av8100_powerup() != 0) {
-			dev_err(hdmidev, "av8100_powerup failed\n");
+			dev_err(hdev->dev, "av8100_powerup failed\n");
 			return -EINVAL;
 		}
 	}
 
 	if (status.av8100_state < AV8100_OPMODE_INIT) {
 		if (av8100_download_firmware(NULL, 0, I2C_INTERFACE) != 0) {
-			dev_err(hdmidev, "av8100 dl fw FAIL\n");
+			dev_err(hdev->dev, "av8100 dl fw FAIL\n");
 			return -EINVAL;
 		}
 	}
@@ -536,19 +592,19 @@ static int hdcploadaes(u8 block, u8 key_len, u8 *key, u8 *result, u8 *crc32)
 	config.hdcp_send_key_format.data_len = key_len;
 	memcpy(config.hdcp_send_key_format.data, key, key_len);
 	if (av8100_conf_prep(AV8100_COMMAND_HDCP_SENDKEY, &config) != 0) {
-		dev_err(hdmidev, "av8100_conf_prep FAIL\n");
+		dev_err(hdev->dev, "av8100_conf_prep FAIL\n");
 		return -EINVAL;
 	}
 
 	if (av8100_conf_w(AV8100_COMMAND_HDCP_SENDKEY,
 		&buf_len, buf, I2C_INTERFACE) != 0) {
-		dev_err(hdmidev, "av8100_conf_w FAIL\n");
+		dev_err(hdev->dev, "av8100_conf_w FAIL\n");
 		return -EINVAL;
 	}
 
 	if ((buf_len == CRC32_SIZE) && (crc32)) {
 		memcpy(crc32, buf, CRC32_SIZE);
-		dev_dbg(hdmidev, "crc32:%02x%02x%02x%02x\n",
+		dev_dbg(hdev->dev, "crc32:%02x%02x%02x%02x\n",
 			crc32[0], crc32[1], crc32[2], crc32[3]);
 	}
 
@@ -557,7 +613,8 @@ static int hdcploadaes(u8 block, u8 key_len, u8 *key, u8 *result, u8 *crc32)
 	return 0;
 }
 
-static int hdcpauthencr(u8 auth_type, u8 encr_type, u8 *len, u8 *data)
+static int hdcpauthencr(struct hdmi_device *hdev, u8 auth_type, u8 encr_type,
+			u8 *len, u8 *data)
 {
 	union av8100_configuration config;
 	struct av8100_status status;
@@ -565,14 +622,14 @@ static int hdcpauthencr(u8 auth_type, u8 encr_type, u8 *len, u8 *data)
 	status = av8100_status_get();
 	if (status.av8100_state < AV8100_OPMODE_STANDBY) {
 		if (av8100_powerup() != 0) {
-			dev_err(hdmidev, "av8100_powerup failed\n");
+			dev_err(hdev->dev, "av8100_powerup failed\n");
 			return -EINVAL;
 		}
 	}
 
 	if (status.av8100_state < AV8100_OPMODE_INIT) {
 		if (av8100_download_firmware(NULL, 0, I2C_INTERFACE) != 0) {
-			dev_err(hdmidev, "av8100 dl fw FAIL\n");
+			dev_err(hdev->dev, "av8100 dl fw FAIL\n");
 			return -EINVAL;
 		}
 	}
@@ -614,61 +671,61 @@ static int hdcpauthencr(u8 auth_type, u8 encr_type, u8 *len, u8 *data)
 
 	if (av8100_conf_prep(AV8100_COMMAND_HDCP_MANAGEMENT,
 		&config) != 0) {
-		dev_err(hdmidev, "av8100_conf_prep FAIL\n");
+		dev_err(hdev->dev, "av8100_conf_prep FAIL\n");
 		return -EINVAL;
 	}
 
 	if (av8100_conf_w(AV8100_COMMAND_HDCP_MANAGEMENT,
 		len, data, I2C_INTERFACE) != 0) {
-		dev_err(hdmidev, "av8100_conf_w FAIL\n");
+		dev_err(hdev->dev, "av8100_conf_w FAIL\n");
 		return -EINVAL;
 	}
 
 	return 0;
 }
 
-static u8 events_read(void)
+static u8 events_read(struct hdmi_device *hdev)
 {
 	int ret;
 
 	LOCK_HDMI_EVENTS;
-	ret = events;
-	dev_dbg(hdmidev, "%s %02x\n", __func__, events);
+	ret = hdev->events;
+	dev_dbg(hdev->dev, "%s %02x\n", __func__, hdev->events);
 	UNLOCK_HDMI_EVENTS;
 
 	return ret;
 }
 
-static int events_clear(u8 ev)
+static int events_clear(struct hdmi_device *hdev, u8 ev)
 {
-	dev_dbg(hdmidev, "%s %02x\n", __func__, ev);
+	dev_dbg(hdev->dev, "%s %02x\n", __func__, ev);
 
 	LOCK_HDMI_EVENTS;
-	events &= ~ev & EVENTS_MASK;
+	hdev->events &= ~ev & EVENTS_MASK;
 	UNLOCK_HDMI_EVENTS;
 
 	return 0;
 }
 
-static int event_wakeup(void)
+static int event_wakeup(struct hdmi_device *hdev)
 {
-	struct kobject *kobj = &hdmidev->kobj;
+	struct kobject *kobj = &hdev->dev->kobj;
 
-	dev_dbg(hdmidev, "%s", __func__);
+	dev_dbg(hdev->dev, "%s", __func__);
 
 	LOCK_HDMI_EVENTS;
-	events |= HDMI_EVENT_WAKEUP;
-	events_received = true;
+	hdev->events |= HDMI_EVENT_WAKEUP;
+	hdev->events_received = true;
 	UNLOCK_HDMI_EVENTS;
 
 	/* Wake up application waiting for event via call to poll() */
 	sysfs_notify(kobj, NULL, SYSFS_EVENT_FILENAME);
-	wake_up_interruptible(&hdmi_event_wq);
+	wake_up_interruptible(&hdev->event_wq);
 
 	return 0;
 }
 
-static int audiocfg(struct audio_cfg *cfg)
+static int audiocfg(struct hdmi_device *hdev, struct audio_cfg *cfg)
 {
 	union av8100_configuration config;
 	struct av8100_status status;
@@ -676,14 +733,14 @@ static int audiocfg(struct audio_cfg *cfg)
 	status = av8100_status_get();
 	if (status.av8100_state < AV8100_OPMODE_STANDBY) {
 		if (av8100_powerup() != 0) {
-			dev_err(hdmidev, "av8100_powerup failed\n");
+			dev_err(hdev->dev, "av8100_powerup failed\n");
 			return -EINVAL;
 		}
 	}
 
 	if (status.av8100_state < AV8100_OPMODE_INIT) {
 		if (av8100_download_firmware(NULL, 0, I2C_INTERFACE) != 0) {
-			dev_err(hdmidev, "av8100 dl fw FAIL\n");
+			dev_err(hdev->dev, "av8100 dl fw FAIL\n");
 			return -EINVAL;
 		}
 	}
@@ -698,13 +755,13 @@ static int audiocfg(struct audio_cfg *cfg)
 
 	if (av8100_conf_prep(AV8100_COMMAND_AUDIO_INPUT_FORMAT,
 		&config) != 0) {
-		dev_err(hdmidev, "av8100_conf_prep FAIL\n");
+		dev_err(hdev->dev, "av8100_conf_prep FAIL\n");
 		return -EINVAL;
 	}
 
 	if (av8100_conf_w(AV8100_COMMAND_AUDIO_INPUT_FORMAT,
 		NULL, NULL, I2C_INTERFACE) != 0) {
-		dev_err(hdmidev, "av8100_conf_w FAIL\n");
+		dev_err(hdev->dev, "av8100_conf_w FAIL\n");
 		return -EINVAL;
 	}
 
@@ -715,11 +772,12 @@ static int audiocfg(struct audio_cfg *cfg)
 static ssize_t store_storeastext(struct device *dev,
 		struct device_attribute *attr, const char *buf, size_t count)
 {
-	struct hdmi_driver_data *hdmi_driver_data;
+	struct hdmi_device *hdev = dev_to_hdev(dev);
 
-	dev_dbg(hdmidev, "%s\n", __func__);
+	if (!hdev)
+		return -EFAULT;
 
-	hdmi_driver_data = dev_get_drvdata(dev);
+	dev_dbg(hdev->dev, "%s\n", __func__);
 
 	if ((count != HDMI_STOREASTEXT_BIN_SIZE) &&
 		(count != HDMI_STOREASTEXT_TEXT_SIZE) &&
@@ -727,17 +785,17 @@ static ssize_t store_storeastext(struct device *dev,
 		return -EINVAL;
 
 	if ((count == HDMI_STOREASTEXT_BIN_SIZE) && (*buf == 0x1))
-		hdmi_driver_data->store_as_hextext = true;
+		hdev->sysfs_data.store_as_hextext = true;
 	else if (((count == HDMI_STOREASTEXT_TEXT_SIZE) ||
 		(count == HDMI_STOREASTEXT_TEXT_SIZE + 1)) && (*buf == '0') &&
 			(*(buf + 1) == '1')) {
-		hdmi_driver_data->store_as_hextext = true;
+		hdev->sysfs_data.store_as_hextext = true;
 	} else {
-		hdmi_driver_data->store_as_hextext = false;
+		hdev->sysfs_data.store_as_hextext = false;
 	}
 
-	dev_dbg(hdmidev, "store_as_hextext:%0d\n",
-		hdmi_driver_data->store_as_hextext);
+	dev_dbg(hdev->dev, "store_as_hextext:%0d\n",
+		hdev->sysfs_data.store_as_hextext);
 
 	return count;
 }
@@ -745,15 +803,16 @@ static ssize_t store_storeastext(struct device *dev,
 static ssize_t store_plugdeten(struct device *dev,
 		struct device_attribute *attr, const char *buf, size_t count)
 {
-	struct hdmi_driver_data *hdmi_driver_data;
+	struct hdmi_device *hdev = dev_to_hdev(dev);
 	struct plug_detect plug_detect;
 	int index = 0;
 
-	dev_dbg(hdmidev, "%s\n", __func__);
+	if (!hdev)
+		return -EFAULT;
 
-	hdmi_driver_data = dev_get_drvdata(dev);
+	dev_dbg(hdev->dev, "%s\n", __func__);
 
-	if (hdmi_driver_data->store_as_hextext) {
+	if (hdev->sysfs_data.store_as_hextext) {
 		if ((count != HDMI_PLUGDETEN_TEXT_SIZE) &&
 			(count != HDMI_PLUGDETEN_TEXT_SIZE + 1))
 			return -EINVAL;
@@ -771,7 +830,7 @@ static ssize_t store_plugdeten(struct device *dev,
 		plug_detect.hdmi_off_time = *(buf + index++);
 	}
 
-	if (plugdeten(&plug_detect))
+	if (plugdeten(hdev, &plug_detect))
 		return -EINVAL;
 
 	return count;
@@ -780,16 +839,17 @@ static ssize_t store_plugdeten(struct device *dev,
 static ssize_t store_edidread(struct device *dev,
 		struct device_attribute *attr, const char *buf, size_t count)
 {
-	struct hdmi_driver_data *hdmi_driver_data;
+	struct hdmi_device *hdev = dev_to_hdev(dev);
 	struct edid_read edid_read;
 	int index = 0;
 
-	dev_dbg(hdmidev, "%s\n", __func__);
-	dev_dbg(hdmidev, "count:%d\n", count);
+	if (!hdev)
+		return -EFAULT;
 
-	hdmi_driver_data = dev_get_drvdata(dev);
+	dev_dbg(hdev->dev, "%s\n", __func__);
+	dev_dbg(hdev->dev, "count:%d\n", count);
 
-	if (hdmi_driver_data->store_as_hextext) {
+	if (hdev->sysfs_data.store_as_hextext) {
 		if ((count != HDMI_EDIDREAD_TEXT_SIZE) &&
 			(count != HDMI_EDIDREAD_TEXT_SIZE + 1))
 			return -EINVAL;
@@ -804,8 +864,8 @@ static ssize_t store_edidread(struct device *dev,
 		edid_read.block_nr = *(buf + index++);
 	}
 
-	if (edidread(&edid_read, &hdmi_driver_data->edid_data.buf_len,
-			hdmi_driver_data->edid_data.buf))
+	if (edidread(hdev, &edid_read, &hdev->sysfs_data.edid_data.buf_len,
+			hdev->sysfs_data.edid_data.buf))
 		return -EINVAL;
 
 	return count;
@@ -814,42 +874,43 @@ static ssize_t store_edidread(struct device *dev,
 static ssize_t show_edidread(struct device *dev, struct device_attribute *attr,
 		char *buf)
 {
-	struct hdmi_driver_data *hdmi_driver_data;
+	struct hdmi_device *hdev = dev_to_hdev(dev);
 	int len;
 	int index = 0;
 	int cnt;
 
-	dev_dbg(hdmidev, "%s\n", __func__);
+	if (!hdev)
+		return -EFAULT;
 
-	hdmi_driver_data = dev_get_drvdata(dev);
+	dev_dbg(hdev->dev, "%s\n", __func__);
 
-	len = hdmi_driver_data->edid_data.buf_len;
+	len = hdev->sysfs_data.edid_data.buf_len;
 
-	if (hdmi_driver_data->store_as_hextext) {
+	if (hdev->sysfs_data.store_as_hextext) {
 		snprintf(buf + index, 3, "%02x", len);
 		index += 2;
 	} else
 		*(buf + index++) = len;
 
-	dev_dbg(hdmidev, "len:%02x\n", len);
+	dev_dbg(hdev->dev, "len:%02x\n", len);
 
 	cnt = 0;
 	while (cnt < len) {
-		if (hdmi_driver_data->store_as_hextext) {
+		if (hdev->sysfs_data.store_as_hextext) {
 			snprintf(buf + index, 3, "%02x",
-				hdmi_driver_data->edid_data.buf[cnt]);
+				hdev->sysfs_data.edid_data.buf[cnt]);
 			index += 2;
 		} else
 			*(buf + index++) =
-				hdmi_driver_data->edid_data.buf[cnt];
+				hdev->sysfs_data.edid_data.buf[cnt];
 
-		dev_dbg(hdmidev, "%02x ",
-			hdmi_driver_data->edid_data.buf[cnt]);
+		dev_dbg(hdev->dev, "%02x ",
+			hdev->sysfs_data.edid_data.buf[cnt]);
 
 		cnt++;
 	}
 
-	if (hdmi_driver_data->store_as_hextext)
+	if (hdev->sysfs_data.store_as_hextext)
 		index++;
 
 	return index;
@@ -858,14 +919,15 @@ static ssize_t show_edidread(struct device *dev, struct device_attribute *attr,
 static ssize_t store_ceceven(struct device *dev,
 		struct device_attribute *attr, const char *buf, size_t count)
 {
-	struct hdmi_driver_data *hdmi_driver_data;
+	struct hdmi_device *hdev = dev_to_hdev(dev);
 	bool enable = false;
 
-	dev_dbg(hdmidev, "%s\n", __func__);
+	if (!hdev)
+		return -EFAULT;
 
-	hdmi_driver_data = dev_get_drvdata(dev);
+	dev_dbg(hdev->dev, "%s\n", __func__);
 
-	if (hdmi_driver_data->store_as_hextext) {
+	if (hdev->sysfs_data.store_as_hextext) {
 		if ((count != HDMI_CECEVEN_TEXT_SIZE) &&
 			(count != HDMI_CECEVEN_TEXT_SIZE + 1))
 			return -EINVAL;
@@ -878,7 +940,7 @@ static ssize_t store_ceceven(struct device *dev,
 			enable = true;
 	}
 
-	event_enable(enable, HDMI_EVENT_CEC | HDMI_EVENT_CECTXERR |
+	event_enable(hdev, enable, HDMI_EVENT_CEC | HDMI_EVENT_CECTXERR |
 						HDMI_EVENT_CECTX);
 
 	return count;
@@ -887,20 +949,21 @@ static ssize_t store_ceceven(struct device *dev,
 static ssize_t show_cecread(struct device *dev, struct device_attribute *attr,
 		char *buf)
 {
-	struct hdmi_driver_data *hdmi_driver_data;
+	struct hdmi_device *hdev = dev_to_hdev(dev);
 	struct cec_rw cec_read;
 	int index = 0;
 	int cnt;
 
-	dev_dbg(hdmidev, "%s\n", __func__);
+	if (!hdev)
+		return -EFAULT;
 
-	hdmi_driver_data = dev_get_drvdata(dev);
+	dev_dbg(hdev->dev, "%s\n", __func__);
 
-	if (cecread(&cec_read.src, &cec_read.dest, &cec_read.length,
+	if (cecread(hdev, &cec_read.src, &cec_read.dest, &cec_read.length,
 		cec_read.data))
 		return -EINVAL;
 
-	if (hdmi_driver_data->store_as_hextext) {
+	if (hdev->sysfs_data.store_as_hextext) {
 		snprintf(buf + index, 3, "%02x", cec_read.src);
 		index += 2;
 		snprintf(buf + index, 3, "%02x", cec_read.dest);
@@ -913,22 +976,22 @@ static ssize_t show_cecread(struct device *dev, struct device_attribute *attr,
 		*(buf + index++) = cec_read.length;
 	}
 
-	dev_dbg(hdmidev, "len:%02x\n", cec_read.length);
+	dev_dbg(hdev->dev, "len:%02x\n", cec_read.length);
 
 	cnt = 0;
 	while (cnt < cec_read.length) {
-		if (hdmi_driver_data->store_as_hextext) {
+		if (hdev->sysfs_data.store_as_hextext) {
 			snprintf(buf + index, 3, "%02x", cec_read.data[cnt]);
 			index += 2;
 		} else
 			*(buf + index++) = cec_read.data[cnt];
 
-		dev_dbg(hdmidev, "%02x ", cec_read.data[cnt]);
+		dev_dbg(hdev->dev, "%02x ", cec_read.data[cnt]);
 
 		cnt++;
 	}
 
-	if (hdmi_driver_data->store_as_hextext)
+	if (hdev->sysfs_data.store_as_hextext)
 		index++;
 
 	return index;
@@ -937,21 +1000,22 @@ static ssize_t show_cecread(struct device *dev, struct device_attribute *attr,
 static ssize_t store_cecsend(struct device *dev,
 		struct device_attribute *attr, const char *buf, size_t count)
 {
-	struct hdmi_driver_data *hdmi_driver_data;
+	struct hdmi_device *hdev = dev_to_hdev(dev);
 	struct cec_rw cec_w;
 	int index = 0;
 	int cnt;
 	int store_as_text;
 
-	dev_dbg(hdmidev, "%s\n", __func__);
+	if (!hdev)
+		return -EFAULT;
 
-	hdmi_driver_data = dev_get_drvdata(dev);
+	dev_dbg(hdev->dev, "%s\n", __func__);
 
 	if ((*buf == 'F') || (*buf == 'f'))
 		/* To be able to override bin format for test purpose */
 		store_as_text = 1;
 	else
-		store_as_text = hdmi_driver_data->store_as_hextext;
+		store_as_text = hdev->sysfs_data.store_as_hextext;
 
 	if (store_as_text) {
 		if ((count < HDMI_CECSEND_TEXT_SIZE_MIN) ||
@@ -970,7 +1034,7 @@ static ssize_t store_cecsend(struct device *dev,
 		while (cnt < cec_w.length) {
 			cec_w.data[cnt] = htoi(buf + index);
 			index += 2;
-			dev_dbg(hdmidev, "%02x ", cec_w.data[cnt]);
+			dev_dbg(hdev->dev, "%02x ", cec_w.data[cnt]);
 			cnt++;
 		}
 	} else {
@@ -986,10 +1050,7 @@ static ssize_t store_cecsend(struct device *dev,
 		memcpy(cec_w.data, buf + index, cec_w.length);
 	}
 
-	if (cecsend(cec_w.src,
-			cec_w.dest,
-			cec_w.length,
-			cec_w.data))
+	if (cecsend(hdev, cec_w.src, cec_w.dest, cec_w.length, cec_w.data))
 		return -EINVAL;
 
 	return count;
@@ -998,16 +1059,17 @@ static ssize_t store_cecsend(struct device *dev,
 static ssize_t store_infofrsend(struct device *dev,
 		struct device_attribute *attr, const char *buf, size_t count)
 {
-	struct hdmi_driver_data *hdmi_driver_data;
+	struct hdmi_device *hdev = dev_to_hdev(dev);
 	struct info_fr info_fr;
 	int index = 0;
 	int cnt;
 
-	dev_dbg(hdmidev, "%s\n", __func__);
+	if (!hdev)
+		return -EFAULT;
 
-	hdmi_driver_data = dev_get_drvdata(dev);
+	dev_dbg(hdev->dev, "%s\n", __func__);
 
-	if (hdmi_driver_data->store_as_hextext) {
+	if (hdev->sysfs_data.store_as_hextext) {
 		if ((count < HDMI_INFOFRSEND_TEXT_SIZE_MIN) ||
 			(count > HDMI_INFOFRSEND_TEXT_SIZE_MAX))
 			return -EINVAL;
@@ -1027,7 +1089,7 @@ static ssize_t store_infofrsend(struct device *dev,
 		while (cnt < info_fr.length) {
 			info_fr.data[cnt] = htoi(buf + index);
 			index += 2;
-			dev_dbg(hdmidev, "%02x ", info_fr.data[cnt]);
+			dev_dbg(hdev->dev, "%02x ", info_fr.data[cnt]);
 			cnt++;
 		}
 	} else {
@@ -1045,7 +1107,7 @@ static ssize_t store_infofrsend(struct device *dev,
 		memcpy(info_fr.data, buf + index, info_fr.length);
 	}
 
-	if (infofrsend(info_fr.type, info_fr.ver, info_fr.crc,
+	if (infofrsend(hdev, info_fr.type, info_fr.ver, info_fr.crc,
 		info_fr.length, info_fr.data))
 		return -EINVAL;
 
@@ -1055,14 +1117,15 @@ static ssize_t store_infofrsend(struct device *dev,
 static ssize_t store_hdcpeven(struct device *dev,
 		struct device_attribute *attr, const char *buf, size_t count)
 {
-	struct hdmi_driver_data *hdmi_driver_data;
+	struct hdmi_device *hdev = dev_to_hdev(dev);
 	bool enable = false;
 
-	dev_dbg(hdmidev, "%s\n", __func__);
+	if (!hdev)
+		return -EFAULT;
 
-	hdmi_driver_data = dev_get_drvdata(dev);
+	dev_dbg(hdev->dev, "%s\n", __func__);
 
-	if (hdmi_driver_data->store_as_hextext) {
+	if (hdev->sysfs_data.store_as_hextext) {
 		if ((count != HDMI_HDCPEVEN_TEXT_SIZE) &&
 			(count != HDMI_HDCPEVEN_TEXT_SIZE + 1))
 			return -EINVAL;
@@ -1075,7 +1138,7 @@ static ssize_t store_hdcpeven(struct device *dev,
 			enable = true;
 	}
 
-	event_enable(enable, HDMI_EVENT_HDCP);
+	event_enable(hdev, enable, HDMI_EVENT_HDCP);
 
 	return count;
 }
@@ -1083,28 +1146,29 @@ static ssize_t store_hdcpeven(struct device *dev,
 static ssize_t show_hdcpchkaesotp(struct device *dev,
 	struct device_attribute *attr, char *buf)
 {
-	struct hdmi_driver_data *hdmi_driver_data;
+	struct hdmi_device *hdev = dev_to_hdev(dev);
 	u8 crc;
 	u8 progged;
 	int index = 0;
 
-	dev_dbg(hdmidev, "%s\n", __func__);
+	if (!hdev)
+		return -EFAULT;
 
-	hdmi_driver_data = dev_get_drvdata(dev);
+	dev_dbg(hdev->dev, "%s\n", __func__);
 
-	if (hdcpchkaesotp(&crc, &progged))
+	if (hdcpchkaesotp(hdev, &crc, &progged))
 		return -EINVAL;
 
-	if (hdmi_driver_data->store_as_hextext) {
+	if (hdev->sysfs_data.store_as_hextext) {
 		snprintf(buf + index, 3, "%02x", progged);
 		index += 2;
 	} else {
 		*(buf + index++) = progged;
 	}
 
-	dev_dbg(hdmidev, "progged:%02x\n", progged);
+	dev_dbg(hdev->dev, "progged:%02x\n", progged);
 
-	if (hdmi_driver_data->store_as_hextext)
+	if (hdev->sysfs_data.store_as_hextext)
 		index++;
 
 	return index;
@@ -1113,19 +1177,20 @@ static ssize_t show_hdcpchkaesotp(struct device *dev,
 static ssize_t store_hdcpfuseaes(struct device *dev,
 		struct device_attribute *attr, const char *buf, size_t count)
 {
-	struct hdmi_driver_data *hdmi_driver_data;
+	struct hdmi_device *hdev = dev_to_hdev(dev);
 	struct hdcp_fuseaes hdcp_fuseaes;
 	int index = 0;
 	int cnt;
 
-	dev_dbg(hdmidev, "%s\n", __func__);
+	if (!hdev)
+		return -EFAULT;
 
-	hdmi_driver_data = dev_get_drvdata(dev);
+	dev_dbg(hdev->dev, "%s\n", __func__);
 
 	/* Default not OK */
-	hdmi_driver_data->fuse_result = HDMI_RESULT_NOT_OK;
+	hdev->sysfs_data.fuse_result = HDMI_RESULT_NOT_OK;
 
-	if (hdmi_driver_data->store_as_hextext) {
+	if (hdev->sysfs_data.store_as_hextext) {
 		if ((count != HDMI_HDCP_FUSEAES_TEXT_SIZE) &&
 			(count != HDMI_HDCP_FUSEAES_TEXT_SIZE + 1))
 			return -EINVAL;
@@ -1134,12 +1199,12 @@ static ssize_t store_hdcpfuseaes(struct device *dev,
 		while (cnt < HDMI_HDCP_FUSEAES_KEYSIZE) {
 			hdcp_fuseaes.key[cnt] = htoi(buf + index);
 			index += 2;
-			dev_dbg(hdmidev, "%02x ", hdcp_fuseaes.key[cnt]);
+			dev_dbg(hdev->dev, "%02x ", hdcp_fuseaes.key[cnt]);
 			cnt++;
 		}
 		hdcp_fuseaes.crc = htoi(&buf[index]);
 		index += 2;
-		dev_dbg(hdmidev, "%02x ", hdcp_fuseaes.crc);
+		dev_dbg(hdev->dev, "%02x ", hdcp_fuseaes.crc);
 	} else {
 		if (count != HDMI_HDCP_FUSEAES_BIN_SIZE)
 			return -EINVAL;
@@ -1150,13 +1215,13 @@ static ssize_t store_hdcpfuseaes(struct device *dev,
 		hdcp_fuseaes.crc = *(buf + index++);
 	}
 
-	if (hdcpfuseaes(hdcp_fuseaes.key, hdcp_fuseaes.crc,
+	if (hdcpfuseaes(hdev, hdcp_fuseaes.key, hdcp_fuseaes.crc,
 		&hdcp_fuseaes.result))
 		return -EINVAL;
 
-	dev_dbg(hdmidev, "fuseresult:%02x ", hdcp_fuseaes.result);
+	dev_dbg(hdev->dev, "fuseresult:%02x ", hdcp_fuseaes.result);
 
-	hdmi_driver_data->fuse_result = hdcp_fuseaes.result;
+	hdev->sysfs_data.fuse_result = hdcp_fuseaes.result;
 
 	return count;
 }
@@ -1164,23 +1229,23 @@ static ssize_t store_hdcpfuseaes(struct device *dev,
 static ssize_t show_hdcpfuseaes(struct device *dev,
 	struct device_attribute *attr, char *buf)
 {
-	struct hdmi_driver_data *hdmi_driver_data;
+	struct hdmi_device *hdev = dev_to_hdev(dev);
 	int index = 0;
 
-	dev_dbg(hdmidev, "%s\n", __func__);
+	if (!hdev)
+		return -EFAULT;
 
-	hdmi_driver_data = dev_get_drvdata(dev);
+	dev_dbg(hdev->dev, "%s\n", __func__);
 
-	if (hdmi_driver_data->store_as_hextext) {
-		snprintf(buf + index, 3, "%02x",
-			hdmi_driver_data->fuse_result);
+	if (hdev->sysfs_data.store_as_hextext) {
+		snprintf(buf + index, 3, "%02x", hdev->sysfs_data.fuse_result);
 		index += 2;
 	} else
-		*(buf + index++) = hdmi_driver_data->fuse_result;
+		*(buf + index++) = hdev->sysfs_data.fuse_result;
 
-	dev_dbg(hdmidev, "status:%02x\n", hdmi_driver_data->fuse_result);
+	dev_dbg(hdev->dev, "status:%02x\n", hdev->sysfs_data.fuse_result);
 
-	if (hdmi_driver_data->store_as_hextext)
+	if (hdev->sysfs_data.store_as_hextext)
 		index++;
 
 	return index;
@@ -1189,7 +1254,7 @@ static ssize_t show_hdcpfuseaes(struct device *dev,
 static ssize_t store_hdcploadaes(struct device *dev,
 		struct device_attribute *attr, const char *buf, size_t count)
 {
-	struct hdmi_driver_data *hdmi_driver_data;
+	struct hdmi_device *hdev = dev_to_hdev(dev);
 	struct hdcp_loadaesone hdcp_loadaes;
 	int index = 0;
 	int block_cnt;
@@ -1198,14 +1263,15 @@ static ssize_t store_hdcploadaes(struct device *dev,
 	u8 crc;
 	u8 progged;
 
-	dev_dbg(hdmidev, "%s\n", __func__);
+	if (!hdev)
+		return -EFAULT;
 
-	hdmi_driver_data = dev_get_drvdata(dev);
+	dev_dbg(hdev->dev, "%s\n", __func__);
 
 	/* Default not OK */
-	hdmi_driver_data->loadaes_result = HDMI_RESULT_NOT_OK;
+	hdev->sysfs_data.loadaes_result = HDMI_RESULT_NOT_OK;
 
-	if (hdcpchkaesotp(&crc, &progged))
+	if (hdcpchkaesotp(hdev, &crc, &progged))
 		return -EINVAL;
 
 	if (!progged) {
@@ -1214,10 +1280,10 @@ static ssize_t store_hdcploadaes(struct device *dev,
 		goto store_hdcploadaes_err;
 	}
 
-	if (hdmi_driver_data->store_as_hextext) {
+	if (hdev->sysfs_data.store_as_hextext) {
 		if ((count != HDMI_HDCP_LOADAES_TEXT_SIZE) &&
 			(count != HDMI_HDCP_LOADAES_TEXT_SIZE + 1)) {
-			dev_err(hdmidev, "%s", "count mismatch\n");
+			dev_err(hdev->dev, "%s", "count mismatch\n");
 			return -EINVAL;
 		}
 
@@ -1228,17 +1294,18 @@ static ssize_t store_hdcploadaes(struct device *dev,
 			while (cnt < HDMI_HDCP_AES_KEYSIZE) {
 				hdcp_loadaes.key[cnt] =	htoi(buf + index);
 				index += 2;
-				dev_dbg(hdmidev, "%02x ",
+				dev_dbg(hdev->dev, "%02x ",
 					hdcp_loadaes.key[cnt]);
 				cnt++;
 			}
 
-			if (hdcploadaes(block_cnt + HDMI_HDCP_AES_BLOCK_START,
+			if (hdcploadaes(hdev,
+					block_cnt + HDMI_HDCP_AES_BLOCK_START,
 					HDMI_HDCP_AES_KEYSIZE,
 					hdcp_loadaes.key,
 					&hdcp_loadaes.result,
 					crc32_rcvd)) {
-				dev_err(hdmidev, "%s %d\n",
+				dev_err(hdev->dev, "%s %d\n",
 					"hdcploadaes err aes block",
 					block_cnt + HDMI_HDCP_AES_BLOCK_START);
 				return -EINVAL;
@@ -1258,17 +1325,18 @@ static ssize_t store_hdcploadaes(struct device *dev,
 			hdcp_loadaes.key[cnt] =
 					htoi(&buf[index]);
 			index += 2;
-			dev_dbg(hdmidev, "%02x ", hdcp_loadaes.key[cnt]);
+			dev_dbg(hdev->dev, "%02x ", hdcp_loadaes.key[cnt]);
 			cnt++;
 		}
 
-		if (hdcploadaes(HDMI_HDCP_KSV_BLOCK,
+		if (hdcploadaes(hdev, HDMI_HDCP_KSV_BLOCK,
 				HDMI_HDCP_AES_KSVSIZE +
 				HDMI_HDCP_AES_KSVZEROESSIZE,
 				hdcp_loadaes.key,
 				&hdcp_loadaes.result,
 				NULL)) {
-			dev_err(hdmidev, "%s %d\n", "hdcploadaes err in ksv\n",
+			dev_err(hdev->dev,
+				"%s %d\n", "hdcploadaes err in ksv\n",
 				block_cnt + HDMI_HDCP_AES_BLOCK_START);
 			return -EINVAL;
 		}
@@ -1283,7 +1351,7 @@ static ssize_t store_hdcploadaes(struct device *dev,
 		}
 
 		if (memcmp(hdcp_loadaes.crc32, crc32_rcvd, CRC32_SIZE)) {
-			dev_dbg(hdmidev, "crc32exp:%02x%02x%02x%02x\n",
+			dev_dbg(hdev->dev, "crc32exp:%02x%02x%02x%02x\n",
 				hdcp_loadaes.crc32[0],
 				hdcp_loadaes.crc32[1],
 				hdcp_loadaes.crc32[2],
@@ -1293,7 +1361,7 @@ static ssize_t store_hdcploadaes(struct device *dev,
 		}
 	} else {
 		if (count != HDMI_HDCP_LOADAES_BIN_SIZE) {
-			dev_err(hdmidev, "%s", "count mismatch\n");
+			dev_err(hdev->dev, "%s", "count mismatch\n");
 			return -EINVAL;
 		}
 
@@ -1304,12 +1372,13 @@ static ssize_t store_hdcploadaes(struct device *dev,
 					HDMI_HDCP_AES_KEYSIZE);
 			index += HDMI_HDCP_AES_KEYSIZE;
 
-			if (hdcploadaes(block_cnt + HDMI_HDCP_AES_BLOCK_START,
+			if (hdcploadaes(hdev,
+					block_cnt + HDMI_HDCP_AES_BLOCK_START,
 					HDMI_HDCP_AES_KEYSIZE,
 					hdcp_loadaes.key,
 					&hdcp_loadaes.result,
 					crc32_rcvd)) {
-				dev_err(hdmidev, "%s %d\n",
+				dev_err(hdev->dev, "%s %d\n",
 					"hdcploadaes err aes block",
 					block_cnt + HDMI_HDCP_AES_BLOCK_START);
 				return -EINVAL;
@@ -1328,13 +1397,14 @@ static ssize_t store_hdcploadaes(struct device *dev,
 				HDMI_HDCP_AES_KSVSIZE);
 		index += HDMI_HDCP_AES_KSVSIZE;
 
-		if (hdcploadaes(HDMI_HDCP_KSV_BLOCK,
+		if (hdcploadaes(hdev, HDMI_HDCP_KSV_BLOCK,
 				HDMI_HDCP_AES_KSVSIZE +
 				HDMI_HDCP_AES_KSVZEROESSIZE,
 				hdcp_loadaes.key,
 				&hdcp_loadaes.result,
 				NULL)) {
-			dev_err(hdmidev, "%s %d\n", "hdcploadaes err in ksv\n",
+			dev_err(hdev->dev, "%s %d\n",
+				"hdcploadaes err in ksv\n",
 				block_cnt + HDMI_HDCP_AES_BLOCK_START);
 			return -EINVAL;
 		}
@@ -1344,7 +1414,7 @@ static ssize_t store_hdcploadaes(struct device *dev,
 
 		/* CRC32 */
 		if (memcmp(hdcp_loadaes.crc32, crc32_rcvd, CRC32_SIZE)) {
-			dev_dbg(hdmidev, "crc32exp:%02x%02x%02x%02x\n",
+			dev_dbg(hdev->dev, "crc32exp:%02x%02x%02x%02x\n",
 				hdcp_loadaes.crc32[0],
 				hdcp_loadaes.crc32[1],
 				hdcp_loadaes.crc32[2],
@@ -1354,30 +1424,31 @@ static ssize_t store_hdcploadaes(struct device *dev,
 	}
 
 store_hdcploadaes_err:
-	hdmi_driver_data->loadaes_result = hdcp_loadaes.result;
+	hdev->sysfs_data.loadaes_result = hdcp_loadaes.result;
 	return count;
 }
 
 static ssize_t show_hdcploadaes(struct device *dev,
 	struct device_attribute *attr, char *buf)
 {
-	struct hdmi_driver_data *hdmi_driver_data;
+	struct hdmi_device *hdev = dev_to_hdev(dev);
 	int index = 0;
 
-	dev_dbg(hdmidev, "%s\n", __func__);
+	if (!hdev)
+		return -EFAULT;
 
-	hdmi_driver_data = dev_get_drvdata(dev);
+	dev_dbg(hdev->dev, "%s\n", __func__);
 
-	if (hdmi_driver_data->store_as_hextext) {
+	if (hdev->sysfs_data.store_as_hextext) {
 		snprintf(buf + index, 3, "%02x",
-			hdmi_driver_data->loadaes_result);
+			hdev->sysfs_data.loadaes_result);
 		index += 2;
 	} else
-		*(buf + index++) = hdmi_driver_data->loadaes_result;
+		*(buf + index++) = hdev->sysfs_data.loadaes_result;
 
-	dev_dbg(hdmidev, "result:%02x\n", hdmi_driver_data->loadaes_result);
+	dev_dbg(hdev->dev, "result:%02x\n", hdev->sysfs_data.loadaes_result);
 
-	if (hdmi_driver_data->store_as_hextext)
+	if (hdev->sysfs_data.store_as_hextext)
 		index++;
 
 	return index;
@@ -1386,21 +1457,22 @@ static ssize_t show_hdcploadaes(struct device *dev,
 static ssize_t store_hdcpauthencr(struct device *dev,
 		struct device_attribute *attr, const char *buf, size_t count)
 {
-	struct hdmi_driver_data *hdmi_driver_data;
+	struct hdmi_device *hdev = dev_to_hdev(dev);
 	struct hdcp_authencr hdcp_authencr;
 	int index = 0;
 	u8 crc;
 	u8 progged;
 	int result = HDMI_RESULT_NOT_OK;
 
-	dev_dbg(hdmidev, "%s\n", __func__);
+	if (!hdev)
+		return -EFAULT;
 
-	hdmi_driver_data = dev_get_drvdata(dev);
+	dev_dbg(hdev->dev, "%s\n", __func__);
 
-	/* Default not OK */
-	hdmi_driver_data->authencr.buf_len = 0;
+	/* Default */
+	hdev->sysfs_data.authencr.buf_len = 0;
 
-	if (hdcpchkaesotp(&crc, &progged)) {
+	if (hdcpchkaesotp(hdev, &crc, &progged)) {
 		result = HDMI_AES_NOT_FUSED;
 		goto store_hdcpauthencr_end;
 	}
@@ -1411,7 +1483,7 @@ static ssize_t store_hdcpauthencr(struct device *dev,
 		goto store_hdcpauthencr_end;
 	}
 
-	if (hdmi_driver_data->store_as_hextext) {
+	if (hdev->sysfs_data.store_as_hextext) {
 		if ((count != HDMI_HDCPAUTHENCR_TEXT_SIZE) &&
 			(count != HDMI_HDCPAUTHENCR_TEXT_SIZE + 1))
 			goto store_hdcpauthencr_end;
@@ -1428,64 +1500,65 @@ static ssize_t store_hdcpauthencr(struct device *dev,
 		hdcp_authencr.encr_type = *(buf + index++);
 	}
 
-	if (hdcpauthencr(hdcp_authencr.auth_type, hdcp_authencr.encr_type,
-		 &hdmi_driver_data->authencr.buf_len,
-		 hdmi_driver_data->authencr.buf))
+	if (hdcpauthencr(hdev, hdcp_authencr.auth_type, hdcp_authencr.encr_type,
+		 &hdev->sysfs_data.authencr.buf_len,
+		 hdev->sysfs_data.authencr.buf))
 		goto store_hdcpauthencr_end;
 
 	result = HDMI_RESULT_OK;
 
 store_hdcpauthencr_end:
-	hdmi_driver_data->authencr.result = result;
+	hdev->sysfs_data.authencr.result = result;
 	return count;
 }
 
 static ssize_t show_hdcpauthencr(struct device *dev,
 	struct device_attribute *attr, char *buf)
 {
-	struct hdmi_driver_data *hdmi_driver_data;
+	struct hdmi_device *hdev = dev_to_hdev(dev);
 	int len;
 	int index = 0;
 	int cnt;
 
-	dev_dbg(hdmidev, "%s\n", __func__);
-
-	hdmi_driver_data = dev_get_drvdata(dev);
+	if (!hdev)
+		return -EFAULT;
 
+	dev_dbg(hdev->dev, "%s\n", __func__);
 
-	if (hdmi_driver_data->store_as_hextext) {
+	/* result */
+	if (hdev->sysfs_data.store_as_hextext) {
 		snprintf(buf + index, 3, "%02x",
-			hdmi_driver_data->authencr.result);
+			hdev->sysfs_data.authencr.result);
 		index += 2;
 	} else
-		*(buf + index++) = hdmi_driver_data->authencr.result;
+		*(buf + index++) = hdev->sysfs_data.authencr.result;
 
-	dev_dbg(hdmidev, "result:%02x\n", hdmi_driver_data->authencr.result);
+	dev_dbg(hdev->dev, "result:%02x\n", hdev->sysfs_data.authencr.result);
 
 	/* resp_size */
-	len = hdmi_driver_data->authencr.buf_len;
+	len = hdev->sysfs_data.authencr.buf_len;
 	if (len > AUTH_BUF_LEN)
 		len = AUTH_BUF_LEN;
-	dev_dbg(hdmidev, "resp_size:%d\n", len);
+	dev_dbg(hdev->dev, "resp_size:%d\n", len);
 
 	/* resp */
 	cnt = 0;
 	while (cnt < len) {
-		if (hdmi_driver_data->store_as_hextext) {
+		if (hdev->sysfs_data.store_as_hextext) {
 			snprintf(buf + index, 3, "%02x",
-				hdmi_driver_data->authencr.buf[cnt]);
+				hdev->sysfs_data.authencr.buf[cnt]);
 			index += 2;
 
-			dev_dbg(hdmidev, "%02x ",
-				hdmi_driver_data->authencr.buf[cnt]);
+			dev_dbg(hdev->dev, "%02x ",
+				hdev->sysfs_data.authencr.buf[cnt]);
 
 		} else
-			*(buf + index++) = hdmi_driver_data->authencr.buf[cnt];
+			*(buf + index++) = hdev->sysfs_data.authencr.buf[cnt];
 
 		cnt++;
 	}
 
-	if (hdmi_driver_data->store_as_hextext)
+	if (hdev->sysfs_data.store_as_hextext)
 		index++;
 
 	return index;
@@ -1494,26 +1567,27 @@ static ssize_t show_hdcpauthencr(struct device *dev,
 static ssize_t show_hdcpstateget(struct device *dev,
 	struct device_attribute *attr, char *buf)
 {
-	struct hdmi_driver_data *hdmi_driver_data;
+	struct hdmi_device *hdev = dev_to_hdev(dev);
 	u8 hdcp_state;
 	int index = 0;
 
-	dev_dbg(hdmidev, "%s\n", __func__);
+	if (!hdev)
+		return -EFAULT;
 
-	hdmi_driver_data = dev_get_drvdata(dev);
+	dev_dbg(hdev->dev, "%s\n", __func__);
 
 	if (av8100_reg_gen_status_r(NULL, NULL, NULL, NULL, NULL, &hdcp_state))
 			return -EINVAL;
 
-	if (hdmi_driver_data->store_as_hextext) {
+	if (hdev->sysfs_data.store_as_hextext) {
 		snprintf(buf + index, 3, "%02x", hdcp_state);
 		index += 2;
 	} else
 		*(buf + index++) = hdcp_state;
 
-	dev_dbg(hdmidev, "status:%02x\n", hdcp_state);
+	dev_dbg(hdev->dev, "status:%02x\n", hdcp_state);
 
-	if (hdmi_driver_data->store_as_hextext)
+	if (hdev->sysfs_data.store_as_hextext)
 		index++;
 
 	return index;
@@ -1522,27 +1596,28 @@ static ssize_t show_hdcpstateget(struct device *dev,
 static ssize_t show_evread(struct device *dev, struct device_attribute *attr,
 		char *buf)
 {
-	struct hdmi_driver_data *hdmi_driver_data;
+	struct hdmi_device *hdev = dev_to_hdev(dev);
 	int index = 0;
 	u8 ev;
 
-	dev_dbg(hdmidev, "%s\n", __func__);
+	if (!hdev)
+		return -EFAULT;
 
-	hdmi_driver_data = dev_get_drvdata(dev);
+	dev_dbg(hdev->dev, "%s\n", __func__);
 
-	ev = events_read();
+	ev = events_read(hdev);
 
-	if (hdmi_driver_data->store_as_hextext) {
+	if (hdev->sysfs_data.store_as_hextext) {
 		snprintf(buf + index, 3, "%02x", ev);
 		index += 2;
 	} else
 		*(buf + index++) = ev;
 
-	if (hdmi_driver_data->store_as_hextext)
+	if (hdev->sysfs_data.store_as_hextext)
 		index++;
 
 	/* Events are read: clear events */
-	events_clear(EVENTS_MASK);
+	events_clear(hdev, EVENTS_MASK);
 
 	return index;
 }
@@ -1550,15 +1625,16 @@ static ssize_t show_evread(struct device *dev, struct device_attribute *attr,
 static ssize_t store_evclr(struct device *dev,
 		struct device_attribute *attr, const char *buf, size_t count)
 {
-	struct hdmi_driver_data *hdmi_driver_data;
+	struct hdmi_device *hdev = dev_to_hdev(dev);
 	u8 ev;
 	int index = 0;
 
-	dev_dbg(hdmidev, "%s\n", __func__);
+	if (!hdev)
+		return -EFAULT;
 
-	hdmi_driver_data = dev_get_drvdata(dev);
+	dev_dbg(hdev->dev, "%s\n", __func__);
 
-	if (hdmi_driver_data->store_as_hextext) {
+	if (hdev->sysfs_data.store_as_hextext) {
 		if ((count != HDMI_EVCLR_TEXT_SIZE) &&
 			(count != HDMI_EVCLR_TEXT_SIZE + 1))
 			return -EINVAL;
@@ -1572,7 +1648,7 @@ static ssize_t store_evclr(struct device *dev,
 		ev = *(buf + index++);
 	}
 
-	events_clear(ev);
+	events_clear(hdev, ev);
 
 	return count;
 }
@@ -1580,15 +1656,16 @@ static ssize_t store_evclr(struct device *dev,
 static ssize_t store_audiocfg(struct device *dev,
 		struct device_attribute *attr, const char *buf, size_t count)
 {
-	struct hdmi_driver_data *hdmi_driver_data;
+	struct hdmi_device *hdev = dev_to_hdev(dev);
 	struct audio_cfg audio_cfg;
 	int index = 0;
 
-	dev_dbg(hdmidev, "%s\n", __func__);
+	if (!hdev)
+		return -EFAULT;
 
-	hdmi_driver_data = dev_get_drvdata(dev);
+	dev_dbg(hdev->dev, "%s\n", __func__);
 
-	if (hdmi_driver_data->store_as_hextext) {
+	if (hdev->sysfs_data.store_as_hextext) {
 		if ((count != HDMI_AUDIOCFG_TEXT_SIZE) &&
 			(count != HDMI_AUDIOCFG_TEXT_SIZE + 1))
 			return -EINVAL;
@@ -1620,7 +1697,7 @@ static ssize_t store_audiocfg(struct device *dev,
 		audio_cfg.mute = *(buf + index++);
 	}
 
-	audiocfg(&audio_cfg);
+	audiocfg(hdev, &audio_cfg);
 
 	return count;
 }
@@ -1628,25 +1705,26 @@ static ssize_t store_audiocfg(struct device *dev,
 static ssize_t show_plugstatus(struct device *dev,
 		struct device_attribute *attr, char *buf)
 {
-	struct hdmi_driver_data *hdmi_driver_data;
+	struct hdmi_device *hdev = dev_to_hdev(dev);
 	int index = 0;
 	struct av8100_status av8100_status;
 	u8 plstat;
 
-	dev_dbg(hdmidev, "%s\n", __func__);
+	if (!hdev)
+		return -EFAULT;
 
-	hdmi_driver_data = dev_get_drvdata(dev);
+	dev_dbg(hdev->dev, "%s\n", __func__);
 
 	av8100_status = av8100_status_get();
 	plstat = av8100_status.av8100_plugin_status == AV8100_HDMI_PLUGIN;
 
-	if (hdmi_driver_data->store_as_hextext) {
+	if (hdev->sysfs_data.store_as_hextext) {
 		snprintf(buf + index, 3, "%02x", plstat);
 		index += 2;
 	} else
 		*(buf + index++) = plstat;
 
-	if (hdmi_driver_data->store_as_hextext)
+	if (hdev->sysfs_data.store_as_hextext)
 		index++;
 
 	return index;
@@ -1655,14 +1733,15 @@ static ssize_t show_plugstatus(struct device *dev,
 static ssize_t store_poweronoff(struct device *dev,
 		struct device_attribute *attr, const char *buf, size_t count)
 {
-	struct hdmi_driver_data *hdmi_driver_data;
+	struct hdmi_device *hdev = dev_to_hdev(dev);
 	bool enable = false;
 
-	dev_dbg(hdmidev, "%s\n", __func__);
+	if (!hdev)
+		return -EFAULT;
 
-	hdmi_driver_data = dev_get_drvdata(dev);
+	dev_dbg(hdev->dev, "%s\n", __func__);
 
-	if (hdmi_driver_data->store_as_hextext) {
+	if (hdev->sysfs_data.store_as_hextext) {
 		if ((count != HDMI_POWERONOFF_TEXT_SIZE) &&
 			(count != HDMI_POWERONOFF_TEXT_SIZE + 1))
 			return -EINVAL;
@@ -1677,12 +1756,12 @@ static ssize_t store_poweronoff(struct device *dev,
 
 	if (enable == 0) {
 		if (av8100_powerdown() != 0) {
-			dev_err(hdmidev, "av8100_powerdown FAIL\n");
+			dev_err(hdev->dev, "av8100_powerdown FAIL\n");
 			return -EINVAL;
 		}
 	} else {
 		if (av8100_powerup() != 0) {
-			dev_err(hdmidev, "av8100_powerup FAIL\n");
+			dev_err(hdev->dev, "av8100_powerup FAIL\n");
 			return -EINVAL;
 		}
 	}
@@ -1693,14 +1772,15 @@ static ssize_t store_poweronoff(struct device *dev,
 static ssize_t show_poweronoff(struct device *dev,
 		struct device_attribute *attr, char *buf)
 {
-	struct hdmi_driver_data *hdmi_driver_data;
+	struct hdmi_device *hdev = dev_to_hdev(dev);
 	int index = 0;
 	struct av8100_status status;
 	u8 power_state;
 
-	dev_dbg(hdmidev, "%s\n", __func__);
+	if (!hdev)
+		return -EFAULT;
 
-	hdmi_driver_data = dev_get_drvdata(dev);
+	dev_dbg(hdev->dev, "%s\n", __func__);
 
 	status = av8100_status_get();
 	if (status.av8100_state < AV8100_OPMODE_SCAN)
@@ -1708,7 +1788,7 @@ static ssize_t show_poweronoff(struct device *dev,
 	else
 		power_state = 1;
 
-	if (hdmi_driver_data->store_as_hextext) {
+	if (hdev->sysfs_data.store_as_hextext) {
 		snprintf(buf + index, 3, "%02x", power_state);
 		index += 3;
 	} else {
@@ -1721,28 +1801,25 @@ static ssize_t show_poweronoff(struct device *dev,
 static ssize_t store_evwakeup(struct device *dev,
 		struct device_attribute *attr, const char *buf, size_t count)
 {
-	dev_dbg(hdmidev, "%s\n", __func__);
+	struct hdmi_device *hdev = dev_to_hdev(dev);
+
+	if (!hdev)
+		return -EFAULT;
+
+	dev_dbg(hdev->dev, "%s\n", __func__);
 
-	event_wakeup();
+	event_wakeup(hdev);
 
 	return count;
 }
 
 static int hdmi_open(struct inode *inode, struct file *filp)
 {
-	if (device_open)
-		return -EBUSY;
-
-	device_open++;
-
 	return 0;
 }
 
 static int hdmi_release(struct inode *inode, struct file *filp)
 {
-	if (device_open)
-		device_open--;
-
 	return 0;
 }
 
@@ -1754,6 +1831,7 @@ static long hdmi_ioctl(struct file *file,
 	struct hdmi_register reg;
 	struct av8100_status status;
 	u8 aes_status;
+	struct hdmi_device *hdev = devnr_to_hdev(HDMI_DEVNR_DEFAULT);
 
 	switch (cmd) {
 	case IOC_PLUG_DETECT_ENABLE:
@@ -1764,7 +1842,7 @@ static long hdmi_ioctl(struct file *file,
 			sizeof(struct plug_detect)))
 			return -EINVAL;
 
-		if (plugdeten(&plug_detect))
+		if (plugdeten(hdev, &plug_detect))
 			return -EINVAL;
 		}
 		break;
@@ -1777,7 +1855,7 @@ static long hdmi_ioctl(struct file *file,
 				sizeof(struct edid_read)))
 			return -EINVAL;
 
-		if (edidread(&edid_read, &edid_read.data_length,
+		if (edidread(hdev, &edid_read, &edid_read.data_length,
 				edid_read.data))
 			return -EINVAL;
 
@@ -1792,7 +1870,8 @@ static long hdmi_ioctl(struct file *file,
 		if (copy_from_user(&value, (void *)arg, sizeof(u8)))
 			return -EINVAL;
 
-		event_enable(value != 0, HDMI_EVENT_CEC | HDMI_EVENT_CECTXERR |
+		event_enable(hdev, value != 0,
+					HDMI_EVENT_CEC | HDMI_EVENT_CECTXERR |
 							HDMI_EVENT_CECTX);
 		break;
 
@@ -1800,8 +1879,8 @@ static long hdmi_ioctl(struct file *file,
 		{
 		struct cec_rw cec_read;
 
-		if (cecread(&cec_read.src, &cec_read.dest, &cec_read.length,
-			cec_read.data))
+		if (cecread(hdev, &cec_read.src, &cec_read.dest,
+				&cec_read.length, cec_read.data))
 			return -EINVAL;
 
 		if (copy_to_user((void *)arg, (void *)&cec_read,
@@ -1819,9 +1898,7 @@ static long hdmi_ioctl(struct file *file,
 				sizeof(struct cec_rw)))
 			return -EINVAL;
 
-		if (cecsend(cec_send.src,
-				cec_send.dest,
-				cec_send.length,
+		if (cecsend(hdev, cec_send.src, cec_send.dest, cec_send.length,
 				cec_send.data))
 			return -EINVAL;
 		}
@@ -1835,7 +1912,7 @@ static long hdmi_ioctl(struct file *file,
 				sizeof(struct info_fr)))
 			return -EINVAL;
 
-		if (infofrsend(info_fr.type, info_fr.ver, info_fr.crc,
+		if (infofrsend(hdev, info_fr.type, info_fr.ver, info_fr.crc,
 			info_fr.length, info_fr.data))
 			return -EINVAL;
 		}
@@ -1845,11 +1922,11 @@ static long hdmi_ioctl(struct file *file,
 		if (copy_from_user(&value, (void *)arg, sizeof(u8)))
 			return -EINVAL;
 
-		event_enable(value != 0, HDMI_EVENT_HDCP);
+		event_enable(hdev, value != 0, HDMI_EVENT_HDCP);
 		break;
 
 	case IOC_HDCP_CHKAESOTP:
-		if (hdcpchkaesotp(&value, &aes_status))
+		if (hdcpchkaesotp(hdev, &value, &aes_status))
 			return -EINVAL;
 
 		if (copy_to_user((void *)arg, (void *)&aes_status,
@@ -1866,7 +1943,7 @@ static long hdmi_ioctl(struct file *file,
 				sizeof(struct hdcp_fuseaes)))
 			return -EINVAL;
 
-		if (hdcpfuseaes(hdcp_fuseaes.key, hdcp_fuseaes.crc,
+		if (hdcpfuseaes(hdev, hdcp_fuseaes.key, hdcp_fuseaes.crc,
 				&hdcp_fuseaes.result))
 				return -EINVAL;
 
@@ -1887,7 +1964,7 @@ static long hdmi_ioctl(struct file *file,
 				sizeof(struct hdcp_loadaesall)))
 			return -EINVAL;
 
-		if (hdcpchkaesotp(&value, &aes_status))
+		if (hdcpchkaesotp(hdev, &value, &aes_status))
 			return -EINVAL;
 
 		if (!aes_status) {
@@ -1903,7 +1980,8 @@ static long hdmi_ioctl(struct file *file,
 					block_cnt * HDMI_HDCP_AES_KEYSIZE,
 					HDMI_HDCP_AES_KEYSIZE);
 
-			if (hdcploadaes(block_cnt + HDMI_HDCP_AES_BLOCK_START,
+			if (hdcploadaes(hdev,
+					block_cnt + HDMI_HDCP_AES_BLOCK_START,
 					HDMI_HDCP_AES_KEYSIZE,
 					hdcp_loadaesone.key,
 					&hdcp_loadaesone.result,
@@ -1921,7 +1999,7 @@ static long hdmi_ioctl(struct file *file,
 		memcpy(hdcp_loadaesone.key + HDMI_HDCP_AES_KSVZEROESSIZE,
 				hdcp_loadaesall.ksv, HDMI_HDCP_AES_KSVSIZE);
 
-		if (hdcploadaes(HDMI_HDCP_KSV_BLOCK,
+		if (hdcploadaes(hdev, HDMI_HDCP_KSV_BLOCK,
 				HDMI_HDCP_AES_KSVSIZE +
 				HDMI_HDCP_AES_KSVZEROESSIZE,
 				hdcp_loadaesone.key,
@@ -1935,7 +2013,7 @@ static long hdmi_ioctl(struct file *file,
 		/* CRC32 */
 		if (memcmp(hdcp_loadaesall.crc32, hdcp_loadaesone.crc32,
 				CRC32_SIZE)) {
-			dev_dbg(hdmidev, "crc32exp:%02x%02x%02x%02x\n",
+			dev_dbg(hdev->dev, "crc32exp:%02x%02x%02x%02x\n",
 				hdcp_loadaesall.crc32[0],
 				hdcp_loadaesall.crc32[1],
 				hdcp_loadaesall.crc32[2],
@@ -1968,7 +2046,7 @@ ioc_hdcploadaes_err:
 		/* Default not OK */
 		hdcp_authencr.resp_size = 0;
 
-		if (hdcpchkaesotp(&value, &aes_status)) {
+		if (hdcpchkaesotp(hdev, &value, &aes_status)) {
 			result = HDMI_AES_NOT_FUSED;
 			goto hdcp_authencr_end;
 		}
@@ -1979,7 +2057,7 @@ ioc_hdcploadaes_err:
 			goto hdcp_authencr_end;
 		}
 
-		if (hdcpauthencr(hdcp_authencr.auth_type,
+		if (hdcpauthencr(hdev, hdcp_authencr.auth_type,
 				hdcp_authencr.encr_type,
 				&value,
 				buf)) {
@@ -2014,7 +2092,7 @@ hdcp_authencr_end:
 		break;
 
 	case IOC_EVENTS_READ:
-		value = events_read();
+		value = events_read(hdev);
 
 		if (copy_to_user((void *)arg, (void *)&value,
 			sizeof(u8))) {
@@ -2022,14 +2100,14 @@ hdcp_authencr_end:
 		}
 
 		/* Events are read: clear events */
-		events_clear(EVENTS_MASK);
+		events_clear(hdev, EVENTS_MASK);
 		break;
 
 	case IOC_EVENTS_CLEAR:
 		if (copy_from_user(&value, (void *)arg, sizeof(u8)))
 			return -EINVAL;
 
-		events_clear(value);
+		events_clear(hdev, value);
 		break;
 
 	case IOC_AUDIO_CFG:
@@ -2040,7 +2118,7 @@ hdcp_authencr_end:
 				sizeof(struct audio_cfg)))
 			return -EINVAL;
 
-		audiocfg(&audio_cfg);
+		audiocfg(hdev, &audio_cfg);
 		}
 		break;
 
@@ -2061,12 +2139,12 @@ hdcp_authencr_end:
 
 		if (value == 0) {
 			if (av8100_powerdown() != 0) {
-				dev_err(hdmidev, "av8100_powerdown FAIL\n");
+				dev_err(hdev->dev, "av8100_powerdown FAIL\n");
 				return -EINVAL;
 			}
 		} else {
 			if (av8100_powerup() != 0) {
-				dev_err(hdmidev, "av8100_powerup FAIL\n");
+				dev_err(hdev->dev, "av8100_powerup FAIL\n");
 				return -EINVAL;
 			}
 		}
@@ -2074,7 +2152,7 @@ hdcp_authencr_end:
 
 	case IOC_EVENT_WAKEUP:
 		/* Trigger event */
-		event_wakeup();
+		event_wakeup(hdev);
 		break;
 
 	case IOC_POWERSTATE:
@@ -2091,14 +2169,14 @@ hdcp_authencr_end:
 	case IOC_HDMI_ENABLE_INTERRUPTS:
 		av8100_disable_interrupt();
 		if (av8100_enable_interrupt() != 0) {
-			dev_err(hdmidev, "av8100_conf_get FAIL\n");
+			dev_err(hdev->dev, "av8100_ei FAIL\n");
 			return -EINVAL;
 		}
 		break;
 
 	case IOC_HDMI_DOWNLOAD_FW:
 		if (av8100_download_firmware(NULL, 0, I2C_INTERFACE) != 0) {
-			dev_err(hdmidev, "av8100 dl fw FAIL\n");
+			dev_err(hdev->dev, "av8100 dl fw FAIL\n");
 			return -EINVAL;
 		}
 		break;
@@ -2112,7 +2190,7 @@ hdcp_authencr_end:
 			return -EFAULT;
 
 		if (av8100_conf_get(AV8100_COMMAND_HDMI, &config) != 0) {
-			dev_err(hdmidev, "av8100_conf_get FAIL\n");
+			dev_err(hdev->dev, "av8100_conf_get FAIL\n");
 			return -EINVAL;
 		}
 		if (value == 0)
@@ -2121,12 +2199,12 @@ hdcp_authencr_end:
 			config.hdmi_format.hdmi_mode = AV8100_HDMI_ON;
 
 		if (av8100_conf_prep(AV8100_COMMAND_HDMI, &config) != 0) {
-			dev_err(hdmidev, "av8100_conf_prep FAIL\n");
+			dev_err(hdev->dev, "av8100_conf_prep FAIL\n");
 			return -EINVAL;
 		}
 		if (av8100_conf_w(AV8100_COMMAND_HDMI, NULL, NULL,
 			I2C_INTERFACE) != 0) {
-			dev_err(hdmidev, "av8100_conf_w FAIL\n");
+			dev_err(hdev->dev, "av8100_conf_w FAIL\n");
 			return -EINVAL;
 		}
 		}
@@ -2139,7 +2217,7 @@ hdcp_authencr_end:
 		}
 
 		if (av8100_reg_w(reg.offset, reg.value) != 0) {
-			dev_err(hdmidev, "hdmi_register_write FAIL\n");
+			dev_err(hdev->dev, "hdmi_register_write FAIL\n");
 			return -EINVAL;
 		}
 		break;
@@ -2151,7 +2229,7 @@ hdcp_authencr_end:
 		}
 
 		if (av8100_reg_r(reg.offset, &reg.value) != 0) {
-			dev_err(hdmidev, "hdmi_register_write FAIL\n");
+			dev_err(hdev->dev, "hdmi_register_write FAIL\n");
 			return -EINVAL;
 		}
 
@@ -2173,9 +2251,10 @@ hdcp_authencr_end:
 	case IOC_HDMI_CONFIGURATION_WRITE:
 		{
 		struct hdmi_command_register command_reg;
+
 		if (copy_from_user(&command_reg, (void *)arg,
 				sizeof(struct hdmi_command_register)) != 0) {
-			dev_err(hdmidev, "IOC_HDMI_CONFIGURATION_WRITE "
+			dev_err(hdev->dev, "IOC_HDMI_CONFIGURATION_WRITE "
 				"fail 1\n");
 			command_reg.return_status = EINVAL;
 		} else {
@@ -2185,7 +2264,8 @@ hdcp_authencr_end:
 					command_reg.buf,
 					&(command_reg.buf_len),
 					command_reg.buf) != 0) {
-				dev_err(hdmidev, "IOC_HDMI_CONFIGURATION_WRITE "
+				dev_err(hdev->dev,
+					"IOC_HDMI_CONFIGURATION_WRITE "
 					"fail 2\n");
 				command_reg.return_status = EINVAL;
 			}
@@ -2209,14 +2289,19 @@ static unsigned int
 hdmi_poll(struct file *filp, poll_table *wait)
 {
 	unsigned int mask = 0;
+	struct hdmi_device *hdev;
+
+	hdev = devnr_to_hdev(HDMI_DEVNR_DEFAULT);
+	if (!hdev)
+		return 0;
 
-	dev_dbg(hdmidev, "%s\n", __func__);
+	dev_dbg(hdev->dev, "%s\n", __func__);
 
-	poll_wait(filp, &hdmi_event_wq , wait);
+	poll_wait(filp, &hdev->event_wq , wait);
 
 	LOCK_HDMI_EVENTS;
-	if (events_received == true) {
-		events_received = false;
+	if (hdev->events_received == true) {
+		hdev->events_received = false;
 		mask = POLLIN | POLLRDNORM;
 	}
 	UNLOCK_HDMI_EVENTS;
@@ -2232,180 +2317,164 @@ static const struct file_operations hdmi_fops = {
 	.poll = hdmi_poll
 };
 
-static struct miscdevice hdmi_miscdev = {
-	MISC_DYNAMIC_MINOR,
-	"hdmi",
-	&hdmi_fops
-};
-
 /* Event callback function called by hw driver */
 void hdmi_event(enum av8100_hdmi_event ev)
 {
 	int events_old;
 	int events_new;
-	struct kobject *kobj = &hdmidev->kobj;
+	struct hdmi_device *hdev;
+	struct kobject *kobj;
+
+	hdev = devnr_to_hdev(HDMI_DEVNR_DEFAULT);
+	if (!hdev)
+		return;
+
+	dev_dbg(hdev->dev, "hdmi_event %02x\n", ev);
 
-	dev_dbg(hdmidev, "hdmi_event %02x\n", ev);
+	kobj = &(hdev->dev->kobj);
 
 	LOCK_HDMI_EVENTS;
 
-	events_old = events;
+	events_old = hdev->events;
 
 	/* Set event */
 	switch (ev) {
 	case AV8100_HDMI_EVENT_HDMI_PLUGIN:
-		events &= ~HDMI_EVENT_HDMI_PLUGOUT;
-		events |= HDMI_EVENT_HDMI_PLUGIN;
+		hdev->events &= ~HDMI_EVENT_HDMI_PLUGOUT;
+		hdev->events |= HDMI_EVENT_HDMI_PLUGIN;
 		break;
 
 	case AV8100_HDMI_EVENT_HDMI_PLUGOUT:
-		events &= ~HDMI_EVENT_HDMI_PLUGIN;
-		events |= HDMI_EVENT_HDMI_PLUGOUT;
-		cec_tx_status(CEC_TX_SET_FREE);
+		hdev->events &= ~HDMI_EVENT_HDMI_PLUGIN;
+		hdev->events |= HDMI_EVENT_HDMI_PLUGOUT;
+		cec_tx_status(hdev, CEC_TX_SET_FREE);
 		break;
 
 	case AV8100_HDMI_EVENT_CEC:
-		events |= HDMI_EVENT_CEC;
+		hdev->events |= HDMI_EVENT_CEC;
 		break;
 
 	case AV8100_HDMI_EVENT_HDCP:
-		events |= HDMI_EVENT_HDCP;
+		hdev->events |= HDMI_EVENT_HDCP;
 		break;
 
 	case AV8100_HDMI_EVENT_CECTXERR:
-		events |= HDMI_EVENT_CECTXERR;
-		cec_tx_status(CEC_TX_SET_FREE);
+		hdev->events |= HDMI_EVENT_CECTXERR;
+		cec_tx_status(hdev, CEC_TX_SET_FREE);
 		break;
 
 	case AV8100_HDMI_EVENT_CECTX:
-		events |= HDMI_EVENT_CECTX;
-		cec_tx_status(CEC_TX_SET_FREE);
+		hdev->events |= HDMI_EVENT_CECTX;
+		cec_tx_status(hdev, CEC_TX_SET_FREE);
 		break;
 
 	default:
 		break;
 	}
 
-	events_new = events_mask & events;
+	events_new = hdev->events_mask & hdev->events;
 
 	UNLOCK_HDMI_EVENTS;
 
-	dev_dbg(hdmidev, "hdmi events:%02x, events_old:%02x mask:%02x\n",
-			events_new, events_old, events_mask);
+	dev_dbg(hdev->dev, "hdmi events:%02x, events_old:%02x mask:%02x\n",
+			events_new, events_old, hdev->events_mask);
 
 	if (events_new != events_old) {
 		/* Wake up application waiting for event via call to poll() */
 		sysfs_notify(kobj, NULL, SYSFS_EVENT_FILENAME);
 
 		LOCK_HDMI_EVENTS;
-		events_received = true;
+		hdev->events_received = true;
 		UNLOCK_HDMI_EVENTS;
 
-		wake_up_interruptible(&hdmi_event_wq);
+		wake_up_interruptible(&hdev->event_wq);
 	}
 }
 EXPORT_SYMBOL(hdmi_event);
 
-int __init hdmi_init(void)
+int hdmi_device_register(struct hdmi_device *hdev)
 {
-	int ret;
-	struct hdmi_driver_data *hdmi_driver_data;
+	hdev->miscdev.minor = MISC_DYNAMIC_MINOR;
+	hdev->miscdev.name = "hdmi";
+	hdev->miscdev.fops = &hdmi_fops;
+
+	if (misc_register(&hdev->miscdev)) {
+		pr_err("hdmi misc_register failed\n");
+		return -EFAULT;
+	}
 
-	ret = misc_register(&hdmi_miscdev);
-	if (ret)
-		goto hdmi_init_out;
+	hdev->dev = hdev->miscdev.this_device;
 
-	hdmidev = hdmi_miscdev.this_device;
+	return 0;
+}
 
-	hdmi_driver_data =
-		kzalloc(sizeof(struct hdmi_driver_data), GFP_KERNEL);
+int __init hdmi_init(void)
+{
+	struct hdmi_device *hdev;
+	int i;
+	int ret;
 
-	if (!hdmi_driver_data)
+	/* Allocate device data */
+	hdev = kzalloc(sizeof(struct hdmi_device), GFP_KERNEL);
+	if (!hdev) {
+		pr_err("%s: Alloc failure\n", __func__);
 		return -ENOMEM;
+	}
+
+	/* Add to list */
+	list_add_tail(&hdev->list, &hdmi_device_list);
+
+	if (hdmi_device_register(hdev)) {
+		pr_err("%s: Alloc failure\n", __func__);
+		return -EFAULT;
+	}
 
-	dev_set_drvdata(hdmidev, hdmi_driver_data);
+	hdev->devnr = HDMI_DEVNR_DEFAULT;
 
 	/* Default sysfs file format is hextext */
-	hdmi_driver_data->store_as_hextext = true;
-
-	init_waitqueue_head(&hdmi_event_wq);
-
-	if (device_create_file(hdmidev, &dev_attr_storeastext))
-		dev_info(hdmidev, "Unable to create storeastext attribute\n");
-	if (device_create_file(hdmidev, &dev_attr_plugdeten))
-		dev_info(hdmidev, "Unable to create plugdeten attribute\n");
-	if (device_create_file(hdmidev, &dev_attr_edidread))
-		dev_info(hdmidev, "Unable to create edidread attribute\n");
-	if (device_create_file(hdmidev, &dev_attr_ceceven))
-		dev_info(hdmidev, "Unable to create ceceven attribute\n");
-	if (device_create_file(hdmidev, &dev_attr_cecread))
-		dev_info(hdmidev, "Unable to create cecread attribute\n");
-	if (device_create_file(hdmidev, &dev_attr_cecsend))
-		dev_info(hdmidev, "Unable to create cecsend attribute\n");
-	if (device_create_file(hdmidev, &dev_attr_infofrsend))
-		dev_info(hdmidev, "Unable to create infofrsend attribute\n");
-	if (device_create_file(hdmidev, &dev_attr_hdcpeven))
-		dev_info(hdmidev, "Unable to create hdcpeven attribute\n");
-	if (device_create_file(hdmidev, &dev_attr_hdcpchkaesotp))
-		dev_info(hdmidev, "Unable to create hdcpchkaesotp attribute\n");
-	if (device_create_file(hdmidev, &dev_attr_hdcpfuseaes))
-		dev_info(hdmidev, "Unable to create hdcpfuseaes attribute\n");
-	if (device_create_file(hdmidev, &dev_attr_hdcploadaes))
-		dev_info(hdmidev, "Unable to create hdcploadaes attribute\n");
-	if (device_create_file(hdmidev, &dev_attr_hdcpauthencr))
-		dev_info(hdmidev, "Unable to create hdcpauthreq attribute\n");
-	if (device_create_file(hdmidev, &dev_attr_hdcpstateget))
-		dev_info(hdmidev, "Unable to create hdcpstateget attribute\n");
-	if (device_create_file(hdmidev, &dev_attr_evread))
-		dev_info(hdmidev, "Unable to create evread attribute\n");
-	if (device_create_file(hdmidev, &dev_attr_evclr))
-		dev_info(hdmidev, "Unable to create evclr attribute\n");
-	if (device_create_file(hdmidev, &dev_attr_audiocfg))
-		dev_info(hdmidev, "Unable to create audiocfg attribute\n");
-	if (device_create_file(hdmidev, &dev_attr_plugstatus))
-		dev_info(hdmidev, "Unable to create plugstatus attribute\n");
-	if (device_create_file(hdmidev, &dev_attr_poweronoff))
-		dev_info(hdmidev, "Unable to create poweronoff attribute\n");
-	if (device_create_file(hdmidev, &dev_attr_evwakeup))
-		dev_info(hdmidev, "Unable to create evwakeup attribute\n");
+	hdev->sysfs_data.store_as_hextext = true;
+
+	init_waitqueue_head(&hdev->event_wq);
+
+	/* Create sysfs attrs */
+	for (i = 0; attr_name(hdmi_sysfs_attrs[i]); i++) {
+		ret = device_create_file(hdev->dev, &hdmi_sysfs_attrs[i]);
+		if (ret)
+			dev_err(hdev->dev,
+				"Unable to create sysfs attr %s (%d)\n",
+				hdmi_sysfs_attrs[i].attr.name, ret);
+	}
 
 	/* Register event callback */
 	av8100_hdmi_event_cb_set(hdmi_event);
 
-hdmi_init_out:
-	return ret;
+	return 0;
 }
 late_initcall(hdmi_init);
 
 void hdmi_exit(void)
 {
-	struct hdmi_driver_data *hdmi_driver_data;
+	struct hdmi_device *hdev = NULL;
+	int i;
+
+	if (list_empty(&hdmi_device_list))
+		return;
+	else
+		hdev = list_entry(hdmi_device_list.next,
+				struct hdmi_device, list);
 
 	/* Deregister event callback */
 	av8100_hdmi_event_cb_set(NULL);
 
-	device_remove_file(hdmidev, &dev_attr_storeastext);
-	device_remove_file(hdmidev, &dev_attr_plugdeten);
-	device_remove_file(hdmidev, &dev_attr_edidread);
-	device_remove_file(hdmidev, &dev_attr_ceceven);
-	device_remove_file(hdmidev, &dev_attr_cecread);
-	device_remove_file(hdmidev, &dev_attr_cecsend);
-	device_remove_file(hdmidev, &dev_attr_infofrsend);
-	device_remove_file(hdmidev, &dev_attr_hdcpeven);
-	device_remove_file(hdmidev, &dev_attr_hdcpchkaesotp);
-	device_remove_file(hdmidev, &dev_attr_hdcpfuseaes);
-	device_remove_file(hdmidev, &dev_attr_hdcploadaes);
-	device_remove_file(hdmidev, &dev_attr_hdcpauthencr);
-	device_remove_file(hdmidev, &dev_attr_hdcpstateget);
-	device_remove_file(hdmidev, &dev_attr_evread);
-	device_remove_file(hdmidev, &dev_attr_evclr);
-	device_remove_file(hdmidev, &dev_attr_audiocfg);
-	device_remove_file(hdmidev, &dev_attr_plugstatus);
-	device_remove_file(hdmidev, &dev_attr_poweronoff);
-	device_remove_file(hdmidev, &dev_attr_evwakeup);
-
-	hdmi_driver_data = dev_get_drvdata(hdmidev);
-	kfree(hdmi_driver_data);
-
-	misc_deregister(&hdmi_miscdev);
+	/* Remove sysfs attrs */
+	for (i = 0; attr_name(hdmi_sysfs_attrs[i]); i++)
+		device_remove_file(hdev->dev, &hdmi_sysfs_attrs[i]);
+
+	misc_deregister(&hdev->miscdev);
+
+	/* Remove from list */
+	list_del(&hdev->list);
+
+	/* Free device data */
+	kfree(hdev);
 }
diff --git a/drivers/video/av8100/hdmi_loc.h b/drivers/video/av8100/hdmi_loc.h
index 063c1066334..20314910db9 100644
--- a/drivers/video/av8100/hdmi_loc.h
+++ b/drivers/video/av8100/hdmi_loc.h
@@ -39,7 +39,7 @@ struct hdcp_loadaesone {
 	u8 crc32[CRC32_SIZE];
 };
 
-struct hdmi_driver_data {
+struct hdmi_sysfs_data {
 	bool			store_as_hextext;
 	struct plug_detect	plug_detect;
 	bool			enable_cec_event;
diff --git a/include/video/av8100.h b/include/video/av8100.h
index dcc9d51992f..b5922c8b2e5 100644
--- a/include/video/av8100.h
+++ b/include/video/av8100.h
@@ -28,16 +28,6 @@ struct av8100_platform_data {
 	unsigned char	mclk_freq;
 };
 
-enum av8100_error {
-	AV8100_OK = 0x0,
-	AV8100_INVALID_COMMAND = 0x1,
-	AV8100_INVALID_INTERFACE = 0x2,
-	AV8100_INVALID_IOCTL = 0x3,
-	AV8100_COMMAND_FAIL = 0x4,
-	AV8100_FWDOWNLOAD_FAIL = 0x5,
-	AV8100_FAIL = 0xFF,
-};
-
 enum av8100_command_type {
 	AV8100_COMMAND_VIDEO_INPUT_FORMAT  = 0x1,
 	AV8100_COMMAND_AUDIO_INPUT_FORMAT,
-- 
cgit v1.2.3


From fdc9cf12cffb8a3107a2924fa5ad31f37eb56e29 Mon Sep 17 00:00:00 2001
From: Naveen Kumar Gaddipati <naveen.gaddipati@stericsson.com>
Date: Fri, 2 Sep 2011 14:47:22 +0530
Subject: b2r2: Kernel 3.0 migration changes

Migrate the b2r2 folllowing  driver patches to kernel 3.0
707a836 b2r2: Prevent access to freed memory

ST-Ericsson ID: 352334
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: NA

Signed-off-by: Naveen Kumar Gaddipati <naveen.gaddipati@stericsson.com>
Change-Id: I9d8ff2d03073290ad220b322e36c4d519a5f1398
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/30014
---
 drivers/video/b2r2/b2r2_blt_main.c | 55 +++++++++++++++++++++-----------------
 1 file changed, 30 insertions(+), 25 deletions(-)

diff --git a/drivers/video/b2r2/b2r2_blt_main.c b/drivers/video/b2r2/b2r2_blt_main.c
index 097d2854a83..5d1d58c53cc 100644
--- a/drivers/video/b2r2/b2r2_blt_main.c
+++ b/drivers/video/b2r2/b2r2_blt_main.c
@@ -1374,6 +1374,14 @@ static void job_callback_gen(struct b2r2_core_job *job)
 	/* Local addref / release within this func */
 	b2r2_core_job_addref(job, __func__);
 
+	/* Unresolve the buffers */
+	unresolve_buf(&request->user_req.src_img.buf,
+		&request->src_resolved);
+	unresolve_buf(&request->user_req.src_mask.buf,
+		&request->src_mask_resolved);
+	unresolve_buf(&request->user_req.dst_img.buf,
+		&request->dst_resolved);
+
 	/* Move to report list if the job shall be reported */
 	/* FIXME: Use a smaller struct? */
 	mutex_lock(&request->instance->lock);
@@ -2096,22 +2104,28 @@ static int b2r2_generic_blt(struct b2r2_blt_instance *instance,
 				dst_img_width) {
 			b2r2_core_job_release(tile_job, __func__);
 		} else {
+			/*
+			 * Update profiling information before
+			 * the request is released together with
+			 * its core_job.
+			 */
+			if (request->profile) {
+				request->nsec_active_in_cpu =
+					(s32)((u32)task_sched_runtime(current) -
+					thread_runtime_at_start);
+				request->total_time_nsec =
+					(s32)(b2r2_get_curr_nsec() -
+					request->start_time_nsec);
+				request->job.nsec_active_in_hw =
+					nsec_active_in_b2r2;
+
+				b2r2_call_profiler_blt_done(request);
+			}
+
 			b2r2_core_job_release(&request->job, __func__);
 		}
 	}
 
-
-	ret = 0;
-
-
-	/* Unresolve the buffers */
-	unresolve_buf(&request->user_req.src_img.buf,
-		&request->src_resolved);
-	unresolve_buf(&request->user_req.src_mask.buf,
-		&request->src_mask_resolved);
-	unresolve_buf(&request->user_req.dst_img.buf,
-		&request->dst_resolved);
-
 	dec_stat(&stat_n_in_blt);
 
 	for (i = 0; i < tmp_buf_count; i++) {
@@ -2122,17 +2136,6 @@ static int b2r2_generic_blt(struct b2r2_blt_instance *instance,
 		memset(&(work_bufs[i]), 0, sizeof(work_bufs[i]));
 	}
 
-	if (request->profile) {
-		request->nsec_active_in_cpu =
-			(s32)((u32)task_sched_runtime(current) -
-			thread_runtime_at_start);
-		request->total_time_nsec =
-			(s32)(b2r2_get_curr_nsec() - request->start_time_nsec);
-		request->job.nsec_active_in_hw = nsec_active_in_b2r2;
-
-		b2r2_call_profiler_blt_done(request);
-	}
-
 	return request_id;
 
 job_add_failed:
@@ -2470,7 +2473,8 @@ static int resolve_buf(struct b2r2_blt_img *img,
 
 					if (info && info->dev &&
 							MINOR(info->dev->devt) ==
-							MINOR(file->f_dentry->d_inode->i_rdev)) {
+						MINOR(file->f_dentry->
+							d_inode->i_rdev)) {
 						resolved->file_physical_start =
 							info->fix.smem_start;
 						resolved->file_virtual_start =
@@ -2482,7 +2486,8 @@ static int resolve_buf(struct b2r2_blt_img *img,
 							resolved->file_physical_start +
 							img->buf.offset;
 						resolved->virtual_address =
-							(void *)(resolved->file_virtual_start +
+						(void *) (resolved->
+							file_virtual_start +
 							img->buf.offset);
 
 						ret = 0;
-- 
cgit v1.2.3


From 0bac2cd5539dc566b96851f8dd7de373b16252d6 Mon Sep 17 00:00:00 2001
From: Jimmy Rubin <jimmy.rubin@stericsson.com>
Date: Thu, 1 Sep 2011 12:17:53 +0200
Subject: mach-ux500: mcde: Check cpu instead of machine

Cpu can be used to distinguish between different mcde instead of
machine.

ST-Ericsson ID: -
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I2ebb292fc787548578c34ed9a0110d98a3864034
Signed-off-by: Jimmy Rubin <jimmy.rubin@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/29947
Reviewed-by: Robert FEKETE <robert.fekete@stericsson.com>
Tested-by: Robert FEKETE <robert.fekete@stericsson.com>
Reviewed-by: Ushit KUMAR <ushit.kumar@stericsson.com>
---
 arch/arm/mach-ux500/board-mop500-mcde.c | 2 +-
 arch/arm/mach-ux500/board-u5500-mcde.c  | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-ux500/board-mop500-mcde.c b/arch/arm/mach-ux500/board-mop500-mcde.c
index 9ee3e3c4ff5..b4a6147291f 100644
--- a/arch/arm/mach-ux500/board-mop500-mcde.c
+++ b/arch/arm/mach-ux500/board-mop500-mcde.c
@@ -699,7 +699,7 @@ int __init init_display_devices(void)
 	struct i2c_adapter *i2c0;
 #endif
 
-	if (!(machine_is_u8500() || machine_is_snowball()))
+	if (!cpu_is_u8500())
 		return ret;
 
 	ret = fb_register_client(&framebuffer_nb);
diff --git a/arch/arm/mach-ux500/board-u5500-mcde.c b/arch/arm/mach-ux500/board-u5500-mcde.c
index 9d3f5d82d4d..63580694939 100644
--- a/arch/arm/mach-ux500/board-u5500-mcde.c
+++ b/arch/arm/mach-ux500/board-u5500-mcde.c
@@ -484,7 +484,7 @@ int __init init_display_devices(void)
 {
 	int ret = 0;
 
-	if (!machine_is_u5500())
+	if (!cpu_is_u5500())
 		return ret;
 
 	ret = fb_register_client(&framebuffer_nb);
-- 
cgit v1.2.3


From 552b6555ad24608586a5ab97613d2fb7ad8cda75 Mon Sep 17 00:00:00 2001
From: Jimmy Rubin <jimmy.rubin@stericsson.com>
Date: Thu, 1 Sep 2011 13:04:28 +0200
Subject: video: mcde: lcdtim1 not properly set

The lcdtim1 registers was not properly set affecting the DPI
LCD timing.

ST-Ericsson ID: 355205
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I99f214b53c4bdeefdaee738bbbaf918877b751b4
Signed-off-by: Jimmy Rubin <jimmy.rubin@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/29925
Reviewed-by: Nils CALMSUND <nils.calmsund@stericsson.com>
Reviewed-by: Philippe CORNU <philippe.cornu@stericsson.com>
Reviewed-by: QATOOLS
Reviewed-by: Fabien DESSENNE <fabien.dessenne@stericsson.com>
Reviewed-by: QABUILD
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/30075
Reviewed-by: Naveen Kumar GADDIPATI <naveen.gaddipati@stericsson.com>
Tested-by: Naveen Kumar GADDIPATI <naveen.gaddipati@stericsson.com>
---
 drivers/video/mcde/mcde_hw.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index d2105f0d29d..b6fa06ee89a 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -677,14 +677,14 @@ static void dpi_video_mode_apply(struct mcde_chnl_state *chnl)
 		chnl->tv_regs.fsl1 = 0;
 		chnl->tv_regs.fsl2 = 0;
 		polarity = chnl->port.phy.dpi.polarity;
-		chnl->tv_regs.lcdtim1 |= MCDE_LCDTIM1A_IPC(
-				(polarity & DPI_ACT_ON_FALLING_EDGE) != 0);
 		chnl->tv_regs.lcdtim1 = MCDE_LCDTIM1A_IHS(
 				(polarity & DPI_ACT_LOW_HSYNC) != 0);
 		chnl->tv_regs.lcdtim1 |= MCDE_LCDTIM1A_IVS(
 				(polarity & DPI_ACT_LOW_VSYNC) != 0);
 		chnl->tv_regs.lcdtim1 |= MCDE_LCDTIM1A_IOE(
 				(polarity & DPI_ACT_LOW_DATA_ENABLE) != 0);
+		chnl->tv_regs.lcdtim1 |= MCDE_LCDTIM1A_IPC(
+				(polarity & DPI_ACT_ON_FALLING_EDGE) != 0);
 	}
 }
 
-- 
cgit v1.2.3


From ce91498d9882ed1f47b20f6792282a706663a8d2 Mon Sep 17 00:00:00 2001
From: Jimmy Rubin <jimmy.rubin@stericsson.com>
Date: Tue, 30 Aug 2011 14:57:31 +0200
Subject: misc: dispdev: Fix for display update

If the display update flag is set to false in queue buffer, the
next buffer should be updated.

ST-Ericsson ID: 359396
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: Ibe1a8d3436cef60dde112cda192b26eaffa42368
Signed-off-by: Jimmy Rubin <jimmy.rubin@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/29751
Reviewed-by: Maciej SOCHA <maciej.socha@stericsson.com>
Reviewed-by: QATOOLS
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
Reviewed-by: QABUILD
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/30080
Reviewed-by: Naveen Kumar GADDIPATI <naveen.gaddipati@stericsson.com>
Tested-by: Naveen Kumar GADDIPATI <naveen.gaddipati@stericsson.com>
---
 drivers/misc/dispdev/dispdev.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/misc/dispdev/dispdev.c b/drivers/misc/dispdev/dispdev.c
index a8b612bdd26..76091c03478 100644
--- a/drivers/misc/dispdev/dispdev.c
+++ b/drivers/misc/dispdev/dispdev.c
@@ -388,7 +388,7 @@ static int dispdev_queue_buffer(struct dispdev *dd,
 		info.paddr = mem_chunk.paddr;
 		mcde_dss_apply_overlay(dd->ovly, &info);
 		mcde_dss_update_overlay(dd->ovly, false);
-	} else {
+	} else if (buffer->display_update) {
 		dd->buffers_need_update = true;
 	}
 
-- 
cgit v1.2.3


From 810d537ae918a631d338196c4034841f7f8cff5f Mon Sep 17 00:00:00 2001
From: Naveen Kumar Gaddipati <naveen.gaddipati@stericsson.com>
Date: Mon, 5 Sep 2011 17:14:01 +0530
Subject: video: mcde: remove PDP config

The PDP config and display Sony sy35560
is removed.

ST-Ericsson ID: 341938
ST-Ericsson FOSS-OUT ID: Trivial
ST-Ericsson Linux next: Not tested, ER 282779

Signed-off-by: Anders Bauer <anders.bauer@stericsson.com>
Change-Id: I629336f6b7fe282145bf70dfd9a0cca2f0d3ea02
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/30125
Reviewed-by: Naveen Kumar GADDIPATI <naveen.gaddipati@stericsson.com>
Tested-by: Naveen Kumar GADDIPATI <naveen.gaddipati@stericsson.com>
---
 arch/arm/mach-ux500/Kconfig-arch              |   8 -
 drivers/video/mcde/Kconfig                    |   4 -
 drivers/video/mcde/Makefile                   |   1 -
 drivers/video/mcde/display-sony_sy35560_dsi.c | 239 --------------------------
 include/video/mcde_display-sony_sy35560_dsi.h |  45 -----
 5 files changed, 297 deletions(-)
 delete mode 100644 drivers/video/mcde/display-sony_sy35560_dsi.c
 delete mode 100644 include/video/mcde_display-sony_sy35560_dsi.h

diff --git a/arch/arm/mach-ux500/Kconfig-arch b/arch/arm/mach-ux500/Kconfig-arch
index 55e5d4f6b30..8466a0aeedd 100644
--- a/arch/arm/mach-ux500/Kconfig-arch
+++ b/arch/arm/mach-ux500/Kconfig-arch
@@ -81,14 +81,6 @@ config DISPLAY_GENERIC_DSI_PRIMARY_ROTATION_ANGLE
 	default "180" if DISPLAY_GENERIC_DSI_PRIMARY_ROTATION_180
 	default "270" if DISPLAY_GENERIC_DSI_PRIMARY_ROTATION_270
 
-config DISPLAY_SONY_SY35560_DSI_PRIMARY
-	bool "Sony SY35560 primary display support"
-	depends on MACH_U8500_PDP
-	select MCDE_DISPLAY_SONY_SY35560_DSI
-	default y
-	help
-	  Say yes here if main display exists
-
 config DISPLAY_GENERIC_DSI_PRIMARY_VSYNC
 	bool "Enable v-sync for primary display"
 	depends on DISPLAY_GENERIC_DSI_PRIMARY || DISPLAY_SONY_SY35560_DSI_PRIMARY
diff --git a/drivers/video/mcde/Kconfig b/drivers/video/mcde/Kconfig
index a2bca06b128..868e7aba764 100644
--- a/drivers/video/mcde/Kconfig
+++ b/drivers/video/mcde/Kconfig
@@ -19,10 +19,6 @@ config MCDE_DISPLAY_SONY_ACX424AKP_DSI
 	tristate "Sony acx424akp DSI display driver"
 	depends on FB_MCDE
 
-config MCDE_DISPLAY_SONY_SY35560_DSI
-	tristate "Sony sy35560 display driver"
-	depends on FB_MCDE
-
 config MCDE_DISPLAY_DPI
 	bool "Support for DPI displays within MCDE"
 	depends on FB_MCDE
diff --git a/drivers/video/mcde/Makefile b/drivers/video/mcde/Makefile
index 1c6e5cde42b..63ffeaec154 100644
--- a/drivers/video/mcde/Makefile
+++ b/drivers/video/mcde/Makefile
@@ -4,7 +4,6 @@ obj-$(CONFIG_FB_MCDE)		+= mcde.o
 
 obj-$(CONFIG_MCDE_DISPLAY_GENERIC_DSI)		+= display-generic_dsi.o
 obj-$(CONFIG_MCDE_DISPLAY_SONY_ACX424AKP_DSI)   += display-sony_acx424akp_dsi.o
-obj-$(CONFIG_MCDE_DISPLAY_SONY_SY35560_DSI)	+= display-sony_sy35560_dsi.o
 obj-$(CONFIG_MCDE_DISPLAY_VUIB500_DPI)		+= display-vuib500-dpi.o
 obj-$(CONFIG_MCDE_DISPLAY_AB8500_DENC)		+= display-ab8500.o
 obj-$(CONFIG_MCDE_DISPLAY_AV8100)		+= display-av8100.o
diff --git a/drivers/video/mcde/display-sony_sy35560_dsi.c b/drivers/video/mcde/display-sony_sy35560_dsi.c
deleted file mode 100644
index 28a36b98c77..00000000000
--- a/drivers/video/mcde/display-sony_sy35560_dsi.c
+++ /dev/null
@@ -1,239 +0,0 @@
-/*
- * Copyright (C) ST-Ericsson AB 2010
- *
- * ST-Ericsson MCDE Sony sy35560 DCS display driver
- *
- * Author: Marcus Lorentzon <marcus.xm.lorentzon@stericsson.com>
- * for ST-Ericsson.
- *
- * License terms: GNU General Public License (GPL), version 2.
- */
-
-#include <linux/kernel.h>
-#include <linux/device.h>
-#include <linux/delay.h>
-#include <linux/gpio.h>
-#include <linux/err.h>
-
-#include <video/mcde_dss.h>
-#include <video/mcde_display.h>
-#include <video/mcde_display-sony_sy35560_dsi.h>
-
-static int counter = 1;
-
-/*
- * Work queue function for ESD check
- *
- * read display registers and perform power off/on/init sequence
- * if register value indicate HW failure
- */
-static void sony_sy35560_esd_work_fn(struct work_struct *work)
-{
-	u8  value;
-	struct sony_sy35560_device *dev = container_of(work,
-		struct sony_sy35560_device,
-		esd_work.work);
-
-
-	mcde_dsi_dcs_write(((struct mcde_display_device *)dev)->chnl_state,
-		0x00, &value, 1);
-	pr_info("%s: %d) Read register 0x00, value 0x%.2X\n",
-		__func__, counter, value);
-
-	/* for now there are no registers available for ESD status check
-	 * just perform power off/on/init every 4th work queue task
-	 */
-
-	if (counter % 4 == 0) {
-		bool vsync_enabled;
-
-		pr_info("%s:Resetting display....", __func__);
-
-		/* get current display state */
-		vsync_enabled = ((struct mcde_display_device *)dev)->
-			get_synchronized_update(
-			(struct mcde_display_device *)dev);
-
-		/* wait a while to make sure finish refresh before resetting */
-		mdelay(10);
-
-		((struct mcde_display_device *)dev)->set_power_mode(
-			(struct mcde_display_device *)dev,
-			MCDE_DISPLAY_PM_OFF);
-		((struct mcde_display_device *)dev)->set_power_mode(
-			(struct mcde_display_device *)dev,
-			MCDE_DISPLAY_PM_STANDBY);
-
-		if (vsync_enabled) {
-			u8 m = 0;
-			mcde_dsi_dcs_write(
-				((struct mcde_display_device *)dev)->chnl_state,
-				DCS_CMD_SET_TEAR_ON, &m, 1);
-			mcde_dss_set_synchronized_update(
-				(struct mcde_display_device *)dev, 0);
-
-			/* refresh display */
-			((struct mcde_display_device *)dev)->update(
-				(struct mcde_display_device *)dev);
-
-			mcde_dss_set_synchronized_update(
-				(struct mcde_display_device *)dev, 1);
-		} else {
-			/* need to wait a while before turning on the display */
-			mdelay(5);
-
-			((struct mcde_display_device *)dev)->set_power_mode(
-				(struct mcde_display_device *)dev,
-				MCDE_DISPLAY_PM_ON);
-		}
-	}
-	counter++;
-
-	queue_delayed_work(((struct sony_sy35560_device *)dev)->esd_wq,
-		&(((struct sony_sy35560_device *)dev)->esd_work),
-		SONY_SY35560_ESD_CHECK_PERIOD);
-}
-
-static int __devinit sony_sy35560_probe(struct mcde_display_device *dev)
-{
-	struct mcde_chnl_state *chnl;
-
-	u32 id;
-	u8  id1, id2, id3;
-	int len = 1;
-	int ret = 0;
-	int readret = 0;
-
-	/* create a workqueue for ESD status check */
-	((struct sony_sy35560_device *)dev)->esd_wq =
-		create_singlethread_workqueue("sony_esd");
-	if (((struct sony_sy35560_device *)dev)->esd_wq == NULL) {
-		dev_warn(&dev->dev, "can't create ESD workqueue\n");
-		ret = -ENOMEM;
-		goto out;
-	}
-	INIT_DELAYED_WORK(&(((struct sony_sy35560_device *)dev)->esd_work),
-		sony_sy35560_esd_work_fn);
-
-	/* Acquire MCDE resources */
-	chnl = mcde_chnl_get(dev->chnl_id, dev->fifo, dev->port);
-	if (IS_ERR(chnl)) {
-		ret = PTR_ERR(chnl);
-		dev_warn(&dev->dev, "Failed to acquire MCDE channel\n");
-		goto out;
-	}
-
-	/* plugnplay: use registers DAh, DBh and DCh to detect display */
-	readret = mcde_dsi_dcs_read(chnl, 0xDA, &id1, &len);
-	if (!readret)
-		readret = mcde_dsi_dcs_read(chnl, 0xDB, &id2, &len);
-	if (!readret)
-		readret = mcde_dsi_dcs_read(chnl, 0xDC, &id3, &len);
-
-	if (readret) {
-		dev_info(&dev->dev,
-			"mcde_dsi_dcs_read failed to read display ID\n");
-		goto read_fail;
-	}
-
-	id = (id3 << 16) | (id2 << 8) | id1;
-
-	switch (id) {
-	case 0x018101:
-		dev_info(&dev->dev,
-			"Cygnus Cut1 display (ID 0x%.6X) probed\n", id);
-		/* add display specific initialization here */
-		break;
-
-	case 0x028101:
-		dev_info(&dev->dev,
-			"Cygnus Cut2 display (ID 0x%.6X) probed\n", id);
-		/* add display specific initialization here */
-		break;
-
-	default:
-		dev_info(&dev->dev,
-			"Display with id 0x%.6X probed\n", id);
-		break;
-	}
-
-read_fail:
-	/* close  MCDE channel */
-	mcde_chnl_put(chnl);
-	chnl = NULL;
-out:
-	return ret;
-}
-
-static int __devexit sony_sy35560_remove(struct mcde_display_device *dev)
-{
-	dev->set_power_mode(dev, MCDE_DISPLAY_PM_OFF);
-
-	cancel_delayed_work(&(((struct sony_sy35560_device *)dev)->esd_work));
-	destroy_workqueue(((struct sony_sy35560_device *)dev)->esd_wq);
-	return 0;
-}
-
-static int sony_sy35560_resume(struct mcde_display_device *ddev)
-{
-	int ret;
-	/* set_power_mode will handle call platform_enable */
-	ret = ddev->set_power_mode(ddev, MCDE_DISPLAY_PM_STANDBY);
-	if (ret < 0)
-		dev_warn(&ddev->dev, "%s:Failed to resume display\n"
-			, __func__);
-
-	queue_delayed_work(((struct sony_sy35560_device *)ddev)->esd_wq,
-		&(((struct sony_sy35560_device *)ddev)->esd_work),
-		SONY_SY35560_ESD_CHECK_PERIOD);
-
-	return ret;
-}
-
-static int sony_sy35560_suspend(struct mcde_display_device *ddev,
-			pm_message_t state)
-{
-	int ret;
-	/* set_power_mode will handle call platform_disable */
-	ret = ddev->set_power_mode(ddev, MCDE_DISPLAY_PM_OFF);
-	if (ret < 0)
-		dev_warn(&ddev->dev, "%s:Failed to suspend display\n"
-			, __func__);
-
-	cancel_delayed_work(&(((struct sony_sy35560_device *)ddev)->esd_work));
-
-	return ret;
-}
-
-static struct mcde_display_driver sony_sy35560_driver = {
-	.probe	= sony_sy35560_probe,
-	.remove = sony_sy35560_remove,
-	.suspend = sony_sy35560_suspend,
-	.resume = sony_sy35560_resume,
-	.driver = {
-		.name	= "mcde_disp_sony",
-	},
-};
-
-/* Module init */
-
-static int __init mcde_display_sony_sy35560_init(void)
-{
-	pr_info("%s\n", __func__);
-
-	return mcde_display_driver_register(&sony_sy35560_driver);
-}
-module_init(mcde_display_sony_sy35560_init);
-
-static void __exit mcde_display_sony_sy35560_exit(void)
-{
-	pr_info("%s\n", __func__);
-
-	mcde_display_driver_unregister(&sony_sy35560_driver);
-}
-module_exit(mcde_display_sony_sy35560_exit);
-
-MODULE_AUTHOR("Marcus Lorentzon <marcus.xm.lorentzon@stericsson.com>");
-MODULE_LICENSE("GPL");
-MODULE_DESCRIPTION("ST-Ericsson MCDE Sony sy35560 DCS display driver");
-
diff --git a/include/video/mcde_display-sony_sy35560_dsi.h b/include/video/mcde_display-sony_sy35560_dsi.h
deleted file mode 100644
index 997a7ed1f85..00000000000
--- a/include/video/mcde_display-sony_sy35560_dsi.h
+++ /dev/null
@@ -1,45 +0,0 @@
-/*
- * Copyright (C) ST-Ericsson SA 2010
- *
- * ST-Ericsson MCDE Sony sy35560 DCS display driver
- *
- * Author: Marcus Lorentzon <marcus.xm.lorentzon@stericsson.com>
- * for ST-Ericsson.
- *
- * License terms: GNU General Public License (GPL), version 2.
- */
-#ifndef __MCDE_DISPLAY_SONY_SY35560__H__
-#define __MCDE_DISPLAY_SONY_SY35560__H__
-
-#include <linux/regulator/consumer.h>
-
-#include "mcde_display.h"
-#include <linux/workqueue.h>
-
-/* period between ESD status checks */
-#define SONY_SY35560_ESD_CHECK_PERIOD	msecs_to_jiffies(10000)
-
-struct sony_sy35560_platform_data {
-	/* Platform info */
-	int reset_gpio;
-	bool reset_high;
-	const char *regulator_id;
-	bool skip_init;
-
-	/* Driver data */
-	int max_supply_voltage;
-	int min_supply_voltage;
-};
-
-struct sony_sy35560_device {
-	struct mcde_display_device base;
-
-	struct regulator *regulator;
-
-	/* ESD workqueue */
-	struct workqueue_struct *esd_wq;
-	struct delayed_work esd_work;
-};
-
-#endif /* __MCDE_DISPLAY_SONY_SY35560__H__ */
-
-- 
cgit v1.2.3


From 60f657297faacda3cfad1b335f734ee45e5bdbd0 Mon Sep 17 00:00:00 2001
From: Naveen Kumar Gaddipati <naveen.gaddipati@stericsson.com>
Date: Mon, 5 Sep 2011 17:31:41 +0530
Subject: video: mcde: correct DSI command set max pkt size

This patch corrects a bug for sending the DSI
command set max packet size.

ST-Ericsson ID: 357458
ST-Ericsson FOSS-OUT ID: Trivial
ST-Ericsson Linux next: Not tested, ER 282779

Signed-off-by: Anders Bauer <anders.bauer@stericsson.com>
Change-Id: I43872b96c5d2fd4de085f4a3020609bd7f3f1596
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/30126
Reviewed-by: Naveen Kumar GADDIPATI <naveen.gaddipati@stericsson.com>
Tested-by: Naveen Kumar GADDIPATI <naveen.gaddipati@stericsson.com>
---
 drivers/video/mcde/mcde_hw.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index b6fa06ee89a..9ad6c8074fe 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -2366,9 +2366,9 @@ int mcde_dsi_set_max_pkt_size(struct mcde_chnl_state *chnl)
 	}
 
 	/*
-	 * Set Maximum Return Packet Size is a four-byte command packet
-	 * (including ECC) that specifies the maximum size of the payload.
-	 * The order of bytes is:
+	 * Set Maximum Return Packet Size is a two-byte command packet
+	 * that specifies the maximum size of the payload as u16 value.
+	 * The order of bytes is: MaxSize LSB, MaxSize MSB
 	 */
 	settings = DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_NAT_ENUM(WRITE) |
 		DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_LONGNOTSHORT(false) |
-- 
cgit v1.2.3


From 514a5c07a8408de16776904326f5b142687d91e2 Mon Sep 17 00:00:00 2001
From: Naveen Kumar Gaddipati <naveen.gaddipati@stericsson.com>
Date: Mon, 5 Sep 2011 17:39:56 +0530
Subject: video: av8100: Add new firmware version

Updates AV8100 firmware to version 2.3
Linux firmware interface is used.

ST-Ericsson ID: 322390
ST-Ericsson Linux next: Not tested, ER 282779
ST-Ericsson FOSS-OUT ID: Trivial

Signed-off-by: Per Persson <per.xb.persson@stericsson.com>
Change-Id: I7951b921538af17b3761240393a55a46c2606ddd
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/30127
Reviewed-by: Naveen Kumar GADDIPATI <naveen.gaddipati@stericsson.com>
Tested-by: Naveen Kumar GADDIPATI <naveen.gaddipati@stericsson.com>
---
 drivers/video/av8100/av8100.c       |  3 +--
 drivers/video/av8100/hdmi.c         | 22 ++++++++++------------
 drivers/video/mcde/display-av8100.c |  9 ++++++---
 include/video/av8100.h              |  3 +--
 4 files changed, 18 insertions(+), 19 deletions(-)

diff --git a/drivers/video/av8100/av8100.c b/drivers/video/av8100/av8100.c
index 7ce61a83f1f..2b9442b4efc 100644
--- a/drivers/video/av8100/av8100.c
+++ b/drivers/video/av8100/av8100.c
@@ -2271,8 +2271,7 @@ av8100_powerdown_end:
 }
 EXPORT_SYMBOL(av8100_powerdown);
 
-int av8100_download_firmware(char *fw_buf, int nbytes,
-	enum interface_type if_type)
+int av8100_download_firmware(enum interface_type if_type)
 {
 	int retval;
 	int temp = 0x0;
diff --git a/drivers/video/av8100/hdmi.c b/drivers/video/av8100/hdmi.c
index c926f65ac26..653cb5b2b23 100644
--- a/drivers/video/av8100/hdmi.c
+++ b/drivers/video/av8100/hdmi.c
@@ -261,7 +261,7 @@ static int edidread(struct hdmi_device *hdev, struct edid_read *edidread,
 	}
 
 	if (status.av8100_state < AV8100_OPMODE_INIT) {
-		if (av8100_download_firmware(NULL, 0, I2C_INTERFACE) != 0) {
+		if (av8100_download_firmware(I2C_INTERFACE) != 0) {
 			dev_err(hdev->dev, "av8100 dl fw FAIL\n");
 			return -EINVAL;
 		}
@@ -308,7 +308,7 @@ static int cecread(struct hdmi_device *hdev, u8 *src, u8 *dest, u8 *data_len,
 	}
 
 	if (status.av8100_state < AV8100_OPMODE_INIT) {
-		if (av8100_download_firmware(NULL, 0, I2C_INTERFACE) != 0) {
+		if (av8100_download_firmware(I2C_INTERFACE) != 0) {
 			dev_err(hdev->dev, "av8100 dl fw FAIL\n");
 			return -EINVAL;
 		}
@@ -379,7 +379,7 @@ static int cecsend(struct hdmi_device *hdev, u8 src, u8 dest, u8 data_len,
 	}
 
 	if (status.av8100_state < AV8100_OPMODE_INIT) {
-		if (av8100_download_firmware(NULL, 0, I2C_INTERFACE) != 0) {
+		if (av8100_download_firmware(I2C_INTERFACE) != 0) {
 			dev_err(hdev->dev, "av8100 dl fw FAIL\n");
 			return -EINVAL;
 		}
@@ -434,7 +434,7 @@ static int infofrsend(struct hdmi_device *hdev, u8 type, u8 version, u8 crc,
 	}
 
 	if (status.av8100_state < AV8100_OPMODE_INIT) {
-		if (av8100_download_firmware(NULL, 0, I2C_INTERFACE) != 0) {
+		if (av8100_download_firmware(I2C_INTERFACE) != 0) {
 			dev_err(hdev->dev, "av8100 dl fw FAIL\n");
 			return -EINVAL;
 		}
@@ -479,8 +479,7 @@ static int hdcpchkaesotp(struct hdmi_device *hdev, u8 *crc, u8 *progged)
 	}
 
 	if (status.av8100_state < AV8100_OPMODE_INIT) {
-		if (av8100_download_firmware(NULL, 0, I2C_INTERFACE) !=
-			0) {
+		if (av8100_download_firmware(I2C_INTERFACE) != 0) {
 			dev_err(hdev->dev, "av8100 dl fw FAIL\n");
 			return -EINVAL;
 		}
@@ -527,8 +526,7 @@ static int hdcpfuseaes(struct hdmi_device *hdev, u8 *key, u8 crc, u8 *result)
 	}
 
 	if (status.av8100_state < AV8100_OPMODE_INIT) {
-		if (av8100_download_firmware(NULL, 0, I2C_INTERFACE) !=
-			0) {
+		if (av8100_download_firmware(I2C_INTERFACE) != 0) {
 			dev_err(hdev->dev, "av8100 dl fw FAIL\n");
 			return -EINVAL;
 		}
@@ -582,7 +580,7 @@ static int hdcploadaes(struct hdmi_device *hdev, u8 block, u8 key_len, u8 *key,
 	}
 
 	if (status.av8100_state < AV8100_OPMODE_INIT) {
-		if (av8100_download_firmware(NULL, 0, I2C_INTERFACE) != 0) {
+		if (av8100_download_firmware(I2C_INTERFACE) != 0) {
 			dev_err(hdev->dev, "av8100 dl fw FAIL\n");
 			return -EINVAL;
 		}
@@ -628,7 +626,7 @@ static int hdcpauthencr(struct hdmi_device *hdev, u8 auth_type, u8 encr_type,
 	}
 
 	if (status.av8100_state < AV8100_OPMODE_INIT) {
-		if (av8100_download_firmware(NULL, 0, I2C_INTERFACE) != 0) {
+		if (av8100_download_firmware(I2C_INTERFACE) != 0) {
 			dev_err(hdev->dev, "av8100 dl fw FAIL\n");
 			return -EINVAL;
 		}
@@ -739,7 +737,7 @@ static int audiocfg(struct hdmi_device *hdev, struct audio_cfg *cfg)
 	}
 
 	if (status.av8100_state < AV8100_OPMODE_INIT) {
-		if (av8100_download_firmware(NULL, 0, I2C_INTERFACE) != 0) {
+		if (av8100_download_firmware(I2C_INTERFACE) != 0) {
 			dev_err(hdev->dev, "av8100 dl fw FAIL\n");
 			return -EINVAL;
 		}
@@ -2175,7 +2173,7 @@ hdcp_authencr_end:
 		break;
 
 	case IOC_HDMI_DOWNLOAD_FW:
-		if (av8100_download_firmware(NULL, 0, I2C_INTERFACE) != 0) {
+		if (av8100_download_firmware(I2C_INTERFACE) != 0) {
 			dev_err(hdev->dev, "av8100 dl fw FAIL\n");
 			return -EINVAL;
 		}
diff --git a/drivers/video/mcde/display-av8100.c b/drivers/video/mcde/display-av8100.c
index 5602ec37ba5..31e46b138e1 100644
--- a/drivers/video/mcde/display-av8100.c
+++ b/drivers/video/mcde/display-av8100.c
@@ -835,8 +835,8 @@ static int hdmi_set_video_mode(
 {
 	int ret;
 	union av8100_configuration av8100_config;
-	struct mcde_display_hdmi_platform_data *pdata = dev->dev.platform_data;
-	struct display_driver_data *driver_data = dev_get_drvdata(&dev->dev);
+	struct mcde_display_hdmi_platform_data *pdata;
+	struct display_driver_data *driver_data;
 	struct av8100_status status;
 
 	/* TODO check video_mode_params */
@@ -845,6 +845,9 @@ static int hdmi_set_video_mode(
 		return -EINVAL;
 	}
 
+	pdata = dev->dev.platform_data;
+	driver_data = dev_get_drvdata(&dev->dev);
+
 	dev_dbg(&dev->dev, "%s:\n", __func__);
 	dev_vdbg(&dev->dev, "%s:xres:%d yres:%d hbp:%d hfp:%d vbp:%d vfp:%d "
 		"interlaced:%d\n", __func__,
@@ -914,7 +917,7 @@ static int hdmi_set_video_mode(
 	}
 
 	if (status.av8100_state < AV8100_OPMODE_IDLE) {
-		ret = av8100_download_firmware(NULL, 0, I2C_INTERFACE);
+		ret = av8100_download_firmware(I2C_INTERFACE);
 		if (ret) {
 			dev_err(&dev->dev, "av8100_download_firmware failed\n");
 			av8100_powerdown();
diff --git a/include/video/av8100.h b/include/video/av8100.h
index b5922c8b2e5..23e96a0b871 100644
--- a/include/video/av8100.h
+++ b/include/video/av8100.h
@@ -411,8 +411,7 @@ int av8100_powerup(void);
 int av8100_powerdown(void);
 int av8100_disable_interrupt(void);
 int av8100_enable_interrupt(void);
-int av8100_download_firmware(char *fw_buff, int numOfBytes,
-	enum interface_type if_type);
+int av8100_download_firmware(enum interface_type if_type);
 int av8100_reg_stby_w(
 		unsigned char cpd,
 		unsigned char stby,
-- 
cgit v1.2.3


From 6ca9a1a270cde87ffeff167fb0b8fc1fc79838a9 Mon Sep 17 00:00:00 2001
From: Naveen Kumar Gaddipati <naveen.gaddipati@stericsson.com>
Date: Mon, 5 Sep 2011 17:49:53 +0530
Subject: b2r2:Add optimized path for VUY(A)888(8) 24/32-bit

The most common conversions for these formats are now
handled by the node splitter. These include RGB,
STE macro-block, and interleaved YUV formats.

ST-Ericsson ID: 351482
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: Trivial

Signed-off-by: Maciej Socha <maciej.socha@stericsson.com>
Change-Id: I56dc8b0e94bfcd925299e00a419e5be6ef31a5ac
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/30128
Reviewed-by: Naveen Kumar GADDIPATI <naveen.gaddipati@stericsson.com>
Tested-by: Naveen Kumar GADDIPATI <naveen.gaddipati@stericsson.com>
---
 drivers/video/b2r2/b2r2_node_split.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/video/b2r2/b2r2_node_split.c b/drivers/video/b2r2/b2r2_node_split.c
index 5aa62be8b4b..556e5f69e07 100644
--- a/drivers/video/b2r2/b2r2_node_split.c
+++ b/drivers/video/b2r2/b2r2_node_split.c
@@ -94,6 +94,7 @@ static const u32 vmx_blt_yuv888_to_yvu[] = {
 	B2R2_VMX2_BLT_YUV888_TO_YVU,
 	B2R2_VMX3_BLT_YUV888_TO_YVU,
 };
+
 static const u32 vmx_yvu_to_rgb[] = {
 	B2R2_VMX0_YVU_TO_RGB_601_VIDEO,
 	B2R2_VMX1_YVU_TO_RGB_601_VIDEO,
@@ -299,7 +300,7 @@ int b2r2_node_split_analyze(const struct b2r2_blt_request *req,
 	case B2R2_BLT_FMT_32_BIT_AYUV8888:
 	case B2R2_BLT_FMT_24_BIT_VUY888:
 	case B2R2_BLT_FMT_32_BIT_VUYA8888:
-		if (!is_rgb_fmt(req->user_req.dst_img.fmt)) {
+		if (is_bgr_fmt(req->user_req.dst_img.fmt)) {
 			ret = -ENOSYS;
 			goto unsupported;
 		}
@@ -314,7 +315,7 @@ int b2r2_node_split_analyze(const struct b2r2_blt_request *req,
 	case B2R2_BLT_FMT_32_BIT_AYUV8888:
 	case B2R2_BLT_FMT_24_BIT_VUY888:
 	case B2R2_BLT_FMT_32_BIT_VUYA8888:
-		if (!is_rgb_fmt(req->user_req.src_img.fmt)) {
+		if (is_bgr_fmt(req->user_req.src_img.fmt)) {
 			ret = -ENOSYS;
 			goto unsupported;
 		}
-- 
cgit v1.2.3


From 3908997f4e588c68c76c1f74b0d43aed4e555760 Mon Sep 17 00:00:00 2001
From: Naveen Kumar Gaddipati <naveen.gaddipati@stericsson.com>
Date: Tue, 6 Sep 2011 11:43:37 +0530
Subject: mach-ux500:u5500:MCDE platform data for kernel 3.0

MCDE platform data for kernel 3.0 migration for
u5500.

ST-Ericsson ID: 352334
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: NA

Signed-off-by: Naveen Kumar Gaddipati <naveen.gaddipati@stericsson.com>
Change-Id: I49d39c2007753719dfc76563086ae9ea916bdbb8
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/30148
---
 arch/arm/mach-ux500/board-u5500-mcde.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/arch/arm/mach-ux500/board-u5500-mcde.c b/arch/arm/mach-ux500/board-u5500-mcde.c
index 63580694939..581ecc700de 100644
--- a/arch/arm/mach-ux500/board-u5500-mcde.c
+++ b/arch/arm/mach-ux500/board-u5500-mcde.c
@@ -539,9 +539,8 @@ struct mcde_display_device *mcde_get_main_display(void)
 		return &sony_acx424akp_display0;
 #elif defined(CONFIG_DISPLAY_AV8100_TERTIARY)
 	return &av8100_hdmi;
-#else
-	return NULL;
 #endif
+	return NULL;
 }
 EXPORT_SYMBOL(mcde_get_main_display);
 
-- 
cgit v1.2.3


From 8492f2cebf30c6cf0617b07e243d6364c2bc89d8 Mon Sep 17 00:00:00 2001
From: Philippe Langlais <philippe.langlais@stericsson.com>
Date: Mon, 17 Oct 2011 09:31:29 +0200
Subject: mach-ux500: video: Platform data for kernel 3.0

Platform data for kernel 3.0 migration.

ST-Ericsson ID: 352334
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: NA

Signed-off-by: Naveen Kumar Gaddipati <naveen.gaddipati@stericsson.com>
---
 arch/arm/mach-ux500/Kconfig-arch | 9 +--------
 1 file changed, 1 insertion(+), 8 deletions(-)

diff --git a/arch/arm/mach-ux500/Kconfig-arch b/arch/arm/mach-ux500/Kconfig-arch
index 8466a0aeedd..013c76d8e74 100644
--- a/arch/arm/mach-ux500/Kconfig-arch
+++ b/arch/arm/mach-ux500/Kconfig-arch
@@ -83,7 +83,7 @@ config DISPLAY_GENERIC_DSI_PRIMARY_ROTATION_ANGLE
 
 config DISPLAY_GENERIC_DSI_PRIMARY_VSYNC
 	bool "Enable v-sync for primary display"
-	depends on DISPLAY_GENERIC_DSI_PRIMARY || DISPLAY_SONY_SY35560_DSI_PRIMARY
+	depends on DISPLAY_GENERIC_DSI_PRIMARY
 	default n
 	help
 	  Say yes to enable v-sync for primary display
@@ -101,13 +101,6 @@ config DISPLAY_SONY_ACX424AKP_DSI_PRIMARY
 	help
 	  Say yes here when using a sony acx424akp DSI display
 
-config SONY_SY35560_ENABLE_ESD_CHECK
-	bool "Enable esd status check for primary display"
-	depends on DISPLAY_SONY_SY35560_DSI_PRIMARY
-	default n
-	help
-	  Say yes to enable esd status check for primary display
-
 config DISPLAY_GENERIC_DSI_SECONDARY
 	bool "Sub display support"
 	depends on MACH_U8500
-- 
cgit v1.2.3


From 13889ee70d0ce613de92cb33328069abe2e858f9 Mon Sep 17 00:00:00 2001
From: Jimmy Rubin <jimmy.rubin@stericsson.com>
Date: Tue, 6 Sep 2011 08:41:31 +0200
Subject: video: mcde: request irq after init_waitqueue

The irq_handler uses the waitqueue to wake a thread when
a vcomp arrives. This waitqueue must be initialized before
the irq is requested in probe.

ST-Ericsson ID: 355171
ST-Ericsson FOSS-OUT ID: Trivial
ST-Ericsson Linux next: NA

Signed-off-by: Jimmy Rubin <jimmy.rubin@stericsson.com>

Change-Id: I5ac187e04bffb779dac17f78e5599ba5e75b0c13
---
 drivers/video/mcde/mcde_hw.c | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index 9ad6c8074fe..9b009259af9 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -3493,14 +3493,6 @@ static int __devinit mcde_probe(struct platform_device *pdev)
 	update_mcde_registers();
 	mcde_is_enabled = true;
 
-	ret = request_irq(mcde_irq, mcde_irq_handler, 0, "mcde",
-							&mcde_dev->dev);
-	if (ret) {
-		dev_dbg(&mcde_dev->dev, "Failed to request irq (irq=%d)\n",
-								mcde_irq);
-		goto failed_request_irq;
-	}
-
 	schedule_delayed_work(&hw_timeout_work,
 					msecs_to_jiffies(MCDE_SLEEP_WATCHDOG));
 
@@ -3578,10 +3570,18 @@ static int __devinit mcde_probe(struct platform_device *pdev)
 		channels[i].dsi_te_timer.data = i;
 	}
 
+	ret = request_irq(mcde_irq, mcde_irq_handler, 0, "mcde",
+							&mcde_dev->dev);
+	if (ret) {
+		dev_dbg(&mcde_dev->dev, "Failed to request irq (irq=%d)\n",
+								mcde_irq);
+		goto failed_request_irq;
+	}
+
 	return 0;
 
-failed_hardware_version:
 failed_request_irq:
+failed_hardware_version:
 	disable_mcde_hw(true);
 failed_enable_clocks:
 	remove_clocks_and_power(pdev);
-- 
cgit v1.2.3


From 69fc776927089d39791575997d17c1041e4eb524 Mon Sep 17 00:00:00 2001
From: Maciej Socha <maciej.socha@stericsson.com>
Date: Wed, 31 Aug 2011 12:58:19 +0200
Subject: video: mcde: Match DSI pkt_size to display width

Data for each scanline is split into several equally
sized DSI packets. The selected packet size is always
less than or equal to the corresponding output FIFO
size. Watermark level of output FIFO is set to match
the display width whenever possible. Otherwise it is
set to split each scanline into several equally sized
data chunks.

ST-Ericsson ID: 340442, 352852
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: Ife405bd43a63991f984e14a0615035a2a33c8cb3
Signed-off-by: Maciej Socha <maciej.socha@stericsson.com>
---
 drivers/video/mcde/mcde_hw.c | 97 ++++++++++++++++++++++++++------------------
 1 file changed, 58 insertions(+), 39 deletions(-)

diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index 9b009259af9..5db23a8dcf1 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -1129,21 +1129,6 @@ static int update_channel_static_registers(struct mcde_chnl_state *chnl)
 			else if (port->ifc == DSI_CMD_MODE && port->link == 2)
 				mcde_wfld(MCDE_CR, DSICMD2_EN_V1, true);
 		}
-
-		if (chnl->fifo == MCDE_FIFO_C0)
-			mcde_wreg(MCDE_CTRLC0, MCDE_CTRLC0_FIFOWTRMRK(
-					get_output_fifo_size(MCDE_FIFO_C0)));
-		else if (chnl->fifo == MCDE_FIFO_C1)
-			mcde_wreg(MCDE_CTRLC1, MCDE_CTRLC1_FIFOWTRMRK(
-					get_output_fifo_size(MCDE_FIFO_C1)));
-		else if (port->update_auto_trig &&
-					(port->sync_src == MCDE_SYNCSRC_TE0))
-			mcde_wreg(MCDE_CTRLC0, MCDE_CTRLC0_FIFOWTRMRK(
-					get_output_fifo_size(MCDE_FIFO_C0)));
-		else if (port->update_auto_trig &&
-					(port->sync_src == MCDE_SYNCSRC_TE1))
-			mcde_wreg(MCDE_CTRLC1, MCDE_CTRLC1_FIFOWTRMRK(
-					get_output_fifo_size(MCDE_FIFO_C1)));
 	} else if (hardware_version == MCDE_CHIP_VERSION_3_0_8 ||
 			hardware_version == MCDE_CHIP_VERSION_4_0_4) {
 		switch (chnl->fifo) {
@@ -1155,15 +1140,11 @@ static int update_channel_static_registers(struct mcde_chnl_state *chnl)
 				mcde_wfld(MCDE_CTRLA, FORMTYPE,
 						MCDE_CTRLA_FORMTYPE_DPITV);
 				mcde_wfld(MCDE_CTRLA, FORMID, port->link);
-				mcde_wfld(MCDE_CTRLA, FIFOWTRMRK,
-					get_output_fifo_size(MCDE_FIFO_A));
 			} else if (port->type == MCDE_PORTTYPE_DSI) {
 				mcde_wfld(MCDE_CTRLA, FORMTYPE,
 						MCDE_CTRLA_FORMTYPE_DSI);
 				mcde_wfld(MCDE_CTRLA, FORMID,
 							get_dsi_formid(port));
-				mcde_wfld(MCDE_CTRLA, FIFOWTRMRK,
-					get_output_fifo_size(MCDE_FIFO_A));
 			}
 			break;
 		case MCDE_FIFO_B:
@@ -1174,15 +1155,11 @@ static int update_channel_static_registers(struct mcde_chnl_state *chnl)
 				mcde_wfld(MCDE_CTRLB, FORMTYPE,
 						MCDE_CTRLB_FORMTYPE_DPITV);
 				mcde_wfld(MCDE_CTRLB, FORMID, port->link);
-				mcde_wfld(MCDE_CTRLB, FIFOWTRMRK,
-					get_output_fifo_size(MCDE_FIFO_B));
 			} else if (port->type == MCDE_PORTTYPE_DSI) {
 				mcde_wfld(MCDE_CTRLB, FORMTYPE,
 						MCDE_CTRLB_FORMTYPE_DSI);
 				mcde_wfld(MCDE_CTRLB, FORMID,
 							get_dsi_formid(port));
-				mcde_wfld(MCDE_CTRLB, FIFOWTRMRK,
-					get_output_fifo_size(MCDE_FIFO_B));
 			}
 
 			break;
@@ -1195,8 +1172,6 @@ static int update_channel_static_registers(struct mcde_chnl_state *chnl)
 			mcde_wfld(MCDE_CTRLC0, FORMTYPE,
 						MCDE_CTRLC0_FORMTYPE_DSI);
 			mcde_wfld(MCDE_CTRLC0, FORMID, get_dsi_formid(port));
-			mcde_wfld(MCDE_CTRLC0, FIFOWTRMRK,
-					get_output_fifo_size(MCDE_FIFO_C0));
 			break;
 		case MCDE_FIFO_C1:
 			mcde_wreg(MCDE_CHNL0MUXING_V2 + chnl->id *
@@ -1207,8 +1182,6 @@ static int update_channel_static_registers(struct mcde_chnl_state *chnl)
 			mcde_wfld(MCDE_CTRLC1, FORMTYPE,
 						MCDE_CTRLC1_FORMTYPE_DSI);
 			mcde_wfld(MCDE_CTRLC1, FORMID, get_dsi_formid(port));
-			mcde_wfld(MCDE_CTRLC1, FIFOWTRMRK,
-					get_output_fifo_size(MCDE_FIFO_C1));
 			break;
 		default:
 			return -EINVAL;
@@ -1230,8 +1203,6 @@ static int update_channel_static_registers(struct mcde_chnl_state *chnl)
 			} else if (port->type == MCDE_PORTTYPE_DPI) {
 				mcde_wfld(MCDE_CR, DPI_EN_V3, true);
 			}
-			mcde_wfld(MCDE_CTRLA, FIFOWTRMRK,
-				get_output_fifo_size(MCDE_FIFO_A));
 			break;
 		case MCDE_FIFO_B:
 			if (port->type != MCDE_PORTTYPE_DSI)
@@ -1245,9 +1216,6 @@ static int update_channel_static_registers(struct mcde_chnl_state *chnl)
 				return -EINVAL;
 
 			mcde_wfld(MCDE_CR, DSI1_EN_V3, true);
-			mcde_wfld(MCDE_CTRLB, FIFOWTRMRK,
-				get_output_fifo_size(MCDE_FIFO_B));
-
 			break;
 		default:
 			return -EINVAL;
@@ -1901,6 +1869,35 @@ static void work_sleep_function(struct work_struct *ptr)
 
 /* TODO get from register */
 #define MCDE_CLK_FREQ_MHZ 160
+static u32 get_pkt_div(u32 disp_ppl,
+		struct mcde_port *port,
+		enum mcde_fifo fifo)
+{
+	/*
+	 * The lines can be split in several packets only on DSI CMD mode.
+	 * In DSI VIDEO mode, 1 line = 1 packet.
+	 * DPI is like DSI VIDEO (watermark = 1 line).
+	 * DPI waits for fifo ready only for the first line of the first frame.
+	 * If line is wider than fifo size, one can set watermark
+	 * at fifo size, or set it to line size as watermark will be
+	 * saturated at fifo size inside MCDE.
+	 */
+	switch (port->type) {
+	case MCDE_PORTTYPE_DSI:
+		if (port->ifc == DSI_CMD_MODE)
+			/* Equivalent of ceil(disp_ppl/fifo_size) */
+			return (disp_ppl - 1) / get_output_fifo_size(fifo) + 1;
+		else
+			return 1;
+		break;
+	case MCDE_PORTTYPE_DPI:
+		return 1;
+		break;
+	default:
+		break;
+	}
+	return 1;
+}
 
 void update_channel_registers(enum mcde_chnl chnl_id, struct chnl_regs *regs,
 				struct mcde_port *port, enum mcde_fifo fifo,
@@ -1909,9 +1906,37 @@ void update_channel_registers(enum mcde_chnl chnl_id, struct chnl_regs *regs,
 	u8 idx = chnl_id;
 	u32 out_synch_src = MCDE_CHNL0SYNCHMOD_OUT_SYNCH_SRC_FORMATTER;
 	u32 src_synch = MCDE_CHNL0SYNCHMOD_SRC_SYNCH_SOFTWARE;
+	u32 fifo_wtrmrk = 0;
 
 	dev_vdbg(&mcde_dev->dev, "%s\n", __func__);
 
+	/*
+	 * Select appropriate fifo watermark.
+	 * Watermark will be saturated at fifo size inside MCDE.
+	 */
+	fifo_wtrmrk = video_mode->xres /
+		get_pkt_div(video_mode->xres, port, fifo);
+
+	dev_vdbg(&mcde_dev->dev, "%s fifo_watermark=%d for chnl_id=%d\n",
+		__func__, fifo_wtrmrk, chnl_id);
+
+	switch (chnl_id) {
+	case MCDE_CHNL_A:
+		mcde_wfld(MCDE_CTRLA, FIFOWTRMRK, fifo_wtrmrk);
+		break;
+	case MCDE_CHNL_B:
+		mcde_wfld(MCDE_CTRLB, FIFOWTRMRK, fifo_wtrmrk);
+		break;
+	case MCDE_CHNL_C0:
+		mcde_wfld(MCDE_CTRLC0, FIFOWTRMRK, fifo_wtrmrk);
+		break;
+	case MCDE_CHNL_C1:
+		mcde_wfld(MCDE_CTRLC1, FIFOWTRMRK, fifo_wtrmrk);
+		break;
+	default:
+		break;
+	}
+
 	/* Channel */
 	if (port->update_auto_trig && port->type == MCDE_PORTTYPE_DSI) {
 		switch (port->sync_src) {
@@ -2011,13 +2036,7 @@ void update_channel_registers(enum mcde_chnl chnl_id, struct chnl_regs *regs,
 		screen_ppl = video_mode->xres;
 		screen_lpf = video_mode->yres;
 
-		if (screen_ppl == SCREEN_PPL_HIGH) {
-			pkt_div = (screen_ppl - 1) /
-					get_output_fifo_size(fifo) + 1;
-		} else {
-			pkt_div = screen_ppl /
-					(get_output_fifo_size(fifo) * 2) + 1;
-		}
+		pkt_div = get_pkt_div(screen_ppl, port, fifo);
 
 		if (video_mode->interlaced)
 			screen_lpf /= 2;
-- 
cgit v1.2.3


From 5ff34c21c6947cbb5ba29cf060b1084ee8fb0b00 Mon Sep 17 00:00:00 2001
From: Philippe Langlais <philippe.langlais@stericsson.com>
Date: Wed, 19 Oct 2011 14:25:28 +0200
Subject: video: mcde: use external TE0 for display vsync

This patch makes it possible to use external gpio
for display vsync signal. Make sure the board has
a physical connection set up for carrying the
signal and enable external vsync by setting
sync_src = MCDE_SYNCSRC_TE0 in mcde_port in the
board configuration file.

ST-Ericsson ID: 360444
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I43f459b752d3002b19404e59b2c2b8585caaf4d3
Signed-off-by: Anders Bauer <anders.bauer@stericsson.com>
---
 drivers/video/mcde/mcde_hw.c | 76 ++++++++++++++++++++++++++++----------------
 1 file changed, 49 insertions(+), 27 deletions(-)

diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index 5db23a8dcf1..2accd0558b7 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -546,10 +546,13 @@ static void update_mcde_registers(void)
 	/* Enable overlay fetch done interrupts */
 	mcde_wfld(MCDE_IMSCOVL, OVLFDIM, 0x3f);
 
-	/* Setup sync pulse length */
+	/* Setup sync pulse length
+	 * Setting VSPMAX=0 disables the filter and VSYNC
+	 * is generated after VSPMIN mcde cycles
+	 */
 	mcde_wreg(MCDE_VSCRC0,
-		MCDE_VSCRC0_VSPMIN(1) |
-		MCDE_VSCRC0_VSPMAX(0xff));
+		MCDE_VSCRC0_VSPMIN(0) |
+		MCDE_VSCRC0_VSPMAX(0));
 	mcde_wreg(MCDE_VSCRC1,
 		MCDE_VSCRC1_VSPMIN(1) |
 		MCDE_VSCRC1_VSPMAX(0xff));
@@ -1938,23 +1941,38 @@ void update_channel_registers(enum mcde_chnl chnl_id, struct chnl_regs *regs,
 	}
 
 	/* Channel */
-	if (port->update_auto_trig && port->type == MCDE_PORTTYPE_DSI) {
-		switch (port->sync_src) {
-		case MCDE_SYNCSRC_TE0:
-			out_synch_src = MCDE_CHNL0SYNCHMOD_OUT_SYNCH_SRC_VSYNC0;
-			src_synch = MCDE_CHNL0SYNCHMOD_SRC_SYNCH_OUTPUT;
-			break;
-		case MCDE_SYNCSRC_OFF:
-			src_synch = MCDE_CHNL0SYNCHMOD_SRC_SYNCH_SOFTWARE;
-			break;
-		case MCDE_SYNCSRC_TE1:
-		default:
-			out_synch_src = MCDE_CHNL0SYNCHMOD_OUT_SYNCH_SRC_VSYNC1;
-			src_synch = MCDE_CHNL0SYNCHMOD_SRC_SYNCH_OUTPUT;
-			break;
-		case MCDE_SYNCSRC_TE_POLLING:
-			src_synch = MCDE_CHNL0SYNCHMOD_SRC_SYNCH_OUTPUT;
-			break;
+	if (port->type == MCDE_PORTTYPE_DSI) {
+		if (port->update_auto_trig) {
+			switch (port->sync_src) {
+			case MCDE_SYNCSRC_TE0:
+				out_synch_src =
+				MCDE_CHNL0SYNCHMOD_OUT_SYNCH_SRC_VSYNC0;
+				src_synch =
+				MCDE_CHNL0SYNCHMOD_SRC_SYNCH_OUTPUT;
+				break;
+			case MCDE_SYNCSRC_OFF:
+				src_synch =
+				MCDE_CHNL0SYNCHMOD_SRC_SYNCH_SOFTWARE;
+				break;
+			case MCDE_SYNCSRC_TE1:
+			default:
+				out_synch_src =
+				MCDE_CHNL0SYNCHMOD_OUT_SYNCH_SRC_VSYNC1;
+				src_synch =
+				MCDE_CHNL0SYNCHMOD_SRC_SYNCH_OUTPUT;
+				break;
+			case MCDE_SYNCSRC_TE_POLLING:
+				src_synch =
+				MCDE_CHNL0SYNCHMOD_SRC_SYNCH_OUTPUT;
+				break;
+			}
+		} else {
+			if (port->sync_src == MCDE_SYNCSRC_TE0) {
+				out_synch_src =
+				MCDE_CHNL0SYNCHMOD_OUT_SYNCH_SRC_VSYNC0;
+				src_synch =
+				MCDE_CHNL0SYNCHMOD_SRC_SYNCH_OUTPUT;
+			}
 		}
 	} else if (port->type == MCDE_PORTTYPE_DPI) {
 		src_synch = port->update_auto_trig ?
@@ -2722,13 +2740,17 @@ static void chnl_update_non_continous(struct mcde_chnl_state *chnl)
 	/* TODO: look at port sync source and synched_update */
 	if (chnl->regs.synchronized_update &&
 			chnl->power_mode == MCDE_DISPLAY_PM_ON) {
-		if (chnl->port.type == MCDE_PORTTYPE_DSI &&
-			chnl->port.sync_src == MCDE_SYNCSRC_BTA) {
-			if (hardware_version == MCDE_CHIP_VERSION_3_0_8 ||
-				hardware_version == MCDE_CHIP_VERSION_4_0_4)
-				enable_channel(chnl);
-			wait_while_dsi_running(chnl->port.link);
-			dsi_te_request(chnl);
+		if (chnl->port.type == MCDE_PORTTYPE_DSI) {
+			if (chnl->port.sync_src == MCDE_SYNCSRC_BTA) {
+				if (hardware_version == MCDE_CHIP_VERSION_3_0_8)
+					enable_channel(chnl);
+				wait_while_dsi_running(chnl->port.link);
+				dsi_te_request(chnl);
+			} else if (chnl->port.sync_src == MCDE_SYNCSRC_TE0) {
+				mcde_wfld(MCDE_CRC, SYCEN0, true);
+				if (hardware_version == MCDE_CHIP_VERSION_3_0_8)
+					enable_channel(chnl);
+			}
 		}
 	} else {
 		do_softwaretrig(chnl);
-- 
cgit v1.2.3


From c05fb9f2d4f58177e556dfcccfcf6632b7454fe2 Mon Sep 17 00:00:00 2001
From: Naveen Kumar Gaddipati <naveen.gaddipati@stericsson.com>
Date: Tue, 13 Sep 2011 14:39:10 +0530
Subject: video:mcde:Modified gpio set call to reset MCDE

Modified gpio set call to reset MCDE due to kernel
3.0 mogration

ST-Ericsson ID: 352334
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: NA

Signed-off-by: Naveen Kumar Gaddipati <naveen.gaddipati@stericsson.com>
---
 drivers/video/mcde/display-generic_dsi.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/video/mcde/display-generic_dsi.c b/drivers/video/mcde/display-generic_dsi.c
index 86c87303fa4..6af7fb77fcd 100644
--- a/drivers/video/mcde/display-generic_dsi.c
+++ b/drivers/video/mcde/display-generic_dsi.c
@@ -33,10 +33,10 @@ static int generic_platform_enable(struct mcde_display_device *dev)
 		}
 	}
 	if (pdata->reset_gpio)
-		gpio_set_value(pdata->reset_gpio, pdata->reset_high);
+		gpio_set_value_cansleep(pdata->reset_gpio, pdata->reset_high);
 	mdelay(pdata->reset_delay);
 	if (pdata->reset_gpio)
-		gpio_set_value(pdata->reset_gpio, !pdata->reset_high);
+		gpio_set_value_cansleep(pdata->reset_gpio, !pdata->reset_high);
 
 	return 0;
 }
-- 
cgit v1.2.3


From 9cb72c2ea455c841ddd822e6755e3c8553e0d766 Mon Sep 17 00:00:00 2001
From: Naveen Kumar Gaddipati <naveen.gaddipati@stericsson.com>
Date: Tue, 13 Sep 2011 17:23:40 +0530
Subject: video:hdmi:Modified gpio set call to reset

Modified gpio_set_value to gpio_set_value_cansleep
to reset HDMI controller in kernel 3.0 migration.

ST-Ericsson ID: 352334
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: NA

Signed-off-by: Naveen Kumar Gaddipati <naveen.gaddipati@stericsson.com>
---
 drivers/video/av8100/av8100.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/video/av8100/av8100.c b/drivers/video/av8100/av8100.c
index 2b9442b4efc..45ba1cc523e 100644
--- a/drivers/video/av8100/av8100.c
+++ b/drivers/video/av8100/av8100.c
@@ -1964,7 +1964,7 @@ static int av8100_powerup1(struct av8100_device *adev)
 	}
 
 	/* Reset av8100 */
-	gpio_set_value(pdata->reset, 1);
+	gpio_set_value_cansleep(pdata->reset, 1);
 
 	/* Need to wait before proceeding */
 	mdelay(AV8100_WAITTIME_1MS);
@@ -2259,7 +2259,7 @@ int av8100_powerdown(void)
 		adev->params.regulator_requested = false;
 	}
 
-	gpio_set_value(pdata->reset, 0);
+	gpio_set_value_cansleep(pdata->reset, 0);
 
 	if (pdata->alt_powerupseq)
 		mdelay(AV8100_WAITTIME_5MS);
-- 
cgit v1.2.3


From 4d66a6112fe1ef2933b4ebd05924341ff9a3227e Mon Sep 17 00:00:00 2001
From: Jonas Aaberg <jonas.aberg@stericsson.com>
Date: Mon, 29 Aug 2011 08:34:10 +0200
Subject: video: mcde: Change to mdelay

The resolution of msleep is related to HZ, so with HZ set to
100 any msleep of less than 10ms will become ~10ms.

ST-Ericsson ID: -
ST-Ericsson Linux next: Not tested
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I6f33d5cf4ca830a2c7509f8de878e8654c47d4f8
Signed-off-by: Jonas Aaberg <jonas.aberg@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/29584
---
 drivers/video/mcde/mcde_hw.c | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index 2accd0558b7..64c704b40ef 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -1690,7 +1690,7 @@ static void disable_channel(struct mcde_chnl_state *chnl)
 								chnl->id, i);
 					goto break_switch;
 				}
-				msleep(1);
+				mdelay(1);
 			}
 		} else {
 			dev_vdbg(&mcde_dev->dev,
@@ -1704,7 +1704,7 @@ static void disable_channel(struct mcde_chnl_state *chnl)
 			mcde_wfld(MCDE_CRA0, FLOEN, false);
 			wait_for_channel(chnl);
 			for (i = 0; i < MCDE_FLOWEN_MAX_TRIAL; i++) {
-				msleep(1);
+				mdelay(1);
 				if (!mcde_rfld(MCDE_CRA0, FLOEN)) {
 					dev_vdbg(&mcde_dev->dev,
 					"Flow (A) off after >= %d ms\n", i);
@@ -1718,7 +1718,7 @@ static void disable_channel(struct mcde_chnl_state *chnl)
 			mcde_wfld(MCDE_CRB0, FLOEN, false);
 			wait_for_channel(chnl);
 			for (i = 0; i < MCDE_FLOWEN_MAX_TRIAL; i++) {
-				msleep(1);
+				mdelay(1);
 				if (!mcde_rfld(MCDE_CRB0, FLOEN)) {
 					dev_vdbg(&mcde_dev->dev,
 					"Flow (B) off after >= %d ms\n", i);
@@ -1732,7 +1732,7 @@ static void disable_channel(struct mcde_chnl_state *chnl)
 			mcde_wfld(MCDE_CRC, C1EN, false);
 			wait_for_channel(chnl);
 			for (i = 0; i < MCDE_FLOWEN_MAX_TRIAL; i++) {
-				msleep(1);
+				mdelay(1);
 				if (!mcde_rfld(MCDE_CRC, C1EN)) {
 					dev_vdbg(&mcde_dev->dev,
 					"Flow (C1) off after >= %d ms\n", i);
@@ -1746,7 +1746,7 @@ static void disable_channel(struct mcde_chnl_state *chnl)
 			mcde_wfld(MCDE_CRC, C2EN, false);
 			wait_for_channel(chnl);
 			for (i = 0; i < MCDE_FLOWEN_MAX_TRIAL; i++) {
-				msleep(1);
+				mdelay(1);
 				if (!mcde_rfld(MCDE_CRC, C2EN)) {
 					dev_vdbg(&mcde_dev->dev,
 					"Flow (C2) off after >= %d ms\n", i);
@@ -1782,7 +1782,7 @@ static void enable_channel(struct mcde_chnl_state *chnl)
 					"Flow (A) enable after >= %d ms\n", i);
 				return;
 			}
-			msleep(1);
+			mdelay(1);
 		}
 		break;
 	case MCDE_CHNL_B:
@@ -1793,7 +1793,7 @@ static void enable_channel(struct mcde_chnl_state *chnl)
 					"Flow (B) enable after >= %d ms\n", i);
 				return;
 			}
-			msleep(1);
+			mdelay(1);
 		}
 		break;
 	case MCDE_CHNL_C0:
@@ -1804,7 +1804,7 @@ static void enable_channel(struct mcde_chnl_state *chnl)
 					"Flow (C1) enable after >= %d ms\n", i);
 				return;
 			}
-			msleep(1);
+			mdelay(1);
 		}
 		mcde_wfld(MCDE_CRC, POWEREN, true);
 		break;
@@ -1816,7 +1816,7 @@ static void enable_channel(struct mcde_chnl_state *chnl)
 					"Flow (C2) enable after >= %d ms\n", i);
 				return;
 			}
-			msleep(1);
+			mdelay(1);
 		}
 		mcde_wfld(MCDE_CRC, POWEREN, true);
 		break;
-- 
cgit v1.2.3


From bfe8b9927a93f310bebecaadce4f7e71993b1e54 Mon Sep 17 00:00:00 2001
From: Per Persson <per.xb.persson@stericsson.com>
Date: Wed, 31 Aug 2011 15:20:04 +0200
Subject: video: hdmi: Change data type

HDMI data type exposed to user space is changed from u8 to __u8.

ST-Ericsson ID: 358681
ST-Ericsson Linux next: Not tested, ER 282779
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I09f20a57f1206b7392dfcd80ebaca8baf3c2a4a1
Signed-off-by: Per Persson <per.xb.persson@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/29840
Reviewed-by: QATOOLS
Reviewed-by: Anders BAUER <anders.bauer@stericsson.com>
Reviewed-by: QABUILD
Reviewed-by: QATEST
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
---
 include/video/hdmi.h | 78 ++++++++++++++++++++++++++--------------------------
 1 file changed, 39 insertions(+), 39 deletions(-)

diff --git a/include/video/hdmi.h b/include/video/hdmi.h
index 4ade6140e5b..55dcd003fcd 100644
--- a/include/video/hdmi.h
+++ b/include/video/hdmi.h
@@ -119,44 +119,44 @@ enum hdmi_hdcp_encr_type {
 };
 
 struct plug_detect {
-	u8 hdmi_detect_enable;
-	u8 on_time;
-	u8 hdmi_off_time;
+	__u8 hdmi_detect_enable;
+	__u8 on_time;
+	__u8 hdmi_off_time;
 };
 
 struct edid_read {
-	u8 address;
-	u8 block_nr;
-	u8 data_length;
-	u8 data[HDMI_EDID_DATA_SIZE];
+	__u8 address;
+	__u8 block_nr;
+	__u8 data_length;
+	__u8 data[HDMI_EDID_DATA_SIZE];
 };
 
 struct cec_rw  {
-	u8 src;
-	u8 dest;
-	u8 length;
-	u8 data[HDMI_CEC_SIZE];
+	__u8 src;
+	__u8 dest;
+	__u8 length;
+	__u8 data[HDMI_CEC_SIZE];
 };
 
 struct info_fr {
-	u8 type;
-	u8 ver;
-	u8 crc;
-	u8 length;
-	u8 data[HDMI_INFOFR_SIZE];
+	__u8 type;
+	__u8 ver;
+	__u8 crc;
+	__u8 length;
+	__u8 data[HDMI_INFOFR_SIZE];
 };
 
 struct hdcp_fuseaes {
-	u8 key[HDMI_FUSE_KEYSIZE];
-	u8 crc;
-	u8 result;
+	__u8 key[HDMI_FUSE_KEYSIZE];
+	__u8 crc;
+	__u8 result;
 };
 
 struct hdcp_loadaesall {
-	u8 key[HDMI_AES_KEYSIZE];
-	u8 ksv[HDMI_AES_KSVSIZE];
-	u8 crc32[HDMI_CRC32_SIZE];
-	u8 result;
+	__u8 key[HDMI_AES_KEYSIZE];
+	__u8 ksv[HDMI_AES_KSVSIZE];
+	__u8 crc32[HDMI_CRC32_SIZE];
+	__u8 result;
 };
 
 
@@ -165,11 +165,11 @@ struct hdcp_loadaesall {
  * When encr_type is 2 (request revoc list), the response is given by
  * resp_size is != 0 and resp containing the folllowing:
  *
- * u8[5]		Bksv from sink (not belonging to revocation list)
- * u8			Device count
+ * __u8[5]		Bksv from sink (not belonging to revocation list)
+ * __u8			Device count
  * Additional output if Nrofdevices > 0:
- * u8[5 * Nrofdevices]	Bksv per connected equipment
- * u8[20]			SHA signature
+ * __u8[5 * Nrofdevices]	Bksv per connected equipment
+ * __u8[20]			SHA signature
  *
  * Device count coding:
  *	0 = a simple receiver is connected
@@ -185,21 +185,21 @@ struct hdcp_loadaesall {
  *
  */
 struct hdcp_authencr {
-	u8 auth_type;
-	u8 encr_type;
-	u8 result;
-	u8 resp_size;
-	u8 resp[HDMI_HDCPAUTHRESP_SIZE];
+	__u8 auth_type;
+	__u8 encr_type;
+	__u8 result;
+	__u8 resp_size;
+	__u8 resp[HDMI_HDCPAUTHRESP_SIZE];
 };
 
 struct audio_cfg {
-	u8 if_format;
-	u8 i2s_entries;
-	u8 freq;
-	u8 word_length;
-	u8 format;
-	u8 if_mode;
-	u8 mute;
+	__u8 if_format;
+	__u8 i2s_entries;
+	__u8 freq;
+	__u8 word_length;
+	__u8 format;
+	__u8 if_mode;
+	__u8 mute;
 };
 
 #endif /* __HDMI__H__ */
-- 
cgit v1.2.3


From 9435688b6213585a942eeb98618eb989d76683cd Mon Sep 17 00:00:00 2001
From: Per Persson <per.xb.persson@stericsson.com>
Date: Fri, 2 Sep 2011 14:58:15 +0200
Subject: video: mcde: Fix probe of sub display

Allowed max level for v-display regulator is changed.
Error handling if failed to set voltage is changed.
Sub display now probes without errors.

ST-Ericsson ID: 359672
ST-Ericsson Linux next: Not tested, ER 282779
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: Id4ff5df39f7b06d964e4dc9534c5f1ea38a28544
Signed-off-by: Per Persson <per.xb.persson@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/30053
Reviewed-by: Anders BAUER <anders.bauer@stericsson.com>
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Reviewed-by: QATOOLS
Reviewed-by: QABUILD
---
 arch/arm/mach-ux500/board-mop500-mcde.c  |  4 ++--
 drivers/video/mcde/display-generic_dsi.c | 13 +++++++++----
 2 files changed, 11 insertions(+), 6 deletions(-)

diff --git a/arch/arm/mach-ux500/board-mop500-mcde.c b/arch/arm/mach-ux500/board-mop500-mcde.c
index b4a6147291f..d7104eb5050 100644
--- a/arch/arm/mach-ux500/board-mop500-mcde.c
+++ b/arch/arm/mach-ux500/board-mop500-mcde.c
@@ -132,7 +132,7 @@ static struct mcde_display_generic_platform_data generic_display0_pdata = {
 #ifdef CONFIG_REGULATOR
 	.regulator_id = "v-display",
 	.min_supply_voltage = 2500000, /* 2.5V */
-	.max_supply_voltage = 2700000 /* 2.7V */
+	.max_supply_voltage = 2800000 /* 2.8V */
 #endif
 };
 
@@ -194,7 +194,7 @@ static struct mcde_display_generic_platform_data generic_subdisplay_pdata = {
 #ifdef CONFIG_REGULATOR
 	.regulator_id = "v-display",
 	.min_supply_voltage = 2500000, /* 2.5V */
-	.max_supply_voltage = 2700000 /* 2.7V */
+	.max_supply_voltage = 2800000 /* 2.8V */
 #endif
 };
 
diff --git a/drivers/video/mcde/display-generic_dsi.c b/drivers/video/mcde/display-generic_dsi.c
index 6af7fb77fcd..5e3b38ccba1 100644
--- a/drivers/video/mcde/display-generic_dsi.c
+++ b/drivers/video/mcde/display-generic_dsi.c
@@ -174,13 +174,18 @@ static int __devinit generic_probe(struct mcde_display_device *dev)
 				pdata->regulator = NULL;
 				goto regulator_get_failed;
 			}
-			ret = regulator_set_voltage(pdata->regulator,
+
+			if (regulator_set_voltage(pdata->regulator,
 					pdata->min_supply_voltage,
-					pdata->max_supply_voltage);
-			if (ret < 0) {
+					pdata->max_supply_voltage) < 0) {
+				int volt;
+
 				dev_warn(&dev->dev,
-					"%s:Failed to set regulator '%s'\n",
+					"%s:Failed to set voltage '%s'\n",
 					__func__, pdata->regulator_id);
+				volt = regulator_get_voltage(pdata->regulator);
+				dev_warn(&dev->dev,
+					"Voltage:%d\n", volt);
 			}
 
 			/*
-- 
cgit v1.2.3


From 128664378b5ccedc1b7d448033c65ec0da55904e Mon Sep 17 00:00:00 2001
From: om prakash <omprakash.pal@stericsson.com>
Date: Tue, 6 Sep 2011 11:15:40 +0530
Subject: Dispdev: Removed the UNINIT error

Removed the UNINIT coverity error in dispdev

ST-Ericsson ID: 354434
ST-Ericsson FOSS-OUT ID: NA

Change-Id: I026591675dbe94f441b53ae0a6462258bc3ef51b
Signed-off-by: om prakash <omprakash.pal@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/30147
Reviewed-by: QABUILD
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
---
 drivers/misc/dispdev/dispdev.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/misc/dispdev/dispdev.c b/drivers/misc/dispdev/dispdev.c
index 76091c03478..a119ab6e3b1 100644
--- a/drivers/misc/dispdev/dispdev.c
+++ b/drivers/misc/dispdev/dispdev.c
@@ -532,7 +532,7 @@ int dispdev_create(struct mcde_display_device *ddev, bool overlay,
 	int ret = 0;
 	struct dispdev *dd;
 	struct mcde_video_mode vmode;
-	struct mcde_overlay_info info;
+	struct mcde_overlay_info info = {0};
 
 	static int counter;
 	char *name = "dispdev0";
-- 
cgit v1.2.3


From 9fcc22018b124af77b7a886473586a0ea4c8f9cd Mon Sep 17 00:00:00 2001
From: Jimmy Rubin <jimmy.rubin@stericsson.com>
Date: Mon, 12 Sep 2011 12:52:45 +0200
Subject: video: mcde: Correct DSI startup sequence

The VANA regulator and the dsi and dsi lp clocks must be
enabled before the DSI PLL is enabled.

ST-Ericsson ID: 343541
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: If7a4687d086b51b68be426e6eeaaffc6523a2dea
Signed-off-by: Jimmy Rubin <jimmy.rubin@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/31800
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
Reviewed-by: Jonas ABERG <jonas.aberg@stericsson.com>
---
 drivers/video/mcde/Kconfig   |  84 ++++++------
 drivers/video/mcde/mcde_hw.c | 313 +++++++++++--------------------------------
 include/video/mcde.h         |   5 -
 3 files changed, 123 insertions(+), 279 deletions(-)

diff --git a/drivers/video/mcde/Kconfig b/drivers/video/mcde/Kconfig
index 868e7aba764..94ce470c504 100644
--- a/drivers/video/mcde/Kconfig
+++ b/drivers/video/mcde/Kconfig
@@ -11,13 +11,57 @@ config FB_MCDE
 
 	  Please read the file <file:Documentation/fb/mcde.txt>
 
+config FB_MCDE_DEBUG
+	bool "MCDE debug messages"
+	depends on FB_MCDE
+	---help---
+	  Say Y here if you want the MCDE driver to output debug messages
+
+config FB_MCDE_VDEBUG
+	bool "MCDE verbose debug messages"
+	depends on FB_MCDE_DEBUG
+	---help---
+	  Say Y here if you want the MCDE driver to output more debug messages
+
+config MCDE_FB_AVOID_REALLOC
+	bool "MCDE early allocate framebuffer"
+	default n
+	depends on FB_MCDE
+	---help---
+	  If you say Y here maximum frame buffer size is allocated and
+	  used for all resolutions. If you say N here, the frame buffer is
+	  reallocated when resolution is changed. This reallocation might
+	  fail because of fragmented memory. Note that this memory will
+	  never be deallocated, while the MCDE framebuffer is used.
+
+config MCDE_DISPLAY_DSI
+	bool "Support for DSI displays within MCDE"
+	depends on FB_MCDE
+	default y
+
+menu "MCDE DSI displays"
+	depends on MCDE_DISPLAY_DSI
+
 config MCDE_DISPLAY_GENERIC_DSI
 	tristate "Generic DSI display driver"
-	depends on FB_MCDE
 
 config MCDE_DISPLAY_SONY_ACX424AKP_DSI
 	tristate "Sony acx424akp DSI display driver"
-	depends on FB_MCDE
+
+config MCDE_DISPLAY_AV8100
+	tristate "AV8100 HDMI/CVBS display driver"
+	select AV8100
+
+config MCDE_DISPLAY_HDMI_FB_AUTO_CREATE
+	bool "HDMI_FB_AUTO_CREATE"
+	default y
+	depends on MCDE_DISPLAY_AV8100
+	---help---
+	  Say Y if you want the HDMI frame buffer to be created on start
+	  Say N if you want the HDMI frame buffer to be created when HDMI
+	  cable is plugged (needs user space HDMIservice)
+
+endmenu
 
 config MCDE_DISPLAY_DPI
 	bool "Support for DPI displays within MCDE"
@@ -39,45 +83,9 @@ config MCDE_DISPLAY_VUIB500_DPI
 
 endmenu
 
-config MCDE_DISPLAY_AV8100
-	tristate "AV8100 HDMI/CVBS display driver"
-	depends on FB_MCDE
-	select AV8100
-
-config MCDE_DISPLAY_HDMI_FB_AUTO_CREATE
-	bool "HDMI_FB_AUTO_CREATE"
-	default y
-	depends on MCDE_DISPLAY_AV8100
-	---help---
-	  Say Y if you want the HDMI frame buffer to be created on start
-	  Say N if you want the HDMI frame buffer to be created when HDMI
-	  cable is plugged (needs user space HDMIservice)
-
 config MCDE_DISPLAY_AB8500_DENC
 	tristate "AB8500 CVBS display driver"
 	depends on FB_MCDE
 	select AB8500_DENC
 
-config FB_MCDE_DEBUG
-	bool "MCDE debug messages"
-	depends on FB_MCDE
-	---help---
-	  Say Y here if you want the MCDE driver to output debug messages
-
-config FB_MCDE_VDEBUG
-	bool "MCDE verbose debug messages"
-	depends on FB_MCDE_DEBUG
-	---help---
-	  Say Y here if you want the MCDE driver to output more debug messages
-
-config MCDE_FB_AVOID_REALLOC
-	bool "MCDE early allocate framebuffer"
-	default n
-	depends on FB_MCDE
-	---help---
-	  If you say Y here maximum frame buffer size is allocated and
-	  used for all resolutions. If you say N here, the frame buffer is
-	  reallocated when resolution is changed. This reallocation might
-	  fail because of fragmented memory. Note that this memory will
-	  never be deallocated, while the MCDE framebuffer is used.
 
diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index 64c704b40ef..141dcc211b4 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -63,11 +63,9 @@ static u8 num_overlays;
 static u8 hardware_version;
 static int mcde_irq;
 
-#ifdef CONFIG_REGULATOR
 static struct regulator *regulator_vana;
 static struct regulator *regulator_mcde_epod;
 static struct regulator *regulator_esram_epod;
-#endif
 static struct clk *clock_dpi;
 static struct clk *clock_dsi;
 static struct clk *clock_mcde;
@@ -75,8 +73,7 @@ static struct clk *clock_dsi_lp;
 static u8 mcde_is_enabled;
 static struct mutex mcde_hw_lock;
 static struct delayed_work hw_timeout_work;
-static u8 enable_dsi;
-static u8 dsi_is_enabled;
+static u8 dsi_pll_is_enabled;
 
 static u8 mcde_dynamic_power_management = true;
 
@@ -411,82 +408,33 @@ static inline void wait_while_dsi_running(int lnk)
 			"%s: DSI link %u read timeout!\n", __func__, lnk);
 }
 
-static int enable_clocks_and_power(struct platform_device *pdev)
+static void enable_clocks_and_power(struct platform_device *pdev)
 {
 	struct mcde_platform_data *pdata = pdev->dev.platform_data;
-	int ret = 0;
 
 	dev_vdbg(&mcde_dev->dev, "%s\n", __func__);
 
-#ifdef CONFIG_REGULATOR
-	if (regulator_mcde_epod) {
-		ret = regulator_enable(regulator_mcde_epod);
-		if (ret < 0) {
-			dev_warn(&pdev->dev, "%s: regulator_enable failed\n",
-			__func__);
-			return ret;
-		}
-	} else {
-		dev_warn(&pdev->dev, "%s: mcde_epod regulator is null\n"
-						, __func__);
-		return -EINVAL;
-	}
-#endif
-	pdata->platform_set_clocks();
-	if (enable_dsi > 0) {
-		pdata->platform_enable_dsipll();
-		dsi_is_enabled = true;
-	}
+	/* VANA should be enabled before a DSS hard reset */
+	if (regulator_vana)
+		WARN_ON_ONCE(regulator_enable(regulator_vana));
 
-	ret = clk_enable(clock_mcde);
-	if (ret < 0) {
-		dev_warn(&pdev->dev, "%s: "
-			"clk_enable mcde failed ret = %d\n", __func__, ret);
-		goto clk_mcde_err;
-	}
+	WARN_ON_ONCE(regulator_enable(regulator_mcde_epod));
 
-	return ret;
+	pdata->platform_set_clocks();
 
-clk_mcde_err:
-#ifdef CONFIG_REGULATOR
-	if (regulator_mcde_epod)
-		regulator_disable(regulator_mcde_epod);
-#endif
-	return ret;
+	WARN_ON_ONCE(clk_enable(clock_mcde));
 }
 
-static int disable_clocks_and_power(struct platform_device *pdev)
+static void disable_clocks_and_power(struct platform_device *pdev)
 {
-	struct mcde_platform_data *pdata = pdev->dev.platform_data;
-	int ret = 0;
-
 	dev_vdbg(&mcde_dev->dev, "%s\n", __func__);
 
 	clk_disable(clock_mcde);
-	if (enable_dsi > 0) {
-		pdata->platform_disable_dsipll();
-		dsi_is_enabled = false;
-	}
 
-#ifdef CONFIG_REGULATOR
-	if (regulator_mcde_epod) {
-		ret = regulator_disable(regulator_mcde_epod);
-		if (ret < 0) {
-			dev_warn(&pdev->dev, "%s: regulator_disable failed\n"
-					, __func__);
-			goto regulator_mcde_epod_err;
-		}
-	} else {
-		dev_warn(&pdev->dev, "%s: mcde_epod regulator is null\n"
-					, __func__);
-		goto regulator_mcde_epod_err;
-	}
-	return ret;
+	WARN_ON_ONCE(regulator_disable(regulator_mcde_epod));
 
-regulator_mcde_epod_err:
-	clk_enable(clock_mcde);
-#endif
-	return ret;
+	if (regulator_vana)
+		WARN_ON_ONCE(regulator_disable(regulator_vana));
 }
 
 static void update_mcde_registers(void)
@@ -561,29 +509,29 @@ static void update_mcde_registers(void)
 static void disable_formatter(struct mcde_port *port)
 {
 	if (port->type == MCDE_PORTTYPE_DSI) {
-		if (port->phy.dsi.clk_dsi)
-			clk_disable(port->phy.dsi.clk_dsi);
-		if (port->phy.dsi.clk_dsi_lp)
-			clk_disable(port->phy.dsi.clk_dsi_lp);
-		if (port->phy.dsi.reg_vana)
-			regulator_disable(port->phy.dsi.reg_vana);
-	}
-	if (port->type == MCDE_PORTTYPE_DPI) {
-		if (port->phy.dpi.clk_dpi)
-			clk_disable(port->phy.dpi.clk_dpi);
+		if (dsi_pll_is_enabled && (--dsi_pll_is_enabled == 0)) {
+			struct mcde_platform_data *pdata =
+				    mcde_dev->dev.platform_data;
+			dev_dbg(&mcde_dev->dev, "%s disable dsipll\n",
+								__func__);
+			pdata->platform_disable_dsipll();
+		}
+		clk_disable(clock_dsi);
+		clk_disable(clock_dsi_lp);
+	} else if (port->type == MCDE_PORTTYPE_DPI) {
+		clk_disable(clock_dpi);
 	}
 }
 
-static int disable_mcde_hw(bool force_disable)
+static void disable_mcde_hw(bool force_disable)
 {
 	int i;
-	int ret;
 	bool mcde_up = false;
 
 	dev_vdbg(&mcde_dev->dev, "%s\n", __func__);
 
 	if (!mcde_is_enabled)
-		return 0;
+		return;
 
 	for (i = 0; i < num_channels; i++) {
 		struct mcde_chnl_state *chnl = &channels[i];
@@ -598,13 +546,8 @@ static int disable_mcde_hw(bool force_disable)
 				chnl->formatter_updated = false;
 			}
 			if (chnl->esram_is_enabled) {
-				int ret;
-				ret = regulator_disable(chnl->port.reg_esram);
-				if (ret < 0) {
-					dev_warn(&mcde_dev->dev,
-						"%s: disable failed\n",
-								__func__);
-				}
+				WARN_ON_ONCE(regulator_disable(
+							regulator_esram_epod));
 				chnl->esram_is_enabled = false;
 			}
 		} else if (chnl->enabled && chnl->continous_running) {
@@ -613,7 +556,7 @@ static int disable_mcde_hw(bool force_disable)
 	}
 
 	if (mcde_up)
-		return 0;
+		return;
 
 	for (i = 0; i < num_channels; i++) {
 		struct mcde_chnl_state *chnl = &channels[i];
@@ -624,15 +567,9 @@ static int disable_mcde_hw(bool force_disable)
 
 	free_irq(mcde_irq, &mcde_dev->dev);
 
-	ret = disable_clocks_and_power(mcde_dev);
-	if (ret < 0) {
-		dev_dbg(&mcde_dev->dev,
-			"%s: disable_clocks_and_power failed\n"
-						, __func__);
-		return -EINVAL;
-	}
+	disable_clocks_and_power(mcde_dev);
+
 	mcde_is_enabled = false;
-	return 0;
 }
 
 static void dpi_video_mode_apply(struct mcde_chnl_state *chnl)
@@ -861,7 +798,7 @@ static u32 get_output_fifo_size(enum mcde_fifo fifo)
 		ret = MCDE_FIFO_C0C1_SIZE;
 		break;
 	default:
-		dev_vdbg(&mcde_dev->dev, "Unsupported fifo");
+		dev_warn(&mcde_dev->dev, "Unsupported fifo");
 		break;
 	}
 	return ret;
@@ -1232,34 +1169,23 @@ static int update_channel_static_registers(struct mcde_chnl_state *chnl)
 		u8 lnk = port->link;
 		int ret;
 
-		if (port->phy.dsi.reg_vana) {
-			ret = regulator_enable(port->phy.dsi.reg_vana);
-			if (ret < 0) {
-				dev_warn(&mcde_dev->dev,
-					"%s: regulator_enable failed\n",
-								__func__);
-				goto regulator_vana_err;
-			}
-		}
+		WARN_ON_ONCE(clk_enable(clock_dsi));
+		WARN_ON_ONCE(clk_enable(clock_dsi_lp));
 
-		if (port->phy.dsi.clk_dsi) {
-			ret = clk_enable(port->phy.dsi.clk_dsi);
-			if (ret < 0) {
-				dev_warn(&mcde_dev->dev, "%s: "
-					"clk_enable dsi failed ret = %d\n",
-								__func__, ret);
-				goto clk_dsi_err;
-			}
-		}
-		if (port->phy.dsi.clk_dsi_lp) {
-			ret = clk_enable(port->phy.dsi.clk_dsi_lp);
+		if (!dsi_pll_is_enabled) {
+			struct mcde_platform_data *pdata =
+					mcde_dev->dev.platform_data;
+			ret = pdata->platform_enable_dsipll();
 			if (ret < 0) {
 				dev_warn(&mcde_dev->dev, "%s: "
-					"clk_enable dsi_lp failed ret = %d\n",
+					"enable_dsipll failed ret = %d\n",
 								__func__, ret);
-				goto clk_dsi_lp_err;
+				goto enable_dsipll_err;
 			}
+			dev_dbg(&mcde_dev->dev, "%s enable dsipll\n",
+								__func__);
 		}
+		dsi_pll_is_enabled++;
 
 		if (hardware_version == MCDE_CHIP_VERSION_1_0_4 ||
 		    hardware_version == MCDE_CHIP_VERSION_4_0_4)
@@ -1360,16 +1286,7 @@ static int update_channel_static_registers(struct mcde_chnl_state *chnl)
 	}
 
 	if (port->type == MCDE_PORTTYPE_DPI) {
-		if (port->phy.dpi.clk_dpi) {
-			int ret;
-			ret = clk_enable(port->phy.dpi.clk_dpi);
-			if (ret < 0) {
-				dev_warn(&mcde_dev->dev, "%s: "
-					"clk_enable dsi_lp failed ret = %d\n",
-								__func__, ret);
-				goto clk_dpi_err;
-			}
-		}
+		WARN_ON_ONCE(clk_enable(clock_dpi));
 	}
 
 	mcde_wfld(MCDE_CR, MCDEEN, true);
@@ -1378,19 +1295,17 @@ static int update_channel_static_registers(struct mcde_chnl_state *chnl)
 	dev_vdbg(&mcde_dev->dev, "Static registers setup, chnl=%d\n", chnl->id);
 
 	return 0;
+
 dsi_link_error:
-	if (port->phy.dsi.clk_dsi_lp)
-		clk_disable(port->phy.dsi.clk_dsi_lp);
-clk_dsi_lp_err:
-	if (port->phy.dsi.clk_dsi)
-		clk_disable(port->phy.dsi.clk_dsi);
-clk_dsi_err:
-	if (port->phy.dsi.reg_vana) {
-		regulator_disable(port->phy.dsi.reg_vana);
-		chnl->port.phy.dsi.reg_vana = NULL;
+	if (dsi_pll_is_enabled && (--dsi_pll_is_enabled == 0)) {
+		struct mcde_platform_data *pdata =
+				mcde_dev->dev.platform_data;
+		dev_dbg(&mcde_dev->dev, "%s le:disable dsipll\n", __func__);
+		pdata->platform_disable_dsipll();
 	}
-regulator_vana_err:
-clk_dpi_err:
+enable_dsipll_err:
+	clk_disable(clock_dsi_lp);
+	clk_disable(clock_dsi);
 	return -EINVAL;
 }
 
@@ -2146,14 +2061,7 @@ static int enable_mcde_hw(void)
 	if (mcde_is_enabled)
 		return 0;
 
-	ret = enable_clocks_and_power(mcde_dev);
-	if (ret < 0) {
-		dev_dbg(&mcde_dev->dev,
-			"%s: Enable clocks and power failed\n"
-						, __func__);
-		cancel_delayed_work(&hw_timeout_work);
-		return -EINVAL;
-	}
+	enable_clocks_and_power(mcde_dev);
 
 	ret = request_irq(mcde_irq, mcde_irq_handler, 0, "mcde",
 							&mcde_dev->dev);
@@ -2576,33 +2484,11 @@ static struct mcde_chnl_state *_mcde_chnl_get(enum mcde_chnl chnl_id,
 	_mcde_chnl_apply(chnl);
 	chnl->reserved = true;
 
-	if (chnl->port.type == MCDE_PORTTYPE_DSI) {
-#ifdef CONFIG_REGULATOR
-		chnl->port.phy.dsi.reg_vana = regulator_vana;
-#else
-		chnl->port.phy.dsi.reg_vana = NULL;
-#endif
-		chnl->port.phy.dsi.clk_dsi = clock_dsi;
-		chnl->port.phy.dsi.clk_dsi_lp = clock_dsi_lp;
-		enable_dsi++;
-		if (!dsi_is_enabled && mcde_is_enabled) {
-			struct mcde_platform_data *pdata =
-					mcde_dev->dev.platform_data;
-			pdata->platform_enable_dsipll();
-			dsi_is_enabled = true;
-		}
-	} else if (chnl->port.type == MCDE_PORTTYPE_DPI) {
-		chnl->port.phy.dpi.clk_dpi = clock_dpi;
+	if (chnl->port.type == MCDE_PORTTYPE_DPI) {
 		if (chnl->port.phy.dpi.tv_mode)
 			chnl->vcmp_per_field = true;
 	}
 
-#ifdef CONFIG_REGULATOR
-	chnl->port.reg_esram = regulator_esram_epod;
-#else
-	chnl->port.reg_esram = NULL;
-#endif
-
 	return chnl;
 }
 
@@ -3015,11 +2901,7 @@ int mcde_chnl_update(struct mcde_chnl_state *chnl,
 		(void)update_channel_static_registers(chnl);
 
 	if (chnl->regs.roten && !chnl->esram_is_enabled) {
-		ret = regulator_enable(chnl->port.reg_esram);
-		if (ret < 0) {
-			dev_warn(&mcde_dev->dev, "%s: disable failed\n",
-			__func__);
-		}
+		WARN_ON_ONCE(regulator_enable(regulator_esram_epod));
 		chnl->esram_is_enabled = true;
 	}
 
@@ -3037,20 +2919,7 @@ void mcde_chnl_put(struct mcde_chnl_state *chnl)
 	dev_vdbg(&mcde_dev->dev, "%s\n", __func__);
 
 	chnl->reserved = false;
-	chnl->port.reg_esram = NULL;
-	if (chnl->port.type == MCDE_PORTTYPE_DSI) {
-		chnl->port.phy.dsi.reg_vana = NULL;
-		chnl->port.phy.dsi.clk_dsi = NULL;
-		chnl->port.phy.dsi.clk_dsi_lp = NULL;
-		enable_dsi--;
-		if (dsi_is_enabled && enable_dsi == 0) {
-			struct mcde_platform_data *pdata =
-					mcde_dev->dev.platform_data;
-			pdata->platform_disable_dsipll();
-			dsi_is_enabled = false;
-		}
-	} else if (chnl->port.type == MCDE_PORTTYPE_DPI) {
-		chnl->port.phy.dpi.clk_dpi = NULL;
+	if (chnl->port.type == MCDE_PORTTYPE_DPI) {
 		if (chnl->port.phy.dpi.tv_mode) {
 			chnl->vcmp_per_field = false;
 			chnl->even_vcmp = false;
@@ -3100,12 +2969,7 @@ void mcde_chnl_disable(struct mcde_chnl_state *chnl)
 		chnl->formatter_updated = false;
 	}
 	if (chnl->esram_is_enabled) {
-		int ret;
-		ret = regulator_disable(chnl->port.reg_esram);
-		if (ret < 0) {
-			dev_warn(&mcde_dev->dev, "%s: disable failed\n",
-			__func__);
-		}
+		WARN_ON_ONCE(regulator_disable(regulator_esram_epod));
 		chnl->esram_is_enabled = false;
 	}
 	del_timer(&chnl->dsi_te_timer);
@@ -3114,7 +2978,7 @@ void mcde_chnl_disable(struct mcde_chnl_state *chnl)
 	 * Check if other channels can be disabled and
 	 * if the hardware can be shutdown
 	 */
-	(void)disable_mcde_hw(false);
+	disable_mcde_hw(false);
 	mutex_unlock(&mcde_hw_lock);
 
 	dev_vdbg(&mcde_dev->dev, "%s exit\n", __func__);
@@ -3310,7 +3174,6 @@ static int init_clocks_and_power(struct platform_device *pdev)
 	int ret = 0;
 	struct mcde_platform_data *pdata = pdev->dev.platform_data;
 
-#ifdef CONFIG_REGULATOR
 	if (pdata->regulator_mcde_epod_id) {
 		regulator_mcde_epod = regulator_get(&pdev->dev,
 				pdata->regulator_mcde_epod_id);
@@ -3323,7 +3186,7 @@ static int init_clocks_and_power(struct platform_device *pdev)
 			return ret;
 		}
 	} else {
-		dev_dbg(&pdev->dev, "%s: No regulator id supplied\n",
+		dev_warn(&pdev->dev, "%s: No mcde regulator id supplied\n",
 								__func__);
 		return -EINVAL;
 	}
@@ -3340,7 +3203,7 @@ static int init_clocks_and_power(struct platform_device *pdev)
 			goto regulator_esram_err;
 		}
 	} else {
-		dev_dbg(&pdev->dev, "%s: No regulator id supplied\n",
+		dev_warn(&pdev->dev, "%s: No esram regulator id supplied\n",
 								__func__);
 	}
 
@@ -3356,34 +3219,28 @@ static int init_clocks_and_power(struct platform_device *pdev)
 			goto regulator_vana_err;
 		}
 	} else {
-		dev_dbg(&pdev->dev, "%s: No regulator id supplied\n",
+		dev_dbg(&pdev->dev, "%s: No vana regulator id supplied\n",
 								__func__);
 	}
-#endif
 
+    /*
+     * DSI, DSI LP and DPI clocks are not necessary to get
+     * There can be platforms that not have DSI, DPI support
+    */
 	clock_dsi = clk_get(&pdev->dev, pdata->clock_dsi_id);
-	if (IS_ERR(clock_dsi)) {
-		ret = PTR_ERR(clock_dsi);
-		dev_warn(&pdev->dev, "%s: Failed to get clock '%s'\n",
+	if (IS_ERR(clock_dsi))
+		dev_dbg(&pdev->dev, "%s: Failed to get clock '%s'\n",
 					__func__, pdata->clock_dsi_id);
-		goto clk_dsi_err;
-	}
 
 	clock_dsi_lp = clk_get(&pdev->dev, pdata->clock_dsi_lp_id);
-	if (IS_ERR(clock_dsi_lp)) {
-		ret = PTR_ERR(clock_dsi_lp);
-		dev_warn(&pdev->dev, "%s: Failed to get clock '%s'\n",
+	if (IS_ERR(clock_dsi_lp))
+		dev_dbg(&pdev->dev, "%s: Failed to get clock '%s'\n",
 					__func__, pdata->clock_dsi_lp_id);
-		goto clk_dsi_lp_err;
-	}
 
 	clock_dpi = clk_get(&pdev->dev, pdata->clock_dpi_id);
-	if (IS_ERR(clock_dpi)) {
-		ret = PTR_ERR(clock_dpi);
-		dev_warn(&pdev->dev, "%s: Failed to get clock '%s'\n",
+	if (IS_ERR(clock_dpi))
+		dev_dbg(&pdev->dev, "%s: Failed to get clock '%s'\n",
 					__func__, pdata->clock_dpi_id);
-		goto clk_dpi_err;
-	}
 
 	clock_mcde = clk_get(&pdev->dev, pdata->clock_mcde_id);
 	if (IS_ERR(clock_mcde)) {
@@ -3397,21 +3254,16 @@ static int init_clocks_and_power(struct platform_device *pdev)
 
 clk_mcde_err:
 	clk_put(clock_dpi);
-clk_dpi_err:
 	clk_put(clock_dsi_lp);
-clk_dsi_lp_err:
 	clk_put(clock_dsi);
-clk_dsi_err:
-#ifdef CONFIG_REGULATOR
+
 	if (regulator_vana)
 		regulator_put(regulator_vana);
 regulator_vana_err:
 	if (regulator_esram_epod)
 		regulator_put(regulator_esram_epod);
 regulator_esram_err:
-	if (regulator_mcde_epod)
-		regulator_put(regulator_mcde_epod);
-#endif
+	regulator_put(regulator_mcde_epod);
 	return ret;
 }
 
@@ -3423,14 +3275,10 @@ static void remove_clocks_and_power(struct platform_device *pdev)
 	clk_put(clock_dsi_lp);
 	clk_put(clock_dsi);
 	clk_put(clock_mcde);
-#ifdef CONFIG_REGULATOR
 	if (regulator_vana)
 		regulator_put(regulator_vana);
-	if (regulator_mcde_epod)
-		regulator_put(regulator_mcde_epod);
-	if (regulator_esram_epod)
-		regulator_put(regulator_esram_epod);
-#endif
+	regulator_put(regulator_mcde_epod);
+	regulator_put(regulator_esram_epod);
 }
 
 static int __devinit mcde_probe(struct platform_device *pdev)
@@ -3523,13 +3371,7 @@ static int __devinit mcde_probe(struct platform_device *pdev)
 
 	INIT_DELAYED_WORK_DEFERRABLE(&hw_timeout_work, work_sleep_function);
 
-	ret = enable_clocks_and_power(mcde_dev);
-	if (ret < 0) {
-		dev_dbg(&mcde_dev->dev,
-			"%s: Enable clocks and power failed\n"
-						, __func__);
-		goto failed_enable_clocks;
-	}
+	enable_clocks_and_power(mcde_dev);
 
 	update_mcde_registers();
 	mcde_is_enabled = true;
@@ -3624,7 +3466,6 @@ static int __devinit mcde_probe(struct platform_device *pdev)
 failed_request_irq:
 failed_hardware_version:
 	disable_mcde_hw(true);
-failed_enable_clocks:
 	remove_clocks_and_power(pdev);
 failed_init_clocks:
 failed_map_dsi_io:
@@ -3700,7 +3541,7 @@ static int mcde_suspend(struct platform_device *pdev, pm_message_t state)
 		mutex_unlock(&mcde_hw_lock);
 		return 0;
 	}
-	(void)disable_mcde_hw(true);
+	disable_mcde_hw(true);
 
 	mutex_unlock(&mcde_hw_lock);
 
diff --git a/include/video/mcde.h b/include/video/mcde.h
index 220ac167b0b..6f6632405d8 100644
--- a/include/video/mcde.h
+++ b/include/video/mcde.h
@@ -172,16 +172,12 @@ struct mcde_port {
 	enum mcde_sync_src sync_src;
 	bool update_auto_trig;
 	enum mcde_hdmi_sdtv_switch hdmi_sdtv_switch;
-	struct regulator *reg_esram;
 	union {
 		struct {
 			u8 virt_id;
 			u8 num_data_lanes;
 			u8 ui;
 			bool clk_cont;
-			struct clk *clk_dsi;
-			struct clk *clk_dsi_lp;
-			struct regulator *reg_vana;
 
 			/* DSI data lanes are swapped if true */
 			bool data_lanes_swap;
@@ -191,7 +187,6 @@ struct mcde_port {
 			bool tv_mode;
 			u16 clock_div; /* use 0 or 1 for no clock divider */
 			u32 polarity;    /* see DPI_ACT_LOW_* definitions */
-			struct clk *clk_dpi;
 		} dpi;
 	} phy;
 };
-- 
cgit v1.2.3


From 5a91f5aaae1a7e1864cff7ab41a2da2811de1f93 Mon Sep 17 00:00:00 2001
From: Philippe Langlais <philippe.langlais@stericsson.com>
Date: Mon, 17 Oct 2011 11:25:27 +0200
Subject: arm: ux500: video: Configure dsi clocks and regulators

Removes dsi clock, dsi lp clock and VANA regulator if MCDE_DISPLAY_DSI
is not set.

Adds return value for enable_dsi_pll.

Signed-off-by: Jimmy Rubin <jimmy.rubin@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/31801
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
Reviewed-by: Jonas ABERG <jonas.aberg@stericsson.com>
---
 arch/arm/mach-ux500/Kconfig-arch | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/mach-ux500/Kconfig-arch b/arch/arm/mach-ux500/Kconfig-arch
index 013c76d8e74..a3ea7ad3d78 100644
--- a/arch/arm/mach-ux500/Kconfig-arch
+++ b/arch/arm/mach-ux500/Kconfig-arch
@@ -13,6 +13,7 @@ menu "Display selection"
 config DISPLAY_GENERIC_PRIMARY
 	bool "Generic primary display support"
 	depends on (MACH_U8500 || MACH_U5500)
+	select MCDE_DISPLAY_DSI
 	default y
 
 choice
@@ -98,6 +99,7 @@ config DISPLAY_GENERIC_DSI_PRIMARY_AUTO_SYNC
 config DISPLAY_SONY_ACX424AKP_DSI_PRIMARY
 	bool "Sony acx424akp DSI display"
 	select MCDE_DISPLAY_SONY_ACX424AKP_DSI
+	select MCDE_DISPLAY_DSI
 	help
 	  Say yes here when using a sony acx424akp DSI display
 
@@ -105,6 +107,7 @@ config DISPLAY_GENERIC_DSI_SECONDARY
 	bool "Sub display support"
 	depends on MACH_U8500
 	select MCDE_DISPLAY_GENERIC_DSI
+	select MCDE_DISPLAY_DSI
 	help
 	  Say yes here if sub display exists
 
@@ -131,6 +134,7 @@ config DISPLAY_AV8100_TERTIARY
 	bool "AV8100 HDMI/CVBS display support"
 	depends on (MACH_U8500 || MACH_U5500)
 	select MCDE_DISPLAY_AV8100
+	select MCDE_DISPLAY_DSI
 	help
 	  Say yes here if HDMI output support
 
-- 
cgit v1.2.3


From 60e61b3b82d5d81e0413b313aaf8c54c3be77d1e Mon Sep 17 00:00:00 2001
From: Jimmy Rubin <jimmy.rubin@stericsson.com>
Date: Fri, 16 Sep 2011 14:38:52 +0200
Subject: video: mcde: Add channel states

Replace MCDE transactionids with a per channel state to guard against
concurrent access to MCDE HW.

ST-Ericsson ID: 358524
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I827009d8113675cb5cc388ed41f9239fce3bf43f
Signed-off-by: Jimmy Rubin <jimmy.rubin@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/31802
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
---
 drivers/video/mcde/mcde_hw.c | 1244 ++++++++++++++++++++----------------------
 1 file changed, 590 insertions(+), 654 deletions(-)

diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index 141dcc211b4..5cdf4be73a6 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -30,21 +30,50 @@
 #include "dsilink_regs.h"
 #include "mcde_regs.h"
 
-static void disable_channel(struct mcde_chnl_state *chnl);
+
+/* MCDE channel states
+ *
+ * Allowed state transitions:
+ *   IDLE <-> SUSPEND
+ *   IDLE <-> DSI_READ
+ *   IDLE <-> DSI_WRITE
+ *   IDLE -> SETUP -> (WAIT_TE ->) RUNNING -> STOPPING1 -> STOPPING2 -> IDLE
+ *   WAIT_TE -> STOPPED (for missing TE to allow re-enable)
+ */
+enum chnl_state {
+	CHNLSTATE_SUSPEND,   /* HW in suspended mode, initial state */
+	CHNLSTATE_IDLE,      /* Channel aquired, but not running, FLOEN==0 */
+	CHNLSTATE_DSI_READ,  /* Executing DSI read */
+	CHNLSTATE_DSI_WRITE, /* Executing DSI write */
+	CHNLSTATE_SETUP,     /* Channel register setup to prepare for running */
+	CHNLSTATE_WAIT_TE,   /* Waiting for BTA or external TE */
+	CHNLSTATE_RUNNING,   /* Update started, FLOEN=1, FLOEN==1 */
+	CHNLSTATE_STOPPING,  /* Stopping, FLOEN=0, FLOEN==1, awaiting VCMP */
+	CHNLSTATE_STOPPED,   /* Stopped, after VCMP, FLOEN==0|1 */
+};
+
+static int set_channel_state_atomic(struct mcde_chnl_state *chnl,
+							enum chnl_state state);
+static int set_channel_state_sync(struct mcde_chnl_state *chnl,
+							enum chnl_state state);
+static void stop_channel(struct mcde_chnl_state *chnl);
 static void watchdog_auto_sync_timer_function(unsigned long arg);
 static int _mcde_chnl_enable(struct mcde_chnl_state *chnl);
 static int _mcde_chnl_apply(struct mcde_chnl_state *chnl);
 static void disable_flow(struct mcde_chnl_state *chnl);
-static void enable_channel(struct mcde_chnl_state *chnl);
+static void enable_flow(struct mcde_chnl_state *chnl);
 static void do_softwaretrig(struct mcde_chnl_state *chnl);
-static int is_channel_enabled(struct mcde_chnl_state *chnl);
 static void dsi_te_poll_req(struct mcde_chnl_state *chnl);
 static void dsi_te_poll_set_timer(struct mcde_chnl_state *chnl,
 		unsigned int timeout);
 static void dsi_te_timer_function(unsigned long value);
+static int wait_for_vcmp(struct mcde_chnl_state *chnl);
+static void probe_hw(void);
+static void wait_for_flow_disabled(struct mcde_chnl_state *chnl);
 
 #define OVLY_TIMEOUT 100
 #define CHNL_TIMEOUT 100
+#define FLOW_STOP_TIMEOUT 20
 #define SCREEN_PPL_HIGH 1920
 #define SCREEN_PPL_CEA2 720
 #define SCREEN_LPF_CEA2 480
@@ -53,6 +82,10 @@ static void dsi_te_timer_function(unsigned long value);
 #define MCDE_SLEEP_WATCHDOG 500
 #define DSI_TE_NO_ANSWER_TIMEOUT_INIT 2500
 #define DSI_TE_NO_ANSWER_TIMEOUT 250
+#define DSI_READ_TIMEOUT 200
+#define DSI_WRITE_CMD_TIMEOUT 1000
+#define DSI_READ_DELAY 5
+#define MCDE_FLOWEN_MAX_TRIAL 60
 
 static u8 *mcdeio;
 static u8 **dsiio;
@@ -71,10 +104,30 @@ static struct clk *clock_dsi;
 static struct clk *clock_mcde;
 static struct clk *clock_dsi_lp;
 static u8 mcde_is_enabled;
-static struct mutex mcde_hw_lock;
 static struct delayed_work hw_timeout_work;
 static u8 dsi_pll_is_enabled;
 
+static struct mutex mcde_hw_lock;
+static inline void mcde_lock(const char *func, int line)
+{
+	mutex_lock(&mcde_hw_lock);
+	dev_vdbg(&mcde_dev->dev, "Enter MCDE: %s:%d\n", func, line);
+}
+
+static inline void mcde_unlock(const char *func, int line)
+{
+	dev_vdbg(&mcde_dev->dev, "Exit MCDE: %s:%d\n", func, line);
+	mutex_unlock(&mcde_hw_lock);
+}
+
+static inline bool mcde_trylock(const char *func, int line)
+{
+	bool locked = mutex_trylock(&mcde_hw_lock) == 1;
+	if (locked)
+		dev_vdbg(&mcde_dev->dev, "Enter MCDE: %s:%d\n", func, line);
+	return locked;
+}
+
 static u8 mcde_dynamic_power_management = true;
 
 static inline u32 dsi_rreg(int i, u32 reg)
@@ -85,13 +138,22 @@ static inline void dsi_wreg(int i, u32 reg, u32 val)
 {
 	writel(val, dsiio[i] + reg);
 }
+
 #define dsi_rfld(__i, __reg, __fld) \
-	((dsi_rreg(__i, __reg) & __reg##_##__fld##_MASK) >> \
-		__reg##_##__fld##_SHIFT)
+({ \
+	const u32 mask = __reg##_##__fld##_MASK; \
+	const u32 shift = __reg##_##__fld##_SHIFT; \
+	((dsi_rreg(__i, __reg) & mask) >> shift); \
+})
+
 #define dsi_wfld(__i, __reg, __fld, __val) \
-	dsi_wreg(__i, __reg, (dsi_rreg(__i, __reg) & \
-	~__reg##_##__fld##_MASK) | (((__val) << __reg##_##__fld##_SHIFT) & \
-		 __reg##_##__fld##_MASK))
+({ \
+	const u32 mask = __reg##_##__fld##_MASK; \
+	const u32 shift = __reg##_##__fld##_SHIFT; \
+	const u32 oldval = dsi_rreg(__i, __reg); \
+	const u32 newval = ((__val) << shift); \
+	dsi_wreg(__i, __reg, (oldval & ~mask) | (newval & mask)); \
+})
 
 static inline u32 mcde_rreg(u32 reg)
 {
@@ -101,23 +163,32 @@ static inline void mcde_wreg(u32 reg, u32 val)
 {
 	writel(val, mcdeio + reg);
 }
-#define mcde_wreg_fld(__reg, __fld_mask, __fld_shift, __val) \
-	mcde_wreg(__reg, (mcde_rreg(__reg) & ~(__fld_mask)) |\
-			(((__val) << (__fld_shift)) & (__fld_mask)))
+
 
 #define mcde_rfld(__reg, __fld) \
-	((mcde_rreg(__reg) & __reg##_##__fld##_MASK) >> \
-		__reg##_##__fld##_SHIFT)
+({ \
+	const u32 mask = __reg##_##__fld##_MASK; \
+	const u32 shift = __reg##_##__fld##_SHIFT; \
+	((mcde_rreg(__reg) & mask) >> shift); \
+})
+
 #define mcde_wfld(__reg, __fld, __val) \
-	mcde_wreg_fld(__reg, __reg##_##__fld##_MASK,\
-						__reg##_##__fld##_SHIFT, __val)
+({ \
+	const u32 mask = __reg##_##__fld##_MASK; \
+	const u32 shift = __reg##_##__fld##_SHIFT; \
+	const u32 oldval = mcde_rreg(__reg); \
+	const u32 newval = ((__val) << shift); \
+	mcde_wreg(__reg, (oldval & ~mask) | (newval & mask)); \
+})
 
 struct ovly_regs {
-	u8   ch_id;
 	bool enabled;
+	bool dirty;
+	bool dirty_buf;
+
+	u8   ch_id;
 	u32  baseaddress0;
 	u32  baseaddress1;
-	bool update;
 	u8   bits_per_pixel;
 	u8   bpp;
 	bool bgr;
@@ -138,9 +209,10 @@ struct ovly_regs {
 
 struct mcde_ovly_state {
 	bool inuse;
-	bool update;
 	u8 idx; /* MCDE overlay index */
 	struct mcde_chnl_state *chnl; /* Owner channel */
+	bool dirty;
+	bool dirty_buf;
 
 	/* Staged settings */
 	u32 paddr;
@@ -165,6 +237,8 @@ struct mcde_ovly_state {
 static struct mcde_ovly_state *overlays;
 
 struct chnl_regs {
+	bool dirty;
+
 	bool floen;
 	u16  x;
 	u16  y;
@@ -183,8 +257,8 @@ struct chnl_regs {
 	bool synchronized_update;
 	bool roten;
 	u8   rotdir;
-	u32  rotbuf1; /* TODO: Replace with eSRAM alloc */
-	u32  rotbuf2; /* TODO: Replace with eSRAM alloc */
+	u32  rotbuf1;
+	u32  rotbuf2;
 
 	/* Blending */
 	u8 blend_ctrl;
@@ -196,6 +270,8 @@ struct chnl_regs {
 };
 
 struct col_regs {
+	bool dirty;
+
 	u16 y_red;
 	u16 y_green;
 	u16 y_blue;
@@ -211,6 +287,8 @@ struct col_regs {
 };
 
 struct tv_regs {
+	bool dirty;
+
 	u16 dho; /* TV mode: left border width; destination horizontal offset */
 		 /* LCD MODE: horizontal back porch */
 	u16 alw; /* TV mode: right border width */
@@ -243,10 +321,11 @@ struct mcde_chnl_state {
 	struct mcde_ovly_state *ovly0;
 	struct mcde_ovly_state *ovly1;
 	const struct chnl_config *cfg;
-	u32 transactionid;
-	u32 transactionid_regs;
-	u32 transactionid_hw;
-	wait_queue_head_t waitq_hw; /* Waitq for transactionid_hw */
+	enum chnl_state state;
+	wait_queue_head_t state_waitq;
+	wait_queue_head_t vcmp_waitq;
+	atomic_t vcmp_cnt;
+
 	/* Used as watchdog timer for auto sync feature */
 	struct timer_list auto_sync_timer;
 	struct timer_list dsi_te_timer;
@@ -282,8 +361,6 @@ struct mcde_chnl_state {
 	bool vcmp_per_field;
 	bool even_vcmp;
 
-	bool continous_running;
-	bool disable_software_trig;
 	bool formatter_updated;
 	bool esram_is_enabled;
 };
@@ -388,9 +465,6 @@ static /* TODO: const, compiler bug? */ struct chnl_config chnl_configs[] = {
 	  .fabmux = true, .fabmux_set = true },
 };
 
-#define DSI_READ_TIMEOUT 10
-#define DSI_READ_DELAY 100
-
 /*
  * Wait for CSM_RUNNING, all data sent for display
  */
@@ -403,6 +477,7 @@ static inline void wait_while_dsi_running(int lnk)
 			, __func__, lnk, (DSI_READ_TIMEOUT - counter));
 		udelay(DSI_READ_DELAY);
 	}
+	WARN_ON(!counter);
 	if (!counter)
 		dev_warn(&mcde_dev->dev,
 			"%s: DSI link %u read timeout!\n", __func__, lnk);
@@ -446,7 +521,6 @@ static void update_mcde_registers(void)
 		mcde_wreg(MCDE_CONF0,
 			MCDE_CONF0_IFIFOCTRLWTRMRKLVL(7));
 
-		mcde_wfld(MCDE_RISOVL, OVLFDRIS, 1);
 		mcde_wfld(MCDE_RISPP, VCMPARIS, 1);
 		mcde_wfld(MCDE_RISPP, VCMPBRIS, 1);
 
@@ -465,7 +539,6 @@ static void update_mcde_registers(void)
 			MCDE_CONF0_OUTMUX4(pdata->outmux[4]) |
 			pdata->syncmux);
 
-		mcde_wfld(MCDE_RISOVL, OVLFDRIS, 1);
 		mcde_wfld(MCDE_RISPP, VCMPARIS, 1);
 		mcde_wfld(MCDE_RISPP, VCMPBRIS, 1);
 		mcde_wfld(MCDE_RISPP, VCMPC0RIS, 1);
@@ -477,22 +550,10 @@ static void update_mcde_registers(void)
 			MCDE_IMSCPP_VCMPBIM(true) |
 			MCDE_IMSCPP_VCMPC0IM(true) |
 			MCDE_IMSCPP_VCMPC1IM(true));
-#ifdef DEBUG
-		/* Enable error interrupts */
-		mcde_wreg(MCDE_IMSCERR,
-			MCDE_IMSCERR_SCHBLCKDIM(true) |
-			MCDE_IMSCERR_OVLFERRIM_MASK |
-			MCDE_IMSCERR_FUAIM(true) |
-			MCDE_IMSCERR_FUBIM(true) |
-			MCDE_IMSCERR_FUC0IM(true) |
-			MCDE_IMSCERR_FUC1IM(true));
-		/* Enable channel abort interrupts */
-		mcde_wreg(MCDE_IMSCCHNL, MCDE_IMSCCHNL_CHNLAIM(0xf));
-#endif
 	}
 
-	/* Enable overlay fetch done interrupts */
-	mcde_wfld(MCDE_IMSCOVL, OVLFDIM, 0x3f);
+	mcde_wreg(MCDE_IMSCCHNL, MCDE_IMSCCHNL_CHNLAIM(0xf));
+	mcde_wreg(MCDE_IMSCERR, 0xFFFF01FF);
 
 	/* Setup sync pulse length
 	 * Setting VSPMAX=0 disables the filter and VSYNC
@@ -509,6 +570,7 @@ static void update_mcde_registers(void)
 static void disable_formatter(struct mcde_port *port)
 {
 	if (port->type == MCDE_PORTTYPE_DSI) {
+		wait_while_dsi_running(port->link);
 		if (dsi_pll_is_enabled && (--dsi_pll_is_enabled == 0)) {
 			struct mcde_platform_data *pdata =
 				    mcde_dev->dev.platform_data;
@@ -535,11 +597,10 @@ static void disable_mcde_hw(bool force_disable)
 
 	for (i = 0; i < num_channels; i++) {
 		struct mcde_chnl_state *chnl = &channels[i];
-		if (force_disable ||
-			(chnl->enabled && !chnl->continous_running)) {
-			disable_channel(chnl);
-			if (chnl->port.type == MCDE_PORTTYPE_DSI)
-				wait_while_dsi_running(chnl->port.link);
+		if (force_disable || (chnl->enabled &&
+					chnl->state != CHNLSTATE_RUNNING)) {
+			stop_channel(chnl);
+			set_channel_state_sync(chnl, CHNLSTATE_SUSPEND);
 
 			if (chnl->formatter_updated) {
 				disable_formatter(&chnl->port);
@@ -550,7 +611,7 @@ static void disable_mcde_hw(bool force_disable)
 							regulator_esram_epod));
 				chnl->esram_is_enabled = false;
 			}
-		} else if (chnl->enabled && chnl->continous_running) {
+		} else if (chnl->enabled && chnl->state == CHNLSTATE_RUNNING) {
 			mcde_up = true;
 		}
 	}
@@ -558,13 +619,6 @@ static void disable_mcde_hw(bool force_disable)
 	if (mcde_up)
 		return;
 
-	for (i = 0; i < num_channels; i++) {
-		struct mcde_chnl_state *chnl = &channels[i];
-		chnl->formatter_updated = false;
-		del_timer(&chnl->dsi_te_timer);
-		del_timer(&chnl->auto_sync_timer);
-	}
-
 	free_irq(mcde_irq, &mcde_dev->dev);
 
 	disable_clocks_and_power(mcde_dev);
@@ -626,6 +680,7 @@ static void dpi_video_mode_apply(struct mcde_chnl_state *chnl)
 		chnl->tv_regs.lcdtim1 |= MCDE_LCDTIM1A_IPC(
 				(polarity & DPI_ACT_ON_FALLING_EDGE) != 0);
 	}
+	chnl->tv_regs.dirty = true;
 }
 
 static void update_dpi_registers(enum mcde_chnl chnl_id, struct tv_regs *regs)
@@ -682,6 +737,7 @@ static void update_dpi_registers(enum mcde_chnl chnl_id, struct tv_regs *regs)
 	if (!regs->sel_mode_tv)
 		mcde_wreg(MCDE_LCDTIM1A + idx * MCDE_LCDTIM1A_GROUPOFFSET,
 								regs->lcdtim1);
+	regs->dirty = false;
 }
 
 static void update_col_registers(enum mcde_chnl chnl_id, struct col_regs *regs)
@@ -707,6 +763,7 @@ static void update_col_registers(enum mcde_chnl chnl_id, struct col_regs *regs)
 	mcde_wreg(MCDE_RGBCONV6A + idx * MCDE_RGBCONV6A_GROUPOFFSET,
 				MCDE_RGBCONV6A_OFF_GREEN(regs->off_y) |
 				MCDE_RGBCONV6A_OFF_BLUE(regs->off_cb));
+	regs->dirty = false;
 }
 
 /* MCDE internal helpers */
@@ -838,27 +895,20 @@ static struct mcde_chnl_state *find_channel_by_dsilink(int link)
 	return NULL;
 }
 
-static inline void mcde_handle_vcmp(struct mcde_chnl_state *chnl, u32 int_fld)
+static inline void mcde_handle_vcmp(struct mcde_chnl_state *chnl)
 {
 	if (!chnl->vcmp_per_field ||
 			(chnl->vcmp_per_field && chnl->even_vcmp)) {
-		chnl->transactionid_hw = chnl->transactionid_regs;
-		wake_up(&chnl->waitq_hw);
+		atomic_inc(&chnl->vcmp_cnt);
+		if (chnl->state == CHNLSTATE_STOPPING)
+			set_channel_state_atomic(chnl, CHNLSTATE_STOPPED);
+		wake_up_all(&chnl->vcmp_waitq);
+
 		if (chnl->port.update_auto_trig &&
 				chnl->port.sync_src == MCDE_SYNCSRC_OFF &&
 				chnl->port.type == MCDE_PORTTYPE_DSI &&
-				chnl->continous_running) {
-			if (hardware_version == MCDE_CHIP_VERSION_3_0_8 ||
-				hardware_version == MCDE_CHIP_VERSION_4_0_4)
-				enable_channel(chnl);
-
-			mcde_wreg(MCDE_CHNL0SYNCHSW +
-				chnl->id * MCDE_CHNL0SYNCHSW_GROUPOFFSET,
-				MCDE_CHNL0SYNCHSW_SW_TRIG(true));
-
-			if (hardware_version == MCDE_CHIP_VERSION_3_0_8 ||
-				hardware_version == MCDE_CHIP_VERSION_4_0_4)
-				disable_flow(chnl);
+				chnl->state == CHNLSTATE_RUNNING) {
+			do_softwaretrig(chnl);
 			mod_timer(&chnl->auto_sync_timer,
 				jiffies +
 				msecs_to_jiffies(MCDE_AUTO_SYNC_WATCHDOG
@@ -866,106 +916,66 @@ static inline void mcde_handle_vcmp(struct mcde_chnl_state *chnl, u32 int_fld)
 		}
 	}
 	chnl->even_vcmp = !chnl->even_vcmp;
-	mcde_wreg_fld(MCDE_RISPP, 0x1 << int_fld, int_fld, 1);
-#ifdef DEBUG
-	if (chnl->ovly0 && mcde_rreg(MCDE_OVL0CR +
-				chnl->ovly0->idx * MCDE_OVL0CR_GROUPOFFSET) &
-				MCDE_OVL0CR_OVLB_MASK)
-		dev_warn(&mcde_dev->dev, "Overlay %d blocked\n",
-							chnl->ovly0->idx);
-	if (chnl->ovly1 && mcde_rreg(MCDE_OVL0CR +
-				chnl->ovly1->idx * MCDE_OVL0CR_GROUPOFFSET) &
-				MCDE_OVL0CR_OVLB_MASK)
-		dev_warn(&mcde_dev->dev, "Overlay %d blocked\n",
-							chnl->ovly1->idx);
-#endif
+}
+
+static void handle_dsi_irq(struct mcde_chnl_state *chnl, int i)
+{
+	u32 irq_status = dsi_rfld(i, DSI_DIRECT_CMD_STS_FLAG, TE_RECEIVED_FLAG);
+	if (irq_status) {
+		dsi_wreg(i, DSI_DIRECT_CMD_STS_CLR,
+				DSI_DIRECT_CMD_STS_CLR_TE_RECEIVED_CLR(true));
+		dev_vdbg(&mcde_dev->dev, "BTA TE DSI%d\n", i);
+		do_softwaretrig(chnl);
+	}
+
+	irq_status = dsi_rfld(i, DSI_CMD_MODE_STS_FLAG, ERR_NO_TE_FLAG);
+	if (irq_status) {
+		dsi_wreg(i, DSI_CMD_MODE_STS_CLR,
+			DSI_CMD_MODE_STS_CLR_ERR_NO_TE_CLR(true));
+		dev_warn(&mcde_dev->dev, "NO_TE DSI%d\n", i);
+		set_channel_state_atomic(chnl, CHNLSTATE_STOPPED);
+	}
+
+	irq_status = dsi_rfld(i, DSI_DIRECT_CMD_STS, TRIGGER_RECEIVED);
+	if (irq_status) {
+		/* DSI TE polling answer received */
+		dsi_wreg(i, DSI_DIRECT_CMD_STS_CLR,
+			DSI_DIRECT_CMD_STS_CLR_TRIGGER_RECEIVED_CLR(true));
+
+		/* Reset TE watchdog timer */
+		if (chnl->port.sync_src == MCDE_SYNCSRC_TE_POLLING)
+			dsi_te_poll_set_timer(chnl, DSI_TE_NO_ANSWER_TIMEOUT);
+	}
 }
 
 static irqreturn_t mcde_irq_handler(int irq, void *dev)
 {
 	int i;
 	u32 irq_status;
-#ifdef DEBUG
-	u32 irq_riserr_status;
-	u32 irq_rischnl_status;
 
-	irq_riserr_status = mcde_rreg(MCDE_RISERR);
-	irq_rischnl_status = mcde_rreg(MCDE_RISCHNL);
-#endif
-
-	/* Handle overlay irqs */
-	irq_status = mcde_rfld(MCDE_RISOVL, OVLFDRIS);
-	mcde_wfld(MCDE_RISOVL, OVLFDRIS, irq_status);
+	irq_status = mcde_rreg(MCDE_MISCHNL);
+	if (irq_status) {
+		dev_err(&mcde_dev->dev, "chnl error=%.8x\n", irq_status);
+		mcde_wreg(MCDE_RISCHNL, irq_status);
+	}
+	irq_status = mcde_rreg(MCDE_MISERR);
+	if (irq_status) {
+		dev_err(&mcde_dev->dev, "error=%.8x\n", irq_status);
+		mcde_wreg(MCDE_RISERR, irq_status);
+	}
 
 	/* Handle channel irqs */
 	irq_status = mcde_rreg(MCDE_RISPP);
-	if (irq_status & MCDE_RISPP_VCMPARIS_MASK) {
-		mcde_handle_vcmp(&channels[MCDE_CHNL_A],
-						MCDE_RISPP_VCMPARIS_SHIFT);
-#ifdef DEBUG
-		if (irq_riserr_status & MCDE_RISERR_FUARIS_MASK) {
-			dev_warn(&mcde_dev->dev, "FIFO A underflow\n");
-			mcde_wreg(MCDE_RISERR, MCDE_RISERR_FUARIS_MASK);
-		}
-		if (irq_rischnl_status & MCDE_RISCHNL_CHNLARIS(0)) {
-			dev_warn(&mcde_dev->dev, "Channel A abort\n");
-			mcde_wreg(MCDE_RISCHNL, MCDE_RISCHNL_CHNLARIS(0));
-		}
-#endif
-	}
-	if (irq_status & MCDE_RISPP_VCMPBRIS_MASK) {
-		mcde_handle_vcmp(&channels[MCDE_CHNL_B],
-						MCDE_RISPP_VCMPBRIS_SHIFT);
-#ifdef DEBUG
-		if (irq_riserr_status & MCDE_RISERR_FUBRIS_MASK) {
-			dev_warn(&mcde_dev->dev, "FIFO B underflow\n");
-			mcde_wreg(MCDE_RISERR, MCDE_RISERR_FUBRIS_MASK);
-		}
-		if (irq_rischnl_status & MCDE_RISCHNL_CHNLARIS(1)) {
-			dev_warn(&mcde_dev->dev, "Channel B abort\n");
-			mcde_wreg(MCDE_RISCHNL, MCDE_RISCHNL_CHNLARIS(1));
-		}
-#endif
-	}
-	if (irq_status & MCDE_RISPP_VCMPC0RIS_MASK) {
-		mcde_handle_vcmp(&channels[MCDE_CHNL_C0],
-						MCDE_RISPP_VCMPC0RIS_SHIFT);
-#ifdef DEBUG
-		if (irq_riserr_status & MCDE_RISERR_FUC0RIS_MASK) {
-			dev_warn(&mcde_dev->dev, "FIFO C0 underflow\n");
-			mcde_wreg(MCDE_RISERR, MCDE_RISERR_FUC0RIS_MASK);
-		}
-		if (irq_rischnl_status & MCDE_RISCHNL_CHNLARIS(2)) {
-			dev_warn(&mcde_dev->dev, "Channel C0 abort\n");
-			mcde_wreg(MCDE_RISCHNL, MCDE_RISCHNL_CHNLARIS(2));
-		}
-#endif
-	}
-	if (irq_status & MCDE_RISPP_VCMPC1RIS_MASK) {
-		mcde_handle_vcmp(&channels[MCDE_CHNL_C1],
-						MCDE_RISPP_VCMPC1RIS_SHIFT);
-#ifdef DEBUG
-		if (irq_riserr_status & MCDE_RISERR_FUC1RIS_MASK) {
-			dev_warn(&mcde_dev->dev, "FIFO C1 underflow\n");
-			mcde_wreg(MCDE_RISERR, MCDE_RISERR_FUC1RIS_MASK);
-		}
-		if (irq_rischnl_status & MCDE_RISCHNL_CHNLARIS(3)) {
-			dev_warn(&mcde_dev->dev, "Channel C1 abort\n");
-			mcde_wreg(MCDE_RISCHNL, MCDE_RISCHNL_CHNLARIS(3));
-		}
-#endif
-	}
-#ifdef DEBUG
-	/* Handle error irqs */
-	if (irq_riserr_status & MCDE_RISERR_SCHBLCKDRIS_MASK) {
-		dev_warn(&mcde_dev->dev, "Scheduler blocked\n");
-		mcde_wreg(MCDE_RISERR, MCDE_RISERR_SCHBLCKDRIS_MASK);
-	}
-	if (irq_riserr_status & MCDE_IMSCERR_OVLFERRIM_MASK) {
-		dev_warn(&mcde_dev->dev, "Overlay fetch error\n");
-		mcde_wreg(MCDE_RISERR, MCDE_IMSCERR_OVLFERRIM_MASK);
-	}
-#endif
+	if (irq_status & MCDE_RISPP_VCMPARIS_MASK)
+		mcde_handle_vcmp(&channels[MCDE_CHNL_A]);
+	if (irq_status & MCDE_RISPP_VCMPBRIS_MASK)
+		mcde_handle_vcmp(&channels[MCDE_CHNL_B]);
+	if (irq_status & MCDE_RISPP_VCMPC0RIS_MASK)
+		mcde_handle_vcmp(&channels[MCDE_CHNL_C0]);
+	if (irq_status & MCDE_RISPP_VCMPC1RIS_MASK)
+		mcde_handle_vcmp(&channels[MCDE_CHNL_C1]);
+	mcde_wreg(MCDE_RISPP, irq_status);
+
 	for (i = 0; i < num_dsilinks; i++) {
 		struct mcde_chnl_state *chnl_from_dsi;
 
@@ -974,64 +984,98 @@ static irqreturn_t mcde_irq_handler(int irq, void *dev)
 		if (chnl_from_dsi == NULL)
 			continue;
 
-		irq_status = dsi_rfld(i, DSI_DIRECT_CMD_STS_FLAG,
-			TE_RECEIVED_FLAG);
-		if (irq_status) {
-			if (hardware_version == MCDE_CHIP_VERSION_3_0_8 ||
-				hardware_version == MCDE_CHIP_VERSION_4_0_4)
-				disable_flow(chnl_from_dsi);
-			dsi_wreg(i, DSI_DIRECT_CMD_STS_CLR,
-				DSI_DIRECT_CMD_STS_CLR_TE_RECEIVED_CLR(true));
-			dev_vdbg(&mcde_dev->dev, "BTA TE DSI%d\n", i);
-			do_softwaretrig(chnl_from_dsi);
-			dev_vdbg(&mcde_dev->dev, "SW TRIG DSI%d, chnl=%d\n", i,
-				chnl_from_dsi->id);
-		}
-
-		irq_status = dsi_rfld(i, DSI_CMD_MODE_STS_FLAG, ERR_NO_TE_FLAG);
-		if (irq_status) {
-			if (hardware_version == MCDE_CHIP_VERSION_3_0_8 ||
-				hardware_version == MCDE_CHIP_VERSION_4_0_4)
-				disable_flow(chnl_from_dsi);
-			dsi_wreg(i, DSI_CMD_MODE_STS_CLR,
-				DSI_CMD_MODE_STS_CLR_ERR_NO_TE_CLR(true));
-			dev_info(&mcde_dev->dev, "NO_TE DSI%d\n", i);
-		}
-
-		irq_status = dsi_rfld(i, DSI_DIRECT_CMD_STS, TRIGGER_RECEIVED);
-		if (irq_status) {
-			/* DSI TE polling answer received */
-			dsi_wreg(i, DSI_DIRECT_CMD_STS_CLR,
-				DSI_DIRECT_CMD_STS_CLR_TRIGGER_RECEIVED_CLR(
-						true));
-
-			if (chnl_from_dsi->port.sync_src ==
-					MCDE_SYNCSRC_TE_POLLING)
-				/* Reset timer */
-				dsi_te_poll_set_timer(chnl_from_dsi,
-						DSI_TE_NO_ANSWER_TIMEOUT);
-		}
+		handle_dsi_irq(chnl_from_dsi, i);
 	}
 
 	return IRQ_HANDLED;
 }
 
-static void wait_for_channel(struct mcde_chnl_state *chnl)
+/* Transitions allowed: WAIT_TE -> UPDATE -> STOPPING */
+static int set_channel_state_atomic(struct mcde_chnl_state *chnl,
+							enum chnl_state state)
 {
-	int ret;
-	u32 id = chnl->transactionid_regs;
+	enum chnl_state chnl_state = chnl->state;
 
-	if (chnl->transactionid_hw >= id)
-		return;
+	dev_dbg(&mcde_dev->dev, "Channel state change"
+		" (chnl=%d, old=%d, new=%d)\n", chnl->id, chnl_state, state);
 
-	ret = wait_event_timeout(chnl->waitq_hw,
-		chnl->transactionid_hw == id,
-		msecs_to_jiffies(CHNL_TIMEOUT));
-	if (!ret)
-		dev_warn(&mcde_dev->dev,
-			"Wait for channel timeout (chnl=%d,%d<%d)!\n",
-			chnl->id, chnl->transactionid_hw,
-			id);
+	if ((chnl_state == CHNLSTATE_SETUP && state == CHNLSTATE_WAIT_TE) ||
+	    (chnl_state == CHNLSTATE_SETUP && state == CHNLSTATE_RUNNING) ||
+	    (chnl_state == CHNLSTATE_WAIT_TE && state == CHNLSTATE_RUNNING) ||
+	    (chnl_state == CHNLSTATE_RUNNING && state == CHNLSTATE_STOPPING)) {
+		/* Set wait TE, running, or stopping state */
+		chnl->state = state;
+		return 0;
+	} else if ((chnl_state == CHNLSTATE_STOPPING &&
+						state == CHNLSTATE_STOPPED) ||
+		   (chnl_state == CHNLSTATE_WAIT_TE &&
+						state == CHNLSTATE_STOPPED)) {
+		/* Set stopped state */
+		chnl->state = state;
+		wake_up_all(&chnl->state_waitq);
+		return 0;
+	} else if (state == CHNLSTATE_IDLE) {
+		/* Set idle state */
+		WARN_ON_ONCE(chnl_state != CHNLSTATE_DSI_READ &&
+			     chnl_state != CHNLSTATE_DSI_WRITE &&
+			     chnl_state != CHNLSTATE_SUSPEND);
+		chnl->state = state;
+		wake_up_all(&chnl->state_waitq);
+		return 0;
+	} else {
+		/* Invalid atomic state transition */
+		dev_warn(&mcde_dev->dev, "Channel state change error (chnl=%d,"
+			" old=%d, new=%d)\n", chnl->id, chnl_state, state);
+		WARN_ON_ONCE(true);
+		return -EINVAL;
+	}
+}
+
+/* LOCKING: mcde_hw_lock */
+static int set_channel_state_sync(struct mcde_chnl_state *chnl,
+							enum chnl_state state)
+{
+	int ret = 0;
+	enum chnl_state chnl_state = chnl->state;
+
+	dev_dbg(&mcde_dev->dev, "Channel state change"
+		" (chnl=%d, old=%d, new=%d)\n", chnl->id, chnl->state, state);
+
+	/* No change */
+	if (chnl_state == state)
+		return 0;
+
+	/* Wait for IDLE before changing state */
+	if (chnl_state != CHNLSTATE_IDLE) {
+		ret = wait_event_timeout(chnl->state_waitq,
+			/* STOPPED -> IDLE is manual, so wait for both */
+			chnl->state == CHNLSTATE_STOPPED ||
+			chnl->state == CHNLSTATE_IDLE,
+						msecs_to_jiffies(CHNL_TIMEOUT));
+		if (WARN_ON_ONCE(!ret))
+			dev_warn(&mcde_dev->dev, "Wait for channel timeout "
+						"(chnl=%d, curr=%d, new=%d)\n",
+						chnl->id, chnl->state, state);
+		chnl_state = chnl->state;
+	}
+
+	/* Do manual transition from STOPPED to IDLE */
+	if (chnl_state == CHNLSTATE_STOPPED)
+		wait_for_flow_disabled(chnl);
+
+	/* State is IDLE, do transition to new state */
+	chnl->state = state;
+
+	return ret;
+}
+
+static int wait_for_vcmp(struct mcde_chnl_state *chnl)
+{
+	u64 vcmp = atomic_read(&chnl->vcmp_cnt) + 1;
+	int ret = wait_event_timeout(chnl->vcmp_waitq,
+					atomic_read(&chnl->vcmp_cnt) >= vcmp,
+						msecs_to_jiffies(CHNL_TIMEOUT));
+	return ret;
 }
 
 static int update_channel_static_registers(struct mcde_chnl_state *chnl)
@@ -1285,9 +1329,8 @@ static int update_channel_static_registers(struct mcde_chnl_state *chnl)
 		}
 	}
 
-	if (port->type == MCDE_PORTTYPE_DPI) {
+	if (port->type == MCDE_PORTTYPE_DPI)
 		WARN_ON_ONCE(clk_enable(clock_dpi));
-	}
 
 	mcde_wfld(MCDE_CR, MCDEEN, true);
 	chnl->formatter_updated = true;
@@ -1295,7 +1338,6 @@ static int update_channel_static_registers(struct mcde_chnl_state *chnl)
 	dev_vdbg(&mcde_dev->dev, "Static registers setup, chnl=%d\n", chnl->id);
 
 	return 0;
-
 dsi_link_error:
 	if (dsi_pll_is_enabled && (--dsi_pll_is_enabled == 0)) {
 		struct mcde_platform_data *pdata =
@@ -1328,6 +1370,7 @@ void mcde_chnl_col_convert_apply(struct mcde_chnl_state *chnl,
 		chnl->col_regs.off_y     = transform->offset[0];
 		chnl->col_regs.off_cb    = transform->offset[1];
 		chnl->col_regs.off_cr    = transform->offset[2];
+		chnl->col_regs.dirty = true;
 
 		chnl->transform = transform;
 	}
@@ -1453,7 +1496,6 @@ static void update_overlay_registers(u8 idx, struct ovly_regs *regs,
 	} else if (port->type == MCDE_PORTTYPE_DPI)
 		sel_mod = MCDE_EXTSRC0CR_SEL_MOD_SOFTWARE_SEL;
 
-	regs->update = false;
 	mcde_wreg(MCDE_EXTSRC0CONF + idx * MCDE_EXTSRC0CONF_GROUPOFFSET,
 		MCDE_EXTSRC0CONF_BUF_ID(0) |
 		MCDE_EXTSRC0CONF_BUF_NB(nr_of_bufs) |
@@ -1498,6 +1540,7 @@ static void update_overlay_registers(u8 idx, struct ovly_regs *regs,
 	mcde_wreg(MCDE_OVL0CROP + idx * MCDE_OVL0CROP_GROUPOFFSET,
 		MCDE_OVL0CROP_TMRGN(tmrgn) |
 		MCDE_OVL0CROP_LMRGN(lmrgn >> 6));
+	regs->dirty = false;
 
 	dev_vdbg(&mcde_dev->dev, "Overlay registers setup, idx=%d\n", idx);
 }
@@ -1514,37 +1557,35 @@ static void update_overlay_registers_on_the_fly(u8 idx, struct ovly_regs *regs)
 		regs->baseaddress0);
 	mcde_wreg(MCDE_EXTSRC0A1 + idx * MCDE_EXTSRC0A1_GROUPOFFSET,
 		regs->baseaddress1);
+	regs->dirty_buf = false;
 }
 
 static void do_softwaretrig(struct mcde_chnl_state *chnl)
 {
-	/*
-	* For main and secondary display,
-	* FLOWEN has to be set before a SOFTWARE TRIG
-	* Otherwise no overlay interrupt is triggerd
-	* However FLOWEN must not be triggered before SOFTWARE TRIG
-	* if rotation is enabled
-	*/
-	if (hardware_version == MCDE_CHIP_VERSION_3_0_8 ||
-		hardware_version == MCDE_CHIP_VERSION_4_0_4)
-		enable_channel(chnl);
-	else if ((!is_channel_enabled(chnl) && !chnl->regs.roten)
-				|| chnl->power_mode != MCDE_DISPLAY_PM_ON)
-		enable_channel(chnl);
+	unsigned long flags;
+
+	local_irq_save(flags);
 
+	enable_flow(chnl);
 	mcde_wreg(MCDE_CHNL0SYNCHSW +
 		chnl->id * MCDE_CHNL0SYNCHSW_GROUPOFFSET,
 		MCDE_CHNL0SYNCHSW_SW_TRIG(true));
+	disable_flow(chnl);
 
-	if (hardware_version == MCDE_CHIP_VERSION_3_0_8 ||
-		hardware_version == MCDE_CHIP_VERSION_4_0_4)
-		disable_flow(chnl);
-	else
-		enable_channel(chnl);
+	local_irq_restore(flags);
+
+	dev_vdbg(&mcde_dev->dev, "Software TRIG on channel %d\n", chnl->id);
 }
 
 static void disable_flow(struct mcde_chnl_state *chnl)
 {
+	unsigned long flags;
+
+	if (WARN_ON_ONCE(chnl->state != CHNLSTATE_RUNNING))
+		return;
+
+	local_irq_save(flags);
+
 	switch (chnl->id) {
 	case MCDE_CHNL_A:
 		mcde_wfld(MCDE_CRA0, FLOEN, false);
@@ -1559,17 +1600,25 @@ static void disable_flow(struct mcde_chnl_state *chnl)
 		mcde_wfld(MCDE_CRC, C2EN, false);
 		break;
 	}
+
+	set_channel_state_atomic(chnl, CHNLSTATE_STOPPING);
+
+	local_irq_restore(flags);
 }
-#define MCDE_FLOWEN_MAX_TRIAL 60
 
-static void disable_channel(struct mcde_chnl_state *chnl)
+static void stop_channel(struct mcde_chnl_state *chnl)
 {
-	int i;
 	const struct mcde_port *port = &chnl->port;
 
 	dev_vdbg(&mcde_dev->dev, "%s\n", __func__);
 
-	chnl->disable_software_trig = true;
+	if (chnl->state != CHNLSTATE_RUNNING)
+		return;
+
+	if (chnl->port.update_auto_trig &&
+			chnl->port.sync_src == MCDE_SYNCSRC_OFF &&
+			chnl->port.type == MCDE_PORTTYPE_DSI)
+		del_timer(&chnl->auto_sync_timer);
 
 	if (port->type == MCDE_PORTTYPE_DSI) {
 		dsi_wfld(port->link, DSI_MCTL_MAIN_PHY_CTL, CLK_CONTINUOUS,
@@ -1578,180 +1627,102 @@ static void disable_channel(struct mcde_chnl_state *chnl)
 			del_timer(&chnl->dsi_te_timer);
 	}
 
-	if (chnl->port.update_auto_trig &&
-			chnl->port.sync_src == MCDE_SYNCSRC_OFF &&
-			chnl->port.type == MCDE_PORTTYPE_DSI) {
-		del_timer(&chnl->auto_sync_timer);
-		chnl->continous_running = false;
-	}
-
-	if (hardware_version == MCDE_CHIP_VERSION_1_0_4) {
-		if (is_channel_enabled(chnl)) {
-			wait_for_channel(chnl);
-			/*
-			 * Just to make sure that a frame is triggered when
-			 * we try to disable the channel
-			 */
-			chnl->transactionid++;
-			mcde_wreg(MCDE_CHNL0SYNCHSW +
-				chnl->id * MCDE_CHNL0SYNCHSW_GROUPOFFSET,
-					MCDE_CHNL0SYNCHSW_SW_TRIG(true));
-			disable_flow(chnl);
-			wait_for_channel(chnl);
-			for (i = 0; i < MCDE_FLOWEN_MAX_TRIAL; i++) {
-				if (!is_channel_enabled(chnl)) {
-					dev_vdbg(&mcde_dev->dev,
-						"Flow %d off after >= %d ms\n",
-								chnl->id, i);
-					goto break_switch;
-				}
-				mdelay(1);
-			}
-		} else {
-			dev_vdbg(&mcde_dev->dev,
-				"Flow %d disable after >= %d ms\n",
-								chnl->id, i);
-			goto break_switch;
-		}
-	} else {
-		switch (chnl->id) {
-		case MCDE_CHNL_A:
-			mcde_wfld(MCDE_CRA0, FLOEN, false);
-			wait_for_channel(chnl);
-			for (i = 0; i < MCDE_FLOWEN_MAX_TRIAL; i++) {
-				mdelay(1);
-				if (!mcde_rfld(MCDE_CRA0, FLOEN)) {
-					dev_vdbg(&mcde_dev->dev,
-					"Flow (A) off after >= %d ms\n", i);
-					goto break_switch;
-				}
-			}
-			dev_warn(&mcde_dev->dev,
-					"%s: channel A timeout\n", __func__);
-			break;
-		case MCDE_CHNL_B:
-			mcde_wfld(MCDE_CRB0, FLOEN, false);
-			wait_for_channel(chnl);
-			for (i = 0; i < MCDE_FLOWEN_MAX_TRIAL; i++) {
-				mdelay(1);
-				if (!mcde_rfld(MCDE_CRB0, FLOEN)) {
-					dev_vdbg(&mcde_dev->dev,
-					"Flow (B) off after >= %d ms\n", i);
-					goto break_switch;
-				}
-			}
-			dev_warn(&mcde_dev->dev, "%s: channel B timeout\n",
-								__func__);
-			break;
-		case MCDE_CHNL_C0:
-			mcde_wfld(MCDE_CRC, C1EN, false);
-			wait_for_channel(chnl);
-			for (i = 0; i < MCDE_FLOWEN_MAX_TRIAL; i++) {
-				mdelay(1);
-				if (!mcde_rfld(MCDE_CRC, C1EN)) {
-					dev_vdbg(&mcde_dev->dev,
-					"Flow (C1) off after >= %d ms\n", i);
-					goto break_switch;
-				}
-			}
-			dev_warn(&mcde_dev->dev, "%s: channel C0 timeout\n",
-								__func__);
-			break;
-		case MCDE_CHNL_C1:
-			mcde_wfld(MCDE_CRC, C2EN, false);
-			wait_for_channel(chnl);
-			for (i = 0; i < MCDE_FLOWEN_MAX_TRIAL; i++) {
-				mdelay(1);
-				if (!mcde_rfld(MCDE_CRC, C2EN)) {
-					dev_vdbg(&mcde_dev->dev,
-					"Flow (C2) off after >= %d ms\n", i);
-					goto break_switch;
-				}
-			}
-			dev_warn(&mcde_dev->dev, "%s: channel C1 timeout\n",
-								__func__);
-			break;
-		}
-	}
-break_switch:
-	chnl->continous_running = false;
+	disable_flow(chnl);
+	/*
+	 * Needs to manually trigger VCOMP after the channel is
+	 * disabled for video mode.
+	*/
+	if (chnl->port.update_auto_trig)
+		mcde_wreg(MCDE_SISPP, 1 << chnl->id);
 }
 
-static void enable_channel(struct mcde_chnl_state *chnl)
+static void wait_for_flow_disabled(struct mcde_chnl_state *chnl)
 {
-	const struct mcde_port *port = &chnl->port;
-	int i;
-
-	dev_vdbg(&mcde_dev->dev, "%s\n", __func__);
-
-	if (port->type == MCDE_PORTTYPE_DSI)
-		dsi_wfld(port->link, DSI_MCTL_MAIN_PHY_CTL, CLK_CONTINUOUS,
-				port->phy.dsi.clk_cont);
+	int i = 0;
 
 	switch (chnl->id) {
 	case MCDE_CHNL_A:
-		mcde_wfld(MCDE_CRA0, FLOEN, true);
 		for (i = 0; i < MCDE_FLOWEN_MAX_TRIAL; i++) {
-			if (mcde_rfld(MCDE_CRA0, FLOEN)) {
+			if (!mcde_rfld(MCDE_CRA0, FLOEN)) {
 				dev_vdbg(&mcde_dev->dev,
-					"Flow (A) enable after >= %d ms\n", i);
-				return;
+					"Flow (A) disable after >= %d ms\n", i);
+				break;
 			}
-			mdelay(1);
+			msleep(1);
 		}
 		break;
 	case MCDE_CHNL_B:
-		mcde_wfld(MCDE_CRB0, FLOEN, true);
 		for (i = 0; i < MCDE_FLOWEN_MAX_TRIAL; i++) {
-			if (mcde_rfld(MCDE_CRB0, FLOEN)) {
+			if (!mcde_rfld(MCDE_CRB0, FLOEN)) {
 				dev_vdbg(&mcde_dev->dev,
-					"Flow (B) enable after >= %d ms\n", i);
-				return;
+				"Flow (B) disable after >= %d ms\n", i);
+				break;
 			}
-			mdelay(1);
+			msleep(1);
 		}
 		break;
 	case MCDE_CHNL_C0:
-		mcde_wfld(MCDE_CRC, C1EN, true);
 		for (i = 0; i < MCDE_FLOWEN_MAX_TRIAL; i++) {
-			if (mcde_rfld(MCDE_CRC, C1EN)) {
+			if (!mcde_rfld(MCDE_CRC, C1EN)) {
 				dev_vdbg(&mcde_dev->dev,
-					"Flow (C1) enable after >= %d ms\n", i);
-				return;
+				"Flow (C1) disable after >= %d ms\n", i);
+				break;
 			}
-			mdelay(1);
+			msleep(1);
 		}
-		mcde_wfld(MCDE_CRC, POWEREN, true);
 		break;
 	case MCDE_CHNL_C1:
-		mcde_wfld(MCDE_CRC, C2EN, true);
 		for (i = 0; i < MCDE_FLOWEN_MAX_TRIAL; i++) {
-			if (mcde_rfld(MCDE_CRC, C2EN)) {
+			if (!mcde_rfld(MCDE_CRC, C2EN)) {
 				dev_vdbg(&mcde_dev->dev,
-					"Flow (C2) enable after >= %d ms\n", i);
-				return;
+				"Flow (C2) disable after >= %d ms\n", i);
+				break;
 			}
-			mdelay(1);
+			msleep(1);
 		}
-		mcde_wfld(MCDE_CRC, POWEREN, true);
 		break;
 	}
+	if (i == MCDE_FLOWEN_MAX_TRIAL)
+		dev_err(&mcde_dev->dev, "%s: channel %d timeout\n",
+							__func__, chnl->id);
 }
-#undef MCDE_FLOWEN_MAX_TRIAL
 
-static int is_channel_enabled(struct mcde_chnl_state *chnl)
+static void enable_flow(struct mcde_chnl_state *chnl)
 {
+	const struct mcde_port *port = &chnl->port;
+
+	dev_vdbg(&mcde_dev->dev, "%s\n", __func__);
+
+	if (port->type == MCDE_PORTTYPE_DSI)
+		dsi_wfld(port->link, DSI_MCTL_MAIN_PHY_CTL, CLK_CONTINUOUS,
+				port->phy.dsi.clk_cont);
+
+	/*
+	 * When ROTEN is set, the FLOEN bit will also be set but
+	 * the flow has to be started anyway.
+	 */
 	switch (chnl->id) {
 	case MCDE_CHNL_A:
-		return mcde_rfld(MCDE_CRA0, FLOEN);
+		WARN_ON_ONCE(mcde_rfld(MCDE_CRA0, FLOEN));
+		mcde_wfld(MCDE_CRA0, ROTEN, chnl->regs.roten);
+		mcde_wfld(MCDE_CRA0, FLOEN, true);
+		break;
 	case MCDE_CHNL_B:
-		return mcde_rfld(MCDE_CRB0, FLOEN);
+		WARN_ON_ONCE(mcde_rfld(MCDE_CRB0, FLOEN));
+		mcde_wfld(MCDE_CRB0, ROTEN, chnl->regs.roten);
+		mcde_wfld(MCDE_CRB0, FLOEN, true);
+		break;
 	case MCDE_CHNL_C0:
-		return mcde_rfld(MCDE_CRC, C1EN);
+		WARN_ON_ONCE(mcde_rfld(MCDE_CRC, C1EN));
+		mcde_wfld(MCDE_CRC, C1EN, true);
+		break;
 	case MCDE_CHNL_C1:
-		return mcde_rfld(MCDE_CRC, C2EN);
+		WARN_ON_ONCE(mcde_rfld(MCDE_CRC, C2EN));
+		mcde_wfld(MCDE_CRC, C2EN, true);
+		break;
 	}
-	return 0;
+
+	set_channel_state_atomic(chnl, CHNLSTATE_RUNNING);
 }
 
 static void watchdog_auto_sync_timer_function(unsigned long arg)
@@ -1762,11 +1733,8 @@ static void watchdog_auto_sync_timer_function(unsigned long arg)
 		if (chnl->port.update_auto_trig &&
 				chnl->port.sync_src == MCDE_SYNCSRC_OFF &&
 				chnl->port.type == MCDE_PORTTYPE_DSI &&
-				chnl->continous_running) {
-			mcde_wreg(MCDE_CHNL0SYNCHSW +
-				chnl->id
-				* MCDE_CHNL0SYNCHSW_GROUPOFFSET,
-				MCDE_CHNL0SYNCHSW_SW_TRIG(true));
+				chnl->state == CHNLSTATE_RUNNING) {
+			do_softwaretrig(chnl);
 			mod_timer(&chnl->auto_sync_timer,
 				jiffies +
 				msecs_to_jiffies(MCDE_AUTO_SYNC_WATCHDOG
@@ -1778,10 +1746,10 @@ static void watchdog_auto_sync_timer_function(unsigned long arg)
 static void work_sleep_function(struct work_struct *ptr)
 {
 	dev_vdbg(&mcde_dev->dev, "%s\n", __func__);
-	if (mutex_trylock(&mcde_hw_lock) == 1) {
+	if (mcde_trylock(__func__, __LINE__)) {
 		if (mcde_dynamic_power_management)
-			(void)disable_mcde_hw(false);
-		mutex_unlock(&mcde_hw_lock);
+			disable_mcde_hw(false);
+		mcde_unlock(__func__, __LINE__);
 	}
 }
 
@@ -1911,33 +1879,27 @@ void update_channel_registers(enum mcde_chnl chnl_id, struct chnl_regs *regs,
 		MCDE_CHNL0BCKGNDCOL_R(0));
 
 	if (chnl_id == MCDE_CHNL_A || chnl_id == MCDE_CHNL_B) {
-		u32 mcde_crx0;
 		u32 mcde_crx1;
 		u32 mcde_pal0x;
 		u32 mcde_pal1x;
 		if (chnl_id == MCDE_CHNL_A) {
-			mcde_crx0 = MCDE_CRA0;
 			mcde_crx1 = MCDE_CRA1;
 			mcde_pal0x = MCDE_PAL0A;
 			mcde_pal1x = MCDE_PAL1A;
+			mcde_wfld(MCDE_CRA0, PALEN, regs->palette_enable);
 		} else {
-			mcde_crx0 = MCDE_CRB0;
 			mcde_crx1 = MCDE_CRB1;
 			mcde_pal0x = MCDE_PAL0B;
 			mcde_pal1x = MCDE_PAL1B;
+			mcde_wfld(MCDE_CRB0, PALEN, regs->palette_enable);
 		}
-		mcde_wreg_fld(mcde_crx0, MCDE_CRA0_ROTEN_MASK,
-				MCDE_CRA0_ROTEN_SHIFT, regs->roten);
-		mcde_wreg_fld(mcde_crx0, MCDE_CRA0_PALEN_MASK,
-				MCDE_CRA0_PALEN_SHIFT, regs->palette_enable);
 		mcde_wreg(mcde_crx1,
 			MCDE_CRA1_PCD(regs->pcd) |
 			MCDE_CRA1_CLKSEL(regs->clksel) |
 			MCDE_CRA1_CDWIN(regs->cdwin) |
 			MCDE_CRA1_OUTBPP(bpp2outbpp(regs->bpp)) |
 			MCDE_CRA1_BCD(regs->bcd) |
-			MCDE_CRA1_CLKTYPE(regs->internal_clk)
-		);
+			MCDE_CRA1_CLKTYPE(regs->internal_clk));
 		if (regs->palette_enable) {
 			int i;
 			for (i = 0; i < 256; i++) {
@@ -2016,13 +1978,10 @@ void update_channel_registers(enum mcde_chnl chnl_id, struct chnl_regs *regs,
 	}
 
 	if (regs->roten) {
-		/* TODO: Allocate memory in ESRAM instead of
-				static allocations. */
 		mcde_wreg(MCDE_ROTADD0A + chnl_id * MCDE_ROTADD0A_GROUPOFFSET,
 			regs->rotbuf1);
 		mcde_wreg(MCDE_ROTADD1A + chnl_id * MCDE_ROTADD1A_GROUPOFFSET,
 			regs->rotbuf2);
-
 		mcde_wreg(MCDE_ROTACONF + chnl_id * MCDE_ROTACONF_GROUPOFFSET,
 			MCDE_ROTACONF_ROTBURSTSIZE_ENUM(8W) |
 			MCDE_ROTACONF_ROTBURSTSIZE_HW(1) |
@@ -2044,6 +2003,7 @@ void update_channel_registers(enum mcde_chnl chnl_id, struct chnl_regs *regs,
 	}
 
 	dev_vdbg(&mcde_dev->dev, "Channel registers setup, chnl=%d\n", chnl_id);
+	regs->dirty = false;
 }
 
 static int enable_mcde_hw(void)
@@ -2054,12 +2014,31 @@ static int enable_mcde_hw(void)
 	dev_vdbg(&mcde_dev->dev, "%s\n", __func__);
 
 	cancel_delayed_work(&hw_timeout_work);
-
 	schedule_delayed_work(&hw_timeout_work,
 					msecs_to_jiffies(MCDE_SLEEP_WATCHDOG));
 
-	if (mcde_is_enabled)
+	for (i = 0; i < num_channels; i++) {
+		struct mcde_chnl_state *chnl = &channels[i];
+		if (chnl->state == CHNLSTATE_SUSPEND) {
+			/* Mark all registers as dirty */
+			set_channel_state_atomic(chnl, CHNLSTATE_IDLE);
+			chnl->ovly0->regs.dirty = true;
+			chnl->ovly0->regs.dirty_buf = true;
+			if (chnl->ovly1) {
+				chnl->ovly1->regs.dirty = true;
+				chnl->ovly1->regs.dirty_buf = true;
+			}
+			chnl->regs.dirty = true;
+			chnl->col_regs.dirty = true;
+			chnl->tv_regs.dirty = true;
+			atomic_set(&chnl->vcmp_cnt, 0);
+		}
+	}
+
+	if (mcde_is_enabled) {
+		dev_vdbg(&mcde_dev->dev, "%s - already enabled\n", __func__);
 		return 0;
+	}
 
 	enable_clocks_and_power(mcde_dev);
 
@@ -2074,26 +2053,12 @@ static int enable_mcde_hw(void)
 
 	update_mcde_registers();
 
-	/* update hardware with same settings as before power down*/
-	for (i = 0; i < num_channels; i++) {
-		struct mcde_chnl_state *chnl = &channels[i];
-		if (chnl->enabled) {
-			if (chnl->ovly0 && chnl->ovly0->inuse &&
-						chnl->ovly0->regs.enabled)
-				chnl->ovly0->regs.update = true;
-			if (chnl->ovly1 && chnl->ovly1->inuse &&
-						chnl->ovly1->regs.enabled)
-				chnl->ovly1->regs.update = true;
-			chnl->transactionid++;
-		}
-	}
+	dev_vdbg(&mcde_dev->dev, "%s - enable done\n", __func__);
 
 	mcde_is_enabled = true;
 	return 0;
 }
 
-#define DSI_WRITE_CMD_TIMEOUT 1000
-
 /* DSI */
 static int mcde_dsi_direct_cmd_write(struct mcde_chnl_state *chnl,
 			bool dcs, u8 cmd, u8 *data, int len)
@@ -2109,18 +2074,17 @@ static int mcde_dsi_direct_cmd_write(struct mcde_chnl_state *chnl,
 			chnl->port.type != MCDE_PORTTYPE_DSI)
 		return -EINVAL;
 
-	mutex_lock(&mcde_hw_lock);
+	mcde_lock(__func__, __LINE__);
 
 	_mcde_chnl_enable(chnl);
 	if (enable_mcde_hw()) {
-		mutex_unlock(&mcde_hw_lock);
+		mcde_unlock(__func__, __LINE__);
 		return -EINVAL;
 	}
 	if (!chnl->formatter_updated)
 		(void)update_channel_static_registers(chnl);
 
-	wait_for_channel(chnl);
-	wait_while_dsi_running(chnl->port.link);
+	set_channel_state_sync(chnl, CHNLSTATE_DSI_WRITE);
 
 	if (dcs) {
 		wrdat[0] = cmd;
@@ -2197,7 +2161,9 @@ static int mcde_dsi_direct_cmd_write(struct mcde_chnl_state *chnl,
 			dsi_rreg(link, DSI_CMD_MODE_STS_FLAG));
 	}
 
-	mutex_unlock(&mcde_hw_lock);
+	set_channel_state_atomic(chnl, CHNLSTATE_IDLE);
+
+	mcde_unlock(__func__, __LINE__);
 
 	return ret;
 }
@@ -2225,18 +2191,17 @@ int mcde_dsi_dcs_read(struct mcde_chnl_state *chnl,
 	if (*len > MCDE_MAX_DCS_READ || chnl->port.type != MCDE_PORTTYPE_DSI)
 		return -EINVAL;
 
-	mutex_lock(&mcde_hw_lock);
+	mcde_lock(__func__, __LINE__);
 
 	_mcde_chnl_enable(chnl);
 	if (enable_mcde_hw()) {
-		mutex_unlock(&mcde_hw_lock);
+		mcde_unlock(__func__, __LINE__);
 		return -EINVAL;
 	}
 	if (!chnl->formatter_updated)
 		(void)update_channel_static_registers(chnl);
 
-	wait_for_channel(chnl);
-	wait_while_dsi_running(chnl->port.link);
+	set_channel_state_sync(chnl, CHNLSTATE_DSI_READ);
 
 	dsi_wfld(link, DSI_MCTL_MAIN_DATA_CTL, BTA_EN, true);
 	dsi_wfld(link, DSI_MCTL_MAIN_DATA_CTL, READ_EN, true);
@@ -2265,20 +2230,22 @@ int mcde_dsi_dcs_read(struct mcde_chnl_state *chnl,
 		rdsize = dsi_rfld(link, DSI_DIRECT_CMD_RD_PROPERTY, RD_SIZE);
 		rddat = dsi_rreg(link, DSI_DIRECT_CMD_RDDAT);
 		if (rdsize < *len)
-			pr_err("DCS incomplete read %d<%d (%.8X)\n",
-				rdsize, *len, rddat);/* REVIEW: dev_dbg */
+			dev_warn(&mcde_dev->dev, "DCS incomplete read %d<%d"
+					" (%.8X)\n", rdsize, *len, rddat);
 		*len = min(*len, rdsize);
 		memcpy(data, &rddat, *len);
 	} else {
-		pr_err("DCS read failed, err=%d, sts=%X\n",
-			error, dsi_rreg(link, DSI_DIRECT_CMD_STS));
+		dev_err(&mcde_dev->dev, "DCS read failed, err=%d, sts=%X\n",
+				error, dsi_rreg(link, DSI_DIRECT_CMD_STS));
 		ret = -EIO;
 	}
 
 	dsi_wreg(link, DSI_CMD_MODE_STS_CLR, ~0);
 	dsi_wreg(link, DSI_DIRECT_CMD_STS_CLR, ~0);
 
-	mutex_unlock(&mcde_hw_lock);
+	set_channel_state_atomic(chnl, CHNLSTATE_IDLE);
+
+	mcde_unlock(__func__, __LINE__);
 
 	return ret;
 }
@@ -2303,13 +2270,15 @@ int mcde_dsi_set_max_pkt_size(struct mcde_chnl_state *chnl)
 	if (chnl->port.type != MCDE_PORTTYPE_DSI)
 		return -EINVAL;
 
-	mutex_lock(&mcde_hw_lock);
+	mcde_lock(__func__, __LINE__);
 
 	if (enable_mcde_hw()) {
-		mutex_unlock(&mcde_hw_lock);
+		mcde_unlock(__func__, __LINE__);
 		return -EIO;
 	}
 
+	set_channel_state_sync(chnl, CHNLSTATE_DSI_WRITE);
+
 	/*
 	 * Set Maximum Return Packet Size is a two-byte command packet
 	 * that specifies the maximum size of the payload as u16 value.
@@ -2326,7 +2295,10 @@ int mcde_dsi_set_max_pkt_size(struct mcde_chnl_state *chnl)
 	dsi_wreg(link, DSI_DIRECT_CMD_WRDAT0, MCDE_MAX_DCS_READ);
 	dsi_wreg(link, DSI_DIRECT_CMD_SEND, true);
 
-	mutex_unlock(&mcde_hw_lock);
+	set_channel_state_atomic(chnl, CHNLSTATE_IDLE);
+
+	mcde_unlock(__func__, __LINE__);
+
 	return 0;
 }
 
@@ -2389,6 +2361,8 @@ static void dsi_te_request(struct mcde_chnl_state *chnl)
 	dev_vdbg(&mcde_dev->dev, "Request BTA TE, chnl=%d\n",
 		chnl->id);
 
+	set_channel_state_atomic(chnl, CHNLSTATE_WAIT_TE);
+
 	dsi_wfld(link, DSI_MCTL_MAIN_DATA_CTL, BTA_EN, true);
 	dsi_wfld(link, DSI_MCTL_MAIN_DATA_CTL, REG_TE_EN, true);
 	dsi_wfld(link, DSI_CMD_MODE_CTL, TE_TIMEOUT, 0x3FF);
@@ -2545,105 +2519,73 @@ static int _mcde_chnl_apply(struct mcde_chnl_state *chnl)
 	chnl->regs.blend_en = chnl->blend_en;
 	chnl->regs.alpha_blend = chnl->alpha_blend;
 
-	chnl->transactionid++;
+	chnl->regs.dirty = true;
 
 	dev_vdbg(&mcde_dev->dev, "Channel applied, chnl=%d\n", chnl->id);
 	return 0;
 }
 
-static void chnl_update_registers(struct mcde_chnl_state *chnl)
+static void setup_channel(struct mcde_chnl_state *chnl)
 {
-	/* REVIEW: Move content to update_channel_register */
-	/* and remove this one */
-	if (chnl->port.type == MCDE_PORTTYPE_DPI)
+	set_channel_state_sync(chnl, CHNLSTATE_SETUP);
+
+	if (chnl->port.type == MCDE_PORTTYPE_DPI && chnl->tv_regs.dirty)
 		update_dpi_registers(chnl->id, &chnl->tv_regs);
-	if (chnl->id == MCDE_CHNL_A || chnl->id == MCDE_CHNL_B)
+	if ((chnl->id == MCDE_CHNL_A || chnl->id == MCDE_CHNL_B) &&
+							chnl->col_regs.dirty)
 		update_col_registers(chnl->id, &chnl->col_regs);
-	update_channel_registers(chnl->id, &chnl->regs, &chnl->port,
+	if (chnl->regs.dirty)
+		update_channel_registers(chnl->id, &chnl->regs, &chnl->port,
 						chnl->fifo, &chnl->vmode);
-
-	chnl->transactionid_regs = chnl->transactionid;
 }
 
 static void chnl_update_continous(struct mcde_chnl_state *chnl,
 						bool tripple_buffer)
 {
-
-	if (chnl->continous_running) {
-		chnl->transactionid_regs = chnl->transactionid;
+	if (chnl->state == CHNLSTATE_RUNNING) {
 		if (!tripple_buffer)
-			wait_for_channel(chnl);
+			wait_for_vcmp(chnl);
+		return;
 	}
 
-	if (!chnl->continous_running) {
-		if (chnl->transactionid_regs < chnl->transactionid)
-			chnl_update_registers(chnl);
-		if (chnl->port.sync_src == MCDE_SYNCSRC_TE0) {
+	setup_channel(chnl);
+	if (chnl->port.sync_src == MCDE_SYNCSRC_TE0) {
+		mcde_wfld(MCDE_CRC, SYCEN0, true);
+	} else if (chnl->port.sync_src == MCDE_SYNCSRC_TE1) {
+		if (hardware_version == MCDE_CHIP_VERSION_3_0_8 ||
+			hardware_version == MCDE_CHIP_VERSION_4_0_4) {
+			mcde_wfld(MCDE_VSCRC1, VSSEL, 1);
+			mcde_wfld(MCDE_CRC, SYCEN1, true);
+		} else {
+			mcde_wfld(MCDE_VSCRC1, VSSEL, 0);
 			mcde_wfld(MCDE_CRC, SYCEN0, true);
-		 } else if (chnl->port.sync_src == MCDE_SYNCSRC_TE1) {
-			if (hardware_version == MCDE_CHIP_VERSION_3_0_8 ||
-				hardware_version == MCDE_CHIP_VERSION_4_0_4) {
-				mcde_wfld(MCDE_VSCRC1, VSSEL, 1);
-				mcde_wfld(MCDE_CRC, SYCEN1, true);
-			} else {
-				mcde_wfld(MCDE_VSCRC1, VSSEL, 0);
-				mcde_wfld(MCDE_CRC, SYCEN0, true);
-			}
 		}
-		chnl->continous_running = true;
-
-		/*
-		* For main and secondary display,
-		* FLOWEN has to be set before a SOFTWARE TRIG
-		* Otherwise not overlay interrupt is triggerd
-		*/
-		enable_channel(chnl);
+	}
 
-		if (chnl->port.type == MCDE_PORTTYPE_DSI &&
+	if (chnl->port.type == MCDE_PORTTYPE_DSI &&
 				chnl->port.sync_src == MCDE_SYNCSRC_OFF) {
-			chnl->disable_software_trig = false;
-			if (hardware_version == MCDE_CHIP_VERSION_3_0_8 ||
-				hardware_version == MCDE_CHIP_VERSION_4_0_4) {
-				mcde_wreg(MCDE_CHNL0SYNCHSW +
-				chnl->id * MCDE_CHNL0SYNCHSW_GROUPOFFSET,
-					MCDE_CHNL0SYNCHSW_SW_TRIG(true));
-				disable_flow(chnl);
-			}
-			mod_timer(&chnl->auto_sync_timer,
-					jiffies +
+		do_softwaretrig(chnl);
+		mod_timer(&chnl->auto_sync_timer, jiffies +
 			msecs_to_jiffies(MCDE_AUTO_SYNC_WATCHDOG * 1000));
-		}
-	}
+	} else
+		enable_flow(chnl);
 }
 
 static void chnl_update_non_continous(struct mcde_chnl_state *chnl)
 {
 	/* Commit settings to registers */
-	wait_for_channel(chnl);
-	if (chnl->transactionid_regs < chnl->transactionid)
-		chnl_update_registers(chnl);
+	setup_channel(chnl);
 
-	/* TODO: look at port sync source and synched_update */
 	if (chnl->regs.synchronized_update &&
-			chnl->power_mode == MCDE_DISPLAY_PM_ON) {
-		if (chnl->port.type == MCDE_PORTTYPE_DSI) {
-			if (chnl->port.sync_src == MCDE_SYNCSRC_BTA) {
-				if (hardware_version == MCDE_CHIP_VERSION_3_0_8)
-					enable_channel(chnl);
-				wait_while_dsi_running(chnl->port.link);
-				dsi_te_request(chnl);
-			} else if (chnl->port.sync_src == MCDE_SYNCSRC_TE0) {
-				mcde_wfld(MCDE_CRC, SYCEN0, true);
-				if (hardware_version == MCDE_CHIP_VERSION_3_0_8)
-					enable_channel(chnl);
-			}
-		}
+				chnl->power_mode == MCDE_DISPLAY_PM_ON) {
+		if (chnl->port.type == MCDE_PORTTYPE_DSI &&
+					chnl->port.sync_src == MCDE_SYNCSRC_BTA)
+			dsi_te_request(chnl);
 	} else {
 		do_softwaretrig(chnl);
 		dev_vdbg(&mcde_dev->dev, "Channel update (no sync), chnl=%d\n",
 			chnl->id);
 	}
-
 }
 
 static void chnl_update_overlay(struct mcde_chnl_state *chnl,
@@ -2652,8 +2594,9 @@ static void chnl_update_overlay(struct mcde_chnl_state *chnl,
 	if (!ovly)
 		return;
 
-	update_overlay_registers_on_the_fly(ovly->idx, &ovly->regs);
-	if (ovly->regs.update) {
+	if (ovly->regs.dirty_buf)
+		update_overlay_registers_on_the_fly(ovly->idx, &ovly->regs);
+	if (ovly->regs.dirty) {
 		chnl_ovly_pixel_format_apply(chnl, ovly);
 		update_overlay_registers(ovly->idx, &ovly->regs, &chnl->port,
 			chnl->fifo, chnl->regs.x, chnl->regs.y,
@@ -2677,7 +2620,7 @@ static int _mcde_chnl_update(struct mcde_chnl_state *chnl,
 	}
 
 	if (chnl->port.update_auto_trig && tripple_buffer)
-		wait_for_channel(chnl);
+		wait_for_vcmp(chnl);
 
 	chnl->regs.x   = update_area->x;
 	chnl->regs.y   = update_area->y;
@@ -2775,8 +2718,8 @@ void mcde_chnl_set_col_convert(struct mcde_chnl_state *chnl,
 		/* force update: */
 		if (chnl->transform == &chnl->rgb_2_ycbcr) {
 			chnl->transform = NULL;
-			chnl->ovly0->update = true;
-			chnl->ovly1->update = true;
+			chnl->ovly0->dirty = true;
+			chnl->ovly1->dirty = true;
 		}
 		break;
 	case MCDE_CONVERT_YCBCR_2_RGB:
@@ -2785,8 +2728,8 @@ void mcde_chnl_set_col_convert(struct mcde_chnl_state *chnl,
 		/* force update: */
 		if (chnl->transform == &chnl->ycbcr_2_rgb) {
 			chnl->transform = NULL;
-			chnl->ovly0->update = true;
-			chnl->ovly1->update = true;
+			chnl->ovly0->dirty = true;
+			chnl->ovly1->dirty = true;
 		}
 		break;
 	default:
@@ -2807,10 +2750,9 @@ int mcde_chnl_set_video_mode(struct mcde_chnl_state *chnl,
 
 	chnl->vmode = *vmode;
 
-	if (chnl->ovly0)
-		chnl->ovly0->update = true;
+	chnl->ovly0->dirty = true;
 	if (chnl->ovly1)
-		chnl->ovly1->update = true;
+		chnl->ovly1->dirty = true;
 
 	dev_vdbg(&mcde_dev->dev, "%s exit\n", __func__);
 
@@ -2876,9 +2818,9 @@ int mcde_chnl_apply(struct mcde_chnl_state *chnl)
 	if (!chnl->reserved)
 		return -EINVAL;
 
-	mutex_lock(&mcde_hw_lock);
+	mcde_lock(__func__, __LINE__);
 	ret = _mcde_chnl_apply(chnl);
-	mutex_unlock(&mcde_hw_lock);
+	mcde_unlock(__func__, __LINE__);
 
 	dev_vdbg(&mcde_dev->dev, "%s exit with ret %d\n", __func__, ret);
 
@@ -2895,7 +2837,7 @@ int mcde_chnl_update(struct mcde_chnl_state *chnl,
 	if (!chnl->reserved)
 		return -EINVAL;
 
-	mutex_lock(&mcde_hw_lock);
+	mcde_lock(__func__, __LINE__);
 	enable_mcde_hw();
 	if (!chnl->formatter_updated)
 		(void)update_channel_static_registers(chnl);
@@ -2907,7 +2849,7 @@ int mcde_chnl_update(struct mcde_chnl_state *chnl,
 
 	ret = _mcde_chnl_update(chnl, update_area, tripple_buffer);
 
-	mutex_unlock(&mcde_hw_lock);
+	mcde_unlock(__func__, __LINE__);
 
 	dev_vdbg(&mcde_dev->dev, "%s exit with ret %d\n", __func__, ret);
 
@@ -2918,6 +2860,13 @@ void mcde_chnl_put(struct mcde_chnl_state *chnl)
 {
 	dev_vdbg(&mcde_dev->dev, "%s\n", __func__);
 
+	if (chnl->enabled) {
+		stop_channel(chnl);
+		cancel_delayed_work(&hw_timeout_work);
+		disable_mcde_hw(false);
+		chnl->enabled = false;
+	}
+
 	chnl->reserved = false;
 	if (chnl->port.type == MCDE_PORTTYPE_DPI) {
 		if (chnl->port.phy.dpi.tv_mode) {
@@ -2933,10 +2882,10 @@ void mcde_chnl_stop_flow(struct mcde_chnl_state *chnl)
 {
 	dev_vdbg(&mcde_dev->dev, "%s\n", __func__);
 
-	mutex_lock(&mcde_hw_lock);
+	mcde_lock(__func__, __LINE__);
 	if (mcde_is_enabled && chnl->enabled)
-		disable_channel(chnl);
-	mutex_unlock(&mcde_hw_lock);
+		stop_channel(chnl);
+	mcde_unlock(__func__, __LINE__);
 
 	dev_vdbg(&mcde_dev->dev, "%s exit\n", __func__);
 }
@@ -2945,9 +2894,9 @@ void mcde_chnl_enable(struct mcde_chnl_state *chnl)
 {
 	dev_vdbg(&mcde_dev->dev, "%s\n", __func__);
 
-	mutex_lock(&mcde_hw_lock);
+	mcde_lock(__func__, __LINE__);
 	_mcde_chnl_enable(chnl);
-	mutex_unlock(&mcde_hw_lock);
+	mcde_unlock(__func__, __LINE__);
 
 	dev_vdbg(&mcde_dev->dev, "%s exit\n", __func__);
 }
@@ -2956,30 +2905,13 @@ void mcde_chnl_disable(struct mcde_chnl_state *chnl)
 {
 	dev_vdbg(&mcde_dev->dev, "%s\n", __func__);
 
-	mutex_lock(&mcde_hw_lock);
+	mcde_lock(__func__, __LINE__);
 	cancel_delayed_work(&hw_timeout_work);
-	/* This channel is disabled here */
-	chnl->enabled = false;
-	if (mcde_is_enabled && chnl->formatter_updated
-				&& chnl->port.type == MCDE_PORTTYPE_DSI)
-		wait_while_dsi_running(chnl->port.link);
-
-	if (chnl->formatter_updated) {
-		disable_formatter(&chnl->port);
-		chnl->formatter_updated = false;
-	}
-	if (chnl->esram_is_enabled) {
-		WARN_ON_ONCE(regulator_disable(regulator_esram_epod));
-		chnl->esram_is_enabled = false;
-	}
-	del_timer(&chnl->dsi_te_timer);
-	del_timer(&chnl->auto_sync_timer);
-	/*
-	 * Check if other channels can be disabled and
-	 * if the hardware can be shutdown
-	 */
+	/* The channel must be stopped before it is disabled */
+	WARN_ON_ONCE(chnl->state == CHNLSTATE_RUNNING);
 	disable_mcde_hw(false);
-	mutex_unlock(&mcde_hw_lock);
+	chnl->enabled = false;
+	mcde_unlock(__func__, __LINE__);
 
 	dev_vdbg(&mcde_dev->dev, "%s exit\n", __func__);
 }
@@ -3015,7 +2947,7 @@ struct mcde_ovly_state *mcde_ovly_get(struct mcde_chnl_state *chnl)
 		ovly->h = 0;
 		ovly->alpha_value = 0xFF;
 		ovly->alpha_source = MCDE_OVL1CONF2_BP_PER_PIXEL_ALPHA;
-		ovly->update = true;
+		ovly->dirty = true;
 		mcde_ovly_apply(ovly);
 	}
 
@@ -3030,7 +2962,7 @@ void mcde_ovly_put(struct mcde_ovly_state *ovly)
 		return;
 	if (ovly->regs.enabled) {
 		ovly->paddr = 0;
-		ovly->update = true;
+		ovly->dirty = true;
 		mcde_ovly_apply(ovly);/* REVIEW: API call calling API call! */
 	}
 	ovly->inuse = false;
@@ -3041,8 +2973,8 @@ void mcde_ovly_set_source_buf(struct mcde_ovly_state *ovly, u32 paddr)
 	if (!ovly->inuse)
 		return;
 
-	if (paddr == 0 || ovly->paddr == 0)
-		ovly->update = true;
+	ovly->dirty = paddr == 0 || ovly->paddr == 0;
+	ovly->dirty_buf = true;
 
 	ovly->paddr = paddr;
 }
@@ -3055,7 +2987,7 @@ void mcde_ovly_set_source_info(struct mcde_ovly_state *ovly,
 
 	ovly->stride = stride;
 	ovly->pix_fmt = pix_fmt;
-	ovly->update = true;
+	ovly->dirty = true;
 }
 
 void mcde_ovly_set_source_area(struct mcde_ovly_state *ovly,
@@ -3068,7 +3000,7 @@ void mcde_ovly_set_source_area(struct mcde_ovly_state *ovly,
 	ovly->src_y = y;
 	ovly->w = w;
 	ovly->h = h;
-	ovly->update = true;
+	ovly->dirty = true;
 }
 
 void mcde_ovly_set_dest_pos(struct mcde_ovly_state *ovly, u16 x, u16 y, u8 z)
@@ -3079,6 +3011,7 @@ void mcde_ovly_set_dest_pos(struct mcde_ovly_state *ovly, u16 x, u16 y, u8 z)
 	ovly->dst_x = x;
 	ovly->dst_y = y;
 	ovly->dst_z = z;
+	ovly->dirty = true;
 }
 
 void mcde_ovly_apply(struct mcde_ovly_state *ovly)
@@ -3086,16 +3019,21 @@ void mcde_ovly_apply(struct mcde_ovly_state *ovly)
 	if (!ovly->inuse)
 		return;
 
-	mutex_lock(&mcde_hw_lock);
+	mcde_lock(__func__, __LINE__);
 
-	ovly->regs.ch_id = ovly->chnl->id;
-	ovly->regs.enabled = ovly->paddr != 0;
-	ovly->regs.baseaddress0 = ovly->paddr;
-	ovly->regs.baseaddress1 = ovly->regs.baseaddress0 + ovly->stride;
-	/*TODO set to true if interlaced *//* REVIEW: Video mode interlaced? */
-	if (!ovly->regs.update)
-		ovly->regs.update = ovly->update;
-	ovly->update = false;
+	if (ovly->dirty || ovly->dirty_buf) {
+		ovly->regs.ch_id = ovly->chnl->id;
+		ovly->regs.enabled = ovly->paddr != 0;
+		ovly->regs.baseaddress0 = ovly->paddr;
+		ovly->regs.baseaddress1 =
+					ovly->regs.baseaddress0 + ovly->stride;
+		ovly->regs.dirty_buf = true;
+		ovly->dirty_buf = false;
+	}
+	if (!ovly->dirty) {
+		mcde_unlock(__func__, __LINE__);
+		return;
+	}
 
 	switch (ovly->pix_fmt) {/* REVIEW: Extract to table */
 	case MCDE_OVLYPIXFMT_RGB565:
@@ -3161,9 +3099,11 @@ void mcde_ovly_apply(struct mcde_ovly_state *ovly)
 	ovly->regs.col_conv = MCDE_OVL0CR_COLCCTRL_DISABLED;
 	ovly->regs.alpha_source = ovly->alpha_source;
 	ovly->regs.alpha_value = ovly->alpha_value;
-	ovly->chnl->transactionid++;
 
-	mutex_unlock(&mcde_hw_lock);
+	ovly->regs.dirty = true;
+	ovly->dirty = false;
+
+	mcde_unlock(__func__, __LINE__);
 
 	dev_vdbg(&mcde_dev->dev, "Overlay applied, idx=%d chnl=%d\n",
 						ovly->idx, ovly->chnl->id);
@@ -3280,6 +3220,92 @@ static void remove_clocks_and_power(struct platform_device *pdev)
 	regulator_put(regulator_mcde_epod);
 	regulator_put(regulator_esram_epod);
 }
+static void probe_hw(void)
+{
+	int i;
+	u8 major_version;
+	u8 minor_version;
+	u8 development_version;
+
+	dev_info(&mcde_dev->dev, "Probe HW\n");
+
+	/* Get MCDE HW version */
+	regulator_enable(regulator_mcde_epod);
+	clk_enable(clock_mcde);
+	major_version = (u8)mcde_rfld(MCDE_PID, MAJOR_VERSION);
+	minor_version = (u8)mcde_rfld(MCDE_PID, MINOR_VERSION);
+	development_version = (u8)mcde_rfld(MCDE_PID, DEVELOPMENT_VERSION);
+
+	dev_info(&mcde_dev->dev, "MCDE HW revision %u.%u.%u.%u\n",
+			major_version, minor_version, development_version,
+					mcde_rfld(MCDE_PID, METALFIX_VERSION));
+
+	clk_disable(clock_mcde);
+	regulator_disable(regulator_mcde_epod);
+
+	if (major_version == 3 && minor_version == 0 &&
+					development_version >= 8) {
+		hardware_version = MCDE_CHIP_VERSION_3_0_8;
+		dev_info(&mcde_dev->dev, "V2 HW\n");
+	} else if (major_version == 3 && minor_version == 0 &&
+					development_version >= 5) {
+		hardware_version = MCDE_CHIP_VERSION_3_0_5;
+		dev_info(&mcde_dev->dev, "V1 HW\n");
+	} else if (major_version == 1 && minor_version == 0 &&
+					development_version >= 4) {
+		hardware_version = MCDE_CHIP_VERSION_1_0_4;
+		mcde_dynamic_power_management = false;
+		num_channels = 2;
+		num_overlays = 3;
+		dev_info(&mcde_dev->dev, "V1_U5500 HW\n");
+	} else if (major_version == 4 && minor_version == 0 &&
+					development_version >= 4) {
+		hardware_version = MCDE_CHIP_VERSION_4_0_4;
+		dev_info(&mcde_dev->dev, "V2_U5500 HW\n");
+	} else {
+		dev_err(&mcde_dev->dev, "Unsupported HW version\n");
+	}
+
+	/* Init MCDE */
+	for (i = 0; i < num_overlays; i++)
+		overlays[i].idx = i;
+
+	if (hardware_version == MCDE_CHIP_VERSION_1_0_4 ||
+	    hardware_version == MCDE_CHIP_VERSION_4_0_4) {
+		channels[0].ovly0 = &overlays[0];
+		channels[0].ovly1 = &overlays[1];
+		channels[1].ovly0 = &overlays[2];
+		channels[1].ovly1 = NULL;
+	} else {
+		channels[0].ovly0 = &overlays[0];
+		channels[0].ovly1 = &overlays[1];
+		channels[1].ovly0 = &overlays[2];
+		channels[1].ovly1 = &overlays[3];
+		channels[2].ovly0 = &overlays[4];
+		channels[2].ovly1 = NULL;
+		channels[3].ovly0 = &overlays[5];
+		channels[3].ovly1 = NULL;
+	}
+
+	for (i = 0; i < num_channels; i++) {
+		channels[i].id = i;
+
+		channels[i].ovly0->chnl = &channels[i];
+		if (channels[i].ovly1)
+			channels[i].ovly1->chnl = &channels[i];
+
+		init_waitqueue_head(&channels[i].state_waitq);
+		init_waitqueue_head(&channels[i].vcmp_waitq);
+		init_timer(&channels[i].auto_sync_timer);
+		channels[i].auto_sync_timer.function =
+					watchdog_auto_sync_timer_function;
+
+		init_timer(&channels[i].dsi_te_timer);
+		channels[i].dsi_te_timer.function =
+					dsi_te_timer_function;
+		channels[i].dsi_te_timer.data = i;
+	}
+}
 
 static int __devinit mcde_probe(struct platform_device *pdev)
 {
@@ -3287,9 +3313,6 @@ static int __devinit mcde_probe(struct platform_device *pdev)
 	int i;
 	struct resource *res;
 	struct mcde_platform_data *pdata = pdev->dev.platform_data;
-	u8 major_version;
-	u8 minor_version;
-	u8 development_version;
 
 	if (!pdata) {
 		dev_dbg(&pdev->dev, "No platform data\n");
@@ -3371,102 +3394,14 @@ static int __devinit mcde_probe(struct platform_device *pdev)
 
 	INIT_DELAYED_WORK_DEFERRABLE(&hw_timeout_work, work_sleep_function);
 
-	enable_clocks_and_power(mcde_dev);
-
-	update_mcde_registers();
-	mcde_is_enabled = true;
-
-	schedule_delayed_work(&hw_timeout_work,
-					msecs_to_jiffies(MCDE_SLEEP_WATCHDOG));
-
-	major_version = MCDE_REG2VAL(MCDE_PID, MAJOR_VERSION,
-							mcde_rreg(MCDE_PID));
-	minor_version = MCDE_REG2VAL(MCDE_PID, MINOR_VERSION,
-							mcde_rreg(MCDE_PID));
-	development_version = MCDE_REG2VAL(MCDE_PID, DEVELOPMENT_VERSION,
-							mcde_rreg(MCDE_PID));
+	probe_hw();
 
-	dev_info(&mcde_dev->dev, "MCDE HW revision %u.%u.%u.%u\n",
-			major_version, minor_version, development_version,
-					mcde_rfld(MCDE_PID, METALFIX_VERSION));
-
-	if (major_version == 3 && minor_version == 0 &&
-					development_version >= 8) {
-		hardware_version = MCDE_CHIP_VERSION_3_0_8;
-		dev_info(&mcde_dev->dev, "V2 HW\n");
-	} else if (major_version == 3 && minor_version == 0 &&
-					development_version >= 5) {
-		hardware_version = MCDE_CHIP_VERSION_3_0_5;
-		dev_info(&mcde_dev->dev, "V1 HW\n");
-	} else if (major_version == 1 && minor_version == 0 &&
-					development_version >= 4) {
-		hardware_version = MCDE_CHIP_VERSION_1_0_4;
-		mcde_dynamic_power_management = false;
-		num_channels = 2;
-		num_overlays = 3;
-		dev_info(&mcde_dev->dev, "V1_U5500 HW\n");
-	} else if (major_version == 4 && minor_version == 0 &&
-					development_version >= 4) {
-		hardware_version = MCDE_CHIP_VERSION_4_0_4;
-		dev_info(&mcde_dev->dev, "V2_U5500 HW\n");
-	} else {
-		dev_err(&mcde_dev->dev, "Unsupported HW version\n");
-		ret = -ENOTSUPP;
-		goto failed_hardware_version;
-	}
-
-	for (i = 0; i < num_overlays; i++)
-		overlays[i].idx = i;
-
-	if (hardware_version == MCDE_CHIP_VERSION_1_0_4 ||
-	    hardware_version == MCDE_CHIP_VERSION_4_0_4) {
-		channels[0].ovly0 = &overlays[0];
-		channels[0].ovly1 = &overlays[1];
-		channels[1].ovly0 = &overlays[2];
-		channels[1].ovly1 = NULL;
-	} else {
-		channels[0].ovly0 = &overlays[0];
-		channels[0].ovly1 = &overlays[1];
-		channels[1].ovly0 = &overlays[2];
-		channels[1].ovly1 = &overlays[3];
-		channels[2].ovly0 = &overlays[4];
-		channels[2].ovly1 = NULL;
-		channels[3].ovly0 = &overlays[5];
-		channels[3].ovly1 = NULL;
-	}
-
-	for (i = 0; i < num_channels; i++) {
-		channels[i].id = i;
-
-		channels[i].ovly0->chnl = &channels[i];
-		if (channels[i].ovly1)
-			channels[i].ovly1->chnl = &channels[i];
-
-		init_waitqueue_head(&channels[i].waitq_hw);
-		init_timer(&channels[i].auto_sync_timer);
-		channels[i].auto_sync_timer.function =
-					watchdog_auto_sync_timer_function;
-
-		init_timer(&channels[i].dsi_te_timer);
-		channels[i].dsi_te_timer.function =
-					dsi_te_timer_function;
-		channels[i].dsi_te_timer.data = i;
-	}
-
-	ret = request_irq(mcde_irq, mcde_irq_handler, 0, "mcde",
-							&mcde_dev->dev);
-	if (ret) {
-		dev_dbg(&mcde_dev->dev, "Failed to request irq (irq=%d)\n",
-								mcde_irq);
-		goto failed_request_irq;
-	}
+	ret = enable_mcde_hw();
+	if (ret)
+		goto failed_mcde_enable;
 
 	return 0;
-
-failed_request_irq:
-failed_hardware_version:
-	disable_mcde_hw(true);
-	remove_clocks_and_power(pdev);
+failed_mcde_enable:
 failed_init_clocks:
 failed_map_dsi_io:
 failed_get_dsi_io:
@@ -3516,14 +3451,15 @@ static int mcde_resume(struct platform_device *pdev)
 {
 	dev_vdbg(&mcde_dev->dev, "%s\n", __func__);
 
-	mutex_lock(&mcde_hw_lock);
+	mcde_lock(__func__, __LINE__);
 
 	if (enable_mcde_hw()) {
-		mutex_unlock(&mcde_hw_lock);
+		mcde_unlock(__func__, __LINE__);
 		return -EINVAL;
 	}
 
-	mutex_unlock(&mcde_hw_lock);
+	mcde_unlock(__func__, __LINE__);
+
 	return 0;
 }
 
@@ -3533,17 +3469,17 @@ static int mcde_suspend(struct platform_device *pdev, pm_message_t state)
 
 	dev_vdbg(&mcde_dev->dev, "%s\n", __func__);
 
-	mutex_lock(&mcde_hw_lock);
+	mcde_lock(__func__, __LINE__);
 
 	cancel_delayed_work(&hw_timeout_work);
 
 	if (!mcde_is_enabled) {
-		mutex_unlock(&mcde_hw_lock);
+		mcde_unlock(__func__, __LINE__);
 		return 0;
 	}
 	disable_mcde_hw(true);
 
-	mutex_unlock(&mcde_hw_lock);
+	mcde_unlock(__func__, __LINE__);
 
 	return ret;
 }
-- 
cgit v1.2.3


From fa12475100b9aef0314a41a00fbf7d1889c7479e Mon Sep 17 00:00:00 2001
From: Jayarami Reddy <jayarami.reddy@stericsson.com>
Date: Mon, 26 Sep 2011 11:19:49 +0530
Subject: video: mcde: fix pixelwatermarklevel

In order to avoid  mcde underflow, the pixelwatermarklevel
is set based on mcde hardware version.

ST-Ericsson ID: 351086
ST-Ericsson Linux next: Not tested, ER 282779
ST-Ericsson FOSS-OUT ID: Trivial

Signed-off-by: Jayarami Reddy <jayarami.reddy@stericsson.com>
Change-Id: Ida63433629f84409c4c7c45c63dca4872fc1106a
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/31937
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
Reviewed-by: Anders BAUER <anders.bauer@stericsson.com>
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Reviewed-by: Jonas ABERG <jonas.aberg@stericsson.com>
---
 drivers/video/mcde/mcde_hw.c | 13 +++++++++++--
 include/video/mcde.h         |  5 ++---
 2 files changed, 13 insertions(+), 5 deletions(-)

diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index 5cdf4be73a6..320b53f51c9 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -841,6 +841,15 @@ static u8 portfmt2cdwin(enum mcde_port_pix_fmt pix_fmt)
 	}
 }
 
+static u32 get_input_fifo_size(void)
+{
+	if (hardware_version == MCDE_CHIP_VERSION_1_0_4 ||
+			hardware_version == MCDE_CHIP_VERSION_4_0_4)
+		return MCDE_INPUT_FIFO_SIZE_4_0_4;
+	else
+		return MCDE_INPUT_FIFO_SIZE_3_0_8;
+}
+
 static u32 get_output_fifo_size(enum mcde_fifo fifo)
 {
 	u32 ret = 1; /* Avoid div by zero */
@@ -1477,9 +1486,9 @@ static void update_overlay_registers(u8 idx, struct ovly_regs *regs,
 
 	if ((fifo == MCDE_FIFO_A || fifo == MCDE_FIFO_B) &&
 			regs->ppl >= fifo_size * 2)
-		pixelfetchwtrmrklevel = MCDE_PIXFETCH_LARGE_WTRMRKLVL;
+		pixelfetchwtrmrklevel = get_input_fifo_size() * 2;
 	else
-		pixelfetchwtrmrklevel = MCDE_PIXFETCH_MEDIUM_WTRMRKLVL;
+		pixelfetchwtrmrklevel = get_input_fifo_size() / 2;
 
 	if (port->update_auto_trig && port->type == MCDE_PORTTYPE_DSI) {
 		switch (port->sync_src) {
diff --git a/include/video/mcde.h b/include/video/mcde.h
index 6f6632405d8..b81d88af5fd 100644
--- a/include/video/mcde.h
+++ b/include/video/mcde.h
@@ -231,9 +231,8 @@ enum mcde_display_rotation {
 #define MCDE_FIFO_AB_SIZE 640
 #define MCDE_FIFO_C0C1_SIZE 160
 
-#define MCDE_PIXFETCH_LARGE_WTRMRKLVL 256
-#define MCDE_PIXFETCH_MEDIUM_WTRMRKLVL 64
-#define MCDE_PIXFETCH_SMALL_WTRMRKLVL 16
+#define MCDE_INPUT_FIFO_SIZE_4_0_4 80
+#define MCDE_INPUT_FIFO_SIZE_3_0_8 128
 
 /* Tv-out defines */
 #define MCDE_CONFIG_TVOUT_HBORDER 2
-- 
cgit v1.2.3


From 584d873aad0ed63c8685ae34220cb4db82ace5e7 Mon Sep 17 00:00:00 2001
From: Jimmy Rubin <jimmy.rubin@stericsson.com>
Date: Thu, 22 Sep 2011 15:25:43 +0200
Subject: video: mcde: Change timing for DPI formatter

Uses ACTIVE_VIDEO as frame interrupt generation event
instead of VSYNC

ST-Ericsson ID: 359538
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: Trivial
Signed-off-by: Jimmy Rubin <jimmy.rubin@stericsson.com>

Change-Id: I629651172bcbf7094141674c9ccf1655d54939ba
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/31973
Tested-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Reviewed-by: Marcus LORENTZON <marcus.xm.lorentzon@stericsson.com>
Reviewed-by: Fabien DESSENNE <fabien.dessenne@stericsson.com>
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
Reviewed-by: Jonas ABERG <jonas.aberg@stericsson.com>
---
 drivers/video/mcde/mcde_hw.c | 33 +++++++++++++++++++++++++++++++--
 1 file changed, 31 insertions(+), 2 deletions(-)

diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index 320b53f51c9..c85bee1872f 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -1618,6 +1618,7 @@ static void disable_flow(struct mcde_chnl_state *chnl)
 static void stop_channel(struct mcde_chnl_state *chnl)
 {
 	const struct mcde_port *port = &chnl->port;
+	bool dpi_lcd_mode;
 
 	dev_vdbg(&mcde_dev->dev, "%s\n", __func__);
 
@@ -1639,9 +1640,13 @@ static void stop_channel(struct mcde_chnl_state *chnl)
 	disable_flow(chnl);
 	/*
 	 * Needs to manually trigger VCOMP after the channel is
-	 * disabled for video mode.
+	 * disabled. For all channels using video mode
+	 * except for dpi lcd.
 	*/
-	if (chnl->port.update_auto_trig)
+	dpi_lcd_mode = (port->type == MCDE_PORTTYPE_DPI &&
+				!chnl->port.phy.dpi.tv_mode);
+
+	if (chnl->port.update_auto_trig && !dpi_lcd_mode)
 		mcde_wreg(MCDE_SISPP, 1 << chnl->id);
 }
 
@@ -1984,6 +1989,30 @@ void update_channel_registers(enum mcde_chnl chnl_id, struct chnl_regs *regs,
 			fidx * MCDE_DSIVID0DELAY1_GROUPOFFSET,
 			MCDE_DSIVID0DELAY1_TEREQDEL(0) |
 			MCDE_DSIVID0DELAY1_FRAMESTARTDEL(0));
+	} else if (port->type == MCDE_PORTTYPE_DPI &&
+						!port->phy.dpi.tv_mode) {
+		/* DPI LCD Mode */
+		if (chnl_id == MCDE_CHNL_A) {
+			mcde_wreg(MCDE_SYNCHCONFA,
+				MCDE_SYNCHCONFA_HWREQVEVENT_ENUM(
+							ACTIVE_VIDEO) |
+				MCDE_SYNCHCONFA_HWREQVCNT(
+							video_mode->yres - 1) |
+				MCDE_SYNCHCONFA_SWINTVEVENT_ENUM(
+							ACTIVE_VIDEO) |
+				MCDE_SYNCHCONFA_SWINTVCNT(
+							video_mode->yres - 1));
+		} else if (chnl_id == MCDE_CHNL_B) {
+			mcde_wreg(MCDE_SYNCHCONFB,
+				MCDE_SYNCHCONFB_HWREQVEVENT_ENUM(
+							ACTIVE_VIDEO) |
+				MCDE_SYNCHCONFB_HWREQVCNT(
+							video_mode->yres - 1) |
+				MCDE_SYNCHCONFB_SWINTVEVENT_ENUM(
+							ACTIVE_VIDEO) |
+				MCDE_SYNCHCONFB_SWINTVCNT(
+							video_mode->yres - 1));
+		}
 	}
 
 	if (regs->roten) {
-- 
cgit v1.2.3


From 041bc9ba0630fb375ec815e15fd9eee09b8dedbe Mon Sep 17 00:00:00 2001
From: Philippe Langlais <philippe.langlais@stericsson.com>
Date: Mon, 17 Oct 2011 13:05:31 +0200
Subject: ARM: ux500: video: Replace mach prcmu driver with mainlined version

The prcmu driver now exists in drivers/mfd

Signed-off-by: Jonas Aaberg <jonas.aberg@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/32057
---
 drivers/video/av8100/av8100.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/video/av8100/av8100.c b/drivers/video/av8100/av8100.c
index 45ba1cc523e..106f6c3fb31 100644
--- a/drivers/video/av8100/av8100.c
+++ b/drivers/video/av8100/av8100.c
@@ -28,7 +28,7 @@
 #include <linux/clk.h>
 #include <linux/list.h>
 #include <linux/regulator/consumer.h>
-#include <mach/prcmu.h>
+#include <linux/mfd/dbx500-prcmu.h>
 
 #include "av8100_regs.h"
 #include <video/av8100.h>
-- 
cgit v1.2.3


From 2f467c616b64a8eae35c274e62450841f52ebd85 Mon Sep 17 00:00:00 2001
From: Mian Yousaf Kaukab <mian.yousaf.kaukab@stericsson.com>
Date: Wed, 21 Sep 2011 11:27:43 +0200
Subject: ux500: mcde: use constant device ids

Changing device ids based on the current configuration makes it difficult
to define regulator and clocks mappings.

Change-Id: I0229ac3c2096a9621cd5aacdfc40a92423a10b83
Signed-off-by: Mian Yousaf Kaukab <mian.yousaf.kaukab@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/32124
Reviewed-by: Marcus LORENTZON <marcus.xm.lorentzon@stericsson.com>
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Reviewed-by: Jonas ABERG <jonas.aberg@stericsson.com>
Tested-by: Jonas ABERG <jonas.aberg@stericsson.com>
---
 arch/arm/mach-ux500/board-mop500-mcde.c | 10 ----------
 1 file changed, 10 deletions(-)

diff --git a/arch/arm/mach-ux500/board-mop500-mcde.c b/arch/arm/mach-ux500/board-mop500-mcde.c
index d7104eb5050..4460a0dab76 100644
--- a/arch/arm/mach-ux500/board-mop500-mcde.c
+++ b/arch/arm/mach-ux500/board-mop500-mcde.c
@@ -40,21 +40,11 @@ static struct delayed_work work_dispreg_hdmi;
 #endif
 
 enum {
-#ifdef CONFIG_DISPLAY_GENERIC_DSI_PRIMARY
 	PRIMARY_DISPLAY_ID,
-#endif
-#ifdef CONFIG_DISPLAY_GENERIC_DSI_SECONDARY
 	SECONDARY_DISPLAY_ID,
-#endif
-#ifdef CONFIG_DISPLAY_FICTIVE
 	FICTIVE_DISPLAY_ID,
-#endif
-#ifdef CONFIG_DISPLAY_AV8100_TERTIARY
 	AV8100_DISPLAY_ID,
-#endif
-#ifdef CONFIG_DISPLAY_AB8500_TERTIARY
 	AB8500_DISPLAY_ID,
-#endif
 	MCDE_NR_OF_DISPLAYS
 };
 static int display_initialized_during_boot;
-- 
cgit v1.2.3


From 7c8da6ef51f6cf7f9acf0fb46f8fc8df3016b131 Mon Sep 17 00:00:00 2001
From: Mian Yousaf Kaukab <mian.yousaf.kaukab@stericsson.com>
Date: Wed, 21 Sep 2011 11:30:31 +0200
Subject: ux500: mcde: update supply names

Regulator supply name update according to the mainline version of regulator
framework.

Change-Id: I4ab2cd0b2d015a8ce2e67ae5c040e81e6bdf78aa
Signed-off-by: Mian Yousaf Kaukab <mian.yousaf.kaukab@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/32125
Reviewed-by: Jonas ABERG <jonas.aberg@stericsson.com>
Tested-by: Jonas ABERG <jonas.aberg@stericsson.com>
---
 arch/arm/mach-ux500/board-mop500-mcde.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-ux500/board-mop500-mcde.c b/arch/arm/mach-ux500/board-mop500-mcde.c
index 4460a0dab76..9e967f72138 100644
--- a/arch/arm/mach-ux500/board-mop500-mcde.c
+++ b/arch/arm/mach-ux500/board-mop500-mcde.c
@@ -120,7 +120,7 @@ static struct mcde_port port0 = {
 static struct mcde_display_generic_platform_data generic_display0_pdata = {
 	.reset_delay = 1,
 #ifdef CONFIG_REGULATOR
-	.regulator_id = "v-display",
+	.regulator_id = "vaux12v5",
 	.min_supply_voltage = 2500000, /* 2.5V */
 	.max_supply_voltage = 2800000 /* 2.8V */
 #endif
@@ -182,7 +182,7 @@ static struct mcde_port subdisplay_port = {
 static struct mcde_display_generic_platform_data generic_subdisplay_pdata = {
 	.reset_delay = 1,
 #ifdef CONFIG_REGULATOR
-	.regulator_id = "v-display",
+	.regulator_id = "vaux12v5",
 	.min_supply_voltage = 2500000, /* 2.5V */
 	.max_supply_voltage = 2800000 /* 2.8V */
 #endif
@@ -301,7 +301,7 @@ static struct mcde_port port_tvout1 = {
 
 static struct ab8500_display_platform_data ab8500_display_pdata = {
 	.nr_regulators = 2,
-	.regulator_id  = {"v-tvout", "v-ab8500-AV-switch"},
+	.regulator_id  = {"vtvout", "vcc-N2158"},
 	.rgb_2_yCbCr_transform = &rgb_2_yCbCr_transform,
 };
 
@@ -405,7 +405,7 @@ static struct mcde_display_hdmi_platform_data av8100_hdmi_pdata = {
 	.reset_gpio = 0,
 	.reset_delay = 1,
 	.regulator_id = NULL, /* TODO: "display_main" */
-	.cvbs_regulator_id = "v-av8100-AV-switch",
+	.cvbs_regulator_id = "vcc-N2158",
 	.ddb_id = 1,
 	.rgb_2_yCbCr_transform = &rgb_2_yCbCr_transform,
 };
-- 
cgit v1.2.3


From 16f60e9aa54e84e9c7eb53e14c28735fc6b0e6fd Mon Sep 17 00:00:00 2001
From: Per Persson <per.xb.persson@stericsson.com>
Date: Thu, 29 Sep 2011 10:32:18 +0200
Subject: video: hdmi: Fix fb creation failure

This patch ensures that av8100 firmware download is completed before
proceeding with commands that require fw.

ST-Ericsson ID: 364550
ST-Ericsson Linux next: Not tested
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I0ee7005874bd43bfe1b557c05bdb12e2a9ebad1d
Signed-off-by: Per Persson <per.xb.persson@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/32469
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
---
 drivers/video/av8100/hdmi.c | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/drivers/video/av8100/hdmi.c b/drivers/video/av8100/hdmi.c
index 653cb5b2b23..0e06c648bed 100644
--- a/drivers/video/av8100/hdmi.c
+++ b/drivers/video/av8100/hdmi.c
@@ -260,7 +260,7 @@ static int edidread(struct hdmi_device *hdev, struct edid_read *edidread,
 		}
 	}
 
-	if (status.av8100_state < AV8100_OPMODE_INIT) {
+	if (status.av8100_state <= AV8100_OPMODE_INIT) {
 		if (av8100_download_firmware(I2C_INTERFACE) != 0) {
 			dev_err(hdev->dev, "av8100 dl fw FAIL\n");
 			return -EINVAL;
@@ -307,7 +307,7 @@ static int cecread(struct hdmi_device *hdev, u8 *src, u8 *dest, u8 *data_len,
 		}
 	}
 
-	if (status.av8100_state < AV8100_OPMODE_INIT) {
+	if (status.av8100_state <= AV8100_OPMODE_INIT) {
 		if (av8100_download_firmware(I2C_INTERFACE) != 0) {
 			dev_err(hdev->dev, "av8100 dl fw FAIL\n");
 			return -EINVAL;
@@ -378,7 +378,7 @@ static int cecsend(struct hdmi_device *hdev, u8 src, u8 dest, u8 data_len,
 		}
 	}
 
-	if (status.av8100_state < AV8100_OPMODE_INIT) {
+	if (status.av8100_state <= AV8100_OPMODE_INIT) {
 		if (av8100_download_firmware(I2C_INTERFACE) != 0) {
 			dev_err(hdev->dev, "av8100 dl fw FAIL\n");
 			return -EINVAL;
@@ -433,7 +433,7 @@ static int infofrsend(struct hdmi_device *hdev, u8 type, u8 version, u8 crc,
 		}
 	}
 
-	if (status.av8100_state < AV8100_OPMODE_INIT) {
+	if (status.av8100_state <= AV8100_OPMODE_INIT) {
 		if (av8100_download_firmware(I2C_INTERFACE) != 0) {
 			dev_err(hdev->dev, "av8100 dl fw FAIL\n");
 			return -EINVAL;
@@ -478,7 +478,7 @@ static int hdcpchkaesotp(struct hdmi_device *hdev, u8 *crc, u8 *progged)
 		}
 	}
 
-	if (status.av8100_state < AV8100_OPMODE_INIT) {
+	if (status.av8100_state <= AV8100_OPMODE_INIT) {
 		if (av8100_download_firmware(I2C_INTERFACE) != 0) {
 			dev_err(hdev->dev, "av8100 dl fw FAIL\n");
 			return -EINVAL;
@@ -525,7 +525,7 @@ static int hdcpfuseaes(struct hdmi_device *hdev, u8 *key, u8 crc, u8 *result)
 		}
 	}
 
-	if (status.av8100_state < AV8100_OPMODE_INIT) {
+	if (status.av8100_state <= AV8100_OPMODE_INIT) {
 		if (av8100_download_firmware(I2C_INTERFACE) != 0) {
 			dev_err(hdev->dev, "av8100 dl fw FAIL\n");
 			return -EINVAL;
@@ -579,7 +579,7 @@ static int hdcploadaes(struct hdmi_device *hdev, u8 block, u8 key_len, u8 *key,
 		}
 	}
 
-	if (status.av8100_state < AV8100_OPMODE_INIT) {
+	if (status.av8100_state <= AV8100_OPMODE_INIT) {
 		if (av8100_download_firmware(I2C_INTERFACE) != 0) {
 			dev_err(hdev->dev, "av8100 dl fw FAIL\n");
 			return -EINVAL;
@@ -625,7 +625,7 @@ static int hdcpauthencr(struct hdmi_device *hdev, u8 auth_type, u8 encr_type,
 		}
 	}
 
-	if (status.av8100_state < AV8100_OPMODE_INIT) {
+	if (status.av8100_state <= AV8100_OPMODE_INIT) {
 		if (av8100_download_firmware(I2C_INTERFACE) != 0) {
 			dev_err(hdev->dev, "av8100 dl fw FAIL\n");
 			return -EINVAL;
@@ -736,7 +736,7 @@ static int audiocfg(struct hdmi_device *hdev, struct audio_cfg *cfg)
 		}
 	}
 
-	if (status.av8100_state < AV8100_OPMODE_INIT) {
+	if (status.av8100_state <= AV8100_OPMODE_INIT) {
 		if (av8100_download_firmware(I2C_INTERFACE) != 0) {
 			dev_err(hdev->dev, "av8100 dl fw FAIL\n");
 			return -EINVAL;
-- 
cgit v1.2.3


From cb29f986b660b0dcefca1a1c28193b936994977f Mon Sep 17 00:00:00 2001
From: Robert Marklund <robert.marklund@stericsson.com>
Date: Wed, 28 Sep 2011 10:00:08 +0200
Subject: mach-ux500: mcde: Add prefix to mcde board func

Change-Id: Ia0e4f9ba5df5fe369df61dc1b843811990834e09
Signed-off-by: Robert Marklund <robert.marklund@stericsson.com>
---
 arch/arm/mach-ux500/board-u5500-mcde.c | 10 ++++------
 1 file changed, 4 insertions(+), 6 deletions(-)

diff --git a/arch/arm/mach-ux500/board-u5500-mcde.c b/arch/arm/mach-ux500/board-u5500-mcde.c
index 581ecc700de..25bcc14dadd 100644
--- a/arch/arm/mach-ux500/board-u5500-mcde.c
+++ b/arch/arm/mach-ux500/board-u5500-mcde.c
@@ -141,7 +141,6 @@ struct mcde_display_device generic_display0 = {
 };
 #endif /* CONFIG_DISPLAY_GENERIC_DSI_PRIMARY */
 
-#ifdef CONFIG_DISPLAY_SONY_ACX424AKP_DSI_PRIMARY
 static struct mcde_port port1 = {
 	.type = MCDE_PORTTYPE_DSI,
 	.mode = MCDE_PORTMODE_CMD,
@@ -206,7 +205,6 @@ struct mcde_display_device sony_acx424akp_display0 = {
 		.platform_data = &sony_acx424akp_display0_pdata,
 	},
 };
-#endif /* CONFIG_DISPLAY_SONY_ACX424AKP_DSI_PRIMARY */
 
 #ifdef CONFIG_DISPLAY_AV8100_TERTIARY
 static struct mcde_port port2 = {
@@ -480,7 +478,7 @@ static struct notifier_block framebuffer_nb = {
 	.notifier_call = framebuffer_postregistered_callback,
 };
 
-int __init init_display_devices(void)
+int __init init_u5500_display_devices(void)
 {
 	int ret = 0;
 
@@ -529,7 +527,7 @@ int __init init_display_devices(void)
 	return ret;
 }
 
-struct mcde_display_device *mcde_get_main_display(void)
+struct mcde_display_device *mcde_u5500_get_main_display(void)
 {
 #if defined(CONFIG_DISPLAY_GENERIC_DSI_PRIMARY) || \
 		defined(CONFIG_DISPLAY_SONY_ACX424AKP_DSI_PRIMARY)
@@ -542,7 +540,7 @@ struct mcde_display_device *mcde_get_main_display(void)
 #endif
 	return NULL;
 }
-EXPORT_SYMBOL(mcde_get_main_display);
+EXPORT_SYMBOL(mcde_u5500_get_main_display);
 
-module_init(init_display_devices);
+module_init(init_u5500_display_devices);
 #endif
-- 
cgit v1.2.3


From 70bd05c297aa2549f7b81ea10e1c341f5b48da36 Mon Sep 17 00:00:00 2001
From: Robert Marklund <robert.marklund@stericsson.com>
Date: Fri, 30 Sep 2011 22:26:26 +0200
Subject: u5500: mcde: Fix build errors

Make id build even without
CONFIG_MCDE_DISPLAY_HDMI_FB_AUTO_CREATE

Change-Id: I831fba4be5c12fd44f1228ac01ae943dcc17a911
Signed-off-by: Robert Marklund <robert.marklund@stericsson.com>
---
 arch/arm/mach-ux500/board-u5500-mcde.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-ux500/board-u5500-mcde.c b/arch/arm/mach-ux500/board-u5500-mcde.c
index 25bcc14dadd..7e538cf7b63 100644
--- a/arch/arm/mach-ux500/board-u5500-mcde.c
+++ b/arch/arm/mach-ux500/board-u5500-mcde.c
@@ -333,11 +333,12 @@ static int display_postregistered_callback(struct notifier_block *nb,
 		virtual_height = height * 3;
 #endif
 #ifdef CONFIG_DISPLAY_AV8100_TERTIARY
-	if (ddev->id == AV8100_DISPLAY_ID)
+	if (ddev->id == AV8100_DISPLAY_ID) {
 #ifdef CONFIG_MCDE_DISPLAY_HDMI_FB_AUTO_CREATE
 		hdmi_fb_onoff(ddev, 1, 0, 0);
 #endif /* CONFIG_MCDE_DISPLAY_HDMI_FB_AUTO_CREATE */
-	else
+		;
+	} else
 #endif /* CONFIG_DISPLAY_AV8100_TERTIARY */
 	{
 		struct mcde_fb *mfb;
-- 
cgit v1.2.3


From fa75f642f3e3f31326d9d293e6c1c0a3581cef1e Mon Sep 17 00:00:00 2001
From: John Fredriksson <john.xj.fredriksson@stericsson.com>
Date: Wed, 12 Oct 2011 10:59:21 +0200
Subject: mcde: Disable power down for normal blanking.

When a blanking call is made with FB_BLANK_NORMAL, exit without
powering down mcde hardware.

Signed-off-by: John Fredriksson <john.xj.fredriksson@stericsson.com>
Change-Id: I7414c38cd793170b31d5508bfe05f6968104f49a
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/33808
Reviewed-by: Philippe LANGLAIS <philippe.langlais@stericsson.com>
---
 drivers/video/mcde/mcde_fb.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/video/mcde/mcde_fb.c b/drivers/video/mcde/mcde_fb.c
index 3de569dded0..80751d24bea 100644
--- a/drivers/video/mcde/mcde_fb.c
+++ b/drivers/video/mcde/mcde_fb.c
@@ -594,6 +594,7 @@ static int mcde_fb_blank(int blank, struct fb_info *fbi)
 
 	switch (blank) {
 	case FB_BLANK_NORMAL:
+	break;
 	case FB_BLANK_VSYNC_SUSPEND:
 	case FB_BLANK_HSYNC_SUSPEND:
 	case FB_BLANK_POWERDOWN:
-- 
cgit v1.2.3


From 3afd76e869f7640b064a7d6d7d38fd02475a5661 Mon Sep 17 00:00:00 2001
From: John Fredriksson <john.xj.fredriksson@stericsson.com>
Date: Wed, 12 Oct 2011 11:20:28 +0200
Subject: mcde: Add implementation for colreg and cmap.

Since no hardware colormaps are available with the framebuffer,
change the framebuffer from TRUECOLOR to DIRECTCOLOR, which
implies that we should use a pseudocolor palette for applications
that require color map functionality.

Signed-off-by: John Fredriksson <john.xj.fredriksson@stericsson.com>
Change-Id: I7a5126db319a3d77077a39f552aff86ea3532374
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/33809
Reviewed-by: Philippe LANGLAIS <philippe.langlais@stericsson.com>
---
 drivers/video/mcde/mcde_fb.c | 56 +++++++++++++++++++++++++++++++++++++++++++-
 1 file changed, 55 insertions(+), 1 deletion(-)

diff --git a/drivers/video/mcde/mcde_fb.c b/drivers/video/mcde/mcde_fb.c
index 80751d24bea..0475a7dd1bd 100644
--- a/drivers/video/mcde/mcde_fb.c
+++ b/drivers/video/mcde/mcde_fb.c
@@ -307,7 +307,7 @@ static void init_fb(struct fb_info *fbi)
 
 	strlcpy(fbi->fix.id, "mcde_fb", sizeof(fbi->fix.id));
 	fbi->fix.type = FB_TYPE_PACKED_PIXELS;
-	fbi->fix.visual = FB_VISUAL_TRUECOLOR;
+	fbi->fix.visual = FB_VISUAL_DIRECTCOLOR;
 	fbi->fix.xpanstep = 1;
 	fbi->fix.ypanstep = 1;
 	fbi->flags = FBINFO_HWACCEL_DISABLED;
@@ -641,6 +641,51 @@ static int mcde_fb_ioctl(struct fb_info *fbi, unsigned int cmd,
 	return -EINVAL;
 }
 
+static int mcde_fb_setcolreg(unsigned int regno, unsigned int red,
+		unsigned int green, unsigned int blue, unsigned int transp,
+		struct fb_info *fbi)
+{
+	dev_vdbg(fbi->dev, "%s\n", __func__);
+
+	if (regno >= 256)
+		return 1;
+
+	if (regno < 17) {
+		u32 pseudo_val;
+		u32 r, g, b;
+
+		if (fbi->var.bits_per_pixel > 16) {
+			r = red >> 8;
+			g = green >> 8;
+			b = blue >> 8;
+		} else if (fbi->var.bits_per_pixel == 16) {
+			r = red >> (3 + 8);
+			g = green >> (2 + 8);
+			b = blue >> (3 + 8);
+		} else if (fbi->var.bits_per_pixel == 15) {
+			r = red >> (3 + 8);
+			g = green >> (3 + 8);
+			b = blue >> (3 + 8);
+		} else
+			r = b = g = (regno & 15);
+		pseudo_val  = r << fbi->var.red.offset;
+		pseudo_val |= g << fbi->var.green.offset;
+		pseudo_val |= b << fbi->var.blue.offset;
+
+		((u32 *)fbi->pseudo_palette)[regno] = pseudo_val;
+	}
+
+	return 0;
+}
+
+static int mcde_fb_setcmap(struct fb_cmap *cmap, struct fb_info *fbi)
+{
+	dev_vdbg(fbi->dev, "%s\n", __func__);
+
+	/*Nothing to see here, move along*/
+	return 0;
+}
+
 static struct fb_ops fb_ops = {
 	/* creg, cmap */
 	.owner          = THIS_MODULE,
@@ -657,6 +702,8 @@ static struct fb_ops fb_ops = {
 	.fb_pan_display = mcde_fb_pan_display,
 	.fb_rotate      = mcde_fb_rotate,
 	.fb_ioctl       = mcde_fb_ioctl,
+	.fb_setcolreg   = mcde_fb_setcolreg,
+	.fb_setcmap     = mcde_fb_setcmap,
 };
 
 /* FB driver */
@@ -729,6 +776,11 @@ struct fb_info *mcde_fb_create(struct mcde_display_device *ddev,
 	if (ret)
 		goto fb_register_failed;
 
+	ret = fb_alloc_cmap(&fbi->cmap, 256, 0);
+	if (ret)
+		dev_warn(&ddev->dev, "%s: Allocate color map memory failed!\n",
+				__func__);
+
 	ddev->fbi = fbi;
 
 #ifdef CONFIG_HAS_EARLYSUSPEND
@@ -789,6 +841,8 @@ void mcde_fb_destroy(struct mcde_display_device *dev)
 	if (dev->fictive == false)
 		unregister_early_suspend(&mfb->early_suspend);
 #endif
+	fb_dealloc_cmap(&dev->fbi->cmap);
+
 	unregister_framebuffer(dev->fbi);
 	free_fb_mem(dev->fbi);
 	framebuffer_release(dev->fbi);
-- 
cgit v1.2.3


From 558d296a33f73252a4c99ad83804ccd5f747b5ab Mon Sep 17 00:00:00 2001
From: John Fredriksson <john.xj.fredriksson@stericsson.com>
Date: Thu, 6 Oct 2011 13:38:38 +0200
Subject: av8100: Add av8100 firmware to kernel firmware.

Include av8100.fw in the kernel when CONFIG_AV8100 is enabled.

Signed-off-by: John Fredriksson <john.xj.fredriksson@stericsson.com>
Change-Id: Ie8a7c4b087858451bd75e04532f9a5399a69ba37
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/33810
Reviewed-by: Philippe LANGLAIS <philippe.langlais@stericsson.com>
---
 firmware/Makefile       |    1 +
 firmware/av8100.fw.ihex | 1281 +++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 1282 insertions(+)
 create mode 100644 firmware/av8100.fw.ihex

diff --git a/firmware/Makefile b/firmware/Makefile
index 0d15a3d113a..b74752ef53f 100644
--- a/firmware/Makefile
+++ b/firmware/Makefile
@@ -32,6 +32,7 @@ fw-shipped-$(CONFIG_ADAPTEC_STARFIRE) += adaptec/starfire_rx.bin \
 					 adaptec/starfire_tx.bin
 fw-shipped-$(CONFIG_ATARI_DSP56K) += dsp56k/bootstrap.bin
 fw-shipped-$(CONFIG_ATM_AMBASSADOR) += atmsar11.fw
+fw-shipped-$(CONFIG_AV8100) += av8100.fw
 fw-shipped-$(CONFIG_BNX2X) += bnx2x/bnx2x-e1-6.2.9.0.fw \
 			      bnx2x/bnx2x-e1h-6.2.9.0.fw \
 			      bnx2x/bnx2x-e2-6.2.9.0.fw
diff --git a/firmware/av8100.fw.ihex b/firmware/av8100.fw.ihex
new file mode 100644
index 00000000000..6dd51a790d6
--- /dev/null
+++ b/firmware/av8100.fw.ihex
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+:104ED000086B2BA6096B11A60A6B2F12CDA50280B9
+:104EE00035C411CC20A6076B4F086B1FA6096B4079
+:104EF000A60A6BA2020035A3020035A4021035A554
+:104F0000020035C411CC20A6076B4F086B2EA609F2
+:104F10006BE0A60A6B4F2F12CDA5020035A511CC70
+:104F200003264A8B11CC03264A6A11CC03264A5029
+:104F300011CC03264A6D274A57274A382713B69AB9
+:104F400035FACDFBBF84AEFA1A64FBCD3C12CD5BC3
+:104F50009B3BFBCD3C12CD5B41FBCD6412CD5B1F77
+:104F600012CD5B4412CD5A01264D5F12B61520FAC0
+:104F70001041FBCD6412CD5B1F12CD5B4412CD5AA4
+:104F800001264D5F12B619264A11B63A20086B4029
+:104F9000AA087B0A6B02AA0A7B0E2602A111B60A96
+:104FA0006B04AA0A7B0627163D35FACD3C12CD5B71
+:104FB000F91EF7BFF8B73EA4F8B6F9BFFABFC3F9B8
+:104FC000CD11A65A12CD1420F714F73FF8B73EA41E
+:104FD000F8B6F93FFA3FC3F9CD11A65A12CD1827FA
+:104FE000B803CE056B18A6022014A6062010A6084A
+:104FF0002006274A052714B68B4100A2410AA05B70
+:00000001FF
-- 
cgit v1.2.3


From 9f600531b75ea87370826a6e1b5e0a692146eeb6 Mon Sep 17 00:00:00 2001
From: Robert Marklund <robert.marklund@stericsson.com>
Date: Wed, 26 Oct 2011 09:59:03 +0200
Subject: ux500: mcde: Dont probe for uib on snowball

To make startup a little faster dont probe for uib
on snowball.

Change-Id: I4fa592dfbb924fb84f0f3f80675ab0229527615e
Signed-off-by: Robert Marklund <robert.marklund@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/35353
Reviewed-by: Philippe LANGLAIS <philippe.langlais@stericsson.com>
---
 arch/arm/mach-ux500/board-mop500-mcde.c | 29 +++++++++++++++++------------
 1 file changed, 17 insertions(+), 12 deletions(-)

diff --git a/arch/arm/mach-ux500/board-mop500-mcde.c b/arch/arm/mach-ux500/board-mop500-mcde.c
index 9e967f72138..efddf193e5f 100644
--- a/arch/arm/mach-ux500/board-mop500-mcde.c
+++ b/arch/arm/mach-ux500/board-mop500-mcde.c
@@ -712,18 +712,23 @@ int __init init_display_devices(void)
 		generic_display0_pdata.reset_gpio = MOP500_DISP1_RST_GPIO;
 
 #ifdef CONFIG_DISPLAY_GENERIC_DSI_PRIMARY_VSYNC
-	i2c0 = i2c_get_adapter(0);
-	if (i2c0) {
-		/*
-		* U8500-UIB has the TC35893 at 0x44 on I2C0, the
-		* ST-UIB has not.
-		*/
-		ret = i2c_smbus_xfer(i2c0, 0x44, 0, I2C_SMBUS_WRITE, 0,
-							I2C_SMBUS_QUICK, NULL);
-		i2c_put_adapter(i2c0);
-
-		/* ret == 0 => U8500 UIB connected */
-		generic_display0.synchronized_update = (ret == 0);
+	if (!machine_is_snowball()) {
+		i2c0 = i2c_get_adapter(0);
+		if (i2c0) {
+			/*
+			 * U8500-UIB has the TC35893 at 0x44 on I2C0, the
+			 * ST-UIB has not.
+			 */
+			ret = i2c_smbus_xfer(i2c0, 0x44, 0, I2C_SMBUS_WRITE, 0,
+					I2C_SMBUS_QUICK, NULL);
+			i2c_put_adapter(i2c0);
+
+			/* ret == 0 => U8500 UIB connected */
+			generic_display0.synchronized_update = (ret == 0);
+		}
+	} else {
+		/* Snowball dont have uib */
+		generic_display0.synchronized_update = 0;
 	}
 #endif
 
-- 
cgit v1.2.3


From 88c3e6c67181a954a23d0b3eb217a2670caa7233 Mon Sep 17 00:00:00 2001
From: Robert Marklund <robert.marklund@stericsson.com>
Date: Wed, 26 Oct 2011 15:02:03 +0200
Subject: ux500: mcde: Remove unnessesary delay for av8100

Remove unessesary delay for av8100 during startup.
Snowball have access to the clock for av8100 from the
start so no need to wait a long time in vain.

Change-Id: I383d9e3cb4e48c511ca869fb3b680937326959da
Signed-off-by: Robert Marklund <robert.marklund@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/35356
Reviewed-by: Marcus LORENTZON <marcus.xm.lorentzon@stericsson.com>
Reviewed-by: Philippe LANGLAIS <philippe.langlais@stericsson.com>
---
 arch/arm/mach-ux500/board-mop500-mcde.c | 16 ++++++++++------
 1 file changed, 10 insertions(+), 6 deletions(-)

diff --git a/arch/arm/mach-ux500/board-mop500-mcde.c b/arch/arm/mach-ux500/board-mop500-mcde.c
index efddf193e5f..ff0d278fd8e 100644
--- a/arch/arm/mach-ux500/board-mop500-mcde.c
+++ b/arch/arm/mach-ux500/board-mop500-mcde.c
@@ -684,7 +684,6 @@ static struct notifier_block framebuffer_nb = {
 int __init init_display_devices(void)
 {
 	int ret = 0;
-
 #ifdef CONFIG_DISPLAY_GENERIC_DSI_PRIMARY_VSYNC
 	struct i2c_adapter *i2c0;
 #endif
@@ -750,11 +749,16 @@ int __init init_display_devices(void)
 #endif
 
 #ifdef CONFIG_DISPLAY_AV8100_TERTIARY
-	INIT_DELAYED_WORK_DEFERRABLE(&work_dispreg_hdmi,
-			delayed_work_dispreg_hdmi);
-
-	schedule_delayed_work(&work_dispreg_hdmi,
-			msecs_to_jiffies(DISPREG_HDMI_DELAY));
+	/* Snowball dont need this delay at all */
+	if (machine_is_snowball())
+		delayed_work_dispreg_hdmi(NULL);
+	else {
+		INIT_DELAYED_WORK_DEFERRABLE(&work_dispreg_hdmi,
+				delayed_work_dispreg_hdmi);
+
+		schedule_delayed_work(&work_dispreg_hdmi,
+				msecs_to_jiffies(DISPREG_HDMI_DELAY));
+	}
 #endif
 #ifdef CONFIG_DISPLAY_AB8500_TERTIARY
 	ret = mcde_display_device_register(&tvout_ab8500_display);
-- 
cgit v1.2.3


From 488b9b72171b93ac400645b5135a2b3ea4e48220 Mon Sep 17 00:00:00 2001
From: Marcus Lorentzon <marcus.xm.lorentzon@stericsson.com>
Date: Thu, 29 Sep 2011 18:39:34 +0200
Subject: video: mcde: Add fps logging

Add debugfs support for enabling frame rate logging to dmesg and
getting latest fps metric.

ST-Ericsson ID: 364378
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I8d6f1447fb386b7b4d96750652602a5b9b1e8b0c
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/32397
Reviewed-by: Marcus LORENTZON <marcus.xm.lorentzon@stericsson.com>
Tested-by: Marcus LORENTZON <marcus.xm.lorentzon@stericsson.com>
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Reviewed-by: Jonas ABERG <jonas.aberg@stericsson.com>
---
 drivers/video/mcde/Makefile       |  11 +-
 drivers/video/mcde/mcde_debugfs.c | 207 ++++++++++++++++++++++++++++++++++++++
 drivers/video/mcde/mcde_debugfs.h |  25 +++++
 drivers/video/mcde/mcde_hw.c      |  12 ++-
 4 files changed, 251 insertions(+), 4 deletions(-)
 create mode 100644 drivers/video/mcde/mcde_debugfs.c
 create mode 100644 drivers/video/mcde/mcde_debugfs.h

diff --git a/drivers/video/mcde/Makefile b/drivers/video/mcde/Makefile
index 63ffeaec154..ab86a074005 100644
--- a/drivers/video/mcde/Makefile
+++ b/drivers/video/mcde/Makefile
@@ -1,6 +1,11 @@
-
-mcde-objs			:= mcde_mod.o mcde_hw.o mcde_dss.o mcde_display.o mcde_bus.o mcde_fb.o
-obj-$(CONFIG_FB_MCDE)		+= mcde.o
+mcde-objs		+= mcde_mod.o
+mcde-objs		+= mcde_hw.o
+mcde-objs		+= mcde_dss.o
+mcde-objs		+= mcde_display.o
+mcde-objs		+= mcde_bus.o
+mcde-objs		+= mcde_fb.o
+mcde-objs		+= mcde_debugfs.o
+obj-$(CONFIG_FB_MCDE)	+= mcde.o
 
 obj-$(CONFIG_MCDE_DISPLAY_GENERIC_DSI)		+= display-generic_dsi.o
 obj-$(CONFIG_MCDE_DISPLAY_SONY_ACX424AKP_DSI)   += display-sony_acx424akp_dsi.o
diff --git a/drivers/video/mcde/mcde_debugfs.c b/drivers/video/mcde/mcde_debugfs.c
new file mode 100644
index 00000000000..0ef6cbb3715
--- /dev/null
+++ b/drivers/video/mcde/mcde_debugfs.c
@@ -0,0 +1,207 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2010
+ *
+ * ST-Ericsson MCDE base driver
+ *
+ * Author: Marcus Lorentzon <marcus.xm.lorentzon@stericsson.com>
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+
+#include <linux/kernel.h>
+#include <linux/device.h>
+#include <linux/stat.h>
+#include <linux/time.h>
+#include <linux/debugfs.h>
+#include <linux/slab.h>
+#include <asm/page.h>
+
+#include "mcde_debugfs.h"
+
+#define MAX_NUM_OVERLAYS 2
+#define MAX_NUM_CHANNELS 4
+#define DEFAULT_DMESG_FPS_LOG_INTERVAL 100
+
+struct fps_info {
+	u32 enable_dmesg;
+	u32 interval_ms;
+	struct timespec timestamp_last;
+	u32 frame_counter_last;
+	u32 frame_counter;
+	u32 fpks;
+};
+
+struct overlay_info {
+	u8 id;
+	struct dentry *dentry;
+	struct fps_info fps;
+};
+
+struct channel_info {
+	u8 id;
+	struct dentry *dentry;
+	struct mcde_chnl_state *chnl;
+	struct fps_info fps;
+	struct overlay_info overlays[MAX_NUM_OVERLAYS];
+};
+
+static struct mcde_info {
+	struct device *dev;
+	struct dentry *dentry;
+	struct channel_info channels[MAX_NUM_CHANNELS];
+} mcde;
+
+/* Requires: lhs > rhs */
+static inline u32 timespec_ms_diff(struct timespec lhs, struct timespec rhs)
+{
+	struct timespec tmp_ts = timespec_sub(lhs, rhs);
+	u64 tmp_ns = (u64)timespec_to_ns(&tmp_ts);
+	do_div(tmp_ns, NSEC_PER_MSEC);
+	return (u32)tmp_ns;
+}
+
+/* Returns "frames per 1000 secs", divide by 1000 to get fps with 3 decimals */
+static u32 update_fps(struct fps_info *fps)
+{
+	struct timespec now;
+	u32 fpks = 0, ms_since_last, num_frames;
+
+	getrawmonotonic(&now);
+	fps->frame_counter++;
+
+	ms_since_last = timespec_ms_diff(now, fps->timestamp_last);
+	num_frames = fps->frame_counter - fps->frame_counter_last;
+	if (num_frames > 1 && ms_since_last >= fps->interval_ms) {
+		fpks = (num_frames * 1000000) / ms_since_last;
+		fps->timestamp_last = now;
+		fps->frame_counter_last = fps->frame_counter;
+		fps->fpks = fpks;
+	}
+
+	return fpks;
+}
+
+static void update_chnl_fps(struct channel_info *ci)
+{
+	u32 fpks = update_fps(&ci->fps);
+	if (fpks && ci->fps.enable_dmesg)
+		dev_info(mcde.dev, "FPS: chnl=%d fps=%d.%.3d\n", ci->id,
+						fpks / 1000, fpks % 1000);
+}
+
+static void update_ovly_fps(struct channel_info *ci, struct overlay_info *oi)
+{
+	u32 fpks = update_fps(&oi->fps);
+	if (fpks && oi->fps.enable_dmesg)
+		dev_info(mcde.dev, "FPS: ovly=%d.%d fps=%d.%.3d\n", ci->id,
+					oi->id, fpks / 1000, fpks % 1000);
+}
+
+int mcde_debugfs_create(struct device *dev)
+{
+	if (mcde.dev)
+		return -EBUSY;
+
+	mcde.dentry = debugfs_create_dir("mcde", NULL);
+	if (!mcde.dentry)
+		return -ENOMEM;
+	mcde.dev = dev;
+
+	return 0;
+}
+
+static struct channel_info *find_chnl(u8 chnl_id)
+{
+	if (chnl_id > MAX_NUM_CHANNELS)
+		return NULL;
+	return &mcde.channels[chnl_id];
+}
+
+static struct overlay_info *find_ovly(struct channel_info *ci, u8 ovly_id)
+{
+	if (!ci || ovly_id > MAX_NUM_OVERLAYS)
+		return NULL;
+	return &ci->overlays[ovly_id];
+}
+
+static void create_fps_files(struct dentry *dentry, struct fps_info *fps)
+{
+	debugfs_create_u32("frame_counter", S_IRUGO, dentry,
+							&fps->frame_counter);
+	debugfs_create_u32("frames_per_ksecs", S_IRUGO, dentry, &fps->fpks);
+	debugfs_create_u32("interval_ms", S_IRUGO|S_IWUGO, dentry,
+							&fps->interval_ms);
+	debugfs_create_u32("dmesg", S_IRUGO|S_IWUGO, dentry,
+							&fps->enable_dmesg);
+}
+
+int mcde_debugfs_channel_create(u8 chnl_id, struct mcde_chnl_state *chnl)
+{
+	struct channel_info *ci = find_chnl(chnl_id);
+	char name[10];
+
+	if (!chnl || !ci)
+		return -EINVAL;
+	if (ci->chnl)
+		return -EBUSY;
+
+	snprintf(name, sizeof(name), "chnl%d", chnl_id);
+	ci->dentry = debugfs_create_dir(name, mcde.dentry);
+	if (!ci->dentry)
+		return -ENOMEM;
+
+	create_fps_files(ci->dentry, &ci->fps);
+
+	ci->fps.interval_ms = DEFAULT_DMESG_FPS_LOG_INTERVAL;
+	ci->id = chnl_id;
+	ci->chnl = chnl;
+
+	return 0;
+}
+
+int mcde_debugfs_overlay_create(u8 chnl_id, u8 ovly_id)
+{
+	struct channel_info *ci = find_chnl(chnl_id);
+	struct overlay_info *oi = find_ovly(ci, ovly_id);
+	char name[10];
+
+	if (!oi || !ci || ovly_id >= MAX_NUM_OVERLAYS)
+		return -EINVAL;
+	if (oi->dentry)
+		return -EBUSY;
+
+	snprintf(name, sizeof(name), "ovly%d", ovly_id);
+	oi->dentry = debugfs_create_dir(name, ci->dentry);
+	if (!oi->dentry)
+		return -ENOMEM;
+
+	create_fps_files(oi->dentry, &oi->fps);
+
+	oi->fps.interval_ms = DEFAULT_DMESG_FPS_LOG_INTERVAL;
+	oi->id = ovly_id;
+
+	return 0;
+}
+
+void mcde_debugfs_channel_update(u8 chnl_id)
+{
+	struct channel_info *ci = find_chnl(chnl_id);
+
+	if (!ci || !ci->chnl)
+		return;
+
+	update_chnl_fps(ci);
+}
+
+void mcde_debugfs_overlay_update(u8 chnl_id, u8 ovly_id)
+{
+	struct channel_info *ci = find_chnl(chnl_id);
+	struct overlay_info *oi = find_ovly(ci, ovly_id);
+
+	if (!oi || !oi->dentry)
+		return;
+
+	update_ovly_fps(ci, oi);
+}
+
diff --git a/drivers/video/mcde/mcde_debugfs.h b/drivers/video/mcde/mcde_debugfs.h
new file mode 100644
index 00000000000..9f1e7f18ea5
--- /dev/null
+++ b/drivers/video/mcde/mcde_debugfs.h
@@ -0,0 +1,25 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2010
+ *
+ * ST-Ericsson MCDE base driver
+ *
+ * Author: Marcus Lorentzon <marcus.xm.lorentzon@stericsson.com>
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+
+#ifndef __MCDE_DEBUGFS__H__
+#define __MCDE_DEBUGFS__H__
+
+#include <video/mcde.h>
+
+int mcde_debugfs_create(struct device *dev);
+int mcde_debugfs_channel_create(u8 chnl_id, struct mcde_chnl_state *chnl);
+int mcde_debugfs_overlay_create(u8 chnl_id, u8 ovly_id);
+
+void mcde_debugfs_channel_update(u8 chnl_id);
+void mcde_debugfs_overlay_update(u8 chnl_id, u8 ovly_id);
+
+#endif /* __MCDE_DEBUGFS__H__ */
+
diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index c85bee1872f..49ecc332ab5 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -29,6 +29,7 @@
 #include <video/mcde.h>
 #include "dsilink_regs.h"
 #include "mcde_regs.h"
+#include "mcde_debugfs.h"
 
 
 /* MCDE channel states
@@ -2632,8 +2633,10 @@ static void chnl_update_overlay(struct mcde_chnl_state *chnl,
 	if (!ovly)
 		return;
 
-	if (ovly->regs.dirty_buf)
+	if (ovly->regs.dirty_buf) {
 		update_overlay_registers_on_the_fly(ovly->idx, &ovly->regs);
+		mcde_debugfs_overlay_update(chnl->id, ovly->idx);
+	}
 	if (ovly->regs.dirty) {
 		chnl_ovly_pixel_format_apply(chnl, ovly);
 		update_overlay_registers(ovly->idx, &ovly->regs, &chnl->port,
@@ -2684,6 +2687,7 @@ static int _mcde_chnl_update(struct mcde_chnl_state *chnl,
 		chnl_update_non_continous(chnl);
 
 	dev_vdbg(&mcde_dev->dev, "Channel updated, chnl=%d\n", chnl->id);
+	mcde_debugfs_channel_update(chnl->id);
 	return 0;
 }
 
@@ -3325,6 +3329,7 @@ static void probe_hw(void)
 		channels[3].ovly1 = NULL;
 	}
 
+	mcde_debugfs_create(&mcde_dev->dev);
 	for (i = 0; i < num_channels; i++) {
 		channels[i].id = i;
 
@@ -3342,6 +3347,11 @@ static void probe_hw(void)
 		channels[i].dsi_te_timer.function =
 					dsi_te_timer_function;
 		channels[i].dsi_te_timer.data = i;
+
+		mcde_debugfs_channel_create(i, &channels[i]);
+		mcde_debugfs_overlay_create(i, 0);
+		if (channels[i].ovly1)
+			mcde_debugfs_overlay_create(i, 1);
 	}
 }
 
-- 
cgit v1.2.3


From 01a0eef37648cbe27e6ae7c491a93e22eb83f1b4 Mon Sep 17 00:00:00 2001
From: Per Persson <per.xb.persson@stericsson.com>
Date: Thu, 29 Sep 2011 08:25:07 +0200
Subject: video: av8100: Debug new chip version

New chip cut version 3.0 is detected.

ST-Ericsson ID: 364509
ST-Ericsson Linux next: Not tested
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: Ieee8066728ff57d244c349bc470d743196c372a7
Signed-off-by: Per Persson <per.xb.persson@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/32432
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
---
 drivers/video/av8100/av8100.c | 26 ++++++++++++++++++--------
 1 file changed, 18 insertions(+), 8 deletions(-)

diff --git a/drivers/video/av8100/av8100.c b/drivers/video/av8100/av8100.c
index 106f6c3fb31..4b3fee2ff3c 100644
--- a/drivers/video/av8100/av8100.c
+++ b/drivers/video/av8100/av8100.c
@@ -36,7 +36,11 @@
 #include <linux/firmware.h>
 
 #define AV8100_FW_FILENAME "av8100.fw"
-
+#define CUT_STR_0 "2.1"
+#define CUT_STR_1 "2.2"
+#define CUT_STR_3 "2.3"
+#define CUT_STR_30 "3.0"
+#define CUT_STR_UNKNOWN ""
 #define AV8100_DEVNR_DEFAULT 0
 
 /* Interrupts */
@@ -2517,6 +2521,8 @@ int av8100_download_firmware(enum interface_type if_type)
 	release_firmware(fw_file);
 
 	if (adev->chip_version != 1) {
+		char *cut_str;
+
 		/* Get cut version */
 		retval = read_single_byte(i2c, AV8100_CUTVER_OFFSET, &val);
 		if (retval) {
@@ -2525,19 +2531,23 @@ int av8100_download_firmware(enum interface_type if_type)
 		}
 
 		switch (val) {
-		case 0:
-			dev_dbg(adev->dev, "Cut ver 0 (2.1)\n");
+		case 0x00:
+			cut_str = CUT_STR_0;
+			break;
+		case 0x01:
+			cut_str = CUT_STR_1;
 			break;
-		case 1:
-			dev_dbg(adev->dev, "Cut ver 1 (2.2)\n");
+		case 0x03:
+			cut_str = CUT_STR_3;
 			break;
-		case 3:
-			dev_dbg(adev->dev, "Cut ver 3 (2.3)\n");
+		case 0x30:
+			cut_str = CUT_STR_30;
 			break;
 		default:
-			dev_dbg(adev->dev, "Cut ver %d\n", val);
+			cut_str = CUT_STR_UNKNOWN;
 			break;
 		}
+		dev_dbg(adev->dev, "Cut ver %d %s\n", val, cut_str);
 	}
 
 	av8100_set_state(adev, AV8100_OPMODE_IDLE);
-- 
cgit v1.2.3


From 4397109813d559f2732cf7d1a2e8a69116605eee Mon Sep 17 00:00:00 2001
From: Per Persson <per.xb.persson@stericsson.com>
Date: Thu, 29 Sep 2011 10:10:07 +0200
Subject: video: av8100: Fix wrong loop max value

The calculation of a max counter is corrected.

ST-Ericsson ID: 364552
ST-Ericsson Linux next: Not tested
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I4505ede69b1f1b36e27307db02f9ab2778c97341
Signed-off-by: Per Persson <per.xb.persson@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/32463
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
---
 drivers/video/av8100/av8100.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/video/av8100/av8100.c b/drivers/video/av8100/av8100.c
index 4b3fee2ff3c..0b4de42be4a 100644
--- a/drivers/video/av8100/av8100.c
+++ b/drivers/video/av8100/av8100.c
@@ -2497,7 +2497,7 @@ int av8100_download_firmware(enum interface_type if_type)
 
 	/* Wait Internal Micro controler ready */
 	cnt = 0;
-	cnt_max = sizeof(waittime_retry);
+	cnt_max = sizeof(waittime_retry) / sizeof(waittime_retry[0]);
 	retval = av8100_reg_gen_status_r(NULL, NULL, NULL, &uc,
 		NULL, NULL);
 	while ((retval == 0) && (uc != 0x1) && (cnt < cnt_max)) {
@@ -3756,7 +3756,7 @@ int av8100_conf_w(enum av8100_command_type command_type,
 		/* Get the first return byte */
 		mdelay(AV8100_WAITTIME_1MS);
 		cnt = 0;
-		cnt_max = sizeof(waittime_retry);
+		cnt_max = sizeof(waittime_retry) / sizeof(waittime_retry[0]);
 		retval = get_command_return_first(i2c, command_type);
 		while (retval && (cnt < cnt_max)) {
 			mdelay(waittime_retry[cnt]);
@@ -3832,7 +3832,7 @@ int av8100_conf_w_raw(enum av8100_command_type command_type,
 	/* Get the first return byte */
 	mdelay(AV8100_WAITTIME_1MS);
 	cnt = 0;
-	cnt_max = sizeof(waittime_retry);
+	cnt_max = sizeof(waittime_retry) / sizeof(waittime_retry[0]);
 	retval = get_command_return_first(i2c, command_type);
 	while (retval && (cnt < cnt_max)) {
 		mdelay(waittime_retry[cnt]);
-- 
cgit v1.2.3


From 0bfb484f6a36be284d344e41f600b8025004f766 Mon Sep 17 00:00:00 2001
From: Per Persson <per.xb.persson@stericsson.com>
Date: Thu, 29 Sep 2011 16:38:17 +0200
Subject: video: av8100: Improve error handling

Avoid powerdown when fw failed.

ST-Ericsson ID: 364550
ST-Ericsson Linux next: Not tested
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I0386a2e8f3ce8d84ca30e7cd3c81df19a43a47ab
Signed-off-by: Per Persson <per.xb.persson@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/32559
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Reviewed-by: Jonas ABERG <jonas.aberg@stericsson.com>
---
 drivers/video/mcde/display-av8100.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/video/mcde/display-av8100.c b/drivers/video/mcde/display-av8100.c
index 31e46b138e1..69b5afdd7dd 100644
--- a/drivers/video/mcde/display-av8100.c
+++ b/drivers/video/mcde/display-av8100.c
@@ -916,11 +916,10 @@ static int hdmi_set_video_mode(
 		}
 	}
 
-	if (status.av8100_state < AV8100_OPMODE_IDLE) {
+	if (status.av8100_state <= AV8100_OPMODE_IDLE) {
 		ret = av8100_download_firmware(I2C_INTERFACE);
 		if (ret) {
 			dev_err(&dev->dev, "av8100_download_firmware failed\n");
-			av8100_powerdown();
 			return ret;
 		}
 	}
-- 
cgit v1.2.3


From f1c603b0ab45a1e62821665093a784c9c592fb27 Mon Sep 17 00:00:00 2001
From: Jayarami Reddy <jayarami.reddy@stericsson.com>
Date: Tue, 27 Sep 2011 10:41:28 +0530
Subject: arm: ux500: fix compilation errors

fix compilation errors when HDMI_FB_AUTO_CREATE
is not set for db5500

ST-Ericsson ID: 365167
ST-Ericsson Linux next: Not tested, ER 282779
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I3d1b79b350c2672671a4d71b11a3103ec603d6de
Signed-off-by: Jayarami Reddy <jayarami.reddy@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/32193
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Reviewed-by: Rabin VINCENT <rabin.vincent@stericsson.com>
---
 arch/arm/mach-ux500/board-u5500-mcde.c | 64 +++++++++++++++++-----------------
 1 file changed, 32 insertions(+), 32 deletions(-)

diff --git a/arch/arm/mach-ux500/board-u5500-mcde.c b/arch/arm/mach-ux500/board-u5500-mcde.c
index 7e538cf7b63..54245db882c 100644
--- a/arch/arm/mach-ux500/board-u5500-mcde.c
+++ b/arch/arm/mach-ux500/board-u5500-mcde.c
@@ -278,6 +278,9 @@ static int display_postregistered_callback(struct notifier_block *nb,
 	u32 rotate = FB_ROTATE_UR;
 	u32 rotate_angle = 0;
 	struct fb_info *fbi;
+#ifdef CONFIG_DISPDEV
+	struct mcde_fb *mfb;
+#endif
 
 	struct mcde_display_sony_acx424akp_platform_data *pdata =
 					ddev->dev.platform_data;
@@ -337,43 +340,40 @@ static int display_postregistered_callback(struct notifier_block *nb,
 #ifdef CONFIG_MCDE_DISPLAY_HDMI_FB_AUTO_CREATE
 		hdmi_fb_onoff(ddev, 1, 0, 0);
 #endif /* CONFIG_MCDE_DISPLAY_HDMI_FB_AUTO_CREATE */
-		;
-	} else
+		goto out;
+	}
 #endif /* CONFIG_DISPLAY_AV8100_TERTIARY */
-	{
-		struct mcde_fb *mfb;
-		/* Create frame buffer */
-		fbi = mcde_fb_create(ddev,
-			width, height,
-			virtual_width, virtual_height,
-			ddev->default_pixel_format,
-			rotate);
-
-		if (IS_ERR(fbi)) {
-			dev_warn(&ddev->dev,
-				"Failed to create fb for display %s\n",
-						ddev->name);
-			goto display_postregistered_callback_err;
-		} else {
-			dev_info(&ddev->dev, "Framebuffer created (%s)\n",
-						ddev->name);
-		}
+
+	/* Create frame buffer */
+	fbi = mcde_fb_create(ddev,
+		width, height,
+		virtual_width, virtual_height,
+		ddev->default_pixel_format,
+		rotate);
+
+	if (IS_ERR(fbi)) {
+		dev_warn(&ddev->dev,
+			"Failed to create fb for display %s\n", ddev->name);
+		goto display_postregistered_callback_err;
+	} else {
+		dev_info(&ddev->dev, "Framebuffer created (%s)\n", ddev->name);
+	}
 
 #ifdef CONFIG_DISPDEV
-		mfb = to_mcde_fb(fbi);
-		/* Create a dispdev overlay for this display */
-		if (dispdev_create(ddev, true, mfb->ovlys[0]) < 0) {
-			dev_warn(&ddev->dev,
-				"Failed to create disp for display %s\n",
-						ddev->name);
-			goto display_postregistered_callback_err;
-		} else {
-			dev_info(&ddev->dev, "Disp dev created for (%s)\n",
-						ddev->name);
-		}
-#endif
+	mfb = to_mcde_fb(fbi);
+	/* Create a dispdev overlay for this display */
+	if (dispdev_create(ddev, true, mfb->ovlys[0]) < 0) {
+		dev_warn(&ddev->dev,
+			"Failed to create disp for display %s\n", ddev->name);
+		goto display_postregistered_callback_err;
+	} else {
+		dev_info(&ddev->dev, "Disp dev created for (%s)\n", ddev->name);
 	}
+#endif
 
+#ifdef CONFIG_DISPLAY_AV8100_TERTIARY
+out:
+#endif
 	return 0;
 
 display_postregistered_callback_err:
-- 
cgit v1.2.3


From 84b21f56e95dd332a07411843cef1c7ae87cca75 Mon Sep 17 00:00:00 2001
From: Jimmy Rubin <jimmy.rubin@stericsson.com>
Date: Mon, 12 Sep 2011 13:24:29 +0200
Subject: video: av8100: Change color convert rgb->denc

The color convertion matrix for rgb->denc is incorrect.

ST-Ericsson ID: 339717
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I34360ac40feb3886e235d8f7e0a622327114241f
Signed-off-by: Jimmy Rubin <jimmy.rubin@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/33152
---
 drivers/video/av8100/av8100.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/video/av8100/av8100.c b/drivers/video/av8100/av8100.c
index 0b4de42be4a..36f86512a38 100644
--- a/drivers/video/av8100/av8100.c
+++ b/drivers/video/av8100/av8100.c
@@ -468,7 +468,7 @@ const struct color_conversion_cmd col_trans_yuv_to_denc = {
 
 const struct color_conversion_cmd col_trans_rgb_to_denc = {
 	.c0      = 0x0070, .c1      = 0xffb6, .c2      = 0xffda,
-	.c3      = 0x0019, .c4      = 0x0081, .c5      = 0x0042,
+	.c3      = 0x0042, .c4      = 0x0081, .c5      = 0x0019,
 	.c6      = 0xffee, .c7      = 0xffa2, .c8      = 0x0070,
 	.aoffset = 0x007f, .boffset = 0x0010, .coffset = 0x007f,
 	.lmax    = 0xff,
-- 
cgit v1.2.3


From 72acd30390e34cdf0bc071dbb9960dad31450e95 Mon Sep 17 00:00:00 2001
From: Marcus Lorentzon <marcus.xm.lorentzon@stericsson.com>
Date: Wed, 5 Oct 2011 15:55:10 +0200
Subject: video: mcde: Fix fps logging

Add debugfs support for enabling frame rate logging to dmesg and
getting latest fps metric.

ST-Ericsson ID: 364378
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I29ce236ef09049eee69ac2b93f28f548d75418d8
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/33092
Tested-by: Marcus LORENTZON <marcus.xm.lorentzon@stericsson.com>
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
---
 drivers/video/mcde/mcde_debugfs.c | 2 +-
 drivers/video/mcde/mcde_hw.c      | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/video/mcde/mcde_debugfs.c b/drivers/video/mcde/mcde_debugfs.c
index 0ef6cbb3715..586b1787d00 100644
--- a/drivers/video/mcde/mcde_debugfs.c
+++ b/drivers/video/mcde/mcde_debugfs.c
@@ -120,7 +120,7 @@ static struct channel_info *find_chnl(u8 chnl_id)
 
 static struct overlay_info *find_ovly(struct channel_info *ci, u8 ovly_id)
 {
-	if (!ci || ovly_id > MAX_NUM_OVERLAYS)
+	if (!ci || ovly_id >= MAX_NUM_OVERLAYS)
 		return NULL;
 	return &ci->overlays[ovly_id];
 }
diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index 49ecc332ab5..c9b4a9f3165 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -2635,7 +2635,7 @@ static void chnl_update_overlay(struct mcde_chnl_state *chnl,
 
 	if (ovly->regs.dirty_buf) {
 		update_overlay_registers_on_the_fly(ovly->idx, &ovly->regs);
-		mcde_debugfs_overlay_update(chnl->id, ovly->idx);
+		mcde_debugfs_overlay_update(chnl->id, ovly != chnl->ovly0);
 	}
 	if (ovly->regs.dirty) {
 		chnl_ovly_pixel_format_apply(chnl, ovly);
-- 
cgit v1.2.3


From f38febcb6444912adeb15d5b40f8511984b125fc Mon Sep 17 00:00:00 2001
From: Jimmy Rubin <jimmy.rubin@stericsson.com>
Date: Fri, 23 Sep 2011 10:57:45 +0200
Subject: ux500: mcde: Add UIB8500R3 display support

On the UIB8500R3 a Sony ACX424akp panel is used.
The UIB will be detected dynamically and use the
correct display driver.

ST-Ericsson ID: 321190
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I9157e1d76334b665b37e871b1efe10c3415cc492
Signed-off-by: Jimmy Rubin <jimmy.rubin@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/31952
Reviewed-by: Marcus LORENTZON <marcus.xm.lorentzon@stericsson.com>
Reviewed-by: Jonas ABERG <jonas.aberg@stericsson.com>
---
 arch/arm/mach-ux500/board-mop500-mcde.c | 149 ++++++++++++++++++++++++--------
 1 file changed, 115 insertions(+), 34 deletions(-)

diff --git a/arch/arm/mach-ux500/board-mop500-mcde.c b/arch/arm/mach-ux500/board-mop500-mcde.c
index ff0d278fd8e..6392e510be3 100644
--- a/arch/arm/mach-ux500/board-mop500-mcde.c
+++ b/arch/arm/mach-ux500/board-mop500-mcde.c
@@ -17,6 +17,7 @@
 #include <video/mcde_display.h>
 #include <video/mcde_display-generic_dsi.h>
 #include <video/mcde_display-vuib500-dpi.h>
+#include <video/mcde_display-sony_acx424akp_dsi.h>
 #include <video/mcde_display-av8100.h>
 #include <video/mcde_display-ab8500.h>
 #include <video/mcde_fb.h>
@@ -143,7 +144,11 @@ static struct mcde_display_device generic_display0 = {
 #endif
 	.native_x_res = 864,
 	.native_y_res = 480,
+#ifdef CONFIG_DISPLAY_GENERIC_DSI_PRIMARY_VSYNC
+	.synchronized_update = true,
+#else
 	.synchronized_update = false,
+#endif
 	/* TODO: Remove rotation buffers once ESRAM driver is completed */
 	.rotbuf1 = U8500_ESRAM_BASE + 0x20000 * 4,
 	.rotbuf2 = U8500_ESRAM_BASE + 0x20000 * 4 + 0x10000,
@@ -153,6 +158,54 @@ static struct mcde_display_device generic_display0 = {
 };
 #endif /* CONFIG_DISPLAY_GENERIC_DSI_PRIMARY */
 
+#ifdef CONFIG_DISPLAY_SONY_ACX424AKP_DSI_PRIMARY
+static struct mcde_port sony_port0 = {
+	.type = MCDE_PORTTYPE_DSI,
+	.mode = MCDE_PORTMODE_CMD,
+	.pixel_format = MCDE_PORTPIXFMT_DSI_24BPP,
+	.ifc = 1,
+	.link = 0,
+	.sync_src = MCDE_SYNCSRC_BTA,
+	.update_auto_trig = false,
+	.phy = {
+		.dsi = {
+			.virt_id = 0,
+			.num_data_lanes = 2,
+			.ui = DSI_UNIT_INTERVAL_0,
+			.clk_cont = false,
+			.data_lanes_swap = false,
+		},
+	},
+};
+
+struct mcde_display_sony_acx424akp_platform_data
+			sony_acx424akp_display0_pdata = {
+	.reset_gpio = HREFV60_DISP2_RST_GPIO,
+	.regulator_id = "vaux12v5",
+};
+
+static struct mcde_display_device sony_acx424akp_display0 = {
+	.name = "mcde_disp_sony_acx424akp",
+	.id = PRIMARY_DISPLAY_ID,
+	.port = &sony_port0,
+	.chnl_id = MCDE_CHNL_A,
+	/*
+	 * A large fifo is needed when ddr is clocked down to 25% to not get
+	 * latency problems.
+	 */
+	.fifo = MCDE_FIFO_A,
+	.default_pixel_format = MCDE_OVLYPIXFMT_RGBA8888,
+	.native_x_res = 480,
+	.native_y_res = 854,
+	.synchronized_update = true,
+	.rotbuf1 = U8500_ESRAM_BASE + 0x20000 * 4,
+	.rotbuf2 = U8500_ESRAM_BASE + 0x20000 * 4 + 0x10000,
+	.dev = {
+		.platform_data = &sony_acx424akp_display0_pdata,
+	},
+};
+#endif /* CONFIG_DISPLAY_SONY_ACX424AKP_DSI_PRIMARY */
+
 #ifdef CONFIG_DISPLAY_GENERIC_DSI_SECONDARY
 static struct mcde_port subdisplay_port = {
 	.type = MCDE_PORTTYPE_DSI,
@@ -484,6 +537,7 @@ static int display_postregistered_callback(struct notifier_block *nb,
 	u16 width, height;
 	u16 virtual_width, virtual_height;
 	u32 rotate = FB_ROTATE_UR;
+	u32 rotate_angle = 0;
 	struct fb_info *fbi;
 #ifdef CONFIG_DISPDEV
 	struct mcde_fb *mfb;
@@ -497,9 +551,16 @@ static int display_postregistered_callback(struct notifier_block *nb,
 
 	mcde_dss_get_native_resolution(ddev, &width, &height);
 
-#ifdef CONFIG_DISPLAY_GENERIC_DSI_PRIMARY
+	if (uib_is_u8500uibr3())
+		rotate_angle = 0;
+	else
+		rotate_angle = \
+			CONFIG_DISPLAY_GENERIC_DSI_PRIMARY_ROTATION_ANGLE;
+
+#if defined(CONFIG_DISPLAY_GENERIC_DSI_PRIMARY) || \
+		defined(CONFIG_DISPLAY_SONY_ACX424AKP_DSI_PRIMARY)
 	if (ddev->id == PRIMARY_DISPLAY_ID) {
-		switch (CONFIG_DISPLAY_GENERIC_DSI_PRIMARY_ROTATION_ANGLE) {
+		switch (rotate_angle) {
 		case 0:
 			rotate = FB_ROTATE_UR;
 			break;
@@ -681,12 +742,24 @@ static struct notifier_block framebuffer_nb = {
 	.notifier_call = framebuffer_postregistered_callback,
 };
 
+static void setup_primary_display(void)
+{
+	/* Display reset GPIO is different depending on reference boards */
+	if (machine_is_hrefv60())
+		generic_display0_pdata.reset_gpio = HREFV60_DISP1_RST_GPIO;
+	else
+		generic_display0_pdata.reset_gpio = MOP500_DISP1_RST_GPIO;
+
+	/* Not all STUIB supports VSYNC, disable vsync for STUIB */
+#ifdef CONFIG_DISPLAY_GENERIC_DSI_PRIMARY
+	if (uib_is_stuib())
+		generic_display0.synchronized_update = false;
+#endif
+}
+
 int __init init_display_devices(void)
 {
 	int ret = 0;
-#ifdef CONFIG_DISPLAY_GENERIC_DSI_PRIMARY_VSYNC
-	struct i2c_adapter *i2c0;
-#endif
 
 	if (!cpu_is_u8500())
 		return ret;
@@ -704,41 +777,41 @@ int __init init_display_devices(void)
 		pr_warning("Failed to register fictive display device\n");
 #endif
 
+	/* Set powermode to STANDBY if startup graphics is executed */
 #ifdef CONFIG_DISPLAY_GENERIC_PRIMARY
-	if (machine_is_hrefv60())
-		generic_display0_pdata.reset_gpio = HREFV60_DISP1_RST_GPIO;
-	else
-		generic_display0_pdata.reset_gpio = MOP500_DISP1_RST_GPIO;
-
-#ifdef CONFIG_DISPLAY_GENERIC_DSI_PRIMARY_VSYNC
-	if (!machine_is_snowball()) {
-		i2c0 = i2c_get_adapter(0);
-		if (i2c0) {
-			/*
-			 * U8500-UIB has the TC35893 at 0x44 on I2C0, the
-			 * ST-UIB has not.
-			 */
-			ret = i2c_smbus_xfer(i2c0, 0x44, 0, I2C_SMBUS_WRITE, 0,
-					I2C_SMBUS_QUICK, NULL);
-			i2c_put_adapter(i2c0);
-
-			/* ret == 0 => U8500 UIB connected */
-			generic_display0.synchronized_update = (ret == 0);
-		}
-	} else {
-		/* Snowball dont have uib */
-		generic_display0.synchronized_update = 0;
-	}
-#endif
-
 	if (display_initialized_during_boot)
 		generic_display0.power_mode = MCDE_DISPLAY_PM_STANDBY;
-	ret = mcde_display_device_register(&generic_display0);
+#endif
+#ifdef CONFIG_DISPLAY_SONY_ACX424AKP_DSI_PRIMARY
+	if (display_initialized_during_boot)
+		sony_acx424akp_display0.power_mode = MCDE_DISPLAY_PM_STANDBY;
+#endif
+
+#if defined(CONFIG_DISPLAY_GENERIC_PRIMARY) || \
+	defined(CONFIG_DISPLAY_SONY_ACX424AKP_DSI_PRIMARY)
+	/*
+	 * For reference platforms different panels are used
+	 * depending on UIB
+	 * UIB = User Interface Board
+	 */
+	setup_primary_display();
+
+#ifdef CONFIG_DISPLAY_GENERIC_PRIMARY
+	/* Launch generic display for STUIB and U8500UIB */
+	if (!uib_is_u8500uibr3())
+		ret = mcde_display_device_register(&generic_display0);
+#endif
+#ifdef CONFIG_DISPLAY_SONY_ACX424AKP_DSI_PRIMARY
+	/* Sony display on U8500UIBV3 */
+	if (uib_is_u8500uibr3())
+		ret = mcde_display_device_register(&sony_acx424akp_display0);
+#endif
 	if (ret)
-		pr_warning("Failed to register generic display device 0\n");
+		pr_warning("Failed to register primary display device\n");
 #endif
 
 #ifdef CONFIG_DISPLAY_GENERIC_DSI_SECONDARY
+	/* Display reset GPIO is different depending on reference boards */
 	if (machine_is_hrefv60())
 		generic_subdisplay_pdata.reset_gpio = HREFV60_DISP2_RST_GPIO;
 	else
@@ -771,8 +844,16 @@ int __init init_display_devices(void)
 
 struct mcde_display_device *mcde_get_main_display(void)
 {
-#if defined(CONFIG_DISPLAY_GENERIC_DSI_PRIMARY)
+#if defined(CONFIG_DISPLAY_GENERIC_PRIMARY) && \
+	defined(CONFIG_DISPLAY_SONY_ACX424AKP_DSI_PRIMARY)
+	if (!uib_is_u8500uibr3())
+		return &generic_display0;
+	else
+		return &sony_acx424akp_display0;
+#elif defined(CONFIG_DISPLAY_GENERIC_PRIMARY)
 	return &generic_display0;
+#elif defined(CONFIG_DISPLAY_SONY_ACX424AKP_DSI_PRIMARY)
+	return &sony_acx424akp_display0;
 #elif defined(CONFIG_DISPLAY_GENERIC_DSI_SECONDARY)
 	return &generic_subdisplay;
 #elif defined(CONFIG_DISPLAY_AV8100_TERTIARY)
-- 
cgit v1.2.3


From 23c40762326cfc07c10f1acebe6c279f8acfc912 Mon Sep 17 00:00:00 2001
From: Marcus Lorentzon <marcus.xm.lorentzon@stericsson.com>
Date: Mon, 3 Oct 2011 18:00:59 +0200
Subject: video: mcde: Remove prepare for update

Prepare for update was only used for partial updates and
partial update is no longer supported (and never worked).

ST-Ericsson ID: 365249
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: If927e73805c2bba873b477a20be3ee5a94ac77cd
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/32866
Reviewed-by: Marcus LORENTZON <marcus.xm.lorentzon@stericsson.com>
Tested-by: Marcus LORENTZON <marcus.xm.lorentzon@stericsson.com>
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
---
 drivers/video/mcde/display-ab8500.c             |  1 -
 drivers/video/mcde/display-av8100.c             |  1 -
 drivers/video/mcde/display-fictive.c            |  1 -
 drivers/video/mcde/display-generic_dsi.c        |  2 --
 drivers/video/mcde/display-sony_acx424akp_dsi.c |  1 -
 drivers/video/mcde/display-vuib500-dpi.c        |  1 -
 drivers/video/mcde/mcde_display.c               | 37 -------------------------
 include/video/mcde_display.h                    |  2 --
 8 files changed, 46 deletions(-)

diff --git a/drivers/video/mcde/display-ab8500.c b/drivers/video/mcde/display-ab8500.c
index 789bf28cdf1..f465b0617c7 100644
--- a/drivers/video/mcde/display-ab8500.c
+++ b/drivers/video/mcde/display-ab8500.c
@@ -136,7 +136,6 @@ static int __devinit ab8500_probe(struct mcde_display_device *ddev)
 	ddev->set_power_mode = set_power_mode;
 	ddev->on_first_update = on_first_update;
 	ddev->update = display_update;
-	ddev->prepare_for_update = NULL;
 
 	return 0;
 
diff --git a/drivers/video/mcde/display-av8100.c b/drivers/video/mcde/display-av8100.c
index 69b5afdd7dd..e076398ca45 100644
--- a/drivers/video/mcde/display-av8100.c
+++ b/drivers/video/mcde/display-av8100.c
@@ -1423,7 +1423,6 @@ static int __devinit hdmi_probe(struct mcde_display_device *dev)
 	if (av8100_ver_get() > AV8100_CHIPVER_1)
 		dev->port->phy.dsi.clk_cont = true;
 
-	dev->prepare_for_update = NULL;
 	dev->on_first_update = hdmi_on_first_update;
 	dev->try_video_mode = hdmi_try_video_mode;
 	dev->set_video_mode = hdmi_set_video_mode;
diff --git a/drivers/video/mcde/display-fictive.c b/drivers/video/mcde/display-fictive.c
index 8389357a693..c7ea1429b9f 100644
--- a/drivers/video/mcde/display-fictive.c
+++ b/drivers/video/mcde/display-fictive.c
@@ -19,7 +19,6 @@
 
 static int __devinit fictive_probe(struct mcde_display_device *dev)
 {
-	dev->prepare_for_update = NULL;
 	dev->platform_enable = NULL,
 	dev->platform_disable = NULL,
 	dev->set_power_mode = NULL;
diff --git a/drivers/video/mcde/display-generic_dsi.c b/drivers/video/mcde/display-generic_dsi.c
index 5e3b38ccba1..75b1c6e2be8 100644
--- a/drivers/video/mcde/display-generic_dsi.c
+++ b/drivers/video/mcde/display-generic_dsi.c
@@ -207,8 +207,6 @@ static int __devinit generic_probe(struct mcde_display_device *dev)
 		}
 	}
 
-	/* TODO: Remove when DSI send command uses interrupts */
-	dev->prepare_for_update = NULL;
 	dev->platform_enable = generic_platform_enable,
 	dev->platform_disable = generic_platform_disable,
 	dev->set_power_mode = generic_set_power_mode;
diff --git a/drivers/video/mcde/display-sony_acx424akp_dsi.c b/drivers/video/mcde/display-sony_acx424akp_dsi.c
index 602c85f229f..3cad2b9718e 100644
--- a/drivers/video/mcde/display-sony_acx424akp_dsi.c
+++ b/drivers/video/mcde/display-sony_acx424akp_dsi.c
@@ -285,7 +285,6 @@ static int __devinit sony_acx424akp_probe(struct mcde_display_device *dev)
 	}
 
 	/* TODO: Remove when DSI send command uses interrupts */
-	dev->prepare_for_update = NULL;
 	dev->platform_enable = sony_acx424akp_platform_enable,
 	dev->platform_disable = sony_acx424akp_platform_disable,
 	dev->set_power_mode = sony_acx424akp_set_power_mode;
diff --git a/drivers/video/mcde/display-vuib500-dpi.c b/drivers/video/mcde/display-vuib500-dpi.c
index def5fe7c0ab..2bd5b990608 100644
--- a/drivers/video/mcde/display-vuib500-dpi.c
+++ b/drivers/video/mcde/display-vuib500-dpi.c
@@ -50,7 +50,6 @@ static int __devinit dpi_display_probe(struct mcde_display_device *ddev)
 
 	ddev->try_video_mode = try_video_mode;
 	ddev->set_video_mode = set_video_mode;
-	ddev->prepare_for_update = NULL;
 	dev_info(&ddev->dev, "DPI display probed\n");
 
 	goto out;
diff --git a/drivers/video/mcde/mcde_display.c b/drivers/video/mcde/mcde_display.c
index 04c0f1cebb1..28409166c7d 100644
--- a/drivers/video/mcde/mcde_display.c
+++ b/drivers/video/mcde/mcde_display.c
@@ -333,18 +333,6 @@ static int mcde_display_update_default(struct mcde_display_device *ddev,
 {
 	int ret = 0;
 
-	/* TODO: Dirty */
-	if (ddev->prepare_for_update) {
-		/* TODO: Send dirty rectangle */
-		ret = ddev->prepare_for_update(ddev, 0, 0,
-			ddev->native_x_res, ddev->native_y_res);
-		if (ret < 0) {
-			dev_warn(&ddev->dev,
-				"%s:Failed to prepare for update\n", __func__);
-			return ret;
-		}
-	}
-	/* TODO: Calculate & set update rect */
 	ret = mcde_chnl_update(ddev->chnl_state, &ddev->update_area,
 							tripple_buffer);
 	if (ret < 0) {
@@ -369,30 +357,6 @@ static int mcde_display_update_default(struct mcde_display_device *ddev,
 	return 0;
 }
 
-static int mcde_display_prepare_for_update_default(
-					struct mcde_display_device *ddev,
-					u16 x, u16 y, u16 w, u16 h)
-{
-	int ret;
-	u8 params[8] = { x >> 8, x & 0xff,
-			(x + w - 1) >> 8, (x + w - 1) & 0xff,
-			 y >> 8, y & 0xff,
-			(y + h - 1) >> 8, (y + h - 1) & 0xff };
-
-	if (ddev->port->type != MCDE_PORTTYPE_DSI)
-		return -EINVAL;
-
-	ret = mcde_dsi_dcs_write(ddev->chnl_state,
-		DCS_CMD_SET_COLUMN_ADDRESS, &params[0], 4);
-	if (ret)
-		return ret;
-
-	ret = mcde_dsi_dcs_write(ddev->chnl_state,
-		DCS_CMD_SET_PAGE_ADDRESS, &params[4], 4);
-
-	return ret;
-}
-
 static inline int mcde_display_on_first_update_default(
 					struct mcde_display_device *ddev)
 {
@@ -424,7 +388,6 @@ void mcde_display_init_device(struct mcde_display_device *ddev)
 	ddev->apply_config = mcde_display_apply_config_default;
 	ddev->invalidate_area = mcde_display_invalidate_area_default;
 	ddev->update = mcde_display_update_default;
-	ddev->prepare_for_update = mcde_display_prepare_for_update_default;
 	ddev->on_first_update = mcde_display_on_first_update_default;
 
 	mutex_init(&ddev->display_lock);
diff --git a/include/video/mcde_display.h b/include/video/mcde_display.h
index 6519660f489..9f9f960e46c 100644
--- a/include/video/mcde_display.h
+++ b/include/video/mcde_display.h
@@ -101,8 +101,6 @@ struct mcde_display_device {
 	int (*invalidate_area)(struct mcde_display_device *dev,
 						struct mcde_rectangle *area);
 	int (*update)(struct mcde_display_device *dev, bool tripple_buffer);
-	int (*prepare_for_update)(struct mcde_display_device *dev,
-		u16 x, u16 y, u16 w, u16 h);
 	int (*on_first_update)(struct mcde_display_device *dev);
 	int (*platform_enable)(struct mcde_display_device *dev);
 	int (*platform_disable)(struct mcde_display_device *dev);
-- 
cgit v1.2.3


From e3507717b6584baffaa72d38c3d676a6bd15c671 Mon Sep 17 00:00:00 2001
From: Marcus Lorentzon <marcus.xm.lorentzon@stericsson.com>
Date: Mon, 3 Oct 2011 18:03:56 +0200
Subject: video: mcde: Add generic suspend/resume for MCDE bus

Most suspend/resume implementations are the same. This adds
default implementation using display device set_power_mode.

ST-Ericsson ID: 365249
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I4dcead9f8e00363e67e73f6658828ead01c53694
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/32867
Reviewed-by: Marcus LORENTZON <marcus.xm.lorentzon@stericsson.com>
Tested-by: Marcus LORENTZON <marcus.xm.lorentzon@stericsson.com>
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
---
 drivers/video/mcde/mcde_bus.c | 16 ++++++++++------
 1 file changed, 10 insertions(+), 6 deletions(-)

diff --git a/drivers/video/mcde/mcde_bus.c b/drivers/video/mcde/mcde_bus.c
index a742aea5b3d..852451954a4 100644
--- a/drivers/video/mcde/mcde_bus.c
+++ b/drivers/video/mcde/mcde_bus.c
@@ -106,7 +106,10 @@ static int mcde_drv_suspend(struct device *_dev, pm_message_t state)
 	struct mcde_display_driver *drv = to_mcde_display_driver(_dev->driver);
 	struct mcde_display_device *dev = to_mcde_display_device(_dev);
 
-	return drv->suspend(dev, state);
+	if (drv->suspend)
+		return drv->suspend(dev, state);
+	else
+		return dev->set_power_mode(dev, MCDE_DISPLAY_PM_OFF);
 }
 
 static int mcde_drv_resume(struct device *_dev)
@@ -114,7 +117,10 @@ static int mcde_drv_resume(struct device *_dev)
 	struct mcde_display_driver *drv = to_mcde_display_driver(_dev->driver);
 	struct mcde_display_device *dev = to_mcde_display_device(_dev);
 
-	return drv->resume(dev);
+	if (drv->resume)
+		return drv->resume(dev);
+	else
+		return dev->set_power_mode(dev, MCDE_DISPLAY_PM_STANDBY);
 }
 
 /* Bus device */
@@ -139,10 +145,8 @@ int mcde_display_driver_register(struct mcde_display_driver *drv)
 		drv->driver.remove = mcde_drv_remove;
 	if (drv->shutdown)
 		drv->driver.shutdown = mcde_drv_shutdown;
-	if (drv->suspend)
-		drv->driver.suspend = mcde_drv_suspend;
-	if (drv->resume)
-		drv->driver.resume = mcde_drv_resume;
+	drv->driver.suspend = mcde_drv_suspend;
+	drv->driver.resume = mcde_drv_resume;
 
 	return driver_register(&drv->driver);
 }
-- 
cgit v1.2.3


From 349241bbf7131f4d9e7edcdd872b1e9b6e273393 Mon Sep 17 00:00:00 2001
From: Marcus Lorentzon <marcus.xm.lorentzon@stericsson.com>
Date: Mon, 10 Oct 2011 13:09:48 +0200
Subject: video: mcde: Add Samsung S6D16D0 driver

ST-Ericsson ID: 365249
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: Icb611dd8a6a73fca23f56841f587db97f3400f4c
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/33263
Reviewed-by: Marcus LORENTZON <marcus.xm.lorentzon@stericsson.com>
Tested-by: Marcus LORENTZON <marcus.xm.lorentzon@stericsson.com>
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
Reviewed-by: QABUILD
---
 drivers/video/mcde/Kconfig                   |   5 +
 drivers/video/mcde/Makefile                  |   1 +
 drivers/video/mcde/display-samsung_s6d16d0.c | 217 +++++++++++++++++++++++++++
 3 files changed, 223 insertions(+)
 create mode 100644 drivers/video/mcde/display-samsung_s6d16d0.c

diff --git a/drivers/video/mcde/Kconfig b/drivers/video/mcde/Kconfig
index 94ce470c504..cb88a66d370 100644
--- a/drivers/video/mcde/Kconfig
+++ b/drivers/video/mcde/Kconfig
@@ -45,6 +45,11 @@ menu "MCDE DSI displays"
 config MCDE_DISPLAY_GENERIC_DSI
 	tristate "Generic DSI display driver"
 
+config MCDE_DISPLAY_SAMSUNG_S6D16D0
+	bool "Samsung S6D16D0 DSI display driver"
+	---help---
+	  Say Y if you have a TPO Taal or Blackpearl display panel.
+
 config MCDE_DISPLAY_SONY_ACX424AKP_DSI
 	tristate "Sony acx424akp DSI display driver"
 
diff --git a/drivers/video/mcde/Makefile b/drivers/video/mcde/Makefile
index ab86a074005..82a78c2542a 100644
--- a/drivers/video/mcde/Makefile
+++ b/drivers/video/mcde/Makefile
@@ -8,6 +8,7 @@ mcde-objs		+= mcde_debugfs.o
 obj-$(CONFIG_FB_MCDE)	+= mcde.o
 
 obj-$(CONFIG_MCDE_DISPLAY_GENERIC_DSI)		+= display-generic_dsi.o
+obj-$(CONFIG_MCDE_DISPLAY_SAMSUNG_S6D16D0)	+= display-samsung_s6d16d0.o
 obj-$(CONFIG_MCDE_DISPLAY_SONY_ACX424AKP_DSI)   += display-sony_acx424akp_dsi.o
 obj-$(CONFIG_MCDE_DISPLAY_VUIB500_DPI)		+= display-vuib500-dpi.o
 obj-$(CONFIG_MCDE_DISPLAY_AB8500_DENC)		+= display-ab8500.o
diff --git a/drivers/video/mcde/display-samsung_s6d16d0.c b/drivers/video/mcde/display-samsung_s6d16d0.c
new file mode 100644
index 00000000000..60be4e022f9
--- /dev/null
+++ b/drivers/video/mcde/display-samsung_s6d16d0.c
@@ -0,0 +1,217 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2010
+ *
+ * ST-Ericsson MCDE Samsung S6D16D0 display driver
+ *
+ * Author: Marcus Lorentzon <marcus.xm.lorentzon@stericsson.com>
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+
+#include <linux/kernel.h>
+#include <linux/device.h>
+#include <linux/regulator/consumer.h>
+#include <linux/delay.h>
+#include <linux/slab.h>
+#include <linux/gpio.h>
+#include <linux/err.h>
+
+#include <video/mcde_display.h>
+
+#define RESET_DURATION_US	10
+#define RESET_DELAY_MS		120
+#define SLEEP_OUT_DELAY_MS	120
+#define IO_REGU			"vdd1"
+#define IO_REGU_MIN		1650000
+#define IO_REGU_MAX		3300000
+
+struct device_info {
+	int reset_gpio;
+	struct mcde_port port;
+	struct regulator *regulator;
+};
+
+static inline struct device_info *get_drvdata(struct mcde_display_device *ddev)
+{
+	return (struct device_info *)dev_get_drvdata(&ddev->dev);
+}
+
+static int power_on(struct mcde_display_device *ddev)
+{
+	struct device_info *di = get_drvdata(ddev);
+
+	dev_dbg(&ddev->dev, "Reset & power on s6d16d0 display\n");
+
+	regulator_enable(di->regulator);
+	gpio_set_value_cansleep(di->reset_gpio, 0);
+	udelay(RESET_DURATION_US);
+	gpio_set_value_cansleep(di->reset_gpio, 1);
+	msleep(RESET_DELAY_MS);
+
+	return 0;
+}
+
+static int power_off(struct mcde_display_device *ddev)
+{
+	struct device_info *di = get_drvdata(ddev);
+
+	dev_dbg(&ddev->dev, "Power off s6d16d0 display\n");
+
+	regulator_disable(di->regulator);
+
+	return 0;
+}
+
+static int display_on(struct mcde_display_device *ddev)
+{
+	int ret;
+
+	dev_dbg(&ddev->dev, "Display on s6d16d0\n");
+
+	ret = mcde_dsi_dcs_write(ddev->chnl_state, DCS_CMD_EXIT_SLEEP_MODE,
+								NULL, 0);
+	if (ret)
+		return ret;
+	msleep(SLEEP_OUT_DELAY_MS);
+	return mcde_dsi_dcs_write(ddev->chnl_state, DCS_CMD_SET_DISPLAY_ON,
+								NULL, 0);
+}
+
+static int display_off(struct mcde_display_device *ddev)
+{
+	int ret;
+
+	dev_dbg(&ddev->dev, "Display off s6d16d0\n");
+
+	ret = mcde_dsi_dcs_write(ddev->chnl_state, DCS_CMD_SET_DISPLAY_OFF,
+								NULL, 0);
+	if (ret)
+		return ret;
+
+	return mcde_dsi_dcs_write(ddev->chnl_state, DCS_CMD_ENTER_SLEEP_MODE,
+								NULL, 0);
+}
+
+static int set_power_mode(struct mcde_display_device *ddev,
+					enum mcde_display_power_mode power_mode)
+{
+	int ret = 0;
+
+	dev_dbg(&ddev->dev, "Set power mode %d\n", power_mode);
+
+	/* OFF -> STANDBY */
+	if (ddev->power_mode == MCDE_DISPLAY_PM_OFF &&
+					power_mode != MCDE_DISPLAY_PM_OFF) {
+		ret = power_on(ddev);
+		if (ret)
+			return ret;
+		ddev->power_mode = MCDE_DISPLAY_PM_STANDBY;
+	}
+
+	/* STANDBY -> ON */
+	if (ddev->power_mode == MCDE_DISPLAY_PM_STANDBY &&
+					power_mode == MCDE_DISPLAY_PM_ON) {
+
+		ret = display_on(ddev);
+		if (ret)
+			return ret;
+		ddev->power_mode = MCDE_DISPLAY_PM_ON;
+	}
+	/* ON -> STANDBY */
+	else if (ddev->power_mode == MCDE_DISPLAY_PM_ON &&
+					power_mode <= MCDE_DISPLAY_PM_STANDBY) {
+
+		ret = display_off(ddev);
+		if (ret)
+			return ret;
+		ddev->power_mode = MCDE_DISPLAY_PM_STANDBY;
+	}
+
+	/* STANDBY -> OFF */
+	if (ddev->power_mode == MCDE_DISPLAY_PM_STANDBY &&
+					power_mode == MCDE_DISPLAY_PM_OFF) {
+		ret = power_off(ddev);
+		if (ret)
+			return ret;
+		ddev->power_mode = MCDE_DISPLAY_PM_OFF;
+	}
+
+	return mcde_chnl_set_power_mode(ddev->chnl_state, ddev->power_mode);
+}
+
+static int __devinit samsung_s6d16d0_probe(struct mcde_display_device *ddev)
+{
+	int ret = 0;
+	struct mcde_display_dsi_platform_data *pdata = ddev->dev.platform_data;
+	struct device_info *di;
+
+	if (pdata == NULL || !pdata->reset_gpio) {
+		dev_err(&ddev->dev, "Invalid platform data\n");
+		return -EINVAL;
+	}
+
+	di = kzalloc(sizeof(*di), GFP_KERNEL);
+	if (!di)
+		return -ENOMEM;
+	di->reset_gpio = pdata->reset_gpio;
+	di->port.link = pdata->link;
+	di->port.type = MCDE_PORTTYPE_DSI;
+	di->port.mode = MCDE_PORTMODE_CMD;
+	di->port.pixel_format = MCDE_PORTPIXFMT_DSI_24BPP;
+	di->port.sync_src = MCDE_SYNCSRC_BTA;
+	di->port.phy.dsi.num_data_lanes = 2;
+	/* TODO: Move UI to mcde_hw.c when clk_get_rate(dsi) is done */
+	di->port.phy.dsi.ui = 9;
+
+	ret = gpio_request(di->reset_gpio, NULL);
+	if (ret)
+		goto gpio_request_failed;
+	gpio_direction_output(di->reset_gpio, 1);
+	di->regulator = regulator_get(&ddev->dev, IO_REGU);
+	if (IS_ERR(di->regulator)) {
+		di->regulator = NULL;
+		goto regulator_get_failed;
+	}
+	ret = regulator_set_voltage(di->regulator, IO_REGU_MIN, IO_REGU_MAX);
+	if (WARN_ON(ret))
+		goto regulator_voltage_failed;
+
+	/* Get in sync with u-boot */
+	if (ddev->power_mode == MCDE_DISPLAY_PM_STANDBY)
+		(void)regulator_enable(di->regulator);
+
+	ddev->set_power_mode = set_power_mode;
+	ddev->port = &di->port;
+	ddev->native_x_res = 864;
+	ddev->native_y_res = 480;
+	dev_set_drvdata(&ddev->dev, di);
+
+	dev_info(&ddev->dev, "Samsung s6d16d0 display probed\n");
+
+	return 0;
+regulator_voltage_failed:
+	regulator_put(di->regulator);
+regulator_get_failed:
+	gpio_free(di->reset_gpio);
+gpio_request_failed:
+	kfree(di);
+	return ret;
+}
+
+static struct mcde_display_driver samsung_s6d16d0_driver = {
+	.probe	= samsung_s6d16d0_probe,
+	.driver = {
+		.name	= "samsung_s6d16d0",
+	},
+};
+
+static int __init samsung_s6d16d0_init(void)
+{
+	return mcde_display_driver_register(&samsung_s6d16d0_driver);
+}
+module_init(samsung_s6d16d0_init);
+
+MODULE_AUTHOR("Marcus Lorentzon <marcus.xm.lorentzon@stericsson.com>");
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("ST-Ericsson MCDE Samsung S6D16D0 display driver");
-- 
cgit v1.2.3


From 07bf391c739e4b8bcaa6226f9dec8d8adc368f30 Mon Sep 17 00:00:00 2001
From: Marcus Lorentzon <marcus.xm.lorentzon@stericsson.com>
Date: Mon, 10 Oct 2011 13:08:40 +0200
Subject: video: mcde: Add generic DSI platform data

ST-Ericsson ID: 365249
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: If6b3aef296838134634f107b227c43b1cff90c5e
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/33448
Reviewed-by: Marcus LORENTZON <marcus.xm.lorentzon@stericsson.com>
Tested-by: Marcus LORENTZON <marcus.xm.lorentzon@stericsson.com>
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Reviewed-by: QABUILD
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
---
 include/video/mcde_display.h | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/include/video/mcde_display.h b/include/video/mcde_display.h
index 9f9f960e46c..97326cbc28c 100644
--- a/include/video/mcde_display.h
+++ b/include/video/mcde_display.h
@@ -20,6 +20,11 @@
 #define UPDATE_FLAG_VIDEO_MODE		0x2
 #define UPDATE_FLAG_ROTATION		0x4
 
+struct mcde_display_dsi_platform_data {
+	int reset_gpio;
+	int link;
+};
+
 #define to_mcde_display_device(__dev) \
 	container_of((__dev), struct mcde_display_device, dev)
 
-- 
cgit v1.2.3


From f04a98035bd624b25eb599198bbf938d33e84143 Mon Sep 17 00:00:00 2001
From: Marcus Lorentzon <marcus.xm.lorentzon@stericsson.com>
Date: Thu, 6 Oct 2011 20:06:39 +0200
Subject: ux500: mcde: Replace generic driver with Samsung

Remove use of MCDE generic DSI driver in favor of the
real Samsung S6D16D0 driver to reduce the amount of code
in mop500 board config.

ST-Ericsson ID: 365249
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: Idecde46fba388789403fea63210e81ed10cb75db
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/33264
Reviewed-by: Marcus LORENTZON <marcus.xm.lorentzon@stericsson.com>
Tested-by: Marcus LORENTZON <marcus.xm.lorentzon@stericsson.com>
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
Reviewed-by: QABUILD
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
---
 arch/arm/mach-ux500/board-mop500-mcde.c | 120 +++++++-------------------------
 1 file changed, 25 insertions(+), 95 deletions(-)

diff --git a/arch/arm/mach-ux500/board-mop500-mcde.c b/arch/arm/mach-ux500/board-mop500-mcde.c
index 6392e510be3..b517cecc72e 100644
--- a/arch/arm/mach-ux500/board-mop500-mcde.c
+++ b/arch/arm/mach-ux500/board-mop500-mcde.c
@@ -15,7 +15,6 @@
 #include <asm/mach-types.h>
 #include <video/av8100.h>
 #include <video/mcde_display.h>
-#include <video/mcde_display-generic_dsi.h>
 #include <video/mcde_display-vuib500-dpi.h>
 #include <video/mcde_display-sony_acx424akp_dsi.h>
 #include <video/mcde_display-av8100.h>
@@ -94,56 +93,20 @@ static struct mcde_display_device fictive_display = {
 #endif /* CONFIG_DISPLAY_FICTIVE */
 
 #ifdef CONFIG_DISPLAY_GENERIC_DSI_PRIMARY
-static struct mcde_port port0 = {
-	.type = MCDE_PORTTYPE_DSI,
-	.mode = MCDE_PORTMODE_CMD,
-	.pixel_format = MCDE_PORTPIXFMT_DSI_24BPP,
-	.ifc = 1,
+static struct mcde_display_dsi_platform_data samsung_s6d16d0_pdata0 = {
 	.link = 0,
-#ifdef CONFIG_DISPLAY_GENERIC_DSI_PRIMARY_AUTO_SYNC
-	.sync_src = MCDE_SYNCSRC_OFF,
-	.update_auto_trig = true,
-#else
-	.sync_src = MCDE_SYNCSRC_BTA,
-	.update_auto_trig = false,
-#endif
-	.phy = {
-		.dsi = {
-			.virt_id = 0,
-			.num_data_lanes = 2,
-			.ui = DSI_UNIT_INTERVAL_0,
-			.clk_cont = false,
-			.data_lanes_swap = false,
-		},
-	},
-};
-
-static struct mcde_display_generic_platform_data generic_display0_pdata = {
-	.reset_delay = 1,
-#ifdef CONFIG_REGULATOR
-	.regulator_id = "vaux12v5",
-	.min_supply_voltage = 2500000, /* 2.5V */
-	.max_supply_voltage = 2800000 /* 2.8V */
-#endif
 };
 
-static struct mcde_display_device generic_display0 = {
-	.name = "mcde_disp_generic",
+static struct mcde_display_device samsung_s6d16d0_display0 = {
+	.name = "samsung_s6d16d0",
 	.id = PRIMARY_DISPLAY_ID,
-	.port = &port0,
 	.chnl_id = MCDE_CHNL_A,
-	/*
-	 * A large fifo is needed when ddr is clocked down to 25% to not get
-	 * latency problems.
-	 */
 	.fifo = MCDE_FIFO_A,
 #ifdef CONFIG_MCDE_DISPLAY_PRIMARY_16BPP
 	.default_pixel_format = MCDE_OVLYPIXFMT_RGB565,
 #else
 	.default_pixel_format = MCDE_OVLYPIXFMT_RGBA8888,
 #endif
-	.native_x_res = 864,
-	.native_y_res = 480,
 #ifdef CONFIG_DISPLAY_GENERIC_DSI_PRIMARY_VSYNC
 	.synchronized_update = true,
 #else
@@ -153,7 +116,7 @@ static struct mcde_display_device generic_display0 = {
 	.rotbuf1 = U8500_ESRAM_BASE + 0x20000 * 4,
 	.rotbuf2 = U8500_ESRAM_BASE + 0x20000 * 4 + 0x10000,
 	.dev = {
-		.platform_data = &generic_display0_pdata,
+		.platform_data = &samsung_s6d16d0_pdata0,
 	},
 };
 #endif /* CONFIG_DISPLAY_GENERIC_DSI_PRIMARY */
@@ -207,56 +170,23 @@ static struct mcde_display_device sony_acx424akp_display0 = {
 #endif /* CONFIG_DISPLAY_SONY_ACX424AKP_DSI_PRIMARY */
 
 #ifdef CONFIG_DISPLAY_GENERIC_DSI_SECONDARY
-static struct mcde_port subdisplay_port = {
-	.type = MCDE_PORTTYPE_DSI,
-	.mode = MCDE_PORTMODE_CMD,
-	.pixel_format = MCDE_PORTPIXFMT_DSI_24BPP,
-	.ifc = 1,
+static struct mcde_display_dsi_platform_data samsung_s6d16d0_pdata1 = {
 	.link = 1,
-#ifdef CONFIG_DISPLAY_GENERIC_DSI_SECONDARY_AUTO_SYNC
-	.sync_src = MCDE_SYNCSRC_OFF,
-	.update_auto_trig = true,
-#else
-	.sync_src = MCDE_SYNCSRC_BTA,
-	.update_auto_trig = false,
-#endif
-	.phy = {
-		.dsi = {
-			.virt_id = 0,
-			.num_data_lanes = 2,
-			.ui = DSI_UNIT_INTERVAL_1,
-			.clk_cont = false,
-			.data_lanes_swap = false,
-		},
-	},
-
 };
 
-static struct mcde_display_generic_platform_data generic_subdisplay_pdata = {
-	.reset_delay = 1,
-#ifdef CONFIG_REGULATOR
-	.regulator_id = "vaux12v5",
-	.min_supply_voltage = 2500000, /* 2.5V */
-	.max_supply_voltage = 2800000 /* 2.8V */
-#endif
-};
-
-static struct mcde_display_device generic_subdisplay = {
-	.name = "mcde_disp_generic_subdisplay",
+static struct mcde_display_device samsung_s6d16d0_display1 = {
+	.name = "samsung_s6d16d0",
 	.id = SECONDARY_DISPLAY_ID,
-	.port = &subdisplay_port,
 	.chnl_id = MCDE_CHNL_C1,
 	.fifo = MCDE_FIFO_C1,
 	.default_pixel_format = MCDE_OVLYPIXFMT_RGB565,
-	.native_x_res = 864,
-	.native_y_res = 480,
 #ifdef CONFIG_DISPLAY_GENERIC_DSI_SECONDARY_VSYNC
 	.synchronized_update = true,
 #else
 	.synchronized_update = false,
 #endif
 	.dev = {
-		.platform_data = &generic_subdisplay_pdata,
+		.platform_data = &samsung_s6d16d0_pdata1,
 	},
 };
 #endif /* CONFIG_DISPLAY_GENERIC_DSI_SECONDARY */
@@ -278,7 +208,7 @@ static struct mcde_port port0 = {
 	},
 };
 
-static struct mcde_display_dpi_platform_data generic_display0_pdata = {0};
+static struct mcde_display_dpi_platform_data dpi_display0_pdata = {0};
 static struct ux500_pins *dpi_pins;
 
 static int dpi_display_platform_enable(struct mcde_display_device *ddev)
@@ -313,7 +243,7 @@ static int dpi_display_platform_disable(struct mcde_display_device *ddev)
 
 }
 
-static struct mcde_display_device generic_display0 = {
+static struct mcde_display_device dpi_display0 = {
 	.name = "mcde_display_dpi",
 	.id = 0,
 	.port = &port0,
@@ -328,7 +258,7 @@ static struct mcde_display_device generic_display0 = {
 	.native_y_res = 480,
 	/* .synchronized_update: Don't care: port is set to update_auto_trig */
 	.dev = {
-		.platform_data = &generic_display0_pdata,
+		.platform_data = &dpi_display0_pdata,
 	},
 	.platform_enable = dpi_display_platform_enable,
 	.platform_disable = dpi_display_platform_disable,
@@ -746,14 +676,14 @@ static void setup_primary_display(void)
 {
 	/* Display reset GPIO is different depending on reference boards */
 	if (machine_is_hrefv60())
-		generic_display0_pdata.reset_gpio = HREFV60_DISP1_RST_GPIO;
+		samsung_s6d16d0_pdata0.reset_gpio = HREFV60_DISP1_RST_GPIO;
 	else
-		generic_display0_pdata.reset_gpio = MOP500_DISP1_RST_GPIO;
+		samsung_s6d16d0_pdata0.reset_gpio = MOP500_DISP1_RST_GPIO;
 
 	/* Not all STUIB supports VSYNC, disable vsync for STUIB */
 #ifdef CONFIG_DISPLAY_GENERIC_DSI_PRIMARY
 	if (uib_is_stuib())
-		generic_display0.synchronized_update = false;
+		samsung_s6d16d0_display0.synchronized_update = false;
 #endif
 }
 
@@ -780,7 +710,7 @@ int __init init_display_devices(void)
 	/* Set powermode to STANDBY if startup graphics is executed */
 #ifdef CONFIG_DISPLAY_GENERIC_PRIMARY
 	if (display_initialized_during_boot)
-		generic_display0.power_mode = MCDE_DISPLAY_PM_STANDBY;
+		samsung_s6d16d0_display0.power_mode = MCDE_DISPLAY_PM_STANDBY;
 #endif
 #ifdef CONFIG_DISPLAY_SONY_ACX424AKP_DSI_PRIMARY
 	if (display_initialized_during_boot)
@@ -797,9 +727,9 @@ int __init init_display_devices(void)
 	setup_primary_display();
 
 #ifdef CONFIG_DISPLAY_GENERIC_PRIMARY
-	/* Launch generic display for STUIB and U8500UIB */
-	if (!uib_is_u8500uibr3())
-		ret = mcde_display_device_register(&generic_display0);
+	/* Samsung display for STUIB and U8500UIB */
+	if (uib_is_u8500uib() || uib_is_stuib())
+		ret = mcde_display_device_register(&samsung_s6d16d0_display0);
 #endif
 #ifdef CONFIG_DISPLAY_SONY_ACX424AKP_DSI_PRIMARY
 	/* Sony display on U8500UIBV3 */
@@ -813,12 +743,12 @@ int __init init_display_devices(void)
 #ifdef CONFIG_DISPLAY_GENERIC_DSI_SECONDARY
 	/* Display reset GPIO is different depending on reference boards */
 	if (machine_is_hrefv60())
-		generic_subdisplay_pdata.reset_gpio = HREFV60_DISP2_RST_GPIO;
+		samsung_s6d16d0_pdata1.reset_gpio = HREFV60_DISP2_RST_GPIO;
 	else
-		generic_subdisplay_pdata.reset_gpio = MOP500_DISP2_RST_GPIO;
-	ret = mcde_display_device_register(&generic_subdisplay);
+		samsung_s6d16d0_pdata1.reset_gpio = MOP500_DISP2_RST_GPIO;
+	ret = mcde_display_device_register(&samsung_s6d16d0_display1);
 	if (ret)
-		pr_warning("Failed to register generic sub display device\n");
+		pr_warning("Failed to register sub display device\n");
 #endif
 
 #ifdef CONFIG_DISPLAY_AV8100_TERTIARY
@@ -847,15 +777,15 @@ struct mcde_display_device *mcde_get_main_display(void)
 #if defined(CONFIG_DISPLAY_GENERIC_PRIMARY) && \
 	defined(CONFIG_DISPLAY_SONY_ACX424AKP_DSI_PRIMARY)
 	if (!uib_is_u8500uibr3())
-		return &generic_display0;
+		return &samsung_s6d16d0_display0;
 	else
 		return &sony_acx424akp_display0;
 #elif defined(CONFIG_DISPLAY_GENERIC_PRIMARY)
-	return &generic_display0;
+	return &samsung_s6d16d0_display0;
 #elif defined(CONFIG_DISPLAY_SONY_ACX424AKP_DSI_PRIMARY)
 	return &sony_acx424akp_display0;
 #elif defined(CONFIG_DISPLAY_GENERIC_DSI_SECONDARY)
-	return &generic_subdisplay;
+	return &samsung_s6d16d0_display1;
 #elif defined(CONFIG_DISPLAY_AV8100_TERTIARY)
 	return &av8100_hdmi;
 #elif defined(CONFIG_DISPLAY_AB8500_TERTIARY)
-- 
cgit v1.2.3


From be8f67150c8d2af503f357445ea0440adee9f660 Mon Sep 17 00:00:00 2001
From: Jimmy Rubin <jimmy.rubin@stericsson.com>
Date: Thu, 29 Sep 2011 07:31:01 +0200
Subject: video: mcde: Handle ACKNOWLEDGE_WITH_ERR in read

If an DCS read command is sent to the panel.
The panel can aknowledge the command with an error.
In this case the read command is resent to the panel.

ST-Ericsson ID: 321190
ST-Ericsson Linux Next: NA
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I7c2d472cbf7acb9cbf880d162f3e20ab07c86398
Signed-off-by: Jimmy Rubin <jimmy.rubin@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/32594
Reviewed-by: Marcus LORENTZON <marcus.xm.lorentzon@stericsson.com>
---
 drivers/video/mcde/mcde_hw.c | 33 +++++++++++++++++++++++----------
 1 file changed, 23 insertions(+), 10 deletions(-)

diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index c9b4a9f3165..97c10612663 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -86,6 +86,7 @@ static void wait_for_flow_disabled(struct mcde_chnl_state *chnl);
 #define DSI_READ_TIMEOUT 200
 #define DSI_WRITE_CMD_TIMEOUT 1000
 #define DSI_READ_DELAY 5
+#define DSI_READ_NBR_OF_RETRIES 2
 #define MCDE_FLOWEN_MAX_TRIAL 60
 
 static u8 *mcdeio;
@@ -2224,8 +2225,9 @@ int mcde_dsi_dcs_read(struct mcde_chnl_state *chnl,
 	u8 link = chnl->port.link;
 	u8 virt_id = chnl->port.phy.dsi.virt_id;
 	u32 settings;
-	int wait = 100;
-	bool error, ok;
+	bool ok = false;
+	bool error, ack_with_err;
+	u8 nbr_of_retries = DSI_READ_NBR_OF_RETRIES;
 
 	if (*len > MCDE_MAX_DCS_READ || chnl->port.type != MCDE_PORTTYPE_DSI)
 		return -EINVAL;
@@ -2252,15 +2254,26 @@ int mcde_dsi_dcs_read(struct mcde_chnl_state *chnl,
 		DSI_DIRECT_CMD_MAIN_SETTINGS_CMD_HEAD_ENUM(DCS_READ);
 	dsi_wreg(link, DSI_DIRECT_CMD_MAIN_SETTINGS, settings);
 	dsi_wreg(link, DSI_DIRECT_CMD_WRDAT0, cmd);
-	dsi_wreg(link, DSI_DIRECT_CMD_STS_CLR, ~0);
-	dsi_wreg(link, DSI_DIRECT_CMD_RD_STS_CLR, ~0);
-	dsi_wreg(link, DSI_DIRECT_CMD_SEND, true);
 
-	/* TODO */
-	while (wait-- && !(error = dsi_rfld(link, DSI_DIRECT_CMD_STS,
-		READ_COMPLETED_WITH_ERR)) && !(ok = dsi_rfld(link,
-		DSI_DIRECT_CMD_STS, READ_COMPLETED)))
-		mdelay(10);
+	do {
+		u8 wait  = DSI_READ_TIMEOUT;
+		dsi_wreg(link, DSI_DIRECT_CMD_STS_CLR, ~0);
+		dsi_wreg(link, DSI_DIRECT_CMD_RD_STS_CLR, ~0);
+		dsi_wreg(link, DSI_DIRECT_CMD_SEND, true);
+
+		while (wait-- && !(error = dsi_rfld(link, DSI_DIRECT_CMD_STS,
+					READ_COMPLETED_WITH_ERR)) &&
+				!(ok = dsi_rfld(link, DSI_DIRECT_CMD_STS,
+							READ_COMPLETED)))
+			udelay(DSI_READ_DELAY);
+
+		ack_with_err = dsi_rfld(link, DSI_DIRECT_CMD_STS,
+						ACKNOWLEDGE_WITH_ERR_RECEIVED);
+		if (ack_with_err)
+			dev_warn(&mcde_dev->dev,
+					"DCS Acknowledge Error Report %.4X\n",
+				dsi_rfld(link, DSI_DIRECT_CMD_STS, ACK_VAL));
+	} while (--nbr_of_retries && ack_with_err);
 
 	if (ok) {
 		int rdsize;
-- 
cgit v1.2.3


From bd4d55fcb18a5d737296b6c33313b38693d1d59a Mon Sep 17 00:00:00 2001
From: Jimmy Rubin <jimmy.rubin@stericsson.com>
Date: Wed, 5 Oct 2011 06:50:22 +0200
Subject: video: mcde: get_pkt_div should use port mode

Port->mode should be used to determine if DSI Command
or DSI Video mode is used.

ST-Ericsson ID: 365544
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: Trivial

Signed-off-by: Jimmy Rubin <jimmy.rubin@stericsson.com>

Change-Id: I96513fd3cbeed566b8827fe796e69bc0f38d049a
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/33040
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Tested-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
Reviewed-by: QABUILD
---
 drivers/video/mcde/mcde_hw.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index 97c10612663..06fbb5674d6 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -1786,7 +1786,7 @@ static u32 get_pkt_div(u32 disp_ppl,
 	 */
 	switch (port->type) {
 	case MCDE_PORTTYPE_DSI:
-		if (port->ifc == DSI_CMD_MODE)
+		if (port->mode == MCDE_PORTMODE_CMD)
 			/* Equivalent of ceil(disp_ppl/fifo_size) */
 			return (disp_ppl - 1) / get_output_fifo_size(fifo) + 1;
 		else
-- 
cgit v1.2.3


From 951ae5bce4da5777911ad858af5d5b8798ff3030 Mon Sep 17 00:00:00 2001
From: Marcus Lorentzon <marcus.xm.lorentzon@stericsson.com>
Date: Tue, 11 Oct 2011 18:03:30 +0200
Subject: video: mcde: Fix suspend oops in Android

Generic suspend/resume should not be enabled on Android
since Android implement power management in early suspend.

ST-Ericsson ID: 365249
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I35b5e004d48a4be8e98913be8b3ed4abbf48f9a0
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/33727
Reviewed-by: Marcus LORENTZON <marcus.xm.lorentzon@stericsson.com>
Tested-by: Marcus LORENTZON <marcus.xm.lorentzon@stericsson.com>
Reviewed-by: Jonas ABERG <jonas.aberg@stericsson.com>
---
 drivers/video/mcde/mcde_bus.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/video/mcde/mcde_bus.c b/drivers/video/mcde/mcde_bus.c
index 852451954a4..a600844a9ac 100644
--- a/drivers/video/mcde/mcde_bus.c
+++ b/drivers/video/mcde/mcde_bus.c
@@ -109,7 +109,11 @@ static int mcde_drv_suspend(struct device *_dev, pm_message_t state)
 	if (drv->suspend)
 		return drv->suspend(dev, state);
 	else
+#if !defined(CONFIG_HAS_EARLYSUSPEND) && defined(CONFIG_PM)
 		return dev->set_power_mode(dev, MCDE_DISPLAY_PM_OFF);
+#else
+		return 0;
+#endif
 }
 
 static int mcde_drv_resume(struct device *_dev)
@@ -120,7 +124,11 @@ static int mcde_drv_resume(struct device *_dev)
 	if (drv->resume)
 		return drv->resume(dev);
 	else
+#if !defined(CONFIG_HAS_EARLYSUSPEND) && defined(CONFIG_PM)
 		return dev->set_power_mode(dev, MCDE_DISPLAY_PM_STANDBY);
+#else
+		return 0;
+#endif
 }
 
 /* Bus device */
-- 
cgit v1.2.3


From 4e6676073e47f2fde836944f4b5d159c9403155c Mon Sep 17 00:00:00 2001
From: Jimmy Rubin <jimmy.rubin@stericsson.com>
Date: Tue, 11 Oct 2011 12:31:55 +0200
Subject: ux500: mcde: Add correct reg id for sony display

ST-Ericsson ID: 321190
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I606e9f3df286e7f8cd383e6840561ab9742d612c
Signed-off-by: Jimmy Rubin <jimmy.rubin@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/33680
Reviewed-by: QABUILD
Reviewed-by: Marcus LORENTZON <marcus.xm.lorentzon@stericsson.com>
---
 arch/arm/mach-ux500/board-mop500-mcde.c | 2 +-
 arch/arm/mach-ux500/board-u5500-mcde.c  | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-ux500/board-mop500-mcde.c b/arch/arm/mach-ux500/board-mop500-mcde.c
index b517cecc72e..a1055854d47 100644
--- a/arch/arm/mach-ux500/board-mop500-mcde.c
+++ b/arch/arm/mach-ux500/board-mop500-mcde.c
@@ -144,7 +144,7 @@ static struct mcde_port sony_port0 = {
 struct mcde_display_sony_acx424akp_platform_data
 			sony_acx424akp_display0_pdata = {
 	.reset_gpio = HREFV60_DISP2_RST_GPIO,
-	.regulator_id = "vaux12v5",
+	.regulator_id = "vddi",
 };
 
 static struct mcde_display_device sony_acx424akp_display0 = {
diff --git a/arch/arm/mach-ux500/board-u5500-mcde.c b/arch/arm/mach-ux500/board-u5500-mcde.c
index 54245db882c..859a316cd45 100644
--- a/arch/arm/mach-ux500/board-u5500-mcde.c
+++ b/arch/arm/mach-ux500/board-u5500-mcde.c
@@ -174,7 +174,7 @@ struct mcde_display_sony_acx424akp_platform_data \
 	.reset_low_delay = 1,
 	.sleep_out_delay = 140,
 #ifdef CONFIG_REGULATOR
-	.regulator_id = "v-display",
+	.regulator_id = "vddi",
 	.min_supply_voltage = 2800000, /* 2.8V */
 	.max_supply_voltage = 2800000 /* 2.8V */
 #endif
-- 
cgit v1.2.3


From e15433dc1069d9fa257c5689f5a0e4a5ccc75cc6 Mon Sep 17 00:00:00 2001
From: Jimmy Rubin <jimmy.rubin@stericsson.com>
Date: Thu, 29 Sep 2011 14:55:00 +0200
Subject: video: mcde: Move driver data to sony display

Some driver data that are located in the board file should be
filled in by the display driver instead

ST-Ericsson ID: 321190
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I564462d9806cfde90de25ff436e0d4946682ef23
Signed-off-by: Jimmy Rubin <jimmy.rubin@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/32595
Reviewed-by: QABUILD
Reviewed-by: Marcus LORENTZON <marcus.xm.lorentzon@stericsson.com>
---
 drivers/video/mcde/display-sony_acx424akp_dsi.c | 295 ++++++++++++------------
 include/video/mcde_display-sony_acx424akp_dsi.h |   2 -
 2 files changed, 148 insertions(+), 149 deletions(-)

diff --git a/drivers/video/mcde/display-sony_acx424akp_dsi.c b/drivers/video/mcde/display-sony_acx424akp_dsi.c
index 3cad2b9718e..aace9ff94f2 100644
--- a/drivers/video/mcde/display-sony_acx424akp_dsi.c
+++ b/drivers/video/mcde/display-sony_acx424akp_dsi.c
@@ -14,10 +14,31 @@
 #include <linux/delay.h>
 #include <linux/gpio.h>
 #include <linux/err.h>
+#include <linux/slab.h>
+
+#include <linux/regulator/consumer.h>
 
 #include <video/mcde_display.h>
 #include <video/mcde_display-sony_acx424akp_dsi.h>
 
+#define RESET_DELAY_MS		11
+#define RESET_LOW_DELAY_US	20
+#define SLEEP_OUT_DELAY_MS	140
+#define IO_REGU			"vddi"
+#define IO_REGU_MIN		1600000
+#define IO_REGU_MAX		3300000
+
+struct device_info {
+	int reset_gpio;
+	struct mcde_port port;
+	struct regulator *regulator;
+};
+
+static inline struct device_info *get_drvdata(struct mcde_display_device *ddev)
+{
+	return (struct device_info *)dev_get_drvdata(&ddev->dev);
+}
+
 static int display_read_deviceid(struct mcde_display_device *dev, u16 *id)
 {
 	struct mcde_chnl_state *chnl;
@@ -58,50 +79,62 @@ out:
 	return 0;
 }
 
-static int sony_acx424akp_platform_enable(struct mcde_display_device *dev)
+static int power_on(struct mcde_display_device *dev)
 {
-	struct mcde_display_sony_acx424akp_platform_data *pdata =
-		dev->dev.platform_data;
+	struct device_info *di = get_drvdata(dev);
 
 	dev_dbg(&dev->dev, "%s: Reset & power on sony display\n", __func__);
 
-	if (pdata->regulator) {
-		if (regulator_enable(pdata->regulator) < 0) {
-			dev_err(&dev->dev, "%s:Failed to enable regulator\n"
-				, __func__);
-			return -EINVAL;
-		}
-	}
-	if (pdata->reset_gpio)
-		gpio_set_value(pdata->reset_gpio, pdata->reset_high);
-	msleep(pdata->reset_delay);	/* as per sony lcd spec */
-	if (pdata->reset_gpio)
-		gpio_set_value(pdata->reset_gpio, !pdata->reset_high);
-	msleep(pdata->reset_low_delay);	/* as per sony lcd spec */
-	if (pdata->reset_gpio)
-		gpio_set_value(pdata->reset_gpio, pdata->reset_high);
-	msleep(pdata->reset_delay);	/* as per sony lcd spec */
+	regulator_enable(di->regulator);
+	gpio_set_value_cansleep(di->reset_gpio, 0);
+	udelay(RESET_LOW_DELAY_US);
+	gpio_set_value_cansleep(di->reset_gpio, 1);
+	msleep(RESET_DELAY_MS);
 
 	return 0;
 }
 
-static int sony_acx424akp_platform_disable(struct mcde_display_device *dev)
+static int power_off(struct mcde_display_device *dev)
 {
-	struct mcde_display_sony_acx424akp_platform_data *pdata =
-		dev->dev.platform_data;
+	struct device_info *di = get_drvdata(dev);
 
 	dev_dbg(&dev->dev, "%s:Reset & power off sony display\n", __func__);
 
-	if (pdata->regulator) {
-		if (regulator_disable(pdata->regulator) < 0) {
-			dev_err(&dev->dev, "%s:Failed to disable regulator\n"
-				, __func__);
-			return -EINVAL;
-		}
-	}
+	regulator_disable(di->regulator);
+
 	return 0;
 }
 
+static int display_on(struct mcde_display_device *ddev)
+{
+	int ret;
+
+	dev_dbg(&ddev->dev, "Display on sony display\n");
+
+	ret = mcde_dsi_dcs_write(ddev->chnl_state, DCS_CMD_EXIT_SLEEP_MODE,
+								NULL, 0);
+	if (ret)
+		return ret;
+	msleep(SLEEP_OUT_DELAY_MS);
+	return mcde_dsi_dcs_write(ddev->chnl_state, DCS_CMD_SET_DISPLAY_ON,
+								NULL, 0);
+}
+
+static int display_off(struct mcde_display_device *ddev)
+{
+	int ret;
+
+	dev_dbg(&ddev->dev, "Display off sony display\n");
+
+	ret = mcde_dsi_dcs_write(ddev->chnl_state, DCS_CMD_SET_DISPLAY_OFF,
+								NULL, 0);
+	if (ret)
+		return ret;
+
+	return mcde_dsi_dcs_write(ddev->chnl_state, DCS_CMD_ENTER_SLEEP_MODE,
+								NULL, 0);
+}
+
 static int sony_acx424akp_set_scan_mode(struct mcde_display_device *ddev,
 		enum mcde_display_power_mode power_mode)
 {
@@ -148,187 +181,155 @@ static int sony_acx424akp_set_power_mode(struct mcde_display_device *ddev,
 	enum mcde_display_power_mode power_mode)
 {
 	int ret = 0;
-	struct mcde_display_sony_acx424akp_platform_data *pdata =
-		ddev->dev.platform_data;
 
 	dev_dbg(&ddev->dev, "%s:Set Power mode\n", __func__);
 
 	/* OFF -> STANDBY */
 	if (ddev->power_mode == MCDE_DISPLAY_PM_OFF &&
-		power_mode != MCDE_DISPLAY_PM_OFF) {
-
-		if (ddev->platform_enable) {
-			ret = ddev->platform_enable(ddev);
-			if (ret)
-				return ret;
-		}
-
+					power_mode != MCDE_DISPLAY_PM_OFF) {
+		ret = power_on(ddev);
+		if (ret)
+			return ret;
 		ddev->power_mode = MCDE_DISPLAY_PM_STANDBY;
 	}
 
 	/* STANDBY -> ON */
 	if (ddev->power_mode == MCDE_DISPLAY_PM_STANDBY &&
-		power_mode == MCDE_DISPLAY_PM_ON) {
-
-		ret = mcde_dsi_dcs_write(ddev->chnl_state,
-		DCS_CMD_EXIT_SLEEP_MODE, NULL, 0);
-		if (ret)
-			return ret;
+					power_mode == MCDE_DISPLAY_PM_ON) {
 
-		msleep(pdata->sleep_out_delay);
-
-		ret = mcde_dsi_dcs_write(ddev->chnl_state,
-			DCS_CMD_SET_DISPLAY_ON, NULL, 0);
+		ret = display_on(ddev);
 		if (ret)
 			return ret;
-
 		ddev->power_mode = MCDE_DISPLAY_PM_ON;
-		goto set_power_and_exit;
 	}
 	/* ON -> STANDBY */
 	else if (ddev->power_mode == MCDE_DISPLAY_PM_ON &&
-		power_mode <= MCDE_DISPLAY_PM_STANDBY) {
-		ret = mcde_dsi_dcs_write(ddev->chnl_state,
-			DCS_CMD_SET_DISPLAY_OFF, NULL, 0);
-		if (ret)
-			return ret;
+					power_mode <= MCDE_DISPLAY_PM_STANDBY) {
 
-		ret = mcde_dsi_dcs_write(ddev->chnl_state,
-			DCS_CMD_ENTER_SLEEP_MODE, NULL, 0);
+		ret = display_off(ddev);
 		if (ret)
 			return ret;
-
 		ddev->power_mode = MCDE_DISPLAY_PM_STANDBY;
 	}
 
-	/* SLEEP -> OFF */
+	/* STANDBY -> OFF */
 	if (ddev->power_mode == MCDE_DISPLAY_PM_STANDBY &&
-		power_mode == MCDE_DISPLAY_PM_OFF) {
-		if (ddev->platform_disable) {
-			ret = ddev->platform_disable(ddev);
-			if (ret)
-				return ret;
-		}
+					power_mode == MCDE_DISPLAY_PM_OFF) {
+		ret = power_off(ddev);
+		if (ret)
+			return ret;
 		ddev->power_mode = MCDE_DISPLAY_PM_OFF;
 	}
 
-set_power_and_exit:
 	mcde_chnl_set_power_mode(ddev->chnl_state, ddev->power_mode);
-	ret = sony_acx424akp_set_scan_mode(ddev, power_mode);
-
-	return ret;
+	return sony_acx424akp_set_scan_mode(ddev, power_mode);
 }
 
 static int __devinit sony_acx424akp_probe(struct mcde_display_device *dev)
 {
 	int ret = 0;
-	u16 id;
+	u16 id = 0;
+	struct device_info *di;
+	struct mcde_port *port;
 	struct mcde_display_sony_acx424akp_platform_data *pdata =
 		dev->dev.platform_data;
 
-	if (pdata == NULL) {
-		dev_err(&dev->dev, "%s:Platform data missing\n", __func__);
-		return -EINVAL;
-	}
-
-	if (dev->port->type != MCDE_PORTTYPE_DSI) {
-		dev_err(&dev->dev,
-			"%s:Invalid port type %d\n",
-			__func__, dev->port->type);
+	if (pdata == NULL || !pdata->reset_gpio) {
+		dev_err(&dev->dev, "Invalid platform data\n");
 		return -EINVAL;
 	}
 
-	if (!dev->platform_enable && !dev->platform_disable) {
-		pdata->sony_acx424akp_platform_enable = true;
-		if (pdata->reset_gpio) {
-			ret = gpio_request(pdata->reset_gpio, NULL);
-			if (ret) {
-				dev_warn(&dev->dev,
-					"%s:Failed to request gpio %d\n",
-					__func__, pdata->reset_gpio);
-				goto gpio_request_failed;
-			}
-			gpio_direction_output(pdata->reset_gpio,
-				!pdata->reset_high);
-		}
-		if (pdata->regulator_id) {
-			pdata->regulator = regulator_get(NULL,
-				pdata->regulator_id);
-			if (IS_ERR(pdata->regulator)) {
-				ret = PTR_ERR(pdata->regulator);
-				dev_warn(&dev->dev,
-					"%s:Failed to get regulator '%s'\n",
-					__func__, pdata->regulator_id);
-				pdata->regulator = NULL;
-				goto regulator_get_failed;
-			}
-			regulator_set_voltage(pdata->regulator,
-					pdata->min_supply_voltage,
-					pdata->max_supply_voltage);
-			/*
-			* When u-boot has display a startup screen.
-			* U-boot has turned on display power however the
-			* regulator framework does not know about that
-			* This is the case here, the display driver has to
-			* enable the regulator for the display.
-			*/
-			if (dev->power_mode == MCDE_DISPLAY_PM_STANDBY) {
-				ret = regulator_enable(pdata->regulator);
-				if (ret < 0) {
-					dev_err(&dev->dev,
-					"%s:Failed to enable regulator\n"
-					, __func__);
-					goto regulator_enable_failed;
-				}
-			}
-		}
+	di = kzalloc(sizeof(*di), GFP_KERNEL);
+	if (!di)
+		return -ENOMEM;
+
+	port = dev->port;
+	di->reset_gpio = pdata->reset_gpio;
+	di->port.type = MCDE_PORTTYPE_DSI;
+	di->port.mode = MCDE_PORTMODE_CMD;
+	di->port.pixel_format = MCDE_PORTPIXFMT_DSI_24BPP;
+	di->port.sync_src = MCDE_SYNCSRC_BTA;
+	di->port.phy.dsi.num_data_lanes = 2;
+	di->port.link = port->link;
+	/* TODO: Move UI to mcde_hw.c when clk_get_rate(dsi) is done */
+	di->port.phy.dsi.ui = 9;
+
+	ret = gpio_request(di->reset_gpio, NULL);
+	if (WARN_ON(ret))
+		goto gpio_request_failed;
+
+	gpio_direction_output(di->reset_gpio, 1);
+	di->regulator = regulator_get(&dev->dev, IO_REGU);
+	if (IS_ERR(di->regulator)) {
+		ret = PTR_ERR(di->regulator);
+		di->regulator = NULL;
+		goto regulator_get_failed;
 	}
+	ret = regulator_set_voltage(di->regulator, IO_REGU_MIN, IO_REGU_MAX);
+	if (WARN_ON(ret))
+		goto regulator_voltage_failed;
 
-	/* TODO: Remove when DSI send command uses interrupts */
-	dev->platform_enable = sony_acx424akp_platform_enable,
-	dev->platform_disable = sony_acx424akp_platform_disable,
 	dev->set_power_mode = sony_acx424akp_set_power_mode;
 
+	dev->port = &di->port;
+	dev->native_x_res = 480;
+	dev->native_y_res = 854;
+	dev_set_drvdata(&dev->dev, di);
+
+	/*
+	* When u-boot has display a startup screen.
+	* U-boot has turned on display power however the
+	* regulator framework does not know about that
+	* This is the case here, the display driver has to
+	* enable the regulator for the display.
+	*/
+	if (dev->power_mode == MCDE_DISPLAY_PM_STANDBY) {
+		(void) regulator_enable(di->regulator);
+	} else if (dev->power_mode == MCDE_DISPLAY_PM_OFF) {
+		power_on(dev);
+		dev->power_mode = MCDE_DISPLAY_PM_STANDBY;
+	}
+
 	ret = display_read_deviceid(dev, &id);
+	if (ret)
+		goto read_id_failed;
 
 	switch (id) {
 	case DISPLAY_SONY_ACX424AKP:
 		pdata->disp_panel = DISPLAY_SONY_ACX424AKP;
-		dev_info(&dev->dev, "Sony ACX424AKP display (ID 0x%.4X) \
-								probed\n", id);
-		goto out;
-
+		dev_info(&dev->dev,
+			"Sony ACX424AKP display (ID 0x%.4X) probed\n", id);
+		break;
 	default:
 		pdata->disp_panel = DISPLAY_NONE;
-		dev_warn(&dev->dev, "Display not recognized\n");
-		break;
+		dev_info(&dev->dev,
+			"Display not recognized (ID 0x%.4X) probed\n", id);
+		goto read_id_failed;
 	}
 
-regulator_enable_failed:
+	return 0;
+
+read_id_failed:
+regulator_voltage_failed:
+	regulator_put(di->regulator);
 regulator_get_failed:
-	if (pdata->sony_acx424akp_platform_enable && pdata->reset_gpio)
-		gpio_free(pdata->reset_gpio);
+	gpio_free(di->reset_gpio);
 gpio_request_failed:
-out:
+	kfree(di);
 	return ret;
 }
 
 static int __devexit sony_acx424akp_remove(struct mcde_display_device *dev)
 {
-	struct mcde_display_sony_acx424akp_platform_data *pdata =
-		dev->dev.platform_data;
+	struct device_info *di = get_drvdata(dev);
 
 	dev->set_power_mode(dev, MCDE_DISPLAY_PM_OFF);
 
-	if (!pdata->sony_acx424akp_platform_enable)
-		return 0;
+	regulator_put(di->regulator);
+	gpio_direction_input(di->reset_gpio);
+	gpio_free(di->reset_gpio);
 
-	if (pdata->regulator)
-		regulator_put(pdata->regulator);
-	if (pdata->reset_gpio) {
-		gpio_direction_input(pdata->reset_gpio);
-		gpio_free(pdata->reset_gpio);
-	}
+	kfree(di);
 
 	return 0;
 }
diff --git a/include/video/mcde_display-sony_acx424akp_dsi.h b/include/video/mcde_display-sony_acx424akp_dsi.h
index de862a3f28b..c00c3513da3 100644
--- a/include/video/mcde_display-sony_acx424akp_dsi.h
+++ b/include/video/mcde_display-sony_acx424akp_dsi.h
@@ -31,8 +31,6 @@ struct  mcde_display_sony_acx424akp_platform_data {
 	enum display_panel_type disp_panel; /* display panel types */
 
 	/* Driver data */
-	bool sony_acx424akp_platform_enable;
-	struct regulator *regulator;
 	int max_supply_voltage;
 	int min_supply_voltage;
 };
-- 
cgit v1.2.3


From 52b14a7f39fe04778f7998305c6616df62df8cdf Mon Sep 17 00:00:00 2001
From: Jimmy Rubin <jimmy.rubin@stericsson.com>
Date: Fri, 30 Sep 2011 12:48:03 +0200
Subject: ux500: mcde: Remove sony display data from board

Removes sony display driver specific data from board-xxx-mcde.c

ST-Ericsson ID: 321190
ST-Ericsson Linux Next: NA
ST-Ericsson FOSS-OUT ID: Trivial

Signed-off-by: Jimmy Rubin <jimmy.rubin@stericsson.com>

Change-Id: Ice61906fb359edf5ebd665e066c4b537312cb94b
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/32718
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Tested-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Reviewed-by: QABUILD
Reviewed-by: Marcus LORENTZON <marcus.xm.lorentzon@stericsson.com>
---
 arch/arm/mach-ux500/board-mop500-mcde.c | 18 ------------------
 arch/arm/mach-ux500/board-u5500-mcde.c  | 32 --------------------------------
 2 files changed, 50 deletions(-)

diff --git a/arch/arm/mach-ux500/board-mop500-mcde.c b/arch/arm/mach-ux500/board-mop500-mcde.c
index a1055854d47..ae043b1d21b 100644
--- a/arch/arm/mach-ux500/board-mop500-mcde.c
+++ b/arch/arm/mach-ux500/board-mop500-mcde.c
@@ -123,28 +123,12 @@ static struct mcde_display_device samsung_s6d16d0_display0 = {
 
 #ifdef CONFIG_DISPLAY_SONY_ACX424AKP_DSI_PRIMARY
 static struct mcde_port sony_port0 = {
-	.type = MCDE_PORTTYPE_DSI,
-	.mode = MCDE_PORTMODE_CMD,
-	.pixel_format = MCDE_PORTPIXFMT_DSI_24BPP,
-	.ifc = 1,
 	.link = 0,
-	.sync_src = MCDE_SYNCSRC_BTA,
-	.update_auto_trig = false,
-	.phy = {
-		.dsi = {
-			.virt_id = 0,
-			.num_data_lanes = 2,
-			.ui = DSI_UNIT_INTERVAL_0,
-			.clk_cont = false,
-			.data_lanes_swap = false,
-		},
-	},
 };
 
 struct mcde_display_sony_acx424akp_platform_data
 			sony_acx424akp_display0_pdata = {
 	.reset_gpio = HREFV60_DISP2_RST_GPIO,
-	.regulator_id = "vddi",
 };
 
 static struct mcde_display_device sony_acx424akp_display0 = {
@@ -158,8 +142,6 @@ static struct mcde_display_device sony_acx424akp_display0 = {
 	 */
 	.fifo = MCDE_FIFO_A,
 	.default_pixel_format = MCDE_OVLYPIXFMT_RGBA8888,
-	.native_x_res = 480,
-	.native_y_res = 854,
 	.synchronized_update = true,
 	.rotbuf1 = U8500_ESRAM_BASE + 0x20000 * 4,
 	.rotbuf2 = U8500_ESRAM_BASE + 0x20000 * 4 + 0x10000,
diff --git a/arch/arm/mach-ux500/board-u5500-mcde.c b/arch/arm/mach-ux500/board-u5500-mcde.c
index 859a316cd45..6dc8ef73f3c 100644
--- a/arch/arm/mach-ux500/board-u5500-mcde.c
+++ b/arch/arm/mach-ux500/board-u5500-mcde.c
@@ -142,42 +142,12 @@ struct mcde_display_device generic_display0 = {
 #endif /* CONFIG_DISPLAY_GENERIC_DSI_PRIMARY */
 
 static struct mcde_port port1 = {
-	.type = MCDE_PORTTYPE_DSI,
-	.mode = MCDE_PORTMODE_CMD,
-	.pixel_format = MCDE_PORTPIXFMT_DSI_24BPP,
-	.ifc = DSI_VIDEO_MODE,
 	.link = 0,
-#if defined(CONFIG_DISPLAY_SONY_ACX424AKP_DSI_PRIMARY) &&      \
-		defined(CONFIG_DISPLAY_GENERIC_DSI_PRIMARY_AUTO_SYNC)
-	.sync_src = MCDE_SYNCSRC_OFF,
-	.update_auto_trig = true,
-#else
-	.sync_src = MCDE_SYNCSRC_BTA,
-	.update_auto_trig = false,
-#endif
-	.phy = {
-		.dsi = {
-			.virt_id = 0,
-			.num_data_lanes = 2,
-			.ui = DSI_UNIT_INTERVAL_0,
-			.clk_cont = false,
-			.data_lanes_swap = false,
-		},
-	},
 };
 
 struct mcde_display_sony_acx424akp_platform_data \
 			sony_acx424akp_display0_pdata = {
 	.reset_gpio = 226,
-	.reset_high = true,
-	.reset_delay = 11,
-	.reset_low_delay = 1,
-	.sleep_out_delay = 140,
-#ifdef CONFIG_REGULATOR
-	.regulator_id = "vddi",
-	.min_supply_voltage = 2800000, /* 2.8V */
-	.max_supply_voltage = 2800000 /* 2.8V */
-#endif
 };
 
 struct mcde_display_device sony_acx424akp_display0 = {
@@ -191,8 +161,6 @@ struct mcde_display_device sony_acx424akp_display0 = {
 #else
 	.default_pixel_format = MCDE_OVLYPIXFMT_RGBA8888,
 #endif
-	.native_x_res = 480,
-	.native_y_res = 854,
 #ifdef CONFIG_DISPLAY_GENERIC_DSI_PRIMARY_VSYNC
 	.synchronized_update = true,
 #else
-- 
cgit v1.2.3


From d9566416ea21192a1b277590e2f2b4438dbe9a26 Mon Sep 17 00:00:00 2001
From: Jimmy Rubin <jimmy.rubin@stericsson.com>
Date: Fri, 30 Sep 2011 12:54:39 +0200
Subject: video: mcde: Remove sony display platform data

Removes driver specific fields from platform_data
in sony display driver.

ST-Ericsson ID: 321190
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I2d8a74716de1b8972ab1b5a145e7c1e66896de3d
Signed-off-by: Jimmy Rubin <jimmy.rubin@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/32719
Reviewed-by: QABUILD
Reviewed-by: Marcus LORENTZON <marcus.xm.lorentzon@stericsson.com>
---
 include/video/mcde_display-sony_acx424akp_dsi.h | 13 -------------
 1 file changed, 13 deletions(-)

diff --git a/include/video/mcde_display-sony_acx424akp_dsi.h b/include/video/mcde_display-sony_acx424akp_dsi.h
index c00c3513da3..9f656fdcc3b 100644
--- a/include/video/mcde_display-sony_acx424akp_dsi.h
+++ b/include/video/mcde_display-sony_acx424akp_dsi.h
@@ -11,10 +11,6 @@
 #ifndef __MCDE_DISPLAY_SONY_ACX424AKP__H__
 #define __MCDE_DISPLAY_SONY_ACX424AKP__H__
 
-#include <linux/regulator/consumer.h>
-
-#include "mcde_display.h"
-
 enum display_panel_type {
 	DISPLAY_NONE			= 0,
 	DISPLAY_SONY_ACX424AKP          = 0x1b81,
@@ -23,16 +19,7 @@ enum display_panel_type {
 struct  mcde_display_sony_acx424akp_platform_data {
 	/* Platform info */
 	int reset_gpio;
-	bool reset_high;
-	const char *regulator_id;
-	int reset_delay; /* ms */
-	int reset_low_delay; /* ms */
-	int sleep_out_delay; /* ms */
 	enum display_panel_type disp_panel; /* display panel types */
-
-	/* Driver data */
-	int max_supply_voltage;
-	int min_supply_voltage;
 };
 
 #endif /* __MCDE_DISPLAY_SONY_ACX424AKP__H__ */
-- 
cgit v1.2.3


From 014283c9e9eb39ba74e883850063c46e924ae433 Mon Sep 17 00:00:00 2001
From: Marcus Lorentzon <marcus.xm.lorentzon@stericsson.com>
Date: Wed, 12 Oct 2011 13:53:41 +0200
Subject: ux500: mcde: Remove unused code

mcde_get_main_display is not used in the kernel.

ST-Ericsson ID: 365249
ST-Ericsson FOSS-OUT ID: Trivial
ST-Ericsson Linux next: NA

Change-Id: I86b947e1273ba0a7340cee06cfa1d7d732d064b8
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/33784
Reviewed-by: Marcus LORENTZON <marcus.xm.lorentzon@stericsson.com>
Tested-by: Marcus LORENTZON <marcus.xm.lorentzon@stericsson.com>
---
 arch/arm/mach-ux500/board-mop500-mcde.c | 24 ------------------------
 arch/arm/mach-ux500/board-u5500-mcde.c  | 17 +----------------
 2 files changed, 1 insertion(+), 40 deletions(-)

diff --git a/arch/arm/mach-ux500/board-mop500-mcde.c b/arch/arm/mach-ux500/board-mop500-mcde.c
index ae043b1d21b..a179c157ff5 100644
--- a/arch/arm/mach-ux500/board-mop500-mcde.c
+++ b/arch/arm/mach-ux500/board-mop500-mcde.c
@@ -754,30 +754,6 @@ int __init init_display_devices(void)
 	return ret;
 }
 
-struct mcde_display_device *mcde_get_main_display(void)
-{
-#if defined(CONFIG_DISPLAY_GENERIC_PRIMARY) && \
-	defined(CONFIG_DISPLAY_SONY_ACX424AKP_DSI_PRIMARY)
-	if (!uib_is_u8500uibr3())
-		return &samsung_s6d16d0_display0;
-	else
-		return &sony_acx424akp_display0;
-#elif defined(CONFIG_DISPLAY_GENERIC_PRIMARY)
-	return &samsung_s6d16d0_display0;
-#elif defined(CONFIG_DISPLAY_SONY_ACX424AKP_DSI_PRIMARY)
-	return &sony_acx424akp_display0;
-#elif defined(CONFIG_DISPLAY_GENERIC_DSI_SECONDARY)
-	return &samsung_s6d16d0_display1;
-#elif defined(CONFIG_DISPLAY_AV8100_TERTIARY)
-	return &av8100_hdmi;
-#elif defined(CONFIG_DISPLAY_AB8500_TERTIARY)
-	return &tvout_ab8500_display;
-#else
-	return NULL;
-#endif
-}
-EXPORT_SYMBOL(mcde_get_main_display);
-
 module_init(init_display_devices);
 
 #endif
diff --git a/arch/arm/mach-ux500/board-u5500-mcde.c b/arch/arm/mach-ux500/board-u5500-mcde.c
index 6dc8ef73f3c..9fe561033ba 100644
--- a/arch/arm/mach-ux500/board-u5500-mcde.c
+++ b/arch/arm/mach-ux500/board-u5500-mcde.c
@@ -496,20 +496,5 @@ int __init init_u5500_display_devices(void)
 	return ret;
 }
 
-struct mcde_display_device *mcde_u5500_get_main_display(void)
-{
-#if defined(CONFIG_DISPLAY_GENERIC_DSI_PRIMARY) || \
-		defined(CONFIG_DISPLAY_SONY_ACX424AKP_DSI_PRIMARY)
-	if (cpu_is_u5500v1())
-		return &generic_display0;
-	if (cpu_is_u5500v2())
-		return &sony_acx424akp_display0;
-#elif defined(CONFIG_DISPLAY_AV8100_TERTIARY)
-	return &av8100_hdmi;
-#endif
-	return NULL;
-}
-EXPORT_SYMBOL(mcde_u5500_get_main_display);
-
-module_init(init_u5500_display_devices);
+module_init(init_display_devices);
 #endif
-- 
cgit v1.2.3


From ff2cdf4134e901e64f184b6670dfad9efb7dceb5 Mon Sep 17 00:00:00 2001
From: Marcus Lorentzon <marcus.xm.lorentzon@stericsson.com>
Date: Wed, 12 Oct 2011 14:46:03 +0200
Subject: ux500: mcde: Remove unused MCDE auto sync

Auto sync for command mode displays are no
longer used and should be implemented in fbdev
if needed.

ST-Ericsson ID: 365249
ST-Ericsson FOSS-OUT ID: Trivial
ST-Ericsson Linux next: NA

Change-Id: I860d9221dc79d6e5acd53c514d90a8eac57fb18a
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/33800
Reviewed-by: Marcus LORENTZON <marcus.xm.lorentzon@stericsson.com>
Tested-by: Marcus LORENTZON <marcus.xm.lorentzon@stericsson.com>
---
 arch/arm/mach-ux500/Kconfig-arch        | 13 -------
 arch/arm/mach-ux500/board-mop500-mcde.c | 66 -------------------------------
 arch/arm/mach-ux500/board-u5500-mcde.c  | 69 ---------------------------------
 3 files changed, 148 deletions(-)

diff --git a/arch/arm/mach-ux500/Kconfig-arch b/arch/arm/mach-ux500/Kconfig-arch
index a3ea7ad3d78..d00b176301d 100644
--- a/arch/arm/mach-ux500/Kconfig-arch
+++ b/arch/arm/mach-ux500/Kconfig-arch
@@ -89,13 +89,6 @@ config DISPLAY_GENERIC_DSI_PRIMARY_VSYNC
 	help
 	  Say yes to enable v-sync for primary display
 
-config DISPLAY_GENERIC_DSI_PRIMARY_AUTO_SYNC
-	bool "Enable auto sync for primary display"
-	depends on DISPLAY_GENERIC_DSI_PRIMARY
-	default n
-	help
-	  Say yes to enable auto sync for primary display
-
 config DISPLAY_SONY_ACX424AKP_DSI_PRIMARY
 	bool "Sony acx424akp DSI display"
 	select MCDE_DISPLAY_SONY_ACX424AKP_DSI
@@ -117,12 +110,6 @@ config DISPLAY_GENERIC_DSI_SECONDARY_VSYNC
 	help
 	  Say yes to enable v-sync for secondary display
 
-config DISPLAY_GENERIC_DSI_SECONDARY_AUTO_SYNC
-	bool "Enable auto sync for secondary display"
-	depends on DISPLAY_GENERIC_DSI_SECONDARY
-	help
-	  Say yes to enable auto sync for secondary display
-
 config DISPLAY_AB8500_TERTIARY
 	bool "AB8500 TVout display support"
 	depends on MACH_U8500 && !AV8100_SDTV
diff --git a/arch/arm/mach-ux500/board-mop500-mcde.c b/arch/arm/mach-ux500/board-mop500-mcde.c
index a179c157ff5..5933ab797fa 100644
--- a/arch/arm/mach-ux500/board-mop500-mcde.c
+++ b/arch/arm/mach-ux500/board-mop500-mcde.c
@@ -494,18 +494,6 @@ static int display_postregistered_callback(struct notifier_block *nb,
 	virtual_width = width;
 	virtual_height = height * 2;
 
-#if defined(CONFIG_DISPLAY_GENERIC_DSI_PRIMARY) &&	\
-			defined(CONFIG_DISPLAY_GENERIC_DSI_PRIMARY_AUTO_SYNC)
-	if (ddev->id == PRIMARY_DISPLAY_ID)
-		virtual_height = height;
-#endif
-
-#if defined(CONFIG_DISPLAY_GENERIC_DSI_SECONDARY) &&	\
-			defined(CONFIG_DISPLAY_GENERIC_DSI_SECONDARY_AUTO_SYNC)
-	if (ddev->id == SECONDARY_DISPLAY_ID)
-		virtual_height = height;
-#endif
-
 #ifdef CONFIG_DISPLAY_AV8100_TERTIARY
 	if (ddev->id == AV8100_DISPLAY_ID) {
 #ifdef CONFIG_MCDE_DISPLAY_HDMI_FB_AUTO_CREATE
@@ -566,58 +554,6 @@ static struct notifier_block display_nb = {
 * The main display will not be updated if startup graphics is displayed
 * from u-boot.
 */
-#if defined(CONFIG_DISPLAY_GENERIC_DSI_PRIMARY_AUTO_SYNC) || \
-			defined(CONFIG_DISPLAY_GENERIC_DSI_SECONDARY_AUTO_SYNC)
-static int framebuffer_postregistered_callback(struct notifier_block *nb,
-	unsigned long event, void *data)
-{
-	int ret = 0;
-	struct fb_event *event_data = data;
-	struct fb_info *info;
-	struct fb_var_screeninfo var;
-	struct fb_fix_screeninfo fix;
-	struct mcde_fb *mfb;
-	int i;
-
-	if (event != FB_EVENT_FB_REGISTERED)
-		return 0;
-
-	if (!event_data)
-		return 0;
-
-	info = event_data->info;
-	mfb = to_mcde_fb(info);
-	var = info->var;
-	fix = info->fix;
-
-	/* Apply overlay info */
-	for (i = 0; i < mfb->num_ovlys; i++) {
-		struct mcde_overlay *ovly = mfb->ovlys[i];
-		struct mcde_overlay_info ovly_info;
-		struct mcde_fb *mfb = to_mcde_fb(info);
-		int num_buffers;
-		memset(&ovly_info, 0, sizeof(ovly_info));
-		ovly_info.paddr = fix.smem_start +
-			fix.line_length * var.yoffset;
-		if (ovly_info.paddr + fix.line_length * var.yres
-			 > fix.smem_start + fix.smem_len)
-			ovly_info.paddr = fix.smem_start;
-		ovly_info.fmt = mfb->pix_fmt;
-		ovly_info.stride = fix.line_length;
-		ovly_info.w = var.xres;
-		ovly_info.h = var.yres;
-		ovly_info.dirty.w = var.xres;
-		ovly_info.dirty.h = var.yres;
-		(void) mcde_dss_apply_overlay(ovly, &ovly_info);
-		num_buffers = var.yres_virtual / var.yres;
-		ret = mcde_dss_update_overlay(ovly, num_buffers == 3);
-		if (ret)
-			break;
-	}
-
-	return ret;
-}
-#else
 static int framebuffer_postregistered_callback(struct notifier_block *nb,
 	unsigned long event, void *data)
 {
@@ -647,8 +583,6 @@ static int framebuffer_postregistered_callback(struct notifier_block *nb,
 out:
 	return ret;
 }
-#endif
-
 
 static struct notifier_block framebuffer_nb = {
 	.notifier_call = framebuffer_postregistered_callback,
diff --git a/arch/arm/mach-ux500/board-u5500-mcde.c b/arch/arm/mach-ux500/board-u5500-mcde.c
index 9fe561033ba..4af8ef048f7 100644
--- a/arch/arm/mach-ux500/board-u5500-mcde.c
+++ b/arch/arm/mach-ux500/board-u5500-mcde.c
@@ -84,14 +84,7 @@ static struct mcde_port port0 = {
 	.pixel_format = MCDE_PORTPIXFMT_DSI_24BPP,
 	.ifc = DSI_VIDEO_MODE,
 	.link = 0,
-#if defined(CONFIG_DISPLAY_GENERIC_DSI_PRIMARY) &&	\
-			defined(CONFIG_DISPLAY_GENERIC_DSI_PRIMARY_AUTO_SYNC)
-	.sync_src = MCDE_SYNCSRC_OFF,
-	.update_auto_trig = true,
-#else
 	.sync_src = MCDE_SYNCSRC_BTA,
-	.update_auto_trig = false,
-#endif
 	.phy = {
 		.dsi = {
 			.virt_id = 0,
@@ -292,13 +285,6 @@ static int display_postregistered_callback(struct notifier_block *nb,
 	virtual_width = width;
 	virtual_height = height * 2;
 
-#if (defined(CONFIG_DISPLAY_GENERIC_DSI_PRIMARY) || \
-		defined(CONFIG_DISPLAY_SONY_ACX424AKP_DSI_PRIMARY)) &&	\
-			defined(CONFIG_DISPLAY_GENERIC_DSI_PRIMARY_AUTO_SYNC)
-	if (ddev->id == PRIMARY_DISPLAY_ID)
-		virtual_height = height;
-#endif
-
 #ifdef CONFIG_DISPLAY_AV8100_TRIPPLE_BUFFER
 	if (ddev->id == AV8100_DISPLAY_ID)
 		virtual_height = height * 3;
@@ -358,59 +344,6 @@ static struct notifier_block display_nb = {
 * The main display will not be updated if startup graphics is displayed
 * from u-boot.
 */
-#if (defined(CONFIG_DISPLAY_GENERIC_DSI_PRIMARY) || \
-		defined(CONFIG_DISPLAY_SONY_ACX424AKP_DSI_PRIMARY))  && \
-		defined(CONFIG_DISPLAY_GENERIC_DSI_PRIMARY_AUTO_SYNC)
-static int framebuffer_postregistered_callback(struct notifier_block *nb,
-	unsigned long event, void *data)
-{
-	int ret = 0;
-	struct fb_event *event_data = data;
-	struct fb_info *info;
-	struct fb_var_screeninfo var;
-	struct fb_fix_screeninfo fix;
-	struct mcde_fb *mfb;
-	int i;
-
-	if (event != FB_EVENT_FB_REGISTERED)
-		return 0;
-
-	if (!event_data)
-		return 0;
-
-	info = event_data->info;
-	mfb = to_mcde_fb(info);
-	var = info->var;
-	fix = info->fix;
-
-	/* Apply overlay info */
-	for (i = 0; i < mfb->num_ovlys; i++) {
-		struct mcde_overlay *ovly = mfb->ovlys[i];
-		struct mcde_overlay_info ovly_info;
-		struct mcde_fb *mfb = to_mcde_fb(info);
-		int num_buffers;
-		memset(&ovly_info, 0, sizeof(ovly_info));
-		ovly_info.paddr = fix.smem_start +
-			fix.line_length * var.yoffset;
-		if (ovly_info.paddr + fix.line_length * var.yres
-			 > fix.smem_start + fix.smem_len)
-			ovly_info.paddr = fix.smem_start;
-		ovly_info.fmt = mfb->pix_fmt;
-		ovly_info.stride = fix.line_length;
-		ovly_info.w = var.xres;
-		ovly_info.h = var.yres;
-		ovly_info.dirty.w = var.xres;
-		ovly_info.dirty.h = var.yres;
-		(void) mcde_dss_apply_overlay(ovly, &ovly_info);
-		num_buffers = var.yres_virtual / var.yres;
-		ret = mcde_dss_update_overlay(ovly, num_buffers == 3);
-		if (ret)
-			break;
-	}
-
-	return ret;
-}
-#else
 static int framebuffer_postregistered_callback(struct notifier_block *nb,
 	unsigned long event, void *data)
 {
@@ -440,8 +373,6 @@ static int framebuffer_postregistered_callback(struct notifier_block *nb,
 out:
 	return ret;
 }
-#endif
-
 
 static struct notifier_block framebuffer_nb = {
 	.notifier_call = framebuffer_postregistered_callback,
-- 
cgit v1.2.3


From 70c0ae5165b6972cad8b556d3747874b694ad5de Mon Sep 17 00:00:00 2001
From: Marcus Lorentzon <marcus.xm.lorentzon@stericsson.com>
Date: Wed, 12 Oct 2011 14:46:50 +0200
Subject: video: mcde: Remove unused MCDE auto sync

Auto sync for command mode displays are no
longer used and should be implemented in fbdev
if needed.

ST-Ericsson ID: 365249
ST-Ericsson FOSS-OUT ID: Trivial
ST-Ericsson Linux next: NA

Change-Id: Ie67744bebf8d5b7049d055077814460959f86172
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/33801
Reviewed-by: Marcus LORENTZON <marcus.xm.lorentzon@stericsson.com>
Tested-by: Marcus LORENTZON <marcus.xm.lorentzon@stericsson.com>
---
 drivers/video/mcde/mcde_hw.c | 57 ++------------------------------------------
 1 file changed, 2 insertions(+), 55 deletions(-)

diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index 06fbb5674d6..e50275c0582 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -58,7 +58,6 @@ static int set_channel_state_atomic(struct mcde_chnl_state *chnl,
 static int set_channel_state_sync(struct mcde_chnl_state *chnl,
 							enum chnl_state state);
 static void stop_channel(struct mcde_chnl_state *chnl);
-static void watchdog_auto_sync_timer_function(unsigned long arg);
 static int _mcde_chnl_enable(struct mcde_chnl_state *chnl);
 static int _mcde_chnl_apply(struct mcde_chnl_state *chnl);
 static void disable_flow(struct mcde_chnl_state *chnl);
@@ -327,11 +326,7 @@ struct mcde_chnl_state {
 	wait_queue_head_t state_waitq;
 	wait_queue_head_t vcmp_waitq;
 	atomic_t vcmp_cnt;
-
-	/* Used as watchdog timer for auto sync feature */
-	struct timer_list auto_sync_timer;
 	struct timer_list dsi_te_timer;
-
 	enum mcde_display_power_mode power_mode;
 
 	/* Staged settings */
@@ -909,22 +904,11 @@ static struct mcde_chnl_state *find_channel_by_dsilink(int link)
 static inline void mcde_handle_vcmp(struct mcde_chnl_state *chnl)
 {
 	if (!chnl->vcmp_per_field ||
-			(chnl->vcmp_per_field && chnl->even_vcmp)) {
+				(chnl->vcmp_per_field && chnl->even_vcmp)) {
 		atomic_inc(&chnl->vcmp_cnt);
 		if (chnl->state == CHNLSTATE_STOPPING)
 			set_channel_state_atomic(chnl, CHNLSTATE_STOPPED);
 		wake_up_all(&chnl->vcmp_waitq);
-
-		if (chnl->port.update_auto_trig &&
-				chnl->port.sync_src == MCDE_SYNCSRC_OFF &&
-				chnl->port.type == MCDE_PORTTYPE_DSI &&
-				chnl->state == CHNLSTATE_RUNNING) {
-			do_softwaretrig(chnl);
-			mod_timer(&chnl->auto_sync_timer,
-				jiffies +
-				msecs_to_jiffies(MCDE_AUTO_SYNC_WATCHDOG
-								* 1000));
-		}
 	}
 	chnl->even_vcmp = !chnl->even_vcmp;
 }
@@ -1627,11 +1611,6 @@ static void stop_channel(struct mcde_chnl_state *chnl)
 	if (chnl->state != CHNLSTATE_RUNNING)
 		return;
 
-	if (chnl->port.update_auto_trig &&
-			chnl->port.sync_src == MCDE_SYNCSRC_OFF &&
-			chnl->port.type == MCDE_PORTTYPE_DSI)
-		del_timer(&chnl->auto_sync_timer);
-
 	if (port->type == MCDE_PORTTYPE_DSI) {
 		dsi_wfld(port->link, DSI_MCTL_MAIN_PHY_CTL, CLK_CONTINUOUS,
 			false);
@@ -1741,24 +1720,6 @@ static void enable_flow(struct mcde_chnl_state *chnl)
 	set_channel_state_atomic(chnl, CHNLSTATE_RUNNING);
 }
 
-static void watchdog_auto_sync_timer_function(unsigned long arg)
-{
-	int i;
-	for (i = 0; i < num_channels; i++) {
-		struct mcde_chnl_state *chnl = &channels[i];
-		if (chnl->port.update_auto_trig &&
-				chnl->port.sync_src == MCDE_SYNCSRC_OFF &&
-				chnl->port.type == MCDE_PORTTYPE_DSI &&
-				chnl->state == CHNLSTATE_RUNNING) {
-			do_softwaretrig(chnl);
-			mod_timer(&chnl->auto_sync_timer,
-				jiffies +
-				msecs_to_jiffies(MCDE_AUTO_SYNC_WATCHDOG
-								* 1000));
-		}
-	}
-}
-
 static void work_sleep_function(struct work_struct *ptr)
 {
 	dev_vdbg(&mcde_dev->dev, "%s\n", __func__);
@@ -2614,13 +2575,7 @@ static void chnl_update_continous(struct mcde_chnl_state *chnl,
 		}
 	}
 
-	if (chnl->port.type == MCDE_PORTTYPE_DSI &&
-				chnl->port.sync_src == MCDE_SYNCSRC_OFF) {
-		do_softwaretrig(chnl);
-		mod_timer(&chnl->auto_sync_timer, jiffies +
-			msecs_to_jiffies(MCDE_AUTO_SYNC_WATCHDOG * 1000));
-	} else
-		enable_flow(chnl);
+	enable_flow(chnl);
 }
 
 static void chnl_update_non_continous(struct mcde_chnl_state *chnl)
@@ -3352,10 +3307,6 @@ static void probe_hw(void)
 
 		init_waitqueue_head(&channels[i].state_waitq);
 		init_waitqueue_head(&channels[i].vcmp_waitq);
-		init_timer(&channels[i].auto_sync_timer);
-		channels[i].auto_sync_timer.function =
-					watchdog_auto_sync_timer_function;
-
 		init_timer(&channels[i].dsi_te_timer);
 		channels[i].dsi_te_timer.function =
 					dsi_te_timer_function;
@@ -3493,10 +3444,6 @@ static int __devexit mcde_remove(struct platform_device *pdev)
 	struct mcde_chnl_state *chnl = &channels[0];
 
 	for (; chnl < &channels[num_channels]; chnl++) {
-		if (del_timer(&chnl->auto_sync_timer))
-			dev_vdbg(&mcde_dev->dev,
-				"%s timer could not be stopped\n"
-				, __func__);
 		if (del_timer(&chnl->dsi_te_timer))
 			dev_vdbg(&mcde_dev->dev,
 				"%s dsi timer could not be stopped\n"
-- 
cgit v1.2.3


From c30b9f3ec36860145aad88bb60cbc85cee8a08cf Mon Sep 17 00:00:00 2001
From: Philippe Langlais <philippe.langlais@linaro.org>
Date: Thu, 17 Nov 2011 15:36:44 +0100
Subject: misc: Add dispev driver compilation

Signed-off-by: Philippe Langlais <philippe.langlais@stericsson.com>
---
 drivers/misc/Kconfig  | 9 +++++++++
 drivers/misc/Makefile | 1 +
 2 files changed, 10 insertions(+)

diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index c7795096d43..1b3e2b1ae2c 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -461,6 +461,15 @@ config BMP085
 	  To compile this driver as a module, choose M here: the
 	  module will be called bmp085.
 
+config DISPDEV
+	bool "Display overlay device"
+	depends on FB_MCDE
+	default n
+	help
+	  This driver provides a way to use a second overlay for a display (in
+	  addition to the framebuffer). The device allows for registration of
+	  userspace buffers to be used with the overlay.
+
 config PCH_PHUB
 	tristate "Intel EG20T PCH/LAPIS Semicon IOH(ML7213/ML7223/ML7831) PHUB"
 	depends on PCI
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 3e1d80106f0..2868ec61bc5 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -46,6 +46,7 @@ obj-y				+= ti-st/
 obj-$(CONFIG_AB8500_PWM)	+= ab8500-pwm.o
 obj-y				+= lis3lv02d/
 obj-y				+= carma/
+obj-$(CONFIG_DISPDEV)		+= dispdev/
 obj-$(CONFIG_USB_SWITCH_FSA9480) += fsa9480.o
 obj-$(CONFIG_ALTERA_STAPL)	+=altera-stapl/
 obj-$(CONFIG_MAX8997_MUIC)	+= max8997-muic.o
-- 
cgit v1.2.3


From 22df6a7889645e4b4113721dbcdd8026c809d2c0 Mon Sep 17 00:00:00 2001
From: Philippe Langlais <philippe.langlais@linaro.org>
Date: Fri, 18 Nov 2011 09:48:24 +0100
Subject: mach-ux500: Include mach-ux500 Display specifics config flags

Signed-off-by: Philippe Langlais <philippe.langlais@linaro.org>
---
 arch/arm/mach-ux500/Kconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/mach-ux500/Kconfig b/arch/arm/mach-ux500/Kconfig
index ef7099eea0f..e956b0fef20 100644
--- a/arch/arm/mach-ux500/Kconfig
+++ b/arch/arm/mach-ux500/Kconfig
@@ -88,4 +88,6 @@ config U5500_MBOX
 	help
 	  Add support for U5500 mailbox communication with modem side
 
+source "arch/arm/mach-ux500/Kconfig-arch"
+
 endif
-- 
cgit v1.2.3


From e04035db9e42bef2a788b60ae7c3ee9adf4be4f7 Mon Sep 17 00:00:00 2001
From: Philippe Langlais <philippe.langlais@stericsson.com>
Date: Fri, 2 Dec 2011 14:31:39 +0100
Subject: video: Include module.h after 3.2 update

Signed-off-by: Philippe Langlais <philippe.langlais@stericsson.com>
---
 drivers/misc/dispdev/dispdev.c                  | 1 +
 drivers/video/av8100/hdmi.c                     | 1 +
 drivers/video/mcde/display-av8100.c             | 1 +
 drivers/video/mcde/display-generic_dsi.c        | 1 +
 drivers/video/mcde/display-samsung_s6d16d0.c    | 1 +
 drivers/video/mcde/display-sony_acx424akp_dsi.c | 1 +
 drivers/video/mcde/mcde_fb.c                    | 1 +
 7 files changed, 7 insertions(+)

diff --git a/drivers/misc/dispdev/dispdev.c b/drivers/misc/dispdev/dispdev.c
index a119ab6e3b1..c504b69e80c 100644
--- a/drivers/misc/dispdev/dispdev.c
+++ b/drivers/misc/dispdev/dispdev.c
@@ -10,6 +10,7 @@
  */
 
 #include <linux/kernel.h>
+#include <linux/module.h>
 #include <linux/fs.h>
 #include <linux/idr.h>
 #include <linux/err.h>
diff --git a/drivers/video/av8100/hdmi.c b/drivers/video/av8100/hdmi.c
index 0e06c648bed..3159c4446f1 100644
--- a/drivers/video/av8100/hdmi.c
+++ b/drivers/video/av8100/hdmi.c
@@ -10,6 +10,7 @@
  */
 
 #include <linux/kernel.h>
+#include <linux/module.h>
 #include <linux/miscdevice.h>
 #include <linux/device.h>
 #include <linux/fs.h>
diff --git a/drivers/video/mcde/display-av8100.c b/drivers/video/mcde/display-av8100.c
index e076398ca45..3ff73f3e4eb 100644
--- a/drivers/video/mcde/display-av8100.c
+++ b/drivers/video/mcde/display-av8100.c
@@ -10,6 +10,7 @@
  */
 
 #include <linux/kernel.h>
+#include <linux/module.h>
 #include <linux/device.h>
 #include <linux/delay.h>
 #include <linux/err.h>
diff --git a/drivers/video/mcde/display-generic_dsi.c b/drivers/video/mcde/display-generic_dsi.c
index 75b1c6e2be8..6c63f4cd750 100644
--- a/drivers/video/mcde/display-generic_dsi.c
+++ b/drivers/video/mcde/display-generic_dsi.c
@@ -10,6 +10,7 @@
  */
 
 #include <linux/kernel.h>
+#include <linux/module.h>
 #include <linux/device.h>
 #include <linux/delay.h>
 #include <linux/gpio.h>
diff --git a/drivers/video/mcde/display-samsung_s6d16d0.c b/drivers/video/mcde/display-samsung_s6d16d0.c
index 60be4e022f9..063c8996763 100644
--- a/drivers/video/mcde/display-samsung_s6d16d0.c
+++ b/drivers/video/mcde/display-samsung_s6d16d0.c
@@ -10,6 +10,7 @@
  */
 
 #include <linux/kernel.h>
+#include <linux/module.h>
 #include <linux/device.h>
 #include <linux/regulator/consumer.h>
 #include <linux/delay.h>
diff --git a/drivers/video/mcde/display-sony_acx424akp_dsi.c b/drivers/video/mcde/display-sony_acx424akp_dsi.c
index aace9ff94f2..0b5b69bf23e 100644
--- a/drivers/video/mcde/display-sony_acx424akp_dsi.c
+++ b/drivers/video/mcde/display-sony_acx424akp_dsi.c
@@ -10,6 +10,7 @@
  */
 
 #include <linux/kernel.h>
+#include <linux/module.h>
 #include <linux/device.h>
 #include <linux/delay.h>
 #include <linux/gpio.h>
diff --git a/drivers/video/mcde/mcde_fb.c b/drivers/video/mcde/mcde_fb.c
index 0475a7dd1bd..7d877ec3e4f 100644
--- a/drivers/video/mcde/mcde_fb.c
+++ b/drivers/video/mcde/mcde_fb.c
@@ -10,6 +10,7 @@
  */
 
 #include <linux/kernel.h>
+#include <linux/module.h>
 #include <linux/device.h>
 #include <linux/platform_device.h>
 #include <linux/fb.h>
-- 
cgit v1.2.3


From fa18f530d17266a2e25b4aced85b61da85aa0f54 Mon Sep 17 00:00:00 2001
From: John Fredriksson <john.xj.fredriksson@stericsson.com>
Date: Thu, 1 Dec 2011 15:59:41 +0100
Subject: mach-ux500: mcde: Change default color for hdmi fb.

mach-ux500: mcde: Change pixel format to RGB565 to make mali graphics work.

Signed-off-by: John Fredriksson <john.xj.fredriksson@stericsson.com>
---
 arch/arm/mach-ux500/board-mop500-mcde.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/mach-ux500/board-mop500-mcde.c b/arch/arm/mach-ux500/board-mop500-mcde.c
index 5933ab797fa..645940f3654 100644
--- a/arch/arm/mach-ux500/board-mop500-mcde.c
+++ b/arch/arm/mach-ux500/board-mop500-mcde.c
@@ -422,7 +422,7 @@ struct mcde_display_device av8100_hdmi = {
 	.port = &port2,
 	.chnl_id = MCDE_CHNL_B,
 	.fifo = MCDE_FIFO_B,
-	.default_pixel_format = MCDE_OVLYPIXFMT_RGB888,
+	.default_pixel_format = MCDE_OVLYPIXFMT_RGB565,
 	.native_x_res = 1280,
 	.native_y_res = 720,
 	.dev = {
-- 
cgit v1.2.3


From 184f6e1671e959474ee75c79d12cd2c09d8d095e Mon Sep 17 00:00:00 2001
From: John Fredriksson <john.xj.fredriksson@stericsson.com>
Date: Thu, 1 Dec 2011 15:59:42 +0100
Subject: av8100: Update firmware

HDMI AV8100 fw is updated to ver 0_3_0.
Supports chip cut version 3.0.
Fixes a TVout bug.

Signed-off-by: John Fredriksson <john.xj.fredriksson@stericsson.com>
---
 firmware/av8100.fw.ihex | 2094 +++++++++++++++++++++++------------------------
 1 file changed, 1047 insertions(+), 1047 deletions(-)

diff --git a/firmware/av8100.fw.ihex b/firmware/av8100.fw.ihex
index 6dd51a790d6..384a432ea43 100644
--- a/firmware/av8100.fw.ihex
+++ b/firmware/av8100.fw.ihex
@@ -1,6 +1,6 @@
-:1000000080FECBFE3AEEF1EFF1EF8FF1F0EE94F1DE
-:10001000DCF29EF4B3F4C4F4D6F4E9F4EEF4F3F4B1
-:10002000F8F4FDF412F54CF5E3F534EE34EE35EE6C
+:1000000080FECBFEA3EE5AF05AF0F8F159EFFDF165
+:1000100045F307F51CF52DF53FF552F557F55CF561
+:1000200061F566F57BF5B5F54CF69DEE9DEE9EEE21
 :10003000000000000000000000000081EAADECAD0F
 :1000400038201B7280814D514D514D514D514D51B4
 :100050004D51B420F42A5A9082FECD8000AF7293A5
@@ -17,7 +17,7 @@
 :1001000082AD9F9086AD859084428C209F9001ABFC
 :100110000FA62A31200872FB382007724D38201AAA
 :1001200072BCFFCDFB382007723020107231201EC8
-:100130007230201C729505A09E2BF6CC5F905F4F0D
+:100130007230201C729505A09E94F6CC5F905F4FA4
 :1001400007382005720C39200572814129382018A2
 :1001500072D5265AFB382007729D9D4D38201A72A1
 :100160004DAEFFCD4DAEFFCD38201B724D4D4D4DE8
@@ -57,969 +57,969 @@
 :10038000000000000000000000000000000000006D
 :10039000000000000000000000000000000000005D
 :1003A000000000000000000000000000000000004D
-:1003B000000000000000000000000000000000003D
-:1003C000000000000000000000000000000000002D
-:1003D000000000000000000000000000000000001D
-:1003E000000000000000000000000000000000000D
-:1003F00000000000000000000000000000000000FD
-:1004000000000000000000000000000000000000EC
-:1004100000000000000000000000000000000000DC
-:1004200000000000000000000000000000000000CC
-:1004300000000000000000000000000000000000BC
-:1004400000000000000000000000000000000000AC
-:100450000000000000000000000081FAB7FBD89205
-:100460005CFAB6F9B7FBD8925CF9B6F8B7FBD8924C
-:1004700001AEF8B6F7B7FBC892F7B6FCBF81FCBE79
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-:1004D0000069725AFB0069725AFB00687203AEFC35
-:1004E000BF1B274D37FACC8CFACD81F12001ABFB35
-:1004F000D692072B5A0A24FBD792FBDB9203AEFC61
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 :10475000CD5BF739F839F939FA38681DCD257B5A20
-:104760001DCD257B4C1DCD257B3E1DCD257B35FAF2
-:10477000CDDE1CCD5BF7F9CD1FA6681DCD257B5A7C
+:104760001DCD257B4C1DCD257B3E1DCD257BB8FA6F
+:10477000CDDE1CCD5B7AFACD1FA6681DCD257B5AF8
 :104780001DCD257B4C1DCD257B3E1DCD256B10A65B
-:104790009D2510A1256B4C257B3BFBCDE61CCD2533
-:1047A0007B2A1DCD9703AB9F585825EE723BFBCD5E
-:1047B000E61CCD257B5DFACD5F90FE0001355FB62E
-:1047C000E65C5C585825EE723BFBCDE61CCD257BA4
-:1047D000C3F9CD10A62A1DCD5C585825EE7218FAE3
-:1047E000CDE61CCD257BC3F9CD18A62A1DCD585882
+:104790009D2510A1256B4C257BBEFBCDE61CCD25B0
+:1047A0007B2A1DCD9703AB9F585825EE72BEFBCDDB
+:1047B000E61CCD257BE0FACD5F90FE0001355FB6AB
+:1047C000E65C5C585825EE72BEFBCDE61CCD257B21
+:1047D00046FACD10A62A1DCD5C585825EE729BFADC
+:1047E000CDE61CCD257B46FACD18A62A1DCD5858FE
 :1047F00025EE72256B4F8B4100A24125A05BD6C1EF
 :1048000062CADCBC1B8FA1EBD96E9979825A818474
 :1048100084C9264C056B4A057B016B00A9017B020C
@@ -1172,30 +1172,30 @@
 :10493000016B4F026B4F761DCD5417CD36AE05017E
 :10494000C63EAD05013235F02532A1026B4C9F46C3
 :1049500002D7CDA602EE72026B4F88883A15CC289A
-:104960004BA8C9CD3E15CCC1A6004B084B13CACDF0
+:104960004B1CCACD3E15CCC1A6004B084B87CACD07
 :104970003E15CCE0A6014BE04BBF15CC03267503DA
 :104980005A7281848475030235DF14CDE0A6014B91
-:10499000E04B10274DEBCECD28277703C57903C612
+:10499000E04B10274D5FCFCD28277703C57903C69D
 :1049A0003E15CCC1A6004B284B3C15CC014B904B7F
-:1049B000A8C9CD0A277703C57903C6C520284B3E71
-:1049C00015CCE0A6014B904B6ECACD0C277703C5E2
+:1049B0001CCACD0A277703C57903C6C520284B3EFC
+:1049C00015CCE0A6014B904BE2CACD0C277703C56E
 :1049D0007903C6DD20084B3E15CC82A6014B904BD7
-:1049E00076035A72CE277603C612264D6DCDCD3E84
-:1049F00015CCC0A6004B504BB7274DEBCECDE826CB
-:104A00004D26CBCD03A6262076030A35CB274DEBCA
-:104A1000CECDD320604B04274D26CBCD83A61827BF
-:104A20004D4FCDCD3E15CC81A6004B604BEC264DB5
-:104A300026CBCD02A6CFCCCD3E15CCA0A6004B08F0
-:104A40004B09274D0FCCCD06264D26CBCD4C8C20C7
+:1049E00076035A72CE277603C612264DE1CDCD3E10
+:1049F00015CCC0A6004B504BB7274D5FCFCDE82656
+:104A00004D9ACBCD03A6262076030A35CB274D5FE2
+:104A1000CFCDD320604B04274D9ACBCD83A618274A
+:104A20004DC3CDCD3E15CC81A6004B604BEC264D41
+:104A30009ACBCD02A643CDCD3E15CCA0A6004B0807
+:104A40004B09274D83CCCD06264D9ACBCD4C8C20DF
 :104A500080A688884F932040A6004BA04B08264D87
-:104A60007ECBCD9C16CC6016CC03261FA04516CC61
+:104A6000F2CBCD9C16CC6016CC03261FA04516CCED
 :104A700003264A2D16CC032620A0E0271EA01116DF
 :104A8000CC03264A60274A392720A0C32720A02C20
 :104A90002720A0302720A09C16CC03268303C6DD48
-:104AA0002060A6004B504BA8C9CD032561A183030C
+:104AA0002060A6004B504B1CCACD032561A1830397
 :104AB000C6122711A17C03C607277A03C681848406
 :104AC0009FAD20A6004B504B0B264D03C6052783F8
-:104AD00003C610204F004BA04BA8C9CD032783036A
+:104AD00003C610204F004BA04B1CCACD03278303F5
 :104AE000C60F267D03C68184848400C0CD06EE7285
 :104AF000077B8303C7037B05201872042701E1723B
 :104B0000F0A48303C6016BF0A4037B0620C7026BED
@@ -1208,14 +1208,14 @@
 :104B7000449F02550644A002550744A10255004433
 :104B8000A202550144A302550244A402550344A5C0
 :104B9000025581854FF3259B02C1016B4C017B7649
-:104BA00012CD06204F88819A18FACDF73FF83FF9C9
-:104BB0003F81F7B7F8B7F9B74FFAB7819A18FACD2E
+:104BA00012CD06204F88819A9BFACDF73FF83FF946
+:104BB0003F81F7B7F8B7F9B74FFAB7819A9BFACDAB
 :104BC000FBB701AA4181FBC692FCBFFBB7811DADBB
 :104BD000FA3FFBB701AA3313CC4F29ADFA003D359C
 :104BE00003EE72FBB7027B9B37ADFA000835FBB7CB
 :104BF00002AA4124AA02EE72037B9BD32604E1722F
 :104C000033AD02AA4103AA02EE72037B3213CC0336
-:104C100026016B4A017B9A18FACDFBB702AA027BE8
+:104C100026016B4A017B9A9BFACDFBB702AA027B65
 :104C200003EE7268AD047B9B1C20016BFFA6046B36
 :104C300080AA047B062602A111B6046B03A60220FB
 :104C400001A6062002A60427153D0C279C02C67962
@@ -1227,8 +1227,8 @@
 :104CA000A6046BCFA602200FA606200CA60820069D
 :104CB000274A052714B6CC2604E1723314CD01AA85
 :104CC000410DAA02EE72037B81858585854C0626FF
-:104CD000016B4A017B3B14CD0CAA02EE72037BC32D
-:104CE000F9CD10A64514CD047B9B2220016BFFA6B5
+:104CD000016B4A017B3B14CD0CAA02EE72037B46AA
+:104CE000FACD10A64514CD047B9B2220016BFFA6B4
 :104CF000046BFCA60220F0A60620CCA60A20C0A6C3
 :104D00000E200CA612200FA616200CA618274A1754
 :104D1000274A16274A15274A14274A29274A1627B9
@@ -1238,17 +1238,17 @@
 :104D5000B7F9B74FFAB7047B9B2520016BFFA60478
 :104D60006B4F01200CA60427153D2A14CD4104AA3F
 :104D700002EE72037B9B2A14CD9B026B03EF7250F1
-:104D8000AA414F585897888888888164FBCDA2AE85
+:104D8000AA414F5858978888888881E7FBCDA2AE02
 :104D9000FB00023581FBB700A94101AB81F7B7F8F1
 :104DA000B7F9B74FFAB781F7B703A4F7B6F83FF9E9
-:104DB0003FFA3FC3F9CD18A69AF9CD4A81FBB70057
+:104DB0003FFA3F46FACD18A61DFACD4A81FBB7004F
 :104DC000A94107AB81A2020035A3020035A4021855
-:104DD00035812CAD18A44848484A12B635FACD435F
-:104DE000AD818B4100A9410AAB5B35FACD0CAEFB1E
+:104DD00035812CAD18A44848484A12B6B8FACD43DC
+:104DE000AD818B4100A9410AAB5BB8FACD0CAEFB9B
 :104DF000008435FA36F936F836F73467AD0A20F70D
 :104E000039F839F939FA3873AD0C2602A111B68494
-:104E100084848484ABDCCD880B7B880B7B880B7B04
-:104E2000880B7B88067B066B4444067B1CFBCD020B
+:104E1000848484841FDDCD880B7B880B7B880B7B8F
+:104E2000880B7B88067B066B4444067B9FFBCD0288
 :104E3000A66DAD5B0E2602A111B6066B08A6076B28
 :104E40004F086BBBA6096B80A60A6BA2020035A3B4
 :104E5000020035A4026035A50200351820ACA60971
@@ -1266,16 +1266,16 @@
 :104F10006BE0A60A6B4F2F12CDA5020035A511CC70
 :104F200003264A8B11CC03264A6A11CC03264A5029
 :104F300011CC03264A6D274A57274A382713B69AB9
-:104F400035FACDFBBF84AEFA1A64FBCD3C12CD5BC3
-:104F50009B3BFBCD3C12CD5B41FBCD6412CD5B1F77
+:104F4000B8FACDFBBF84AEFA1AE7FBCD3C12CD5BBD
+:104F50009BBEFBCD3C12CD5BC4FBCD6412CD5B1F71
 :104F600012CD5B4412CD5A01264D5F12B61520FAC0
-:104F70001041FBCD6412CD5B1F12CD5B4412CD5AA4
+:104F700010C4FBCD6412CD5B1F12CD5B4412CD5A21
 :104F800001264D5F12B619264A11B63A20086B4029
 :104F9000AA087B0A6B02AA0A7B0E2602A111B60A96
-:104FA0006B04AA0A7B0627163D35FACD3C12CD5B71
-:104FB000F91EF7BFF8B73EA4F8B6F9BFFABFC3F9B8
+:104FA0006B04AA0A7B0627163DB8FACD3C12CD5BEE
+:104FB000F91EF7BFF8B73EA4F8B6F9BFFABF46FA34
 :104FC000CD11A65A12CD1420F714F73FF8B73EA41E
-:104FD000F8B6F93FFA3FC3F9CD11A65A12CD1827FA
+:104FD000F8B6F93FFA3F46FACD11A65A12CD182776
 :104FE000B803CE056B18A6022014A6062010A6084A
 :104FF0002006274A052714B68B4100A2410AA05B70
 :00000001FF
-- 
cgit v1.2.3


From d23f37788b3bff632f2bc40ba949139f6b75363e Mon Sep 17 00:00:00 2001
From: Philippe Langlais <philippe.langlais@linaro.org>
Date: Mon, 5 Dec 2011 11:47:55 +0100
Subject: video: mcde: Include export.h after 3.2 update

Signed-off-by: Philippe Langlais <philippe.langlais@linaro.org>
---
 drivers/video/mcde/mcde_bus.c | 1 +
 drivers/video/mcde/mcde_dss.c | 1 +
 drivers/video/mcde/mcde_hw.c  | 1 +
 3 files changed, 3 insertions(+)

diff --git a/drivers/video/mcde/mcde_bus.c b/drivers/video/mcde/mcde_bus.c
index a600844a9ac..bdcf65b0fb9 100644
--- a/drivers/video/mcde/mcde_bus.c
+++ b/drivers/video/mcde/mcde_bus.c
@@ -10,6 +10,7 @@
  */
 
 #include <linux/kernel.h>
+#include <linux/export.h>
 #include <linux/device.h>
 #include <linux/platform_device.h>
 #include <linux/dma-mapping.h>
diff --git a/drivers/video/mcde/mcde_dss.c b/drivers/video/mcde/mcde_dss.c
index 2c5e4db20c6..eb07cf9534b 100644
--- a/drivers/video/mcde/mcde_dss.c
+++ b/drivers/video/mcde/mcde_dss.c
@@ -10,6 +10,7 @@
  */
 
 #include <linux/kernel.h>
+#include <linux/export.h>
 #include <linux/device.h>
 #include <linux/err.h>
 #include <linux/slab.h>
diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index e50275c0582..164bead10b5 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -10,6 +10,7 @@
  */
 
 #include <linux/kernel.h>
+#include <linux/export.h>
 #include <linux/device.h>
 #include <linux/platform_device.h>
 #include <linux/io.h>
-- 
cgit v1.2.3


From 371063532de07a8f20e494252c658b612746fcd9 Mon Sep 17 00:00:00 2001
From: barge <sylvain.barge@stericsson.com>
Date: Mon, 17 Oct 2011 10:53:28 +0200
Subject: ux500: mcde: Shift the rotation buffer address

Shift the rotation buffer address by 8k to free space for dma lcla area.
Do that for all displays.

ST-Ericsson ID: 364165
ST-Ericsson FOSS-OUT ID: Trivial
ST-Ericsson Linux next: NA

Change-Id: I4bc5b72f6d198f26c7b48572cb3843d18c6b8553
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/34168
Reviewed-by: Sylvain BARGE <sylvain.barge@stericsson.com>
Tested-by: Sylvain BARGE <sylvain.barge@stericsson.com>
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
---
 arch/arm/mach-ux500/board-mop500-mcde.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-ux500/board-mop500-mcde.c b/arch/arm/mach-ux500/board-mop500-mcde.c
index 645940f3654..9611cf87f18 100644
--- a/arch/arm/mach-ux500/board-mop500-mcde.c
+++ b/arch/arm/mach-ux500/board-mop500-mcde.c
@@ -113,7 +113,7 @@ static struct mcde_display_device samsung_s6d16d0_display0 = {
 	.synchronized_update = false,
 #endif
 	/* TODO: Remove rotation buffers once ESRAM driver is completed */
-	.rotbuf1 = U8500_ESRAM_BASE + 0x20000 * 4,
+	.rotbuf1 = U8500_ESRAM_BASE + 0x20000 * 4 + 0x2000,
 	.rotbuf2 = U8500_ESRAM_BASE + 0x20000 * 4 + 0x10000,
 	.dev = {
 		.platform_data = &samsung_s6d16d0_pdata0,
@@ -143,7 +143,7 @@ static struct mcde_display_device sony_acx424akp_display0 = {
 	.fifo = MCDE_FIFO_A,
 	.default_pixel_format = MCDE_OVLYPIXFMT_RGBA8888,
 	.synchronized_update = true,
-	.rotbuf1 = U8500_ESRAM_BASE + 0x20000 * 4,
+	.rotbuf1 = U8500_ESRAM_BASE + 0x20000 * 4 + 0x2000,
 	.rotbuf2 = U8500_ESRAM_BASE + 0x20000 * 4 + 0x10000,
 	.dev = {
 		.platform_data = &sony_acx424akp_display0_pdata,
-- 
cgit v1.2.3


From 2685cb2d636cf1d75a23ea824b70d9b6826703df Mon Sep 17 00:00:00 2001
From: Jimmy Rubin <jimmy.rubin@stericsson.com>
Date: Mon, 3 Oct 2011 13:26:07 +0200
Subject: video: mcde: Remove MCDE 3_0_5 version support

This MCDE version is used in db8500 v1.

ST-Ericsson ID: 362765
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: Ie5039e8d2bb838c900f6b14c18cce097f57a393d
Signed-off-by: Jimmy Rubin <jimmy.rubin@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/33321
Reviewed-by: QATOOLS
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
Reviewed-by: Marcus LORENTZON <marcus.xm.lorentzon@stericsson.com>
---
 drivers/video/mcde/mcde_hw.c   | 246 +++++---------------------------
 drivers/video/mcde/mcde_regs.h | 309 +++++++++--------------------------------
 include/video/mcde.h           |  66 ---------
 3 files changed, 96 insertions(+), 525 deletions(-)

diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index 164bead10b5..aab9c30966c 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -69,7 +69,7 @@ static void dsi_te_poll_set_timer(struct mcde_chnl_state *chnl,
 		unsigned int timeout);
 static void dsi_te_timer_function(unsigned long value);
 static int wait_for_vcmp(struct mcde_chnl_state *chnl);
-static void probe_hw(void);
+static int probe_hw(void);
 static void wait_for_flow_disabled(struct mcde_chnl_state *chnl);
 
 #define OVLY_TIMEOUT 100
@@ -322,7 +322,6 @@ struct mcde_chnl_state {
 	struct mcde_port port;
 	struct mcde_ovly_state *ovly0;
 	struct mcde_ovly_state *ovly1;
-	const struct chnl_config *cfg;
 	enum chnl_state state;
 	wait_queue_head_t state_waitq;
 	wait_queue_head_t vcmp_waitq;
@@ -364,105 +363,6 @@ struct mcde_chnl_state {
 };
 
 static struct mcde_chnl_state *channels;
-
-struct chnl_config {
-	/* Key */
-	enum mcde_chnl_path path;
-
-	/* Value */
-	bool swap_a_c0;
-	bool swap_a_c0_set;
-	bool swap_b_c1;
-	bool swap_b_c1_set;
-	bool fabmux;
-	bool fabmux_set;
-	bool f01mux;
-	bool f01mux_set;
-};
-
-static /* TODO: const, compiler bug? */ struct chnl_config chnl_configs[] = {
-	/* Channel A */
-	{ .path = MCDE_CHNLPATH_CHNLA_FIFOA_DPI_0,
-	  .swap_a_c0 = false, .swap_a_c0_set = true },
-	{ .path = MCDE_CHNLPATH_CHNLA_FIFOA_DSI_IFC0_0,
-	  .swap_a_c0 = false, .swap_a_c0_set = true,
-	  .fabmux = false, .fabmux_set = true },
-	{ .path = MCDE_CHNLPATH_CHNLA_FIFOA_DSI_IFC0_1,
-	  .swap_a_c0 = false, .swap_a_c0_set = true,
-	  .fabmux = true, .fabmux_set = true },
-	{ .path = MCDE_CHNLPATH_CHNLA_FIFOC0_DSI_IFC0_2,
-	  .swap_a_c0 = true, .swap_a_c0_set = true,
-	  .f01mux = false, .f01mux_set = true },
-	{ .path = MCDE_CHNLPATH_CHNLA_FIFOC0_DSI_IFC1_0,
-	  .swap_a_c0 = true, .swap_a_c0_set = true,
-	  .f01mux = false, .f01mux_set = true },
-	{ .path = MCDE_CHNLPATH_CHNLA_FIFOC0_DSI_IFC1_1,
-	  .swap_a_c0 = true, .swap_a_c0_set = true,
-	  .f01mux = true, .f01mux_set = true },
-	{ .path = MCDE_CHNLPATH_CHNLA_FIFOA_DSI_IFC1_2,
-	  .swap_a_c0 = false, .swap_a_c0_set = true,
-	  .fabmux = false, .fabmux_set = true },
-	/* Channel B */
-	{ .path = MCDE_CHNLPATH_CHNLB_FIFOB_DPI_1,
-	  .swap_b_c1 = false, .swap_b_c1_set = true },
-	{ .path = MCDE_CHNLPATH_CHNLB_FIFOB_DSI_IFC0_0,
-	  .swap_b_c1 = false, .swap_b_c1_set = true,
-	  .fabmux = true, .fabmux_set = true },
-	{ .path = MCDE_CHNLPATH_CHNLB_FIFOB_DSI_IFC0_1,
-	  .swap_b_c1 = false, .swap_b_c1_set = true,
-	  .fabmux = false, .fabmux_set = true },
-	{ .path = MCDE_CHNLPATH_CHNLB_FIFOC1_DSI_IFC0_2,
-	  .swap_b_c1 = true, .swap_b_c1_set = true,
-	  .f01mux = true, .f01mux_set = true },
-	{ .path = MCDE_CHNLPATH_CHNLB_FIFOC1_DSI_IFC1_0,
-	  .swap_b_c1 = true, .swap_b_c1_set = true,
-	  .f01mux = true, .f01mux_set = true },
-	{ .path = MCDE_CHNLPATH_CHNLB_FIFOC1_DSI_IFC1_1,
-	  .swap_b_c1 = true, .swap_b_c1_set = true,
-	  .f01mux = false, .f01mux_set = true },
-	{ .path = MCDE_CHNLPATH_CHNLB_FIFOB_DSI_IFC1_2,
-	  .swap_b_c1 = false, .swap_b_c1_set = true,
-	  .fabmux = true, .fabmux_set = true },
-	/* Channel C0 */
-	{ .path = MCDE_CHNLPATH_CHNLC0_FIFOA_DSI_IFC0_0,
-	  .swap_a_c0 = true, .swap_a_c0_set = true,
-	  .fabmux = false, .fabmux_set = true },
-	{ .path = MCDE_CHNLPATH_CHNLC0_FIFOA_DSI_IFC0_1,
-	  .swap_a_c0 = true, .swap_a_c0_set = true,
-	  .fabmux = true, .fabmux_set = true },
-	{ .path = MCDE_CHNLPATH_CHNLC0_FIFOC0_DSI_IFC0_2,
-	  .swap_a_c0 = false, .swap_a_c0_set = true,
-	  .f01mux = false, .f01mux_set = true },
-	{ .path = MCDE_CHNLPATH_CHNLC0_FIFOC0_DSI_IFC1_0,
-	  .swap_a_c0 = false, .swap_a_c0_set = true,
-	  .f01mux = false, .f01mux_set = true },
-	{ .path = MCDE_CHNLPATH_CHNLC0_FIFOC0_DSI_IFC1_1,
-	  .swap_a_c0 = false, .swap_a_c0_set = true,
-	  .f01mux = true, .f01mux_set = true },
-	{ .path = MCDE_CHNLPATH_CHNLC0_FIFOA_DSI_IFC1_2,
-	  .swap_a_c0 = true, .swap_a_c0_set = true,
-	  .fabmux = false, .fabmux_set = true },
-	/* Channel C1 */
-	{ .path = MCDE_CHNLPATH_CHNLC1_FIFOB_DSI_IFC0_0,
-	  .swap_b_c1 = true, .swap_b_c1_set = true,
-	  .fabmux = true, .fabmux_set = true },
-	{ .path = MCDE_CHNLPATH_CHNLC1_FIFOB_DSI_IFC0_1,
-	  .swap_b_c1 = true, .swap_b_c1_set = true,
-	  .fabmux = false, .fabmux_set = true },
-	{ .path = MCDE_CHNLPATH_CHNLC1_FIFOC1_DSI_IFC0_2,
-	  .swap_b_c1 = false, .swap_b_c1_set = true,
-	  .f01mux = true, .f01mux_set = true },
-	{ .path = MCDE_CHNLPATH_CHNLC1_FIFOC1_DSI_IFC1_0,
-	  .swap_b_c1 = false, .swap_b_c1_set = true,
-	  .f01mux = true, .f01mux_set = true },
-	{ .path = MCDE_CHNLPATH_CHNLC1_FIFOC1_DSI_IFC1_1,
-	  .swap_b_c1 = false, .swap_b_c1_set = true,
-	  .f01mux = false, .f01mux_set = true },
-	{ .path = MCDE_CHNLPATH_CHNLC1_FIFOB_DSI_IFC1_2,
-	  .swap_b_c1 = true, .swap_b_c1_set = true,
-	  .fabmux = true, .fabmux_set = true },
-};
-
 /*
  * Wait for CSM_RUNNING, all data sent for display
  */
@@ -647,15 +547,7 @@ static void dpi_video_mode_apply(struct mcde_chnl_state *chnl)
 			chnl->tv_regs.tv_mode = MCDE_TVCRA_TVMODE_SDTV_656P_BE;
 		else
 			chnl->tv_regs.tv_mode = MCDE_TVCRA_TVMODE_SDTV_656P;
-		if (hardware_version == MCDE_CHIP_VERSION_3_0_8 ||
-			hardware_version == MCDE_CHIP_VERSION_4_0_4)
-			chnl->tv_regs.inv_clk = true;
-		else {
-			chnl->tv_regs.dho  = MCDE_CONFIG_TVOUT_HBORDER;
-			chnl->tv_regs.alw  = MCDE_CONFIG_TVOUT_HBORDER;
-			chnl->tv_regs.dvo  = MCDE_CONFIG_TVOUT_VBORDER;
-			chnl->tv_regs.bsl  = MCDE_CONFIG_TVOUT_VBORDER;
-		}
+		chnl->tv_regs.inv_clk = true;
 	} else {
 		/* LCD mode */
 		u32 polarity;
@@ -714,24 +606,11 @@ static void update_dpi_registers(enum mcde_chnl chnl_id, struct tv_regs *regs)
 					MCDE_TVISLA_FSL2(regs->fsl2));
 
 	/* Horizontal timing registers */
-	if (!regs->sel_mode_tv ||
-			hardware_version == MCDE_CHIP_VERSION_3_0_8 ||
-			hardware_version == MCDE_CHIP_VERSION_4_0_4) {
-		mcde_wreg(MCDE_TVLBALWA + idx * MCDE_TVLBALWA_GROUPOFFSET,
-					MCDE_TVLBALWA_LBW(regs->hsw) |
-					MCDE_TVLBALWA_ALW(regs->alw));
-		mcde_wreg(MCDE_TVTIM1A + idx * MCDE_TVTIM1A_GROUPOFFSET,
-					MCDE_TVTIM1A_DHO(regs->dho));
-	} else {
-		/* in earlier versions the LBW and DHO fields are swapped
-		 * TV mode only
-		 */
-		mcde_wreg(MCDE_TVLBALWA + idx * MCDE_TVLBALWA_GROUPOFFSET,
-					MCDE_TVLBALWA_LBW(regs->dho) |
-					MCDE_TVLBALWA_ALW(regs->alw));
-		mcde_wreg(MCDE_TVTIM1A + idx * MCDE_TVTIM1A_GROUPOFFSET,
-					MCDE_TVTIM1A_DHO(regs->hsw));
-	}
+	mcde_wreg(MCDE_TVLBALWA + idx * MCDE_TVLBALWA_GROUPOFFSET,
+				MCDE_TVLBALWA_LBW(regs->hsw) |
+				MCDE_TVLBALWA_ALW(regs->alw));
+	mcde_wreg(MCDE_TVTIM1A + idx * MCDE_TVTIM1A_GROUPOFFSET,
+				MCDE_TVTIM1A_DHO(regs->dho));
 	if (!regs->sel_mode_tv)
 		mcde_wreg(MCDE_LCDTIM1A + idx * MCDE_LCDTIM1A_GROUPOFFSET,
 								regs->lcdtim1);
@@ -1076,46 +955,14 @@ static int wait_for_vcmp(struct mcde_chnl_state *chnl)
 
 static int update_channel_static_registers(struct mcde_chnl_state *chnl)
 {
-	const struct chnl_config *cfg = chnl->cfg;
 	const struct mcde_port *port = &chnl->port;
 
-	if (hardware_version == MCDE_CHIP_VERSION_3_0_5) {
-		/* Fifo & muxing */
-		if (cfg->swap_a_c0_set)
-			mcde_wfld(MCDE_CONF0, SWAP_A_C0_V1, cfg->swap_a_c0);
-		if (cfg->swap_b_c1_set)
-			mcde_wfld(MCDE_CONF0, SWAP_B_C1_V1, cfg->swap_b_c1);
-		if (cfg->fabmux_set)
-			mcde_wfld(MCDE_CR, FABMUX_V1, cfg->fabmux);
-		if (cfg->f01mux_set)
-			mcde_wfld(MCDE_CR, F01MUX_V1, cfg->f01mux);
-
-		if (port->type == MCDE_PORTTYPE_DPI) {
-			if (port->link == 0)
-				mcde_wfld(MCDE_CR, DPIA_EN_V1, true);
-			else if (port->link == 1)
-				mcde_wfld(MCDE_CR, DPIB_EN_V1, true);
-		} else if (port->type == MCDE_PORTTYPE_DSI) {
-			if (port->ifc == DSI_VIDEO_MODE && port->link == 0)
-				mcde_wfld(MCDE_CR, DSIVID0_EN_V1, true);
-			else if (port->ifc == DSI_VIDEO_MODE && port->link == 1)
-				mcde_wfld(MCDE_CR, DSIVID1_EN_V1, true);
-			else if (port->ifc == DSI_VIDEO_MODE && port->link == 2)
-				mcde_wfld(MCDE_CR, DSIVID2_EN_V1, true);
-			else if (port->ifc == DSI_CMD_MODE && port->link == 0)
-				mcde_wfld(MCDE_CR, DSICMD0_EN_V1, true);
-			else if (port->ifc == DSI_CMD_MODE && port->link == 1)
-				mcde_wfld(MCDE_CR, DSICMD1_EN_V1, true);
-			else if (port->ifc == DSI_CMD_MODE && port->link == 2)
-				mcde_wfld(MCDE_CR, DSICMD2_EN_V1, true);
-		}
-	} else if (hardware_version == MCDE_CHIP_VERSION_3_0_8 ||
-			hardware_version == MCDE_CHIP_VERSION_4_0_4) {
+	if (hardware_version != MCDE_CHIP_VERSION_1_0_4) {
 		switch (chnl->fifo) {
 		case MCDE_FIFO_A:
-			mcde_wreg(MCDE_CHNL0MUXING_V2 + chnl->id *
-				MCDE_CHNL0MUXING_V2_GROUPOFFSET,
-				MCDE_CHNL0MUXING_V2_FIFO_ID_ENUM(FIFO_A));
+			mcde_wreg(MCDE_CHNL0MUXING + chnl->id *
+				MCDE_CHNL0MUXING_GROUPOFFSET,
+				MCDE_CHNL0MUXING_FIFO_ID_ENUM(FIFO_A));
 			if (port->type == MCDE_PORTTYPE_DPI) {
 				mcde_wfld(MCDE_CTRLA, FORMTYPE,
 						MCDE_CTRLA_FORMTYPE_DPITV);
@@ -1128,9 +975,9 @@ static int update_channel_static_registers(struct mcde_chnl_state *chnl)
 			}
 			break;
 		case MCDE_FIFO_B:
-			mcde_wreg(MCDE_CHNL0MUXING_V2 + chnl->id *
-				MCDE_CHNL0MUXING_V2_GROUPOFFSET,
-				MCDE_CHNL0MUXING_V2_FIFO_ID_ENUM(FIFO_B));
+			mcde_wreg(MCDE_CHNL0MUXING + chnl->id *
+				MCDE_CHNL0MUXING_GROUPOFFSET,
+				MCDE_CHNL0MUXING_FIFO_ID_ENUM(FIFO_B));
 			if (port->type == MCDE_PORTTYPE_DPI) {
 				mcde_wfld(MCDE_CTRLB, FORMTYPE,
 						MCDE_CTRLB_FORMTYPE_DPITV);
@@ -1144,9 +991,9 @@ static int update_channel_static_registers(struct mcde_chnl_state *chnl)
 
 			break;
 		case MCDE_FIFO_C0:
-			mcde_wreg(MCDE_CHNL0MUXING_V2 + chnl->id *
-				MCDE_CHNL0MUXING_V2_GROUPOFFSET,
-				MCDE_CHNL0MUXING_V2_FIFO_ID_ENUM(FIFO_C0));
+			mcde_wreg(MCDE_CHNL0MUXING + chnl->id *
+				MCDE_CHNL0MUXING_GROUPOFFSET,
+				MCDE_CHNL0MUXING_FIFO_ID_ENUM(FIFO_C0));
 			if (port->type == MCDE_PORTTYPE_DPI)
 				return -EINVAL;
 			mcde_wfld(MCDE_CTRLC0, FORMTYPE,
@@ -1154,9 +1001,9 @@ static int update_channel_static_registers(struct mcde_chnl_state *chnl)
 			mcde_wfld(MCDE_CTRLC0, FORMID, get_dsi_formid(port));
 			break;
 		case MCDE_FIFO_C1:
-			mcde_wreg(MCDE_CHNL0MUXING_V2 + chnl->id *
-				MCDE_CHNL0MUXING_V2_GROUPOFFSET,
-				MCDE_CHNL0MUXING_V2_FIFO_ID_ENUM(FIFO_C1));
+			mcde_wreg(MCDE_CHNL0MUXING + chnl->id *
+				MCDE_CHNL0MUXING_GROUPOFFSET,
+				MCDE_CHNL0MUXING_FIFO_ID_ENUM(FIFO_C1));
 			if (port->type == MCDE_PORTTYPE_DPI)
 				return -EINVAL;
 			mcde_wfld(MCDE_CTRLC1, FORMTYPE,
@@ -1166,7 +1013,7 @@ static int update_channel_static_registers(struct mcde_chnl_state *chnl)
 		default:
 			return -EINVAL;
 		}
-	} else if (hardware_version == MCDE_CHIP_VERSION_1_0_4) {
+	} else {
 		switch (chnl->fifo) {
 		case MCDE_FIFO_A:
 			/* only channel A is supported */
@@ -1237,12 +1084,6 @@ static int update_channel_static_registers(struct mcde_chnl_state *chnl)
 		dev_dbg(&mcde_dev->dev, "DSI%d LINK_EN\n", lnk);
 
 		if (port->sync_src == MCDE_SYNCSRC_TE_POLLING) {
-			if (hardware_version == MCDE_CHIP_VERSION_3_0_5) {
-				dev_err(&mcde_dev->dev,
-				"DSI TE polling is not supported on this HW\n");
-				goto dsi_link_error;
-			}
-
 			/* Enable DSI TE polling */
 			dsi_te_poll_req(chnl);
 
@@ -1255,15 +1096,7 @@ static int update_channel_static_registers(struct mcde_chnl_state *chnl)
 			dsi_wfld(lnk, DSI_MCTL_MAIN_DATA_CTL, REG_TE_EN, true);
 		}
 
-		if (hardware_version == MCDE_CHIP_VERSION_3_0_5) {
-			if (port->phy.dsi.data_lanes_swap) {
-				dev_warn(&mcde_dev->dev,
-				"DSI %d data lane remap not available!\n",
-				lnk);
-				goto dsi_link_error;
-			}
-		} else
-			dsi_wfld(lnk, DSI_MCTL_MAIN_DATA_CTL, DLX_REMAP_EN,
+		dsi_wfld(lnk, DSI_MCTL_MAIN_DATA_CTL, DLX_REMAP_EN,
 					port->phy.dsi.data_lanes_swap);
 
 		dsi_wreg(lnk, DSI_MCTL_DPHY_STATIC,
@@ -2403,8 +2236,6 @@ static struct mcde_chnl_state *_mcde_chnl_get(enum mcde_chnl chnl_id,
 {
 	int i;
 	struct mcde_chnl_state *chnl = NULL;
-	enum mcde_chnl_path path;
-	const struct chnl_config *cfg = NULL;
 
 	static struct mcde_col_transform ycbcr_2_rgb = {
 		/* Note that in MCDE YUV 422 pixels come as VYU pixels */
@@ -2439,26 +2270,6 @@ static struct mcde_chnl_state *_mcde_chnl_get(enum mcde_chnl chnl_id,
 		return ERR_PTR(-EBUSY);
 	}
 
-	if (hardware_version == MCDE_CHIP_VERSION_3_0_5) {
-		path = MCDE_CHNLPATH(chnl->id, fifo, port->type,
-						port->ifc, port->link);
-		for (i = 0; i < ARRAY_SIZE(chnl_configs); i++)
-			if (chnl_configs[i].path == path) {
-				cfg = &chnl_configs[i];
-				break;
-			}
-		if (cfg == NULL) {
-			dev_dbg(&mcde_dev->dev, "Invalid config, chnl=%d,"
-					" path=0x%.8X\n", chnl_id, path);
-			return ERR_PTR(-EINVAL);
-		} else {
-			dev_info(&mcde_dev->dev, "Config, chnl=%d,"
-					" path=0x%.8X\n", chnl_id, path);
-		}
-	}
-	/* TODO: verify that cfg is ok to activate (check other chnl cfgs) */
-
-	chnl->cfg = cfg;
 	chnl->port = *port;
 	chnl->fifo = fifo;
 	chnl->formatter_updated = false;
@@ -3231,7 +3042,8 @@ static void remove_clocks_and_power(struct platform_device *pdev)
 	regulator_put(regulator_mcde_epod);
 	regulator_put(regulator_esram_epod);
 }
-static void probe_hw(void)
+
+static int probe_hw(void)
 {
 	int i;
 	u8 major_version;
@@ -3260,8 +3072,8 @@ static void probe_hw(void)
 		dev_info(&mcde_dev->dev, "V2 HW\n");
 	} else if (major_version == 3 && minor_version == 0 &&
 					development_version >= 5) {
-		hardware_version = MCDE_CHIP_VERSION_3_0_5;
 		dev_info(&mcde_dev->dev, "V1 HW\n");
+		return -ENOTSUPP;
 	} else if (major_version == 1 && minor_version == 0 &&
 					development_version >= 4) {
 		hardware_version = MCDE_CHIP_VERSION_1_0_4;
@@ -3275,6 +3087,7 @@ static void probe_hw(void)
 		dev_info(&mcde_dev->dev, "V2_U5500 HW\n");
 	} else {
 		dev_err(&mcde_dev->dev, "Unsupported HW version\n");
+		return -ENOTSUPP;
 	}
 
 	/* Init MCDE */
@@ -3318,6 +3131,7 @@ static void probe_hw(void)
 		if (channels[i].ovly1)
 			mcde_debugfs_overlay_create(i, 1);
 	}
+	return 0;
 }
 
 static int __devinit mcde_probe(struct platform_device *pdev)
@@ -3407,7 +3221,9 @@ static int __devinit mcde_probe(struct platform_device *pdev)
 
 	INIT_DELAYED_WORK_DEFERRABLE(&hw_timeout_work, work_sleep_function);
 
-	probe_hw();
+	ret = probe_hw();
+	if (ret)
+		goto failed_probe_hw;
 
 	ret = enable_mcde_hw();
 	if (ret)
@@ -3415,6 +3231,8 @@ static int __devinit mcde_probe(struct platform_device *pdev)
 
 	return 0;
 failed_mcde_enable:
+failed_probe_hw:
+	remove_clocks_and_power(pdev);
 failed_init_clocks:
 failed_map_dsi_io:
 failed_get_dsi_io:
diff --git a/drivers/video/mcde/mcde_regs.h b/drivers/video/mcde/mcde_regs.h
index 7f28c26360b..06e96e45952 100644
--- a/drivers/video/mcde/mcde_regs.h
+++ b/drivers/video/mcde/mcde_regs.h
@@ -5,14 +5,6 @@
 	(((__val) & __reg##_##__fld##_MASK) >> __reg##_##__fld##_SHIFT)
 
 #define MCDE_CR 0x00000000
-#define MCDE_CR_DSICMD2_EN_V1_SHIFT 0
-#define MCDE_CR_DSICMD2_EN_V1_MASK 0x00000001
-#define MCDE_CR_DSICMD2_EN_V1(__x) \
-	MCDE_VAL2REG(MCDE_CR, DSICMD2_EN_V1, __x)
-#define MCDE_CR_DSICMD1_EN_V1_SHIFT 1
-#define MCDE_CR_DSICMD1_EN_V1_MASK 0x00000002
-#define MCDE_CR_DSICMD1_EN_V1(__x) \
-	MCDE_VAL2REG(MCDE_CR, DSICMD1_EN_V1, __x)
 #define MCDE_CR_DSI0_EN_V3_SHIFT 0
 #define MCDE_CR_DSI0_EN_V3_MASK 0x00000001
 #define MCDE_CR_DSI0_EN_V3(__x) \
@@ -21,42 +13,10 @@
 #define MCDE_CR_DSI1_EN_V3_MASK 0x00000002
 #define MCDE_CR_DSI1_EN_V3(__x) \
 	MCDE_VAL2REG(MCDE_CR, DSI1_EN_V3, __x)
-#define MCDE_CR_DSICMD0_EN_V1_SHIFT 2
-#define MCDE_CR_DSICMD0_EN_V1_MASK 0x00000004
-#define MCDE_CR_DSICMD0_EN_V1(__x) \
-	MCDE_VAL2REG(MCDE_CR, DSICMD0_EN_V1, __x)
-#define MCDE_CR_DSIVID2_EN_V1_SHIFT 3
-#define MCDE_CR_DSIVID2_EN_V1_MASK 0x00000008
-#define MCDE_CR_DSIVID2_EN_V1(__x) \
-	MCDE_VAL2REG(MCDE_CR, DSIVID2_EN_V1, __x)
-#define MCDE_CR_DSIVID1_EN_V1_SHIFT 4
-#define MCDE_CR_DSIVID1_EN_V1_MASK 0x00000010
-#define MCDE_CR_DSIVID1_EN_V1(__x) \
-	MCDE_VAL2REG(MCDE_CR, DSIVID1_EN_V1, __x)
-#define MCDE_CR_DSIVID0_EN_V1_SHIFT 5
-#define MCDE_CR_DSIVID0_EN_V1_MASK 0x00000020
-#define MCDE_CR_DSIVID0_EN_V1(__x) \
-	MCDE_VAL2REG(MCDE_CR, DSIVID0_EN_V1, __x)
-#define MCDE_CR_DBIC1_EN_V1_SHIFT 6
-#define MCDE_CR_DBIC1_EN_V1_MASK 0x00000040
-#define MCDE_CR_DBIC1_EN_V1(__x) \
-	MCDE_VAL2REG(MCDE_CR, DBIC1_EN_V1, __x)
-#define MCDE_CR_DBIC0_EN_V1_SHIFT 7
-#define MCDE_CR_DBIC0_EN_V1_MASK 0x00000080
-#define MCDE_CR_DBIC0_EN_V1(__x) \
-	MCDE_VAL2REG(MCDE_CR, DBIC0_EN_V1, __x)
 #define MCDE_CR_DBI_EN_V3_SHIFT 7
 #define MCDE_CR_DBI_EN_V3_MASK 0x00000080
 #define MCDE_CR_DBI_EN_V3(__x) \
 	MCDE_VAL2REG(MCDE_CR, DBI_EN_V3, __x)
-#define MCDE_CR_DPIB_EN_V1_SHIFT 8
-#define MCDE_CR_DPIB_EN_V1_MASK 0x00000100
-#define MCDE_CR_DPIB_EN_V1(__x) \
-	MCDE_VAL2REG(MCDE_CR, DPIB_EN_V1, __x)
-#define MCDE_CR_DPIA_EN_V1_SHIFT 9
-#define MCDE_CR_DPIA_EN_V1_MASK 0x00000200
-#define MCDE_CR_DPIA_EN_V1(__x) \
-	MCDE_VAL2REG(MCDE_CR, DPIA_EN_V1, __x)
 #define MCDE_CR_DPI_EN_V3_SHIFT 9
 #define MCDE_CR_DPI_EN_V3_MASK 0x00000200
 #define MCDE_CR_DPI_EN_V3(__x) \
@@ -65,14 +25,6 @@
 #define MCDE_CR_IFIFOCTRLEN_MASK 0x00008000
 #define MCDE_CR_IFIFOCTRLEN(__x) \
 	MCDE_VAL2REG(MCDE_CR, IFIFOCTRLEN, __x)
-#define MCDE_CR_F01MUX_V1_SHIFT 16
-#define MCDE_CR_F01MUX_V1_MASK 0x00010000
-#define MCDE_CR_F01MUX_V1(__x) \
-	MCDE_VAL2REG(MCDE_CR, F01MUX_V1, __x)
-#define MCDE_CR_FABMUX_V1_SHIFT 17
-#define MCDE_CR_FABMUX_V1_MASK 0x00020000
-#define MCDE_CR_FABMUX_V1(__x) \
-	MCDE_VAL2REG(MCDE_CR, FABMUX_V1, __x)
 #define MCDE_CR_AUTOCLKG_EN_SHIFT 30
 #define MCDE_CR_AUTOCLKG_EN_MASK 0x40000000
 #define MCDE_CR_AUTOCLKG_EN(__x) \
@@ -114,22 +66,6 @@
 #define MCDE_CONF0_SYNCMUX7_MASK 0x00000080
 #define MCDE_CONF0_SYNCMUX7(__x) \
 	MCDE_VAL2REG(MCDE_CONF0, SYNCMUX7, __x)
-#define MCDE_CONF0_SWAP_A_C0_V1_SHIFT 8
-#define MCDE_CONF0_SWAP_A_C0_V1_MASK 0x00000100
-#define MCDE_CONF0_SWAP_A_C0_V1(__x) \
-	MCDE_VAL2REG(MCDE_CONF0, SWAP_A_C0_V1, __x)
-#define MCDE_CONF0_SWAP_B_C1_V1_SHIFT 9
-#define MCDE_CONF0_SWAP_B_C1_V1_MASK 0x00000200
-#define MCDE_CONF0_SWAP_B_C1_V1(__x) \
-	MCDE_VAL2REG(MCDE_CONF0, SWAP_B_C1_V1, __x)
-#define MCDE_CONF0_FSYNCTRLA_V1_SHIFT 10
-#define MCDE_CONF0_FSYNCTRLA_V1_MASK 0x00000400
-#define MCDE_CONF0_FSYNCTRLA_V1(__x) \
-	MCDE_VAL2REG(MCDE_CONF0, FSYNCTRLA_V1, __x)
-#define MCDE_CONF0_FSYNCTRLB_V1_SHIFT 11
-#define MCDE_CONF0_FSYNCTRLB_V1_MASK 0x00000800
-#define MCDE_CONF0_FSYNCTRLB_V1(__x) \
-	MCDE_VAL2REG(MCDE_CONF0, FSYNCTRLB_V1, __x)
 #define MCDE_CONF0_IFIFOCTRLWTRMRKLVL_SHIFT 12
 #define MCDE_CONF0_IFIFOCTRLWTRMRKLVL_MASK 0x00007000
 #define MCDE_CONF0_IFIFOCTRLWTRMRKLVL(__x) \
@@ -2703,76 +2639,51 @@
 #define MCDE_CHNL3BCKGNDCOL_R_MASK 0x00FF0000
 #define MCDE_CHNL3BCKGNDCOL_R(__x) \
 	MCDE_VAL2REG(MCDE_CHNL3BCKGNDCOL, R, __x)
-#define MCDE_CHNL0PRIO_V1 0x00000614
-#define MCDE_CHNL0PRIO_V1_GROUPOFFSET 0x20
-#define MCDE_CHNL0PRIO_V1_CHNLPRIO_SHIFT 0
-#define MCDE_CHNL0PRIO_V1_CHNLPRIO_MASK 0x0000000F
-#define MCDE_CHNL0PRIO_V1_CHNLPRIO(__x) \
-	MCDE_VAL2REG(MCDE_CHNL0PRIO_V1, CHNLPRIO, __x)
-#define MCDE_CHNL1PRIO_V1 0x00000634
-#define MCDE_CHNL1PRIO_V1_CHNLPRIO_SHIFT 0
-#define MCDE_CHNL1PRIO_V1_CHNLPRIO_MASK 0x0000000F
-#define MCDE_CHNL1PRIO_V1_CHNLPRIO(__x) \
-	MCDE_VAL2REG(MCDE_CHNL1PRIO_V1, CHNLPRIO, __x)
-#define MCDE_CHNL2PRIO_V1 0x00000654
-#define MCDE_CHNL2PRIO_V1_CHNLPRIO_SHIFT 0
-#define MCDE_CHNL2PRIO_V1_CHNLPRIO_MASK 0x0000000F
-#define MCDE_CHNL2PRIO_V1_CHNLPRIO(__x) \
-	MCDE_VAL2REG(MCDE_CHNL2PRIO_V1, CHNLPRIO, __x)
-#define MCDE_CHNL3PRIO_V1 0x00000674
-#define MCDE_CHNL3PRIO_V1_CHNLPRIO_SHIFT 0
-#define MCDE_CHNL3PRIO_V1_CHNLPRIO_MASK 0x0000000F
-#define MCDE_CHNL3PRIO_V1_CHNLPRIO(__x) \
-	MCDE_VAL2REG(MCDE_CHNL3PRIO_V1, CHNLPRIO, __x)
-#define MCDE_CHNL0MUXING_V2 0x00000614
-#define MCDE_CHNL0MUXING_V2_GROUPOFFSET 0x20
-#define MCDE_CHNL0MUXING_V2_FIFO_ID_SHIFT 0
-#define MCDE_CHNL0MUXING_V2_FIFO_ID_MASK 0x00000007
-#define MCDE_CHNL0MUXING_V2_FIFO_ID_FIFO_A 0
-#define MCDE_CHNL0MUXING_V2_FIFO_ID_FIFO_B 1
-#define MCDE_CHNL0MUXING_V2_FIFO_ID_FIFO_C0 2
-#define MCDE_CHNL0MUXING_V2_FIFO_ID_FIFO_C1 3
-#define MCDE_CHNL0MUXING_V2_FIFO_ID_ENUM(__x) \
-	MCDE_VAL2REG(MCDE_CHNL0MUXING_V2, FIFO_ID, \
-	MCDE_CHNL0MUXING_V2_FIFO_ID_##__x)
-#define MCDE_CHNL0MUXING_V2_FIFO_ID(__x) \
-	MCDE_VAL2REG(MCDE_CHNL0MUXING_V2, FIFO_ID, __x)
-#define MCDE_CHNL1MUXING_V2 0x00000634
-#define MCDE_CHNL1MUXING_V2_FIFO_ID_SHIFT 0
-#define MCDE_CHNL1MUXING_V2_FIFO_ID_MASK 0x00000007
-#define MCDE_CHNL1MUXING_V2_FIFO_ID_FIFO_A 0
-#define MCDE_CHNL1MUXING_V2_FIFO_ID_FIFO_B 1
-#define MCDE_CHNL1MUXING_V2_FIFO_ID_FIFO_C0 2
-#define MCDE_CHNL1MUXING_V2_FIFO_ID_FIFO_C1 3
-#define MCDE_CHNL1MUXING_V2_FIFO_ID_ENUM(__x) \
-	MCDE_VAL2REG(MCDE_CHNL1MUXING_V2, FIFO_ID, \
-	MCDE_CHNL1MUXING_V2_FIFO_ID_##__x)
-#define MCDE_CHNL1MUXING_V2_FIFO_ID(__x) \
-	MCDE_VAL2REG(MCDE_CHNL1MUXING_V2, FIFO_ID, __x)
-#define MCDE_CHNL2MUXING_V2 0x00000654
-#define MCDE_CHNL2MUXING_V2_FIFO_ID_SHIFT 0
-#define MCDE_CHNL2MUXING_V2_FIFO_ID_MASK 0x00000007
-#define MCDE_CHNL2MUXING_V2_FIFO_ID_FIFO_A 0
-#define MCDE_CHNL2MUXING_V2_FIFO_ID_FIFO_B 1
-#define MCDE_CHNL2MUXING_V2_FIFO_ID_FIFO_C0 2
-#define MCDE_CHNL2MUXING_V2_FIFO_ID_FIFO_C1 3
-#define MCDE_CHNL2MUXING_V2_FIFO_ID_ENUM(__x) \
-	MCDE_VAL2REG(MCDE_CHNL2MUXING_V2, FIFO_ID, \
-	MCDE_CHNL2MUXING_V2_FIFO_ID_##__x)
-#define MCDE_CHNL2MUXING_V2_FIFO_ID(__x) \
-	MCDE_VAL2REG(MCDE_CHNL2MUXING_V2, FIFO_ID, __x)
-#define MCDE_CHNL3MUXING_V2 0x00000674
-#define MCDE_CHNL3MUXING_V2_FIFO_ID_SHIFT 0
-#define MCDE_CHNL3MUXING_V2_FIFO_ID_MASK 0x00000007
-#define MCDE_CHNL3MUXING_V2_FIFO_ID_FIFO_A 0
-#define MCDE_CHNL3MUXING_V2_FIFO_ID_FIFO_B 1
-#define MCDE_CHNL3MUXING_V2_FIFO_ID_FIFO_C0 2
-#define MCDE_CHNL3MUXING_V2_FIFO_ID_FIFO_C1 3
-#define MCDE_CHNL3MUXING_V2_FIFO_ID_ENUM(__x) \
-	MCDE_VAL2REG(MCDE_CHNL3MUXING_V2, FIFO_ID, \
-	MCDE_CHNL3MUXING_V2_FIFO_ID_##__x)
-#define MCDE_CHNL3MUXING_V2_FIFO_ID(__x) \
-	MCDE_VAL2REG(MCDE_CHNL3MUXING_V2, FIFO_ID, __x)
+#define MCDE_CHNL0MUXING 0x00000614
+#define MCDE_CHNL0MUXING_GROUPOFFSET 0x20
+#define MCDE_CHNL0MUXING_FIFO_ID_SHIFT 0
+#define MCDE_CHNL0MUXING_FIFO_ID_MASK 0x00000007
+#define MCDE_CHNL0MUXING_FIFO_ID_FIFO_A 0
+#define MCDE_CHNL0MUXING_FIFO_ID_FIFO_B 1
+#define MCDE_CHNL0MUXING_FIFO_ID_FIFO_C0 2
+#define MCDE_CHNL0MUXING_FIFO_ID_FIFO_C1 3
+#define MCDE_CHNL0MUXING_FIFO_ID_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_CHNL0MUXING, FIFO_ID, MCDE_CHNL0MUXING_FIFO_ID_##__x)
+#define MCDE_CHNL0MUXING_FIFO_ID(__x) \
+	MCDE_VAL2REG(MCDE_CHNL0MUXING, FIFO_ID, __x)
+#define MCDE_CHNL1MUXING 0x00000634
+#define MCDE_CHNL1MUXING_FIFO_ID_SHIFT 0
+#define MCDE_CHNL1MUXING_FIFO_ID_MASK 0x00000007
+#define MCDE_CHNL1MUXING_FIFO_ID_FIFO_A 0
+#define MCDE_CHNL1MUXING_FIFO_ID_FIFO_B 1
+#define MCDE_CHNL1MUXING_FIFO_ID_FIFO_C0 2
+#define MCDE_CHNL1MUXING_FIFO_ID_FIFO_C1 3
+#define MCDE_CHNL1MUXING_FIFO_ID_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_CHNL1MUXING, FIFO_ID, MCDE_CHNL1MUXING_FIFO_ID_##__x)
+#define MCDE_CHNL1MUXING_FIFO_ID(__x) \
+	MCDE_VAL2REG(MCDE_CHNL1MUXING, FIFO_ID, __x)
+#define MCDE_CHNL2MUXING 0x00000654
+#define MCDE_CHNL2MUXING_FIFO_ID_SHIFT 0
+#define MCDE_CHNL2MUXING_FIFO_ID_MASK 0x00000007
+#define MCDE_CHNL2MUXING_FIFO_ID_FIFO_A 0
+#define MCDE_CHNL2MUXING_FIFO_ID_FIFO_B 1
+#define MCDE_CHNL2MUXING_FIFO_ID_FIFO_C0 2
+#define MCDE_CHNL2MUXING_FIFO_ID_FIFO_C1 3
+#define MCDE_CHNL2MUXING_FIFO_ID_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_CHNL2MUXING, FIFO_ID, MCDE_CHNL2MUXING_FIFO_ID_##__x)
+#define MCDE_CHNL2MUXING_FIFO_ID(__x) \
+	MCDE_VAL2REG(MCDE_CHNL2MUXING, FIFO_ID, __x)
+#define MCDE_CHNL3MUXING 0x00000674
+#define MCDE_CHNL3MUXING_FIFO_ID_SHIFT 0
+#define MCDE_CHNL3MUXING_FIFO_ID_MASK 0x00000007
+#define MCDE_CHNL3MUXING_FIFO_ID_FIFO_A 0
+#define MCDE_CHNL3MUXING_FIFO_ID_FIFO_B 1
+#define MCDE_CHNL3MUXING_FIFO_ID_FIFO_C0 2
+#define MCDE_CHNL3MUXING_FIFO_ID_FIFO_C1 3
+#define MCDE_CHNL3MUXING_FIFO_ID_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_CHNL3MUXING, FIFO_ID, MCDE_CHNL3MUXING_FIFO_ID_##__x)
+#define MCDE_CHNL3MUXING_FIFO_ID(__x) \
+	MCDE_VAL2REG(MCDE_CHNL3MUXING, FIFO_ID, __x)
 #define MCDE_CRA0 0x00000800
 #define MCDE_CRA0_GROUPOFFSET 0x200
 #define MCDE_CRA0_FLOEN_SHIFT 0
@@ -2857,22 +2768,6 @@
 #define MCDE_CRA0_ROTEN_MASK 0x01000000
 #define MCDE_CRA0_ROTEN(__x) \
 	MCDE_VAL2REG(MCDE_CRA0, ROTEN, __x)
-#define MCDE_CRA0_ROTBURSTSIZE_V1_SHIFT 25
-#define MCDE_CRA0_ROTBURSTSIZE_V1_MASK 0x0E000000
-#define MCDE_CRA0_ROTBURSTSIZE_V1_1W 0
-#define MCDE_CRA0_ROTBURSTSIZE_V1_2W 1
-#define MCDE_CRA0_ROTBURSTSIZE_V1_4W 2
-#define MCDE_CRA0_ROTBURSTSIZE_V1_8W 3
-#define MCDE_CRA0_ROTBURSTSIZE_V1_16W 4
-#define MCDE_CRA0_ROTBURSTSIZE_V1_ENUM(__x) \
-	MCDE_VAL2REG(MCDE_CRA0, ROTBURSTSIZE_V1, \
-	MCDE_CRA0_ROTBURSTSIZE_V1_##__x)
-#define MCDE_CRA0_ROTBURSTSIZE_V1(__x) \
-	MCDE_VAL2REG(MCDE_CRA0, ROTBURSTSIZE_V1, __x)
-#define MCDE_CRA0_ROTBURSTSIZE_HW_V1_SHIFT 28
-#define MCDE_CRA0_ROTBURSTSIZE_HW_V1_MASK 0x10000000
-#define MCDE_CRA0_ROTBURSTSIZE_HW_V1(__x) \
-	MCDE_VAL2REG(MCDE_CRA0, ROTBURSTSIZE_HW_V1, __x)
 #define MCDE_CRB0 0x00000A00
 #define MCDE_CRB0_FLOEN_SHIFT 0
 #define MCDE_CRB0_FLOEN_MASK 0x00000001
@@ -2956,22 +2851,6 @@
 #define MCDE_CRB0_ROTEN_MASK 0x01000000
 #define MCDE_CRB0_ROTEN(__x) \
 	MCDE_VAL2REG(MCDE_CRB0, ROTEN, __x)
-#define MCDE_CRB0_ROTBURSTSIZE_V1_SHIFT 25
-#define MCDE_CRB0_ROTBURSTSIZE_V1_MASK 0x0E000000
-#define MCDE_CRB0_ROTBURSTSIZE_V1_1W 0
-#define MCDE_CRB0_ROTBURSTSIZE_V1_2W 1
-#define MCDE_CRB0_ROTBURSTSIZE_V1_4W 2
-#define MCDE_CRB0_ROTBURSTSIZE_V1_8W 3
-#define MCDE_CRB0_ROTBURSTSIZE_V1_16W 4
-#define MCDE_CRB0_ROTBURSTSIZE_V1_ENUM(__x) \
-	MCDE_VAL2REG(MCDE_CRB0, ROTBURSTSIZE_V1, \
-	MCDE_CRB0_ROTBURSTSIZE_V1_##__x)
-#define MCDE_CRB0_ROTBURSTSIZE_V1(__x) \
-	MCDE_VAL2REG(MCDE_CRB0, ROTBURSTSIZE_V1, __x)
-#define MCDE_CRB0_ROTBURSTSIZE_HW_V1_SHIFT 28
-#define MCDE_CRB0_ROTBURSTSIZE_HW_V1_MASK 0x10000000
-#define MCDE_CRB0_ROTBURSTSIZE_HW_V1(__x) \
-	MCDE_VAL2REG(MCDE_CRB0, ROTBURSTSIZE_HW_V1, __x)
 #define MCDE_CRA1 0x00000804
 #define MCDE_CRA1_GROUPOFFSET 0x200
 #define MCDE_CRA1_PCD_SHIFT 0
@@ -3033,10 +2912,6 @@
 	MCDE_VAL2REG(MCDE_CRA1, CLKTYPE, MCDE_CRA1_CLKTYPE_##__x)
 #define MCDE_CRA1_CLKTYPE(__x) \
 	MCDE_VAL2REG(MCDE_CRA1, CLKTYPE, __x)
-#define MCDE_CRA1_TEFFECTEN_V1_SHIFT 31
-#define MCDE_CRA1_TEFFECTEN_V1_MASK 0x80000000
-#define MCDE_CRA1_TEFFECTEN_V1(__x) \
-	MCDE_VAL2REG(MCDE_CRA1, TEFFECTEN_V1, __x)
 #define MCDE_CRB1 0x00000A04
 #define MCDE_CRB1_PCD_SHIFT 0
 #define MCDE_CRB1_PCD_MASK 0x000003FF
@@ -3097,10 +2972,6 @@
 	MCDE_VAL2REG(MCDE_CRB1, CLKTYPE, MCDE_CRB1_CLKTYPE_##__x)
 #define MCDE_CRB1_CLKTYPE(__x) \
 	MCDE_VAL2REG(MCDE_CRB1, CLKTYPE, __x)
-#define MCDE_CRB1_TEFFECTEN_V1_SHIFT 31
-#define MCDE_CRB1_TEFFECTEN_V1_MASK 0x80000000
-#define MCDE_CRB1_TEFFECTEN_V1(__x) \
-	MCDE_VAL2REG(MCDE_CRB1, TEFFECTEN_V1, __x)
 #define MCDE_COLKEYA 0x00000808
 #define MCDE_COLKEYA_GROUPOFFSET 0x200
 #define MCDE_COLKEYA_KEYB_SHIFT 0
@@ -3336,25 +3207,25 @@
 #define MCDE_FFCOEF2_T2_MASK 0x0F000000
 #define MCDE_FFCOEF2_T2(__x) \
 	MCDE_VAL2REG(MCDE_FFCOEF2, T2, __x)
-#define MCDE_MCDE_WDATAA_V2 0x00000834
-#define MCDE_MCDE_WDATAA_V2_GROUPOFFSET 0x200
-#define MCDE_MCDE_WDATAA_V2_DC_SHIFT 24
-#define MCDE_MCDE_WDATAA_V2_DC_MASK 0x01000000
-#define MCDE_MCDE_WDATAA_V2_DC(__x) \
-	MCDE_VAL2REG(MCDE_MCDE_WDATAA_V2, DC, __x)
-#define MCDE_MCDE_WDATAA_V2_DATAVALUE_SHIFT 0
-#define MCDE_MCDE_WDATAA_V2_DATAVALUE_MASK 0x00FFFFFF
-#define MCDE_MCDE_WDATAA_V2_DATAVALUE(__x) \
-	MCDE_VAL2REG(MCDE_MCDE_WDATAA_V2, DATAVALUE, __x)
-#define MCDE_MCDE_WDATAB_V2 0x00000A34
-#define MCDE_MCDE_WDATAB_V2_DC_SHIFT 24
-#define MCDE_MCDE_WDATAB_V2_DC_MASK 0x01000000
-#define MCDE_MCDE_WDATAB_V2_DC(__x) \
-	MCDE_VAL2REG(MCDE_MCDE_WDATAB_V2, DC, __x)
-#define MCDE_MCDE_WDATAB_V2_DATAVALUE_SHIFT 0
-#define MCDE_MCDE_WDATAB_V2_DATAVALUE_MASK 0x00FFFFFF
-#define MCDE_MCDE_WDATAB_V2_DATAVALUE(__x) \
-	MCDE_VAL2REG(MCDE_MCDE_WDATAB_V2, DATAVALUE, __x)
+#define MCDE_MCDE_WDATAA 0x00000834
+#define MCDE_MCDE_WDATAA_GROUPOFFSET 0x200
+#define MCDE_MCDE_WDATAA_DC_SHIFT 24
+#define MCDE_MCDE_WDATAA_DC_MASK 0x01000000
+#define MCDE_MCDE_WDATAA_DC(__x) \
+	MCDE_VAL2REG(MCDE_MCDE_WDATAA, DC, __x)
+#define MCDE_MCDE_WDATAA_DATAVALUE_SHIFT 0
+#define MCDE_MCDE_WDATAA_DATAVALUE_MASK 0x00FFFFFF
+#define MCDE_MCDE_WDATAA_DATAVALUE(__x) \
+	MCDE_VAL2REG(MCDE_MCDE_WDATAA, DATAVALUE, __x)
+#define MCDE_MCDE_WDATAB 0x00000A34
+#define MCDE_MCDE_WDATAB_DC_SHIFT 24
+#define MCDE_MCDE_WDATAB_DC_MASK 0x01000000
+#define MCDE_MCDE_WDATAB_DC(__x) \
+	MCDE_VAL2REG(MCDE_MCDE_WDATAB, DC, __x)
+#define MCDE_MCDE_WDATAB_DATAVALUE_SHIFT 0
+#define MCDE_MCDE_WDATAB_DATAVALUE_MASK 0x00FFFFFF
+#define MCDE_MCDE_WDATAB_DATAVALUE(__x) \
+	MCDE_VAL2REG(MCDE_MCDE_WDATAB, DATAVALUE, __x)
 #define MCDE_TVCRA 0x00000838
 #define MCDE_TVCRA_GROUPOFFSET 0x200
 #define MCDE_TVCRA_SEL_MOD_SHIFT 0
@@ -4651,17 +4522,6 @@
 #define MCDE_DOTR1_DODEACT_MASK 0x0000FF00
 #define MCDE_DOTR1_DODEACT(__x) \
 	MCDE_VAL2REG(MCDE_DOTR1, DODEACT, __x)
-#define MCDE_WCMDC0_V1 0x00000C8C
-#define MCDE_WCMDC0_V1_GROUPOFFSET 0x4
-#define MCDE_WCMDC0_V1_COMMANDVALUE_SHIFT 0
-#define MCDE_WCMDC0_V1_COMMANDVALUE_MASK 0x00FFFFFF
-#define MCDE_WCMDC0_V1_COMMANDVALUE(__x) \
-	MCDE_VAL2REG(MCDE_WCMDC0_V1, COMMANDVALUE, __x)
-#define MCDE_WCMDC1_V1 0x00000C90
-#define MCDE_WCMDC1_V1_COMMANDVALUE_SHIFT 0
-#define MCDE_WCMDC1_V1_COMMANDVALUE_MASK 0x00FFFFFF
-#define MCDE_WCMDC1_V1_COMMANDVALUE(__x) \
-	MCDE_VAL2REG(MCDE_WCMDC1_V1, COMMANDVALUE, __x)
 #define MCDE_WDATADC0 0x00000C94
 #define MCDE_WDATADC0_GROUPOFFSET 0x4
 #define MCDE_WDATADC0_DATAVALUE_SHIFT 0
@@ -4692,47 +4552,6 @@
 #define MCDE_RDATADC1_STARTREAD_MASK 0x00010000
 #define MCDE_RDATADC1_STARTREAD(__x) \
 	MCDE_VAL2REG(MCDE_RDATADC1, STARTREAD, __x)
-#define MCDE_STATC_V1 0x00000CA4
-#define MCDE_STATC_V1_STATBUSY0_SHIFT 0
-#define MCDE_STATC_V1_STATBUSY0_MASK 0x00000001
-#define MCDE_STATC_V1_STATBUSY0(__x) \
-	MCDE_VAL2REG(MCDE_STATC_V1, STATBUSY0, __x)
-#define MCDE_STATC_V1_FIFOEMPTY0_SHIFT 1
-#define MCDE_STATC_V1_FIFOEMPTY0_MASK 0x00000002
-#define MCDE_STATC_V1_FIFOEMPTY0(__x) \
-	MCDE_VAL2REG(MCDE_STATC_V1, FIFOEMPTY0, __x)
-#define MCDE_STATC_V1_FIFOFULL0_SHIFT 2
-#define MCDE_STATC_V1_FIFOFULL0_MASK 0x00000004
-#define MCDE_STATC_V1_FIFOFULL0(__x) \
-	MCDE_VAL2REG(MCDE_STATC_V1, FIFOFULL0, __x)
-#define MCDE_STATC_V1_FIFOCMDEMPTY0_SHIFT 3
-#define MCDE_STATC_V1_FIFOCMDEMPTY0_MASK 0x00000008
-#define MCDE_STATC_V1_FIFOCMDEMPTY0(__x) \
-	MCDE_VAL2REG(MCDE_STATC_V1, FIFOCMDEMPTY0, __x)
-#define MCDE_STATC_V1_FIFOCMDFULL0_SHIFT 4
-#define MCDE_STATC_V1_FIFOCMDFULL0_MASK 0x00000010
-#define MCDE_STATC_V1_FIFOCMDFULL0(__x) \
-	MCDE_VAL2REG(MCDE_STATC_V1, FIFOCMDFULL0, __x)
-#define MCDE_STATC_V1_STATBUSY1_SHIFT 5
-#define MCDE_STATC_V1_STATBUSY1_MASK 0x00000020
-#define MCDE_STATC_V1_STATBUSY1(__x) \
-	MCDE_VAL2REG(MCDE_STATC_V1, STATBUSY1, __x)
-#define MCDE_STATC_V1_FIFOEMPTY1_SHIFT 6
-#define MCDE_STATC_V1_FIFOEMPTY1_MASK 0x00000040
-#define MCDE_STATC_V1_FIFOEMPTY1(__x) \
-	MCDE_VAL2REG(MCDE_STATC_V1, FIFOEMPTY1, __x)
-#define MCDE_STATC_V1_FIFOFULL1_SHIFT 7
-#define MCDE_STATC_V1_FIFOFULL1_MASK 0x00000080
-#define MCDE_STATC_V1_FIFOFULL1(__x) \
-	MCDE_VAL2REG(MCDE_STATC_V1, FIFOFULL1, __x)
-#define MCDE_STATC_V1_FIFOCMDEMPTY1_SHIFT 8
-#define MCDE_STATC_V1_FIFOCMDEMPTY1_MASK 0x00000100
-#define MCDE_STATC_V1_FIFOCMDEMPTY1(__x) \
-	MCDE_VAL2REG(MCDE_STATC_V1, FIFOCMDEMPTY1, __x)
-#define MCDE_STATC_V1_FIFOCMDFULL1_SHIFT 9
-#define MCDE_STATC_V1_FIFOCMDFULL1_MASK 0x00000200
-#define MCDE_STATC_V1_FIFOCMDFULL1(__x) \
-	MCDE_VAL2REG(MCDE_STATC_V1, FIFOCMDFULL1, __x)
 #define MCDE_CTRLC0 0x00000CA8
 #define MCDE_CTRLC0_GROUPOFFSET 0x4
 #define MCDE_CTRLC0_FIFOWTRMRK_SHIFT 0
diff --git a/include/video/mcde.h b/include/video/mcde.h
index b81d88af5fd..8e4a86a205a 100644
--- a/include/video/mcde.h
+++ b/include/video/mcde.h
@@ -39,69 +39,6 @@ enum mcde_chnl {
 	MCDE_CHNL_C1 = 3,
 };
 
-/* Channel path */
-#define MCDE_CHNLPATH(__chnl, __fifo, __type, __ifc, __link) \
-	(((__chnl) << 16) | ((__fifo) << 12) | \
-	 ((__type) << 8) | ((__ifc) << 4) | ((__link) << 0))
-enum mcde_chnl_path {
-	/* Channel A */
-	MCDE_CHNLPATH_CHNLA_FIFOA_DPI_0 = MCDE_CHNLPATH(MCDE_CHNL_A,
-		MCDE_FIFO_A, MCDE_PORTTYPE_DPI, 0, 0),
-	MCDE_CHNLPATH_CHNLA_FIFOA_DSI_IFC0_0 = MCDE_CHNLPATH(MCDE_CHNL_A,
-		MCDE_FIFO_A, MCDE_PORTTYPE_DSI, 0, 0),
-	MCDE_CHNLPATH_CHNLA_FIFOA_DSI_IFC0_1 = MCDE_CHNLPATH(MCDE_CHNL_A,
-		MCDE_FIFO_A, MCDE_PORTTYPE_DSI, 0, 1),
-	MCDE_CHNLPATH_CHNLA_FIFOC0_DSI_IFC0_2 = MCDE_CHNLPATH(MCDE_CHNL_A,
-		MCDE_FIFO_C0, MCDE_PORTTYPE_DSI, 0, 2),
-	MCDE_CHNLPATH_CHNLA_FIFOC0_DSI_IFC1_0 = MCDE_CHNLPATH(MCDE_CHNL_A,
-		MCDE_FIFO_C0, MCDE_PORTTYPE_DSI, 1, 0),
-	MCDE_CHNLPATH_CHNLA_FIFOC0_DSI_IFC1_1 = MCDE_CHNLPATH(MCDE_CHNL_A,
-		MCDE_FIFO_C0, MCDE_PORTTYPE_DSI, 1, 1),
-	MCDE_CHNLPATH_CHNLA_FIFOA_DSI_IFC1_2 = MCDE_CHNLPATH(MCDE_CHNL_A,
-		MCDE_FIFO_A, MCDE_PORTTYPE_DSI, 1, 2),
-	/* Channel B */
-	MCDE_CHNLPATH_CHNLB_FIFOB_DPI_1 = MCDE_CHNLPATH(MCDE_CHNL_B,
-		MCDE_FIFO_B, MCDE_PORTTYPE_DPI, 0, 1),
-	MCDE_CHNLPATH_CHNLB_FIFOB_DSI_IFC0_0 = MCDE_CHNLPATH(MCDE_CHNL_B,
-		MCDE_FIFO_B, MCDE_PORTTYPE_DSI, 0, 0),
-	MCDE_CHNLPATH_CHNLB_FIFOB_DSI_IFC0_1 = MCDE_CHNLPATH(MCDE_CHNL_B,
-		MCDE_FIFO_B, MCDE_PORTTYPE_DSI, 0, 1),
-	MCDE_CHNLPATH_CHNLB_FIFOC1_DSI_IFC0_2 = MCDE_CHNLPATH(MCDE_CHNL_B,
-		MCDE_FIFO_C1, MCDE_PORTTYPE_DSI, 0, 2),
-	MCDE_CHNLPATH_CHNLB_FIFOC1_DSI_IFC1_0 = MCDE_CHNLPATH(MCDE_CHNL_B,
-		MCDE_FIFO_C1, MCDE_PORTTYPE_DSI, 1, 0),
-	MCDE_CHNLPATH_CHNLB_FIFOC1_DSI_IFC1_1 = MCDE_CHNLPATH(MCDE_CHNL_B,
-		MCDE_FIFO_C1, MCDE_PORTTYPE_DSI, 1, 1),
-	MCDE_CHNLPATH_CHNLB_FIFOB_DSI_IFC1_2 = MCDE_CHNLPATH(MCDE_CHNL_B,
-		MCDE_FIFO_B, MCDE_PORTTYPE_DSI, 1, 2),
-	/* Channel C0 */
-	MCDE_CHNLPATH_CHNLC0_FIFOA_DSI_IFC0_0 = MCDE_CHNLPATH(MCDE_CHNL_C0,
-		MCDE_FIFO_A, MCDE_PORTTYPE_DSI, 0, 0),
-	MCDE_CHNLPATH_CHNLC0_FIFOA_DSI_IFC0_1 = MCDE_CHNLPATH(MCDE_CHNL_C0,
-		MCDE_FIFO_A, MCDE_PORTTYPE_DSI, 0, 1),
-	MCDE_CHNLPATH_CHNLC0_FIFOC0_DSI_IFC0_2 = MCDE_CHNLPATH(MCDE_CHNL_C0,
-		MCDE_FIFO_C0, MCDE_PORTTYPE_DSI, 0, 2),
-	MCDE_CHNLPATH_CHNLC0_FIFOC0_DSI_IFC1_0 = MCDE_CHNLPATH(MCDE_CHNL_C0,
-		MCDE_FIFO_C0, MCDE_PORTTYPE_DSI, 1, 0),
-	MCDE_CHNLPATH_CHNLC0_FIFOC0_DSI_IFC1_1 = MCDE_CHNLPATH(MCDE_CHNL_C0,
-		MCDE_FIFO_C0, MCDE_PORTTYPE_DSI, 1, 1),
-	MCDE_CHNLPATH_CHNLC0_FIFOA_DSI_IFC1_2 = MCDE_CHNLPATH(MCDE_CHNL_C0,
-		MCDE_FIFO_A, MCDE_PORTTYPE_DSI, 1, 2),
-	/* Channel C1 */
-	MCDE_CHNLPATH_CHNLC1_FIFOB_DSI_IFC0_0 = MCDE_CHNLPATH(MCDE_CHNL_C1,
-		MCDE_FIFO_B, MCDE_PORTTYPE_DSI, 0, 0),
-	MCDE_CHNLPATH_CHNLC1_FIFOB_DSI_IFC0_1 = MCDE_CHNLPATH(MCDE_CHNL_C1,
-		MCDE_FIFO_B, MCDE_PORTTYPE_DSI, 0, 1),
-	MCDE_CHNLPATH_CHNLC1_FIFOC1_DSI_IFC0_2 = MCDE_CHNLPATH(MCDE_CHNL_C1,
-		MCDE_FIFO_C1, MCDE_PORTTYPE_DSI, 0, 2),
-	MCDE_CHNLPATH_CHNLC1_FIFOC1_DSI_IFC1_0 = MCDE_CHNLPATH(MCDE_CHNL_C1,
-		MCDE_FIFO_C1, MCDE_PORTTYPE_DSI, 1, 0),
-	MCDE_CHNLPATH_CHNLC1_FIFOC1_DSI_IFC1_1 = MCDE_CHNLPATH(MCDE_CHNL_C1,
-		MCDE_FIFO_C1, MCDE_PORTTYPE_DSI, 1, 1),
-	MCDE_CHNLPATH_CHNLC1_FIFOB_DSI_IFC1_2 = MCDE_CHNLPATH(MCDE_CHNL_C1,
-		MCDE_FIFO_B, MCDE_PORTTYPE_DSI, 1, 2),
-};
-
 /* Update sync mode */
 enum mcde_sync_src {
 	MCDE_SYNCSRC_OFF = 0, /* No sync */
@@ -235,8 +172,6 @@ enum mcde_display_rotation {
 #define MCDE_INPUT_FIFO_SIZE_3_0_8 128
 
 /* Tv-out defines */
-#define MCDE_CONFIG_TVOUT_HBORDER 2
-#define MCDE_CONFIG_TVOUT_VBORDER 2
 #define MCDE_CONFIG_TVOUT_BACKGROUND_LUMINANCE		0x83
 #define MCDE_CONFIG_TVOUT_BACKGROUND_CHROMINANCE_CB	0x9C
 #define MCDE_CONFIG_TVOUT_BACKGROUND_CHROMINANCE_CR	0x2C
@@ -248,7 +183,6 @@ enum mcde_display_rotation {
 #define MCDE_CHIP_VERSION_4_0_4 4       /* U5500 V2 */
 #define MCDE_CHIP_VERSION_1_0_4 3	/* U5500 V1 */
 #define MCDE_CHIP_VERSION_3_0_8 2	/* U8500 V2 */
-#define MCDE_CHIP_VERSION_3_0_5 1	/* U8500 V1 */
 #define MCDE_CHIP_VERSION_3	0
 
 /* DSI modes */
-- 
cgit v1.2.3


From cacd0da9d5031fbd5334b3554822415548406576 Mon Sep 17 00:00:00 2001
From: Jimmy Rubin <jimmy.rubin@stericsson.com>
Date: Mon, 3 Oct 2011 14:16:33 +0200
Subject: video: mcde: Remove MCDE_1_0_4 version support

This MCDE version is used in db5500 v1

ST-Ericsson ID: 362765
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: Trivial

Signed-off-by: Jimmy Rubin <jimmy.rubin@stericsson.com>

Change-Id: Ib5a4ca054661f06bd3541021b1404f2c000010bc
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/33322
Tested-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Reviewed-by: QATOOLS
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
Reviewed-by: Marcus LORENTZON <marcus.xm.lorentzon@stericsson.com>
---
 drivers/video/mcde/mcde_hw.c   | 255 ++++++++++++++---------------------------
 drivers/video/mcde/mcde_regs.h |  16 ---
 include/video/mcde.h           |   1 -
 3 files changed, 86 insertions(+), 186 deletions(-)

diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index aab9c30966c..f82365e6586 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -108,6 +108,7 @@ static struct clk *clock_dsi_lp;
 static u8 mcde_is_enabled;
 static struct delayed_work hw_timeout_work;
 static u8 dsi_pll_is_enabled;
+static u8 dsi_ifc_is_supported;
 
 static struct mutex mcde_hw_lock;
 static inline void mcde_lock(const char *func, int line)
@@ -414,41 +415,27 @@ static void update_mcde_registers(void)
 {
 	struct mcde_platform_data *pdata = mcde_dev->dev.platform_data;
 
-	if (hardware_version == MCDE_CHIP_VERSION_1_0_4) {
-		/* Setup output muxing */
-		mcde_wreg(MCDE_CONF0,
-			MCDE_CONF0_IFIFOCTRLWTRMRKLVL(7));
-
-		mcde_wfld(MCDE_RISPP, VCMPARIS, 1);
-		mcde_wfld(MCDE_RISPP, VCMPBRIS, 1);
-
-		/* Enable channel VCMP interrupts */
-		mcde_wreg(MCDE_IMSCPP,
-			MCDE_IMSCPP_VCMPAIM(true) |
-			MCDE_IMSCPP_VCMPBIM(true));
-	} else {
-		/* Setup output muxing */
-		mcde_wreg(MCDE_CONF0,
-			MCDE_CONF0_IFIFOCTRLWTRMRKLVL(7) |
-			MCDE_CONF0_OUTMUX0(pdata->outmux[0]) |
-			MCDE_CONF0_OUTMUX1(pdata->outmux[1]) |
-			MCDE_CONF0_OUTMUX2(pdata->outmux[2]) |
-			MCDE_CONF0_OUTMUX3(pdata->outmux[3]) |
-			MCDE_CONF0_OUTMUX4(pdata->outmux[4]) |
-			pdata->syncmux);
-
-		mcde_wfld(MCDE_RISPP, VCMPARIS, 1);
-		mcde_wfld(MCDE_RISPP, VCMPBRIS, 1);
-		mcde_wfld(MCDE_RISPP, VCMPC0RIS, 1);
-		mcde_wfld(MCDE_RISPP, VCMPC1RIS, 1);
-
-		/* Enable channel VCMP interrupts */
-		mcde_wreg(MCDE_IMSCPP,
-			MCDE_IMSCPP_VCMPAIM(true) |
-			MCDE_IMSCPP_VCMPBIM(true) |
-			MCDE_IMSCPP_VCMPC0IM(true) |
-			MCDE_IMSCPP_VCMPC1IM(true));
-	}
+	/* Setup output muxing */
+	mcde_wreg(MCDE_CONF0,
+		MCDE_CONF0_IFIFOCTRLWTRMRKLVL(7) |
+		MCDE_CONF0_OUTMUX0(pdata->outmux[0]) |
+		MCDE_CONF0_OUTMUX1(pdata->outmux[1]) |
+		MCDE_CONF0_OUTMUX2(pdata->outmux[2]) |
+		MCDE_CONF0_OUTMUX3(pdata->outmux[3]) |
+		MCDE_CONF0_OUTMUX4(pdata->outmux[4]) |
+		pdata->syncmux);
+
+	mcde_wfld(MCDE_RISPP, VCMPARIS, 1);
+	mcde_wfld(MCDE_RISPP, VCMPBRIS, 1);
+	mcde_wfld(MCDE_RISPP, VCMPC0RIS, 1);
+	mcde_wfld(MCDE_RISPP, VCMPC1RIS, 1);
+
+	/* Enable channel VCMP interrupts */
+	mcde_wreg(MCDE_IMSCPP,
+		MCDE_IMSCPP_VCMPAIM(true) |
+		MCDE_IMSCPP_VCMPBIM(true) |
+		MCDE_IMSCPP_VCMPC0IM(true) |
+		MCDE_IMSCPP_VCMPC1IM(true));
 
 	mcde_wreg(MCDE_IMSCCHNL, MCDE_IMSCCHNL_CHNLAIM(0xf));
 	mcde_wreg(MCDE_IMSCERR, 0xFFFF01FF);
@@ -720,8 +707,7 @@ static u8 portfmt2cdwin(enum mcde_port_pix_fmt pix_fmt)
 
 static u32 get_input_fifo_size(void)
 {
-	if (hardware_version == MCDE_CHIP_VERSION_1_0_4 ||
-			hardware_version == MCDE_CHIP_VERSION_4_0_4)
+	if (hardware_version == MCDE_CHIP_VERSION_4_0_4)
 		return MCDE_INPUT_FIFO_SIZE_4_0_4;
 	else
 		return MCDE_INPUT_FIFO_SIZE_3_0_8;
@@ -747,28 +733,12 @@ static u32 get_output_fifo_size(enum mcde_fifo fifo)
 	return ret;
 }
 
-static u8 get_dsi_formid(const struct mcde_port *port)
+static inline u8 get_dsi_formatter_id(const struct mcde_port *port)
 {
-	if (hardware_version == MCDE_CHIP_VERSION_4_0_4) {
-		if (port->link == 0)
-			return MCDE_CTRLA_FORMID_DSI0VID;
-		if (port->link == 1)
-			return MCDE_CTRLA_FORMID_DSI0CMD;
-	} else {
-		if (port->ifc == DSI_VIDEO_MODE && port->link == 0)
-			return MCDE_CTRLA_FORMID_DSI0VID;
-		else if (port->ifc == DSI_VIDEO_MODE && port->link == 1)
-			return MCDE_CTRLA_FORMID_DSI1VID;
-		else if (port->ifc == DSI_VIDEO_MODE && port->link == 2)
-			return MCDE_CTRLA_FORMID_DSI2VID;
-		else if (port->ifc == DSI_CMD_MODE && port->link == 0)
-			return MCDE_CTRLA_FORMID_DSI0CMD;
-		else if (port->ifc == DSI_CMD_MODE && port->link == 1)
-			return MCDE_CTRLA_FORMID_DSI1CMD;
-		else if (port->ifc == DSI_CMD_MODE && port->link == 2)
-			return MCDE_CTRLA_FORMID_DSI2CMD;
-	}
-	return 0;
+	if (dsi_ifc_is_supported)
+		return 2 * port->link + port->ifc;
+	else
+		return port->link;
 }
 
 static struct mcde_chnl_state *find_channel_by_dsilink(int link)
@@ -957,96 +927,60 @@ static int update_channel_static_registers(struct mcde_chnl_state *chnl)
 {
 	const struct mcde_port *port = &chnl->port;
 
-	if (hardware_version != MCDE_CHIP_VERSION_1_0_4) {
-		switch (chnl->fifo) {
-		case MCDE_FIFO_A:
-			mcde_wreg(MCDE_CHNL0MUXING + chnl->id *
-				MCDE_CHNL0MUXING_GROUPOFFSET,
-				MCDE_CHNL0MUXING_FIFO_ID_ENUM(FIFO_A));
-			if (port->type == MCDE_PORTTYPE_DPI) {
-				mcde_wfld(MCDE_CTRLA, FORMTYPE,
-						MCDE_CTRLA_FORMTYPE_DPITV);
-				mcde_wfld(MCDE_CTRLA, FORMID, port->link);
-			} else if (port->type == MCDE_PORTTYPE_DSI) {
-				mcde_wfld(MCDE_CTRLA, FORMTYPE,
-						MCDE_CTRLA_FORMTYPE_DSI);
-				mcde_wfld(MCDE_CTRLA, FORMID,
-							get_dsi_formid(port));
-			}
-			break;
-		case MCDE_FIFO_B:
-			mcde_wreg(MCDE_CHNL0MUXING + chnl->id *
-				MCDE_CHNL0MUXING_GROUPOFFSET,
-				MCDE_CHNL0MUXING_FIFO_ID_ENUM(FIFO_B));
-			if (port->type == MCDE_PORTTYPE_DPI) {
-				mcde_wfld(MCDE_CTRLB, FORMTYPE,
-						MCDE_CTRLB_FORMTYPE_DPITV);
-				mcde_wfld(MCDE_CTRLB, FORMID, port->link);
-			} else if (port->type == MCDE_PORTTYPE_DSI) {
-				mcde_wfld(MCDE_CTRLB, FORMTYPE,
-						MCDE_CTRLB_FORMTYPE_DSI);
-				mcde_wfld(MCDE_CTRLB, FORMID,
-							get_dsi_formid(port));
-			}
+	switch (chnl->fifo) {
+	case MCDE_FIFO_A:
+		mcde_wreg(MCDE_CHNL0MUXING + chnl->id *
+			MCDE_CHNL0MUXING_GROUPOFFSET,
+			MCDE_CHNL0MUXING_FIFO_ID_ENUM(FIFO_A));
+		if (port->type == MCDE_PORTTYPE_DPI) {
+			mcde_wfld(MCDE_CTRLA, FORMTYPE,
+					MCDE_CTRLA_FORMTYPE_DPITV);
+			mcde_wfld(MCDE_CTRLA, FORMID, port->link);
+		} else if (port->type == MCDE_PORTTYPE_DSI) {
+			mcde_wfld(MCDE_CTRLA, FORMTYPE,
+					MCDE_CTRLA_FORMTYPE_DSI);
+			mcde_wfld(MCDE_CTRLA, FORMID,
+						get_dsi_formatter_id(port));
+		}
+		break;
+	case MCDE_FIFO_B:
+		mcde_wreg(MCDE_CHNL0MUXING + chnl->id *
+			MCDE_CHNL0MUXING_GROUPOFFSET,
+			MCDE_CHNL0MUXING_FIFO_ID_ENUM(FIFO_B));
+		if (port->type == MCDE_PORTTYPE_DPI) {
+			mcde_wfld(MCDE_CTRLB, FORMTYPE,
+					MCDE_CTRLB_FORMTYPE_DPITV);
+			mcde_wfld(MCDE_CTRLB, FORMID, port->link);
+		} else if (port->type == MCDE_PORTTYPE_DSI) {
+			mcde_wfld(MCDE_CTRLB, FORMTYPE,
+					MCDE_CTRLB_FORMTYPE_DSI);
+			mcde_wfld(MCDE_CTRLB, FORMID,
+						get_dsi_formatter_id(port));
+		}
 
-			break;
-		case MCDE_FIFO_C0:
-			mcde_wreg(MCDE_CHNL0MUXING + chnl->id *
-				MCDE_CHNL0MUXING_GROUPOFFSET,
-				MCDE_CHNL0MUXING_FIFO_ID_ENUM(FIFO_C0));
-			if (port->type == MCDE_PORTTYPE_DPI)
-				return -EINVAL;
-			mcde_wfld(MCDE_CTRLC0, FORMTYPE,
-						MCDE_CTRLC0_FORMTYPE_DSI);
-			mcde_wfld(MCDE_CTRLC0, FORMID, get_dsi_formid(port));
-			break;
-		case MCDE_FIFO_C1:
-			mcde_wreg(MCDE_CHNL0MUXING + chnl->id *
-				MCDE_CHNL0MUXING_GROUPOFFSET,
-				MCDE_CHNL0MUXING_FIFO_ID_ENUM(FIFO_C1));
-			if (port->type == MCDE_PORTTYPE_DPI)
-				return -EINVAL;
-			mcde_wfld(MCDE_CTRLC1, FORMTYPE,
-						MCDE_CTRLC1_FORMTYPE_DSI);
-			mcde_wfld(MCDE_CTRLC1, FORMID, get_dsi_formid(port));
-			break;
-		default:
+		break;
+	case MCDE_FIFO_C0:
+		mcde_wreg(MCDE_CHNL0MUXING + chnl->id *
+			MCDE_CHNL0MUXING_GROUPOFFSET,
+			MCDE_CHNL0MUXING_FIFO_ID_ENUM(FIFO_C0));
+		if (port->type == MCDE_PORTTYPE_DPI)
 			return -EINVAL;
-		}
-	} else {
-		switch (chnl->fifo) {
-		case MCDE_FIFO_A:
-			/* only channel A is supported */
-			if (chnl->id != 0)
-				return -EINVAL;
-
-			if (port->type == MCDE_PORTTYPE_DSI) {
-				if ((port->link == 1 &&
-						port->ifc == DSI_VIDEO_MODE) ||
-				(port->link == 0 && port->ifc == DSI_CMD_MODE))
-					return -EINVAL;
-				mcde_wfld(MCDE_CR, DSI0_EN_V3, true);
-
-			} else if (port->type == MCDE_PORTTYPE_DPI) {
-				mcde_wfld(MCDE_CR, DPI_EN_V3, true);
-			}
-			break;
-		case MCDE_FIFO_B:
-			if (port->type != MCDE_PORTTYPE_DSI)
-				return -EINVAL;
-			/* only channel B is supported */
-			if (chnl->id != 1)
-				return -EINVAL;
-
-			if ((port->link == 0 && port->ifc == DSI_VIDEO_MODE) ||
-				(port->link == 1 && port->ifc == DSI_CMD_MODE))
-				return -EINVAL;
-
-			mcde_wfld(MCDE_CR, DSI1_EN_V3, true);
-			break;
-		default:
+		mcde_wfld(MCDE_CTRLC0, FORMTYPE,
+					MCDE_CTRLC0_FORMTYPE_DSI);
+		mcde_wfld(MCDE_CTRLC0, FORMID, get_dsi_formatter_id(port));
+		break;
+	case MCDE_FIFO_C1:
+		mcde_wreg(MCDE_CHNL0MUXING + chnl->id *
+			MCDE_CHNL0MUXING_GROUPOFFSET,
+			MCDE_CHNL0MUXING_FIFO_ID_ENUM(FIFO_C1));
+		if (port->type == MCDE_PORTTYPE_DPI)
 			return -EINVAL;
-		}
+		mcde_wfld(MCDE_CTRLC1, FORMTYPE,
+					MCDE_CTRLC1_FORMTYPE_DSI);
+		mcde_wfld(MCDE_CTRLC1, FORMID, get_dsi_formatter_id(port));
+		break;
+	default:
+		return -EINVAL;
 	}
 
 	/* Formatter */
@@ -1074,11 +1008,7 @@ static int update_channel_static_registers(struct mcde_chnl_state *chnl)
 		}
 		dsi_pll_is_enabled++;
 
-		if (hardware_version == MCDE_CHIP_VERSION_1_0_4 ||
-		    hardware_version == MCDE_CHIP_VERSION_4_0_4)
-			idx = port->link;
-		else
-			idx = 2 * port->link + port->ifc;
+		idx = get_dsi_formatter_id(port);
 
 		dsi_wfld(lnk, DSI_MCTL_MAIN_DATA_CTL, LINK_EN, true);
 		dev_dbg(&mcde_dev->dev, "DSI%d LINK_EN\n", lnk);
@@ -1733,11 +1663,7 @@ void update_channel_registers(enum mcde_chnl chnl_id, struct chnl_regs *regs,
 		u32 dsi_delay0 = 0;
 		u32 screen_ppl, screen_lpf;
 
-		if (hardware_version == MCDE_CHIP_VERSION_1_0_4 ||
-		    hardware_version == MCDE_CHIP_VERSION_4_0_4)
-			fidx = port->link;
-		else
-			fidx = 2 * port->link + port->ifc;
+		fidx = get_dsi_formatter_id(port);
 
 		screen_ppl = video_mode->xres;
 		screen_lpf = video_mode->yres;
@@ -2377,14 +2303,8 @@ static void chnl_update_continous(struct mcde_chnl_state *chnl,
 	if (chnl->port.sync_src == MCDE_SYNCSRC_TE0) {
 		mcde_wfld(MCDE_CRC, SYCEN0, true);
 	} else if (chnl->port.sync_src == MCDE_SYNCSRC_TE1) {
-		if (hardware_version == MCDE_CHIP_VERSION_3_0_8 ||
-			hardware_version == MCDE_CHIP_VERSION_4_0_4) {
-			mcde_wfld(MCDE_VSCRC1, VSSEL, 1);
-			mcde_wfld(MCDE_CRC, SYCEN1, true);
-		} else {
-			mcde_wfld(MCDE_VSCRC1, VSSEL, 0);
-			mcde_wfld(MCDE_CRC, SYCEN0, true);
-		}
+		mcde_wfld(MCDE_VSCRC1, VSSEL, 1);
+		mcde_wfld(MCDE_CRC, SYCEN1, true);
 	}
 
 	enable_flow(chnl);
@@ -3069,6 +2989,7 @@ static int probe_hw(void)
 	if (major_version == 3 && minor_version == 0 &&
 					development_version >= 8) {
 		hardware_version = MCDE_CHIP_VERSION_3_0_8;
+		dsi_ifc_is_supported = true;
 		dev_info(&mcde_dev->dev, "V2 HW\n");
 	} else if (major_version == 3 && minor_version == 0 &&
 					development_version >= 5) {
@@ -3076,11 +2997,8 @@ static int probe_hw(void)
 		return -ENOTSUPP;
 	} else if (major_version == 1 && minor_version == 0 &&
 					development_version >= 4) {
-		hardware_version = MCDE_CHIP_VERSION_1_0_4;
-		mcde_dynamic_power_management = false;
-		num_channels = 2;
-		num_overlays = 3;
 		dev_info(&mcde_dev->dev, "V1_U5500 HW\n");
+		return -ENOTSUPP;
 	} else if (major_version == 4 && minor_version == 0 &&
 					development_version >= 4) {
 		hardware_version = MCDE_CHIP_VERSION_4_0_4;
@@ -3094,8 +3012,7 @@ static int probe_hw(void)
 	for (i = 0; i < num_overlays; i++)
 		overlays[i].idx = i;
 
-	if (hardware_version == MCDE_CHIP_VERSION_1_0_4 ||
-	    hardware_version == MCDE_CHIP_VERSION_4_0_4) {
+	if (hardware_version == MCDE_CHIP_VERSION_4_0_4) {
 		channels[0].ovly0 = &overlays[0];
 		channels[0].ovly1 = &overlays[1];
 		channels[1].ovly0 = &overlays[2];
diff --git a/drivers/video/mcde/mcde_regs.h b/drivers/video/mcde/mcde_regs.h
index 06e96e45952..034044d7401 100644
--- a/drivers/video/mcde/mcde_regs.h
+++ b/drivers/video/mcde/mcde_regs.h
@@ -5,22 +5,6 @@
 	(((__val) & __reg##_##__fld##_MASK) >> __reg##_##__fld##_SHIFT)
 
 #define MCDE_CR 0x00000000
-#define MCDE_CR_DSI0_EN_V3_SHIFT 0
-#define MCDE_CR_DSI0_EN_V3_MASK 0x00000001
-#define MCDE_CR_DSI0_EN_V3(__x) \
-	MCDE_VAL2REG(MCDE_CR, DSI0_EN_V3, __x)
-#define MCDE_CR_DSI1_EN_V3_SHIFT 1
-#define MCDE_CR_DSI1_EN_V3_MASK 0x00000002
-#define MCDE_CR_DSI1_EN_V3(__x) \
-	MCDE_VAL2REG(MCDE_CR, DSI1_EN_V3, __x)
-#define MCDE_CR_DBI_EN_V3_SHIFT 7
-#define MCDE_CR_DBI_EN_V3_MASK 0x00000080
-#define MCDE_CR_DBI_EN_V3(__x) \
-	MCDE_VAL2REG(MCDE_CR, DBI_EN_V3, __x)
-#define MCDE_CR_DPI_EN_V3_SHIFT 9
-#define MCDE_CR_DPI_EN_V3_MASK 0x00000200
-#define MCDE_CR_DPI_EN_V3(__x) \
-	MCDE_VAL2REG(MCDE_CR, DPI_EN_V3, __x)
 #define MCDE_CR_IFIFOCTRLEN_SHIFT 15
 #define MCDE_CR_IFIFOCTRLEN_MASK 0x00008000
 #define MCDE_CR_IFIFOCTRLEN(__x) \
diff --git a/include/video/mcde.h b/include/video/mcde.h
index 8e4a86a205a..d0f8862172f 100644
--- a/include/video/mcde.h
+++ b/include/video/mcde.h
@@ -181,7 +181,6 @@ enum mcde_display_rotation {
 
 /* Hardware versions */
 #define MCDE_CHIP_VERSION_4_0_4 4       /* U5500 V2 */
-#define MCDE_CHIP_VERSION_1_0_4 3	/* U5500 V1 */
 #define MCDE_CHIP_VERSION_3_0_8 2	/* U8500 V2 */
 #define MCDE_CHIP_VERSION_3	0
 
-- 
cgit v1.2.3


From 4d9550ead3b7dc0b794d22f447740d82a341943e Mon Sep 17 00:00:00 2001
From: Jimmy Rubin <jimmy.rubin@stericsson.com>
Date: Wed, 5 Oct 2011 06:45:27 +0200
Subject: video: mcde: Remove hardware version handling

Hardware version is not needed anymore, since the probe
handles all specific properties that are hardware version
dependant.

ST-Ericsson ID: 362765
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: Trivial

Signed-off-by: Jimmy Rubin <jimmy.rubin@stericsson.com>
Change-Id: I198c6af00ca1dbe39b269a4f8e17992b773a4fd5
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/33323
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
Reviewed-by: Marcus LORENTZON <marcus.xm.lorentzon@stericsson.com>
---
 drivers/video/mcde/mcde_hw.c | 214 +++++++++++++++++++++----------------------
 include/video/mcde.h         |   8 --
 2 files changed, 104 insertions(+), 118 deletions(-)

diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index f82365e6586..3a3d273c3cb 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -69,7 +69,7 @@ static void dsi_te_poll_set_timer(struct mcde_chnl_state *chnl,
 		unsigned int timeout);
 static void dsi_te_timer_function(unsigned long value);
 static int wait_for_vcmp(struct mcde_chnl_state *chnl);
-static int probe_hw(void);
+static int probe_hw(struct platform_device *pdev);
 static void wait_for_flow_disabled(struct mcde_chnl_state *chnl);
 
 #define OVLY_TIMEOUT 100
@@ -89,14 +89,19 @@ static void wait_for_flow_disabled(struct mcde_chnl_state *chnl);
 #define DSI_READ_NBR_OF_RETRIES 2
 #define MCDE_FLOWEN_MAX_TRIAL 60
 
+#define MCDE_VERSION_4_0_4 0x04000400
+#define MCDE_VERSION_3_0_8 0x03000800
+#define MCDE_VERSION_3_0_5 0x03000500
+#define MCDE_VERSION_1_0_4 0x01000400
+
 static u8 *mcdeio;
 static u8 **dsiio;
 static struct platform_device *mcde_dev;
 static u8 num_dsilinks;
 static u8 num_channels;
 static u8 num_overlays;
-static u8 hardware_version;
 static int mcde_irq;
+static u32 input_fifo_size;
 
 static struct regulator *regulator_vana;
 static struct regulator *regulator_mcde_epod;
@@ -705,14 +710,6 @@ static u8 portfmt2cdwin(enum mcde_port_pix_fmt pix_fmt)
 	}
 }
 
-static u32 get_input_fifo_size(void)
-{
-	if (hardware_version == MCDE_CHIP_VERSION_4_0_4)
-		return MCDE_INPUT_FIFO_SIZE_4_0_4;
-	else
-		return MCDE_INPUT_FIFO_SIZE_3_0_8;
-}
-
 static u32 get_output_fifo_size(enum mcde_fifo fifo)
 {
 	u32 ret = 1; /* Avoid div by zero */
@@ -1236,9 +1233,9 @@ static void update_overlay_registers(u8 idx, struct ovly_regs *regs,
 
 	if ((fifo == MCDE_FIFO_A || fifo == MCDE_FIFO_B) &&
 			regs->ppl >= fifo_size * 2)
-		pixelfetchwtrmrklevel = get_input_fifo_size() * 2;
+		pixelfetchwtrmrklevel = input_fifo_size * 2;
 	else
-		pixelfetchwtrmrklevel = get_input_fifo_size() / 2;
+		pixelfetchwtrmrklevel = input_fifo_size / 2;
 
 	if (port->update_auto_trig && port->type == MCDE_PORTTYPE_DSI) {
 		switch (port->sync_src) {
@@ -2963,69 +2960,102 @@ static void remove_clocks_and_power(struct platform_device *pdev)
 	regulator_put(regulator_esram_epod);
 }
 
-static int probe_hw(void)
+static int probe_hw(struct platform_device *pdev)
 {
 	int i;
-	u8 major_version;
-	u8 minor_version;
-	u8 development_version;
+	int ret;
+	u32 pid;
+	struct resource *res;
 
 	dev_info(&mcde_dev->dev, "Probe HW\n");
 
 	/* Get MCDE HW version */
 	regulator_enable(regulator_mcde_epod);
 	clk_enable(clock_mcde);
-	major_version = (u8)mcde_rfld(MCDE_PID, MAJOR_VERSION);
-	minor_version = (u8)mcde_rfld(MCDE_PID, MINOR_VERSION);
-	development_version = (u8)mcde_rfld(MCDE_PID, DEVELOPMENT_VERSION);
+	pid = mcde_rreg(MCDE_PID);
 
-	dev_info(&mcde_dev->dev, "MCDE HW revision %u.%u.%u.%u\n",
-			major_version, minor_version, development_version,
-					mcde_rfld(MCDE_PID, METALFIX_VERSION));
+	dev_info(&mcde_dev->dev, "MCDE HW revision 0x%.8X\n", pid);
 
 	clk_disable(clock_mcde);
 	regulator_disable(regulator_mcde_epod);
 
-	if (major_version == 3 && minor_version == 0 &&
-					development_version >= 8) {
-		hardware_version = MCDE_CHIP_VERSION_3_0_8;
+	switch (pid) {
+	case MCDE_VERSION_3_0_8:
+		num_dsilinks = 3;
+		num_channels = 4;
+		num_overlays = 6;
 		dsi_ifc_is_supported = true;
-		dev_info(&mcde_dev->dev, "V2 HW\n");
-	} else if (major_version == 3 && minor_version == 0 &&
-					development_version >= 5) {
-		dev_info(&mcde_dev->dev, "V1 HW\n");
-		return -ENOTSUPP;
-	} else if (major_version == 1 && minor_version == 0 &&
-					development_version >= 4) {
-		dev_info(&mcde_dev->dev, "V1_U5500 HW\n");
-		return -ENOTSUPP;
-	} else if (major_version == 4 && minor_version == 0 &&
-					development_version >= 4) {
-		hardware_version = MCDE_CHIP_VERSION_4_0_4;
-		dev_info(&mcde_dev->dev, "V2_U5500 HW\n");
-	} else {
+		input_fifo_size = 128;
+		dev_info(&mcde_dev->dev, "db8500 V2 HW\n");
+		break;
+	case MCDE_VERSION_4_0_4:
+		num_dsilinks = 2;
+		num_channels = 2;
+		num_overlays = 3;
+		input_fifo_size = 80;
+		dsi_ifc_is_supported = false;
+		dev_info(&mcde_dev->dev, "db5500 V2 HW\n");
+		break;
+	case MCDE_VERSION_3_0_5:
+		/* Intentional */
+	case MCDE_VERSION_1_0_4:
+		/* Intentional */
+	default:
 		dev_err(&mcde_dev->dev, "Unsupported HW version\n");
-		return -ENOTSUPP;
+		ret = -ENOTSUPP;
+		goto unsupported_hw;
+		break;
+	}
+
+	channels = kzalloc(num_channels * sizeof(struct mcde_chnl_state),
+								GFP_KERNEL);
+	if (!channels) {
+		ret = -ENOMEM;
+		goto failed_channels_alloc;
+	}
+
+	overlays = kzalloc(num_overlays * sizeof(struct mcde_ovly_state),
+								GFP_KERNEL);
+	if (!overlays) {
+		ret = -ENOMEM;
+		goto failed_overlays_alloc;
+	}
+
+	dsiio = kzalloc(num_dsilinks * sizeof(*dsiio), GFP_KERNEL);
+	if (!dsiio) {
+		ret = -ENOMEM;
+		goto failed_dsi_alloc;
+	}
+
+	for (i = 0; i < num_dsilinks; i++) {
+		res = platform_get_resource(pdev, IORESOURCE_MEM, 1+i);
+		if (!res) {
+			dev_dbg(&pdev->dev, "No DSI%d io defined\n", i);
+			ret = -EINVAL;
+			goto failed_get_dsi_io;
+		}
+		dsiio[i] = ioremap(res->start, res->end - res->start + 1);
+		if (!dsiio[i]) {
+			dev_dbg(&pdev->dev, "MCDE DSI%d iomap failed\n", i);
+			ret = -EINVAL;
+			goto failed_map_dsi_io;
+		}
+		dev_info(&pdev->dev, "MCDE DSI%d iomap: 0x%.8X->0x%.8X\n",
+			i, (u32)res->start, (u32)dsiio[i]);
 	}
 
 	/* Init MCDE */
 	for (i = 0; i < num_overlays; i++)
 		overlays[i].idx = i;
 
-	if (hardware_version == MCDE_CHIP_VERSION_4_0_4) {
-		channels[0].ovly0 = &overlays[0];
-		channels[0].ovly1 = &overlays[1];
-		channels[1].ovly0 = &overlays[2];
-		channels[1].ovly1 = NULL;
-	} else {
-		channels[0].ovly0 = &overlays[0];
-		channels[0].ovly1 = &overlays[1];
-		channels[1].ovly0 = &overlays[2];
+	channels[0].ovly0 = &overlays[0];
+	channels[0].ovly1 = &overlays[1];
+	channels[1].ovly0 = &overlays[2];
+
+	if (pid == MCDE_VERSION_3_0_8) {
 		channels[1].ovly1 = &overlays[3];
 		channels[2].ovly0 = &overlays[4];
-		channels[2].ovly1 = NULL;
 		channels[3].ovly0 = &overlays[5];
-		channels[3].ovly1 = NULL;
 	}
 
 	mcde_debugfs_create(&mcde_dev->dev);
@@ -3049,12 +3079,32 @@ static int probe_hw(void)
 			mcde_debugfs_overlay_create(i, 1);
 	}
 	return 0;
+
+failed_map_dsi_io:
+	for (i = 0; i < num_dsilinks; i++) {
+		if (dsiio[i])
+			iounmap(dsiio[i]);
+	}
+failed_get_dsi_io:
+	kfree(dsiio);
+	dsiio = NULL;
+failed_dsi_alloc:
+	kfree(overlays);
+	overlays = NULL;
+failed_overlays_alloc:
+	kfree(channels);
+	channels = NULL;
+unsupported_hw:
+failed_channels_alloc:
+	num_dsilinks = 0;
+	num_channels = 0;
+	num_overlays = 0;
+	return ret;
 }
 
 static int __devinit mcde_probe(struct platform_device *pdev)
 {
 	int ret = 0;
-	int i;
 	struct resource *res;
 	struct mcde_platform_data *pdata = pdev->dev.platform_data;
 
@@ -3063,32 +3113,8 @@ static int __devinit mcde_probe(struct platform_device *pdev)
 		return -EINVAL;
 	}
 
-	num_dsilinks = pdata->num_dsilinks;
 	mcde_dev = pdev;
 
-	num_channels = pdata->num_channels;
-	num_overlays = pdata->num_overlays;
-
-	channels = kzalloc(num_channels * sizeof(struct mcde_chnl_state),
-								GFP_KERNEL);
-	if (!channels) {
-		ret = -ENOMEM;
-		goto failed_channels_alloc;
-	}
-
-	overlays = kzalloc(num_overlays * sizeof(struct mcde_ovly_state),
-								GFP_KERNEL);
-	if (!overlays) {
-		ret = -ENOMEM;
-		goto failed_overlays_alloc;
-	}
-
-	dsiio = kzalloc(num_dsilinks * sizeof(*dsiio), GFP_KERNEL);
-	if (!dsiio) {
-		ret = -ENOMEM;
-		goto failed_dsi_alloc;
-	}
-
 	/* Hook up irq */
 	mcde_irq = platform_get_irq(pdev, 0);
 	if (mcde_irq <= 0) {
@@ -3112,22 +3138,6 @@ static int __devinit mcde_probe(struct platform_device *pdev)
 	}
 	dev_info(&pdev->dev, "MCDE iomap: 0x%.8X->0x%.8X\n",
 		(u32)res->start, (u32)mcdeio);
-	for (i = 0; i < num_dsilinks; i++) {
-		res = platform_get_resource(pdev, IORESOURCE_MEM, 1+i);
-		if (!res) {
-			dev_dbg(&pdev->dev, "No DSI%d io defined\n", i);
-			ret = -EINVAL;
-			goto failed_get_dsi_io;
-		}
-		dsiio[i] = ioremap(res->start, res->end - res->start + 1);
-		if (!dsiio[i]) {
-			dev_dbg(&pdev->dev, "MCDE DSI%d iomap failed\n", i);
-			ret = -EINVAL;
-			goto failed_map_dsi_io;
-		}
-		dev_info(&pdev->dev, "MCDE DSI%d iomap: 0x%.8X->0x%.8X\n",
-			i, (u32)res->start, (u32)dsiio[i]);
-	}
 
 	ret = init_clocks_and_power(pdev);
 	if (ret < 0) {
@@ -3138,7 +3148,7 @@ static int __devinit mcde_probe(struct platform_device *pdev)
 
 	INIT_DELAYED_WORK_DEFERRABLE(&hw_timeout_work, work_sleep_function);
 
-	ret = probe_hw();
+	ret = probe_hw(pdev);
 	if (ret)
 		goto failed_probe_hw;
 
@@ -3147,31 +3157,15 @@ static int __devinit mcde_probe(struct platform_device *pdev)
 		goto failed_mcde_enable;
 
 	return 0;
+
 failed_mcde_enable:
 failed_probe_hw:
 	remove_clocks_and_power(pdev);
 failed_init_clocks:
-failed_map_dsi_io:
-failed_get_dsi_io:
-	for (i = 0; i < num_dsilinks; i++) {
-		if (dsiio[i])
-			iounmap(dsiio[i]);
-	}
 	iounmap(mcdeio);
 failed_map_mcde_io:
 failed_get_mcde_io:
 failed_irq_get:
-	kfree(dsiio);
-	dsiio = NULL;
-failed_dsi_alloc:
-	kfree(overlays);
-	overlays = NULL;
-failed_overlays_alloc:
-	kfree(channels);
-	channels = NULL;
-failed_channels_alloc:
-	num_channels = 0;
-	num_overlays = 0;
 	return ret;
 }
 
diff --git a/include/video/mcde.h b/include/video/mcde.h
index d0f8862172f..82a006b2425 100644
--- a/include/video/mcde.h
+++ b/include/video/mcde.h
@@ -168,9 +168,6 @@ enum mcde_display_rotation {
 #define MCDE_FIFO_AB_SIZE 640
 #define MCDE_FIFO_C0C1_SIZE 160
 
-#define MCDE_INPUT_FIFO_SIZE_4_0_4 80
-#define MCDE_INPUT_FIFO_SIZE_3_0_8 128
-
 /* Tv-out defines */
 #define MCDE_CONFIG_TVOUT_BACKGROUND_LUMINANCE		0x83
 #define MCDE_CONFIG_TVOUT_BACKGROUND_CHROMINANCE_CB	0x9C
@@ -179,11 +176,6 @@ enum mcde_display_rotation {
 /* In seconds */
 #define MCDE_AUTO_SYNC_WATCHDOG 5
 
-/* Hardware versions */
-#define MCDE_CHIP_VERSION_4_0_4 4       /* U5500 V2 */
-#define MCDE_CHIP_VERSION_3_0_8 2	/* U8500 V2 */
-#define MCDE_CHIP_VERSION_3	0
-
 /* DSI modes */
 #define DSI_VIDEO_MODE	0
 #define DSI_CMD_MODE	1
-- 
cgit v1.2.3


From 63e76600c709b2db07796eaab67b594fe3ff7736 Mon Sep 17 00:00:00 2001
From: Jimmy Rubin <jimmy.rubin@stericsson.com>
Date: Thu, 13 Oct 2011 13:24:56 +0200
Subject: video: mcde: Remove hardware specifics variables

Num_channels, num_overlays and num_dsilinks is not used anymore.

ST-Ericsson ID: 362765
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I00340680e9748f6661da148cd7fa3b48d1bb37fe
Signed-off-by: Jimmy Rubin <jimmy.rubin@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/33968
Reviewed-by: QATOOLS
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
Reviewed-by: Marcus LORENTZON <marcus.xm.lorentzon@stericsson.com>
---
 include/video/mcde.h | 5 -----
 1 file changed, 5 deletions(-)

diff --git a/include/video/mcde.h b/include/video/mcde.h
index 82a006b2425..2a64be62ac9 100644
--- a/include/video/mcde.h
+++ b/include/video/mcde.h
@@ -345,9 +345,6 @@ int mcde_dsi_set_max_pkt_size(struct mcde_chnl_state *chnl);
 #define MCDE_IO_AREA "MCDE I/O Area"
 
 struct mcde_platform_data {
-	/* DSI */
-	int num_dsilinks;
-
 	/* DPI */
 	u8 outmux[5]; /* MCDE_CONF0.OUTMUXx */
 	u8 syncmux;   /* MCDE_CONF0.SYNCMUXx */
@@ -355,8 +352,6 @@ struct mcde_platform_data {
 	const char *regulator_vana_id;
 	const char *regulator_mcde_epod_id;
 	const char *regulator_esram_epod_id;
-	int num_channels;
-	int num_overlays;
 	const char *clock_dsi_id;
 	const char *clock_dsi_lp_id;
 	const char *clock_dpi_id;
-- 
cgit v1.2.3


From c83c948be65d38610e83cdcebff58f50e0246a24 Mon Sep 17 00:00:00 2001
From: Jimmy Rubin <jimmy.rubin@stericsson.com>
Date: Wed, 5 Oct 2011 14:22:36 +0200
Subject: video: mcde: Update mcde_regs.h

Updates mcde_regs.h according to new hardware specification.
No functional changes just renaming of constants.

ST-Ericsson ID: 362765
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I45c4d84bf35c48cc0ea02f372451fc5ca6f89b17
Signed-off-by: Jimmy Rubin <jimmy.rubin@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/33327
Reviewed-by: QATOOLS
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
Reviewed-by: Marcus LORENTZON <marcus.xm.lorentzon@stericsson.com>
---
 drivers/video/mcde/mcde_hw.c   |  27 +++---
 drivers/video/mcde/mcde_regs.h | 206 ++++++++++++++++++-----------------------
 2 files changed, 105 insertions(+), 128 deletions(-)

diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index 3a3d273c3cb..7e8c010c710 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -1567,9 +1567,9 @@ void update_channel_registers(enum mcde_chnl chnl_id, struct chnl_regs *regs,
 			switch (port->sync_src) {
 			case MCDE_SYNCSRC_TE0:
 				out_synch_src =
-				MCDE_CHNL0SYNCHMOD_OUT_SYNCH_SRC_VSYNC0;
+				MCDE_CHNL0SYNCHMOD_OUT_SYNCH_SRC_TE0;
 				src_synch =
-				MCDE_CHNL0SYNCHMOD_SRC_SYNCH_OUTPUT;
+				MCDE_CHNL0SYNCHMOD_SRC_SYNCH_HARDWARE;
 				break;
 			case MCDE_SYNCSRC_OFF:
 				src_synch =
@@ -1578,26 +1578,26 @@ void update_channel_registers(enum mcde_chnl chnl_id, struct chnl_regs *regs,
 			case MCDE_SYNCSRC_TE1:
 			default:
 				out_synch_src =
-				MCDE_CHNL0SYNCHMOD_OUT_SYNCH_SRC_VSYNC1;
+				MCDE_CHNL0SYNCHMOD_OUT_SYNCH_SRC_TE1;
 				src_synch =
-				MCDE_CHNL0SYNCHMOD_SRC_SYNCH_OUTPUT;
+				MCDE_CHNL0SYNCHMOD_SRC_SYNCH_HARDWARE;
 				break;
 			case MCDE_SYNCSRC_TE_POLLING:
 				src_synch =
-				MCDE_CHNL0SYNCHMOD_SRC_SYNCH_OUTPUT;
+				MCDE_CHNL0SYNCHMOD_SRC_SYNCH_HARDWARE;
 				break;
 			}
 		} else {
 			if (port->sync_src == MCDE_SYNCSRC_TE0) {
 				out_synch_src =
-				MCDE_CHNL0SYNCHMOD_OUT_SYNCH_SRC_VSYNC0;
+				MCDE_CHNL0SYNCHMOD_OUT_SYNCH_SRC_TE0;
 				src_synch =
-				MCDE_CHNL0SYNCHMOD_SRC_SYNCH_OUTPUT;
+				MCDE_CHNL0SYNCHMOD_SRC_SYNCH_HARDWARE;
 			}
 		}
 	} else if (port->type == MCDE_PORTTYPE_DPI) {
 		src_synch = port->update_auto_trig ?
-					MCDE_CHNL0SYNCHMOD_SRC_SYNCH_OUTPUT :
+					MCDE_CHNL0SYNCHMOD_SRC_SYNCH_HARDWARE :
 					MCDE_CHNL0SYNCHMOD_SRC_SYNCH_SOFTWARE;
 	}
 
@@ -1741,8 +1741,7 @@ void update_channel_registers(enum mcde_chnl chnl_id, struct chnl_regs *regs,
 		mcde_wreg(MCDE_ROTADD1A + chnl_id * MCDE_ROTADD1A_GROUPOFFSET,
 			regs->rotbuf2);
 		mcde_wreg(MCDE_ROTACONF + chnl_id * MCDE_ROTACONF_GROUPOFFSET,
-			MCDE_ROTACONF_ROTBURSTSIZE_ENUM(8W) |
-			MCDE_ROTACONF_ROTBURSTSIZE_HW(1) |
+			MCDE_ROTACONF_ROTBURSTSIZE_ENUM(HW_8W) |
 			MCDE_ROTACONF_ROTDIR(regs->rotdir) |
 			MCDE_ROTACONF_STRIP_WIDTH_ENUM(16PIX) |
 			MCDE_ROTACONF_RD_MAXOUT_ENUM(4_REQ) |
@@ -2239,7 +2238,7 @@ static int _mcde_chnl_apply(struct mcde_chnl_state *chnl)
 	chnl->regs.map_g = chnl->map_g;
 	chnl->regs.map_b = chnl->map_b;
 	if (chnl->port.type == MCDE_PORTTYPE_DSI) {
-		chnl->regs.clksel = MCDE_CRA1_CLKSEL_166MHZ;
+		chnl->regs.clksel = MCDE_CRA1_CLKSEL_MCDECLK;
 		chnl->regs.dsipacking =
 				portfmt2dsipacking(chnl->port.pixel_format);
 	} else if (chnl->port.type == MCDE_PORTTYPE_DPI) {
@@ -2247,12 +2246,12 @@ static int _mcde_chnl_apply(struct mcde_chnl_state *chnl)
 			chnl->regs.internal_clk = false;
 			chnl->regs.bcd = true;
 			if (chnl->id == MCDE_CHNL_A)
-				chnl->regs.clksel = MCDE_CRA1_CLKSEL_EXT_TV1;
+				chnl->regs.clksel = MCDE_CRA1_CLKSEL_TV1CLK;
 			else
-				chnl->regs.clksel = MCDE_CRA1_CLKSEL_EXT_TV2;
+				chnl->regs.clksel = MCDE_CRA1_CLKSEL_TV2CLK;
 		} else {
 			chnl->regs.internal_clk = true;
-			chnl->regs.clksel = MCDE_CRA1_CLKSEL_LCD;
+			chnl->regs.clksel = MCDE_CRA1_CLKSEL_CLKPLL72;
 			chnl->regs.cdwin =
 					portfmt2cdwin(chnl->port.pixel_format);
 			chnl->regs.bcd = (chnl->port.phy.dpi.clock_div < 2);
diff --git a/drivers/video/mcde/mcde_regs.h b/drivers/video/mcde/mcde_regs.h
index 034044d7401..0eece3faea2 100644
--- a/drivers/video/mcde/mcde_regs.h
+++ b/drivers/video/mcde/mcde_regs.h
@@ -2464,10 +2464,9 @@
 #define MCDE_CHNL0SYNCHMOD_GROUPOFFSET 0x20
 #define MCDE_CHNL0SYNCHMOD_SRC_SYNCH_SHIFT 0
 #define MCDE_CHNL0SYNCHMOD_SRC_SYNCH_MASK 0x00000003
-#define MCDE_CHNL0SYNCHMOD_SRC_SYNCH_OUTPUT 0
-#define MCDE_CHNL0SYNCHMOD_SRC_SYNCH_AUTO 1
+#define MCDE_CHNL0SYNCHMOD_SRC_SYNCH_HARDWARE 0
+#define MCDE_CHNL0SYNCHMOD_SRC_SYNCH_NO_SYNCH 1
 #define MCDE_CHNL0SYNCHMOD_SRC_SYNCH_SOFTWARE 2
-#define MCDE_CHNL0SYNCHMOD_SRC_SYNCH_EXTERNAL 3
 #define MCDE_CHNL0SYNCHMOD_SRC_SYNCH_ENUM(__x) \
 	MCDE_VAL2REG(MCDE_CHNL0SYNCHMOD, SRC_SYNCH, \
 	MCDE_CHNL0SYNCHMOD_SRC_SYNCH_##__x)
@@ -2476,8 +2475,8 @@
 #define MCDE_CHNL0SYNCHMOD_OUT_SYNCH_SRC_SHIFT 2
 #define MCDE_CHNL0SYNCHMOD_OUT_SYNCH_SRC_MASK 0x0000001C
 #define MCDE_CHNL0SYNCHMOD_OUT_SYNCH_SRC_FORMATTER 0
-#define MCDE_CHNL0SYNCHMOD_OUT_SYNCH_SRC_VSYNC0 1
-#define MCDE_CHNL0SYNCHMOD_OUT_SYNCH_SRC_VSYNC1 2
+#define MCDE_CHNL0SYNCHMOD_OUT_SYNCH_SRC_TE0 1
+#define MCDE_CHNL0SYNCHMOD_OUT_SYNCH_SRC_TE1 2
 #define MCDE_CHNL0SYNCHMOD_OUT_SYNCH_SRC_ENUM(__x) \
 	MCDE_VAL2REG(MCDE_CHNL0SYNCHMOD, OUT_SYNCH_SRC, \
 	MCDE_CHNL0SYNCHMOD_OUT_SYNCH_SRC_##__x)
@@ -2486,10 +2485,9 @@
 #define MCDE_CHNL1SYNCHMOD 0x00000628
 #define MCDE_CHNL1SYNCHMOD_SRC_SYNCH_SHIFT 0
 #define MCDE_CHNL1SYNCHMOD_SRC_SYNCH_MASK 0x00000003
-#define MCDE_CHNL1SYNCHMOD_SRC_SYNCH_OUTPUT 0
-#define MCDE_CHNL1SYNCHMOD_SRC_SYNCH_AUTO 1
+#define MCDE_CHNL1SYNCHMOD_SRC_SYNCH_HARDWARE 0
+#define MCDE_CHNL1SYNCHMOD_SRC_SYNCH_NO_SYNCH 1
 #define MCDE_CHNL1SYNCHMOD_SRC_SYNCH_SOFTWARE 2
-#define MCDE_CHNL1SYNCHMOD_SRC_SYNCH_EXTERNAL 3
 #define MCDE_CHNL1SYNCHMOD_SRC_SYNCH_ENUM(__x) \
 	MCDE_VAL2REG(MCDE_CHNL1SYNCHMOD, SRC_SYNCH, \
 	MCDE_CHNL1SYNCHMOD_SRC_SYNCH_##__x)
@@ -2498,8 +2496,8 @@
 #define MCDE_CHNL1SYNCHMOD_OUT_SYNCH_SRC_SHIFT 2
 #define MCDE_CHNL1SYNCHMOD_OUT_SYNCH_SRC_MASK 0x0000001C
 #define MCDE_CHNL1SYNCHMOD_OUT_SYNCH_SRC_FORMATTER 0
-#define MCDE_CHNL1SYNCHMOD_OUT_SYNCH_SRC_VSYNC0 1
-#define MCDE_CHNL1SYNCHMOD_OUT_SYNCH_SRC_VSYNC1 2
+#define MCDE_CHNL1SYNCHMOD_OUT_SYNCH_SRC_TE0 1
+#define MCDE_CHNL1SYNCHMOD_OUT_SYNCH_SRC_TE1 2
 #define MCDE_CHNL1SYNCHMOD_OUT_SYNCH_SRC_ENUM(__x) \
 	MCDE_VAL2REG(MCDE_CHNL1SYNCHMOD, OUT_SYNCH_SRC, \
 	MCDE_CHNL1SYNCHMOD_OUT_SYNCH_SRC_##__x)
@@ -2508,10 +2506,9 @@
 #define MCDE_CHNL2SYNCHMOD 0x00000648
 #define MCDE_CHNL2SYNCHMOD_SRC_SYNCH_SHIFT 0
 #define MCDE_CHNL2SYNCHMOD_SRC_SYNCH_MASK 0x00000003
-#define MCDE_CHNL2SYNCHMOD_SRC_SYNCH_OUTPUT 0
-#define MCDE_CHNL2SYNCHMOD_SRC_SYNCH_AUTO 1
+#define MCDE_CHNL2SYNCHMOD_SRC_SYNCH_HARDWARE 0
+#define MCDE_CHNL2SYNCHMOD_SRC_SYNCH_NO_SYNCH 1
 #define MCDE_CHNL2SYNCHMOD_SRC_SYNCH_SOFTWARE 2
-#define MCDE_CHNL2SYNCHMOD_SRC_SYNCH_EXTERNAL 3
 #define MCDE_CHNL2SYNCHMOD_SRC_SYNCH_ENUM(__x) \
 	MCDE_VAL2REG(MCDE_CHNL2SYNCHMOD, SRC_SYNCH, \
 	MCDE_CHNL2SYNCHMOD_SRC_SYNCH_##__x)
@@ -2520,8 +2517,8 @@
 #define MCDE_CHNL2SYNCHMOD_OUT_SYNCH_SRC_SHIFT 2
 #define MCDE_CHNL2SYNCHMOD_OUT_SYNCH_SRC_MASK 0x0000001C
 #define MCDE_CHNL2SYNCHMOD_OUT_SYNCH_SRC_FORMATTER 0
-#define MCDE_CHNL2SYNCHMOD_OUT_SYNCH_SRC_VSYNC0 1
-#define MCDE_CHNL2SYNCHMOD_OUT_SYNCH_SRC_VSYNC1 2
+#define MCDE_CHNL2SYNCHMOD_OUT_SYNCH_SRC_TE0 1
+#define MCDE_CHNL2SYNCHMOD_OUT_SYNCH_SRC_TE1 2
 #define MCDE_CHNL2SYNCHMOD_OUT_SYNCH_SRC_ENUM(__x) \
 	MCDE_VAL2REG(MCDE_CHNL2SYNCHMOD, OUT_SYNCH_SRC, \
 	MCDE_CHNL2SYNCHMOD_OUT_SYNCH_SRC_##__x)
@@ -2530,10 +2527,9 @@
 #define MCDE_CHNL3SYNCHMOD 0x00000668
 #define MCDE_CHNL3SYNCHMOD_SRC_SYNCH_SHIFT 0
 #define MCDE_CHNL3SYNCHMOD_SRC_SYNCH_MASK 0x00000003
-#define MCDE_CHNL3SYNCHMOD_SRC_SYNCH_OUTPUT 0
-#define MCDE_CHNL3SYNCHMOD_SRC_SYNCH_AUTO 1
+#define MCDE_CHNL3SYNCHMOD_SRC_SYNCH_HARDWARE 0
+#define MCDE_CHNL3SYNCHMOD_SRC_SYNCH_NO_SYNCH 1
 #define MCDE_CHNL3SYNCHMOD_SRC_SYNCH_SOFTWARE 2
-#define MCDE_CHNL3SYNCHMOD_SRC_SYNCH_EXTERNAL 3
 #define MCDE_CHNL3SYNCHMOD_SRC_SYNCH_ENUM(__x) \
 	MCDE_VAL2REG(MCDE_CHNL3SYNCHMOD, SRC_SYNCH, \
 	MCDE_CHNL3SYNCHMOD_SRC_SYNCH_##__x)
@@ -2542,8 +2538,8 @@
 #define MCDE_CHNL3SYNCHMOD_OUT_SYNCH_SRC_SHIFT 2
 #define MCDE_CHNL3SYNCHMOD_OUT_SYNCH_SRC_MASK 0x0000001C
 #define MCDE_CHNL3SYNCHMOD_OUT_SYNCH_SRC_FORMATTER 0
-#define MCDE_CHNL3SYNCHMOD_OUT_SYNCH_SRC_VSYNC0 1
-#define MCDE_CHNL3SYNCHMOD_OUT_SYNCH_SRC_VSYNC1 2
+#define MCDE_CHNL3SYNCHMOD_OUT_SYNCH_SRC_TE0 1
+#define MCDE_CHNL3SYNCHMOD_OUT_SYNCH_SRC_TE1 2
 #define MCDE_CHNL3SYNCHMOD_OUT_SYNCH_SRC_ENUM(__x) \
 	MCDE_VAL2REG(MCDE_CHNL3SYNCHMOD, OUT_SYNCH_SRC, \
 	MCDE_CHNL3SYNCHMOD_OUT_SYNCH_SRC_##__x)
@@ -2674,10 +2670,6 @@
 #define MCDE_CRA0_FLOEN_MASK 0x00000001
 #define MCDE_CRA0_FLOEN(__x) \
 	MCDE_VAL2REG(MCDE_CRA0, FLOEN, __x)
-#define MCDE_CRA0_POWEREN_SHIFT 1
-#define MCDE_CRA0_POWEREN_MASK 0x00000002
-#define MCDE_CRA0_POWEREN(__x) \
-	MCDE_VAL2REG(MCDE_CRA0, POWEREN, __x)
 #define MCDE_CRA0_BLENDEN_SHIFT 2
 #define MCDE_CRA0_BLENDEN_MASK 0x00000004
 #define MCDE_CRA0_BLENDEN(__x) \
@@ -2757,10 +2749,6 @@
 #define MCDE_CRB0_FLOEN_MASK 0x00000001
 #define MCDE_CRB0_FLOEN(__x) \
 	MCDE_VAL2REG(MCDE_CRB0, FLOEN, __x)
-#define MCDE_CRB0_POWEREN_SHIFT 1
-#define MCDE_CRB0_POWEREN_MASK 0x00000002
-#define MCDE_CRB0_POWEREN(__x) \
-	MCDE_VAL2REG(MCDE_CRB0, POWEREN, __x)
 #define MCDE_CRB0_BLENDEN_SHIFT 2
 #define MCDE_CRB0_BLENDEN_MASK 0x00000004
 #define MCDE_CRB0_BLENDEN(__x) \
@@ -2843,12 +2831,11 @@
 	MCDE_VAL2REG(MCDE_CRA1, PCD, __x)
 #define MCDE_CRA1_CLKSEL_SHIFT 10
 #define MCDE_CRA1_CLKSEL_MASK 0x00001C00
-#define MCDE_CRA1_CLKSEL_LCD 0
-#define MCDE_CRA1_CLKSEL_HDMI 1
-#define MCDE_CRA1_CLKSEL_TV 2
-#define MCDE_CRA1_CLKSEL_EXT_TV1 3
-#define MCDE_CRA1_CLKSEL_EXT_TV2 4
-#define MCDE_CRA1_CLKSEL_166MHZ 5
+#define MCDE_CRA1_CLKSEL_CLKPLL72 0
+#define MCDE_CRA1_CLKSEL_CLKPLL27 2
+#define MCDE_CRA1_CLKSEL_TV1CLK 3
+#define MCDE_CRA1_CLKSEL_TV2CLK 4
+#define MCDE_CRA1_CLKSEL_MCDECLK 5
 #define MCDE_CRA1_CLKSEL_ENUM(__x) \
 	MCDE_VAL2REG(MCDE_CRA1, CLKSEL, MCDE_CRA1_CLKSEL_##__x)
 #define MCDE_CRA1_CLKSEL(__x) \
@@ -2890,8 +2877,8 @@
 	MCDE_VAL2REG(MCDE_CRA1, BCD, __x)
 #define MCDE_CRA1_CLKTYPE_SHIFT 30
 #define MCDE_CRA1_CLKTYPE_MASK 0x40000000
-#define MCDE_CRA1_CLKTYPE_EXTERNAL 0
-#define MCDE_CRA1_CLKTYPE_INTERNAL 1
+#define MCDE_CRA1_CLKTYPE_TVXCLKSEL0 0
+#define MCDE_CRA1_CLKTYPE_TVXCLKSEL1 1
 #define MCDE_CRA1_CLKTYPE_ENUM(__x) \
 	MCDE_VAL2REG(MCDE_CRA1, CLKTYPE, MCDE_CRA1_CLKTYPE_##__x)
 #define MCDE_CRA1_CLKTYPE(__x) \
@@ -2903,12 +2890,11 @@
 	MCDE_VAL2REG(MCDE_CRB1, PCD, __x)
 #define MCDE_CRB1_CLKSEL_SHIFT 10
 #define MCDE_CRB1_CLKSEL_MASK 0x00001C00
-#define MCDE_CRB1_CLKSEL_LCD 0
-#define MCDE_CRB1_CLKSEL_HDMI 1
-#define MCDE_CRB1_CLKSEL_TV 2
-#define MCDE_CRB1_CLKSEL_EXT_TV1 3
-#define MCDE_CRB1_CLKSEL_EXT_TV2 4
-#define MCDE_CRB1_CLKSEL_166MHZ 5
+#define MCDE_CRB1_CLKSEL_CLKPLL72 0
+#define MCDE_CRB1_CLKSEL_CLKPLL27 2
+#define MCDE_CRB1_CLKSEL_TV1CLK 3
+#define MCDE_CRB1_CLKSEL_TV2CLK 4
+#define MCDE_CRB1_CLKSEL_MCDECLK 5
 #define MCDE_CRB1_CLKSEL_ENUM(__x) \
 	MCDE_VAL2REG(MCDE_CRB1, CLKSEL, MCDE_CRB1_CLKSEL_##__x)
 #define MCDE_CRB1_CLKSEL(__x) \
@@ -2950,8 +2936,8 @@
 	MCDE_VAL2REG(MCDE_CRB1, BCD, __x)
 #define MCDE_CRB1_CLKTYPE_SHIFT 30
 #define MCDE_CRB1_CLKTYPE_MASK 0x40000000
-#define MCDE_CRB1_CLKTYPE_EXTERNAL 0
-#define MCDE_CRB1_CLKTYPE_INTERNAL 1
+#define MCDE_CRB1_CLKTYPE_TVXCLKSEL0 0
+#define MCDE_CRB1_CLKTYPE_TVXCLKSEL1 1
 #define MCDE_CRB1_CLKTYPE_ENUM(__x) \
 	MCDE_VAL2REG(MCDE_CRB1, CLKTYPE, MCDE_CRB1_CLKTYPE_##__x)
 #define MCDE_CRB1_CLKTYPE(__x) \
@@ -3231,8 +3217,6 @@
 #define MCDE_TVCRA_TVMODE_SHIFT 3
 #define MCDE_TVCRA_TVMODE_MASK 0x00000038
 #define MCDE_TVCRA_TVMODE_SDTV_656P 0
-#define MCDE_TVCRA_TVMODE_HDTV_480P 1
-#define MCDE_TVCRA_TVMODE_HDTV_720P 2
 #define MCDE_TVCRA_TVMODE_SDTV_656P_LE 3
 #define MCDE_TVCRA_TVMODE_SDTV_656P_BE 4
 #define MCDE_TVCRA_TVMODE_ENUM(__x) \
@@ -3275,8 +3259,6 @@
 #define MCDE_TVCRB_TVMODE_SHIFT 3
 #define MCDE_TVCRB_TVMODE_MASK 0x00000038
 #define MCDE_TVCRB_TVMODE_SDTV_656P 0
-#define MCDE_TVCRB_TVMODE_HDTV_480P 1
-#define MCDE_TVCRB_TVMODE_HDTV_720P 2
 #define MCDE_TVCRB_TVMODE_SDTV_656P_LE 3
 #define MCDE_TVCRB_TVMODE_SDTV_656P_BE 4
 #define MCDE_TVCRB_TVMODE_ENUM(__x) \
@@ -3485,6 +3467,10 @@
 #define MCDE_DITCTRLA_COMP_MASK 0x00000002
 #define MCDE_DITCTRLA_COMP(__x) \
 	MCDE_VAL2REG(MCDE_DITCTRLA, COMP, __x)
+#define MCDE_DITCTRLA_MODE_SHIFT 2
+#define MCDE_DITCTRLA_MODE_MASK 0x0000000C
+#define MCDE_DITCTRLA_MODE(__x) \
+	MCDE_VAL2REG(MCDE_DITCTRLA, MODE, __x)
 #define MCDE_DITCTRLA_MASK_SHIFT 4
 #define MCDE_DITCTRLA_MASK_MASK 0x00000010
 #define MCDE_DITCTRLA_MASK(__x) \
@@ -3506,6 +3492,10 @@
 #define MCDE_DITCTRLB_COMP_MASK 0x00000002
 #define MCDE_DITCTRLB_COMP(__x) \
 	MCDE_VAL2REG(MCDE_DITCTRLB, COMP, __x)
+#define MCDE_DITCTRLB_MODE_SHIFT 2
+#define MCDE_DITCTRLB_MODE_MASK 0x0000000C
+#define MCDE_DITCTRLB_MODE(__x) \
+	MCDE_VAL2REG(MCDE_DITCTRLB, MODE, __x)
 #define MCDE_DITCTRLB_MASK_SHIFT 4
 #define MCDE_DITCTRLB_MASK_MASK 0x00000010
 #define MCDE_DITCTRLB_MASK(__x) \
@@ -3608,20 +3598,20 @@
 #define MCDE_ROTACONF 0x0000087C
 #define MCDE_ROTACONF_GROUPOFFSET 0x200
 #define MCDE_ROTACONF_ROTBURSTSIZE_SHIFT 0
-#define MCDE_ROTACONF_ROTBURSTSIZE_MASK 0x00000003
+#define MCDE_ROTACONF_ROTBURSTSIZE_MASK 0x00000007
 #define MCDE_ROTACONF_ROTBURSTSIZE_1W 0
 #define MCDE_ROTACONF_ROTBURSTSIZE_2W 1
 #define MCDE_ROTACONF_ROTBURSTSIZE_4W 2
 #define MCDE_ROTACONF_ROTBURSTSIZE_8W 3
+#define MCDE_ROTACONF_ROTBURSTSIZE_HW_1W 4
+#define MCDE_ROTACONF_ROTBURSTSIZE_HW_2W 5
+#define MCDE_ROTACONF_ROTBURSTSIZE_HW_4W 6
+#define MCDE_ROTACONF_ROTBURSTSIZE_HW_8W 7
 #define MCDE_ROTACONF_ROTBURSTSIZE_ENUM(__x) \
 	MCDE_VAL2REG(MCDE_ROTACONF, ROTBURSTSIZE, \
 	MCDE_ROTACONF_ROTBURSTSIZE_##__x)
 #define MCDE_ROTACONF_ROTBURSTSIZE(__x) \
 	MCDE_VAL2REG(MCDE_ROTACONF, ROTBURSTSIZE, __x)
-#define MCDE_ROTACONF_ROTBURSTSIZE_HW_SHIFT 2
-#define MCDE_ROTACONF_ROTBURSTSIZE_HW_MASK 0x00000004
-#define MCDE_ROTACONF_ROTBURSTSIZE_HW(__x) \
-	MCDE_VAL2REG(MCDE_ROTACONF, ROTBURSTSIZE_HW, __x)
 #define MCDE_ROTACONF_ROTDIR_SHIFT 3
 #define MCDE_ROTACONF_ROTDIR_MASK 0x00000008
 #define MCDE_ROTACONF_ROTDIR_CCW 0
@@ -3676,20 +3666,20 @@
 	MCDE_VAL2REG(MCDE_ROTACONF, RD_ROPC, __x)
 #define MCDE_ROTBCONF 0x00000A7C
 #define MCDE_ROTBCONF_ROTBURSTSIZE_SHIFT 0
-#define MCDE_ROTBCONF_ROTBURSTSIZE_MASK 0x00000003
+#define MCDE_ROTBCONF_ROTBURSTSIZE_MASK 0x00000007
 #define MCDE_ROTBCONF_ROTBURSTSIZE_1W 0
 #define MCDE_ROTBCONF_ROTBURSTSIZE_2W 1
 #define MCDE_ROTBCONF_ROTBURSTSIZE_4W 2
 #define MCDE_ROTBCONF_ROTBURSTSIZE_8W 3
+#define MCDE_ROTBCONF_ROTBURSTSIZE_HW_1W 4
+#define MCDE_ROTBCONF_ROTBURSTSIZE_HW_2W 5
+#define MCDE_ROTBCONF_ROTBURSTSIZE_HW_4W 6
+#define MCDE_ROTBCONF_ROTBURSTSIZE_HW_8W 7
 #define MCDE_ROTBCONF_ROTBURSTSIZE_ENUM(__x) \
 	MCDE_VAL2REG(MCDE_ROTBCONF, ROTBURSTSIZE, \
 	MCDE_ROTBCONF_ROTBURSTSIZE_##__x)
 #define MCDE_ROTBCONF_ROTBURSTSIZE(__x) \
 	MCDE_VAL2REG(MCDE_ROTBCONF, ROTBURSTSIZE, __x)
-#define MCDE_ROTBCONF_ROTBURSTSIZE_HW_SHIFT 2
-#define MCDE_ROTBCONF_ROTBURSTSIZE_HW_MASK 0x00000004
-#define MCDE_ROTBCONF_ROTBURSTSIZE_HW(__x) \
-	MCDE_VAL2REG(MCDE_ROTBCONF, ROTBURSTSIZE_HW, __x)
 #define MCDE_ROTBCONF_ROTDIR_SHIFT 3
 #define MCDE_ROTBCONF_ROTDIR_MASK 0x00000008
 #define MCDE_ROTBCONF_ROTDIR_CCW 0
@@ -4026,14 +4016,6 @@
 #define MCDE_OLEDCONV6B_OFF_BLUE(__x) \
 	MCDE_VAL2REG(MCDE_OLEDCONV6B, OFF_BLUE, __x)
 #define MCDE_CRC 0x00000C00
-#define MCDE_CRC_FLOEN_SHIFT 0
-#define MCDE_CRC_FLOEN_MASK 0x00000001
-#define MCDE_CRC_FLOEN(__x) \
-	MCDE_VAL2REG(MCDE_CRC, FLOEN, __x)
-#define MCDE_CRC_POWEREN_SHIFT 1
-#define MCDE_CRC_POWEREN_MASK 0x00000002
-#define MCDE_CRC_POWEREN(__x) \
-	MCDE_VAL2REG(MCDE_CRC, POWEREN, __x)
 #define MCDE_CRC_C1EN_SHIFT 2
 #define MCDE_CRC_C1EN_MASK 0x00000004
 #define MCDE_CRC_C1EN(__x) \
@@ -4042,18 +4024,6 @@
 #define MCDE_CRC_C2EN_MASK 0x00000008
 #define MCDE_CRC_C2EN(__x) \
 	MCDE_VAL2REG(MCDE_CRC, C2EN, __x)
-#define MCDE_CRC_WMLVL1_SHIFT 4
-#define MCDE_CRC_WMLVL1_MASK 0x00000010
-#define MCDE_CRC_WMLVL1(__x) \
-	MCDE_VAL2REG(MCDE_CRC, WMLVL1, __x)
-#define MCDE_CRC_WMLVL2_SHIFT 5
-#define MCDE_CRC_WMLVL2_MASK 0x00000020
-#define MCDE_CRC_WMLVL2(__x) \
-	MCDE_VAL2REG(MCDE_CRC, WMLVL2, __x)
-#define MCDE_CRC_SYNCSEL_SHIFT 6
-#define MCDE_CRC_SYNCSEL_MASK 0x00000040
-#define MCDE_CRC_SYNCSEL(__x) \
-	MCDE_VAL2REG(MCDE_CRC, SYNCSEL, __x)
 #define MCDE_CRC_SYCEN0_SHIFT 7
 #define MCDE_CRC_SYCEN0_MASK 0x00000080
 #define MCDE_CRC_SYCEN0(__x) \
@@ -4070,23 +4040,6 @@
 #define MCDE_CRC_SIZE2_MASK 0x00000400
 #define MCDE_CRC_SIZE2(__x) \
 	MCDE_VAL2REG(MCDE_CRC, SIZE2, __x)
-#define MCDE_CRC_INBAND1_SHIFT 11
-#define MCDE_CRC_INBAND1_MASK 0x00000800
-#define MCDE_CRC_INBAND1(__x) \
-	MCDE_VAL2REG(MCDE_CRC, INBAND1, __x)
-#define MCDE_CRC_INBAND2_SHIFT 12
-#define MCDE_CRC_INBAND2_MASK 0x00001000
-#define MCDE_CRC_INBAND2(__x) \
-	MCDE_VAL2REG(MCDE_CRC, INBAND2, __x)
-#define MCDE_CRC_CLKSEL_SHIFT 13
-#define MCDE_CRC_CLKSEL_MASK 0x00006000
-#define MCDE_CRC_CLKSEL_166MHz 0
-#define MCDE_CRC_CLKSEL_48MHz 1
-#define MCDE_CRC_CLKSEL_LCD 2
-#define MCDE_CRC_CLKSEL_ENUM(__x) \
-	MCDE_VAL2REG(MCDE_CRC, CLKSEL, MCDE_CRC_CLKSEL_##__x)
-#define MCDE_CRC_CLKSEL(__x) \
-	MCDE_VAL2REG(MCDE_CRC, CLKSEL, __x)
 #define MCDE_CRC_YUVCONVC1EN_SHIFT 15
 #define MCDE_CRC_YUVCONVC1EN_MASK 0x00008000
 #define MCDE_CRC_YUVCONVC1EN(__x) \
@@ -4099,10 +4052,6 @@
 #define MCDE_CRC_CS2EN_MASK 0x00020000
 #define MCDE_CRC_CS2EN(__x) \
 	MCDE_VAL2REG(MCDE_CRC, CS2EN, __x)
-#define MCDE_CRC_RESEN_SHIFT 18
-#define MCDE_CRC_RESEN_MASK 0x00040000
-#define MCDE_CRC_RESEN(__x) \
-	MCDE_VAL2REG(MCDE_CRC, RESEN, __x)
 #define MCDE_CRC_CS1POL_SHIFT 19
 #define MCDE_CRC_CS1POL_MASK 0x00080000
 #define MCDE_CRC_CS1POL(__x) \
@@ -4135,19 +4084,11 @@
 #define MCDE_CRC_RD2POL_MASK 0x04000000
 #define MCDE_CRC_RD2POL(__x) \
 	MCDE_VAL2REG(MCDE_CRC, RD2POL, __x)
-#define MCDE_CRC_RES1POL_SHIFT 27
-#define MCDE_CRC_RES1POL_MASK 0x08000000
-#define MCDE_CRC_RES1POL(__x) \
-	MCDE_VAL2REG(MCDE_CRC, RES1POL, __x)
-#define MCDE_CRC_RES2POL_SHIFT 28
-#define MCDE_CRC_RES2POL_MASK 0x10000000
-#define MCDE_CRC_RES2POL(__x) \
-	MCDE_VAL2REG(MCDE_CRC, RES2POL, __x)
 #define MCDE_CRC_SYNCCTRL_SHIFT 29
 #define MCDE_CRC_SYNCCTRL_MASK 0x60000000
-#define MCDE_CRC_SYNCCTRL_OFF 0
-#define MCDE_CRC_SYNCCTRL_C0 1
-#define MCDE_CRC_SYNCCTRL_C1 2
+#define MCDE_CRC_SYNCCTRL_NO_SYNC 0
+#define MCDE_CRC_SYNCCTRL_DBI0 1
+#define MCDE_CRC_SYNCCTRL_DBI1 2
 #define MCDE_CRC_SYNCCTRL_PING_PONG 3
 #define MCDE_CRC_SYNCCTRL_ENUM(__x) \
 	MCDE_VAL2REG(MCDE_CRC, SYNCCTRL, MCDE_CRC_SYNCCTRL_##__x)
@@ -4337,6 +4278,16 @@
 	MCDE_VAL2REG(MCDE_VSCRC0, VSPMAX, __x)
 #define MCDE_VSCRC0_VSPDIV_SHIFT 24
 #define MCDE_VSCRC0_VSPDIV_MASK 0x07000000
+#define MCDE_VSCRC0_VSPDIV_MCDECLK_DIV_1 0
+#define MCDE_VSCRC0_VSPDIV_MCDECLK_DIV_2 1
+#define MCDE_VSCRC0_VSPDIV_MCDECLK_DIV_4 2
+#define MCDE_VSCRC0_VSPDIV_MCDECLK_DIV_8 3
+#define MCDE_VSCRC0_VSPDIV_MCDECLK_DIV_16 4
+#define MCDE_VSCRC0_VSPDIV_MCDECLK_DIV_32 5
+#define MCDE_VSCRC0_VSPDIV_MCDECLK_DIV_64 6
+#define MCDE_VSCRC0_VSPDIV_MCDECLK_DIV_128 7
+#define MCDE_VSCRC0_VSPDIV_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_VSCRC0, VSPDIV, MCDE_VSCRC0_VSPDIV_##__x)
 #define MCDE_VSCRC0_VSPDIV(__x) \
 	MCDE_VAL2REG(MCDE_VSCRC0, VSPDIV, __x)
 #define MCDE_VSCRC0_VSPOL_SHIFT 27
@@ -4349,8 +4300,8 @@
 	MCDE_VAL2REG(MCDE_VSCRC0, VSPOL, __x)
 #define MCDE_VSCRC0_VSSEL_SHIFT 28
 #define MCDE_VSCRC0_VSSEL_MASK 0x10000000
-#define MCDE_VSCRC0_VSSEL_VSYNC 0
-#define MCDE_VSCRC0_VSSEL_HSYNC 1
+#define MCDE_VSCRC0_VSSEL_VSYNC0 0
+#define MCDE_VSCRC0_VSSEL_VSYNC1 1
 #define MCDE_VSCRC0_VSSEL_ENUM(__x) \
 	MCDE_VAL2REG(MCDE_VSCRC0, VSSEL, MCDE_VSCRC0_VSSEL_##__x)
 #define MCDE_VSCRC0_VSSEL(__x) \
@@ -4370,6 +4321,16 @@
 	MCDE_VAL2REG(MCDE_VSCRC1, VSPMAX, __x)
 #define MCDE_VSCRC1_VSPDIV_SHIFT 24
 #define MCDE_VSCRC1_VSPDIV_MASK 0x07000000
+#define MCDE_VSCRC1_VSPDIV_MCDECLK_DIV_1 0
+#define MCDE_VSCRC1_VSPDIV_MCDECLK_DIV_2 1
+#define MCDE_VSCRC1_VSPDIV_MCDECLK_DIV_4 2
+#define MCDE_VSCRC1_VSPDIV_MCDECLK_DIV_8 3
+#define MCDE_VSCRC1_VSPDIV_MCDECLK_DIV_16 4
+#define MCDE_VSCRC1_VSPDIV_MCDECLK_DIV_32 5
+#define MCDE_VSCRC1_VSPDIV_MCDECLK_DIV_64 6
+#define MCDE_VSCRC1_VSPDIV_MCDECLK_DIV_128 7
+#define MCDE_VSCRC1_VSPDIV_ENUM(__x) \
+	MCDE_VAL2REG(MCDE_VSCRC1, VSPDIV, MCDE_VSCRC1_VSPDIV_##__x)
 #define MCDE_VSCRC1_VSPDIV(__x) \
 	MCDE_VAL2REG(MCDE_VSCRC1, VSPDIV, __x)
 #define MCDE_VSCRC1_VSPOL_SHIFT 27
@@ -4382,8 +4343,8 @@
 	MCDE_VAL2REG(MCDE_VSCRC1, VSPOL, __x)
 #define MCDE_VSCRC1_VSSEL_SHIFT 28
 #define MCDE_VSCRC1_VSSEL_MASK 0x10000000
-#define MCDE_VSCRC1_VSSEL_VSYNC 0
-#define MCDE_VSCRC1_VSSEL_HSYNC 1
+#define MCDE_VSCRC1_VSSEL_VSYNC0 0
+#define MCDE_VSCRC1_VSSEL_VSYNC1 1
 #define MCDE_VSCRC1_VSSEL_ENUM(__x) \
 	MCDE_VAL2REG(MCDE_VSCRC1, VSSEL, MCDE_VSCRC1_VSSEL_##__x)
 #define MCDE_VSCRC1_VSSEL(__x) \
@@ -4512,11 +4473,19 @@
 #define MCDE_WDATADC0_DATAVALUE_MASK 0x00FFFFFF
 #define MCDE_WDATADC0_DATAVALUE(__x) \
 	MCDE_VAL2REG(MCDE_WDATADC0, DATAVALUE, __x)
+#define MCDE_WDATADC0_DC_SHIFT 24
+#define MCDE_WDATADC0_DC_MASK 0x01000000
+#define MCDE_WDATADC0_DC(__x) \
+	MCDE_VAL2REG(MCDE_WDATADC0, DC, __x)
 #define MCDE_WDATADC1 0x00000C98
 #define MCDE_WDATADC1_DATAVALUE_SHIFT 0
 #define MCDE_WDATADC1_DATAVALUE_MASK 0x00FFFFFF
 #define MCDE_WDATADC1_DATAVALUE(__x) \
 	MCDE_VAL2REG(MCDE_WDATADC1, DATAVALUE, __x)
+#define MCDE_WDATADC1_DC_SHIFT 24
+#define MCDE_WDATADC1_DC_MASK 0x01000000
+#define MCDE_WDATADC1_DC(__x) \
+	MCDE_VAL2REG(MCDE_WDATADC1, DC, __x)
 #define MCDE_RDATADC0 0x00000C9C
 #define MCDE_RDATADC0_GROUPOFFSET 0x4
 #define MCDE_RDATADC0_DATAREADFROMDISPLAYMODULE_SHIFT 0
@@ -4536,6 +4505,15 @@
 #define MCDE_RDATADC1_STARTREAD_MASK 0x00010000
 #define MCDE_RDATADC1_STARTREAD(__x) \
 	MCDE_VAL2REG(MCDE_RDATADC1, STARTREAD, __x)
+#define MCDE_STATC 0x00000CA4
+#define MCDE_STATC_STATBUSY0_SHIFT 0
+#define MCDE_STATC_STATBUSY0_MASK 0x00000001
+#define MCDE_STATC_STATBUSY0(__x) \
+	MCDE_VAL2REG(MCDE_STATC, STATBUSY0, __x)
+#define MCDE_STATC_STATBUSY1_SHIFT 5
+#define MCDE_STATC_STATBUSY1_MASK 0x00000020
+#define MCDE_STATC_STATBUSY1(__x) \
+	MCDE_VAL2REG(MCDE_STATC, STATBUSY1, __x)
 #define MCDE_CTRLC0 0x00000CA8
 #define MCDE_CTRLC0_GROUPOFFSET 0x4
 #define MCDE_CTRLC0_FIFOWTRMRK_SHIFT 0
-- 
cgit v1.2.3


From 2e1b095854195dbac290262e1e06d18916f19af5 Mon Sep 17 00:00:00 2001
From: Jimmy Rubin <jimmy.rubin@stericsson.com>
Date: Thu, 13 Oct 2011 13:45:52 +0200
Subject: video: mcde: Add support for 4_1_3 hardware

MCDE version 4.1.3 is used in db9540 v1.

ST-Ericsson ID: 362765
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I50c6d551df79f5f2b65254f3f3176520b909ccc9
Signed-off-by: Jimmy Rubin <jimmy.rubin@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/33969
Reviewed-by: QATOOLS
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
Reviewed-by: Marcus LORENTZON <marcus.xm.lorentzon@stericsson.com>
---
 drivers/video/mcde/mcde_hw.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index 7e8c010c710..0e081ed7f0c 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -89,6 +89,7 @@ static void wait_for_flow_disabled(struct mcde_chnl_state *chnl);
 #define DSI_READ_NBR_OF_RETRIES 2
 #define MCDE_FLOWEN_MAX_TRIAL 60
 
+#define MCDE_VERSION_4_1_3 0x04010300
 #define MCDE_VERSION_4_0_4 0x04000400
 #define MCDE_VERSION_3_0_8 0x03000800
 #define MCDE_VERSION_3_0_5 0x03000500
@@ -2995,6 +2996,14 @@ static int probe_hw(struct platform_device *pdev)
 		dsi_ifc_is_supported = false;
 		dev_info(&mcde_dev->dev, "db5500 V2 HW\n");
 		break;
+	case MCDE_VERSION_4_1_3:
+		num_dsilinks = 3;
+		num_channels = 4;
+		num_overlays = 6;
+		dsi_ifc_is_supported = true;
+		input_fifo_size = 192;
+		dev_info(&mcde_dev->dev, "db9540 V1 HW\n");
+		break;
 	case MCDE_VERSION_3_0_5:
 		/* Intentional */
 	case MCDE_VERSION_1_0_4:
-- 
cgit v1.2.3


From 654346981b43fcddfbb80fa1db63af55b8d482d7 Mon Sep 17 00:00:00 2001
From: Per Persson <per.xb.persson@stericsson.com>
Date: Tue, 18 Oct 2011 10:05:25 +0200
Subject: video: av8100: Update suspend resume method

Driver is updated to use dev_pm_ops suspend/resume method.

ST-Ericsson ID: 368266
ST-Ericsson Linux next: Not tested
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: Ibaaeac502d30d8ee8484bce74e829f1fbe41ceed
Signed-off-by: Per Persson <per.xb.persson@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/34494
Reviewed-by: Jonas ABERG <jonas.aberg@stericsson.com>
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
---
 drivers/video/av8100/av8100.c | 31 +++++++++++++++++--------------
 1 file changed, 17 insertions(+), 14 deletions(-)

diff --git a/drivers/video/av8100/av8100.c b/drivers/video/av8100/av8100.c
index 36f86512a38..00995e8d02e 100644
--- a/drivers/video/av8100/av8100.c
+++ b/drivers/video/av8100/av8100.c
@@ -534,16 +534,16 @@ static int adev_to_devnr(struct av8100_device *adev)
 }
 
 #ifdef CONFIG_PM
-static int av8100_suspend(struct i2c_client *i2c_client, pm_message_t state)
+static int av8100_suspend(struct device *dev)
 {
 	int ret = 0;
 	struct av8100_device *adev;
 
-	adev = dev_to_adev(&i2c_client->dev);
+	adev = dev_to_adev(dev);
 	if (!adev)
 		return -EFAULT;
 
-	dev_dbg(adev->dev, "%s\n", __func__);
+	dev_dbg(dev, "%s\n", __func__);
 
 	adev->params.pre_suspend_power =
 		(av8100_status_get().av8100_state > AV8100_OPMODE_SHUTDOWN);
@@ -551,34 +551,34 @@ static int av8100_suspend(struct i2c_client *i2c_client, pm_message_t state)
 	if (adev->params.pre_suspend_power) {
 		ret = av8100_powerdown();
 		if (ret)
-			dev_err(adev->dev, "av8100_powerdown failed\n");
+			dev_err(dev, "av8100_powerdown failed\n");
 	}
 
 	return ret;
 }
 
-static int av8100_resume(struct i2c_client *i2c_client)
+static int av8100_resume(struct device *dev)
 {
 	int ret;
 	u8 hpds = 0;
 	struct av8100_device *adev;
 
-	adev = dev_to_adev(&i2c_client->dev);
+	adev = dev_to_adev(dev);
 	if (!adev)
 		return -EFAULT;
 
-	dev_dbg(adev->dev, "%s\n", __func__);
+	dev_dbg(dev, "%s\n", __func__);
 
 	if (adev->params.pre_suspend_power) {
 		ret = av8100_powerup();
 		if (ret) {
-			dev_err(adev->dev, "av8100_powerup failed\n");
+			dev_err(dev, "av8100_powerup failed\n");
 			return ret;
 		}
 
 		/* Check HDMI plug status */
 		if (av8100_reg_stby_r(NULL, NULL, &hpds, NULL, NULL)) {
-			dev_warn(adev->dev, "av8100_reg_stby_r failed\n");
+			dev_warn(dev, "av8100_reg_stby_r failed\n");
 			goto av8100_resume_end;
 		}
 
@@ -595,18 +595,21 @@ static int av8100_resume(struct i2c_client *i2c_client)
 av8100_resume_end:
 	return 0;
 }
-#else
-#define av8100_suspend NULL
-#define av8100_resume NULL
+
+static const struct dev_pm_ops av8100_dev_pm_ops = {
+	.suspend = av8100_suspend,
+	.resume = av8100_resume,
+};
 #endif
 
 static struct i2c_driver av8100_driver = {
 	.probe	= av8100_probe,
 	.remove = av8100_remove,
-	.suspend = av8100_suspend,
-	.resume = av8100_resume,
 	.driver = {
 		.name	= "av8100",
+#ifdef CONFIG_PM
+		.pm	= &av8100_dev_pm_ops,
+#endif
 	},
 	.id_table	= av8100_id,
 };
-- 
cgit v1.2.3


From 24cba5dcc671bf1ddbdc689072f72af9eef924e3 Mon Sep 17 00:00:00 2001
From: Per Persson <per.xb.persson@stericsson.com>
Date: Wed, 19 Oct 2011 09:32:01 +0200
Subject: video: av8100: free irq when powerdown

irq is requested when chip is powered up and freed when
powered down.

ST-Ericsson ID: 368561
ST-Ericsson Linux next: Not tested
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I42145787b15630a7c09a28887f76026b2b9004e0
Signed-off-by: Per Persson <per.xb.persson@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/34495
Reviewed-by: Jonas ABERG <jonas.aberg@stericsson.com>
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
---
 drivers/video/av8100/av8100.c | 40 ++++++++++++++++++++--------------------
 1 file changed, 20 insertions(+), 20 deletions(-)

diff --git a/drivers/video/av8100/av8100.c b/drivers/video/av8100/av8100.c
index 00995e8d02e..356e0061335 100644
--- a/drivers/video/av8100/av8100.c
+++ b/drivers/video/av8100/av8100.c
@@ -191,6 +191,7 @@ struct av8100_params {
 	bool regulator_requested;
 	bool pre_suspend_power;
 	bool ints_enabled;
+	bool irq_requested;
 };
 
 /**
@@ -1076,6 +1077,8 @@ static int av8100_params_init(struct av8100_device *adev)
 {
 	dev_dbg(adev->dev, "%s\n", __func__);
 
+	memset(&adev->params, 0, sizeof(struct av8100_params));
+
 	adev->params.denc_off_time = AV8100_DENC_OFF_TIME;
 	adev->params.hdmi_off_time = AV8100_HDMI_OFF_TIME;
 	adev->params.on_time = AV8100_ON_TIME;
@@ -1086,12 +1089,6 @@ static int av8100_params_init(struct av8100_device *adev)
 	adev->params.cecm = AV8100_GENERAL_INTERRUPT_MASK_CECM_HIGH;
 	adev->params.uovbm = AV8100_GENERAL_INTERRUPT_MASK_UOVBM_HIGH;
 
-	adev->params.plug_state = AV8100_UNPLUGGED;
-	adev->params.inputclk = NULL;
-	adev->params.inputclk_requested = false;
-	adev->params.opp_requested = false;
-	adev->params.regulator_requested = false;
-
 	return 0;
 }
 
@@ -2053,7 +2050,15 @@ static int av8100_powerup1(struct av8100_device *adev)
 		break;
 	}
 
-	return 0;
+	retval = request_irq(pdata->irq, av8100_intr_handler,
+			IRQF_TRIGGER_RISING, "av8100", adev);
+	if (retval == 0)
+		adev->params.irq_requested = true;
+	else
+		dev_err(adev->dev, "request_irq %d failed %d\n",
+				pdata->irq, retval);
+
+	return retval;
 
 av8100_powerup1_err:
 	av8100_powerdown();
@@ -2231,6 +2236,10 @@ int av8100_powerdown(void)
 
 	av8100_disable_interrupt();
 
+	if (adev->params.irq_requested)
+		free_irq(pdata->irq, adev);
+	adev->params.irq_requested = false;
+
 	if (pdata->alt_powerupseq) {
 		retval = av8100_reg_stby_pend_int_w(
 				AV8100_STANDBY_PENDING_INTERRUPT_HPDI_LOW,
@@ -2258,6 +2267,10 @@ int av8100_powerdown(void)
 		adev->params.inputclk_requested = false;
 	}
 
+	av8100_set_state(adev, AV8100_OPMODE_SHUTDOWN);
+
+	gpio_set_value_cansleep(pdata->reset, 0);
+
 	/* Regulator disable */
 	if ((adev->params.regulator_pwr) &&
 			(adev->params.regulator_requested)) {
@@ -2266,13 +2279,9 @@ int av8100_powerdown(void)
 		adev->params.regulator_requested = false;
 	}
 
-	gpio_set_value_cansleep(pdata->reset, 0);
-
 	if (pdata->alt_powerupseq)
 		mdelay(AV8100_WAITTIME_5MS);
 
-	av8100_set_state(adev, AV8100_OPMODE_SHUTDOWN);
-
 av8100_powerdown_end:
 	return retval;
 }
@@ -4064,15 +4073,6 @@ static int __devinit av8100_probe(struct i2c_client *i2c_client,
 
 	kthread_run(av8100_thread, adev, "av8100_thread");
 
-	ret = request_irq(pdata->irq, av8100_intr_handler,
-			IRQF_TRIGGER_RISING, "av8100", adev);
-	if (ret) {
-		dev_err(dev, "av8100_hw request_irq %d failed %d\n",
-			pdata->irq, ret);
-		gpio_free(pdata->irq);
-		goto err;
-	}
-
 	/* Get regulator resource */
 	if (pdata->regulator_pwr_id) {
 		adev->params.regulator_pwr = regulator_get(dev,
-- 
cgit v1.2.3


From 471d0b85a246d6d4a55122f527c5359ef9bd7294 Mon Sep 17 00:00:00 2001
From: Marcus Lorentzon <marcus.xm.lorentzon@stericsson.com>
Date: Fri, 14 Oct 2011 16:47:53 +0200
Subject: ux500: mcde: Remove unnecessary MCDE fbdev update

The first fbdev update in board-xxx-mcde.c is not
needed. Screen will be updated at first fbdev pan.

ST-Ericsson ID: 365249, 361835
ST-Ericsson FOSS-OUT ID: Trivial
ST-Ericsson Linux next: NA

Change-Id: I8055448e9be967530b783734473a32d579ba74fd
Signed-off-by: Marcus Lorentzon <marcus.xm.lorentzon@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/34120
Reviewed-by: QATOOLS
Reviewed-by: Jayarami REDDY <jayarami.reddy@stericsson.com>
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
---
 arch/arm/mach-ux500/board-mop500-mcde.c | 44 ---------------------------------
 arch/arm/mach-ux500/board-u5500-mcde.c  | 44 ---------------------------------
 2 files changed, 88 deletions(-)

diff --git a/arch/arm/mach-ux500/board-mop500-mcde.c b/arch/arm/mach-ux500/board-mop500-mcde.c
index 9611cf87f18..d8d8a647974 100644
--- a/arch/arm/mach-ux500/board-mop500-mcde.c
+++ b/arch/arm/mach-ux500/board-mop500-mcde.c
@@ -548,46 +548,6 @@ static struct notifier_block display_nb = {
 	.notifier_call = display_postregistered_callback,
 };
 
-/*
-* This function is used to refresh the display (lcd, hdmi, tvout) with black
-* when the framebuffer is registered.
-* The main display will not be updated if startup graphics is displayed
-* from u-boot.
-*/
-static int framebuffer_postregistered_callback(struct notifier_block *nb,
-	unsigned long event, void *data)
-{
-	int ret = 0;
-	struct fb_event *event_data = data;
-	struct fb_info *info;
-	struct fb_var_screeninfo var;
-	struct fb_fix_screeninfo fix;
-	struct mcde_fb *mfb;
-
-	if (event != FB_EVENT_FB_REGISTERED)
-		return 0;
-
-	if (!event_data)
-		return 0;
-
-	info = event_data->info;
-	mfb = to_mcde_fb(info);
-	if (mfb->id == 0 && display_initialized_during_boot)
-		goto out;
-
-	var = info->var;
-	fix = info->fix;
-	var.yoffset = var.yoffset ? 0 : var.yres;
-	if (info->fbops->fb_pan_display)
-		ret = info->fbops->fb_pan_display(&var, info);
-out:
-	return ret;
-}
-
-static struct notifier_block framebuffer_nb = {
-	.notifier_call = framebuffer_postregistered_callback,
-};
-
 static void setup_primary_display(void)
 {
 	/* Display reset GPIO is different depending on reference boards */
@@ -610,10 +570,6 @@ int __init init_display_devices(void)
 	if (!cpu_is_u8500())
 		return ret;
 
-	ret = fb_register_client(&framebuffer_nb);
-	if (ret)
-		pr_warning("Failed to register framebuffer notifier\n");
-
 	ret = mcde_dss_register_notifier(&display_nb);
 	if (ret)
 		pr_warning("Failed to register dss notifier\n");
diff --git a/arch/arm/mach-ux500/board-u5500-mcde.c b/arch/arm/mach-ux500/board-u5500-mcde.c
index 4af8ef048f7..a250ba4b110 100644
--- a/arch/arm/mach-ux500/board-u5500-mcde.c
+++ b/arch/arm/mach-ux500/board-u5500-mcde.c
@@ -338,46 +338,6 @@ static struct notifier_block display_nb = {
 	.notifier_call = display_postregistered_callback,
 };
 
-/*
-* This function is used to refresh the display (lcd, hdmi, tvout) with black
-* when the framebuffer is registered.
-* The main display will not be updated if startup graphics is displayed
-* from u-boot.
-*/
-static int framebuffer_postregistered_callback(struct notifier_block *nb,
-	unsigned long event, void *data)
-{
-	int ret = 0;
-	struct fb_event *event_data = data;
-	struct fb_info *info;
-	struct fb_var_screeninfo var;
-	struct fb_fix_screeninfo fix;
-	struct mcde_fb *mfb;
-
-	if (event != FB_EVENT_FB_REGISTERED)
-		return 0;
-
-	if (!event_data)
-		return 0;
-
-	info = event_data->info;
-	mfb = to_mcde_fb(info);
-	if (mfb->id == 0 && display_initialized_during_boot)
-		goto out;
-
-	var = info->var;
-	fix = info->fix;
-	var.yoffset = var.yoffset ? 0 : var.yres;
-	if (info->fbops->fb_pan_display)
-		ret = info->fbops->fb_pan_display(&var, info);
-out:
-	return ret;
-}
-
-static struct notifier_block framebuffer_nb = {
-	.notifier_call = framebuffer_postregistered_callback,
-};
-
 int __init init_u5500_display_devices(void)
 {
 	int ret = 0;
@@ -385,10 +345,6 @@ int __init init_u5500_display_devices(void)
 	if (!cpu_is_u5500())
 		return ret;
 
-	ret = fb_register_client(&framebuffer_nb);
-	if (ret)
-		pr_warning("Failed to register framebuffer notifier\n");
-
 	ret = mcde_dss_register_notifier(&display_nb);
 	if (ret)
 		pr_warning("Failed to register dss notifier\n");
-- 
cgit v1.2.3


From a10fd75c69cf4089b2aa5e24061d5216d15db728 Mon Sep 17 00:00:00 2001
From: Marcus Lorentzon <marcus.xm.lorentzon@stericsson.com>
Date: Tue, 18 Oct 2011 15:18:01 +0200
Subject: ux500: mcde: Remove DPI display device

DPI display device is no longer used or supported

ST-Ericsson ID: 368801
ST-Ericsson FOSS-OUT ID: Trivial
ST-Ericsson Linux next: NA

Change-Id: If32b34580ab01c74a2b8b91961d6f267550f8252
Signed-off-by: Marcus Lorentzon <marcus.xm.lorentzon@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/34406
Reviewed-by: QATOOLS
---
 arch/arm/mach-ux500/Kconfig-arch        |  7 ----
 arch/arm/mach-ux500/board-mop500-mcde.c | 74 ---------------------------------
 2 files changed, 81 deletions(-)

diff --git a/arch/arm/mach-ux500/Kconfig-arch b/arch/arm/mach-ux500/Kconfig-arch
index d00b176301d..f619ace5635 100644
--- a/arch/arm/mach-ux500/Kconfig-arch
+++ b/arch/arm/mach-ux500/Kconfig-arch
@@ -29,13 +29,6 @@ config DISPLAY_GENERIC_DSI_PRIMARY
 	help
 	  Say yes here when using a DSI display
 
-config MCDE_DISPLAY_DPI_PRIMARY
-	bool "DPI display"
-	select MCDE_DISPLAY_DPI
-	depends on MACH_U8500
-	help
-	  Say yes here when using a DPI display
-
 endchoice
 
 choice
diff --git a/arch/arm/mach-ux500/board-mop500-mcde.c b/arch/arm/mach-ux500/board-mop500-mcde.c
index d8d8a647974..45a0002ee6d 100644
--- a/arch/arm/mach-ux500/board-mop500-mcde.c
+++ b/arch/arm/mach-ux500/board-mop500-mcde.c
@@ -173,80 +173,6 @@ static struct mcde_display_device samsung_s6d16d0_display1 = {
 };
 #endif /* CONFIG_DISPLAY_GENERIC_DSI_SECONDARY */
 
-#ifdef CONFIG_MCDE_DISPLAY_DPI_PRIMARY
-static struct mcde_port port0 = {
-	.type = MCDE_PORTTYPE_DPI,
-	.pixel_format = MCDE_PORTPIXFMT_DPI_24BPP,
-	.ifc = 0,
-	.link = 1,		/* DPI channel B can only be on link 1 */
-	.sync_src = MCDE_SYNCSRC_OFF,   /* sync from output formatter  */
-	.update_auto_trig = true,
-	.phy = {
-		.dpi = {
-			.tv_mode = false,
-			.clock_div = 2,
-			.polarity = DPI_ACT_LOW_VSYNC | DPI_ACT_LOW_HSYNC,
-		},
-	},
-};
-
-static struct mcde_display_dpi_platform_data dpi_display0_pdata = {0};
-static struct ux500_pins *dpi_pins;
-
-static int dpi_display_platform_enable(struct mcde_display_device *ddev)
-{
-	int res;
-
-	if (!dpi_pins) {
-		dpi_pins = ux500_pins_get("mcde-dpi");
-		if (!dpi_pins)
-			return -EINVAL;
-	}
-
-	dev_info(&ddev->dev, "%s\n", __func__);
-	res = ux500_pins_enable(dpi_pins);
-	if (res)
-		dev_warn(&ddev->dev, "Failure during %s\n", __func__);
-
-	return res;
-}
-
-static int dpi_display_platform_disable(struct mcde_display_device *ddev)
-{
-	int res;
-
-	dev_info(&ddev->dev, "%s\n", __func__);
-
-	res = ux500_pins_disable(dpi_pins);
-	if (res)
-		dev_warn(&ddev->dev, "Failure during %s\n", __func__);
-
-	return res;
-
-}
-
-static struct mcde_display_device dpi_display0 = {
-	.name = "mcde_display_dpi",
-	.id = 0,
-	.port = &port0,
-	.chnl_id = MCDE_CHNL_B,
-	.fifo = MCDE_FIFO_B,
-#ifdef CONFIG_MCDE_DISPLAY_PRIMARY_16BPP
-	.default_pixel_format = MCDE_OVLYPIXFMT_RGB565,
-#else
-	.default_pixel_format = MCDE_OVLYPIXFMT_RGBA8888,
-#endif
-	.native_x_res = 640,
-	.native_y_res = 480,
-	/* .synchronized_update: Don't care: port is set to update_auto_trig */
-	.dev = {
-		.platform_data = &dpi_display0_pdata,
-	},
-	.platform_enable = dpi_display_platform_enable,
-	.platform_disable = dpi_display_platform_disable,
-};
-#endif /* CONFIG_MCDE_DISPLAY_DPI_PRIMARY */
-
 #ifdef CONFIG_DISPLAY_AB8500_TERTIARY
 static struct mcde_port port_tvout1 = {
 	.type = MCDE_PORTTYPE_DPI,
-- 
cgit v1.2.3


From a402f8eec151af861755cc2b61c549d740c56231 Mon Sep 17 00:00:00 2001
From: Marcus Lorentzon <marcus.xm.lorentzon@stericsson.com>
Date: Tue, 18 Oct 2011 15:35:04 +0200
Subject: ux500: mcde: Remove DSI generic device

Remove DSI generic device from u5500 board
since it's no longer used/supported in that config.

ST-Ericsson ID: 368802
ST-Ericsson FOSS-OUT ID: Trivial
ST-Ericsson Linux next: NA

Change-Id: I7b2ef387e1a4333a06d99b9c90cd6c4ad884bd1c
Signed-off-by: Marcus Lorentzon <marcus.xm.lorentzon@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/34407
Reviewed-by: QATOOLS
---
 arch/arm/mach-ux500/board-u5500-mcde.c | 104 +--------------------------------
 1 file changed, 3 insertions(+), 101 deletions(-)

diff --git a/arch/arm/mach-ux500/board-u5500-mcde.c b/arch/arm/mach-ux500/board-u5500-mcde.c
index a250ba4b110..de1b598ec01 100644
--- a/arch/arm/mach-ux500/board-u5500-mcde.c
+++ b/arch/arm/mach-ux500/board-u5500-mcde.c
@@ -24,8 +24,7 @@
 #define DSI_UNIT_INTERVAL_2	0x5
 
 enum {
-#if defined(CONFIG_DISPLAY_GENERIC_DSI_PRIMARY) || \
-		defined(CONFIG_DISPLAY_SONY_ACX424AKP_DSI_PRIMARY)
+#ifdef CONFIG_DISPLAY_SONY_ACX424AKP_DSI_PRIMARY
 	PRIMARY_DISPLAY_ID,
 #endif
 #ifdef CONFIG_DISPLAY_AV8100_TERTIARY
@@ -77,63 +76,7 @@ static struct mcde_col_transform rgb_2_yCbCr_transform = {
 };
 #endif
 
-#ifdef CONFIG_DISPLAY_GENERIC_DSI_PRIMARY
-static struct mcde_port port0 = {
-	.type = MCDE_PORTTYPE_DSI,
-	.mode = MCDE_PORTMODE_CMD,
-	.pixel_format = MCDE_PORTPIXFMT_DSI_24BPP,
-	.ifc = DSI_VIDEO_MODE,
-	.link = 0,
-	.sync_src = MCDE_SYNCSRC_BTA,
-	.phy = {
-		.dsi = {
-			.virt_id = 0,
-			.num_data_lanes = 2,
-			.ui = DSI_UNIT_INTERVAL_0,
-			.clk_cont = false,
-			.data_lanes_swap = false,
-		},
-	},
-};
-
-struct mcde_display_generic_platform_data generic_display0_pdata = {
-	.reset_gpio = 226,
-	.reset_delay = 10,
-	.sleep_out_delay = 140,
-#ifdef CONFIG_REGULATOR
-	.regulator_id = "v-display",
-	.min_supply_voltage = 2500000, /* 2.5V */
-	.max_supply_voltage = 2700000 /* 2.7V */
-#endif
-};
-
-struct mcde_display_device generic_display0 = {
-	.name = "mcde_disp_generic",
-	.id = PRIMARY_DISPLAY_ID,
-	.port = &port0,
-	.chnl_id = MCDE_CHNL_A,
-	.fifo = MCDE_FIFO_A,
-#ifdef CONFIG_MCDE_DISPLAY_PRIMARY_16BPP
-	.default_pixel_format = MCDE_OVLYPIXFMT_RGB565,
-#else
-	.default_pixel_format = MCDE_OVLYPIXFMT_RGBA8888,
-#endif
-	.native_x_res = 864,
-	.native_y_res = 480,
-#ifdef CONFIG_DISPLAY_GENERIC_DSI_PRIMARY_VSYNC
-	.synchronized_update = true,
-#else
-	.synchronized_update = false,
-#endif
-	/* TODO: Remove rotation buffers once ESRAM driver is completed */
-	.rotbuf1 = U5500_ESRAM_BASE + 0x20000 * 2,
-	.rotbuf2 = U5500_ESRAM_BASE + 0x20000 * 2 + 0x10000,
-	.dev = {
-		.platform_data = &generic_display0_pdata,
-	},
-};
-#endif /* CONFIG_DISPLAY_GENERIC_DSI_PRIMARY */
-
+#ifdef CONFIG_DISPLAY_SONY_ACX424AKP_DSI_PRIMARY
 static struct mcde_port port1 = {
 	.link = 0,
 };
@@ -166,6 +109,7 @@ struct mcde_display_device sony_acx424akp_display0 = {
 		.platform_data = &sony_acx424akp_display0_pdata,
 	},
 };
+#endif /* CONFIG_DISPLAY_SONY_ACX424AKP_DSI_PRIMARY */
 
 #ifdef CONFIG_DISPLAY_AV8100_TERTIARY
 static struct mcde_port port2 = {
@@ -237,15 +181,11 @@ static int display_postregistered_callback(struct notifier_block *nb,
 	u16 width, height;
 	u16 virtual_width, virtual_height;
 	u32 rotate = FB_ROTATE_UR;
-	u32 rotate_angle = 0;
 	struct fb_info *fbi;
 #ifdef CONFIG_DISPDEV
 	struct mcde_fb *mfb;
 #endif
 
-	struct mcde_display_sony_acx424akp_platform_data *pdata =
-					ddev->dev.platform_data;
-
 	if (event != MCDE_DSS_EVENT_DISPLAY_REGISTERED)
 		return 0;
 
@@ -254,33 +194,6 @@ static int display_postregistered_callback(struct notifier_block *nb,
 
 	mcde_dss_get_native_resolution(ddev, &width, &height);
 
-	if (pdata->disp_panel == DISPLAY_SONY_ACX424AKP)
-		rotate_angle = 0;
-	else
-		rotate_angle = \
-			CONFIG_DISPLAY_GENERIC_DSI_PRIMARY_ROTATION_ANGLE;
-
-#if defined(CONFIG_DISPLAY_GENERIC_DSI_PRIMARY) || \
-		defined(CONFIG_DISPLAY_SONY_ACX424AKP_DSI_PRIMARY)
-	if (ddev->id == PRIMARY_DISPLAY_ID) {
-		switch (rotate_angle) {
-		case 0:
-			rotate = FB_ROTATE_UR;
-			break;
-		case 90:
-			rotate = FB_ROTATE_CW;
-			swap(width, height);
-			break;
-		case 180:
-			rotate = FB_ROTATE_UD;
-			break;
-		case 270:
-			rotate = FB_ROTATE_CCW;
-			swap(width, height);
-			break;
-		}
-	}
-#endif
 
 	virtual_width = width;
 	virtual_height = height * 2;
@@ -349,17 +262,6 @@ int __init init_u5500_display_devices(void)
 	if (ret)
 		pr_warning("Failed to register dss notifier\n");
 
-#ifdef CONFIG_DISPLAY_GENERIC_PRIMARY
-	if (cpu_is_u5500v1()) {
-		if (display_initialized_during_boot)
-			generic_display0.power_mode = MCDE_DISPLAY_PM_STANDBY;
-		ret = mcde_display_device_register(&generic_display0);
-		if (ret)
-			pr_warning("Failed to register generic \
-							display device 0\n");
-	}
-#endif
-
 #ifdef CONFIG_DISPLAY_SONY_ACX424AKP_DSI_PRIMARY
 	if (cpu_is_u5500v2()) {
 		if (display_initialized_during_boot)
-- 
cgit v1.2.3


From e8a7d701b4d33a16722eef691e74ed999a8f9fbd Mon Sep 17 00:00:00 2001
From: Marcus Lorentzon <marcus.xm.lorentzon@stericsson.com>
Date: Fri, 21 Oct 2011 12:53:13 +0200
Subject: ux500: mcde: Remove static board configuration

Make device registration more dynamic using mach_is_xxx()
and uib_is_xxx() type of calls instead of having compile
time Kconfig settings. And clean out most unused static
configuration data.

ST-Ericsson ID: 368402
ST-Ericsson FOSS-OUT ID: Trivial
ST-Ericsson Linux next: NA

Change-Id: I37dad7a96017e8f48f77645a4ef417632035651e
Signed-off-by: Marcus Lorentzon <marcus.xm.lorentzon@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/34285
---
 arch/arm/mach-ux500/Kconfig-arch        |  74 ++-------
 arch/arm/mach-ux500/board-mop500-mcde.c | 276 ++++++++++----------------------
 arch/arm/mach-ux500/board-mop500-mcde.h |  24 ---
 arch/arm/mach-ux500/board-u5500-mcde.c  | 131 +++++----------
 4 files changed, 132 insertions(+), 373 deletions(-)
 delete mode 100644 arch/arm/mach-ux500/board-mop500-mcde.h

diff --git a/arch/arm/mach-ux500/Kconfig-arch b/arch/arm/mach-ux500/Kconfig-arch
index f619ace5635..c3e0fa583a1 100644
--- a/arch/arm/mach-ux500/Kconfig-arch
+++ b/arch/arm/mach-ux500/Kconfig-arch
@@ -8,26 +8,21 @@ config U8500_SECURE
 
 if FB_MCDE
 
-menu "Display selection"
-
-config DISPLAY_GENERIC_PRIMARY
-	bool "Generic primary display support"
-	depends on (MACH_U8500 || MACH_U5500)
-	select MCDE_DISPLAY_DSI
-	default y
+menu "Display setup"
 
 choice
-	prompt "Display port type"
-	depends on DISPLAY_GENERIC_PRIMARY
-	default DISPLAY_GENERIC_DSI_PRIMARY
+	prompt "TV output type"
+	default U8500_TV_OUTPUT_AV8100
 	help
-	  Select the kind of display port used for the primary display
+	  Select the source of TV output to use
 
-config DISPLAY_GENERIC_DSI_PRIMARY
-	bool "DSI display"
-	select MCDE_DISPLAY_GENERIC_DSI
-	help
-	  Say yes here when using a DSI display
+config U8500_TV_OUTPUT_AV8100
+	bool "AV8100 (HDMI/CVBS)"
+	depends on MCDE_DISPLAY_AV8100
+
+config U8500_TV_OUTPUT_AB8500
+	bool "AB8500 (CVBS)"
+	depends on MCDE_DISPLAY_AB8500_DENC
 
 endchoice
 
@@ -52,7 +47,6 @@ endchoice
 
 choice DISPLAY_GENERIC_DSI_PRIMARY_ROTATION
 	prompt "Enable main display rotation"
-	depends on DISPLAY_GENERIC_DSI_PRIMARY
 	default DISPLAY_GENERIC_DSI_PRIMARY_ROTATION_90
 	help
 	  Set rotation of main display
@@ -69,7 +63,6 @@ endchoice
 
 config DISPLAY_GENERIC_DSI_PRIMARY_ROTATION_ANGLE
 	int
-	depends on DISPLAY_GENERIC_DSI_PRIMARY
 	default "0" if DISPLAY_GENERIC_DSI_PRIMARY_ROTATION_0
 	default "90" if DISPLAY_GENERIC_DSI_PRIMARY_ROTATION_90
 	default "180" if DISPLAY_GENERIC_DSI_PRIMARY_ROTATION_180
@@ -77,59 +70,16 @@ config DISPLAY_GENERIC_DSI_PRIMARY_ROTATION_ANGLE
 
 config DISPLAY_GENERIC_DSI_PRIMARY_VSYNC
 	bool "Enable v-sync for primary display"
-	depends on DISPLAY_GENERIC_DSI_PRIMARY
 	default n
 	help
 	  Say yes to enable v-sync for primary display
 
-config DISPLAY_SONY_ACX424AKP_DSI_PRIMARY
-	bool "Sony acx424akp DSI display"
-	select MCDE_DISPLAY_SONY_ACX424AKP_DSI
-	select MCDE_DISPLAY_DSI
-	help
-	  Say yes here when using a sony acx424akp DSI display
-
-config DISPLAY_GENERIC_DSI_SECONDARY
-	bool "Sub display support"
-	depends on MACH_U8500
-	select MCDE_DISPLAY_GENERIC_DSI
-	select MCDE_DISPLAY_DSI
-	help
-	  Say yes here if sub display exists
-
-config DISPLAY_GENERIC_DSI_SECONDARY_VSYNC
-	bool "Enable v-sync for secondary display"
-	depends on DISPLAY_GENERIC_DSI_SECONDARY
-	help
-	  Say yes to enable v-sync for secondary display
-
-config DISPLAY_AB8500_TERTIARY
-	bool "AB8500 TVout display support"
-	depends on MACH_U8500 && !AV8100_SDTV
-	select MCDE_DISPLAY_AB8500_DENC
-	help
-	  Say yes here if tv out support
-
-config DISPLAY_AV8100_TERTIARY
-	bool "AV8100 HDMI/CVBS display support"
-	depends on (MACH_U8500 || MACH_U5500)
-	select MCDE_DISPLAY_AV8100
-	select MCDE_DISPLAY_DSI
-	help
-	  Say yes here if HDMI output support
-
 config DISPLAY_AV8100_TRIPPLE_BUFFER
 	bool "Enable tripple buffer for HDMI display"
-	depends on DISPLAY_AV8100_TERTIARY
+	depends on MCDE_DISPLAY_AV8100
 	help
 	  Say yes to enable tripple buffer. You'll get double buffer otherwise
 
-config DISPLAY_FICTIVE
-	bool "DISPLAY fictive"
-	default n
-	---help---
-	  Say Y if you want a fictive display that doesn't access hardware
-
 endmenu
 
 endif
diff --git a/arch/arm/mach-ux500/board-mop500-mcde.c b/arch/arm/mach-ux500/board-mop500-mcde.c
index 45a0002ee6d..ead9dd841c5 100644
--- a/arch/arm/mach-ux500/board-mop500-mcde.c
+++ b/arch/arm/mach-ux500/board-mop500-mcde.c
@@ -6,6 +6,7 @@
  *
  * License terms: GNU General Public License (GPL), version 2.
  */
+
 #include <linux/platform_device.h>
 #include <linux/kernel.h>
 #include <linux/gpio.h>
@@ -30,11 +31,9 @@
 #define DSI_UNIT_INTERVAL_1	0x9
 #define DSI_UNIT_INTERVAL_2	0x5
 
-#ifdef CONFIG_FB_MCDE
-
+#ifdef CONFIG_U8500_TV_OUTPUT_AV8100
 /* The initialization of hdmi disp driver must be delayed in order to
  * ensure that inputclk will be available (needed by hdmi hw) */
-#ifdef CONFIG_DISPLAY_AV8100_TERTIARY
 static struct delayed_work work_dispreg_hdmi;
 #define DISPREG_HDMI_DELAY 6000
 #endif
@@ -47,6 +46,7 @@ enum {
 	AB8500_DISPLAY_ID,
 	MCDE_NR_OF_DISPLAYS
 };
+
 static int display_initialized_during_boot;
 
 static int __init startup_graphics_setup(char *str)
@@ -69,8 +69,8 @@ static int __init startup_graphics_setup(char *str)
 }
 __setup("startup_graphics=", startup_graphics_setup);
 
-#if defined(CONFIG_DISPLAY_AB8500_TERTIARY) ||\
-					defined(CONFIG_DISPLAY_AV8100_TERTIARY)
+#if defined(CONFIG_U8500_TV_OUTPUT_AV8100) || \
+    defined(CONFIG_U8500_TV_OUTPUT_AB8500)
 static struct mcde_col_transform rgb_2_yCbCr_transform = {
 	.matrix = {
 		{0x0042, 0x0081, 0x0019},
@@ -81,18 +81,6 @@ static struct mcde_col_transform rgb_2_yCbCr_transform = {
 };
 #endif
 
-#ifdef CONFIG_DISPLAY_FICTIVE
-static struct mcde_display_device fictive_display = {
-	.name = "mcde_disp_fictive",
-	.id = FICTIVE_DISPLAY_ID,
-	.fictive = true,
-	.default_pixel_format = MCDE_OVLYPIXFMT_RGB565,
-	.native_x_res = 1280,
-	.native_y_res = 720,
-};
-#endif /* CONFIG_DISPLAY_FICTIVE */
-
-#ifdef CONFIG_DISPLAY_GENERIC_DSI_PRIMARY
 static struct mcde_display_dsi_platform_data samsung_s6d16d0_pdata0 = {
 	.link = 0,
 };
@@ -102,11 +90,7 @@ static struct mcde_display_device samsung_s6d16d0_display0 = {
 	.id = PRIMARY_DISPLAY_ID,
 	.chnl_id = MCDE_CHNL_A,
 	.fifo = MCDE_FIFO_A,
-#ifdef CONFIG_MCDE_DISPLAY_PRIMARY_16BPP
-	.default_pixel_format = MCDE_OVLYPIXFMT_RGB565,
-#else
 	.default_pixel_format = MCDE_OVLYPIXFMT_RGBA8888,
-#endif
 #ifdef CONFIG_DISPLAY_GENERIC_DSI_PRIMARY_VSYNC
 	.synchronized_update = true,
 #else
@@ -119,14 +103,12 @@ static struct mcde_display_device samsung_s6d16d0_display0 = {
 		.platform_data = &samsung_s6d16d0_pdata0,
 	},
 };
-#endif /* CONFIG_DISPLAY_GENERIC_DSI_PRIMARY */
 
-#ifdef CONFIG_DISPLAY_SONY_ACX424AKP_DSI_PRIMARY
 static struct mcde_port sony_port0 = {
 	.link = 0,
 };
 
-struct mcde_display_sony_acx424akp_platform_data
+static struct mcde_display_sony_acx424akp_platform_data
 			sony_acx424akp_display0_pdata = {
 	.reset_gpio = HREFV60_DISP2_RST_GPIO,
 };
@@ -136,22 +118,20 @@ static struct mcde_display_device sony_acx424akp_display0 = {
 	.id = PRIMARY_DISPLAY_ID,
 	.port = &sony_port0,
 	.chnl_id = MCDE_CHNL_A,
-	/*
-	 * A large fifo is needed when ddr is clocked down to 25% to not get
-	 * latency problems.
-	 */
 	.fifo = MCDE_FIFO_A,
 	.default_pixel_format = MCDE_OVLYPIXFMT_RGBA8888,
+#ifdef CONFIG_DISPLAY_GENERIC_DSI_PRIMARY_VSYNC
 	.synchronized_update = true,
+#else
+	.synchronized_update = false,
+#endif
 	.rotbuf1 = U8500_ESRAM_BASE + 0x20000 * 4 + 0x2000,
 	.rotbuf2 = U8500_ESRAM_BASE + 0x20000 * 4 + 0x10000,
 	.dev = {
 		.platform_data = &sony_acx424akp_display0_pdata,
 	},
 };
-#endif /* CONFIG_DISPLAY_SONY_ACX424AKP_DSI_PRIMARY */
 
-#ifdef CONFIG_DISPLAY_GENERIC_DSI_SECONDARY
 static struct mcde_display_dsi_platform_data samsung_s6d16d0_pdata1 = {
 	.link = 1,
 };
@@ -162,22 +142,16 @@ static struct mcde_display_device samsung_s6d16d0_display1 = {
 	.chnl_id = MCDE_CHNL_C1,
 	.fifo = MCDE_FIFO_C1,
 	.default_pixel_format = MCDE_OVLYPIXFMT_RGB565,
-#ifdef CONFIG_DISPLAY_GENERIC_DSI_SECONDARY_VSYNC
-	.synchronized_update = true,
-#else
 	.synchronized_update = false,
-#endif
 	.dev = {
 		.platform_data = &samsung_s6d16d0_pdata1,
 	},
 };
-#endif /* CONFIG_DISPLAY_GENERIC_DSI_SECONDARY */
 
-#ifdef CONFIG_DISPLAY_AB8500_TERTIARY
+#ifdef CONFIG_U8500_TV_OUTPUT_AB8500
 static struct mcde_port port_tvout1 = {
 	.type = MCDE_PORTTYPE_DPI,
 	.pixel_format = MCDE_PORTPIXFMT_DPI_24BPP,
-	.ifc = 0,
 	.link = 1,			/* channel B */
 	.sync_src = MCDE_SYNCSRC_OFF,
 	.update_auto_trig = true,
@@ -236,7 +210,7 @@ failed:
 	return res;
 }
 
-struct mcde_display_device tvout_ab8500_display = {
+static struct mcde_display_device tvout_ab8500_display = {
 	.name = "mcde_tv_ab8500",
 	.id = AB8500_DISPLAY_ID,
 	.port = &port_tvout1,
@@ -245,7 +219,6 @@ struct mcde_display_device tvout_ab8500_display = {
 	.default_pixel_format = MCDE_OVLYPIXFMT_RGB565,
 	.native_x_res = 720,
 	.native_y_res = 576,
-	/* .synchronized_update: Don't care: port is set to update_auto_trig */
 	.dev = {
 		.platform_data = &ab8500_display_pdata,
 	},
@@ -258,46 +231,38 @@ struct mcde_display_device tvout_ab8500_display = {
 	.platform_enable = ab8500_platform_enable,
 	.platform_disable = ab8500_platform_disable,
 };
-#endif /* CONFIG_DISPLAY_AB8500_TERTIARY */
+#endif
 
-#ifdef CONFIG_DISPLAY_AV8100_TERTIARY
-static struct mcde_port port2 = {
+#ifdef CONFIG_U8500_TV_OUTPUT_AV8100
+
+#if defined(CONFIG_AV8100_HWTRIG_INT)
+	#define AV8100_SYNC_SRC MCDE_SYNCSRC_TE0
+#elif defined(CONFIG_AV8100_HWTRIG_I2SDAT3)
+	#define AV8100_SYNC_SRC MCDE_SYNCSRC_TE1
+#elif defined(CONFIG_AV8100_HWTRIG_DSI_TE)
+	#define AV8100_SYNC_SRC MCDE_SYNCSRC_TE_POLLING
+#else
+	#define AV8100_SYNC_SRC MCDE_SYNCSRC_OFF
+#endif
+static struct mcde_port av8100_port2 = {
 	.type = MCDE_PORTTYPE_DSI,
 	.mode = MCDE_PORTMODE_CMD,
 	.pixel_format = MCDE_PORTPIXFMT_DSI_24BPP,
 	.ifc = 1,
 	.link = 2,
-#ifdef CONFIG_AV8100_HWTRIG_INT
-	.sync_src = MCDE_SYNCSRC_TE0,
-#endif
-#ifdef CONFIG_AV8100_HWTRIG_I2SDAT3
-	.sync_src = MCDE_SYNCSRC_TE1,
-#endif
-#ifdef CONFIG_AV8100_HWTRIG_DSI_TE
-	.sync_src = MCDE_SYNCSRC_TE_POLLING,
-#endif
-#ifdef CONFIG_AV8100_HWTRIG_NONE
-	.sync_src = MCDE_SYNCSRC_OFF,
-#endif
+	.sync_src = AV8100_SYNC_SRC,
 	.update_auto_trig = true,
 	.phy = {
 		.dsi = {
-			.virt_id = 0,
 			.num_data_lanes = 2,
 			.ui = DSI_UNIT_INTERVAL_2,
-			.clk_cont = false,
-			.data_lanes_swap = false,
 		},
 	},
 	.hdmi_sdtv_switch = HDMI_SWITCH,
 };
 
 static struct mcde_display_hdmi_platform_data av8100_hdmi_pdata = {
-	.reset_gpio = 0,
-	.reset_delay = 1,
-	.regulator_id = NULL, /* TODO: "display_main" */
 	.cvbs_regulator_id = "vcc-N2158",
-	.ddb_id = 1,
 	.rgb_2_yCbCr_transform = &rgb_2_yCbCr_transform,
 };
 
@@ -342,10 +307,10 @@ failed:
 	return res;
 }
 
-struct mcde_display_device av8100_hdmi = {
+static struct mcde_display_device av8100_hdmi = {
 	.name = "av8100_hdmi",
 	.id = AV8100_DISPLAY_ID,
-	.port = &port2,
+	.port = &av8100_port2,
 	.chnl_id = MCDE_CHNL_B,
 	.fifo = MCDE_FIFO_B,
 	.default_pixel_format = MCDE_OVLYPIXFMT_RGB565,
@@ -363,7 +328,7 @@ static void delayed_work_dispreg_hdmi(struct work_struct *ptr)
 	if (mcde_display_device_register(&av8100_hdmi))
 		pr_warning("Failed to register av8100_hdmi\n");
 }
-#endif /* CONFIG_DISPLAY_AV8100_TERTIARY */
+#endif /* CONFIG_U8500_TV_OUTPUT_AV8100 */
 
 /*
 * This function will create the framebuffer for the display that is registered.
@@ -373,9 +338,8 @@ static int display_postregistered_callback(struct notifier_block *nb,
 {
 	struct mcde_display_device *ddev = dev;
 	u16 width, height;
-	u16 virtual_width, virtual_height;
+	u16 virtual_height;
 	u32 rotate = FB_ROTATE_UR;
-	u32 rotate_angle = 0;
 	struct fb_info *fbi;
 #ifdef CONFIG_DISPDEV
 	struct mcde_fb *mfb;
@@ -389,61 +353,33 @@ static int display_postregistered_callback(struct notifier_block *nb,
 
 	mcde_dss_get_native_resolution(ddev, &width, &height);
 
-	if (uib_is_u8500uibr3())
-		rotate_angle = 0;
-	else
-		rotate_angle = \
-			CONFIG_DISPLAY_GENERIC_DSI_PRIMARY_ROTATION_ANGLE;
-
-#if defined(CONFIG_DISPLAY_GENERIC_DSI_PRIMARY) || \
-		defined(CONFIG_DISPLAY_SONY_ACX424AKP_DSI_PRIMARY)
-	if (ddev->id == PRIMARY_DISPLAY_ID) {
-		switch (rotate_angle) {
-		case 0:
-			rotate = FB_ROTATE_UR;
-			break;
-		case 90:
-			rotate = FB_ROTATE_CW;
-			swap(width, height);
-			break;
-		case 180:
-			rotate = FB_ROTATE_UD;
-			break;
-		case 270:
-			rotate = FB_ROTATE_CCW;
-			swap(width, height);
-			break;
-		}
+	if ((uib_is_u8500uib() || uib_is_stuib()) &&
+					ddev->id == PRIMARY_DISPLAY_ID) {
+		rotate = FB_ROTATE_CW;
+		swap(width, height);
 	}
-#endif
 
-	virtual_width = width;
 	virtual_height = height * 2;
 
-#ifdef CONFIG_DISPLAY_AV8100_TERTIARY
 	if (ddev->id == AV8100_DISPLAY_ID) {
+#ifdef CONFIG_DISPLAY_AV8100_TRIPPLE_BUFFER
+		virtual_height = height * 3;
+#endif
 #ifdef CONFIG_MCDE_DISPLAY_HDMI_FB_AUTO_CREATE
 		hdmi_fb_onoff(ddev, 1, 0, 0);
 #endif
-		goto display_postregistered_callback_end;
+		goto out;
 	}
-#endif /* CONFIG_DISPLAY_AV8100_TERTIARY */
 
 	/* Create frame buffer */
-	fbi = mcde_fb_create(ddev,
-		width, height,
-		virtual_width, virtual_height,
-		ddev->default_pixel_format,
-		rotate);
-
+	fbi = mcde_fb_create(ddev, width, height, width, virtual_height,
+					ddev->default_pixel_format, rotate);
 	if (IS_ERR(fbi)) {
 		dev_warn(&ddev->dev,
-			"Failed to create fb for display %s\n",
-					ddev->name);
+			"Failed to create fb for display %s\n", ddev->name);
 		goto display_postregistered_callback_err;
 	} else {
-		dev_info(&ddev->dev, "Framebuffer created (%s)\n",
-					ddev->name);
+		dev_info(&ddev->dev, "Framebuffer created (%s)\n", ddev->name);
 	}
 
 #ifdef CONFIG_DISPDEV
@@ -452,18 +388,14 @@ static int display_postregistered_callback(struct notifier_block *nb,
 	/* Create a dispdev overlay for this display */
 	if (dispdev_create(ddev, true, mfb->ovlys[0]) < 0) {
 		dev_warn(&ddev->dev,
-			"Failed to create disp for display %s\n",
-					ddev->name);
+			"Failed to create disp for display %s\n", ddev->name);
 		goto display_postregistered_callback_err;
 	} else {
-		dev_info(&ddev->dev, "Disp dev created for (%s)\n",
-					ddev->name);
+		dev_info(&ddev->dev, "Disp dev created for (%s)\n", ddev->name);
 	}
 #endif
 
-#ifdef CONFIG_DISPLAY_AV8100_TERTIARY
-display_postregistered_callback_end:
-#endif
+out:
 	return 0;
 
 display_postregistered_callback_err:
@@ -474,102 +406,56 @@ static struct notifier_block display_nb = {
 	.notifier_call = display_postregistered_callback,
 };
 
-static void setup_primary_display(void)
-{
-	/* Display reset GPIO is different depending on reference boards */
-	if (machine_is_hrefv60())
-		samsung_s6d16d0_pdata0.reset_gpio = HREFV60_DISP1_RST_GPIO;
-	else
-		samsung_s6d16d0_pdata0.reset_gpio = MOP500_DISP1_RST_GPIO;
-
-	/* Not all STUIB supports VSYNC, disable vsync for STUIB */
-#ifdef CONFIG_DISPLAY_GENERIC_DSI_PRIMARY
-	if (uib_is_stuib())
-		samsung_s6d16d0_display0.synchronized_update = false;
-#endif
-}
-
-int __init init_display_devices(void)
+static int __init init_display_devices(void)
 {
-	int ret = 0;
-
 	if (!cpu_is_u8500())
-		return ret;
-
-	ret = mcde_dss_register_notifier(&display_nb);
-	if (ret)
-		pr_warning("Failed to register dss notifier\n");
-#ifdef CONFIG_DISPLAY_FICTIVE
-	ret = mcde_display_device_register(&fictive_display);
-	if (ret)
-		pr_warning("Failed to register fictive display device\n");
-#endif
+		return 0;
+
+	(void)mcde_dss_register_notifier(&display_nb);
 
 	/* Set powermode to STANDBY if startup graphics is executed */
-#ifdef CONFIG_DISPLAY_GENERIC_PRIMARY
-	if (display_initialized_during_boot)
+	if (display_initialized_during_boot) {
 		samsung_s6d16d0_display0.power_mode = MCDE_DISPLAY_PM_STANDBY;
-#endif
-#ifdef CONFIG_DISPLAY_SONY_ACX424AKP_DSI_PRIMARY
-	if (display_initialized_during_boot)
 		sony_acx424akp_display0.power_mode = MCDE_DISPLAY_PM_STANDBY;
-#endif
-
-#if defined(CONFIG_DISPLAY_GENERIC_PRIMARY) || \
-	defined(CONFIG_DISPLAY_SONY_ACX424AKP_DSI_PRIMARY)
-	/*
-	 * For reference platforms different panels are used
-	 * depending on UIB
-	 * UIB = User Interface Board
-	 */
-	setup_primary_display();
-
-#ifdef CONFIG_DISPLAY_GENERIC_PRIMARY
-	/* Samsung display for STUIB and U8500UIB */
-	if (uib_is_u8500uib() || uib_is_stuib())
-		ret = mcde_display_device_register(&samsung_s6d16d0_display0);
-#endif
-#ifdef CONFIG_DISPLAY_SONY_ACX424AKP_DSI_PRIMARY
-	/* Sony display on U8500UIBV3 */
-	if (uib_is_u8500uibr3())
-		ret = mcde_display_device_register(&sony_acx424akp_display0);
-#endif
-	if (ret)
-		pr_warning("Failed to register primary display device\n");
-#endif
+	}
 
-#ifdef CONFIG_DISPLAY_GENERIC_DSI_SECONDARY
 	/* Display reset GPIO is different depending on reference boards */
-	if (machine_is_hrefv60())
+	if (machine_is_hrefv60()) {
+		samsung_s6d16d0_pdata0.reset_gpio = HREFV60_DISP1_RST_GPIO;
 		samsung_s6d16d0_pdata1.reset_gpio = HREFV60_DISP2_RST_GPIO;
-	else
+	}
+	else {
+		samsung_s6d16d0_pdata0.reset_gpio = MOP500_DISP1_RST_GPIO;
 		samsung_s6d16d0_pdata1.reset_gpio = MOP500_DISP2_RST_GPIO;
-	ret = mcde_display_device_register(&samsung_s6d16d0_display1);
-	if (ret)
-		pr_warning("Failed to register sub display device\n");
-#endif
+	}
 
-#ifdef CONFIG_DISPLAY_AV8100_TERTIARY
-	/* Snowball dont need this delay at all */
-	if (machine_is_snowball())
-		delayed_work_dispreg_hdmi(NULL);
-	else {
-		INIT_DELAYED_WORK_DEFERRABLE(&work_dispreg_hdmi,
-				delayed_work_dispreg_hdmi);
+	/* Not all STUIBs supports VSYNC, disable vsync for STUIB */
+	if (uib_is_stuib())
+		samsung_s6d16d0_display0.synchronized_update = false;
 
-		schedule_delayed_work(&work_dispreg_hdmi,
-				msecs_to_jiffies(DISPREG_HDMI_DELAY));
-	}
-#endif
-#ifdef CONFIG_DISPLAY_AB8500_TERTIARY
-	ret = mcde_display_device_register(&tvout_ab8500_display);
-	if (ret)
-		pr_warning("Failed to register ab8500 tvout device\n");
+	if (uib_is_u8500uib() || uib_is_stuib())
+		/* Samsung display on U8500 and ST UIB */
+		(void)mcde_display_device_register(&samsung_s6d16d0_display0);
+	else if (uib_is_u8500uibr3())
+		/* Sony display on U8500UIBV3 */
+		(void)mcde_display_device_register(&sony_acx424akp_display0);
+	else
+		WARN_ON("Unknown UI board");
+
+	/* Display reset GPIO is different depending on reference boards */
+	if (uib_is_stuib())
+		(void)mcde_display_device_register(&samsung_s6d16d0_display1);
+
+#if defined(CONFIG_U8500_TV_OUTPUT_AV8100)
+	INIT_DELAYED_WORK_DEFERRABLE(&work_dispreg_hdmi,
+			delayed_work_dispreg_hdmi);
+	schedule_delayed_work(&work_dispreg_hdmi,
+			msecs_to_jiffies(DISPREG_HDMI_DELAY));
+#elif defined(CONFIG_U8500_TV_OUTPUT_AB8500)
+	(void)mcde_display_device_register(&tvout_ab8500_display);
 #endif
 
-	return ret;
+	return 0;
 }
-
 module_init(init_display_devices);
 
-#endif
diff --git a/arch/arm/mach-ux500/board-mop500-mcde.h b/arch/arm/mach-ux500/board-mop500-mcde.h
deleted file mode 100644
index 38094b81b34..00000000000
--- a/arch/arm/mach-ux500/board-mop500-mcde.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/*
- * Copyright (C) ST-Ericsson SA 2011
- *
- * License Terms: GNU General Public License v2
- *
- * Author: Marcel Tunnissen <marcel.tuennissen@stericsson.com> for ST-Ericsson
- *
- * MOP500 board specific initialization for regulators
- */
-
-#ifndef __BOARD_MOP500_MCDE_H
-#define __BOARD_MOP500_MCDE_H
-
-#include <video/mcde_display.h>
-
-#ifdef CONFIG_DISPLAY_AB8500_TERTIARY
-extern struct mcde_display_device tvout_ab8500_display;
-#endif
-
-#ifdef CONFIG_DISPLAY_AV8100_TERTIARY
-extern struct mcde_display_device av8100_hdmi;
-#endif
-
-#endif /* __BOARD_MOP500_MCDE_H */
diff --git a/arch/arm/mach-ux500/board-u5500-mcde.c b/arch/arm/mach-ux500/board-u5500-mcde.c
index de1b598ec01..6f53aaa353f 100644
--- a/arch/arm/mach-ux500/board-u5500-mcde.c
+++ b/arch/arm/mach-ux500/board-u5500-mcde.c
@@ -6,6 +6,7 @@
  *
  * License terms: GNU General Public License (GPL), version 2.
  */
+
 #include <linux/platform_device.h>
 #include <linux/kernel.h>
 #include <linux/gpio.h>
@@ -23,26 +24,17 @@
 #define DSI_UNIT_INTERVAL_0	0xA
 #define DSI_UNIT_INTERVAL_2	0x5
 
+/* The initialization of hdmi disp driver must be delayed in order to
+ * ensure that inputclk will be available (needed by hdmi hw) */
+static struct delayed_work work_dispreg_hdmi;
+#define DISPREG_HDMI_DELAY 6000
+
 enum {
-#ifdef CONFIG_DISPLAY_SONY_ACX424AKP_DSI_PRIMARY
 	PRIMARY_DISPLAY_ID,
-#endif
-#ifdef CONFIG_DISPLAY_AV8100_TERTIARY
 	AV8100_DISPLAY_ID,
-#endif
 	MCDE_NR_OF_DISPLAYS
 };
 
-
-#ifdef CONFIG_FB_MCDE
-
-/* The initialization of hdmi disp driver must be delayed in order to
- * ensure that inputclk will be available (needed by hdmi hw) */
-#ifdef CONFIG_DISPLAY_AV8100_TERTIARY
-static struct delayed_work work_dispreg_hdmi;
-#define DISPREG_HDMI_DELAY 6000
-#endif
-
 static int display_initialized_during_boot;
 
 static int __init startup_graphics_setup(char *str)
@@ -65,7 +57,6 @@ static int __init startup_graphics_setup(char *str)
 }
 __setup("startup_graphics=", startup_graphics_setup);
 
-#ifdef CONFIG_DISPLAY_AV8100_TERTIARY
 static struct mcde_col_transform rgb_2_yCbCr_transform = {
 	.matrix = {
 		{0x0042, 0x0081, 0x0019},
@@ -74,94 +65,76 @@ static struct mcde_col_transform rgb_2_yCbCr_transform = {
 	},
 	.offset = {0x10, 0x80, 0x80},
 };
-#endif
 
-#ifdef CONFIG_DISPLAY_SONY_ACX424AKP_DSI_PRIMARY
-static struct mcde_port port1 = {
+static struct mcde_port sony_port0 = {
 	.link = 0,
 };
 
-struct mcde_display_sony_acx424akp_platform_data \
+static struct mcde_display_sony_acx424akp_platform_data \
 			sony_acx424akp_display0_pdata = {
 	.reset_gpio = 226,
 };
 
-struct mcde_display_device sony_acx424akp_display0 = {
+static struct mcde_display_device sony_acx424akp_display0 = {
 	.name = "mcde_disp_sony_acx424akp",
 	.id = PRIMARY_DISPLAY_ID,
-	.port = &port1,
+	.port = &sony_port0,
 	.chnl_id = MCDE_CHNL_A,
 	.fifo = MCDE_FIFO_A,
-#ifdef CONFIG_MCDE_DISPLAY_PRIMARY_16BPP
-	.default_pixel_format = MCDE_OVLYPIXFMT_RGB565,
-#else
 	.default_pixel_format = MCDE_OVLYPIXFMT_RGBA8888,
-#endif
 #ifdef CONFIG_DISPLAY_GENERIC_DSI_PRIMARY_VSYNC
 	.synchronized_update = true,
 #else
 	.synchronized_update = false,
 #endif
-	/* TODO: Remove rotation buffers once ESRAM driver is completed */
 	.rotbuf1 = U5500_ESRAM_BASE + 0x20000 * 2,
 	.rotbuf2 = U5500_ESRAM_BASE + 0x20000 * 2 + 0x10000,
 	.dev = {
 		.platform_data = &sony_acx424akp_display0_pdata,
 	},
 };
-#endif /* CONFIG_DISPLAY_SONY_ACX424AKP_DSI_PRIMARY */
 
-#ifdef CONFIG_DISPLAY_AV8100_TERTIARY
-static struct mcde_port port2 = {
+#if defined(CONFIG_AV8100_HWTRIG_INT)
+	#define AV8100_SYNC_SRC MCDE_SYNCSRC_TE0
+#elif defined(CONFIG_AV8100_HWTRIG_I2SDAT3)
+	#define AV8100_SYNC_SRC MCDE_SYNCSRC_TE1
+#elif defined(CONFIG_AV8100_HWTRIG_DSI_TE)
+	#define AV8100_SYNC_SRC MCDE_SYNCSRC_TE_POLLING
+#else
+	#define AV8100_SYNC_SRC MCDE_SYNCSRC_OFF
+#endif
+static struct mcde_port av8100_port2 = {
 	.type = MCDE_PORTTYPE_DSI,
 	.mode = MCDE_PORTMODE_CMD,
 	.pixel_format = MCDE_PORTPIXFMT_DSI_24BPP,
-	.ifc = DSI_VIDEO_MODE,
 	.link = 1,
-#ifdef CONFIG_AV8100_HWTRIG_INT
-	.sync_src = MCDE_SYNCSRC_TE0,
-#endif
-#ifdef CONFIG_AV8100_HWTRIG_I2SDAT3
-	.sync_src = MCDE_SYNCSRC_TE1,
-#endif
-#ifdef CONFIG_AV8100_HWTRIG_DSI_TE
-	.sync_src = MCDE_SYNCSRC_TE_POLLING,
-#endif
-#ifdef CONFIG_AV8100_HWTRIG_NONE
-	.sync_src = MCDE_SYNCSRC_OFF,
-#endif
+	.sync_src = AV8100_SYNC_SRC,
 	.update_auto_trig = true,
 	.phy = {
 		.dsi = {
-			.virt_id = 0,
 			.num_data_lanes = 2,
 			.ui = DSI_UNIT_INTERVAL_2,
-			.clk_cont = false,
-			.data_lanes_swap = false,
 		},
 	},
 	.hdmi_sdtv_switch = HDMI_SWITCH,
 };
 
-struct mcde_display_hdmi_platform_data av8100_hdmi_pdata = {
+static struct mcde_display_hdmi_platform_data av8100_hdmi_pdata = {
 	.rgb_2_yCbCr_transform = &rgb_2_yCbCr_transform,
 };
 
 static struct mcde_display_device av8100_hdmi = {
 	.name = "av8100_hdmi",
 	.id = AV8100_DISPLAY_ID,
-	.port = &port2,
+	.port = &av8100_port2,
 	.chnl_id = MCDE_CHNL_B,
 	.fifo = MCDE_FIFO_B,
 	.default_pixel_format = MCDE_OVLYPIXFMT_RGB888,
 	.native_x_res = 1280,
 	.native_y_res = 720,
-	.synchronized_update = false,
 	.dev = {
 		.platform_data = &av8100_hdmi_pdata,
 	},
-	.platform_enable = NULL,
-	.platform_disable = NULL,
 };
 
 static void delayed_work_dispreg_hdmi(struct work_struct *ptr)
@@ -169,7 +142,6 @@ static void delayed_work_dispreg_hdmi(struct work_struct *ptr)
 	if (mcde_display_device_register(&av8100_hdmi))
 		pr_warning("Failed to register av8100_hdmi\n");
 }
-#endif /* CONFIG_DISPLAY_AV8100_TERTIARY */
 
 /*
 * This function will create the framebuffer for the display that is registered.
@@ -179,7 +151,7 @@ static int display_postregistered_callback(struct notifier_block *nb,
 {
 	struct mcde_display_device *ddev = dev;
 	u16 width, height;
-	u16 virtual_width, virtual_height;
+	u16 virtual_height;
 	u32 rotate = FB_ROTATE_UR;
 	struct fb_info *fbi;
 #ifdef CONFIG_DISPDEV
@@ -194,30 +166,21 @@ static int display_postregistered_callback(struct notifier_block *nb,
 
 	mcde_dss_get_native_resolution(ddev, &width, &height);
 
-
-	virtual_width = width;
 	virtual_height = height * 2;
 
+	if (ddev->id == AV8100_DISPLAY_ID) {
 #ifdef CONFIG_DISPLAY_AV8100_TRIPPLE_BUFFER
-	if (ddev->id == AV8100_DISPLAY_ID)
 		virtual_height = height * 3;
 #endif
-#ifdef CONFIG_DISPLAY_AV8100_TERTIARY
-	if (ddev->id == AV8100_DISPLAY_ID) {
 #ifdef CONFIG_MCDE_DISPLAY_HDMI_FB_AUTO_CREATE
 		hdmi_fb_onoff(ddev, 1, 0, 0);
-#endif /* CONFIG_MCDE_DISPLAY_HDMI_FB_AUTO_CREATE */
+#endif
 		goto out;
 	}
-#endif /* CONFIG_DISPLAY_AV8100_TERTIARY */
 
 	/* Create frame buffer */
-	fbi = mcde_fb_create(ddev,
-		width, height,
-		virtual_width, virtual_height,
-		ddev->default_pixel_format,
-		rotate);
-
+	fbi = mcde_fb_create(ddev, width, height, width, virtual_height,
+					ddev->default_pixel_format, rotate);
 	if (IS_ERR(fbi)) {
 		dev_warn(&ddev->dev,
 			"Failed to create fb for display %s\n", ddev->name);
@@ -228,6 +191,7 @@ static int display_postregistered_callback(struct notifier_block *nb,
 
 #ifdef CONFIG_DISPDEV
 	mfb = to_mcde_fb(fbi);
+
 	/* Create a dispdev overlay for this display */
 	if (dispdev_create(ddev, true, mfb->ovlys[0]) < 0) {
 		dev_warn(&ddev->dev,
@@ -238,9 +202,7 @@ static int display_postregistered_callback(struct notifier_block *nb,
 	}
 #endif
 
-#ifdef CONFIG_DISPLAY_AV8100_TERTIARY
 out:
-#endif
 	return 0;
 
 display_postregistered_callback_err:
@@ -253,37 +215,22 @@ static struct notifier_block display_nb = {
 
 int __init init_u5500_display_devices(void)
 {
-	int ret = 0;
-
 	if (!cpu_is_u5500())
-		return ret;
-
-	ret = mcde_dss_register_notifier(&display_nb);
-	if (ret)
-		pr_warning("Failed to register dss notifier\n");
-
-#ifdef CONFIG_DISPLAY_SONY_ACX424AKP_DSI_PRIMARY
-	if (cpu_is_u5500v2()) {
-		if (display_initialized_during_boot)
-			sony_acx424akp_display0.power_mode = \
-						 MCDE_DISPLAY_PM_STANDBY;
-		ret = mcde_display_device_register(&sony_acx424akp_display0);
-		if (ret)
-			pr_warning("Failed to register sony acx424akp \
-							display device 0\n");
-	}
-#endif
+		return 0;
+
+	(void)mcde_dss_register_notifier(&display_nb);
+
+	if (display_initialized_during_boot)
+		sony_acx424akp_display0.power_mode = MCDE_DISPLAY_PM_STANDBY;
+
+	(void)mcde_display_device_register(&sony_acx424akp_display0);
 
-#ifdef CONFIG_DISPLAY_AV8100_TERTIARY
 	INIT_DELAYED_WORK_DEFERRABLE(&work_dispreg_hdmi,
 			delayed_work_dispreg_hdmi);
-
 	schedule_delayed_work(&work_dispreg_hdmi,
 			msecs_to_jiffies(DISPREG_HDMI_DELAY));
-#endif
 
-	return ret;
+	return 0;
 }
+module_init(init_u5500_display_devices);
 
-module_init(init_display_devices);
-#endif
-- 
cgit v1.2.3


From 968075598864c6ce9a2a346042a84e5cac4cdf03 Mon Sep 17 00:00:00 2001
From: Marcus Lorentzon <marcus.xm.lorentzon@stericsson.com>
Date: Tue, 25 Oct 2011 18:10:20 +0200
Subject: video: av8100: Remove fb on/off machine dependency

AV8100 driver is calling into an external function defined
in mach-ux500 making this driver statically machine dependant.
This patch attempt to remove this dependency.

ST-Ericsson ID: 369972
ST-Ericsson FOSS-OUT ID: Trivial
ST-Ericsson Linux next: NA

Change-Id: Iff8943905ea7b1a072feb5d6a42886daed33a6a9
Signed-off-by: Marcus Lorentzon <marcus.xm.lorentzon@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/35243
Reviewed-by: QATOOLS
Reviewed-by: QABUILD
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
---
 drivers/video/mcde/display-av8100.c | 34 ++++++++++++++++++++++++++++------
 include/video/mcde_display-av8100.h |  2 +-
 2 files changed, 29 insertions(+), 7 deletions(-)

diff --git a/drivers/video/mcde/display-av8100.c b/drivers/video/mcde/display-av8100.c
index 3ff73f3e4eb..3c2ec85464a 100644
--- a/drivers/video/mcde/display-av8100.c
+++ b/drivers/video/mcde/display-av8100.c
@@ -18,6 +18,7 @@
 #include <linux/io.h>
 #include <linux/slab.h>
 
+#include <video/mcde_fb.h>
 #include <video/mcde_display.h>
 #include <video/mcde_display-av8100.h>
 #include <video/av8100.h>
@@ -32,6 +33,12 @@
 #define AVI_INFOFRAME_DB1	0x10	/* Active Information present */
 #define AVI_INFOFRAME_DB2	0x08	/* Active Portion Aspect ratio */
 
+#ifdef CONFIG_DISPLAY_AV8100_TRIPPLE_BUFFER
+#define NUM_FB_BUFFERS 3
+#else
+#define NUM_FB_BUFFERS 2
+#endif
+
 struct cea_vesa_video_mode {
 	u32 cea;
 	u32 vesa_cea_nr;
@@ -46,6 +53,8 @@ static int hdmi_set_pixel_format(
 	struct mcde_display_device *ddev, enum mcde_ovly_pix_fmt format);
 static struct mcde_video_mode *video_mode_get(struct mcde_display_device *ddev,
 		u8 cea, u8 vesa_cea_nr);
+static int ceanr_convert(struct mcde_display_device *ddev,
+					u8 cea, u8 vesa_cea_nr, u16 *w, u16 *h);
 
 static ssize_t show_hdmisdtvswitch(struct device *dev,
 		struct device_attribute *attr, char *buf);
@@ -199,7 +208,24 @@ static ssize_t store_disponoff(struct device *dev,
 	vesa_cea_nr = (hex_to_bin(buf[4]) << 4) + hex_to_bin(buf[5]);
 	dev_dbg(dev, "enable:%d cea:%d nr:%d\n", enable, cea, vesa_cea_nr);
 
-	hdmi_fb_onoff(mdev, enable, cea, vesa_cea_nr);
+	if (enable && !mdev->enabled && mdev->fbi == NULL) {
+		struct display_driver_data *driver_data = dev_get_drvdata(dev);
+		u16 w = mdev->native_x_res;
+		u16 h = mdev->native_y_res, vh;
+		int buffering = NUM_FB_BUFFERS;
+		struct fb_info *fbi;
+
+		ceanr_convert(mdev, cea, vesa_cea_nr, &w, &h);
+		vh = h * buffering;
+		fbi = mcde_fb_create(mdev, w, h, w, vh,
+				mdev->default_pixel_format, FB_ROTATE_UR);
+		if (IS_ERR(fbi))
+			dev_warn(dev, "fb create failed\n");
+		else
+			driver_data->fbdevname = dev_name(fbi->dev);
+	} else if (!enable && mdev->enabled) {
+		mcde_fb_destroy(mdev);
+	}
 
 	return count;
 }
@@ -272,8 +298,7 @@ static ssize_t store_stayalive(struct device *dev,
 }
 
 static int ceanr_convert(struct mcde_display_device *ddev,
-		u8 cea, u8 vesa_cea_nr, int buffering,
-		u16 *w, u16 *h, u16 *vw, u16 *vh)
+			u8 cea, u8 vesa_cea_nr, u16 *w, u16 *h)
 {
 	struct mcde_video_mode *video_mode;
 
@@ -282,8 +307,6 @@ static int ceanr_convert(struct mcde_display_device *ddev,
 	if (video_mode) {
 		*w = video_mode->xres;
 		*h = video_mode->yres;
-		*vw = video_mode->xres;
-		*vh = video_mode->yres * buffering;
 		dev_dbg(&ddev->dev, "cea:%d nr:%d found\n",
 				cea, vesa_cea_nr);
 		return 0;
@@ -1430,7 +1453,6 @@ static int __devinit hdmi_probe(struct mcde_display_device *dev)
 	dev->apply_config = hdmi_apply_config;
 	dev->set_pixel_format = hdmi_set_pixel_format;
 	dev->set_power_mode = hdmi_set_power_mode;
-	dev->ceanr_convert = ceanr_convert;
 
 	/* Create sysfs files */
 	if (device_create_file(&dev->dev, &dev_attr_hdmisdtvswitch))
diff --git a/include/video/mcde_display-av8100.h b/include/video/mcde_display-av8100.h
index 52578a675f1..7c13b49e58f 100644
--- a/include/video/mcde_display-av8100.h
+++ b/include/video/mcde_display-av8100.h
@@ -43,7 +43,7 @@ struct display_driver_data {
 	struct regulator *cvbs_regulator;
 	bool cvbs_regulator_enabled;
 	bool update_port_pixel_format;
-	char *fbdevname;
+	const char *fbdevname;
 	struct mcde_video_mode *video_mode;
 };
 
-- 
cgit v1.2.3


From 22bdde68e00014e7a15d56a800848c0a880b9ecb Mon Sep 17 00:00:00 2001
From: Marcus Lorentzon <marcus.xm.lorentzon@stericsson.com>
Date: Tue, 25 Oct 2011 19:12:44 +0200
Subject: mach: ux500: Make fb create code generic

fbdev create use an hmdi specific function. This patch
remove that function and makes fbcreate generic and shared.

ST-Ericsson ID: 369972
ST-Ericsson FOSS-OUT ID: Trivial
ST-Ericsson Linux next: NA

Change-Id: I8a4b148bb6a01cde74fbe7c4fb30e9d7ee77ef68
Signed-off-by: Marcus Lorentzon <marcus.xm.lorentzon@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/35244
Reviewed-by: QATOOLS
Reviewed-by: QABUILD
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
Reviewed-by: Robert MARKLUND <robert.marklund@stericsson.com>
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
---
 arch/arm/mach-ux500/board-mop500-mcde.c | 11 +++--------
 arch/arm/mach-ux500/board-u5500-mcde.c  | 11 +++--------
 2 files changed, 6 insertions(+), 16 deletions(-)

diff --git a/arch/arm/mach-ux500/board-mop500-mcde.c b/arch/arm/mach-ux500/board-mop500-mcde.c
index ead9dd841c5..f65d1f9e319 100644
--- a/arch/arm/mach-ux500/board-mop500-mcde.c
+++ b/arch/arm/mach-ux500/board-mop500-mcde.c
@@ -361,15 +361,10 @@ static int display_postregistered_callback(struct notifier_block *nb,
 
 	virtual_height = height * 2;
 
-	if (ddev->id == AV8100_DISPLAY_ID) {
-#ifdef CONFIG_DISPLAY_AV8100_TRIPPLE_BUFFER
-		virtual_height = height * 3;
-#endif
-#ifdef CONFIG_MCDE_DISPLAY_HDMI_FB_AUTO_CREATE
-		hdmi_fb_onoff(ddev, 1, 0, 0);
-#endif
+#ifndef CONFIG_MCDE_DISPLAY_HDMI_FB_AUTO_CREATE
+	if (ddev->id == AV8100_DISPLAY_ID)
 		goto out;
-	}
+#endif
 
 	/* Create frame buffer */
 	fbi = mcde_fb_create(ddev, width, height, width, virtual_height,
diff --git a/arch/arm/mach-ux500/board-u5500-mcde.c b/arch/arm/mach-ux500/board-u5500-mcde.c
index 6f53aaa353f..5c4ba76055d 100644
--- a/arch/arm/mach-ux500/board-u5500-mcde.c
+++ b/arch/arm/mach-ux500/board-u5500-mcde.c
@@ -168,15 +168,10 @@ static int display_postregistered_callback(struct notifier_block *nb,
 
 	virtual_height = height * 2;
 
-	if (ddev->id == AV8100_DISPLAY_ID) {
-#ifdef CONFIG_DISPLAY_AV8100_TRIPPLE_BUFFER
-		virtual_height = height * 3;
-#endif
-#ifdef CONFIG_MCDE_DISPLAY_HDMI_FB_AUTO_CREATE
-		hdmi_fb_onoff(ddev, 1, 0, 0);
-#endif
+#ifndef CONFIG_MCDE_DISPLAY_HDMI_FB_AUTO_CREATE
+	if (ddev->id == AV8100_DISPLAY_ID)
 		goto out;
-	}
+#endif
 
 	/* Create frame buffer */
 	fbi = mcde_fb_create(ddev, width, height, width, virtual_height,
-- 
cgit v1.2.3


From 327b242535599f8b6b41db91e2d68e43b2515a01 Mon Sep 17 00:00:00 2001
From: Anders Bauer <anders.bauer@stericsson.com>
Date: Wed, 21 Sep 2011 17:05:26 +0200
Subject: video: mcde: use DSI display with one data lane

This patch enables using displays with
one DSI data lane.

ST-Ericsson ID: 359227
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I852c55060c5c4ffa8b50eb6b8dbc3e002d4fe658
Signed-off-by: Anders Bauer <anders.bauer@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/35323
Tested-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Reviewed-by: QATOOLS
Reviewed-by: QABUILD
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
Reviewed-by: Marcus LORENTZON <marcus.xm.lorentzon@stericsson.com>
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
---
 drivers/video/mcde/mcde_hw.c | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index 0e081ed7f0c..7de18aaea30 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -1037,7 +1037,8 @@ static int update_channel_static_registers(struct mcde_chnl_state *chnl)
 			DSI_MCTL_DPHY_TIMEOUT_LPRX_TO_VAL(0x3fff));
 		dsi_wreg(lnk, DSI_MCTL_MAIN_PHY_CTL,
 			DSI_MCTL_MAIN_PHY_CTL_WAIT_BURST_TIME(0xf) |
-			DSI_MCTL_MAIN_PHY_CTL_LANE2_EN(true) |
+			DSI_MCTL_MAIN_PHY_CTL_LANE2_EN(
+				port->phy.dsi.num_data_lanes >= 2) |
 			DSI_MCTL_MAIN_PHY_CTL_CLK_CONTINUOUS(
 				port->phy.dsi.clk_cont));
 		dsi_wreg(lnk, DSI_MCTL_ULPOUT_TIME,
@@ -1057,7 +1058,8 @@ static int update_channel_static_registers(struct mcde_chnl_state *chnl)
 			DSI_MCTL_MAIN_EN_IF2_EN(port->ifc == 1));
 		while (dsi_rfld(lnk, DSI_MCTL_MAIN_STS, CLKLANE_READY) == 0 ||
 			dsi_rfld(lnk, DSI_MCTL_MAIN_STS, DAT1_READY) == 0 ||
-			dsi_rfld(lnk, DSI_MCTL_MAIN_STS, DAT2_READY) == 0) {
+			(dsi_rfld(lnk, DSI_MCTL_MAIN_STS, DAT2_READY) == 0 &&
+					port->phy.dsi.num_data_lanes > 1)) {
 			mdelay(1);
 			if (i++ == 10) {
 				dev_warn(&mcde_dev->dev,
@@ -1077,10 +1079,10 @@ static int update_channel_static_registers(struct mcde_chnl_state *chnl)
 			MCDE_DSIVID0CONF0_DCSVID_NOTGEN(true));
 
 		if (port->mode == MCDE_PORTMODE_CMD) {
-			if (port->ifc == DSI_VIDEO_MODE)
+			if (port->ifc == 0)
 				dsi_wfld(port->link, DSI_CMD_MODE_CTL, IF1_ID,
 					port->phy.dsi.virt_id);
-			else if (port->ifc == DSI_CMD_MODE)
+			else if (port->ifc == 1)
 				dsi_wfld(port->link, DSI_CMD_MODE_CTL, IF2_ID,
 					port->phy.dsi.virt_id);
 		}
-- 
cgit v1.2.3


From 532bdc7382928cb92b22cfcb7cbeeb462d3974ba Mon Sep 17 00:00:00 2001
From: Jörgen Nilsson <jorgen.nilsson@stericsson.com>
Date: Wed, 12 Oct 2011 13:52:32 +0200
Subject: b2r2: Add support for blending on background image
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Instead of blending only on the destination there is now
a possibility to blend on a supplied background using standard
blending flags. The background blending option is enabled through
setting a flag in the request. When background blending is enabled
the destination blending is omitted and the destination buffer is
simply overwritten.

ST-Ericsson Linux next: NA
Depends-On: I85ba9d0006e7480167f72f2a6b5c9d8fff272813,
Ia34f98cfb20e2f0486049e82581dcea28b465ed4,
I5cbeb4525a98a5b9884c3464154182810ee7449b
ST-Ericsson ID: 350337
ST-Ericsson FOSS-OUT ID: Trivial

Introduce non-backward compatible changes to exposed interfaces
Signed-off-by: Jörgen Nilsson <jorgen.nilsson@stericsson.com>

Change-Id: Ifeb8eb66c2fed97c541b09715a17251a81e493ab
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/34023
Tested-by: Jorgen NILSSON <jorgen.nilsson@stericsson.com>
Reviewed-by: Maciej SOCHA <maciej.socha@stericsson.com>
Reviewed-by: Linus WALLEIJ <linus.walleij@stericsson.com>
---
 drivers/video/b2r2/b2r2_blt_main.c         | 184 +++++++++++++++-------
 drivers/video/b2r2/b2r2_input_validation.c |  67 ++++++++
 drivers/video/b2r2/b2r2_internal.h         |   4 +
 drivers/video/b2r2/b2r2_node_split.c       | 238 +++++++++++++++++++++++------
 drivers/video/b2r2/b2r2_utils.c            |   7 +
 drivers/video/b2r2/b2r2_utils.h            |   2 +
 include/video/b2r2_blt.h                   |  21 +++
 7 files changed, 428 insertions(+), 95 deletions(-)

diff --git a/drivers/video/b2r2/b2r2_blt_main.c b/drivers/video/b2r2/b2r2_blt_main.c
index 5d1d58c53cc..51087e4b437 100644
--- a/drivers/video/b2r2/b2r2_blt_main.c
+++ b/drivers/video/b2r2/b2r2_blt_main.c
@@ -480,6 +480,14 @@ static long b2r2_blt_ioctl(struct file *file,
 		/* Fall back to generic path if operation was not supported */
 		if (ret == -ENOSYS) {
 			struct b2r2_blt_request *request_gen;
+
+			if (request->user_req.flags & B2R2_BLT_FLAG_BG_BLEND) {
+				/* No support for BG BLEND in generic implementation yet */
+				b2r2_log_warn("%s: Unsupported: Background blend in b2r2_generic_blt \n",
+					__func__);
+				return ret;
+			}
+
 			b2r2_log_info("b2r2_blt=%d Going generic.\n", ret);
 			request_gen = kmalloc(sizeof(*request_gen), GFP_KERNEL);
 			if (!request_gen) {
@@ -594,7 +602,7 @@ static long b2r2_blt_ioctl(struct file *file,
 		b2r2_log_err(
 			"%s: Unknown cmd %d\n", __func__, cmd);
 		ret = -EINVAL;
-	break;
+		break;
 
 	}
 
@@ -795,6 +803,23 @@ static int b2r2_blt(struct b2r2_blt_instance *instance,
 		request->user_req.src_rect.y,
 		request->user_req.src_rect.width,
 		request->user_req.src_rect.height);
+
+	if (request->user_req.flags & B2R2_BLT_FLAG_BG_BLEND) {
+		b2r2_log_info(
+				"bg.fmt=%#010x bg.buf={%d,%d,%d} "
+				"bg.w,h={%d,%d} bg.rect={%d,%d,%d,%d}\n",
+				request->user_req.bg_img.fmt,
+				request->user_req.bg_img.buf.type,
+				request->user_req.bg_img.buf.fd,
+				request->user_req.bg_img.buf.offset,
+				request->user_req.bg_img.width,
+				request->user_req.bg_img.height,
+				request->user_req.bg_rect.x,
+				request->user_req.bg_rect.y,
+				request->user_req.bg_rect.width,
+				request->user_req.bg_rect.height);
+	}
+
 	b2r2_log_info(
 		"dst.fmt=%#010x dst.buf={%d,%d,%d} "
 		"dst.w,h={%d,%d} dst.rect={%d,%d,%d,%d}\n",
@@ -838,6 +863,19 @@ static int b2r2_blt(struct b2r2_blt_instance *instance,
 		goto resolve_src_buf_failed;
 	}
 
+	/* Background buffer */
+	if (request->user_req.flags & B2R2_BLT_FLAG_BG_BLEND) {
+		ret = resolve_buf(&request->user_req.bg_img,
+				&request->user_req.bg_rect, false, &request->bg_resolved);
+		if (ret < 0) {
+			b2r2_log_warn(
+				"%s: Resolve bg buf failed, %d\n",
+				__func__, ret);
+			ret = -EAGAIN;
+			goto resolve_bg_buf_failed;
+		}
+	}
+
 	/* Source mask buffer */
 	ret = resolve_buf(&request->user_req.src_mask,
 			&request->user_req.src_rect, false,
@@ -872,6 +910,17 @@ static int b2r2_blt(struct b2r2_blt_instance *instance,
 		request->src_resolved.file_virtual_start,
 		request->src_resolved.file_len);
 
+	if (request->user_req.flags & B2R2_BLT_FLAG_BG_BLEND) {
+		b2r2_log_info("bg.rbuf={%X,%p,%d} {%p,%X,%X,%d}\n",
+			request->bg_resolved.physical_address,
+			request->bg_resolved.virtual_address,
+			request->bg_resolved.is_pmem,
+			request->bg_resolved.filep,
+			request->bg_resolved.file_physical_start,
+			request->bg_resolved.file_virtual_start,
+			request->bg_resolved.file_len);
+	}
+
 	b2r2_log_info("dst.rbuf={%X,%p,%d} {%p,%X,%X,%d}\n",
 		request->dst_resolved.physical_address,
 		request->dst_resolved.virtual_address,
@@ -979,6 +1028,20 @@ static int b2r2_blt(struct b2r2_blt_instance *instance,
 			false, /*is_dst*/
 			&request->user_req.src_rect);
 
+	/* Background buffer */
+	if ((request->user_req.flags &
+				B2R2_BLT_FLAG_BG_BLEND) &&
+			!(request->user_req.flags &
+				B2R2_BLT_FLAG_BG_NO_CACHE_FLUSH) &&
+			(request->user_req.bg_img.buf.type !=
+				B2R2_BLT_PTR_PHYSICAL) &&
+			!b2r2_is_mb_fmt(request->user_req.bg_img.fmt))
+				/* MB formats are never touched by SW */
+		sync_buf(&request->user_req.bg_img,
+			&request->bg_resolved,
+			false, /*is_dst*/
+			&request->user_req.bg_rect);
+
 	/* Source mask buffer */
 	if (!(request->user_req.flags &
 				B2R2_BLT_FLAG_SRC_MASK_NO_CACHE_FLUSH) &&
@@ -1080,6 +1143,11 @@ resolve_dst_buf_failed:
 	unresolve_buf(&request->user_req.src_mask.buf,
 		&request->src_mask_resolved);
 resolve_src_mask_buf_failed:
+	if (request->user_req.flags & B2R2_BLT_FLAG_BG_BLEND) {
+		unresolve_buf(&request->user_req.bg_img.buf,
+				&request->bg_resolved);
+	}
+resolve_bg_buf_failed:
 	unresolve_buf(&request->user_req.src_img.buf,
 		&request->src_resolved);
 resolve_src_buf_failed:
@@ -1118,6 +1186,10 @@ static void job_callback(struct b2r2_core_job *job)
 		&request->src_mask_resolved);
 	unresolve_buf(&request->user_req.dst_img.buf,
 		&request->dst_resolved);
+	if (request->user_req.flags & B2R2_BLT_FLAG_BG_BLEND) {
+		unresolve_buf(&request->user_req.bg_img.buf,
+			&request->bg_resolved);
+	}
 
 	/* Move to report list if the job shall be reported */
 	/* FIXME: Use a smaller struct? */
@@ -2333,7 +2405,9 @@ static int resolve_hwmem(struct b2r2_blt_img *img,
 
 	if (resolved_buf->file_len <
 			img->buf.offset + (__u32)b2r2_get_img_size(img)) {
-		b2r2_log_info("%s: Hwmem buffer too small.\n", __func__);
+		b2r2_log_info("%s: Hwmem buffer too small. (%d < %d) \n", __func__,
+				resolved_buf->file_len,
+				img->buf.offset + (__u32)b2r2_get_img_size(img));
 		return_value = -EINVAL;
 		goto size_check_failed;
 	}
@@ -2399,6 +2473,48 @@ static void unresolve_buf(struct b2r2_blt_buf *buf,
 		unresolve_hwmem(resolved);
 }
 
+/**
+ * get_fb_info() - Fill buf with framebuffer info
+ *
+ * @file: The framebuffer file
+ * @buf: Gathered information about the buffer
+ * @img_offset: Image offset info frame buffer
+ *
+ * Returns 0 if OK else negative error code
+ */
+static int get_fb_info(struct file *file,
+		struct b2r2_resolved_buf *buf,
+		__u32 img_offset)
+{
+#ifdef CONFIG_FB
+	if (file && buf &&
+			MAJOR(file->f_dentry->d_inode->i_rdev) == FB_MAJOR) {
+		int i;
+		/*
+		 * (OK to do it like this, no locking???)
+		 */
+		for (i = 0; i < num_registered_fb; i++) {
+			struct fb_info *info = registered_fb[i];
+
+			if (info && info->dev &&
+					MINOR(info->dev->devt) ==
+					MINOR(file->f_dentry->d_inode->i_rdev)) {
+				buf->file_physical_start = info->fix.smem_start;
+				buf->file_virtual_start = (u32)info->screen_base;
+				buf->file_len = info->fix.smem_len;
+				buf->physical_address = buf->file_physical_start +
+						img_offset;
+				buf->virtual_address =
+						(void *) (buf->file_virtual_start +
+						img_offset);
+				return 0;
+			}
+		}
+	}
+#endif
+	return -EINVAL;
+}
+
 /**
  * resolve_buf() - Returns the physical & virtual addresses of a B2R2 blt buffer
  *
@@ -2433,17 +2549,13 @@ static int resolve_buf(struct b2r2_blt_img *img,
 		 * TODO: Do we need to check if the process is allowed to
 		 * read/write (depending on if it's dst or src) to the file?
 		 */
-		struct file *file;
-		int put_needed;
-		int i;
-
 #ifdef CONFIG_ANDROID_PMEM
 		if (!get_pmem_file(
-			img->buf.fd,
-			(unsigned long *) &resolved->file_physical_start,
-			(unsigned long *) &resolved->file_virtual_start,
-			(unsigned long *) &resolved->file_len,
-			&resolved->filep)) {
+				img->buf.fd,
+				(unsigned long *) &resolved->file_physical_start,
+				(unsigned long *) &resolved->file_virtual_start,
+				(unsigned long *) &resolved->file_len,
+				&resolved->filep)) {
 			resolved->physical_address =
 				resolved->file_physical_start +
 				img->buf.offset;
@@ -2454,54 +2566,22 @@ static int resolve_buf(struct b2r2_blt_img *img,
 		} else
 #endif
 		{
-			/* Will be set to 0 if a matching dev is found */
-			ret = -EINVAL;
+			int fput_needed;
+			struct file *file;
 
-			file = fget_light(img->buf.fd, &put_needed);
+			file = fget_light(img->buf.fd, &fput_needed);
 			if (file == NULL)
 				return -EINVAL;
-#ifdef CONFIG_FB
-			if (MAJOR(file->f_dentry->d_inode->i_rdev) ==
-					FB_MAJOR) {
-				/*
-				 * This is a frame buffer device, find fb_info
-				 * (OK to do it like this, no locking???)
-				 */
-
-				for (i = 0; i < num_registered_fb; i++) {
-					struct fb_info *info = registered_fb[i];
-
-					if (info && info->dev &&
-							MINOR(info->dev->devt) ==
-						MINOR(file->f_dentry->
-							d_inode->i_rdev)) {
-						resolved->file_physical_start =
-							info->fix.smem_start;
-						resolved->file_virtual_start =
-							(u32)info->screen_base;
-						resolved->file_len =
-							info->fix.smem_len;
-
-						resolved->physical_address =
-							resolved->file_physical_start +
-							img->buf.offset;
-						resolved->virtual_address =
-						(void *) (resolved->
-							file_virtual_start +
-							img->buf.offset);
-
-						ret = 0;
-						break;
-					}
-				}
-			}
-#endif
 
-			fput_light(file, put_needed);
+			ret = get_fb_info(file, resolved,
+					img->buf.offset);
+			fput_light(file, fput_needed);
+			if (ret < 0)
+				return ret;
 		}
 
 		/* Check bounds */
-		if (ret >= 0 && img->buf.offset + img->buf.len >
+		if (img->buf.offset + img->buf.len >
 				resolved->file_len) {
 			ret = -ESPIPE;
 			unresolve_buf(&img->buf, resolved);
diff --git a/drivers/video/b2r2/b2r2_input_validation.c b/drivers/video/b2r2/b2r2_input_validation.c
index 0de714f1161..602041c9294 100644
--- a/drivers/video/b2r2/b2r2_input_validation.c
+++ b/drivers/video/b2r2/b2r2_input_validation.c
@@ -30,6 +30,7 @@
 
 
 static bool is_valid_format(enum b2r2_blt_fmt fmt);
+static bool is_valid_bg_format(enum b2r2_blt_fmt fmt);
 
 static bool is_valid_pitch_for_fmt(u32 pitch, s32 width,
 		enum b2r2_blt_fmt fmt);
@@ -79,6 +80,26 @@ static bool is_valid_format(enum b2r2_blt_fmt fmt)
 	}
 }
 
+static bool is_valid_bg_format(enum b2r2_blt_fmt fmt)
+{
+	switch (fmt) {
+	case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YVU420_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YVU422_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YUV444_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YVU420_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YVU422_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE:
+	case B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE:
+		return false;
+	default:
+		return true;
+	}
+}
+
 
 static bool is_valid_pitch_for_fmt(u32 pitch, s32 width, enum b2r2_blt_fmt fmt)
 {
@@ -336,6 +357,7 @@ static bool validate_rect(struct b2r2_blt_rect *rect)
 bool b2r2_validate_user_req(struct b2r2_blt_req *req)
 {
 	bool is_src_img_used;
+	bool is_bg_img_used;
 	bool is_src_mask_used;
 	bool is_dst_clip_rect_used;
 
@@ -347,6 +369,7 @@ bool b2r2_validate_user_req(struct b2r2_blt_req *req)
 
 	is_src_img_used = !(req->flags & B2R2_BLT_FLAG_SOURCE_FILL ||
 				req->flags & B2R2_BLT_FLAG_SOURCE_FILL_RAW);
+	is_bg_img_used = (req->flags & B2R2_BLT_FLAG_BG_BLEND);
 	is_src_mask_used = req->flags & B2R2_BLT_FLAG_SOURCE_MASK;
 	is_dst_clip_rect_used = req->flags & B2R2_BLT_FLAG_DESTINATION_CLIP;
 
@@ -364,6 +387,14 @@ bool b2r2_validate_user_req(struct b2r2_blt_req *req)
 		return false;
 	}
 
+	if (is_bg_img_used)	{
+		if (!validate_rect(&req->bg_rect)) {
+			b2r2_log_info("Validation Error: "
+					"!validate_rect(&req->bg_rect)\n");
+			return false;
+		}
+	}
+
 	if (is_dst_clip_rect_used) {
 		if (!validate_rect(&req->dst_clip_rect)) {
 			b2r2_log_info("Validation Error: "
@@ -392,6 +423,32 @@ bool b2r2_validate_user_req(struct b2r2_blt_req *req)
 		}
 	}
 
+	if (is_bg_img_used) {
+		struct b2r2_blt_rect bg_img_bounding_rect;
+
+		if (!validate_img(&req->bg_img)) {
+			b2r2_log_info("Validation Error: "
+					"!validate_img(&req->bg_img)\n");
+			return false;
+		}
+
+		if (!is_valid_bg_format(req->bg_img.fmt)) {
+			b2r2_log_info("Validation Error: "
+					"!is_valid_bg_format(req->bg_img->fmt)\n");
+			return false;
+		}
+
+		b2r2_get_img_bounding_rect(&req->bg_img,
+				&bg_img_bounding_rect);
+		if (!b2r2_is_rect_inside_rect(&req->bg_rect,
+					&bg_img_bounding_rect)) {
+			b2r2_log_info("Validation Error: "
+				"!b2r2_is_rect_inside_rect(&req->bg_rect, "
+				"&bg_img_bounding_rect)\n");
+			return false;
+		}
+	}
+
 	if (is_src_mask_used) {
 		struct b2r2_blt_rect src_mask_bounding_rect;
 
@@ -418,5 +475,15 @@ bool b2r2_validate_user_req(struct b2r2_blt_req *req)
 		return false;
 	}
 
+	if (is_bg_img_used)	{
+		if (!b2r2_is_rect_gte_rect(&req->bg_rect,
+					&req->dst_rect)) {
+			b2r2_log_info("Validation Error: "
+				"!b2r2_is_rect_gte_rect(&req->bg_rect, "
+				"&req->dst_rect)\n");
+			return false;
+		}
+	}
+
 	return true;
 }
diff --git a/drivers/video/b2r2/b2r2_internal.h b/drivers/video/b2r2/b2r2_internal.h
index 18556e7193a..718d1ad40c9 100644
--- a/drivers/video/b2r2/b2r2_internal.h
+++ b/drivers/video/b2r2/b2r2_internal.h
@@ -234,6 +234,7 @@ struct b2r2_node_split_buf {
  * @vert_rescale  - determines if vertical rescale is enabled
  * @vert_sf       - the vertical scale factor
  * @src           - the incoming source buffer
+ * @bg            - the incoming background buffer
  * @dst           - the outgoing destination buffer
  * @work_bufs     - work buffer specifications
  * @tmp_bufs      - temporary buffers
@@ -268,6 +269,7 @@ struct b2r2_node_split_job {
 	u16 v_rsf;
 
 	struct b2r2_node_split_buf src;
+	struct b2r2_node_split_buf bg;
 	struct b2r2_node_split_buf dst;
 
 	struct b2r2_work_buf work_bufs[MAX_TMP_BUFS_NEEDED];
@@ -292,6 +294,7 @@ struct b2r2_node_split_job {
  * @node_split_handle: Handle of the node split
  * @src_resolved: Calculated info about the source buffer
  * @src_mask_resolved: Calculated info about the source mask buffer
+ * @bg_resolved: Calculated info about the background buffer
  * @dst_resolved: Calculated info about the destination buffer
  * @profile: True if the blit shall be profiled, false otherwise
  */
@@ -307,6 +310,7 @@ struct b2r2_blt_request {
 	/* Resolved buffer addresses */
 	struct b2r2_resolved_buf src_resolved;
 	struct b2r2_resolved_buf src_mask_resolved;
+	struct b2r2_resolved_buf bg_resolved;
 	struct b2r2_resolved_buf dst_resolved;
 
 	/* TBD: Info about SRAM usage & needs */
diff --git a/drivers/video/b2r2/b2r2_node_split.c b/drivers/video/b2r2/b2r2_node_split.c
index 556e5f69e07..5faca17c197 100644
--- a/drivers/video/b2r2/b2r2_node_split.c
+++ b/drivers/video/b2r2/b2r2_node_split.c
@@ -179,11 +179,12 @@ static int analyze_scale_factors(struct b2r2_node_split_job *this);
 
 static void configure_src(struct b2r2_node *node,
 		struct b2r2_node_split_buf *src, const u32 *ivmx);
+static void configure_bg(struct b2r2_node *node,
+		struct b2r2_node_split_buf *bg, bool swap_fg_bg);
 static int configure_dst(struct b2r2_node *node,
 		struct b2r2_node_split_buf *dst, const u32 *ivmx,
 		struct b2r2_node **next);
-static void configure_blend(struct b2r2_node *node, u32 flags, u32 global_alpha,
-		bool swap_fg_bg);
+static void configure_blend(struct b2r2_node *node, u32 flags, u32 global_alpha);
 static void configure_clip(struct b2r2_node *node,
 		struct b2r2_blt_rect *clip_rect);
 
@@ -263,6 +264,8 @@ static void set_ivmx(struct b2r2_node *node, const u32 *vmx_values);
 
 static void reset_nodes(struct b2r2_node *node);
 
+static bool bg_format_require_ivmx(enum b2r2_blt_fmt bg_fmt, enum b2r2_blt_fmt dst_fmt);
+
 /*
  * Public functions
  */
@@ -324,6 +327,22 @@ int b2r2_node_split_analyze(const struct b2r2_blt_request *req,
 		break;
 	}
 
+	/* Unsupported formats on bg */
+	if (this->flags & B2R2_BLT_FLAG_BG_BLEND) {
+		/*
+		 * There are no ivmx on source 1, so check that there is no such requirement
+		 * on the background to destination format conversion. This check is sufficient
+		 * since the node splitter currently does not support destination ivmx. That
+		 * fact also removes the source format as a parameter when checking the
+		 * background format.
+		 */
+		if (bg_format_require_ivmx(req->user_req.bg_img.fmt,
+				req->user_req.dst_img.fmt)) {
+			ret = -ENOSYS;
+			goto unsupported;
+		}
+	}
+
 	if ((this->flags & B2R2_BLT_FLAG_SOURCE_COLOR_KEY) &&
 			(is_yuv_fmt(req->user_req.src_img.fmt) ||
 			req->user_req.src_img.fmt == B2R2_BLT_FMT_1_BIT_A1 ||
@@ -361,16 +380,24 @@ int b2r2_node_split_analyze(const struct b2r2_blt_request *req,
 			&req->user_req.src_img, &req->user_req.src_rect,
 			color_fill, req->user_req.src_color);
 
+	if (this->flags & B2R2_BLT_FLAG_BG_BLEND) {
+		set_buf(&this->bg, req->bg_resolved.physical_address,
+				&req->user_req.bg_img, &req->user_req.bg_rect,
+				false, 0);
+	}
+
 	set_buf(&this->dst, req->dst_resolved.physical_address,
 			&req->user_req.dst_img, &req->user_req.dst_rect, false,
 			0);
 
 	b2r2_log_info("%s:\n"
 		"\t\tsrc.rect=(%4d, %4d, %4d, %4d)\t"
+		"bg.rect=(%4d, %4d, %4d, %4d)\t"
 		"dst.rect=(%4d, %4d, %4d, %4d)\n", __func__, this->src.rect.x,
 		this->src.rect.y, this->src.rect.width, this->src.rect.height,
-		this->dst.rect.x, this->dst.rect.y, this->dst.rect.width,
-		this->dst.rect.height);
+		this->bg.rect.x, this->bg.rect.y, this->bg.rect.width,
+		this->bg.rect.height, this->dst.rect.x, this->dst.rect.y,
+		this->dst.rect.width, this->dst.rect.height);
 
 	if (this->flags & B2R2_BLT_FLAG_DITHER)
 		this->dst.dither = B2R2_TTY_RGB_ROUND_DITHER;
@@ -385,6 +412,8 @@ int b2r2_node_split_analyze(const struct b2r2_blt_request *req,
 	else if (this->flags & B2R2_BLT_FLAG_PER_PIXEL_ALPHA_BLEND)
 		this->blend = (color_fill && fmt_has_alpha(this->dst.fmt)) ||
 				fmt_has_alpha(this->src.fmt);
+	else if (this->flags & B2R2_BLT_FLAG_BG_BLEND)
+		this->blend = true;
 
 	if (this->blend && this->src.type == B2R2_FMT_TYPE_PLANAR) {
 		b2r2_log_warn("%s: Unsupported: blend with planar source\n",
@@ -438,6 +467,14 @@ int b2r2_node_split_analyze(const struct b2r2_blt_request *req,
 			goto error;
 	}
 
+	/* Validate the background source */
+	if (this->flags & B2R2_BLT_FLAG_BG_BLEND) {
+		ret = check_rect(&req->user_req.bg_img,
+					&req->user_req.bg_rect, NULL);
+		if (ret < 0)
+			goto error;
+	}
+
 	/* Do the analysis depending on the type of operation */
 	if (color_fill) {
 		ret = analyze_color_fill(this, req, &this->node_count);
@@ -713,6 +750,87 @@ error:
 	return ret;
 }
 
+/**
+ * bg_format_require_ivmx()
+ *
+ * Check if there are any color space conversion needed for the
+ * background to the destination format.
+ */
+static bool bg_format_require_ivmx(enum b2r2_blt_fmt bg_fmt, enum b2r2_blt_fmt dst_fmt)
+{
+	if (is_rgb_fmt(bg_fmt)) {
+		if (is_yvu_fmt(dst_fmt))
+			return true;
+		else if (dst_fmt == B2R2_BLT_FMT_24_BIT_YUV888 ||
+				dst_fmt == B2R2_BLT_FMT_32_BIT_AYUV8888 ||
+				dst_fmt == B2R2_BLT_FMT_24_BIT_VUY888 ||
+				dst_fmt == B2R2_BLT_FMT_32_BIT_VUYA8888)
+			return true;
+		else if (is_yuv_fmt(dst_fmt))
+			return true;
+		else if (is_bgr_fmt(dst_fmt))
+			return true;
+	} else if (is_yvu_fmt(bg_fmt)) {
+		if (is_rgb_fmt(dst_fmt))
+			return true;
+		else if (is_bgr_fmt(dst_fmt))
+			return true;
+		else if (dst_fmt == B2R2_BLT_FMT_24_BIT_YUV888 ||
+				dst_fmt == B2R2_BLT_FMT_32_BIT_AYUV8888 ||
+				dst_fmt == B2R2_BLT_FMT_24_BIT_VUY888 ||
+				dst_fmt == B2R2_BLT_FMT_32_BIT_VUYA8888)
+			return true;
+		else if (is_yuv_fmt(dst_fmt) &&
+				!is_yvu_fmt(dst_fmt))
+			return true;
+	} else if (bg_fmt == B2R2_BLT_FMT_24_BIT_YUV888 ||
+			bg_fmt == B2R2_BLT_FMT_32_BIT_AYUV8888 ||
+			bg_fmt == B2R2_BLT_FMT_24_BIT_VUY888 ||
+			bg_fmt == B2R2_BLT_FMT_32_BIT_VUYA8888) {
+		if (is_rgb_fmt(dst_fmt)) {
+			return true;
+		} else if (is_yvu_fmt(dst_fmt)) {
+			return true;
+		} else if (is_yuv_fmt(dst_fmt)) {
+			switch (dst_fmt) {
+			case B2R2_BLT_FMT_24_BIT_YUV888:
+			case B2R2_BLT_FMT_32_BIT_AYUV8888:
+			case B2R2_BLT_FMT_24_BIT_VUY888:
+			case B2R2_BLT_FMT_32_BIT_VUYA8888:
+				break;
+			default:
+				return true;
+			}
+		}
+	} else if (is_yuv_fmt(bg_fmt)) {
+		if (is_rgb_fmt(dst_fmt))
+			return true;
+		else if (is_bgr_fmt(dst_fmt))
+			return true;
+		else if (dst_fmt == B2R2_BLT_FMT_24_BIT_YUV888 ||
+				dst_fmt == B2R2_BLT_FMT_32_BIT_AYUV8888 ||
+				dst_fmt == B2R2_BLT_FMT_24_BIT_VUY888 ||
+				dst_fmt == B2R2_BLT_FMT_32_BIT_VUYA8888)
+			return true;
+		else if (is_yvu_fmt(dst_fmt))
+			return true;
+	} else if (is_bgr_fmt(bg_fmt)) {
+		if (is_rgb_fmt(dst_fmt))
+			return true;
+		else if (is_yvu_fmt(dst_fmt))
+			return true;
+		else if (dst_fmt == B2R2_BLT_FMT_24_BIT_YUV888 ||
+				dst_fmt == B2R2_BLT_FMT_32_BIT_AYUV8888 ||
+				dst_fmt == B2R2_BLT_FMT_24_BIT_VUY888 ||
+				dst_fmt == B2R2_BLT_FMT_32_BIT_VUYA8888)
+			return true;
+		else if (is_yuv_fmt(dst_fmt))
+			return true;
+	}
+
+	return false;
+}
+
 /**
  * analyze_fmt_conv() - analyze the format conversions needed for a job
  */
@@ -888,7 +1006,7 @@ static int analyze_color_fill(struct b2r2_node_split_job *this,
 			this->global_alpha = (u8)new_global;
 
 			/* Set the pixel alpha to full opaque so we don't get
-			   any nasty suprises */
+			   any nasty surprises */
 			this->src.color = set_alpha(this->src.fmt, 0xFF,
 						this->src.color);
 		}
@@ -1424,9 +1542,11 @@ static int configure_tile(struct b2r2_node_split_job *this,
 	struct b2r2_node *last;
 	struct b2r2_node_split_buf *src = &this->src;
 	struct b2r2_node_split_buf *dst = &this->dst;
+	struct b2r2_node_split_buf *bg = &this->bg;
 
 	struct b2r2_blt_rect dst_norm;
 	struct b2r2_blt_rect src_norm;
+	struct b2r2_blt_rect bg_norm;
 
 	/* Normalize the dest coords to the dest rect coordinate space  */
 	dst_norm.x = dst->win.x - dst->rect.x;
@@ -1462,6 +1582,20 @@ static int configure_tile(struct b2r2_node_split_job *this,
 	src->win.width = src_norm.width;
 	src->win.height = src_norm.height;
 
+	/* Set bg norm */
+	bg_norm.x = dst->win.x - dst->rect.x;
+	bg_norm.y = dst->win.y - dst->rect.y;
+	bg_norm.width = dst->win.width;
+	bg_norm.height = dst->win.height;
+
+	/* Convert to bg coordinate space */
+	bg->win.x = bg_norm.x + bg->rect.x;
+	bg->win.y = bg_norm.y + bg->rect.y;
+	bg->win.width = bg_norm.width;
+	bg->win.height = bg_norm.height;
+	bg->vso = dst->vso;
+	bg->hso = dst->hso;
+
 	/* Do the configuration depending on operation type */
 	switch (this->type) {
 	case B2R2_DIRECT_FILL:
@@ -1545,10 +1679,14 @@ static int configure_tile(struct b2r2_node_split_job *this,
 				goto error;
 			}
 
-			if (this->blend)
+			if (this->blend) {
+				if (this->flags & B2R2_BLT_FLAG_BG_BLEND)
+					configure_bg(node, bg, this->swap_fg_bg);
+				else
+					configure_bg(node, dst, this->swap_fg_bg);
 				configure_blend(node, this->flags,
-						this->global_alpha,
-						this->swap_fg_bg);
+						this->global_alpha);
+			}
 			if (this->clip)
 				configure_clip(node, &this->clip_rect);
 
@@ -2366,6 +2504,51 @@ static void configure_src(struct b2r2_node *node,
 		set_ivmx(node, ivmx);
 }
 
+/**
+ * configure_bg() - configures a background for the given node
+ *
+ * @node         - the node to configure
+ * @bg           - the background buffer
+ * @swap_fg_bg   - if true, fg will be on s1 instead of s2
+ *
+ * This operation will not consume any nodes.
+ *
+ * NOTE: This method should be called _AFTER_ the destination has been
+ *       configured.
+ *
+ * WARNING: Take care when using this with semi-planar or planar sources since
+ *          either S1 or S2 will be overwritten!
+ */
+static void configure_bg(struct b2r2_node *node,
+		struct b2r2_node_split_buf *bg, bool swap_fg_bg)
+{
+	b2r2_log_info("%s: bg.win=(%d, %d, %d, %d)\n", __func__,
+			bg->win.x, bg->win.y, bg->win.width,
+			bg->win.height);
+
+	/* Configure S1 */
+	switch (bg->type) {
+	case B2R2_FMT_TYPE_RASTER:
+		if (swap_fg_bg) {
+			node->node.GROUP0.B2R2_CIC |= B2R2_CIC_SOURCE_2;
+			node->node.GROUP0.B2R2_INS |= B2R2_INS_SOURCE_2_FETCH_FROM_MEM;
+			node->node.GROUP0.B2R2_ACK |= B2R2_ACK_SWAP_FG_BG;
+
+			set_src(&node->node.GROUP4, bg->addr, bg);
+		} else {
+			node->node.GROUP0.B2R2_CIC |= B2R2_CIC_SOURCE_1;
+			node->node.GROUP0.B2R2_INS |= B2R2_INS_SOURCE_1_FETCH_FROM_MEM;
+
+			set_src(&node->node.GROUP3, bg->addr, bg);
+		}
+		break;
+	default:
+		/* Should never, ever happen */
+		BUG_ON(1);
+		break;
+	}
+}
+
 /**
  * configure_dst() - configures the destination registers of the given node
  *
@@ -2513,7 +2696,6 @@ error:
  * @node         - the node to configure
  * @flags        - the flags passed in the blt_request
  * @global_alpha - the global alpha to use (if enabled in flags)
- * @swap_fg_bg   - if true, fg will be on s1 instead of s2
  *
  * This operation will not consume any nodes.
  *
@@ -2523,8 +2705,7 @@ error:
  * WARNING: Take care when using this with semi-planar or planar sources since
  *          either S1 or S2 will be overwritten!
  */
-static void configure_blend(struct b2r2_node *node, u32 flags, u32 global_alpha,
-		bool swap_fg_bg)
+static void configure_blend(struct b2r2_node *node, u32 flags, u32 global_alpha)
 {
 	node->node.GROUP0.B2R2_ACK &= ~(B2R2_ACK_MODE_BYPASS_S2_S3);
 
@@ -2534,9 +2715,8 @@ static void configure_blend(struct b2r2_node *node, u32 flags, u32 global_alpha,
 	else
 		node->node.GROUP0.B2R2_ACK |= B2R2_ACK_MODE_BLEND_PREMULT;
 
-
 	/* Check if global alpha blend should be enabled */
-	if ((flags & B2R2_BLT_FLAG_GLOBAL_ALPHA_BLEND) != 0) {
+	if (flags & B2R2_BLT_FLAG_GLOBAL_ALPHA_BLEND) {
 
 		/* B2R2 expects the global alpha to be in 0...128 range */
 		global_alpha = (global_alpha*128)/255;
@@ -2547,34 +2727,6 @@ static void configure_blend(struct b2r2_node *node, u32 flags, u32 global_alpha,
 		node->node.GROUP0.B2R2_ACK |=
 			(128 << B2R2_ACK_GALPHA_ROPID_SHIFT);
 	}
-
-	/* Copy the destination config to the appropriate source and clear any
-	   clashing flags */
-	if (swap_fg_bg) {
-		/* S1 will be foreground, S2 background */
-		node->node.GROUP0.B2R2_CIC |= B2R2_CIC_SOURCE_2;
-		node->node.GROUP0.B2R2_INS |= B2R2_INS_SOURCE_2_FETCH_FROM_MEM;
-		node->node.GROUP0.B2R2_ACK |= B2R2_ACK_SWAP_FG_BG;
-
-		node->node.GROUP4.B2R2_SBA = node->node.GROUP1.B2R2_TBA;
-		node->node.GROUP4.B2R2_STY = node->node.GROUP1.B2R2_TTY;
-		node->node.GROUP4.B2R2_SXY = node->node.GROUP1.B2R2_TXY;
-		node->node.GROUP4.B2R2_SSZ = node->node.GROUP1.B2R2_TSZ;
-
-		node->node.GROUP4.B2R2_STY &= ~(B2R2_S2TY_A1_SUBST_KEY_MODE |
-				B2R2_S2TY_CHROMA_LEFT_EXT_AVERAGE);
-	} else {
-		/* S1 will be background, S2 foreground */
-		node->node.GROUP0.B2R2_CIC |= B2R2_CIC_SOURCE_1;
-		node->node.GROUP0.B2R2_INS |= B2R2_INS_SOURCE_1_FETCH_FROM_MEM;
-
-		node->node.GROUP3.B2R2_SBA = node->node.GROUP1.B2R2_TBA;
-		node->node.GROUP3.B2R2_STY |= node->node.GROUP1.B2R2_TTY;
-		node->node.GROUP3.B2R2_SXY = node->node.GROUP1.B2R2_TXY;
-
-		node->node.GROUP3.B2R2_STY &= ~(B2R2_S1TY_A1_SUBST_KEY_MODE);
-
-	}
 }
 
 /**
@@ -3060,13 +3212,13 @@ static int fmt_byte_pitch(enum b2r2_blt_fmt fmt, u32 width)
 
 	case B2R2_BLT_FMT_24_BIT_RGB888:   /* Fall through */
 	case B2R2_BLT_FMT_24_BIT_ARGB8565: /* Fall through */
-	case B2R2_BLT_FMT_24_BIT_YUV888:
+	case B2R2_BLT_FMT_24_BIT_YUV888:   /* Fall through */
 	case B2R2_BLT_FMT_24_BIT_VUY888:
 		return width * 3;
 
 	case B2R2_BLT_FMT_32_BIT_ARGB8888: /* Fall through */
 	case B2R2_BLT_FMT_32_BIT_ABGR8888: /* Fall through */
-	case B2R2_BLT_FMT_32_BIT_AYUV8888:
+	case B2R2_BLT_FMT_32_BIT_AYUV8888: /* Fall through */
 	case B2R2_BLT_FMT_32_BIT_VUYA8888:
 		return width << 2;
 
diff --git a/drivers/video/b2r2/b2r2_utils.c b/drivers/video/b2r2/b2r2_utils.c
index ad0e7a42fa1..8bb61afdd41 100644
--- a/drivers/video/b2r2/b2r2_utils.c
+++ b/drivers/video/b2r2/b2r2_utils.c
@@ -45,6 +45,13 @@ bool b2r2_is_rect_inside_rect(struct b2r2_blt_rect *rect1,
 		rect1->y + rect1->height <= rect2->y + rect2->height;
 }
 
+bool b2r2_is_rect_gte_rect(struct b2r2_blt_rect *rect1,
+		struct b2r2_blt_rect *rect2)
+{
+	return rect1->width >= rect2->width &&
+			rect1->height >= rect2->height;
+}
+
 void b2r2_intersect_rects(struct b2r2_blt_rect *rect1,
 	struct b2r2_blt_rect *rect2, struct b2r2_blt_rect *intersection)
 {
diff --git a/drivers/video/b2r2/b2r2_utils.h b/drivers/video/b2r2/b2r2_utils.h
index 745d71c0126..5db7868e255 100644
--- a/drivers/video/b2r2/b2r2_utils.h
+++ b/drivers/video/b2r2/b2r2_utils.h
@@ -21,6 +21,8 @@ void b2r2_get_img_bounding_rect(struct b2r2_blt_img *img,
 bool b2r2_is_zero_area_rect(struct b2r2_blt_rect *rect);
 bool b2r2_is_rect_inside_rect(struct b2r2_blt_rect *rect1,
 		struct b2r2_blt_rect *rect2);
+bool b2r2_is_rect_gte_rect(struct b2r2_blt_rect *rect1,
+		struct b2r2_blt_rect *rect2);
 void b2r2_intersect_rects(struct b2r2_blt_rect *rect1,
 		struct b2r2_blt_rect *rect2, struct b2r2_blt_rect *intersection);
 
diff --git a/include/video/b2r2_blt.h b/include/video/b2r2_blt.h
index a992155f0da..26748d4f212 100644
--- a/include/video/b2r2_blt.h
+++ b/include/video/b2r2_blt.h
@@ -302,6 +302,21 @@ enum b2r2_blt_transform {
  *    Enable destination clip rectangle
  * @B2R2_BLT_FLAG_INHERIT_PRIO
  *    Inherit process priority
+ * @B2R2_BLT_FLAG_SRC_NO_CACHE_FLUSH
+ *    Skip cache flush of source image buffer
+ * @B2R2_BLT_FLAG_SRC_MASK_NO_CACHE_FLUSH
+ *    Skip cache flush of source mask buffer
+ * @B2R2_BLT_FLAG_DST_NO_CACHE_FLUSH
+ *    Skip cache flush of destination image buffer
+ * @B2R2_BLT_FLAG_BG_BLEND
+ *    Indicate that a background buffer is supplied
+ *    to the blit operation. B2R2_BLT_FLAG_PER_PIXEL_ALPHA_BLEND,
+ *    B2R2_BLT_FLAG_SRC_IS_NOT_PREMULT, and
+ *    B2R2_BLT_FLAG_GLOBAL_ALPHA_BLEND will control the blend operation.
+ *    The destination blending is in this case disabled and the destination
+ *    buffer will be overwritten with the source and background blend result.
+ * @B2R2_BLT_FLAG_BG_NO_CACHE_FLUSH
+ *    Skip cache flush of background image buffer
  * @B2R2_BLT_FLAG_REPORT_WHEN_DONE
  *    Report through b2r2_blt file when done. A b2r2_blt_report structure is
  *    read. Use poll() or select() if anything to read. (i.e. to help user space
@@ -355,6 +370,8 @@ enum b2r2_blt_flag {
 	B2R2_BLT_FLAG_SRC_NO_CACHE_FLUSH    = BIT(14),/*0x4000*/
 	B2R2_BLT_FLAG_SRC_MASK_NO_CACHE_FLUSH = BIT(15),/*0x8000*/
 	B2R2_BLT_FLAG_DST_NO_CACHE_FLUSH    = BIT(16),/*0x10000*/
+	B2R2_BLT_FLAG_BG_BLEND              = BIT(17),/*0x20000*/
+	B2R2_BLT_FLAG_BG_NO_CACHE_FLUSH     = BIT(18),/*0x40000*/
 	B2R2_BLT_FLAG_REPORT_WHEN_DONE      = BIT(29),/*0x20000000*/
 	B2R2_BLT_FLAG_REPORT_PERFORMANCE    = BIT(30),/*0x40000000*/
 	B2R2_BLT_FLAG_CLUT_COLOR_CORRECTION = BIT(31),/*0x80000000*/
@@ -375,6 +392,8 @@ enum b2r2_blt_flag {
  * @src_mask: Source mask. Not used if source fill.
  * @src_rect: Source area to be blitted.
  * @src_color: Source fill color or color key
+ * @bg_img: Background image.
+ * @bg_rect: Background area to blend with.
  * @dst_img: Destination image.
  * @dst_rect: Destination area to be blitted to.
  * @dst_color: Destination color key
@@ -396,6 +415,8 @@ struct b2r2_blt_req {
 	struct b2r2_blt_img       src_mask;
 	struct b2r2_blt_rect      src_rect;
 	__u32                     src_color;
+	struct b2r2_blt_img       bg_img;
+	struct b2r2_blt_rect      bg_rect;
 	struct b2r2_blt_img       dst_img;
 	struct b2r2_blt_rect      dst_rect;
 	struct b2r2_blt_rect      dst_clip_rect;
-- 
cgit v1.2.3


From f3fa23f7e79cc7e8cd04405bd82802579af14474 Mon Sep 17 00:00:00 2001
From: Jimmy Rubin <jimmy.rubin@stericsson.com>
Date: Wed, 26 Oct 2011 13:07:27 +0200
Subject: video: mcde: Add host_eot_gen property

Some DSI displays requires a EOT packet after a transfer in HS.
This is optional in the MIPI standard and dependant on the display IC
if it should be used or not.

ST-Ericsson ID: 367923
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: Ia7f8d37cd0ab80847a6098489790d133dbcccb64
Signed-off-by: Jimmy Rubin <jimmy.rubin@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/35324
Reviewed-by: Marcus LORENTZON <marcus.xm.lorentzon@stericsson.com>
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
---
 drivers/video/mcde/display-av8100.c             | 2 ++
 drivers/video/mcde/display-samsung_s6d16d0.c    | 1 +
 drivers/video/mcde/display-sony_acx424akp_dsi.c | 1 +
 drivers/video/mcde/mcde_hw.c                    | 4 +++-
 include/video/mcde.h                            | 1 +
 5 files changed, 8 insertions(+), 1 deletion(-)

diff --git a/drivers/video/mcde/display-av8100.c b/drivers/video/mcde/display-av8100.c
index 3c2ec85464a..b99fda2f34c 100644
--- a/drivers/video/mcde/display-av8100.c
+++ b/drivers/video/mcde/display-av8100.c
@@ -1454,6 +1454,8 @@ static int __devinit hdmi_probe(struct mcde_display_device *dev)
 	dev->set_pixel_format = hdmi_set_pixel_format;
 	dev->set_power_mode = hdmi_set_power_mode;
 
+	dev->port->phy.dsi.host_eot_gen = true;
+
 	/* Create sysfs files */
 	if (device_create_file(&dev->dev, &dev_attr_hdmisdtvswitch))
 		dev_info(&dev->dev,
diff --git a/drivers/video/mcde/display-samsung_s6d16d0.c b/drivers/video/mcde/display-samsung_s6d16d0.c
index 063c8996763..09c9e817e7f 100644
--- a/drivers/video/mcde/display-samsung_s6d16d0.c
+++ b/drivers/video/mcde/display-samsung_s6d16d0.c
@@ -162,6 +162,7 @@ static int __devinit samsung_s6d16d0_probe(struct mcde_display_device *ddev)
 	di->port.pixel_format = MCDE_PORTPIXFMT_DSI_24BPP;
 	di->port.sync_src = MCDE_SYNCSRC_BTA;
 	di->port.phy.dsi.num_data_lanes = 2;
+	di->port.phy.dsi.host_eot_gen = true;
 	/* TODO: Move UI to mcde_hw.c when clk_get_rate(dsi) is done */
 	di->port.phy.dsi.ui = 9;
 
diff --git a/drivers/video/mcde/display-sony_acx424akp_dsi.c b/drivers/video/mcde/display-sony_acx424akp_dsi.c
index 0b5b69bf23e..7c4f69a0cae 100644
--- a/drivers/video/mcde/display-sony_acx424akp_dsi.c
+++ b/drivers/video/mcde/display-sony_acx424akp_dsi.c
@@ -252,6 +252,7 @@ static int __devinit sony_acx424akp_probe(struct mcde_display_device *dev)
 	di->port.sync_src = MCDE_SYNCSRC_BTA;
 	di->port.phy.dsi.num_data_lanes = 2;
 	di->port.link = port->link;
+	di->port.phy.dsi.host_eot_gen = true;
 	/* TODO: Move UI to mcde_hw.c when clk_get_rate(dsi) is done */
 	di->port.phy.dsi.ui = 9;
 
diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index 7de18aaea30..d47d1fddaad 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -1024,6 +1024,9 @@ static int update_channel_static_registers(struct mcde_chnl_state *chnl)
 			dsi_wfld(lnk, DSI_MCTL_MAIN_DATA_CTL, REG_TE_EN, true);
 		}
 
+		dsi_wfld(lnk, DSI_MCTL_MAIN_DATA_CTL, HOST_EOT_GEN,
+						port->phy.dsi.host_eot_gen);
+
 		dsi_wfld(lnk, DSI_MCTL_MAIN_DATA_CTL, DLX_REMAP_EN,
 					port->phy.dsi.data_lanes_swap);
 
@@ -2086,7 +2089,6 @@ static void dsi_te_poll_req(struct mcde_chnl_state *chnl)
 		dsi_wfld(lnk, DSI_MCTL_MAIN_DATA_CTL, IF2_TE_EN, true);
 	dsi_wfld(lnk, DSI_MCTL_MAIN_DATA_CTL, BTA_EN, true);
 	dsi_wfld(lnk, DSI_MCTL_MAIN_DATA_CTL, READ_EN, true);
-	dsi_wfld(lnk, DSI_MCTL_MAIN_DATA_CTL, HOST_EOT_GEN, true);
 	dsi_wfld(lnk, DSI_CMD_MODE_CTL, TE_TIMEOUT, 0x3FF);
 	dsi_wfld(lnk, DSI_MCTL_MAIN_DATA_CTL, TE_POLLING_EN, true);
 }
diff --git a/include/video/mcde.h b/include/video/mcde.h
index 2a64be62ac9..6b5508e3ddd 100644
--- a/include/video/mcde.h
+++ b/include/video/mcde.h
@@ -115,6 +115,7 @@ struct mcde_port {
 			u8 num_data_lanes;
 			u8 ui;
 			bool clk_cont;
+			bool host_eot_gen;
 
 			/* DSI data lanes are swapped if true */
 			bool data_lanes_swap;
-- 
cgit v1.2.3


From 8cdc58e2f88ead824200dff9dc3ed0be34c2a7fb Mon Sep 17 00:00:00 2001
From: Maciej Socha <maciej.socha@stericsson.com>
Date: Mon, 31 Oct 2011 15:18:34 +0100
Subject: b2r2: Correct scaling to multi-buffer format

A scaling operation from raster to a multi-buffer
format, requires the raster input to be scaled
before luminance information can be extracted.
Raster input is scaled by the chroma resizer.
Luma resizer only handles luminance data which
exists in a separate buffer in source image,
as is the case with YUV planar/semi-planar formats.

ST-Ericsson ID: 371067
ST-Ericsson Linux next: N/A
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I1bcdd4ead2b6e06bfa62f330d35a177e2890956e
Signed-off-by: Maciej Socha <maciej.socha@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/35958
Reviewed-by: QATOOLS
Reviewed-by: Robert LIND <robert.lind@stericsson.com>
Reviewed-by: Jorgen NILSSON <jorgen.nilsson@stericsson.com>
Reviewed-by: QABUILD
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
---
 drivers/video/b2r2/b2r2_node_split.c | 60 ++++++++++++++++++++++++++++--------
 1 file changed, 47 insertions(+), 13 deletions(-)

diff --git a/drivers/video/b2r2/b2r2_node_split.c b/drivers/video/b2r2/b2r2_node_split.c
index 5faca17c197..6de6db3cb37 100644
--- a/drivers/video/b2r2/b2r2_node_split.c
+++ b/drivers/video/b2r2/b2r2_node_split.c
@@ -184,7 +184,8 @@ static void configure_bg(struct b2r2_node *node,
 static int configure_dst(struct b2r2_node *node,
 		struct b2r2_node_split_buf *dst, const u32 *ivmx,
 		struct b2r2_node **next);
-static void configure_blend(struct b2r2_node *node, u32 flags, u32 global_alpha);
+static void configure_blend(struct b2r2_node *node, u32 flags,
+		u32 global_alpha);
 static void configure_clip(struct b2r2_node *node,
 		struct b2r2_blt_rect *clip_rect);
 
@@ -264,7 +265,8 @@ static void set_ivmx(struct b2r2_node *node, const u32 *vmx_values);
 
 static void reset_nodes(struct b2r2_node *node);
 
-static bool bg_format_require_ivmx(enum b2r2_blt_fmt bg_fmt, enum b2r2_blt_fmt dst_fmt);
+static bool bg_format_require_ivmx(enum b2r2_blt_fmt bg_fmt,
+		enum b2r2_blt_fmt dst_fmt);
 
 /*
  * Public functions
@@ -330,10 +332,12 @@ int b2r2_node_split_analyze(const struct b2r2_blt_request *req,
 	/* Unsupported formats on bg */
 	if (this->flags & B2R2_BLT_FLAG_BG_BLEND) {
 		/*
-		 * There are no ivmx on source 1, so check that there is no such requirement
-		 * on the background to destination format conversion. This check is sufficient
-		 * since the node splitter currently does not support destination ivmx. That
-		 * fact also removes the source format as a parameter when checking the
+		 * There are no ivmx on source 1, so check that
+		 * there is no such requirement on the background
+		 * to destination format conversion. This check is sufficient
+		 * since the node splitter currently does not support
+		 * destination ivmx. That fact also removes
+		 * the source format as a parameter when checking the
 		 * background format.
 		 */
 		if (bg_format_require_ivmx(req->user_req.bg_img.fmt,
@@ -756,7 +760,8 @@ error:
  * Check if there are any color space conversion needed for the
  * background to the destination format.
  */
-static bool bg_format_require_ivmx(enum b2r2_blt_fmt bg_fmt, enum b2r2_blt_fmt dst_fmt)
+static bool bg_format_require_ivmx(enum b2r2_blt_fmt bg_fmt,
+				enum b2r2_blt_fmt dst_fmt)
 {
 	if (is_rgb_fmt(bg_fmt)) {
 		if (is_yvu_fmt(dst_fmt))
@@ -1680,10 +1685,13 @@ static int configure_tile(struct b2r2_node_split_job *this,
 			}
 
 			if (this->blend) {
-				if (this->flags & B2R2_BLT_FLAG_BG_BLEND)
-					configure_bg(node, bg, this->swap_fg_bg);
-				else
-					configure_bg(node, dst, this->swap_fg_bg);
+				if (this->flags & B2R2_BLT_FLAG_BG_BLEND) {
+					configure_bg(node, bg,
+							this->swap_fg_bg);
+				} else {
+					configure_bg(node, dst,
+							this->swap_fg_bg);
+				}
 				configure_blend(node, this->flags,
 						this->global_alpha);
 			}
@@ -2387,6 +2395,30 @@ static int configure_scale(struct b2r2_node *node,
 			node->node.GROUP10.B2R2_RZI = luma_rzi;
 			node->node.GROUP10.B2R2_HFP = luma_hfp;
 			node->node.GROUP10.B2R2_VFP = luma_vfp;
+			/*
+			 * Scaling operation from raster to a multi-buffer
+			 * format, requires the raster input to be scaled
+			 * before luminance information can be extracted.
+			 * Raster input is scaled by the chroma resizer.
+			 * Luma resizer only handles luminance data which
+			 * exists in a separate buffer in source image,
+			 * as is the case with YUV planar/semi-planar formats.
+			 */
+			if (src_raster) {
+				/* Activate chroma scaling */
+				node->node.GROUP0.B2R2_CIC |=
+					B2R2_CIC_RESIZE_CHROMA;
+				node->node.GROUP8.B2R2_FCTL |= fctl;
+				/*
+				 * Color data must be scaled
+				 * to the same size as luma.
+				 * Use luma scaling parameters.
+				 */
+				node->node.GROUP9.B2R2_RSF = luma_rsf;
+				node->node.GROUP9.B2R2_RZI = luma_rzi;
+				node->node.GROUP9.B2R2_HFP = luma_hfp;
+				node->node.GROUP9.B2R2_VFP = luma_vfp;
+			}
 		}
 
 		b2r2_log_info("%s:\n"
@@ -2531,13 +2563,15 @@ static void configure_bg(struct b2r2_node *node,
 	case B2R2_FMT_TYPE_RASTER:
 		if (swap_fg_bg) {
 			node->node.GROUP0.B2R2_CIC |= B2R2_CIC_SOURCE_2;
-			node->node.GROUP0.B2R2_INS |= B2R2_INS_SOURCE_2_FETCH_FROM_MEM;
+			node->node.GROUP0.B2R2_INS |=
+				B2R2_INS_SOURCE_2_FETCH_FROM_MEM;
 			node->node.GROUP0.B2R2_ACK |= B2R2_ACK_SWAP_FG_BG;
 
 			set_src(&node->node.GROUP4, bg->addr, bg);
 		} else {
 			node->node.GROUP0.B2R2_CIC |= B2R2_CIC_SOURCE_1;
-			node->node.GROUP0.B2R2_INS |= B2R2_INS_SOURCE_1_FETCH_FROM_MEM;
+			node->node.GROUP0.B2R2_INS |=
+				B2R2_INS_SOURCE_1_FETCH_FROM_MEM;
 
 			set_src(&node->node.GROUP3, bg->addr, bg);
 		}
-- 
cgit v1.2.3


From 40df893a1bb1047bc4d11bd94d5cb56304485c87 Mon Sep 17 00:00:00 2001
From: Philippe Langlais <philippe.langlais@linaro.org>
Date: Thu, 12 Jan 2012 11:41:23 +0100
Subject: ARM: ux500: mcde: Coding style fixes

Fix the most obvious violations of the kernel coding style

Signed-off-by: Jonas Aaberg <jonas.aberg@stericsson.com>
---
 arch/arm/mach-ux500/board-mop500-mcde.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/arch/arm/mach-ux500/board-mop500-mcde.c b/arch/arm/mach-ux500/board-mop500-mcde.c
index f65d1f9e319..f35e77acff9 100644
--- a/arch/arm/mach-ux500/board-mop500-mcde.c
+++ b/arch/arm/mach-ux500/board-mop500-mcde.c
@@ -418,8 +418,7 @@ static int __init init_display_devices(void)
 	if (machine_is_hrefv60()) {
 		samsung_s6d16d0_pdata0.reset_gpio = HREFV60_DISP1_RST_GPIO;
 		samsung_s6d16d0_pdata1.reset_gpio = HREFV60_DISP2_RST_GPIO;
-	}
-	else {
+	} else {
 		samsung_s6d16d0_pdata0.reset_gpio = MOP500_DISP1_RST_GPIO;
 		samsung_s6d16d0_pdata1.reset_gpio = MOP500_DISP2_RST_GPIO;
 	}
@@ -453,4 +452,3 @@ static int __init init_display_devices(void)
 	return 0;
 }
 module_init(init_display_devices);
-
-- 
cgit v1.2.3


From d45e9778387f6dcc7a517ade1792807f280836cd Mon Sep 17 00:00:00 2001
From: Anders Bauer <anders.bauer@stericsson.com>
Date: Fri, 4 Nov 2011 11:03:42 +0100
Subject: video: mcde: add synch source formatter

This synch source is used when the formatter
shall trigger a new frame. Synch source
formatter is currently used for DSI video mode.

ST-Ericsson Linux next: -
ST-Ericsson ID: 365705
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: Id362fb6fbff0a15bd8924117ec019b1e1b511032
Signed-off-by: Anders Bauer <anders.bauer@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/36447
Reviewed-by: QABUILD
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Reviewed-by: Jayarami REDDY <jayarami.reddy@stericsson.com>
---
 drivers/video/mcde/mcde_hw.c | 6 ++++++
 include/video/mcde.h         | 1 +
 2 files changed, 7 insertions(+)

diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index d47d1fddaad..720b94db30f 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -1592,6 +1592,12 @@ void update_channel_registers(enum mcde_chnl chnl_id, struct chnl_regs *regs,
 				src_synch =
 				MCDE_CHNL0SYNCHMOD_SRC_SYNCH_HARDWARE;
 				break;
+			case MCDE_SYNCSRC_FORMATTER:
+				out_synch_src =
+				MCDE_CHNL0SYNCHMOD_OUT_SYNCH_SRC_FORMATTER;
+				src_synch =
+				MCDE_CHNL0SYNCHMOD_SRC_SYNCH_HARDWARE;
+				break;
 			}
 		} else {
 			if (port->sync_src == MCDE_SYNCSRC_TE0) {
diff --git a/include/video/mcde.h b/include/video/mcde.h
index 6b5508e3ddd..ae456743827 100644
--- a/include/video/mcde.h
+++ b/include/video/mcde.h
@@ -46,6 +46,7 @@ enum mcde_sync_src {
 	MCDE_SYNCSRC_TE1 = 2, /* MCDE ext TE1 */
 	MCDE_SYNCSRC_BTA = 3, /* DSI BTA */
 	MCDE_SYNCSRC_TE_POLLING = 4, /* DSI TE_POLLING */
+	MCDE_SYNCSRC_FORMATTER = 5, /* Sync from formatter */
 };
 
 /* Interface pixel formats (output) */
-- 
cgit v1.2.3


From fdf669e16c492c38dba87263755e0e0077d6f0bd Mon Sep 17 00:00:00 2001
From: Anders Bauer <anders.bauer@stericsson.com>
Date: Fri, 4 Nov 2011 17:05:28 +0100
Subject: video: mcde: add DSI video mode support

This patch adds support for DSI video mode.

ST-Ericsson Linux next: -
ST-Ericsson ID: 365705
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I103bed18f814e85e48bc687b6b08b4829be347a6
Signed-off-by: Anders Bauer <anders.bauer@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/36517
Reviewed-by: QABUILD
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
---
 drivers/video/mcde/mcde_display.c |  23 +++-
 drivers/video/mcde/mcde_hw.c      | 282 +++++++++++++++++++++++++++++++++++++-
 include/video/mcde.h              |  20 +++
 3 files changed, 321 insertions(+), 4 deletions(-)

diff --git a/drivers/video/mcde/mcde_display.c b/drivers/video/mcde/mcde_display.c
index 28409166c7d..a461b36c9b6 100644
--- a/drivers/video/mcde/mcde_display.c
+++ b/drivers/video/mcde/mcde_display.c
@@ -122,7 +122,28 @@ static inline int mcde_display_try_video_mode_default(
 	struct mcde_display_device *ddev,
 	struct mcde_video_mode *video_mode)
 {
-	/* TODO Check if inside native_xres and native_yres */
+	/*
+	 * DSI video mode:
+	 * This function is intended for configuring supported video mode(s).
+	 * Overload it into the panel driver file and set up blanking
+	 * intervals and pixel clock according to below recommendations.
+	 *
+	 * vertical blanking parameters vbp, vfp, vsw are given in lines
+	 * horizontal blanking parameters hbp, hfp, hsw are given in pixels
+	 *
+	 * video_mode->pixclock is the time between two pixels (in picoseconds)
+	 * The source of the pixel clock is DSI PLL and it shall be set to
+	 * meet the requirement
+	 *
+	 * non-burst mode:
+	 * pixel clock (Hz) = (VACT+VBP+VFP+VSA) * (HACT+HBP+HFP+HSA) *
+	 *                    framerate * bpp / num_data_lanes
+	 *
+	 * burst mode:
+	 * pixel clock (Hz) > (VACT+VBP+VFP+VSA) * (HACT+HBP+HFP+HSA) *
+	 *                    framerate * bpp / num_data_lanes * 1.1
+	 * (1.1 is a 10% margin needed for burst mode calculations)
+	 */
 	return 0;
 }
 
diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index 720b94db30f..0baffc246d7 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -921,6 +921,87 @@ static int wait_for_vcmp(struct mcde_chnl_state *chnl)
 	return ret;
 }
 
+static void get_vid_operating_mode(const struct mcde_port *port,
+		bool *burst_mode, bool *sync_is_pulse, bool *tvg_enable)
+{
+	switch (port->phy.dsi.vid_mode) {
+	case NON_BURST_MODE_WITH_SYNC_EVENT:
+		*burst_mode = false;
+		*sync_is_pulse = false;
+		*tvg_enable = false;
+		break;
+	case NON_BURST_MODE_WITH_SYNC_EVENT_TVG_ENABLED:
+		*burst_mode = false;
+		*sync_is_pulse = false;
+		*tvg_enable = true;
+		break;
+	case BURST_MODE_WITH_SYNC_EVENT:
+		*burst_mode = true;
+		*sync_is_pulse = false;
+		*tvg_enable = false;
+		break;
+	case BURST_MODE_WITH_SYNC_PULSE:
+		*burst_mode = true;
+		*sync_is_pulse = true;
+		*tvg_enable = false;
+		break;
+	default:
+		dev_err(&mcde_dev->dev, "Unsupported video mode");
+		break;
+	}
+}
+
+static void update_vid_static_registers(const struct mcde_port *port)
+{
+	u8 link = port->link;
+	bool burst_mode, sync_is_pulse, tvg_enable;
+
+	get_vid_operating_mode(port, &burst_mode, &sync_is_pulse, &tvg_enable);
+
+	/* burst mode or non-burst mode */
+	dsi_wfld(link, DSI_VID_MAIN_CTL, BURST_MODE, burst_mode);
+
+	/* sync is pulse or event */
+	dsi_wfld(link, DSI_VID_MAIN_CTL, SYNC_PULSE_ACTIVE, sync_is_pulse);
+	dsi_wfld(link, DSI_VID_MAIN_CTL, SYNC_PULSE_HORIZONTAL, sync_is_pulse);
+
+	/* disable video stream when using TVG */
+	if (tvg_enable) {
+		dsi_wfld(link, DSI_MCTL_MAIN_EN, IF1_EN, false);
+		dsi_wfld(link, DSI_MCTL_MAIN_EN, IF2_EN, false);
+	}
+
+	/*
+	 * behavior during blanking time
+	 * 00: NULL packet 1x:LP 01:blanking-packet
+	 */
+	dsi_wfld(link, DSI_VID_MAIN_CTL, REG_BLKLINE_MODE, 1);
+
+	/*
+	 * behavior during eol
+	 * 00: NULL packet 1x:LP 01:blanking-packet
+	 */
+	dsi_wfld(link, DSI_VID_MAIN_CTL, REG_BLKEOL_MODE, 2);
+
+	/* time to perform LP->HS on D-PHY */
+	dsi_wfld(link, DSI_VID_DPHY_TIME, REG_WAKEUP_TIME,
+						port->phy.dsi.vid_wakeup_time);
+
+	/*
+	 * video stream starts on VSYNC packet
+	 * and stops at the end of a frame
+	 */
+	dsi_wfld(link, DSI_VID_MAIN_CTL, VID_ID, port->phy.dsi.virt_id);
+	dsi_wfld(link, DSI_VID_MAIN_CTL, START_MODE, 0);
+	dsi_wfld(link, DSI_VID_MAIN_CTL, STOP_MODE, 0);
+
+	/* 1: if1 in video mode, 0: if1 in command mode */
+	dsi_wfld(link, DSI_MCTL_MAIN_DATA_CTL, IF1_MODE, 1);
+
+	/* 1: enables the link, 0: disables the link */
+	dsi_wfld(link, DSI_MCTL_MAIN_DATA_CTL, VID_EN, 1);
+}
+
 static int update_channel_static_registers(struct mcde_chnl_state *chnl)
 {
 	const struct mcde_port *port = &chnl->port;
@@ -1081,7 +1162,9 @@ static int update_channel_static_registers(struct mcde_chnl_state *chnl)
 			MCDE_DSIVID0CONF0_BYTE_SWAP(false) |
 			MCDE_DSIVID0CONF0_DCSVID_NOTGEN(true));
 
-		if (port->mode == MCDE_PORTMODE_CMD) {
+		if (port->mode == MCDE_PORTMODE_VID) {
+			update_vid_static_registers(port);
+		} else {
 			if (port->ifc == 0)
 				dsi_wfld(port->link, DSI_CMD_MODE_CTL, IF1_ID,
 					port->phy.dsi.virt_id);
@@ -1529,6 +1612,192 @@ static u32 get_pkt_div(u32 disp_ppl,
 	return 1;
 }
 
+static void update_vid_horizontal_blanking(struct mcde_port *port,
+		struct mcde_video_mode *vmode, bool sync_is_pulse, u8 bpp)
+{
+	int hfp, hbp, hsa;
+	u8 link = port->link;
+
+	/*
+	 * vmode->hfp, vmode->hbp and vmode->hsw are given in pixels
+	 * and must be re-calculated into bytes
+	 *
+	 * 6 + 2 is HFP header + checksum
+	 */
+	hfp = vmode->hfp * bpp - 6 - 2;
+	if (sync_is_pulse) {
+		/*
+		 * 6 is HBP header + checksum
+		 * 4 is RGB header + checksum
+		 */
+		hbp = vmode->hbp * bpp - 4 - 6;
+		/*
+		 * 6 is HBP header + checksum
+		 * 4 is HSW packet bytes
+		 * 4 is RGB header + checksum
+		 */
+		hsa = vmode->hsw * bpp - 4 - 4 - 6;
+	} else {
+		/*
+		 * 6 is HBP header + checksum
+		 * 4 is HSW packet bytes
+		 * 4 is RGB header + checksum
+		 */
+		hbp = (vmode->hbp + vmode->hsw) * bpp - 4 - 4 - 6;
+		/* HSA is not considered in this mode and set to 0 */
+		hsa = 0;
+	}
+	if (hfp < 0) {
+		hfp = 0;
+		dev_warn(&mcde_dev->dev,
+			"%s: negative calc for hfp, set to 0\n", __func__);
+	}
+	if (hbp < 0) {
+		hbp = 0;
+		dev_warn(&mcde_dev->dev,
+			"%s: negative calc for hbp, set to 0\n", __func__);
+	}
+	if (hsa < 0) {
+		hsa = 0;
+		dev_warn(&mcde_dev->dev,
+			"%s: negative calc for hsa, set to 0\n", __func__);
+	}
+
+	dsi_wfld(link, DSI_VID_HSIZE1, HFP_LENGTH, hfp);
+	dsi_wfld(link, DSI_VID_HSIZE1, HBP_LENGTH, hbp);
+	dsi_wfld(link, DSI_VID_HSIZE1, HSA_LENGTH, hsa);
+}
+
+static void update_vid_frame_parameters(struct mcde_port *port,
+				struct mcde_video_mode *vmode, u8 bpp)
+{
+	u8 link = port->link;
+	bool burst_mode, sync_is_pulse, tvg_enable;
+	u32 hs_byte_clk, pck_len, blkline_pck, line_duration;
+	u32 blkeol_pck, blkeol_duration;
+	u8 pixel_mode;
+	u8 rgb_header;
+
+	get_vid_operating_mode(port, &burst_mode, &sync_is_pulse, &tvg_enable);
+
+	dsi_wfld(link, DSI_VID_VSIZE, VFP_LENGTH, vmode->vfp);
+	dsi_wfld(link, DSI_VID_VSIZE, VBP_LENGTH, vmode->vbp);
+	dsi_wfld(link, DSI_VID_VSIZE, VSA_LENGTH, vmode->vsw);
+	update_vid_horizontal_blanking(port, vmode, sync_is_pulse, bpp);
+
+	dsi_wfld(link, DSI_VID_VSIZE, VACT_LENGTH, vmode->yres);
+	dsi_wfld(link, DSI_VID_HSIZE2, RGB_SIZE, vmode->xres * bpp);
+
+	/*
+	 * The rgb_header identifies the pixel stream format,
+	 * as described in the MIPI DSI Specification:
+	 *
+	 * 0x0E: Packed pixel stream, 16-bit RGB, 565 format
+	 * 0x1E: Packed pixel stream, 18-bit RGB, 666 format
+	 * 0x2E: Loosely Packed pixel stream, 18-bit RGB, 666 format
+	 * 0x3E: Packed pixel stream, 24-bit RGB, 888 format
+	 */
+	switch (port->pixel_format) {
+	case MCDE_PORTPIXFMT_DSI_16BPP:
+		pixel_mode = 0;
+		rgb_header = 0x0E;
+		break;
+	case MCDE_PORTPIXFMT_DSI_18BPP:
+		pixel_mode = 2;
+		rgb_header = 0x2E;
+		break;
+	case MCDE_PORTPIXFMT_DSI_18BPP_PACKED:
+		pixel_mode = 1;
+		rgb_header = 0x1E;
+		break;
+	case MCDE_PORTPIXFMT_DSI_24BPP:
+		pixel_mode = 3;
+		rgb_header = 0x3E;
+		break;
+	default:
+		pixel_mode = 3;
+		rgb_header = 0x3E;
+		dev_warn(&mcde_dev->dev,
+			"%s: invalid pixel format %d\n",
+			__func__, port->pixel_format);
+		break;
+	}
+
+	dsi_wfld(link, DSI_VID_MAIN_CTL, VID_PIXEL_MODE, pixel_mode);
+	dsi_wfld(link, DSI_VID_MAIN_CTL, HEADER, rgb_header);
+
+	if (tvg_enable) {
+		/*
+		 * with these settings, expect to see 64 pixels wide
+		 * red and green vertical stripes on the screen when
+		 * tvg_enable = 1
+		 */
+		dsi_wfld(link, DSI_MCTL_MAIN_DATA_CTL, TVG_SEL, 1);
+
+		dsi_wfld(link, DSI_TVG_CTL, TVG_STRIPE_SIZE, 6);
+		dsi_wfld(link, DSI_TVG_CTL, TVG_MODE, 2);
+		dsi_wfld(link, DSI_TVG_CTL, TVG_STOPMODE, 2);
+		dsi_wfld(link, DSI_TVG_CTL, TVG_RUN, 1);
+
+		dsi_wfld(link, DSI_TVG_IMG_SIZE, TVG_NBLINE, vmode->yres);
+		dsi_wfld(link, DSI_TVG_IMG_SIZE, TVG_LINE_SIZE,
+							vmode->xres * bpp);
+
+		dsi_wfld(link, DSI_TVG_COLOR1, COL1_BLUE, 0);
+		dsi_wfld(link, DSI_TVG_COLOR1, COL1_GREEN, 0);
+		dsi_wfld(link, DSI_TVG_COLOR1, COL1_RED, 0xFF);
+
+		dsi_wfld(link, DSI_TVG_COLOR2, COL2_BLUE, 0);
+		dsi_wfld(link, DSI_TVG_COLOR2, COL2_GREEN, 0xFF);
+		dsi_wfld(link, DSI_TVG_COLOR2, COL2_RED, 0);
+	}
+
+	/*
+	 * vid->pixclock is the time between two pixels (in picoseconds)
+	 *
+	 * hs_byte_clk is the amount of transferred bytes per lane and
+	 * second (in MHz)
+	 */
+	hs_byte_clk = 1000000 / vmode->pixclock / 8;
+	pck_len = 1000000 * hs_byte_clk / port->refresh_rate /
+			(vmode->vsw + vmode->vbp + vmode->yres + vmode->vfp) *
+						port->phy.dsi.num_data_lanes;
+
+	/*
+	 * 6 is header + checksum, header = 4 bytes, checksum = 2 bytes
+	 * 4 is short packet for vsync/hsync
+	 */
+	if (sync_is_pulse)
+		blkline_pck = pck_len - vmode->hsw - 6;
+	else
+		blkline_pck = pck_len - 4 - 6;
+
+	line_duration = (blkline_pck + 6) / port->phy.dsi.num_data_lanes;
+	blkeol_pck = pck_len -
+		(vmode->hsw + vmode->hbp + vmode->xres + vmode->hfp) * bpp - 6;
+	blkeol_duration = (blkeol_pck + 6) / port->phy.dsi.num_data_lanes;
+
+	if (sync_is_pulse)
+		dsi_wfld(link, DSI_VID_BLKSIZE2, BLKLINE_PULSE_PCK,
+								blkline_pck);
+	else
+		dsi_wfld(link, DSI_VID_BLKSIZE1, BLKLINE_EVENT_PCK,
+								blkline_pck);
+	dsi_wfld(link, DSI_VID_DPHY_TIME, REG_LINE_DURATION, line_duration);
+	if (burst_mode) {
+		dsi_wfld(link, DSI_VID_BLKSIZE1, BLKEOL_PCK, blkeol_pck);
+		dsi_wfld(link, DSI_VID_PCK_TIME, BLKEOL_DURATION,
+							blkeol_duration);
+		dsi_wfld(link, DSI_VID_VCA_SETTING1, MAX_BURST_LIMIT,
+							blkeol_pck - 6);
+		dsi_wfld(link, DSI_VID_VCA_SETTING2, EXACT_BURST_LIMIT,
+								blkeol_pck);
+	}
+	if (sync_is_pulse)
+		dsi_wfld(link, DSI_VID_VCA_SETTING2, MAX_LINE_LIMIT,
+							blkline_pck - 6);
+}
+
 void update_channel_registers(enum mcde_chnl chnl_id, struct chnl_regs *regs,
 				struct mcde_port *port, enum mcde_fifo fifo,
 				struct mcde_video_mode *video_mode)
@@ -1699,8 +1968,11 @@ void update_channel_registers(enum mcde_chnl chnl_id, struct chnl_regs *regs,
 			fidx * MCDE_DSIVID0CONF0_GROUPOFFSET,
 			(temp & ~MCDE_DSIVID0CONF0_PACKING_MASK) |
 			MCDE_DSIVID0CONF0_PACKING(regs->dsipacking));
-		/* 1==CMD8 */
-		packet = ((screen_ppl / pkt_div * regs->bpp) >> 3) + 1;
+		/* no extra command byte in video mode */
+		if (port->mode == MCDE_PORTMODE_CMD)
+			packet = ((screen_ppl / pkt_div * regs->bpp) >> 3) + 1;
+		else
+			packet = ((screen_ppl / pkt_div * regs->bpp) >> 3);
 		mcde_wreg(MCDE_DSIVID0FRAME +
 			fidx * MCDE_DSIVID0FRAME_GROUPOFFSET,
 			MCDE_DSIVID0FRAME_FRAME(packet * pkt_div * screen_lpf));
@@ -1721,6 +1993,10 @@ void update_channel_registers(enum mcde_chnl chnl_id, struct chnl_regs *regs,
 			fidx * MCDE_DSIVID0DELAY1_GROUPOFFSET,
 			MCDE_DSIVID0DELAY1_TEREQDEL(0) |
 			MCDE_DSIVID0DELAY1_FRAMESTARTDEL(0));
+
+		if (port->mode == MCDE_PORTMODE_VID)
+			update_vid_frame_parameters(port, video_mode,
+								regs->bpp / 8);
 	} else if (port->type == MCDE_PORTTYPE_DPI &&
 						!port->phy.dpi.tv_mode) {
 		/* DPI LCD Mode */
diff --git a/include/video/mcde.h b/include/video/mcde.h
index ae456743827..8e1c772fdaa 100644
--- a/include/video/mcde.h
+++ b/include/video/mcde.h
@@ -91,6 +91,15 @@ struct mcde_col_transform {
 	u16 offset[3];
 };
 
+/* DSI video mode */
+enum mcde_dsi_vid_mode {
+	NON_BURST_MODE_WITH_SYNC_EVENT = 0,
+	/* enables tvg, test video generator */
+	NON_BURST_MODE_WITH_SYNC_EVENT_TVG_ENABLED = 1,
+	BURST_MODE_WITH_SYNC_EVENT  = 2,
+	BURST_MODE_WITH_SYNC_PULSE  = 3,
+};
+
 #define MCDE_PORT_DPI_NO_CLOCK_DIV	0
 
 #define DPI_ACT_HIGH_ALL	0 /* all signals are active high	  */
@@ -105,6 +114,7 @@ struct mcde_port {
 	enum mcde_port_type type;
 	enum mcde_port_mode mode;
 	enum mcde_port_pix_fmt pixel_format;
+	u8 refresh_rate;	/* display refresh rate given in Hz */
 	u8 ifc;
 	u8 link;
 	enum mcde_sync_src sync_src;
@@ -118,6 +128,16 @@ struct mcde_port {
 			bool clk_cont;
 			bool host_eot_gen;
 
+			/* DSI video mode operating modes */
+			enum mcde_dsi_vid_mode vid_mode;
+
+			/*
+			 * wakeup_time is the time to perform
+			 * LP->HS on D-PHY. Given in clock
+			 * cycles of byte clock frequency.
+			 */
+			u32 vid_wakeup_time;
+
 			/* DSI data lanes are swapped if true */
 			bool data_lanes_swap;
 		} dsi;
-- 
cgit v1.2.3


From fd2a8b5b96aab13387a6cc0f8c3ad598be0a5783 Mon Sep 17 00:00:00 2001
From: Jayarami Reddy <jayarami.reddy@stericsson.com>
Date: Wed, 9 Nov 2011 18:25:04 +0530
Subject: video: mcde: Configure the correct output fifosize

Configure the correct output fifosize to avoid underflow
and fix display overlap issue for u5500.

ST-Ericsson ID: 366427
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I5cacd1728fa9067568be8d6a9ed0e744055546e7
Signed-off-by: Jayarami Reddy <jayarami.reddy@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/37183
Reviewed-by: QATOOLS
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
Reviewed-by: QABUILD
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
---
 drivers/video/mcde/mcde_hw.c | 17 +++++++++++------
 include/video/mcde.h         |  3 ---
 2 files changed, 11 insertions(+), 9 deletions(-)

diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index 0baffc246d7..efec33c1a8f 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -75,7 +75,7 @@ static void wait_for_flow_disabled(struct mcde_chnl_state *chnl);
 #define OVLY_TIMEOUT 100
 #define CHNL_TIMEOUT 100
 #define FLOW_STOP_TIMEOUT 20
-#define SCREEN_PPL_HIGH 1920
+#define SCREEN_PPL_HIGH 1280
 #define SCREEN_PPL_CEA2 720
 #define SCREEN_LPF_CEA2 480
 #define DSI_DELAY0_CEA2_ADD 10
@@ -103,6 +103,8 @@ static u8 num_channels;
 static u8 num_overlays;
 static int mcde_irq;
 static u32 input_fifo_size;
+static u32 output_fifo_ab_size;
+static u32 output_fifo_c0c1_size;
 
 static struct regulator *regulator_vana;
 static struct regulator *regulator_mcde_epod;
@@ -718,11 +720,11 @@ static u32 get_output_fifo_size(enum mcde_fifo fifo)
 	switch (fifo) {
 	case MCDE_FIFO_A:
 	case MCDE_FIFO_B:
-		ret = MCDE_FIFO_AB_SIZE;
+		ret = output_fifo_ab_size;
 		break;
 	case MCDE_FIFO_C0:
 	case MCDE_FIFO_C1:
-		ret = MCDE_FIFO_C0C1_SIZE;
+		ret = output_fifo_c0c1_size;
 		break;
 	default:
 		dev_warn(&mcde_dev->dev, "Unsupported fifo");
@@ -1318,10 +1320,8 @@ static void update_overlay_registers(u8 idx, struct ovly_regs *regs,
 		ljinc *= 2;
 	}
 
-	fifo_size = get_output_fifo_size(fifo);
-
 	if ((fifo == MCDE_FIFO_A || fifo == MCDE_FIFO_B) &&
-			regs->ppl >= fifo_size * 2)
+			regs->ppl >= SCREEN_PPL_HIGH)
 		pixelfetchwtrmrklevel = input_fifo_size * 2;
 	else
 		pixelfetchwtrmrklevel = input_fifo_size / 2;
@@ -3272,6 +3272,8 @@ static int probe_hw(struct platform_device *pdev)
 		num_overlays = 6;
 		dsi_ifc_is_supported = true;
 		input_fifo_size = 128;
+		output_fifo_ab_size = 640;
+		output_fifo_c0c1_size = 160;
 		dev_info(&mcde_dev->dev, "db8500 V2 HW\n");
 		break;
 	case MCDE_VERSION_4_0_4:
@@ -3279,6 +3281,7 @@ static int probe_hw(struct platform_device *pdev)
 		num_channels = 2;
 		num_overlays = 3;
 		input_fifo_size = 80;
+		output_fifo_ab_size = 320;
 		dsi_ifc_is_supported = false;
 		dev_info(&mcde_dev->dev, "db5500 V2 HW\n");
 		break;
@@ -3288,6 +3291,8 @@ static int probe_hw(struct platform_device *pdev)
 		num_overlays = 6;
 		dsi_ifc_is_supported = true;
 		input_fifo_size = 192;
+		output_fifo_ab_size = 640;
+		output_fifo_c0c1_size = 160;
 		dev_info(&mcde_dev->dev, "db9540 V1 HW\n");
 		break;
 	case MCDE_VERSION_3_0_5:
diff --git a/include/video/mcde.h b/include/video/mcde.h
index 8e1c772fdaa..39b190c6403 100644
--- a/include/video/mcde.h
+++ b/include/video/mcde.h
@@ -187,9 +187,6 @@ enum mcde_display_rotation {
 #define MCDE_BUF_START_ALIGMENT 8
 #define MCDE_BUF_LINE_ALIGMENT 8
 
-#define MCDE_FIFO_AB_SIZE 640
-#define MCDE_FIFO_C0C1_SIZE 160
-
 /* Tv-out defines */
 #define MCDE_CONFIG_TVOUT_BACKGROUND_LUMINANCE		0x83
 #define MCDE_CONFIG_TVOUT_BACKGROUND_CHROMINANCE_CB	0x9C
-- 
cgit v1.2.3


From 946ecd53509f204129ebb1fead7cdc7ceb57b141 Mon Sep 17 00:00:00 2001
From: Maciej Socha <maciej.socha@stericsson.com>
Date: Tue, 8 Nov 2011 09:19:21 +0100
Subject: b2r2: Modify src and dst rect to avoid clipping

Whenever the destination rectangle is larger than
the destination image or extends outside that image,
source and destination rectangles are modified
to avoid the clipping operation.
The background rectangle is also modified if
a separate background image is supplied.

ST-Ericsson ID: 372917
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: Ia00f287fd3c344316349e650caaded17725b9ee4
Signed-off-by: Maciej Socha <maciej.socha@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/36792
Reviewed-by: QATOOLS
Reviewed-by: QABUILD
Reviewed-by: Jorgen NILSSON <jorgen.nilsson@stericsson.com>
Reviewed-by: Per-Daniel OLSSON <per-daniel.olsson@stericsson.com>
Reviewed-by: Jonas ABERG <jonas.aberg@stericsson.com>
---
 drivers/video/b2r2/b2r2_node_split.c |  68 ++++-------
 drivers/video/b2r2/b2r2_utils.c      | 225 +++++++++++++++++++++++++++++++++++
 drivers/video/b2r2/b2r2_utils.h      |   8 +-
 3 files changed, 254 insertions(+), 47 deletions(-)

diff --git a/drivers/video/b2r2/b2r2_node_split.c b/drivers/video/b2r2/b2r2_node_split.c
index 6de6db3cb37..22a0b9c0e5c 100644
--- a/drivers/video/b2r2/b2r2_node_split.c
+++ b/drivers/video/b2r2/b2r2_node_split.c
@@ -14,6 +14,7 @@
 #include "b2r2_internal.h"
 #include "b2r2_hw.h"
 #include "b2r2_filters.h"
+#include "b2r2_utils.h"
 
 #include <linux/kernel.h>
 
@@ -217,6 +218,7 @@ static int configure_scale(struct b2r2_node *node,
 static int configure_rot_scale(struct b2r2_node_split_job *this,
 		struct b2r2_node *node, struct b2r2_node **next);
 
+static void recalculate_rects(struct b2r2_blt_req *req);
 static int check_rect(const struct b2r2_blt_img *img,
 		const struct b2r2_blt_rect *rect,
 		const struct b2r2_blt_rect *clip);
@@ -247,7 +249,6 @@ static u32 to_RGB888(u32 color, const enum b2r2_blt_fmt fmt);
 static enum b2r2_fmt_type get_fmt_type(enum b2r2_blt_fmt fmt);
 
 static bool is_transform(const struct b2r2_blt_request *req);
-static int calculate_scale_factor(u32 from, u32 to, u16 *sf_out);
 static s32 rescale(s32 dim, u16 sf);
 static s32 inv_rescale(s32 dim, u16 sf);
 
@@ -379,6 +380,13 @@ int b2r2_node_split_analyze(const struct b2r2_blt_request *req,
 	color_fill = (this->flags & (B2R2_BLT_FLAG_SOURCE_FILL |
 				B2R2_BLT_FLAG_SOURCE_FILL_RAW)) != 0;
 
+	/*
+	 * B2R2 cannot handle destination clipping on buffers
+	 * allocated close to 64MiB bank boundaries.
+	 * recalculate src_ and dst_rect to avoid clipping.
+	 */
+	recalculate_rects((struct b2r2_blt_req *) &req->user_req);
+
 	/* Configure the source and destination buffers */
 	set_buf(&this->src, req->src_resolved.physical_address,
 			&req->user_req.src_img, &req->user_req.src_rect,
@@ -693,6 +701,19 @@ void b2r2_node_split_cancel(struct b2r2_node_split_job *this)
  * Private functions
  */
 
+static void recalculate_rects(struct b2r2_blt_req *req)
+{
+	struct b2r2_blt_rect new_dst_rect;
+	struct b2r2_blt_rect new_src_rect;
+	struct b2r2_blt_rect new_bg_rect;
+
+	b2r2_trim_rects(req, &new_bg_rect, &new_dst_rect, &new_src_rect);
+
+	req->dst_rect = new_dst_rect;
+	req->src_rect = new_src_rect;
+	req->bg_rect = new_bg_rect;
+}
+
 static int check_rect(const struct b2r2_blt_img *img,
 		const struct b2r2_blt_rect *rect,
 		const struct b2r2_blt_rect *clip)
@@ -3423,51 +3444,6 @@ static bool is_transform(const struct b2r2_blt_request *req)
 				req->user_req.dst_rect.height);
 }
 
-/**
- * calculate_scale_factor() - calculates the scale factor between the given
- *                            values
- */
-static int calculate_scale_factor(u32 from, u32 to, u16 *sf_out)
-{
-	int ret;
-	u32 sf;
-
-	b2r2_log_info("%s\n", __func__);
-
-	if (to == from) {
-		*sf_out = 1 << 10;
-		return 0;
-	} else if (to == 0) {
-		b2r2_log_err("%s: To is 0!\n", __func__);
-		BUG_ON(1);
-	}
-
-	sf = (from << 10) / to;
-
-	if ((sf & 0xffff0000) != 0) {
-		/* Overflow error */
-		b2r2_log_warn("%s: "
-			"Scale factor too large\n", __func__);
-		ret = -EINVAL;
-		goto error;
-	} else if (sf == 0) {
-		b2r2_log_warn("%s: "
-			"Scale factor too small\n", __func__);
-		ret = -EINVAL;
-		goto error;
-	}
-
-	*sf_out = (u16)sf;
-
-	b2r2_log_info("%s exit\n", __func__);
-
-	return 0;
-
-error:
-	b2r2_log_warn("%s: Exit...\n", __func__);
-	return ret;
-}
-
 /**
  * rescale() - rescales the given dimension
  *
diff --git a/drivers/video/b2r2/b2r2_utils.c b/drivers/video/b2r2/b2r2_utils.c
index 8bb61afdd41..87949a37b6b 100644
--- a/drivers/video/b2r2/b2r2_utils.c
+++ b/drivers/video/b2r2/b2r2_utils.c
@@ -21,6 +21,51 @@
 const s32 b2r2_s32_max = 2147483647;
 
 
+/**
+ * calculate_scale_factor() - calculates the scale factor between the given
+ *                            values
+ */
+int calculate_scale_factor(u32 from, u32 to, u16 *sf_out)
+{
+	int ret;
+	u32 sf;
+
+	b2r2_log_info("%s\n", __func__);
+
+	if (to == from) {
+		*sf_out = 1 << 10;
+		return 0;
+	} else if (to == 0) {
+		b2r2_log_err("%s: To is 0!\n", __func__);
+		BUG_ON(1);
+	}
+
+	sf = (from << 10) / to;
+
+	if ((sf & 0xffff0000) != 0) {
+		/* Overflow error */
+		b2r2_log_warn("%s: "
+			"Scale factor too large\n", __func__);
+		ret = -EINVAL;
+		goto error;
+	} else if (sf == 0) {
+		b2r2_log_warn("%s: "
+			"Scale factor too small\n", __func__);
+		ret = -EINVAL;
+		goto error;
+	}
+
+	*sf_out = (u16)sf;
+
+	b2r2_log_info("%s exit\n", __func__);
+
+	return 0;
+
+error:
+	b2r2_log_warn("%s: Exit...\n", __func__);
+	return ret;
+}
+
 void b2r2_get_img_bounding_rect(struct b2r2_blt_img *img,
 					struct b2r2_blt_rect *bounding_rect)
 {
@@ -72,6 +117,186 @@ void b2r2_intersect_rects(struct b2r2_blt_rect *rect1,
 	*intersection = tmp_rect;
 }
 
+/*
+ * Calculate new rectangles for the supplied
+ * request, so that clipping to destination imaage
+ * can be avoided.
+ * Essentially, the new destination rectangle is
+ * defined inside the old one. Given the transform
+ * and scaling, one has to calculate which part of
+ * the old source rectangle corresponds to
+ * to the new part of old destination rectangle.
+ */
+void b2r2_trim_rects(const struct b2r2_blt_req *req,
+			struct b2r2_blt_rect *new_bg_rect,
+			struct b2r2_blt_rect *new_dst_rect,
+			struct b2r2_blt_rect *new_src_rect)
+{
+	enum b2r2_blt_transform transform = req->transform;
+	struct b2r2_blt_rect *old_src_rect =
+		(struct b2r2_blt_rect *) &req->src_rect;
+	struct b2r2_blt_rect *old_dst_rect =
+		(struct b2r2_blt_rect *) &req->dst_rect;
+	struct b2r2_blt_rect *old_bg_rect =
+		(struct b2r2_blt_rect *) &req->bg_rect;
+	struct b2r2_blt_rect dst_img_bounds;
+	s32 src_x = 0;
+	s32 src_y = 0;
+	s32 src_w = 0;
+	s32 src_h = 0;
+	s32 dx = 0;
+	s32 dy = 0;
+	s16 hsf;
+	s16 vsf;
+
+	b2r2_log_info("%s\nold_dst_rect(x,y,w,h)=(%d, %d, %d, %d)\n", __func__,
+		old_dst_rect->x, old_dst_rect->y,
+		old_dst_rect->width, old_dst_rect->height);
+	b2r2_log_info("%s\nold_src_rect(x,y,w,h)=(%d, %d, %d, %d)\n", __func__,
+		old_src_rect->x, old_src_rect->y,
+		old_src_rect->width, old_src_rect->height);
+
+	b2r2_get_img_bounding_rect((struct b2r2_blt_img *) &req->dst_img,
+		&dst_img_bounds);
+
+	/* dst_rect inside dst_img, no clipping necessary */
+	if (b2r2_is_rect_inside_rect(old_dst_rect, &dst_img_bounds))
+		goto keep_rects;
+
+	b2r2_intersect_rects(old_dst_rect, &dst_img_bounds, new_dst_rect);
+	b2r2_log_info("%s\nnew_dst_rect(x,y,w,h)=(%d, %d, %d, %d)\n", __func__,
+		new_dst_rect->x, new_dst_rect->y,
+		new_dst_rect->width, new_dst_rect->height);
+
+	/* dst_rect completely outside, leave it to validation */
+	if (new_dst_rect->width == 0 || new_dst_rect->height == 0)
+		goto keep_rects;
+
+	dx = new_dst_rect->x - old_dst_rect->x;
+	dy = new_dst_rect->y - old_dst_rect->y;
+
+	if (transform & B2R2_BLT_TRANSFORM_CCW_ROT_90) {
+		int res = 0;
+		res = calculate_scale_factor(old_src_rect->width,
+			old_dst_rect->height, &hsf);
+		/* invalid dimensions, leave them to validation */
+		if (res < 0)
+			goto keep_rects;
+
+		res = calculate_scale_factor(old_src_rect->height,
+			old_dst_rect->width, &vsf);
+		if (res < 0)
+			goto keep_rects;
+
+		/*
+		 * After applying the inverse transform
+		 * for 90 degree rotation, the top-left corner
+		 * becomes top-right.
+		 * src_rect origin is defined as top-left,
+		 * so a translation between dst and src
+		 * coordinate spaces is necessary.
+		 */
+		src_x = (old_src_rect->width << 10) -
+			hsf * (dy + new_dst_rect->height);
+		src_y = dx * vsf;
+		src_w = new_dst_rect->height * hsf;
+		src_h = new_dst_rect->width * vsf;
+	} else {
+		int res = 0;
+		res = calculate_scale_factor(old_src_rect->width,
+			old_dst_rect->width, &hsf);
+		if (res < 0)
+			goto keep_rects;
+
+		res = calculate_scale_factor(old_src_rect->height,
+			old_dst_rect->height, &vsf);
+		if (res < 0)
+			goto keep_rects;
+
+		src_x = dx * hsf;
+		src_y = dy * vsf;
+		src_w = new_dst_rect->width * hsf;
+		src_h = new_dst_rect->height * vsf;
+	}
+
+	/*
+	 * src_w must contain all the pixels that contribute
+	 * to a particular destination rectangle.
+	 * ((x + 0x3ff) >> 10) is equivalent to ceiling(x),
+	 * expressed in 6.10 fixed point format.
+	 * Every destination rectangle, maps to a certain area in the source
+	 * rectangle. The area in source will most likely not be a rectangle
+	 * with exact integer dimensions whenever arbitrary scaling is involved.
+	 * Consider the following example.
+	 * Suppose, that width of the current destination rectangle maps
+	 * to 1.7 pixels in source, starting at x == 5.4, as calculated
+	 * using the scaling factor.
+	 * This means that while the destination rectangle is written,
+	 * the source should be read from x == 5.4 up to x == 5.4 + 1.7 == 7.1
+	 * Consequently, color from 3 pixels (x == 5, 6 and 7)
+	 * needs to be read from source.
+	 * The formula below the comment yields:
+	 * ceil(0.4 + 1.7) == ceil(2.1) == 3
+	 * (src_x & 0x3ff) is the fractional part of src_x,
+	 * which is expressed in 6.10 fixed point format.
+	 * Thus, width of the source area should be 3 pixels wide,
+	 * starting at x == 5.
+	 */
+	src_w = ((src_x & 0x3ff) + src_w + 0x3ff) >> 10;
+	src_h = ((src_y & 0x3ff) + src_h + 0x3ff) >> 10;
+
+	src_x >>= 10;
+	src_y >>= 10;
+
+	if (transform & B2R2_BLT_TRANSFORM_FLIP_H)
+		src_x = old_src_rect->width - src_x - src_w;
+
+	if (transform & B2R2_BLT_TRANSFORM_FLIP_V)
+		src_y = old_src_rect->height - src_y - src_h;
+
+	/*
+	 * Translate the src_rect coordinates into true
+	 * src_buffer coordinates.
+	 */
+	src_x += old_src_rect->x;
+	src_y += old_src_rect->y;
+
+	new_src_rect->x = src_x;
+	new_src_rect->y = src_y;
+	new_src_rect->width = src_w;
+	new_src_rect->height = src_h;
+
+	b2r2_log_info("%s\nnew_src_rect(x,y,w,h)=(%d, %d, %d, %d)\n", __func__,
+		new_src_rect->x, new_src_rect->y,
+		new_src_rect->width, new_src_rect->height);
+
+	if (req->flags & B2R2_BLT_FLAG_BG_BLEND) {
+		/* Modify bg_rect in the same way as dst_rect */
+		s32 dw = new_dst_rect->width - old_dst_rect->width;
+		s32 dh = new_dst_rect->height - old_dst_rect->height;
+		b2r2_log_info("%s\nold bg_rect(x,y,w,h)=(%d, %d, %d, %d)\n",
+			__func__, old_bg_rect->x, old_bg_rect->y,
+			old_bg_rect->width, old_bg_rect->height);
+		new_bg_rect->x = old_bg_rect->x + dx;
+		new_bg_rect->y = old_bg_rect->y + dy;
+		new_bg_rect->width = old_bg_rect->width + dw;
+		new_bg_rect->height = old_bg_rect->height + dh;
+		b2r2_log_info("%s\nnew bg_rect(x,y,w,h)=(%d, %d, %d, %d)\n",
+			__func__, new_bg_rect->x, new_bg_rect->y,
+			new_bg_rect->width, new_bg_rect->height);
+	}
+	return;
+keep_rects:
+	/*
+	 * Recalculation was not possible, or not necessary.
+	 * Do not change anything, leave it to validation.
+	 */
+	*new_src_rect = *old_src_rect;
+	*new_dst_rect = *old_dst_rect;
+	*new_bg_rect = *old_bg_rect;
+	b2r2_log_info("%s original rectangles preserved.\n", __func__);
+	return;
+}
 
 int b2r2_get_fmt_bpp(enum b2r2_blt_fmt fmt)
 {
diff --git a/drivers/video/b2r2/b2r2_utils.h b/drivers/video/b2r2/b2r2_utils.h
index 5db7868e255..4597b2bd684 100644
--- a/drivers/video/b2r2/b2r2_utils.h
+++ b/drivers/video/b2r2/b2r2_utils.h
@@ -15,6 +15,7 @@
 
 extern const s32 b2r2_s32_max;
 
+int calculate_scale_factor(u32 from, u32 to, u16 *sf_out);
 void b2r2_get_img_bounding_rect(struct b2r2_blt_img *img,
 		struct b2r2_blt_rect *bounding_rect);
 
@@ -24,7 +25,12 @@ bool b2r2_is_rect_inside_rect(struct b2r2_blt_rect *rect1,
 bool b2r2_is_rect_gte_rect(struct b2r2_blt_rect *rect1,
 		struct b2r2_blt_rect *rect2);
 void b2r2_intersect_rects(struct b2r2_blt_rect *rect1,
-		struct b2r2_blt_rect *rect2, struct b2r2_blt_rect *intersection);
+		struct b2r2_blt_rect *rect2,
+		struct b2r2_blt_rect *intersection);
+void b2r2_trim_rects(const struct b2r2_blt_req *req,
+			struct b2r2_blt_rect *new_bg_rect,
+			struct b2r2_blt_rect *new_dst_rect,
+			struct b2r2_blt_rect *new_src_rect);
 
 int b2r2_get_fmt_bpp(enum b2r2_blt_fmt fmt);
 int b2r2_get_fmt_y_bpp(enum b2r2_blt_fmt fmt);
-- 
cgit v1.2.3


From 7f9720fc26e42a82df0f76d9a6ab884ce3f9a78a Mon Sep 17 00:00:00 2001
From: Magnus Smith <qsmimag@steludxu2757.(none)>
Date: Tue, 8 Nov 2011 09:02:50 +0100
Subject: mcde: Read mcde_clk_rate, used in dsi_delay0

Read the mcde_clk_rate in HZ, to use for
calculation of dsi_delay0.

ST-Ericsson ID: 368861
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: Ice950a0b30d5cb92c7b0d31aebd65d3b1981ed63
Signed-off-by: Magnus Smith <qsmimag@steludxu2757.(none)>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/36795
Reviewed-by: QABUILD
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Reviewed-by: Jonas ABERG <jonas.aberg@stericsson.com>
Reviewed-by: Magnus SMITH <magnus.xm.smith@stericsson.com>
Tested-by: Magnus SMITH <magnus.xm.smith@stericsson.com>
---
 drivers/video/mcde/mcde_hw.c | 12 ++++++++++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index efec33c1a8f..6263ceeca78 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -27,6 +27,8 @@
 #include <linux/jiffies.h>
 #include <linux/workqueue.h>
 
+#include <linux/mfd/dbx500-prcmu.h>
+
 #include <video/mcde.h>
 #include "dsilink_regs.h"
 #include "mcde_regs.h"
@@ -117,6 +119,7 @@ static u8 mcde_is_enabled;
 static struct delayed_work hw_timeout_work;
 static u8 dsi_pll_is_enabled;
 static u8 dsi_ifc_is_supported;
+static u32 mcde_clk_rate; /* In Hz */
 
 static struct mutex mcde_hw_lock;
 static inline void mcde_lock(const char *func, int line)
@@ -1953,10 +1956,10 @@ void update_channel_registers(enum mcde_chnl chnl_id, struct chnl_regs *regs,
 
 		/* pkt_delay_progressive = pixelclock * htot /
 		 * (1E12 / 160E6) / pkt_div */
-		dsi_delay0 = (video_mode->pixclock + 1) *
+		dsi_delay0 = (video_mode->pixclock) *
 			(video_mode->xres + video_mode->hbp +
 				video_mode->hfp) /
-			(1000000 / MCDE_CLK_FREQ_MHZ) / pkt_div;
+			(100000000 / ((mcde_clk_rate / 10000))) / pkt_div;
 
 		if ((screen_ppl == SCREEN_PPL_CEA2) &&
 				(screen_lpf == SCREEN_LPF_CEA2))
@@ -3377,6 +3380,11 @@ static int probe_hw(struct platform_device *pdev)
 		if (channels[i].ovly1)
 			mcde_debugfs_overlay_create(i, 1);
 	}
+        (void) prcmu_qos_add_requirement(PRCMU_QOS_APE_OPP, "mcde", 100);
+        mcde_clk_rate = clk_get_rate(clock_mcde);
+        dev_info(&mcde_dev->dev, "MCDE_CLK is %d MHz\n", mcde_clk_rate);
+        prcmu_qos_remove_requirement(PRCMU_QOS_APE_OPP, "mcde");
+
 	return 0;
 
 failed_map_dsi_io:
-- 
cgit v1.2.3


From e1b1e5bb51dd27c8043d0336d2396796023f9260 Mon Sep 17 00:00:00 2001
From: Maciej Socha <maciej.socha@stericsson.com>
Date: Fri, 28 Oct 2011 16:59:40 +0200
Subject: b2r2: Improve image quality for large zoom blits

The bilinear filter kernel is essentially reduced in size
so the output is affected by fewer surrounding pixels.
Destination pixels that are close to high contrast edges
can otherwise be contaminated by content from
the opposite side of the edge.

ST-Ericsson ID: 367586
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I9cd8b8a7e0e3d36f987ee4fd96abebc42bb94628
Signed-off-by: Maciej Socha <maciej.socha@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/38272
Reviewed-by: Nils CALMSUND <nils.calmsund@stericsson.com>
Tested-by: Nils CALMSUND <nils.calmsund@stericsson.com>
Reviewed-by: QATOOLS
Reviewed-by: QABUILD
Reviewed-by: Jorgen NILSSON <jorgen.nilsson@stericsson.com>
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
---
 drivers/video/b2r2/b2r2_filters.c | 28 ++++++++++++++--------------
 1 file changed, 14 insertions(+), 14 deletions(-)

diff --git a/drivers/video/b2r2/b2r2_filters.c b/drivers/video/b2r2/b2r2_filters.c
index 208cdcd286e..85cb697b522 100644
--- a/drivers/video/b2r2/b2r2_filters.c
+++ b/drivers/video/b2r2/b2r2_filters.c
@@ -154,23 +154,23 @@ static struct b2r2_filter_spec bilinear_filter = {
 	.max = 0xffff,
 	.h_coeffs = {
 		0x00, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00,
-		0xff, 0x03, 0xfd, 0x08, 0x3e, 0xf9, 0x04, 0xfe,
-		0xfd, 0x06, 0xf8, 0x13, 0x3b, 0xf4, 0x07, 0xfc,
-		0xfb, 0x08, 0xf5, 0x1f, 0x34, 0xf1, 0x09, 0xfb,
-		0xfb, 0x09, 0xf2, 0x2b, 0x2a, 0xf1, 0x09, 0xfb,
-		0xfb, 0x09, 0xf2, 0x35, 0x1e, 0xf4, 0x08, 0xfb,
-		0xfc, 0x07, 0xf5, 0x3c, 0x12, 0xf7, 0x06, 0xfd,
-		0xfe, 0x04, 0xfa, 0x3f, 0x07, 0xfc, 0x03, 0xff
+		0x00, 0x00, 0xff, 0x08, 0x3e, 0xfb, 0x00, 0x00,
+		0x00, 0x00, 0xfb, 0x13, 0x3b, 0xf7, 0x00, 0x00,
+		0x00, 0x00, 0xf8, 0x1f, 0x34, 0xf5, 0x00, 0x00,
+		0x00, 0x00, 0xf6, 0x2b, 0x2a, 0xf5, 0x00, 0x00,
+		0x00, 0x00, 0xf6, 0x35, 0x1e, 0xf7, 0x00, 0x00,
+		0x00, 0x00, 0xf9, 0x3c, 0x12, 0xf9, 0x00, 0x00,
+		0x00, 0x00, 0xfd, 0x3f, 0x07, 0xfd, 0x00, 0x00
 	},
 	.v_coeffs = {
 		0x00, 0x00, 0x40, 0x00, 0x00,
-		0xfd, 0x09, 0x3c, 0xfa, 0x04,
-		0xf9, 0x13, 0x39, 0xf5, 0x06,
-		0xf5, 0x1f, 0x31, 0xf3, 0x08,
-		0xf3, 0x2a, 0x28, 0xf3, 0x08,
-		0xf3, 0x34, 0x1d, 0xf5, 0x07,
-		0xf5, 0x3b, 0x12, 0xf9, 0x05,
-		0xfa, 0x3f, 0x07, 0xfd, 0x03
+		0x00, 0x09, 0x3d, 0xfa, 0x00,
+		0x00, 0x13, 0x39, 0xf4, 0x00,
+		0x00, 0x1e, 0x31, 0xf1, 0x00,
+		0x00, 0x27, 0x28, 0xf1, 0x00,
+		0x00, 0x31, 0x1d, 0xf2, 0x00,
+		0x00, 0x38, 0x12, 0xf6, 0x00,
+		0x00, 0x3d, 0x07, 0xfc, 0x00
 	},
 };
 
-- 
cgit v1.2.3


From 38dd80f75abd11e1feb82415e371e46ed519cd63 Mon Sep 17 00:00:00 2001
From: Jonas Aaberg <jonas.aberg@stericsson.com>
Date: Mon, 21 Nov 2011 12:07:47 +0100
Subject: drivers: video: av8100: Stop printing chip version at every resume

Move chip version detection from power-up to probe.

ST-Ericsson Linux next: -
ST-Ericsson ID: 370799
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: Ic0870b2565ca71318c06cd0a24a33ccca3f863cb
Signed-off-by: Jonas Aaberg <jonas.aberg@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/39186
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
---
 drivers/video/av8100/av8100.c | 57 ++++++++++++++++++++++---------------------
 1 file changed, 29 insertions(+), 28 deletions(-)

diff --git a/drivers/video/av8100/av8100.c b/drivers/video/av8100/av8100.c
index 356e0061335..d5d159079c3 100644
--- a/drivers/video/av8100/av8100.c
+++ b/drivers/video/av8100/av8100.c
@@ -2028,28 +2028,6 @@ static int av8100_powerup1(struct av8100_device *adev)
 		mdelay(AV8100_WAITTIME_1MS);
 	}
 
-	/* Get chip version */
-	retval = av8100_reg_stby_pend_int_r(NULL, NULL, NULL,
-					&adev->chip_version);
-	if (retval) {
-		dev_err(adev->dev, "Failed to read chip version\n");
-		goto av8100_powerup1_err;
-	}
-
-	dev_info(adev->dev, "chip version:%d\n", adev->chip_version);
-
-	switch (adev->chip_version) {
-	case AV8100_CHIPVER_1:
-	case AV8100_CHIPVER_2:
-		break;
-
-	default:
-		dev_err(adev->dev, "Unsupported chip version:%d\n",
-				adev->chip_version);
-		goto av8100_powerup1_err;
-		break;
-	}
-
 	retval = request_irq(pdata->irq, av8100_intr_handler,
 			IRQF_TRIGGER_RISING, "av8100", adev);
 	if (retval == 0)
@@ -4062,7 +4040,7 @@ static int __devinit av8100_probe(struct i2c_client *i2c_client,
 			I2C_FUNC_SMBUS_READ_WORD_DATA)) {
 		ret = -ENODEV;
 		dev_info(dev, "av8100 i2c_check_functionality failed\n");
-		goto err;
+		goto err1;
 	}
 
 	init_waitqueue_head(&adev->event);
@@ -4083,7 +4061,7 @@ static int __devinit av8100_probe(struct i2c_client *i2c_client,
 				"%s: Failed to get regulator '%s'\n",
 				__func__, pdata->regulator_pwr_id);
 			adev->params.regulator_pwr = NULL;
-			return ret;
+			goto err1;
 		}
 	}
 
@@ -4099,15 +4077,38 @@ static int __devinit av8100_probe(struct i2c_client *i2c_client,
 
 	av8100_set_state(adev, AV8100_OPMODE_SHUTDOWN);
 
-	/* Obtain the chip version */
+
 	if (av8100_powerup1(adev)) {
 		dev_err(adev->dev, "av8100_powerup1 fail\n");
-		return -EFAULT;
+		ret = -EFAULT;
+		goto err1;
 	}
 
-	ret = av8100_powerdown();
+	/* Obtain the chip version */
+	ret = av8100_reg_stby_pend_int_r(NULL, NULL, NULL,
+					 &adev->chip_version);
+	if (ret) {
+		dev_err(adev->dev, "Failed to read chip version\n");
+		goto err2;
+	}
+
+	dev_info(adev->dev, "chip version:%d\n", adev->chip_version);
+
+	switch (adev->chip_version) {
+	case AV8100_CHIPVER_1:
+	case AV8100_CHIPVER_2:
+		break;
 
-err:
+	default:
+		dev_err(adev->dev, "Unsupported chip version:%d\n",
+				adev->chip_version);
+		ret = -EINVAL;
+		goto err2;
+		break;
+	}
+err2:
+	(void) av8100_powerdown();
+err1:
 	return ret;
 }
 
-- 
cgit v1.2.3


From f1d9dd7a98be91f795ed812c988db6ed9be4f73f Mon Sep 17 00:00:00 2001
From: Baptiste Chauloux <baptiste.chauloux@stericsson.com>
Date: Fri, 18 Nov 2011 14:43:46 +0100
Subject: video: mcde: Add new display id for Sony driver.

Currently only 0x1b81 is supported, with this patch 0x1a81 is added as well

ST-Ericsson ID: 374867
ST-Ericsson FOSS-OUT ID: NA

Change-Id: Idaf31050011d9f01c62d82fdea7fcb7103c95b4c
Signed-off-by: Baptiste Chauloux <baptiste.chauloux@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/38437
Reviewed-by: QABUILD
Reviewed-by: Jonas ABERG <jonas.aberg@stericsson.com>
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
---
 drivers/video/mcde/display-sony_acx424akp_dsi.c | 3 ++-
 include/video/mcde_display-sony_acx424akp_dsi.h | 1 +
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/video/mcde/display-sony_acx424akp_dsi.c b/drivers/video/mcde/display-sony_acx424akp_dsi.c
index 7c4f69a0cae..b570e832893 100644
--- a/drivers/video/mcde/display-sony_acx424akp_dsi.c
+++ b/drivers/video/mcde/display-sony_acx424akp_dsi.c
@@ -298,7 +298,8 @@ static int __devinit sony_acx424akp_probe(struct mcde_display_device *dev)
 
 	switch (id) {
 	case DISPLAY_SONY_ACX424AKP:
-		pdata->disp_panel = DISPLAY_SONY_ACX424AKP;
+	case DISPLAY_SONY_ACX424AKP_ID2:
+		pdata->disp_panel = id;
 		dev_info(&dev->dev,
 			"Sony ACX424AKP display (ID 0x%.4X) probed\n", id);
 		break;
diff --git a/include/video/mcde_display-sony_acx424akp_dsi.h b/include/video/mcde_display-sony_acx424akp_dsi.h
index 9f656fdcc3b..29fb14a3fdb 100644
--- a/include/video/mcde_display-sony_acx424akp_dsi.h
+++ b/include/video/mcde_display-sony_acx424akp_dsi.h
@@ -14,6 +14,7 @@
 enum display_panel_type {
 	DISPLAY_NONE			= 0,
 	DISPLAY_SONY_ACX424AKP          = 0x1b81,
+	DISPLAY_SONY_ACX424AKP_ID2      = 0x1a81,
 };
 
 struct  mcde_display_sony_acx424akp_platform_data {
-- 
cgit v1.2.3


From 2177c2737720c8169bed0430d3f68a9f9c23d28e Mon Sep 17 00:00:00 2001
From: Per Persson <per.xb.persson@stericsson.com>
Date: Fri, 2 Dec 2011 10:55:40 +0100
Subject: video: mcde: Avoid set_video_mode when in OFF state

set_video command is avoided when the display device is in
powered off state.

ST-Ericsson ID: 398840, 399022
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: Ida9ede0cafaecd4bffe18b3fb1aad88bbf07586d
Signed-off-by: Per Persson <per.xb.persson@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/40767
Reviewed-by: Anders BAUER <anders.bauer@stericsson.com>
Reviewed-by: QABUILD
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Reviewed-by: Jonas ABERG <jonas.aberg@stericsson.com>
---
 drivers/video/mcde/mcde_dss.c | 11 +++++++----
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/drivers/video/mcde/mcde_dss.c b/drivers/video/mcde/mcde_dss.c
index eb07cf9534b..044e39ad285 100644
--- a/drivers/video/mcde/mcde_dss.c
+++ b/drivers/video/mcde/mcde_dss.c
@@ -341,15 +341,17 @@ EXPORT_SYMBOL(mcde_dss_try_video_mode);
 int mcde_dss_set_video_mode(struct mcde_display_device *ddev,
 	struct mcde_video_mode *vmode)
 {
-	int ret;
+	int ret = 0;
 	struct mcde_video_mode old_vmode;
 
 	mutex_lock(&ddev->display_lock);
+	/* Do not perform set_video_mode if power mode is off */
+	if (ddev->get_power_mode(ddev) == MCDE_DISPLAY_PM_OFF)
+		goto power_mode_off;
+
 	ddev->get_video_mode(ddev, &old_vmode);
-	if (memcmp(vmode, &old_vmode, sizeof(old_vmode)) == 0) {
-		ret = 0;
+	if (memcmp(vmode, &old_vmode, sizeof(old_vmode)) == 0)
 		goto same_video_mode;
-	}
 
 	ret = ddev->set_video_mode(ddev, vmode);
 	if (ret)
@@ -357,6 +359,7 @@ int mcde_dss_set_video_mode(struct mcde_display_device *ddev,
 
 	if (ddev->invalidate_area)
 		ret = ddev->invalidate_area(ddev, NULL);
+power_mode_off:
 same_video_mode:
 set_video_mode_failed:
 	mutex_unlock(&ddev->display_lock);
-- 
cgit v1.2.3


From 9f2aafbedc1999e0befaec2048da21f092b43ceb Mon Sep 17 00:00:00 2001
From: Jimmy Rubin <jimmy.rubin@stericsson.com>
Date: Thu, 27 Oct 2011 12:44:30 +0200
Subject: video: mcde: Enter ULPM before dsi is disabled

When the display shuts down after the display
has been set in sleep mode,
the correct MIPI is sequence is LP-11, LP-10, LP-00.

This means that the DSI lanes/clock must first be
put in idle, then enter ulpm for data lanes and
after that ulpm for clock lane.
After this VANA can be turned off.

ST-Ericsson ID: 369162
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I63abead58bac975c94425f6cfba86ba268af1950
Signed-off-by: Jimmy Rubin <jimmy.rubin@stericsson.com>
Signed-off-by: Anders Bauer <anders.bauer@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/35469
Reviewed-by: QATOOLS
Reviewed-by: QABUILD
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
---
 drivers/video/mcde/mcde_hw.c | 197 +++++++++++++++++++++++++++++++------------
 1 file changed, 145 insertions(+), 52 deletions(-)

diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index 6263ceeca78..c825c4c6273 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -56,6 +56,13 @@ enum chnl_state {
 	CHNLSTATE_STOPPED,   /* Stopped, after VCMP, FLOEN==0|1 */
 };
 
+enum dsi_lane_status {
+	DSI_LANE_STATE_START	= 0x00,
+	DSI_LANE_STATE_IDLE	= 0x01,
+	DSI_LANE_STATE_WRITE	= 0x02,
+	DSI_LANE_STATE_ULPM	= 0x03,
+};
+
 static int set_channel_state_atomic(struct mcde_chnl_state *chnl,
 							enum chnl_state state);
 static int set_channel_state_sync(struct mcde_chnl_state *chnl,
@@ -85,6 +92,8 @@ static void wait_for_flow_disabled(struct mcde_chnl_state *chnl);
 #define MCDE_SLEEP_WATCHDOG 500
 #define DSI_TE_NO_ANSWER_TIMEOUT_INIT 2500
 #define DSI_TE_NO_ANSWER_TIMEOUT 250
+#define DSI_WAIT_FOR_ULPM_STATE_MS 1
+#define DSI_ULPM_STATE_NBR_OF_RETRIES 10
 #define DSI_READ_TIMEOUT 200
 #define DSI_WRITE_CMD_TIMEOUT 1000
 #define DSI_READ_DELAY 5
@@ -463,25 +472,132 @@ static void update_mcde_registers(void)
 		MCDE_VSCRC1_VSPMAX(0xff));
 }
 
-static void disable_formatter(struct mcde_port *port)
+static void dsi_link_handle_ulpm(struct mcde_port *port, bool enter_ulpm)
 {
-	if (port->type == MCDE_PORTTYPE_DSI) {
-		wait_while_dsi_running(port->link);
-		if (dsi_pll_is_enabled && (--dsi_pll_is_enabled == 0)) {
-			struct mcde_platform_data *pdata =
-				    mcde_dev->dev.platform_data;
-			dev_dbg(&mcde_dev->dev, "%s disable dsipll\n",
-								__func__);
-			pdata->platform_disable_dsipll();
+	u8 link = port->link;
+	u8 num_data_lanes = port->phy.dsi.num_data_lanes;
+	u8 nbr_of_retries = 0;
+	u8 lane_state;
+
+	/*
+	 * The D-PHY protocol specifies the time to leave the ULP mode
+	 * in ms. It will at least take 1 ms to exit ULPM.
+	 * The ULPOUT time value is using number of system clock ticks
+	 * divided by 1000. The system clock for the DSI link is the MCDE
+	 * clock.
+	 */
+	dsi_wreg(link, DSI_MCTL_ULPOUT_TIME,
+			DSI_MCTL_ULPOUT_TIME_CKLANE_ULPOUT_TIME(0x1FF) |
+			DSI_MCTL_ULPOUT_TIME_DATA_ULPOUT_TIME(0x1FF));
+
+	dsi_wfld(link, DSI_MCTL_MAIN_EN, DAT1_ULPM_REQ, enter_ulpm);
+	dsi_wfld(link, DSI_MCTL_MAIN_EN, DAT2_ULPM_REQ,
+					enter_ulpm && num_data_lanes == 2);
+
+	if (enter_ulpm)
+		lane_state = DSI_LANE_STATE_ULPM;
+	else
+		lane_state = DSI_LANE_STATE_IDLE;
+
+	/* Wait for data lanes to enter ULPM */
+	while (dsi_rfld(link, DSI_MCTL_LANE_STS, DATLANE1_STATE)
+						!= lane_state ||
+		(dsi_rfld(link, DSI_MCTL_LANE_STS, DATLANE2_STATE)
+						!= lane_state &&
+							num_data_lanes > 1)) {
+		mdelay(DSI_WAIT_FOR_ULPM_STATE_MS);
+		if (nbr_of_retries++ == DSI_ULPM_STATE_NBR_OF_RETRIES) {
+			dev_warn(&mcde_dev->dev,
+				"Could not enter correct state=%d (link=%d)!\n",
+							lane_state, link);
+			break;
+		}
+	}
+
+	dsi_wfld(link, DSI_MCTL_MAIN_EN, CLKLANE_ULPM_REQ, enter_ulpm);
+	nbr_of_retries = 0;
+
+	/* Wait for clock lane to enter ULPM */
+	while (dsi_rfld(link, DSI_MCTL_LANE_STS, CLKLANE_STATE)
+						!= lane_state) {
+		mdelay(DSI_WAIT_FOR_ULPM_STATE_MS);
+		if (nbr_of_retries++ == DSI_ULPM_STATE_NBR_OF_RETRIES) {
+			dev_warn(&mcde_dev->dev,
+				"Could not enter correct state=%d (link=%d)!\n",
+							lane_state, link);
+			break;
 		}
-		clk_disable(clock_dsi);
-		clk_disable(clock_dsi_lp);
-	} else if (port->type == MCDE_PORTTYPE_DPI) {
-		clk_disable(clock_dpi);
 	}
 }
 
-static void disable_mcde_hw(bool force_disable)
+static int dsi_link_enable(struct mcde_chnl_state *chnl)
+{
+	u8 link = chnl->port.link;
+
+	WARN_ON_ONCE(clk_enable(clock_dsi));
+	WARN_ON_ONCE(clk_enable(clock_dsi_lp));
+
+	if (!dsi_pll_is_enabled) {
+		int ret;
+		struct mcde_platform_data *pdata =
+				mcde_dev->dev.platform_data;
+		ret = pdata->platform_enable_dsipll();
+		if (ret < 0) {
+			dev_warn(&mcde_dev->dev, "%s: "
+				"enable_dsipll failed ret = %d\n",
+							__func__, ret);
+			goto enable_dsipll_err;
+		}
+		dev_dbg(&mcde_dev->dev, "%s enable dsipll\n",
+							__func__);
+	}
+	dsi_pll_is_enabled++;
+
+	dsi_wfld(link, DSI_MCTL_MAIN_DATA_CTL, LINK_EN, true);
+
+	if (dsi_rfld(link, DSI_MCTL_LANE_STS, CLKLANE_STATE) ==
+						DSI_LANE_STATE_ULPM ||
+		dsi_rfld(link, DSI_MCTL_LANE_STS, DATLANE1_STATE)
+						== DSI_LANE_STATE_ULPM ||
+		dsi_rfld(link, DSI_MCTL_LANE_STS, DATLANE2_STATE)
+						== DSI_LANE_STATE_ULPM) {
+		/* Switch hs clock to sys_clk */
+		dsi_wfld(link, DSI_MCTL_PLL_CTL, PLL_OUT_SEL, 0x1);
+		dsi_link_handle_ulpm(&chnl->port, false);
+		/* Switch hs clock to tx_byte_hs_clk */
+		dsi_wfld(link, DSI_MCTL_PLL_CTL, PLL_OUT_SEL, 0x0);
+	}
+
+	dev_dbg(&mcde_dev->dev, "DSI%d LINK_EN\n", link);
+
+	return 0;
+
+enable_dsipll_err:
+	clk_disable(clock_dsi_lp);
+	clk_disable(clock_dsi);
+	return -EINVAL;
+}
+
+static void dsi_link_disable(struct mcde_chnl_state *chnl, bool suspend)
+{
+	wait_while_dsi_running(chnl->port.link);
+	/* only enter ULPM when device is suspended */
+	if (suspend)
+		dsi_link_handle_ulpm(&chnl->port, true);
+	if (dsi_pll_is_enabled && (--dsi_pll_is_enabled == 0)) {
+		struct mcde_platform_data *pdata =
+			    mcde_dev->dev.platform_data;
+		dev_dbg(&mcde_dev->dev, "%s disable dsipll\n",
+							__func__);
+		pdata->platform_disable_dsipll();
+	}
+	clk_disable(clock_dsi);
+	clk_disable(clock_dsi_lp);
+
+	dsi_wfld(chnl->port.link, DSI_MCTL_MAIN_DATA_CTL, LINK_EN, false);
+}
+
+static void disable_mcde_hw(bool force_disable, bool suspend)
 {
 	int i;
 	bool mcde_up = false;
@@ -499,7 +615,10 @@ static void disable_mcde_hw(bool force_disable)
 			set_channel_state_sync(chnl, CHNLSTATE_SUSPEND);
 
 			if (chnl->formatter_updated) {
-				disable_formatter(&chnl->port);
+				if (chnl->port.type == MCDE_PORTTYPE_DSI)
+					dsi_link_disable(chnl, suspend);
+				else if (chnl->port.type == MCDE_PORTTYPE_DPI)
+					clk_disable(clock_dpi);
 				chnl->formatter_updated = false;
 			}
 			if (chnl->esram_is_enabled) {
@@ -1072,30 +1191,11 @@ static int update_channel_static_registers(struct mcde_chnl_state *chnl)
 		int i = 0;
 		u8 idx;
 		u8 lnk = port->link;
-		int ret;
-
-		WARN_ON_ONCE(clk_enable(clock_dsi));
-		WARN_ON_ONCE(clk_enable(clock_dsi_lp));
-
-		if (!dsi_pll_is_enabled) {
-			struct mcde_platform_data *pdata =
-					mcde_dev->dev.platform_data;
-			ret = pdata->platform_enable_dsipll();
-			if (ret < 0) {
-				dev_warn(&mcde_dev->dev, "%s: "
-					"enable_dsipll failed ret = %d\n",
-								__func__, ret);
-				goto enable_dsipll_err;
-			}
-			dev_dbg(&mcde_dev->dev, "%s enable dsipll\n",
-								__func__);
-		}
-		dsi_pll_is_enabled++;
 
 		idx = get_dsi_formatter_id(port);
 
-		dsi_wfld(lnk, DSI_MCTL_MAIN_DATA_CTL, LINK_EN, true);
-		dev_dbg(&mcde_dev->dev, "DSI%d LINK_EN\n", lnk);
+		if (dsi_link_enable(chnl))
+			goto failed_to_enable_link;
 
 		if (port->sync_src == MCDE_SYNCSRC_TE_POLLING) {
 			/* Enable DSI TE polling */
@@ -1126,13 +1226,13 @@ static int update_channel_static_registers(struct mcde_chnl_state *chnl)
 			DSI_MCTL_DPHY_TIMEOUT_LPRX_TO_VAL(0x3fff));
 		dsi_wreg(lnk, DSI_MCTL_MAIN_PHY_CTL,
 			DSI_MCTL_MAIN_PHY_CTL_WAIT_BURST_TIME(0xf) |
+			DSI_MCTL_MAIN_PHY_CTL_CLK_ULPM_EN(true) |
+			DSI_MCTL_MAIN_PHY_CTL_DAT1_ULPM_EN(true) |
+			DSI_MCTL_MAIN_PHY_CTL_DAT2_ULPM_EN(true) |
 			DSI_MCTL_MAIN_PHY_CTL_LANE2_EN(
 				port->phy.dsi.num_data_lanes >= 2) |
 			DSI_MCTL_MAIN_PHY_CTL_CLK_CONTINUOUS(
 				port->phy.dsi.clk_cont));
-		dsi_wreg(lnk, DSI_MCTL_ULPOUT_TIME,
-			DSI_MCTL_ULPOUT_TIME_CKLANE_ULPOUT_TIME(1) |
-			DSI_MCTL_ULPOUT_TIME_DATA_ULPOUT_TIME(1));
 		/* TODO: make enum */
 		dsi_wfld(lnk, DSI_CMD_MODE_CTL, ARB_MODE, false);
 		/* TODO: make enum */
@@ -1189,15 +1289,8 @@ static int update_channel_static_registers(struct mcde_chnl_state *chnl)
 
 	return 0;
 dsi_link_error:
-	if (dsi_pll_is_enabled && (--dsi_pll_is_enabled == 0)) {
-		struct mcde_platform_data *pdata =
-				mcde_dev->dev.platform_data;
-		dev_dbg(&mcde_dev->dev, "%s le:disable dsipll\n", __func__);
-		pdata->platform_disable_dsipll();
-	}
-enable_dsipll_err:
-	clk_disable(clock_dsi_lp);
-	clk_disable(clock_dsi);
+	dsi_link_disable(chnl, true);
+failed_to_enable_link:
 	return -EINVAL;
 }
 
@@ -1578,7 +1671,7 @@ static void work_sleep_function(struct work_struct *ptr)
 	dev_vdbg(&mcde_dev->dev, "%s\n", __func__);
 	if (mcde_trylock(__func__, __LINE__)) {
 		if (mcde_dynamic_power_management)
-			disable_mcde_hw(false);
+			disable_mcde_hw(false, false);
 		mcde_unlock(__func__, __LINE__);
 	}
 }
@@ -2891,7 +2984,7 @@ void mcde_chnl_put(struct mcde_chnl_state *chnl)
 	if (chnl->enabled) {
 		stop_channel(chnl);
 		cancel_delayed_work(&hw_timeout_work);
-		disable_mcde_hw(false);
+		disable_mcde_hw(false, true);
 		chnl->enabled = false;
 	}
 
@@ -2937,7 +3030,7 @@ void mcde_chnl_disable(struct mcde_chnl_state *chnl)
 	cancel_delayed_work(&hw_timeout_work);
 	/* The channel must be stopped before it is disabled */
 	WARN_ON_ONCE(chnl->state == CHNLSTATE_RUNNING);
-	disable_mcde_hw(false);
+	disable_mcde_hw(false, true);
 	chnl->enabled = false;
 	mcde_unlock(__func__, __LINE__);
 
@@ -3522,7 +3615,7 @@ static int mcde_suspend(struct platform_device *pdev, pm_message_t state)
 		mcde_unlock(__func__, __LINE__);
 		return 0;
 	}
-	disable_mcde_hw(true);
+	disable_mcde_hw(true, true);
 
 	mcde_unlock(__func__, __LINE__);
 
-- 
cgit v1.2.3


From f09d754db1ebe952fa17448f8624501f50772bbf Mon Sep 17 00:00:00 2001
From: Jörgen Nilsson <jorgen.nilsson@stericsson.com>
Date: Fri, 11 Nov 2011 14:08:37 +0100
Subject: b2r2: Support in driver for multiple b2r2 devices
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

The b2r2 driver needs to support dual configuration for
9540. The patch contains multi device support, however
the upper bound is capped to one. The cap needs to be
raised when the driver has been verified to work with the
9540 HW.

ST-Ericsson Linux next: NA
ST-Ericsson ID: 355461
ST-Ericsson FOSS-OUT ID: Trivial
Signed-off-by: Jörgen Nilsson <jorgen.nilsson@stericsson.com>

Change-Id: Ide0f860f70fae3565e161775a6c99fd9214dc5ac
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/37633
Reviewed-by: Maciej SOCHA <maciej.socha@stericsson.com>
Reviewed-by: QABUILD
Reviewed-by: Jorgen NILSSON <jorgen.nilsson@stericsson.com>
Tested-by: Jorgen NILSSON <jorgen.nilsson@stericsson.com>
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Reviewed-by: Robert LIND <robert.lind@stericsson.com>
---
 drivers/video/b2r2/b2r2_blt_main.c               | 1427 +++++++++++-----------
 drivers/video/b2r2/b2r2_core.c                   | 1407 +++++++++++----------
 drivers/video/b2r2/b2r2_core.h                   |  132 +-
 drivers/video/b2r2/b2r2_debug.c                  |  141 ++-
 drivers/video/b2r2/b2r2_debug.h                  |   32 +-
 drivers/video/b2r2/b2r2_filters.c                |   58 +-
 drivers/video/b2r2/b2r2_filters.h                |    6 +-
 drivers/video/b2r2/b2r2_generic.c                |  343 +++---
 drivers/video/b2r2/b2r2_generic.h                |    4 +-
 drivers/video/b2r2/b2r2_input_validation.c       |  139 ++-
 drivers/video/b2r2/b2r2_input_validation.h       |    5 +-
 drivers/video/b2r2/b2r2_internal.h               |  352 +++++-
 drivers/video/b2r2/b2r2_mem_alloc.c              |  374 +++---
 drivers/video/b2r2/b2r2_mem_alloc.h              |   53 +-
 drivers/video/b2r2/b2r2_node_gen.c               |   37 +-
 drivers/video/b2r2/b2r2_node_split.c             |  655 +++++-----
 drivers/video/b2r2/b2r2_node_split.h             |   17 +-
 drivers/video/b2r2/b2r2_profiler/b2r2_profiler.c |  152 +--
 drivers/video/b2r2/b2r2_profiler_socket.c        |    7 +-
 drivers/video/b2r2/b2r2_utils.c                  |  104 +-
 drivers/video/b2r2/b2r2_utils.h                  |   21 +-
 21 files changed, 2895 insertions(+), 2571 deletions(-)

diff --git a/drivers/video/b2r2/b2r2_blt_main.c b/drivers/video/b2r2/b2r2_blt_main.c
index 51087e4b437..f79bfaee9ab 100644
--- a/drivers/video/b2r2/b2r2_blt_main.c
+++ b/drivers/video/b2r2/b2r2_blt_main.c
@@ -44,6 +44,8 @@
 #include "b2r2_debug.h"
 #include "b2r2_utils.h"
 #include "b2r2_input_validation.h"
+#include "b2r2_core.h"
+#include "b2r2_filters.h"
 
 #define B2R2_HEAP_SIZE (4 * PAGE_SIZE)
 #define MAX_TMP_BUF_SIZE (128 * PAGE_SIZE)
@@ -59,93 +61,22 @@
  */
 
 /**
- * b2r2_blt_dev - Our device, /dev/b2r2_blt
+ * b2r2_blt_dev - Our device(s), /dev/b2r2_blt
  */
-static struct miscdevice *b2r2_blt_dev;
-
-static struct {
-	struct b2r2_work_buf buf;
-	bool in_use;
-} tmp_bufs[MAX_TMP_BUFS_NEEDED];
-
-/* Statistics */
-
-/**
- * stat_lock - Spin lock protecting the statistics
- */
-static struct mutex   stat_lock;
-/**
- * stat_n_jobs_added - Number of jobs added to b2r2_core
- */
-static unsigned long stat_n_jobs_added;
-/**
- * stat_n_jobs_released - Number of jobs released (job_release called)
- */
-static unsigned long stat_n_jobs_released;
-/**
- * stat_n_jobs_in_report_list - Number of jobs currently in the report list
- */
-static unsigned long stat_n_jobs_in_report_list;
-/**
- * stat_n_in_blt - Number of client threads currently exec inside b2r2_blt()
- */
-static unsigned long stat_n_in_blt;
-/**
- * stat_n_in_blt_synch - Nunmber of client threads currently waiting for synch
- */
-static unsigned long stat_n_in_blt_synch;
-/**
- * stat_n_in_blt_add - Number of client threads currenlty adding in b2r2_blt
- */
-static unsigned long stat_n_in_blt_add;
-/**
- * stat_n_in_blt_wait - Number of client threads currently waiting in b2r2_blt
- */
-static unsigned long stat_n_in_blt_wait;
-/**
- * stat_n_in_sync_0 - Number of client threads currently in b2r2_blt_sync
- *                    waiting for all client jobs to finish
- */
-static unsigned long stat_n_in_synch_0;
-/**
- * stat_n_in_sync_job - Number of client threads currently in b2r2_blt_sync
- *                      waiting specific job to finish
- */
-static unsigned long stat_n_in_synch_job;
-/**
- * stat_n_in_query_cap - Number of clients currently in query cap
- */
-static unsigned long stat_n_in_query_cap;
-/**
- * stat_n_in_open - Number of clients currently in b2r2_blt_open
- */
-static unsigned long stat_n_in_open;
-/**
- * stat_n_in_release - Number of clients currently in b2r2_blt_release
- */
-static unsigned long stat_n_in_release;
+static struct b2r2_control *b2r2_ctl[B2R2_MAX_NBR_DEVICES];
 
 /* Debug file system support */
 #ifdef CONFIG_DEBUG_FS
-/**
- * debugfs_latest_request - Copy of the latest request issued
- */
-struct b2r2_blt_request debugfs_latest_request;
-/**
- * debugfs_root_dir - The debugfs root directory, i.e. /debugfs/b2r2
- */
-static struct dentry *debugfs_root_dir;
-
 static int sprintf_req(struct b2r2_blt_request *request, char *buf, int size);
 #endif
 
 /* Local functions */
-static void inc_stat(unsigned long *stat);
-static void dec_stat(unsigned long *stat);
+static void inc_stat(struct b2r2_control *cont, unsigned long *stat);
+static void dec_stat(struct b2r2_control *cont, unsigned long *stat);
 static int b2r2_blt_synch(struct b2r2_blt_instance *instance,
-			int request_id);
+		int request_id);
 static int b2r2_blt_query_cap(struct b2r2_blt_instance *instance,
-			struct b2r2_blt_query_cap *query_cap);
+		struct b2r2_blt_query_cap *query_cap);
 
 #ifndef CONFIG_B2R2_GENERIC_ONLY
 static int b2r2_blt(struct b2r2_blt_instance *instance,
@@ -170,25 +101,24 @@ static void tile_job_release_gen(struct b2r2_core_job *job);
 #endif
 
 
-static int resolve_buf(struct b2r2_blt_img *img,
-			struct b2r2_blt_rect *rect_2b_used,
-			bool is_dst,
-		struct b2r2_resolved_buf *resolved);
-static void unresolve_buf(struct b2r2_blt_buf *buf,
-			struct b2r2_resolved_buf *resolved);
-static void sync_buf(struct b2r2_blt_img *img,
-		struct b2r2_resolved_buf *resolved,
-		bool is_dst,
+static int resolve_buf(struct b2r2_control *cont,
+		struct b2r2_blt_img *img, struct b2r2_blt_rect *rect_2b_used,
+		bool is_dst, struct b2r2_resolved_buf *resolved);
+static void unresolve_buf(struct b2r2_control *cont,
+		struct b2r2_blt_buf *buf, struct b2r2_resolved_buf *resolved);
+static void sync_buf(struct b2r2_control *cont, struct b2r2_blt_img *img,
+		struct b2r2_resolved_buf *resolved, bool is_dst,
 		struct b2r2_blt_rect *rect);
 static bool is_report_list_empty(struct b2r2_blt_instance *instance);
 static bool is_synching(struct b2r2_blt_instance *instance);
 static void get_actual_dst_rect(struct b2r2_blt_req *req,
-					struct b2r2_blt_rect *actual_dst_rect);
-static void set_up_hwmem_region(struct b2r2_blt_img *img,
-		struct b2r2_blt_rect *rect, struct hwmem_region *region);
-static int resolve_hwmem(struct b2r2_blt_img *img,
-			struct b2r2_blt_rect *rect_2b_used, bool is_dst,
-				struct b2r2_resolved_buf *resolved_buf);
+		struct b2r2_blt_rect *actual_dst_rect);
+static void set_up_hwmem_region(struct b2r2_control *cont,
+		struct b2r2_blt_img *img, struct b2r2_blt_rect *rect,
+		struct hwmem_region *region);
+static int resolve_hwmem(struct b2r2_control *cont, struct b2r2_blt_img *img,
+		struct b2r2_blt_rect *rect_2b_used, bool is_dst,
+		struct b2r2_resolved_buf *resolved_buf);
 static void unresolve_hwmem(struct b2r2_resolved_buf *resolved_buf);
 
 /**
@@ -202,7 +132,8 @@ struct sync_args {
 	unsigned long end;
 };
 /**
- * flush_l1_cache_range_curr_cpu() - Cleans and invalidates L1 cache on the current CPU
+ * flush_l1_cache_range_curr_cpu() - Cleans and invalidates L1 cache on the
+ * current CPU
  *
  * @arg: Pointer to sync_args structure
  */
@@ -269,16 +200,17 @@ static int b2r2_blt_open(struct inode *inode, struct file *filp)
 {
 	int ret = 0;
 	struct b2r2_blt_instance *instance;
+	struct b2r2_control *cont = filp->private_data;
 
-	b2r2_log_info("%s\n", __func__);
+	b2r2_log_info(cont->dev, "%s\n", __func__);
 
-	inc_stat(&stat_n_in_open);
+	inc_stat(cont, &cont->stat_n_in_open);
 
 	/* Allocate and initialize the instance */
 	instance = (struct b2r2_blt_instance *)
 		kmalloc(sizeof(*instance), GFP_KERNEL);
 	if (!instance) {
-		b2r2_log_err("%s: Failed to alloc\n", __func__);
+		b2r2_log_err(cont->dev, "%s: Failed to alloc\n", __func__);
 		goto instance_alloc_failed;
 	}
 	memset(instance, 0, sizeof(*instance));
@@ -286,6 +218,7 @@ static int b2r2_blt_open(struct inode *inode, struct file *filp)
 	mutex_init(&instance->lock);
 	init_waitqueue_head(&instance->report_list_waitq);
 	init_waitqueue_head(&instance->synch_done_waitq);
+	instance->control = cont;
 
 	/*
 	 * Remember the instance so that we can retrieve it in
@@ -296,7 +229,7 @@ static int b2r2_blt_open(struct inode *inode, struct file *filp)
 
 instance_alloc_failed:
 out:
-	dec_stat(&stat_n_in_open);
+	dec_stat(cont, &cont->stat_n_in_open);
 
 	return ret;
 }
@@ -314,39 +247,40 @@ out:
 static int b2r2_blt_release(struct inode *inode, struct file *filp)
 {
 	int ret;
-	struct b2r2_blt_instance *instance;
+	struct b2r2_blt_instance *instance =
+			(struct b2r2_blt_instance *) filp->private_data;
+	struct b2r2_control *cont = instance->control;
 
-	b2r2_log_info("%s\n", __func__);
+	b2r2_log_info(cont->dev, "%s\n", __func__);
 
-	inc_stat(&stat_n_in_release);
-
-	instance = (struct b2r2_blt_instance *) filp->private_data;
+	inc_stat(cont, &cont->stat_n_in_release);
 
 	/* Finish all outstanding requests */
 	ret = b2r2_blt_synch(instance, 0);
 	if (ret < 0)
-		b2r2_log_warn(
-			"%s: b2r2_blt_sync failed with %d\n", __func__, ret);
+		b2r2_log_warn(cont->dev, "%s: b2r2_blt_sync failed with %d\n",
+			__func__, ret);
 
 	/* Now cancel any remaining outstanding request */
 	if (instance->no_of_active_requests) {
 		struct b2r2_core_job *job;
 
-		b2r2_log_warn("%s: %d active requests\n",
-			__func__, instance->no_of_active_requests);
+		b2r2_log_warn(cont->dev, "%s: %d active requests\n", __func__,
+			instance->no_of_active_requests);
 
 		/* Find and cancel all jobs belonging to us */
-		job = b2r2_core_job_find_first_with_tag((int) instance);
+		job = b2r2_core_job_find_first_with_tag(cont,
+			(int) instance);
 		while (job) {
 			b2r2_core_job_cancel(job);
 			/* Matches addref in b2r2_core_job_find... */
 			b2r2_core_job_release(job, __func__);
-			job = b2r2_core_job_find_first_with_tag((int) instance);
+			job = b2r2_core_job_find_first_with_tag(cont,
+				(int) instance);
 		}
 
-		b2r2_log_warn(
-			"%s: %d active requests after cancel\n",
-			__func__, instance->no_of_active_requests);
+		b2r2_log_warn(cont->dev, "%s: %d active requests after "
+			"cancel\n", __func__, instance->no_of_active_requests);
 	}
 
 	/* Release jobs in report list */
@@ -370,7 +304,7 @@ static int b2r2_blt_release(struct inode *inode, struct file *filp)
 	/* Release our instance */
 	kfree(instance);
 
-	dec_stat(&stat_n_in_release);
+	dec_stat(cont, &cont->stat_n_in_release);
 
 	return 0;
 }
@@ -388,15 +322,14 @@ static long b2r2_blt_ioctl(struct file *file,
 		unsigned int cmd, unsigned long arg)
 {
 	int ret = 0;
-	struct b2r2_blt_instance *instance;
+	struct b2r2_blt_instance *instance =
+			(struct b2r2_blt_instance *) file->private_data;
+	struct b2r2_control *cont = instance->control;
 
 	/** Process actual ioctl */
-
-	b2r2_log_info("%s\n", __func__);
+	b2r2_log_info(cont->dev, "%s\n", __func__);
 
 	/* Get the instance from the file structure */
-	instance = (struct b2r2_blt_instance *) file->private_data;
-
 	switch (cmd) {
 	case B2R2_BLT_IOC: {
 		/* This is the "blit" command */
@@ -405,7 +338,7 @@ static long b2r2_blt_ioctl(struct file *file,
 		struct b2r2_blt_request *request =
 			kmalloc(sizeof(*request), GFP_KERNEL);
 		if (!request) {
-			b2r2_log_err("%s: Failed to alloc mem\n",
+			b2r2_log_err(cont->dev, "%s: Failed to alloc mem\n",
 				__func__);
 			return -ENOMEM;
 		}
@@ -423,14 +356,13 @@ static long b2r2_blt_ioctl(struct file *file,
 		/* Get the user data */
 		if (copy_from_user(&request->user_req, (void *)arg,
 				sizeof(request->user_req))) {
-			b2r2_log_err(
-				"%s: copy_from_user failed\n",
+			b2r2_log_err(cont->dev, "%s: copy_from_user failed\n",
 				__func__);
 			kfree(request);
 			return -EFAULT;
 		}
 
-		if (!b2r2_validate_user_req(&request->user_req)) {
+		if (!b2r2_validate_user_req(cont, &request->user_req)) {
 			kfree(request);
 			return -EINVAL;
 		}
@@ -443,22 +375,24 @@ static long b2r2_blt_ioctl(struct file *file,
 		 */
 		if ((request->user_req.flags &
 				B2R2_BLT_FLAG_CLUT_COLOR_CORRECTION) != 0) {
-			request->clut = dma_alloc_coherent(b2r2_blt_device(),
+			request->clut = dma_alloc_coherent(cont->dev,
 				CLUT_SIZE, &(request->clut_phys_addr),
 				GFP_DMA | GFP_KERNEL);
 			if (request->clut == NULL) {
-				b2r2_log_err("%s CLUT allocation failed.\n",
-					__func__);
+				b2r2_log_err(cont->dev, "%s CLUT allocation "
+					"failed.\n", __func__);
 				kfree(request);
 				return -ENOMEM;
 			}
 
 			if (copy_from_user(request->clut,
 					request->user_req.clut, CLUT_SIZE)) {
-				b2r2_log_err("%s: CLUT copy_from_user failed\n",
+				b2r2_log_err(cont->dev, "%s: CLUT "
+					"copy_from_user failed\n",
 					__func__);
-				dma_free_coherent(b2r2_blt_device(), CLUT_SIZE,
-					request->clut, request->clut_phys_addr);
+				dma_free_coherent(cont->dev, CLUT_SIZE,
+					request->clut,
+					request->clut_phys_addr);
 				request->clut = NULL;
 				request->clut_phys_addr = 0;
 				kfree(request);
@@ -482,16 +416,20 @@ static long b2r2_blt_ioctl(struct file *file,
 			struct b2r2_blt_request *request_gen;
 
 			if (request->user_req.flags & B2R2_BLT_FLAG_BG_BLEND) {
-				/* No support for BG BLEND in generic implementation yet */
-				b2r2_log_warn("%s: Unsupported: Background blend in b2r2_generic_blt \n",
+				/* No support for BG BLEND in generic
+				 * implementation yet */
+				b2r2_log_warn(cont->dev, "%s: Unsupported: "
+					"Background blend in b2r2_generic_blt\n",
 					__func__);
 				return ret;
 			}
 
-			b2r2_log_info("b2r2_blt=%d Going generic.\n", ret);
+			b2r2_log_info(cont->dev,
+				"b2r2_blt=%d Going generic.\n", ret);
 			request_gen = kmalloc(sizeof(*request_gen), GFP_KERNEL);
 			if (!request_gen) {
-				b2r2_log_err("%s: Failed to alloc mem for "
+				b2r2_log_err(cont->dev,
+					"%s: Failed to alloc mem for "
 					"request_gen\n", __func__);
 				return -ENOMEM;
 			}
@@ -508,12 +446,11 @@ static long b2r2_blt_ioctl(struct file *file,
 
 			/* Get the user data */
 			if (copy_from_user(&request_gen->user_req, (void *)arg,
-				sizeof(request_gen->user_req))) {
-					b2r2_log_err(
-						"%s: copy_from_user failed\n",
-						__func__);
-					kfree(request_gen);
-					return -EFAULT;
+					sizeof(request_gen->user_req))) {
+				b2r2_log_err(cont->dev, "%s: copy_from_user "
+					"failed\n", __func__);
+				kfree(request_gen);
+				return -EFAULT;
 			}
 
 			/*
@@ -523,14 +460,14 @@ static long b2r2_blt_ioctl(struct file *file,
 			if ((request_gen->user_req.flags &
 					B2R2_BLT_FLAG_CLUT_COLOR_CORRECTION)
 					!= 0) {
-				request_gen->clut =
-					dma_alloc_coherent(b2r2_blt_device(),
-					CLUT_SIZE,
+				request_gen->clut = dma_alloc_coherent(
+					cont->dev, CLUT_SIZE,
 					&(request_gen->clut_phys_addr),
 					GFP_DMA | GFP_KERNEL);
 				if (request_gen->clut == NULL) {
-					b2r2_log_err("%s CLUT allocation "
-						"failed.\n", __func__);
+					b2r2_log_err(cont->dev, "%s CLUT "
+						"allocation failed.\n",
+						__func__);
 					kfree(request_gen);
 					return -ENOMEM;
 				}
@@ -538,10 +475,11 @@ static long b2r2_blt_ioctl(struct file *file,
 				if (copy_from_user(request_gen->clut,
 						request_gen->user_req.clut,
 						CLUT_SIZE)) {
-					b2r2_log_err("%s: CLUT copy_from_user "
-						"failed\n", __func__);
-					dma_free_coherent(b2r2_blt_device(),
-						CLUT_SIZE, request_gen->clut,
+					b2r2_log_err(cont->dev, "%s: CLUT"
+						" copy_from_user failed\n",
+						__func__);
+					dma_free_coherent(cont->dev, CLUT_SIZE,
+						request_gen->clut,
 						request_gen->clut_phys_addr);
 					request_gen->clut = NULL;
 					request_gen->clut_phys_addr = 0;
@@ -553,8 +491,8 @@ static long b2r2_blt_ioctl(struct file *file,
 			request_gen->profile = is_profiler_registered_approx();
 
 			ret = b2r2_generic_blt(instance, request_gen);
-			b2r2_log_info("\nb2r2_generic_blt=%d Generic done.\n",
-				ret);
+			b2r2_log_info(cont->dev, "\nb2r2_generic_blt=%d "
+				"Generic done.\n", ret);
 		}
 #endif /* CONFIG_B2R2_GENERIC_FALLBACK */
 
@@ -562,24 +500,19 @@ static long b2r2_blt_ioctl(struct file *file,
 	}
 
 	case B2R2_BLT_SYNCH_IOC:
-		/* This is the "synch" command */
-
 		/* arg is request_id */
 		ret = b2r2_blt_synch(instance, (int) arg);
 		break;
 
 	case B2R2_BLT_QUERY_CAP_IOC:
 	{
-		/* This is the "query capabilities" command */
-
 		/* Arg is struct b2r2_blt_query_cap */
 		struct b2r2_blt_query_cap query_cap;
 
 		/* Get the user data */
 		if (copy_from_user(&query_cap, (void *)arg,
 				sizeof(query_cap))) {
-			b2r2_log_err(
-				"%s: copy_from_user failed\n",
+			b2r2_log_err(cont->dev, "%s: copy_from_user failed\n",
 				__func__);
 			return -EFAULT;
 		}
@@ -590,7 +523,7 @@ static long b2r2_blt_ioctl(struct file *file,
 		/* Return data to user */
 		if (copy_to_user((void *)arg, &query_cap,
 				sizeof(query_cap))) {
-			b2r2_log_err("%s: copy_to_user failed\n",
+			b2r2_log_err(cont->dev, "%s: copy_to_user failed\n",
 				__func__);
 			return -EFAULT;
 		}
@@ -599,15 +532,14 @@ static long b2r2_blt_ioctl(struct file *file,
 
 	default:
 		/* Unknown command */
-		b2r2_log_err(
-			"%s: Unknown cmd %d\n", __func__, cmd);
+		b2r2_log_err(cont->dev, "%s: Unknown cmd %d\n", __func__, cmd);
 		ret = -EINVAL;
 		break;
 
 	}
 
 	if (ret < 0)
-		b2r2_log_err("EC %d OK!\n", -ret);
+		b2r2_log_err(cont->dev, "EC %d OK!\n", -ret);
 
 	return ret;
 }
@@ -623,13 +555,14 @@ static long b2r2_blt_ioctl(struct file *file,
  */
 static unsigned b2r2_blt_poll(struct file *filp, poll_table *wait)
 {
-	struct b2r2_blt_instance *instance;
+	struct b2r2_blt_instance *instance =
+			(struct b2r2_blt_instance *) filp->private_data;
 	unsigned int mask = 0;
+#ifdef CONFIG_B2R2_DEBUG
+	struct b2r2_control *cont = instance->control;
+#endif
 
-	b2r2_log_info("%s\n", __func__);
-
-	/* Get the instance from the file structure */
-	instance = (struct b2r2_blt_instance *) filp->private_data;
+	b2r2_log_info(cont->dev, "%s\n", __func__);
 
 	poll_wait(filp, &instance->report_list_waitq, wait);
 	mutex_lock(&instance->lock);
@@ -654,14 +587,15 @@ static ssize_t b2r2_blt_read(struct file *filp, char __user *buf, size_t count,
 			loff_t *f_pos)
 {
 	int ret = 0;
-	struct b2r2_blt_instance *instance;
-	struct b2r2_blt_request *request;
+	struct b2r2_blt_request *request = NULL;
 	struct b2r2_blt_report report;
+	struct b2r2_blt_instance *instance =
+		(struct b2r2_blt_instance *) filp->private_data;
+#ifdef CONFIG_B2R2_DEBUG
+	struct b2r2_control *cont = instance->control;
+#endif
 
-	b2r2_log_info("%s\n", __func__);
-
-	/* Get the instance from the file structure */
-	instance = (struct b2r2_blt_instance *) filp->private_data;
+	b2r2_log_info(cont->dev, "%s\n", __func__);
 
 	/*
 	 * We return only complete report records, one at a time.
@@ -686,10 +620,10 @@ static ssize_t b2r2_blt_read(struct file *filp, char __user *buf, size_t count,
 		if (filp->f_flags & O_NONBLOCK)
 			return -EAGAIN;
 
-		b2r2_log_info("%s - Going to sleep\n", __func__);
+		b2r2_log_info(cont->dev, "%s - Going to sleep\n", __func__);
 		if (wait_event_interruptible(
-			instance->report_list_waitq,
-			!is_report_list_empty(instance)))
+				instance->report_list_waitq,
+				!is_report_list_empty(instance)))
 			/* signal: tell the fs layer to handle it */
 			return -ERESTARTSYS;
 
@@ -697,10 +631,6 @@ static ssize_t b2r2_blt_read(struct file *filp, char __user *buf, size_t count,
 		mutex_lock(&instance->lock);
 	}
 
-	/* Ok, we have something to return */
-
-	/* Return */
-	request = NULL;
 	if (!list_empty(&instance->report_list))
 		request = list_first_entry(
 			&instance->report_list, struct b2r2_blt_request, list);
@@ -715,16 +645,14 @@ static ssize_t b2r2_blt_read(struct file *filp, char __user *buf, size_t count,
 		report.usec_elapsed = 0; /* TBD */
 
 		mutex_unlock(&instance->lock);
-		if (copy_to_user(buf,
-				&report,
-				sizeof(report)))
+		if (copy_to_user(buf, &report, sizeof(report)))
 			ret = -EFAULT;
 		mutex_lock(&instance->lock);
 
-		if (ret) {
+		if (ret < 0) {
 			/* copy to user failed, re-insert into list */
 			list_add(&request->list,
-				&request->instance->report_list);
+					&request->instance->report_list);
 			request = NULL;
 		}
 	}
@@ -752,16 +680,6 @@ static const struct file_operations b2r2_blt_fops = {
 	.read  =          b2r2_blt_read,
 };
 
-/**
- * b2r2_blt_misc_dev - Misc device config for b2r2_blt
- */
-static struct miscdevice b2r2_blt_misc_dev = {
-	MISC_DYNAMIC_MINOR,
-	"b2r2_blt",
-	&b2r2_blt_fops
-};
-
-
 #ifndef CONFIG_B2R2_GENERIC_ONLY
 /**
  * b2r2_blt - Implementation of the B2R2 blit request
@@ -777,6 +695,7 @@ static int b2r2_blt(struct b2r2_blt_instance *instance,
 	int request_id = 0;
 	struct b2r2_node *last_node = request->first_node;
 	int node_count;
+	struct b2r2_control *cont = instance->control;
 
 	u32 thread_runtime_at_start = 0;
 
@@ -785,12 +704,12 @@ static int b2r2_blt(struct b2r2_blt_instance *instance,
 		thread_runtime_at_start = (u32)task_sched_runtime(current);
 	}
 
-	b2r2_log_info("%s\n", __func__);
+	b2r2_log_info(cont->dev, "%s\n", __func__);
 
-	inc_stat(&stat_n_in_blt);
+	inc_stat(cont, &cont->stat_n_in_blt);
 
 	/* Debug prints of incoming request */
-	b2r2_log_info(
+	b2r2_log_info(cont->dev,
 		"src.fmt=%#010x src.buf={%d,%d,%d} "
 		"src.w,h={%d,%d} src.rect={%d,%d,%d,%d}\n",
 		request->user_req.src_img.fmt,
@@ -804,23 +723,22 @@ static int b2r2_blt(struct b2r2_blt_instance *instance,
 		request->user_req.src_rect.width,
 		request->user_req.src_rect.height);
 
-	if (request->user_req.flags & B2R2_BLT_FLAG_BG_BLEND) {
-		b2r2_log_info(
-				"bg.fmt=%#010x bg.buf={%d,%d,%d} "
-				"bg.w,h={%d,%d} bg.rect={%d,%d,%d,%d}\n",
-				request->user_req.bg_img.fmt,
-				request->user_req.bg_img.buf.type,
-				request->user_req.bg_img.buf.fd,
-				request->user_req.bg_img.buf.offset,
-				request->user_req.bg_img.width,
-				request->user_req.bg_img.height,
-				request->user_req.bg_rect.x,
-				request->user_req.bg_rect.y,
-				request->user_req.bg_rect.width,
-				request->user_req.bg_rect.height);
-	}
-
-	b2r2_log_info(
+	if (request->user_req.flags & B2R2_BLT_FLAG_BG_BLEND)
+		b2r2_log_info(cont->dev,
+			"bg.fmt=%#010x bg.buf={%d,%d,%d} "
+			"bg.w,h={%d,%d} bg.rect={%d,%d,%d,%d}\n",
+			request->user_req.bg_img.fmt,
+			request->user_req.bg_img.buf.type,
+			request->user_req.bg_img.buf.fd,
+			request->user_req.bg_img.buf.offset,
+			request->user_req.bg_img.width,
+			request->user_req.bg_img.height,
+			request->user_req.bg_rect.x,
+			request->user_req.bg_rect.y,
+			request->user_req.bg_rect.width,
+			request->user_req.bg_rect.height);
+
+	b2r2_log_info(cont->dev,
 		"dst.fmt=%#010x dst.buf={%d,%d,%d} "
 		"dst.w,h={%d,%d} dst.rect={%d,%d,%d,%d}\n",
 		request->user_req.dst_img.fmt,
@@ -834,74 +752,71 @@ static int b2r2_blt(struct b2r2_blt_instance *instance,
 		request->user_req.dst_rect.width,
 		request->user_req.dst_rect.height);
 
-	inc_stat(&stat_n_in_blt_synch);
+	inc_stat(cont, &cont->stat_n_in_blt_synch);
 
 	/* Wait here if synch is ongoing */
 	ret = wait_event_interruptible(instance->synch_done_waitq,
-				!is_synching(instance));
+			!is_synching(instance));
 	if (ret) {
-		b2r2_log_warn(
-			"%s: Sync wait interrupted, %d\n",
+		b2r2_log_warn(cont->dev, "%s: Sync wait interrupted, %d\n",
 			__func__, ret);
 		ret = -EAGAIN;
-		dec_stat(&stat_n_in_blt_synch);
+		dec_stat(cont, &cont->stat_n_in_blt_synch);
 		goto synch_interrupted;
 	}
 
-	dec_stat(&stat_n_in_blt_synch);
+	dec_stat(cont, &cont->stat_n_in_blt_synch);
 
 	/* Resolve the buffers */
 
 	/* Source buffer */
-	ret = resolve_buf(&request->user_req.src_img,
-		&request->user_req.src_rect, false, &request->src_resolved);
+	ret = resolve_buf(cont, &request->user_req.src_img,
+		&request->user_req.src_rect,
+		false, &request->src_resolved);
 	if (ret < 0) {
-		b2r2_log_warn(
-			"%s: Resolve src buf failed, %d\n",
-			__func__, ret);
+		b2r2_log_warn(cont->dev, "%s: Resolve src buf failed, %d\n",
+				__func__, ret);
 		ret = -EAGAIN;
 		goto resolve_src_buf_failed;
 	}
 
 	/* Background buffer */
 	if (request->user_req.flags & B2R2_BLT_FLAG_BG_BLEND) {
-		ret = resolve_buf(&request->user_req.bg_img,
-				&request->user_req.bg_rect, false, &request->bg_resolved);
+		ret = resolve_buf(cont, &request->user_req.bg_img,
+			&request->user_req.bg_rect,
+			false, &request->bg_resolved);
 		if (ret < 0) {
-			b2r2_log_warn(
-				"%s: Resolve bg buf failed, %d\n",
-				__func__, ret);
+			b2r2_log_warn(cont->dev, "%s: Resolve bg buf failed,"
+				" %d\n", __func__, ret);
 			ret = -EAGAIN;
 			goto resolve_bg_buf_failed;
 		}
 	}
 
 	/* Source mask buffer */
-	ret = resolve_buf(&request->user_req.src_mask,
+	ret = resolve_buf(cont, &request->user_req.src_mask,
 			&request->user_req.src_rect, false,
 			&request->src_mask_resolved);
 	if (ret < 0) {
-		b2r2_log_warn(
-			"%s: Resolve src mask buf failed, %d\n",
-			__func__, ret);
+		b2r2_log_warn(cont->dev, "%s: Resolve src mask buf failed,"
+			" %d\n", __func__, ret);
 		ret = -EAGAIN;
 		goto resolve_src_mask_buf_failed;
 	}
 
 	/* Destination buffer */
 	get_actual_dst_rect(&request->user_req, &actual_dst_rect);
-	ret = resolve_buf(&request->user_req.dst_img, &actual_dst_rect,
-			true, &request->dst_resolved);
+	ret = resolve_buf(cont, &request->user_req.dst_img, &actual_dst_rect,
+		true, &request->dst_resolved);
 	if (ret < 0) {
-		b2r2_log_warn(
-			"%s: Resolve dst buf failed, %d\n",
+		b2r2_log_warn(cont->dev, "%s: Resolve dst buf failed, %d\n",
 			__func__, ret);
 		ret = -EAGAIN;
 		goto resolve_dst_buf_failed;
 	}
 
 	/* Debug prints of resolved buffers */
-	b2r2_log_info("src.rbuf={%X,%p,%d} {%p,%X,%X,%d}\n",
+	b2r2_log_info(cont->dev, "src.rbuf={%X,%p,%d} {%p,%X,%X,%d}\n",
 		request->src_resolved.physical_address,
 		request->src_resolved.virtual_address,
 		request->src_resolved.is_pmem,
@@ -910,8 +825,8 @@ static int b2r2_blt(struct b2r2_blt_instance *instance,
 		request->src_resolved.file_virtual_start,
 		request->src_resolved.file_len);
 
-	if (request->user_req.flags & B2R2_BLT_FLAG_BG_BLEND) {
-		b2r2_log_info("bg.rbuf={%X,%p,%d} {%p,%X,%X,%d}\n",
+	if (request->user_req.flags & B2R2_BLT_FLAG_BG_BLEND)
+		b2r2_log_info(cont->dev, "bg.rbuf={%X,%p,%d} {%p,%X,%X,%d}\n",
 			request->bg_resolved.physical_address,
 			request->bg_resolved.virtual_address,
 			request->bg_resolved.is_pmem,
@@ -919,9 +834,8 @@ static int b2r2_blt(struct b2r2_blt_instance *instance,
 			request->bg_resolved.file_physical_start,
 			request->bg_resolved.file_virtual_start,
 			request->bg_resolved.file_len);
-	}
 
-	b2r2_log_info("dst.rbuf={%X,%p,%d} {%p,%X,%X,%d}\n",
+	b2r2_log_info(cont->dev, "dst.rbuf={%X,%p,%d} {%p,%X,%X,%d}\n",
 		request->dst_resolved.physical_address,
 		request->dst_resolved.virtual_address,
 		request->dst_resolved.is_pmem,
@@ -931,33 +845,33 @@ static int b2r2_blt(struct b2r2_blt_instance *instance,
 		request->dst_resolved.file_len);
 
 	/* Calculate the number of nodes (and resources) needed for this job */
-	ret = b2r2_node_split_analyze(request, MAX_TMP_BUF_SIZE,
-			&node_count, &request->bufs, &request->buf_count,
-			&request->node_split_job);
+	ret = b2r2_node_split_analyze(request, MAX_TMP_BUF_SIZE, &node_count,
+		&request->bufs, &request->buf_count,
+		&request->node_split_job);
 	if (ret == -ENOSYS) {
 		/* There was no optimized path for this request */
-		b2r2_log_info(
-			"%s: No optimized path for request\n", __func__);
+		b2r2_log_info(cont->dev, "%s: No optimized path for request\n",
+			__func__);
 		goto no_optimized_path;
 
 	} else if (ret < 0) {
-		b2r2_log_warn(
-			"%s: Failed to analyze request, ret = %d\n",
-			__func__, ret);
+		b2r2_log_warn(cont->dev, "%s: Failed to analyze request,"
+			" ret = %d\n", __func__, ret);
 #ifdef CONFIG_DEBUG_FS
 		{
 			/* Failed, dump job to dmesg */
 			char *Buf = kmalloc(sizeof(char) * 4096, GFP_KERNEL);
 
-			b2r2_log_info(
-				"%s: Analyze failed for:\n", __func__);
+			b2r2_log_info(cont->dev, "%s: Analyze failed for:\n",
+				__func__);
 			if (Buf != NULL) {
 				sprintf_req(request, Buf, sizeof(char) * 4096);
-				b2r2_log_info("%s", Buf);
+				b2r2_log_info(cont->dev, "%s", Buf);
 				kfree(Buf);
 			} else {
-				b2r2_log_info("Unable to print the request. "
-					"Message buffer allocation failed.\n");
+				b2r2_log_info(cont->dev, "Unable to print the"
+					" request. Message buffer"
+					" allocation failed.\n");
 			}
 		}
 #endif
@@ -966,17 +880,17 @@ static int b2r2_blt(struct b2r2_blt_instance *instance,
 
 	/* Allocate the nodes needed */
 #ifdef B2R2_USE_NODE_GEN
-	request->first_node = b2r2_blt_alloc_nodes(node_count);
+	request->first_node = b2r2_blt_alloc_nodes(cont,
+		node_count);
 	if (request->first_node == NULL) {
-		b2r2_log_warn(
-			"%s: Failed to allocate nodes, ret = %d\n",
-			__func__, ret);
+		b2r2_log_warn(cont->dev, "%s: Failed to allocate nodes,"
+			" ret = %d\n", __func__, ret);
 		goto generate_nodes_failed;
 	}
 #else
-	ret = b2r2_node_alloc(node_count, &(request->first_node));
+	ret = b2r2_node_alloc(cont, node_count, &(request->first_node));
 	if (ret < 0 || request->first_node == NULL) {
-		b2r2_log_warn(
+		b2r2_log_warn(cont->dev,
 			"%s: Failed to allocate nodes, ret = %d\n",
 			__func__, ret);
 		goto generate_nodes_failed;
@@ -984,12 +898,12 @@ static int b2r2_blt(struct b2r2_blt_instance *instance,
 #endif
 
 	/* Build the B2R2 node list */
-	ret = b2r2_node_split_configure(&request->node_split_job,
+	ret = b2r2_node_split_configure(cont, &request->node_split_job,
 			request->first_node);
 
 	if (ret < 0) {
-		b2r2_log_warn(
-			"%s: Failed to perform node split, ret = %d\n",
+		b2r2_log_warn(cont->dev, "%s:"
+			" Failed to perform node split, ret = %d\n",
 			__func__, ret);
 		goto generate_nodes_failed;
 	}
@@ -1022,24 +936,21 @@ static int b2r2_blt(struct b2r2_blt_instance *instance,
 			(request->user_req.src_img.buf.type !=
 				B2R2_BLT_PTR_PHYSICAL) &&
 			!b2r2_is_mb_fmt(request->user_req.src_img.fmt))
-			/* MB formats are never touched by SW */
-		sync_buf(&request->user_req.src_img,
-			&request->src_resolved,
-			false, /*is_dst*/
+		/* MB formats are never touched by SW */
+		sync_buf(cont, &request->user_req.src_img,
+			&request->src_resolved, false,
 			&request->user_req.src_rect);
 
 	/* Background buffer */
-	if ((request->user_req.flags &
-				B2R2_BLT_FLAG_BG_BLEND) &&
+	if ((request->user_req.flags & B2R2_BLT_FLAG_BG_BLEND) &&
 			!(request->user_req.flags &
 				B2R2_BLT_FLAG_BG_NO_CACHE_FLUSH) &&
 			(request->user_req.bg_img.buf.type !=
 				B2R2_BLT_PTR_PHYSICAL) &&
 			!b2r2_is_mb_fmt(request->user_req.bg_img.fmt))
-				/* MB formats are never touched by SW */
-		sync_buf(&request->user_req.bg_img,
-			&request->bg_resolved,
-			false, /*is_dst*/
+		/* MB formats are never touched by SW */
+		sync_buf(cont, &request->user_req.bg_img,
+			&request->bg_resolved, false,
 			&request->user_req.bg_rect);
 
 	/* Source mask buffer */
@@ -1048,11 +959,9 @@ static int b2r2_blt(struct b2r2_blt_instance *instance,
 			(request->user_req.src_mask.buf.type !=
 				B2R2_BLT_PTR_PHYSICAL) &&
 			!b2r2_is_mb_fmt(request->user_req.src_mask.fmt))
-			/* MB formats are never touched by SW */
-		sync_buf(&request->user_req.src_mask,
-			&request->src_mask_resolved,
-			false, /*is_dst*/
-			NULL);
+		/* MB formats are never touched by SW */
+		sync_buf(cont, &request->user_req.src_mask,
+			&request->src_mask_resolved, false, NULL);
 
 	/* Destination buffer */
 	if (!(request->user_req.flags &
@@ -1060,21 +969,20 @@ static int b2r2_blt(struct b2r2_blt_instance *instance,
 			(request->user_req.dst_img.buf.type !=
 				B2R2_BLT_PTR_PHYSICAL) &&
 			!b2r2_is_mb_fmt(request->user_req.dst_img.fmt))
-			/* MB formats are never touched by SW */
-		sync_buf(&request->user_req.dst_img,
-			&request->dst_resolved,
-			true, /*is_dst*/
+		/* MB formats are never touched by SW */
+		sync_buf(cont, &request->user_req.dst_img,
+			&request->dst_resolved, true,
 			&request->user_req.dst_rect);
 
 #ifdef CONFIG_DEBUG_FS
 	/* Remember latest request for debugfs */
-	debugfs_latest_request = *request;
+	cont->debugfs_latest_request = *request;
 #endif
 
 	/* Submit the job */
-	b2r2_log_info("%s: Submitting job\n", __func__);
+	b2r2_log_info(cont->dev, "%s: Submitting job\n", __func__);
 
-	inc_stat(&stat_n_in_blt_add);
+	inc_stat(cont, &cont->stat_n_in_blt_add);
 
 	if (request->profile)
 		request->nsec_active_in_cpu =
@@ -1084,42 +992,41 @@ static int b2r2_blt(struct b2r2_blt_instance *instance,
 	mutex_lock(&instance->lock);
 
 	/* Add the job to b2r2_core */
-	request_id = b2r2_core_job_add(&request->job);
+	request_id = b2r2_core_job_add(cont, &request->job);
 	request->request_id = request_id;
 
-	dec_stat(&stat_n_in_blt_add);
+	dec_stat(cont, &cont->stat_n_in_blt_add);
 
 	if (request_id < 0) {
-		b2r2_log_warn("%s: Failed to add job, ret = %d\n",
+		b2r2_log_warn(cont->dev, "%s: Failed to add job, ret = %d\n",
 			__func__, request_id);
 		ret = request_id;
 		mutex_unlock(&instance->lock);
 		goto job_add_failed;
 	}
 
-	inc_stat(&stat_n_jobs_added);
+	inc_stat(cont, &cont->stat_n_jobs_added);
 
 	instance->no_of_active_requests++;
 	mutex_unlock(&instance->lock);
 
 	/* Wait for the job to be done if synchronous */
 	if ((request->user_req.flags & B2R2_BLT_FLAG_ASYNCH) == 0) {
-		b2r2_log_info("%s: Synchronous, waiting\n",
+		b2r2_log_info(cont->dev, "%s: Synchronous, waiting\n",
 			__func__);
 
-		inc_stat(&stat_n_in_blt_wait);
+		inc_stat(cont, &cont->stat_n_in_blt_wait);
 
 		ret = b2r2_core_job_wait(&request->job);
 
-		dec_stat(&stat_n_in_blt_wait);
+		dec_stat(cont, &cont->stat_n_in_blt_wait);
 
 		if (ret < 0 && ret != -ENOENT)
-			b2r2_log_warn(
-				"%s: Failed to wait job, ret = %d\n",
-				__func__, ret);
+			b2r2_log_warn(cont->dev, "%s: Failed to wait job,"
+				" ret = %d\n", __func__, ret);
 		else
-			b2r2_log_info(
-				"%s: Synchronous wait done\n", __func__);
+			b2r2_log_info(cont->dev, "%s: Synchronous wait done\n",
+				__func__);
 		ret = 0;
 	}
 
@@ -1128,8 +1035,7 @@ static int b2r2_blt(struct b2r2_blt_instance *instance,
 	 * the request must not be accessed after this call
 	 */
 	b2r2_core_job_release(&request->job, __func__);
-
-	dec_stat(&stat_n_in_blt);
+	dec_stat(cont, &cont->stat_n_in_blt);
 
 	return ret >= 0 ? request_id : ret;
 
@@ -1137,28 +1043,27 @@ job_add_failed:
 exit_dry_run:
 no_optimized_path:
 generate_nodes_failed:
-	unresolve_buf(&request->user_req.dst_img.buf,
+	unresolve_buf(cont, &request->user_req.dst_img.buf,
 		&request->dst_resolved);
 resolve_dst_buf_failed:
-	unresolve_buf(&request->user_req.src_mask.buf,
+	unresolve_buf(cont, &request->user_req.src_mask.buf,
 		&request->src_mask_resolved);
 resolve_src_mask_buf_failed:
-	if (request->user_req.flags & B2R2_BLT_FLAG_BG_BLEND) {
-		unresolve_buf(&request->user_req.bg_img.buf,
+	if (request->user_req.flags & B2R2_BLT_FLAG_BG_BLEND)
+		unresolve_buf(cont, &request->user_req.bg_img.buf,
 				&request->bg_resolved);
-	}
 resolve_bg_buf_failed:
-	unresolve_buf(&request->user_req.src_img.buf,
+	unresolve_buf(cont, &request->user_req.src_img.buf,
 		&request->src_resolved);
 resolve_src_buf_failed:
 synch_interrupted:
 	job_release(&request->job);
-	dec_stat(&stat_n_jobs_released);
+	dec_stat(cont, &cont->stat_n_jobs_released);
 	if ((request->user_req.flags & B2R2_BLT_FLAG_DRY_RUN) == 0 || ret)
-		b2r2_log_warn(
-			"%s returns with error %d\n", __func__, ret);
+		b2r2_log_warn(cont->dev, "%s returns with error %d\n",
+			__func__, ret);
 
-	dec_stat(&stat_n_in_blt);
+	dec_stat(cont, &cont->stat_n_in_blt);
 
 	return ret;
 }
@@ -1172,24 +1077,24 @@ static void job_callback(struct b2r2_core_job *job)
 {
 	struct b2r2_blt_request *request =
 		container_of(job, struct b2r2_blt_request, job);
+	struct b2r2_control *cont = request->instance->control;
 
-	if (b2r2_blt_device())
-		b2r2_log_info("%s\n", __func__);
+	if (cont->dev)
+		b2r2_log_info(cont->dev, "%s\n", __func__);
 
 	/* Local addref / release within this func */
 	b2r2_core_job_addref(job, __func__);
 
 	/* Unresolve the buffers */
-	unresolve_buf(&request->user_req.src_img.buf,
+	unresolve_buf(cont, &request->user_req.src_img.buf,
 		&request->src_resolved);
-	unresolve_buf(&request->user_req.src_mask.buf,
+	unresolve_buf(cont, &request->user_req.src_mask.buf,
 		&request->src_mask_resolved);
-	unresolve_buf(&request->user_req.dst_img.buf,
+	unresolve_buf(cont, &request->user_req.dst_img.buf,
 		&request->dst_resolved);
-	if (request->user_req.flags & B2R2_BLT_FLAG_BG_BLEND) {
-		unresolve_buf(&request->user_req.bg_img.buf,
+	if (request->user_req.flags & B2R2_BLT_FLAG_BG_BLEND)
+		unresolve_buf(cont, &request->user_req.bg_img.buf,
 			&request->bg_resolved);
-	}
 
 	/* Move to report list if the job shall be reported */
 	/* FIXME: Use a smaller struct? */
@@ -1198,7 +1103,7 @@ static void job_callback(struct b2r2_core_job *job)
 		/* Move job to report list */
 		list_add_tail(&request->list,
 			&request->instance->report_list);
-		inc_stat(&stat_n_jobs_in_report_list);
+		inc_stat(cont, &cont->stat_n_jobs_in_report_list);
 
 		/* Wake up poll */
 		wake_up_interruptible(
@@ -1215,7 +1120,7 @@ static void job_callback(struct b2r2_core_job *job)
 	BUG_ON(request->instance->no_of_active_requests == 0);
 	request->instance->no_of_active_requests--;
 	if (request->instance->synching &&
-	request->instance->no_of_active_requests == 0) {
+			request->instance->no_of_active_requests == 0) {
 		request->instance->synching = false;
 		/* Wake up all syncing */
 
@@ -1229,14 +1134,14 @@ static void job_callback(struct b2r2_core_job *job)
 	if (job->job_state == B2R2_CORE_JOB_CANCELED) {
 		char *Buf = kmalloc(sizeof(char) * 4096, GFP_KERNEL);
 
-		b2r2_log_info("%s: Job cancelled:\n", __func__);
+		b2r2_log_info(cont->dev, "%s: Job cancelled:\n", __func__);
 		if (Buf != NULL) {
 			sprintf_req(request, Buf, sizeof(char) * 4096);
-			b2r2_log_info("%s", Buf);
+			b2r2_log_info(cont->dev, "%s", Buf);
 			kfree(Buf);
 		} else {
-			b2r2_log_info("Unable to print the request. "
-					"Message buffer allocation failed.\n");
+			b2r2_log_info(cont->dev, "Unable to print the request."
+				" Message buffer allocation failed.\n");
 		}
 	}
 #endif
@@ -1260,26 +1165,27 @@ static void job_release(struct b2r2_core_job *job)
 {
 	struct b2r2_blt_request *request =
 		container_of(job, struct b2r2_blt_request, job);
+	struct b2r2_control *cont = request->instance->control;
 
-	inc_stat(&stat_n_jobs_released);
+	inc_stat(cont, &cont->stat_n_jobs_released);
 
-	b2r2_log_info("%s, first_node=%p, ref_count=%d\n",
+	b2r2_log_info(cont->dev, "%s, first_node=%p, ref_count=%d\n",
 		__func__, request->first_node, request->job.ref_count);
 
-	b2r2_node_split_cancel(&request->node_split_job);
+	b2r2_node_split_cancel(cont, &request->node_split_job);
 
 	if (request->first_node) {
-		b2r2_debug_job_done(request->first_node);
+		b2r2_debug_job_done(cont, request->first_node);
 #ifdef B2R2_USE_NODE_GEN
-		b2r2_blt_free_nodes(request->first_node);
+		b2r2_blt_free_nodes(cont, request->first_node);
 #else
-		b2r2_node_free(request->first_node);
+		b2r2_node_free(cont, request->first_node);
 #endif
 	}
 
 	/* Release memory for the request */
 	if (request->clut != NULL) {
-		dma_free_coherent(b2r2_blt_device(), CLUT_SIZE, request->clut,
+		dma_free_coherent(cont->dev, CLUT_SIZE, request->clut,
 				request->clut_phys_addr);
 		request->clut = NULL;
 		request->clut_phys_addr = 0;
@@ -1300,17 +1206,19 @@ static int job_acquire_resources(struct b2r2_core_job *job, bool atomic)
 {
 	struct b2r2_blt_request *request =
 		container_of(job, struct b2r2_blt_request, job);
+	struct b2r2_control *cont = request->instance->control;
 	int ret;
 	int i;
 
-	b2r2_log_info("%s\n", __func__);
+	b2r2_log_info(cont->dev, "%s\n", __func__);
 
 	if (request->buf_count == 0)
 		return 0;
 
 	if (request->buf_count > MAX_TMP_BUFS_NEEDED) {
-		b2r2_log_err("%s: request->buf_count > MAX_TMP_BUFS_NEEDED\n",
-								__func__);
+		b2r2_log_err(cont->dev,
+				"%s: request->buf_count > MAX_TMP_BUFS_NEEDED\n",
+				__func__);
 		return -ENOMSG;
 	}
 
@@ -1322,29 +1230,30 @@ static int job_acquire_resources(struct b2r2_core_job *job, bool atomic)
 	 * usage but we avoid get into a situation where lower prio jobs can
 	 * delay higher prio jobs that require more temp buffers.
 	 */
-	if (tmp_bufs[0].in_use)
+	if (cont->tmp_bufs[0].in_use)
 		return -EAGAIN;
 
 	for (i = 0; i < request->buf_count; i++) {
-		if (tmp_bufs[i].buf.size < request->bufs[i].size) {
-			b2r2_log_err("%s: tmp_bufs[i].buf.size < "
-					"request->bufs[i].size\n",
-								__func__);
+		if (cont->tmp_bufs[i].buf.size < request->bufs[i].size) {
+			b2r2_log_err(cont->dev, "%s: "
+					"cont->tmp_bufs[i].buf.size < "
+					"request->bufs[i].size\n", __func__);
 			ret = -ENOMSG;
 			goto error;
 		}
 
-		tmp_bufs[i].in_use = true;
-		request->bufs[i].phys_addr = tmp_bufs[i].buf.phys_addr;
-		request->bufs[i].virt_addr = tmp_bufs[i].buf.virt_addr;
+		cont->tmp_bufs[i].in_use = true;
+		request->bufs[i].phys_addr = cont->tmp_bufs[i].buf.phys_addr;
+		request->bufs[i].virt_addr = cont->tmp_bufs[i].buf.virt_addr;
 
-		b2r2_log_info("%s: phys=%p, virt=%p\n",
-			__func__, (void *)request->bufs[i].phys_addr,
-			request->bufs[i].virt_addr);
+		b2r2_log_info(cont->dev, "%s: phys=%p, virt=%p\n",
+				__func__, (void *)request->bufs[i].phys_addr,
+				request->bufs[i].virt_addr);
 
-		ret = b2r2_node_split_assign_buffers(&request->node_split_job,
-					request->first_node, request->bufs,
-					request->buf_count);
+		ret = b2r2_node_split_assign_buffers(cont,
+				&request->node_split_job,
+				request->first_node, request->bufs,
+				request->buf_count);
 		if (ret < 0)
 			goto error;
 	}
@@ -1353,7 +1262,7 @@ static int job_acquire_resources(struct b2r2_core_job *job, bool atomic)
 
 error:
 	for (i = 0; i < request->buf_count; i++)
-		tmp_bufs[i].in_use = false;
+		cont->tmp_bufs[i].in_use = false;
 
 	return ret;
 }
@@ -1371,16 +1280,17 @@ static void job_release_resources(struct b2r2_core_job *job, bool atomic)
 {
 	struct b2r2_blt_request *request =
 		container_of(job, struct b2r2_blt_request, job);
+	struct b2r2_control *cont = request->instance->control;
 	int i;
 
-	b2r2_log_info("%s\n", __func__);
+	b2r2_log_info(cont->dev, "%s\n", __func__);
 
 	/* Free any temporary buffers */
 	for (i = 0; i < request->buf_count; i++) {
 
-		b2r2_log_info("%s: freeing %d bytes\n",
-			__func__, request->bufs[i].size);
-		tmp_bufs[i].in_use = false;
+		b2r2_log_info(cont->dev, "%s: freeing %d bytes\n",
+				__func__, request->bufs[i].size);
+		cont->tmp_bufs[i].in_use = false;
 		memset(&request->bufs[i], 0, sizeof(request->bufs[i]));
 	}
 	request->buf_count = 0;
@@ -1390,12 +1300,12 @@ static void job_release_resources(struct b2r2_core_job *job, bool atomic)
 	 * FIXME: If nodes are to be reused we don't want to release here
 	 */
 	if (!atomic && request->first_node) {
-		b2r2_debug_job_done(request->first_node);
+		b2r2_debug_job_done(cont, request->first_node);
 
 #ifdef B2R2_USE_NODE_GEN
-		b2r2_blt_free_nodes(request->first_node);
+		b2r2_blt_free_nodes(cont, request->first_node);
 #else
-		b2r2_node_free(request->first_node);
+		b2r2_node_free(cont, request->first_node);
 #endif
 		request->first_node = NULL;
 	}
@@ -1412,8 +1322,13 @@ static void job_release_resources(struct b2r2_core_job *job, bool atomic)
  */
 static void tile_job_callback_gen(struct b2r2_core_job *job)
 {
-	if (b2r2_blt_device())
-		b2r2_log_info("%s\n", __func__);
+#ifdef CONFIG_B2R2_DEBUG
+	struct b2r2_blt_instance *instance =
+			(struct b2r2_blt_instance *) job->tag;
+	struct b2r2_control *cont = instance->control;
+#endif
+
+	b2r2_log_info(cont->dev, "%s\n", __func__);
 
 	/* Local addref / release within this func */
 	b2r2_core_job_addref(job, __func__);
@@ -1421,7 +1336,8 @@ static void tile_job_callback_gen(struct b2r2_core_job *job)
 #ifdef CONFIG_DEBUG_FS
 	/* Notify if a tile job is cancelled */
 	if (job->job_state == B2R2_CORE_JOB_CANCELED)
-		b2r2_log_info("%s: Tile job cancelled:\n", __func__);
+		b2r2_log_info(cont->dev, "%s: Tile job cancelled:\n",
+				__func__);
 #endif
 
 	/* Local addref / release within this func */
@@ -1439,19 +1355,19 @@ static void job_callback_gen(struct b2r2_core_job *job)
 {
 	struct b2r2_blt_request *request =
 		container_of(job, struct b2r2_blt_request, job);
+	struct b2r2_control *cont = request->instance->control;
 
-	if (b2r2_blt_device())
-		b2r2_log_info("%s\n", __func__);
+	b2r2_log_info(cont->dev, "%s\n", __func__);
 
 	/* Local addref / release within this func */
 	b2r2_core_job_addref(job, __func__);
 
 	/* Unresolve the buffers */
-	unresolve_buf(&request->user_req.src_img.buf,
+	unresolve_buf(cont, &request->user_req.src_img.buf,
 		&request->src_resolved);
-	unresolve_buf(&request->user_req.src_mask.buf,
+	unresolve_buf(cont, &request->user_req.src_mask.buf,
 		&request->src_mask_resolved);
-	unresolve_buf(&request->user_req.dst_img.buf,
+	unresolve_buf(cont, &request->user_req.dst_img.buf,
 		&request->dst_resolved);
 
 	/* Move to report list if the job shall be reported */
@@ -1462,7 +1378,7 @@ static void job_callback_gen(struct b2r2_core_job *job)
 		/* Move job to report list */
 		list_add_tail(&request->list,
 			&request->instance->report_list);
-		inc_stat(&stat_n_jobs_in_report_list);
+		inc_stat(cont, &cont->stat_n_jobs_in_report_list);
 
 		/* Wake up poll */
 		wake_up_interruptible(
@@ -1496,14 +1412,14 @@ static void job_callback_gen(struct b2r2_core_job *job)
 	if (job->job_state == B2R2_CORE_JOB_CANCELED) {
 		char *Buf = kmalloc(sizeof(char) * 4096, GFP_KERNEL);
 
-		b2r2_log_info("%s: Job cancelled:\n", __func__);
+		b2r2_log_info(cont->dev, "%s: Job cancelled:\n", __func__);
 		if (Buf != NULL) {
 			sprintf_req(request, Buf, sizeof(char) * 4096);
-			b2r2_log_info("%s", Buf);
+			b2r2_log_info(cont->dev, "%s", Buf);
 			kfree(Buf);
 		} else {
-			b2r2_log_info("Unable to print the request. "
-					"Message buffer allocation failed.\n");
+			b2r2_log_info(cont->dev, "Unable to print the request."
+				" Message buffer allocation failed.\n");
 		}
 	}
 #endif
@@ -1522,10 +1438,15 @@ static void job_callback_gen(struct b2r2_core_job *job)
 
 static void tile_job_release_gen(struct b2r2_core_job *job)
 {
-	inc_stat(&stat_n_jobs_released);
+	struct b2r2_blt_instance *instance =
+			(struct b2r2_blt_instance *) job->tag;
+	struct b2r2_control *cont = instance->control;
 
-	b2r2_log_info("%s, first_node_address=0x%.8x, ref_count=%d\n",
-		__func__, job->first_node_address, job->ref_count);
+	inc_stat(cont, &cont->stat_n_jobs_released);
+
+	b2r2_log_info(cont->dev, "%s, first_node_address=0x%.8x, ref_count="
+		"%d\n", __func__, job->first_node_address,
+		job->ref_count);
 
 	/* Release memory for the job */
 	kfree(job);
@@ -1541,26 +1462,27 @@ static void job_release_gen(struct b2r2_core_job *job)
 {
 	struct b2r2_blt_request *request =
 		container_of(job, struct b2r2_blt_request, job);
+	struct b2r2_control *cont = request->instance->control;
 
-	inc_stat(&stat_n_jobs_released);
+	inc_stat(cont, &cont->stat_n_jobs_released);
 
-	b2r2_log_info("%s, first_node=%p, ref_count=%d\n",
-		__func__, request->first_node, request->job.ref_count);
+	b2r2_log_info(cont->dev, "%s, first_node=%p, ref_count=%d\n",
+			__func__, request->first_node, request->job.ref_count);
 
 	if (request->first_node) {
-		b2r2_debug_job_done(request->first_node);
+		b2r2_debug_job_done(cont, request->first_node);
 
 		/* Free nodes */
 #ifdef B2R2_USE_NODE_GEN
-		b2r2_blt_free_nodes(request->first_node);
+		b2r2_blt_free_nodes(cont, request->first_node);
 #else
-		b2r2_node_free(request->first_node);
+		b2r2_node_free(cont, request->first_node);
 #endif
 	}
 
 	/* Release memory for the request */
 	if (request->clut != NULL) {
-		dma_free_coherent(b2r2_blt_device(), CLUT_SIZE, request->clut,
+		dma_free_coherent(cont->dev, CLUT_SIZE, request->clut,
 				request->clut_phys_addr);
 		request->clut = NULL;
 		request->clut_phys_addr = 0;
@@ -1605,6 +1527,7 @@ static int b2r2_generic_blt(struct b2r2_blt_instance *instance,
 	struct b2r2_work_buf work_bufs[4];
 	struct b2r2_blt_rect dst_rect_tile;
 	int i;
+	struct b2r2_control *cont = instance->control;
 
 	u32 thread_runtime_at_start = 0;
 	s32 nsec_active_in_b2r2 = 0;
@@ -1635,12 +1558,12 @@ static int b2r2_generic_blt(struct b2r2_blt_instance *instance,
 
 	memset(work_bufs, 0, sizeof(work_bufs));
 
-	b2r2_log_info("%s\n", __func__);
+	b2r2_log_info(cont->dev, "%s\n", __func__);
 
-	inc_stat(&stat_n_in_blt);
+	inc_stat(cont, &cont->stat_n_in_blt);
 
 	/* Debug prints of incoming request */
-	b2r2_log_info(
+	b2r2_log_info(cont->dev,
 		"src.fmt=%#010x flags=0x%.8x src.buf={%d,%d,0x%.8x}\n"
 		"src.w,h={%d,%d} src.rect={%d,%d,%d,%d}\n",
 		request->user_req.src_img.fmt,
@@ -1654,7 +1577,7 @@ static int b2r2_generic_blt(struct b2r2_blt_instance *instance,
 		request->user_req.src_rect.y,
 		request->user_req.src_rect.width,
 		request->user_req.src_rect.height);
-	b2r2_log_info(
+	b2r2_log_info(cont->dev,
 		"dst.fmt=%#010x dst.buf={%d,%d,0x%.8x}\n"
 		"dst.w,h={%d,%d} dst.rect={%d,%d,%d,%d}\n"
 		"dst_clip_rect={%d,%d,%d,%d}\n",
@@ -1673,41 +1596,39 @@ static int b2r2_generic_blt(struct b2r2_blt_instance *instance,
 		request->user_req.dst_clip_rect.width,
 		request->user_req.dst_clip_rect.height);
 
-	inc_stat(&stat_n_in_blt_synch);
+	inc_stat(cont, &cont->stat_n_in_blt_synch);
 
 	/* Wait here if synch is ongoing */
 	ret = wait_event_interruptible(instance->synch_done_waitq,
 				!is_synching(instance));
 	if (ret) {
-		b2r2_log_warn(
-			"%s: Sync wait interrupted, %d\n",
+		b2r2_log_warn(cont->dev, "%s: Sync wait interrupted, %d\n",
 			__func__, ret);
 		ret = -EAGAIN;
-		dec_stat(&stat_n_in_blt_synch);
+		dec_stat(cont, &cont->stat_n_in_blt_synch);
 		goto synch_interrupted;
 	}
 
-	dec_stat(&stat_n_in_blt_synch);
+	dec_stat(cont, &cont->stat_n_in_blt_synch);
 
 	/* Resolve the buffers */
 
 	/* Source buffer */
-	ret = resolve_buf(&request->user_req.src_img,
+	ret = resolve_buf(cont, &request->user_req.src_img,
 		&request->user_req.src_rect, false, &request->src_resolved);
 	if (ret < 0) {
-		b2r2_log_warn(
-			"%s: Resolve src buf failed, %d\n",
+		b2r2_log_warn(cont->dev, "%s: Resolve src buf failed, %d\n",
 			__func__, ret);
 		ret = -EAGAIN;
 		goto resolve_src_buf_failed;
 	}
 
 	/* Source mask buffer */
-	ret = resolve_buf(&request->user_req.src_mask,
+	ret = resolve_buf(cont, &request->user_req.src_mask,
 					&request->user_req.src_rect, false,
 						&request->src_mask_resolved);
 	if (ret < 0) {
-		b2r2_log_warn(
+		b2r2_log_warn(cont->dev,
 			"%s: Resolve src mask buf failed, %d\n",
 			__func__, ret);
 		ret = -EAGAIN;
@@ -1716,18 +1637,17 @@ static int b2r2_generic_blt(struct b2r2_blt_instance *instance,
 
 	/* Destination buffer */
 	get_actual_dst_rect(&request->user_req, &actual_dst_rect);
-	ret = resolve_buf(&request->user_req.dst_img, &actual_dst_rect,
+	ret = resolve_buf(cont, &request->user_req.dst_img, &actual_dst_rect,
 						true, &request->dst_resolved);
 	if (ret < 0) {
-		b2r2_log_warn(
-			"%s: Resolve dst buf failed, %d\n",
+		b2r2_log_warn(cont->dev, "%s: Resolve dst buf failed, %d\n",
 			__func__, ret);
 		ret = -EAGAIN;
 		goto resolve_dst_buf_failed;
 	}
 
 	/* Debug prints of resolved buffers */
-	b2r2_log_info("src.rbuf={%X,%p,%d} {%p,%X,%X,%d}\n",
+	b2r2_log_info(cont->dev, "src.rbuf={%X,%p,%d} {%p,%X,%X,%d}\n",
 		request->src_resolved.physical_address,
 		request->src_resolved.virtual_address,
 		request->src_resolved.is_pmem,
@@ -1736,7 +1656,7 @@ static int b2r2_generic_blt(struct b2r2_blt_instance *instance,
 		request->src_resolved.file_virtual_start,
 		request->src_resolved.file_len);
 
-	b2r2_log_info("dst.rbuf={%X,%p,%d} {%p,%X,%X,%d}\n",
+	b2r2_log_info(cont->dev, "dst.rbuf={%X,%p,%d} {%p,%X,%X,%d}\n",
 		request->dst_resolved.physical_address,
 		request->dst_resolved.virtual_address,
 		request->dst_resolved.is_pmem,
@@ -1749,7 +1669,7 @@ static int b2r2_generic_blt(struct b2r2_blt_instance *instance,
 	ret = b2r2_generic_analyze(request, &tmp_buf_width,
 			&tmp_buf_height, &tmp_buf_count, &node_count);
 	if (ret < 0) {
-		b2r2_log_warn(
+		b2r2_log_warn(cont->dev,
 			"%s: Failed to analyze request, ret = %d\n",
 			__func__, ret);
 #ifdef CONFIG_DEBUG_FS
@@ -1757,14 +1677,15 @@ static int b2r2_generic_blt(struct b2r2_blt_instance *instance,
 			/* Failed, dump job to dmesg */
 			char *Buf = kmalloc(sizeof(char) * 4096, GFP_KERNEL);
 
-			b2r2_log_info(
+			b2r2_log_info(cont->dev,
 				"%s: Analyze failed for:\n", __func__);
 			if (Buf != NULL) {
 				sprintf_req(request, Buf, sizeof(char) * 4096);
-				b2r2_log_info("%s", Buf);
+				b2r2_log_info(cont->dev, "%s", Buf);
 				kfree(Buf);
 			} else {
-				b2r2_log_info("Unable to print the request. "
+				b2r2_log_info(cont->dev,
+					"Unable to print the request. "
 					"Message buffer allocation failed.\n");
 			}
 		}
@@ -1774,17 +1695,17 @@ static int b2r2_generic_blt(struct b2r2_blt_instance *instance,
 
 	/* Allocate the nodes needed */
 #ifdef B2R2_USE_NODE_GEN
-	request->first_node = b2r2_blt_alloc_nodes(node_count);
+	request->first_node = b2r2_blt_alloc_nodes(cont, node_count);
 	if (request->first_node == NULL) {
-		b2r2_log_warn(
+		b2r2_log_warn(cont->dev,
 			"%s: Failed to allocate nodes, ret = %d\n",
 			__func__, ret);
 		goto generate_nodes_failed;
 	}
 #else
-	ret = b2r2_node_alloc(node_count, &(request->first_node));
+	ret = b2r2_node_alloc(cont, node_count, &(request->first_node));
 	if (ret < 0 || request->first_node == NULL) {
-		b2r2_log_warn(
+		b2r2_log_warn(cont->dev,
 			"%s: Failed to allocate nodes, ret = %d\n",
 			__func__, ret);
 		goto generate_nodes_failed;
@@ -1796,7 +1717,7 @@ static int b2r2_generic_blt(struct b2r2_blt_instance *instance,
 		void *virt;
 		work_bufs[i].size = tmp_buf_width * tmp_buf_height * 4;
 
-		virt = dma_alloc_coherent(b2r2_blt_device(),
+		virt = dma_alloc_coherent(cont->dev,
 				work_bufs[i].size,
 				&(work_bufs[i].phys_addr),
 				GFP_DMA | GFP_KERNEL);
@@ -1812,7 +1733,7 @@ static int b2r2_generic_blt(struct b2r2_blt_instance *instance,
 			request->first_node, &work_bufs[0], tmp_buf_count);
 
 	if (ret < 0) {
-		b2r2_log_warn(
+		b2r2_log_warn(cont->dev,
 			"%s: Failed to perform generic configure, ret = %d\n",
 			__func__, ret);
 		goto generic_conf_failed;
@@ -1851,8 +1772,8 @@ static int b2r2_generic_blt(struct b2r2_blt_instance *instance,
 			(request->user_req.src_img.buf.type !=
 				B2R2_BLT_PTR_PHYSICAL) &&
 			!b2r2_is_mb_fmt(request->user_req.src_img.fmt))
-			/* MB formats are never touched by SW */
-		sync_buf(&request->user_req.src_img,
+		/* MB formats are never touched by SW */
+		sync_buf(cont, &request->user_req.src_img,
 			&request->src_resolved,
 			false, /*is_dst*/
 			&request->user_req.src_rect);
@@ -1862,8 +1783,8 @@ static int b2r2_generic_blt(struct b2r2_blt_instance *instance,
 			(request->user_req.src_mask.buf.type !=
 				B2R2_BLT_PTR_PHYSICAL) &&
 			!b2r2_is_mb_fmt(request->user_req.src_mask.fmt))
-			/* MB formats are never touched by SW */
-		sync_buf(&request->user_req.src_mask,
+		/* MB formats are never touched by SW */
+		sync_buf(cont, &request->user_req.src_mask,
 			&request->src_mask_resolved,
 			false, /*is_dst*/
 			NULL);
@@ -1873,15 +1794,15 @@ static int b2r2_generic_blt(struct b2r2_blt_instance *instance,
 			(request->user_req.dst_img.buf.type !=
 				B2R2_BLT_PTR_PHYSICAL) &&
 			!b2r2_is_mb_fmt(request->user_req.dst_img.fmt))
-			/* MB formats are never touched by SW */
-		sync_buf(&request->user_req.dst_img,
+		/* MB formats are never touched by SW */
+		sync_buf(cont, &request->user_req.dst_img,
 			&request->dst_resolved,
 			true, /*is_dst*/
 			&request->user_req.dst_rect);
 
 #ifdef CONFIG_DEBUG_FS
 	/* Remember latest request */
-	debugfs_latest_request = *request;
+	cont->debugfs_latest_request = *request;
 #endif
 
 	/*
@@ -1919,8 +1840,7 @@ static int b2r2_generic_blt(struct b2r2_blt_instance *instance,
 		if (dst_rect->x < 0)
 			x = -dst_rect->x;
 
-		for (; x < dst_rect->width &&
-				x + dst_rect->x < dst_img_width;
+		for (; x < dst_rect->width && x + dst_rect->x < dst_img_width;
 				x += tmp_buf_width) {
 			/*
 			 * Tile jobs are freed by the supplied release function
@@ -1935,9 +1855,9 @@ static int b2r2_generic_blt(struct b2r2_blt_instance *instance,
 				 * with rest of the tiles.
 				 * Memory might become available.
 				 */
-				b2r2_log_info("%s: Failed to alloc job. "
-					"Skipping tile at (x, y)=(%d, %d)\n",
-					__func__, x, y);
+				b2r2_log_info(cont->dev, "%s: Failed to alloc "
+						"job. Skipping tile at (x, y)="
+						"(%d, %d)\n", __func__, x, y);
 				continue;
 			}
 			tile_job->tag = request->job.tag;
@@ -1949,8 +1869,10 @@ static int b2r2_generic_blt(struct b2r2_blt_instance *instance,
 			tile_job->callback = tile_job_callback_gen;
 			tile_job->release = tile_job_release_gen;
 			/* Work buffers and nodes are pre-allocated */
-			tile_job->acquire_resources = job_acquire_resources_gen;
-			tile_job->release_resources = job_release_resources_gen;
+			tile_job->acquire_resources =
+				job_acquire_resources_gen;
+			tile_job->release_resources =
+				job_release_resources_gen;
 
 			dst_rect_tile.x = x;
 			if (x + dst_rect->x + tmp_buf_width > dst_img_width) {
@@ -1978,18 +1900,19 @@ static int b2r2_generic_blt(struct b2r2_blt_instance *instance,
 			b2r2_generic_set_areas(request,
 				request->first_node, &dst_rect_tile);
 			/* Submit the job */
-			b2r2_log_info("%s: Submitting job\n", __func__);
+			b2r2_log_info(cont->dev,
+				"%s: Submitting job\n", __func__);
 
-			inc_stat(&stat_n_in_blt_add);
+			inc_stat(cont, &cont->stat_n_in_blt_add);
 
 			mutex_lock(&instance->lock);
 
-			request_id = b2r2_core_job_add(tile_job);
+			request_id = b2r2_core_job_add(cont, tile_job);
 
-			dec_stat(&stat_n_in_blt_add);
+			dec_stat(cont, &cont->stat_n_in_blt_add);
 
 			if (request_id < 0) {
-				b2r2_log_warn("%s: "
+				b2r2_log_warn(cont->dev, "%s: "
 					"Failed to add tile job, ret = %d\n",
 					__func__, request_id);
 				ret = request_id;
@@ -1997,26 +1920,26 @@ static int b2r2_generic_blt(struct b2r2_blt_instance *instance,
 				goto job_add_failed;
 			}
 
-			inc_stat(&stat_n_jobs_added);
+			inc_stat(cont, &cont->stat_n_jobs_added);
 
 			mutex_unlock(&instance->lock);
 
 			/* Wait for the job to be done */
-			b2r2_log_info("%s: Synchronous, waiting\n",
+			b2r2_log_info(cont->dev, "%s: Synchronous, waiting\n",
 				__func__);
 
-			inc_stat(&stat_n_in_blt_wait);
+			inc_stat(cont, &cont->stat_n_in_blt_wait);
 
 			ret = b2r2_core_job_wait(tile_job);
 
-			dec_stat(&stat_n_in_blt_wait);
+			dec_stat(cont, &cont->stat_n_in_blt_wait);
 
 			if (ret < 0 && ret != -ENOENT)
-				b2r2_log_warn(
+				b2r2_log_warn(cont->dev,
 					"%s: Failed to wait job, ret = %d\n",
 					__func__, ret);
 			else {
-				b2r2_log_info(
+				b2r2_log_info(cont->dev,
 					"%s: Synchronous wait done\n",
 					__func__);
 
@@ -2048,9 +1971,9 @@ static int b2r2_generic_blt(struct b2r2_blt_instance *instance,
 			 */
 			tile_job = kmalloc(sizeof(*tile_job), GFP_KERNEL);
 			if (tile_job == NULL) {
-				b2r2_log_info("%s: Failed to alloc job. "
-					"Skipping tile at (x, y)=(%d, %d)\n",
-					__func__, x, y);
+				b2r2_log_info(cont->dev, "%s: Failed to alloc "
+					"job. Skipping tile at (x, y)="
+					"(%d, %d)\n", __func__, x, y);
 				continue;
 			}
 			tile_job->tag = request->job.tag;
@@ -2061,8 +1984,10 @@ static int b2r2_generic_blt(struct b2r2_blt_instance *instance,
 				request->job.last_node_address;
 			tile_job->callback = tile_job_callback_gen;
 			tile_job->release = tile_job_release_gen;
-			tile_job->acquire_resources = job_acquire_resources_gen;
-			tile_job->release_resources = job_release_resources_gen;
+			tile_job->acquire_resources =
+				job_acquire_resources_gen;
+			tile_job->release_resources =
+				job_release_resources_gen;
 		}
 
 		dst_rect_tile.x = x;
@@ -2100,27 +2025,27 @@ static int b2r2_generic_blt(struct b2r2_blt_instance *instance,
 		b2r2_generic_set_areas(request,
 			request->first_node, &dst_rect_tile);
 
-		b2r2_log_info("%s: Submitting job\n", __func__);
-		inc_stat(&stat_n_in_blt_add);
+		b2r2_log_info(cont->dev, "%s: Submitting job\n", __func__);
+		inc_stat(cont, &cont->stat_n_in_blt_add);
 
 		mutex_lock(&instance->lock);
 		if (x + tmp_buf_width < dst_rect->width &&
 				x + dst_rect->x + tmp_buf_width <
 				dst_img_width) {
-			request_id = b2r2_core_job_add(tile_job);
+			request_id = b2r2_core_job_add(cont, tile_job);
 		} else {
 			/*
 			 * Last tile. Send the job-struct from the request.
 			 * Clients will be notified once it completes.
 			 */
-			request_id = b2r2_core_job_add(&request->job);
+			request_id = b2r2_core_job_add(cont, &request->job);
 		}
 
-		dec_stat(&stat_n_in_blt_add);
+		dec_stat(cont, &cont->stat_n_in_blt_add);
 
 		if (request_id < 0) {
-			b2r2_log_warn("%s: Failed to add tile job, ret = %d\n",
-				__func__, request_id);
+			b2r2_log_warn(cont->dev, "%s: Failed to add tile job, "
+				"ret = %d\n", __func__, request_id);
 			ret = request_id;
 			mutex_unlock(&instance->lock);
 			if (tile_job != NULL)
@@ -2128,13 +2053,13 @@ static int b2r2_generic_blt(struct b2r2_blt_instance *instance,
 			goto job_add_failed;
 		}
 
-		inc_stat(&stat_n_jobs_added);
+		inc_stat(cont, &cont->stat_n_jobs_added);
 		mutex_unlock(&instance->lock);
 
-		b2r2_log_info("%s: Synchronous, waiting\n",
+		b2r2_log_info(cont->dev, "%s: Synchronous, waiting\n",
 			__func__);
 
-		inc_stat(&stat_n_in_blt_wait);
+		inc_stat(cont, &cont->stat_n_in_blt_wait);
 		if (x + tmp_buf_width < dst_rect->width &&
 				x + dst_rect->x + tmp_buf_width <
 				dst_img_width) {
@@ -2146,14 +2071,14 @@ static int b2r2_generic_blt(struct b2r2_blt_instance *instance,
 			 */
 			ret = b2r2_core_job_wait(&request->job);
 		}
-		dec_stat(&stat_n_in_blt_wait);
+		dec_stat(cont, &cont->stat_n_in_blt_wait);
 
 		if (ret < 0 && ret != -ENOENT)
-			b2r2_log_warn(
+			b2r2_log_warn(cont->dev,
 				"%s: Failed to wait job, ret = %d\n",
 				__func__, ret);
 		else {
-			b2r2_log_info(
+			b2r2_log_info(cont->dev,
 				"%s: Synchronous wait done\n", __func__);
 
 			if (x + tmp_buf_width < dst_rect->width &&
@@ -2198,10 +2123,10 @@ static int b2r2_generic_blt(struct b2r2_blt_instance *instance,
 		}
 	}
 
-	dec_stat(&stat_n_in_blt);
+	dec_stat(cont, &cont->stat_n_in_blt);
 
 	for (i = 0; i < tmp_buf_count; i++) {
-		dma_free_coherent(b2r2_blt_device(),
+		dma_free_coherent(cont->dev,
 			work_bufs[i].size,
 			work_bufs[i].virt_addr,
 			work_bufs[i].phys_addr);
@@ -2216,7 +2141,7 @@ generic_conf_failed:
 alloc_work_bufs_failed:
 	for (i = 0; i < 4; i++) {
 		if (work_bufs[i].virt_addr != 0) {
-			dma_free_coherent(b2r2_blt_device(),
+			dma_free_coherent(cont->dev,
 				work_bufs[i].size,
 				work_bufs[i].virt_addr,
 				work_bufs[i].phys_addr);
@@ -2225,22 +2150,22 @@ alloc_work_bufs_failed:
 	}
 
 generate_nodes_failed:
-	unresolve_buf(&request->user_req.dst_img.buf,
+	unresolve_buf(cont, &request->user_req.dst_img.buf,
 		&request->dst_resolved);
 resolve_dst_buf_failed:
-	unresolve_buf(&request->user_req.src_mask.buf,
+	unresolve_buf(cont, &request->user_req.src_mask.buf,
 		&request->src_mask_resolved);
 resolve_src_mask_buf_failed:
-	unresolve_buf(&request->user_req.src_img.buf,
+	unresolve_buf(cont, &request->user_req.src_img.buf,
 		&request->src_resolved);
 resolve_src_buf_failed:
 synch_interrupted:
 zero_blt:
 	job_release_gen(&request->job);
-	dec_stat(&stat_n_jobs_released);
-	dec_stat(&stat_n_in_blt);
+	dec_stat(cont, &cont->stat_n_jobs_released);
+	dec_stat(cont, &cont->stat_n_in_blt);
 
-	b2r2_log_info("b2r2:%s ret=%d", __func__, ret);
+	b2r2_log_info(cont->dev, "b2r2:%s ret=%d", __func__, ret);
 	return ret;
 }
 #endif /* CONFIG_B2R2_GENERIC */
@@ -2256,11 +2181,13 @@ static int b2r2_blt_synch(struct b2r2_blt_instance *instance,
 			int request_id)
 {
 	int ret = 0;
-	b2r2_log_info("%s, request_id=%d\n", __func__, request_id);
+	struct b2r2_control *cont = instance->control;
+
+	b2r2_log_info(cont->dev, "%s, request_id=%d\n", __func__, request_id);
 
 	if (request_id == 0) {
 		/* Wait for all requests */
-		inc_stat(&stat_n_in_synch_0);
+		inc_stat(cont, &cont->stat_n_in_synch_0);
 
 		/* Enter state "synching" if we have any active request */
 		mutex_lock(&instance->lock);
@@ -2270,15 +2197,15 @@ static int b2r2_blt_synch(struct b2r2_blt_instance *instance,
 
 		/* Wait until no longer in state synching */
 		ret = wait_event_interruptible(instance->synch_done_waitq,
-					!is_synching(instance));
-		dec_stat(&stat_n_in_synch_0);
+				!is_synching(instance));
+		dec_stat(cont, &cont->stat_n_in_synch_0);
 	} else {
 		struct b2r2_core_job *job;
 
-		inc_stat(&stat_n_in_synch_job);
+		inc_stat(cont, &cont->stat_n_in_synch_job);
 
 		/* Wait for specific job */
-		job = b2r2_core_job_find(request_id);
+		job = b2r2_core_job_find(cont, request_id);
 		if (job) {
 			/* Wait on find job */
 			ret = b2r2_core_job_wait(job);
@@ -2287,11 +2214,10 @@ static int b2r2_blt_synch(struct b2r2_blt_instance *instance,
 		}
 
 		/* If job not found we assume that is has been run */
-
-		dec_stat(&stat_n_in_synch_job);
+		dec_stat(cont, &cont->stat_n_in_synch_job);
 	}
 
-	b2r2_log_info(
+	b2r2_log_info(cont->dev,
 		"%s, request_id=%d, returns %d\n", __func__, request_id, ret);
 
 	return ret;
@@ -2321,11 +2247,12 @@ static void get_actual_dst_rect(struct b2r2_blt_req *req,
 
 	if (req->flags & B2R2_BLT_FLAG_DESTINATION_CLIP)
 		b2r2_intersect_rects(actual_dst_rect, &req->dst_clip_rect,
-							actual_dst_rect);
+				actual_dst_rect);
 }
 
-static void set_up_hwmem_region(struct b2r2_blt_img *img,
-		struct b2r2_blt_rect *rect, struct hwmem_region *region)
+static void set_up_hwmem_region(struct b2r2_control *cont,
+		struct b2r2_blt_img *img, struct b2r2_blt_rect *rect,
+		struct hwmem_region *region)
 {
 	s32 img_size;
 
@@ -2334,15 +2261,15 @@ static void set_up_hwmem_region(struct b2r2_blt_img *img,
 	if (b2r2_is_zero_area_rect(rect))
 		return;
 
-	img_size = b2r2_get_img_size(img);
+	img_size = b2r2_get_img_size(cont, img);
 
 	if (b2r2_is_single_plane_fmt(img->fmt) &&
-				b2r2_is_independent_pixel_fmt(img->fmt)) {
-		int img_fmt_bpp = b2r2_get_fmt_bpp(img->fmt);
-		u32 img_pitch = b2r2_get_img_pitch(img);
+			b2r2_is_independent_pixel_fmt(img->fmt)) {
+		int img_fmt_bpp = b2r2_get_fmt_bpp(cont, img->fmt);
+		u32 img_pitch = b2r2_get_img_pitch(cont, img);
 
 		region->offset = (u32)(img->buf.offset + (rect->y *
-								img_pitch));
+				img_pitch));
 		region->count = (u32)rect->height;
 		region->start = (u32)((rect->x * img_fmt_bpp) / 8);
 		region->end = (u32)b2r2_div_round_up(
@@ -2363,7 +2290,8 @@ static void set_up_hwmem_region(struct b2r2_blt_img *img,
 	}
 }
 
-static int resolve_hwmem(struct b2r2_blt_img *img,
+static int resolve_hwmem(struct b2r2_control *cont,
+		struct b2r2_blt_img *img,
 		struct b2r2_blt_rect *rect_2b_used,
 		bool is_dst,
 		struct b2r2_resolved_buf *resolved_buf)
@@ -2380,8 +2308,8 @@ static int resolve_hwmem(struct b2r2_blt_img *img,
 			hwmem_resolve_by_name(img->buf.hwmem_buf_name);
 	if (IS_ERR(resolved_buf->hwmem_alloc)) {
 		return_value = PTR_ERR(resolved_buf->hwmem_alloc);
-		b2r2_log_info("%s: hwmem_resolve_by_name failed, "
-				"error code: %i\n", __func__, return_value);
+		b2r2_log_info(cont->dev, "%s: hwmem_resolve_by_name failed, "
+			"error code: %i\n", __func__, return_value);
 		goto resolve_failed;
 	}
 
@@ -2389,25 +2317,27 @@ static int resolve_hwmem(struct b2r2_blt_img *img,
 			&mem_type, &access);
 
 	required_access = (is_dst ? HWMEM_ACCESS_WRITE : HWMEM_ACCESS_READ) |
-							HWMEM_ACCESS_IMPORT;
+			HWMEM_ACCESS_IMPORT;
 	if ((required_access & access) != required_access) {
-		b2r2_log_info("%s: Insufficient access to hwmem buffer.\n",
-				__func__);
+		b2r2_log_info(cont->dev, "%s: Insufficient access to hwmem "
+			"buffer.\n", __func__);
 		return_value = -EACCES;
 		goto access_check_failed;
 	}
 
 	if (mem_type != HWMEM_MEM_CONTIGUOUS_SYS) {
-		b2r2_log_info("%s: Hwmem buffer is scattered.\n", __func__);
+		b2r2_log_info(cont->dev, "%s: Hwmem buffer is scattered.\n",
+			__func__);
 		return_value = -EINVAL;
 		goto buf_scattered;
 	}
 
 	if (resolved_buf->file_len <
-			img->buf.offset + (__u32)b2r2_get_img_size(img)) {
-		b2r2_log_info("%s: Hwmem buffer too small. (%d < %d) \n", __func__,
-				resolved_buf->file_len,
-				img->buf.offset + (__u32)b2r2_get_img_size(img));
+			img->buf.offset + (__u32)b2r2_get_img_size(cont, img)) {
+		b2r2_log_info(cont->dev, "%s: Hwmem buffer too small. (%d < "
+			"%d)\n", __func__, resolved_buf->file_len,
+			img->buf.offset +
+			(__u32)b2r2_get_img_size(cont, img));
 		return_value = -EINVAL;
 		goto size_check_failed;
 	}
@@ -2415,18 +2345,18 @@ static int resolve_hwmem(struct b2r2_blt_img *img,
 	return_value = hwmem_pin(resolved_buf->hwmem_alloc, &mem_chunk,
 							 &mem_chunk_length);
 	if (return_value < 0) {
-		b2r2_log_info("%s: hwmem_pin failed, "
-				"error code: %i\n", __func__, return_value);
+		b2r2_log_info(cont->dev, "%s: hwmem_pin failed, "
+			"error code: %i\n", __func__, return_value);
 		goto pin_failed;
 	}
 	resolved_buf->file_physical_start = mem_chunk.paddr;
 
-	set_up_hwmem_region(img, rect_2b_used, &region);
+	set_up_hwmem_region(cont, img, rect_2b_used, &region);
 	return_value = hwmem_set_domain(resolved_buf->hwmem_alloc,
-				required_access, HWMEM_DOMAIN_SYNC, &region);
+		required_access, HWMEM_DOMAIN_SYNC, &region);
 	if (return_value < 0) {
-		b2r2_log_info("%s: hwmem_set_domain failed, "
-				"error code: %i\n", __func__, return_value);
+		b2r2_log_info(cont->dev, "%s: hwmem_set_domain failed, "
+			"error code: %i\n", __func__, return_value);
 		goto set_domain_failed;
 	}
 
@@ -2462,8 +2392,9 @@ static void unresolve_hwmem(struct b2r2_resolved_buf *resolved_buf)
  *
  * Returns 0 if OK else negative error code
  */
-static void unresolve_buf(struct b2r2_blt_buf *buf,
-			struct b2r2_resolved_buf *resolved)
+static void unresolve_buf(struct b2r2_control *cont,
+		struct b2r2_blt_buf *buf,
+		struct b2r2_resolved_buf *resolved)
 {
 #ifdef CONFIG_ANDROID_PMEM
 	if (resolved->is_pmem && resolved->filep)
@@ -2525,7 +2456,8 @@ static int get_fb_info(struct file *file,
  *
  * Returns 0 if OK else negative error code
  */
-static int resolve_buf(struct b2r2_blt_img *img,
+static int resolve_buf(struct b2r2_control *cont,
+		struct b2r2_blt_img *img,
 		struct b2r2_blt_rect *rect_2b_used,
 		bool is_dst,
 		struct b2r2_resolved_buf *resolved)
@@ -2584,19 +2516,18 @@ static int resolve_buf(struct b2r2_blt_img *img,
 		if (img->buf.offset + img->buf.len >
 				resolved->file_len) {
 			ret = -ESPIPE;
-			unresolve_buf(&img->buf, resolved);
+			unresolve_buf(cont, &img->buf, resolved);
 		}
 
 		break;
 	}
 
 	case B2R2_BLT_PTR_HWMEM_BUF_NAME_OFFSET:
-		ret = resolve_hwmem(img, rect_2b_used, is_dst, resolved);
+		ret = resolve_hwmem(cont, img, rect_2b_used, is_dst, resolved);
 		break;
 
 	default:
-		b2r2_log_warn(
-			"%s: Failed to resolve buf type %d\n",
+		b2r2_log_warn(cont->dev, "%s: Failed to resolve buf type %d\n",
 			__func__, img->buf.type);
 
 		ret = -EINVAL;
@@ -2619,7 +2550,8 @@ static int resolve_buf(struct b2r2_blt_img *img,
  * @img_width: width of the complete image buffer
  * @fmt: buffer format
 */
-static void sync_buf(struct b2r2_blt_img *img,
+static void sync_buf(struct b2r2_control *cont,
+		struct b2r2_blt_img *img,
 		struct b2r2_resolved_buf *resolved,
 		bool is_dst,
 		struct b2r2_blt_rect *rect)
@@ -2809,24 +2741,16 @@ static bool is_synching(struct b2r2_blt_instance *instance)
 	return is_synching;
 }
 
-/**
- * b2r2_blt_devide() - Returns the B2R2 blt device for logging
- */
-struct device *b2r2_blt_device(void)
-{
-	return b2r2_blt_dev ? b2r2_blt_dev->this_device : NULL;
-}
-
 /**
  * inc_stat() - Spin lock protected increment of statistics variable
  *
  * @stat: Pointer to statistics variable that should be incremented
  */
-static void inc_stat(unsigned long *stat)
+static void inc_stat(struct b2r2_control *cont, unsigned long *stat)
 {
-	mutex_lock(&stat_lock);
+	mutex_lock(&cont->stat_lock);
 	(*stat)++;
-	mutex_unlock(&stat_lock);
+	mutex_unlock(&cont->stat_lock);
 }
 
 /**
@@ -2834,11 +2758,11 @@ static void inc_stat(unsigned long *stat)
  *
  * @stat: Pointer to statistics variable that should be decremented
  */
-static void dec_stat(unsigned long *stat)
+static void dec_stat(struct b2r2_control *cont, unsigned long *stat)
 {
-	mutex_lock(&stat_lock);
+	mutex_lock(&cont->stat_lock);
 	(*stat)--;
-	mutex_unlock(&stat_lock);
+	mutex_unlock(&cont->stat_lock);
 }
 
 
@@ -2856,172 +2780,196 @@ static int sprintf_req(struct b2r2_blt_request *request, char *buf, int size)
 {
 	size_t dev_size = 0;
 
+	/* generic request info */
 	dev_size += sprintf(buf + dev_size,
-			"instance: %p\n\n",
-			request->instance);
-
+		"instance      : 0x%08lX\n",
+		(unsigned long) request->instance);
+	dev_size += sprintf(buf + dev_size,
+		"size          : %d bytes\n", request->user_req.size);
+	dev_size += sprintf(buf + dev_size,
+		"flags         : 0x%08lX\n",
+		(unsigned long) request->user_req.flags);
+	dev_size += sprintf(buf + dev_size,
+		"transform     : %d\n",
+		(int) request->user_req.transform);
+	dev_size += sprintf(buf + dev_size,
+		"prio          : %d\n", request->user_req.transform);
 	dev_size += sprintf(buf + dev_size,
-			"size: %d bytes\n",
-			request->user_req.size);
+		"global_alpha  : %d\n",
+		(int) request->user_req.global_alpha);
 	dev_size += sprintf(buf + dev_size,
-			"flags: %8lX\n",
-			(unsigned long) request->user_req.flags);
+		"report1       : 0x%08lX\n",
+		(unsigned long) request->user_req.report1);
 	dev_size += sprintf(buf + dev_size,
-			"transform: %3lX\n",
-			(unsigned long) request->user_req.transform);
+		"report2       : 0x%08lX\n",
+		(unsigned long) request->user_req.report2);
 	dev_size += sprintf(buf + dev_size,
-			"prio: %d\n",
-			request->user_req.transform);
+		"request_id    : 0x%08lX\n\n",
+		(unsigned long) request->request_id);
+
+	/* src info */
 	dev_size += sprintf(buf + dev_size,
-			"src_img.fmt: %#010x\n",
-			request->user_req.src_img.fmt);
+		"src_img.fmt   : %#010x\n",
+		request->user_req.src_img.fmt);
 	dev_size += sprintf(buf + dev_size,
-			"src_img.buf: {type=%d,hwmem_buf_name=%d,fd=%d,"
-				"offset=%d,len=%d}\n",
-			request->user_req.src_img.buf.type,
-			request->user_req.src_img.buf.hwmem_buf_name,
-			request->user_req.src_img.buf.fd,
-			request->user_req.src_img.buf.offset,
-			request->user_req.src_img.buf.len);
+		"src_img.buf   : {type=%d, hwmem_buf_name=%d, fd=%d, "
+		"offset=%d, len=%d}\n",
+		request->user_req.src_img.buf.type,
+		request->user_req.src_img.buf.hwmem_buf_name,
+		request->user_req.src_img.buf.fd,
+		request->user_req.src_img.buf.offset,
+		request->user_req.src_img.buf.len);
 	dev_size += sprintf(buf + dev_size,
-			"src_img.{width=%d,height=%d,pitch=%d}\n",
-			request->user_req.src_img.width,
-			request->user_req.src_img.height,
-			request->user_req.src_img.pitch);
+		"src_img       : {width=%d, height=%d, pitch=%d}\n",
+		request->user_req.src_img.width,
+		request->user_req.src_img.height,
+		request->user_req.src_img.pitch);
 	dev_size += sprintf(buf + dev_size,
-			"src_mask.fmt: %#010x\n",
-			request->user_req.src_mask.fmt);
+		"src_mask.fmt  : %#010x\n",
+		request->user_req.src_mask.fmt);
 	dev_size += sprintf(buf + dev_size,
-			"src_mask.buf: {type=%d,hwmem_buf_name=%d,fd=%d,"
-				"offset=%d,len=%d}\n",
-			request->user_req.src_mask.buf.type,
-			request->user_req.src_mask.buf.hwmem_buf_name,
-			request->user_req.src_mask.buf.fd,
-			request->user_req.src_mask.buf.offset,
-			request->user_req.src_mask.buf.len);
+		"src_mask.buf  : {type=%d, hwmem_buf_name=%d, fd=%d,"
+		" offset=%d, len=%d}\n",
+		request->user_req.src_mask.buf.type,
+		request->user_req.src_mask.buf.hwmem_buf_name,
+		request->user_req.src_mask.buf.fd,
+		request->user_req.src_mask.buf.offset,
+		request->user_req.src_mask.buf.len);
 	dev_size += sprintf(buf + dev_size,
-			"src_mask.{width=%d,height=%d,pitch=%d}\n",
-			request->user_req.src_mask.width,
-			request->user_req.src_mask.height,
-			request->user_req.src_mask.pitch);
+		"src_mask      : {width=%d, height=%d, pitch=%d}\n",
+		request->user_req.src_mask.width,
+		request->user_req.src_mask.height,
+		request->user_req.src_mask.pitch);
 	dev_size += sprintf(buf + dev_size,
-			"src_rect.{x=%d,y=%d,width=%d,height=%d}\n",
-			request->user_req.src_rect.x,
-			request->user_req.src_rect.y,
-			request->user_req.src_rect.width,
-			request->user_req.src_rect.height);
+		"src_rect      : {x=%d, y=%d, width=%d, height=%d}\n",
+		request->user_req.src_rect.x,
+		request->user_req.src_rect.y,
+		request->user_req.src_rect.width,
+		request->user_req.src_rect.height);
 	dev_size += sprintf(buf + dev_size,
-			"src_color=%08lX\n",
-			(unsigned long) request->user_req.src_color);
+		"src_color     : 0x%08lX\n\n",
+		(unsigned long) request->user_req.src_color);
 
+	/* bg info */
 	dev_size += sprintf(buf + dev_size,
-			"dst_img.fmt: %#010x\n",
-			request->user_req.dst_img.fmt);
+		"bg_img.fmt    : %#010x\n",
+		request->user_req.bg_img.fmt);
 	dev_size += sprintf(buf + dev_size,
-			"dst_img.buf: {type=%d,hwmem_buf_name=%d,fd=%d,"
-				"offset=%d,len=%d}\n",
-			request->user_req.dst_img.buf.type,
-			request->user_req.dst_img.buf.hwmem_buf_name,
-			request->user_req.dst_img.buf.fd,
-			request->user_req.dst_img.buf.offset,
-			request->user_req.dst_img.buf.len);
+		"bg_img.buf    : {type=%d, hwmem_buf_name=%d, fd=%d,"
+		" offset=%d, len=%d}\n",
+		request->user_req.bg_img.buf.type,
+		request->user_req.bg_img.buf.hwmem_buf_name,
+		request->user_req.bg_img.buf.fd,
+		request->user_req.bg_img.buf.offset,
+		request->user_req.bg_img.buf.len);
 	dev_size += sprintf(buf + dev_size,
-			"dst_img.{width=%d,height=%d,pitch=%d}\n",
-			request->user_req.dst_img.width,
-			request->user_req.dst_img.height,
-			request->user_req.dst_img.pitch);
+		"bg_img        : {width=%d, height=%d, pitch=%d}\n",
+		request->user_req.bg_img.width,
+		request->user_req.bg_img.height,
+		request->user_req.bg_img.pitch);
 	dev_size += sprintf(buf + dev_size,
-			"dst_rect.{x=%d,y=%d,width=%d,height=%d}\n",
-			request->user_req.dst_rect.x,
-			request->user_req.dst_rect.y,
-			request->user_req.dst_rect.width,
-			request->user_req.dst_rect.height);
+		"bg_rect       : {x=%d, y=%d, width=%d, height=%d}\n\n",
+		request->user_req.bg_rect.x,
+		request->user_req.bg_rect.y,
+		request->user_req.bg_rect.width,
+		request->user_req.bg_rect.height);
+
+	/* dst info */
 	dev_size += sprintf(buf + dev_size,
-			"dst_clip_rect.{x=%d,y=%d,width=%d,height=%d}\n",
-			request->user_req.dst_clip_rect.x,
-			request->user_req.dst_clip_rect.y,
-			request->user_req.dst_clip_rect.width,
-			request->user_req.dst_clip_rect.height);
+		"dst_img.fmt   : %#010x\n",
+		request->user_req.dst_img.fmt);
 	dev_size += sprintf(buf + dev_size,
-			"dst_color=%08lX\n",
-			(unsigned long) request->user_req.dst_color);
+		"dst_img.buf   : {type=%d, hwmem_buf_name=%d, fd=%d,"
+		" offset=%d, len=%d}\n",
+		request->user_req.dst_img.buf.type,
+		request->user_req.dst_img.buf.hwmem_buf_name,
+		request->user_req.dst_img.buf.fd,
+		request->user_req.dst_img.buf.offset,
+		request->user_req.dst_img.buf.len);
 	dev_size += sprintf(buf + dev_size,
-			"global_alpha=%d\n",
-			(int) request->user_req.global_alpha);
+		"dst_img       : {width=%d, height=%d, pitch=%d}\n",
+		request->user_req.dst_img.width,
+		request->user_req.dst_img.height,
+		request->user_req.dst_img.pitch);
 	dev_size += sprintf(buf + dev_size,
-			"report1=%08lX\n",
-			(unsigned long) request->user_req.report1);
+		"dst_rect      : {x=%d, y=%d, width=%d, height=%d}\n",
+		request->user_req.dst_rect.x,
+		request->user_req.dst_rect.y,
+		request->user_req.dst_rect.width,
+		request->user_req.dst_rect.height);
 	dev_size += sprintf(buf + dev_size,
-			"report2=%08lX\n",
-			(unsigned long) request->user_req.report2);
-
+		"dst_clip_rect : {x=%d, y=%d, width=%d, height=%d}\n",
+		request->user_req.dst_clip_rect.x,
+		request->user_req.dst_clip_rect.y,
+		request->user_req.dst_clip_rect.width,
+		request->user_req.dst_clip_rect.height);
 	dev_size += sprintf(buf + dev_size,
-			"request_id: %d\n",
-			request->request_id);
+		"dst_color     : 0x%08lX\n\n",
+		(unsigned long) request->user_req.dst_color);
 
 	dev_size += sprintf(buf + dev_size,
-			"src_resolved.physical: %lX\n",
-			(unsigned long) request->src_resolved.
-			physical_address);
+		"src_resolved.physical                  : 0x%08lX\n",
+		(unsigned long) request->src_resolved.
+		physical_address);
 	dev_size += sprintf(buf + dev_size,
-			"src_resolved.virtual: %p\n",
-			request->src_resolved.virtual_address);
+		"src_resolved.virtual                   : 0x%08lX\n",
+		(unsigned long) request->src_resolved.virtual_address);
 	dev_size += sprintf(buf + dev_size,
-			"src_resolved.filep: %p\n",
-			request->src_resolved.filep);
+		"src_resolved.filep                     : 0x%08lX\n",
+		(unsigned long) request->src_resolved.filep);
 	dev_size += sprintf(buf + dev_size,
-			"src_resolved.filep_physical_start: %lX\n",
-			(unsigned long) request->src_resolved.
-			file_physical_start);
+		"src_resolved.filep_physical_start      : 0x%08lX\n",
+		(unsigned long) request->src_resolved.
+		file_physical_start);
 	dev_size += sprintf(buf + dev_size,
-			"src_resolved.filep_virtual_start: %p\n",
-			(void *) request->src_resolved.file_virtual_start);
+		"src_resolved.filep_virtual_start       : 0x%08lX\n",
+		(unsigned long) request->src_resolved.file_virtual_start);
 	dev_size += sprintf(buf + dev_size,
-			"src_resolved.file_len: %d\n",
-			request->src_resolved.file_len);
+		"src_resolved.file_len                  : %d\n\n",
+		request->src_resolved.file_len);
 
 	dev_size += sprintf(buf + dev_size,
-			"src_mask_resolved.physical: %lX\n",
-			(unsigned long) request->src_mask_resolved.
-			physical_address);
+		"src_mask_resolved.physical             : 0x%08lX\n",
+		(unsigned long) request->src_mask_resolved.
+		physical_address);
 	dev_size += sprintf(buf + dev_size,
-			"src_mask_resolved.virtual: %p\n",
-			request->src_mask_resolved.virtual_address);
+		"src_mask_resolved.virtual              : 0x%08lX\n",
+		(unsigned long) request->src_mask_resolved.virtual_address);
 	dev_size += sprintf(buf + dev_size,
-			"src_mask_resolved.filep: %p\n",
-			request->src_mask_resolved.filep);
+		"src_mask_resolved.filep                : 0x%08lX\n",
+		(unsigned long) request->src_mask_resolved.filep);
 	dev_size += sprintf(buf + dev_size,
-			"src_mask_resolved.filep_physical_start: %lX\n",
-			(unsigned long) request->src_mask_resolved.
-			file_physical_start);
+		"src_mask_resolved.filep_physical_start : 0x%08lX\n",
+		(unsigned long) request->src_mask_resolved.
+		file_physical_start);
 	dev_size += sprintf(buf + dev_size,
-			"src_mask_resolved.filep_virtual_start: %p\n",
-			(void *) request->src_mask_resolved.
-			file_virtual_start);
+		"src_mask_resolved.filep_virtual_start  : 0x%08lX\n",
+		(unsigned long) request->src_mask_resolved.
+		file_virtual_start);
 	dev_size += sprintf(buf + dev_size,
-			"src_mask_resolved.file_len: %d\n",
-			request->src_mask_resolved.file_len);
+		"src_mask_resolved.file_len             : %d\n\n",
+		request->src_mask_resolved.file_len);
 
 	dev_size += sprintf(buf + dev_size,
-			"dst_resolved.physical: %lX\n",
-			(unsigned long) request->dst_resolved.
-			physical_address);
+		"dst_resolved.physical                  : 0x%08lX\n",
+		(unsigned long) request->dst_resolved.
+		physical_address);
 	dev_size += sprintf(buf + dev_size,
-			"dst_resolved.virtual: %p\n",
-			request->dst_resolved.virtual_address);
+		"dst_resolved.virtual                   : 0x%08lX\n",
+		(unsigned long) request->dst_resolved.virtual_address);
 	dev_size += sprintf(buf + dev_size,
-			"dst_resolved.filep: %p\n",
-			request->dst_resolved.filep);
+		"dst_resolved.filep                     : 0x%08lX\n",
+		(unsigned long) request->dst_resolved.filep);
 	dev_size += sprintf(buf + dev_size,
-			"dst_resolved.filep_physical_start: %lX\n",
-			(unsigned long) request->dst_resolved.
-			file_physical_start);
+		"dst_resolved.filep_physical_start      : 0x%08lX\n",
+		(unsigned long) request->dst_resolved.
+		file_physical_start);
 	dev_size += sprintf(buf + dev_size,
-			"dst_resolved.filep_virtual_start: %p\n",
-			(void *) request->dst_resolved.file_virtual_start);
+		"dst_resolved.filep_virtual_start       : 0x%08lX\n",
+		(unsigned long) request->dst_resolved.file_virtual_start);
 	dev_size += sprintf(buf + dev_size,
-			"dst_resolved.file_len: %d\n",
-			request->dst_resolved.file_len);
+		"dst_resolved.file_len                  : %d\n\n",
+		request->dst_resolved.file_len);
 
 	return dev_size;
 }
@@ -3042,13 +2990,14 @@ static int debugfs_b2r2_blt_request_read(struct file *filp, char __user *buf,
 	size_t dev_size = 0;
 	int ret = 0;
 	char *Buf = kmalloc(sizeof(char) * 4096, GFP_KERNEL);
+	struct b2r2_control *cont = filp->f_dentry->d_inode->i_private;
 
 	if (Buf == NULL) {
 		ret = -ENOMEM;
 		goto out;
 	}
 
-	dev_size = sprintf_req(&debugfs_latest_request, Buf,
+	dev_size = sprintf_req(&cont->debugfs_latest_request, Buf,
 		sizeof(char) * 4096);
 
 	/* No more to read if offset != 0 */
@@ -3195,38 +3144,39 @@ static int debugfs_b2r2_blt_stat_read(struct file *filp, char __user *buf,
 	size_t dev_size = 0;
 	int ret = 0;
 	char *Buf = kmalloc(sizeof(char) * 4096, GFP_KERNEL);
+	struct b2r2_control *cont = filp->f_dentry->d_inode->i_private;
 
 	if (Buf == NULL) {
 		ret = -ENOMEM;
 		goto out;
 	}
 
-	mutex_lock(&stat_lock);
-	dev_size += sprintf(Buf + dev_size, "Added jobs: %lu\n",
-			stat_n_jobs_added);
-	dev_size += sprintf(Buf + dev_size, "Released jobs: %lu\n",
-			stat_n_jobs_released);
-	dev_size += sprintf(Buf + dev_size, "Jobs in report list: %lu\n",
-			stat_n_jobs_in_report_list);
-	dev_size += sprintf(Buf + dev_size, "Clients in open: %lu\n",
-			stat_n_in_open);
-	dev_size += sprintf(Buf + dev_size, "Clients in release: %lu\n",
-			stat_n_in_release);
-	dev_size += sprintf(Buf + dev_size, "Clients in blt: %lu\n",
-			stat_n_in_blt);
-	dev_size += sprintf(Buf + dev_size, "              synch: %lu\n",
-			stat_n_in_blt_synch);
-	dev_size += sprintf(Buf + dev_size, "              add: %lu\n",
-			stat_n_in_blt_add);
-	dev_size += sprintf(Buf + dev_size, "              wait: %lu\n",
-			stat_n_in_blt_wait);
-	dev_size += sprintf(Buf + dev_size, "Clients in synch 0: %lu\n",
-			stat_n_in_synch_0);
-	dev_size += sprintf(Buf + dev_size, "Clients in synch job: %lu\n",
-			stat_n_in_synch_job);
-	dev_size += sprintf(Buf + dev_size, "Clients in query_cap: %lu\n",
-			stat_n_in_query_cap);
-	mutex_unlock(&stat_lock);
+	mutex_lock(&cont->stat_lock);
+	dev_size += sprintf(Buf + dev_size, "Added jobs           : %lu\n",
+		cont->stat_n_jobs_added);
+	dev_size += sprintf(Buf + dev_size, "Released jobs        : %lu\n",
+		cont->stat_n_jobs_released);
+	dev_size += sprintf(Buf + dev_size, "Jobs in report list  : %lu\n",
+		cont->stat_n_jobs_in_report_list);
+	dev_size += sprintf(Buf + dev_size, "Clients in open      : %lu\n",
+		cont->stat_n_in_open);
+	dev_size += sprintf(Buf + dev_size, "Clients in release   : %lu\n",
+		cont->stat_n_in_release);
+	dev_size += sprintf(Buf + dev_size, "Clients in blt       : %lu\n",
+		cont->stat_n_in_blt);
+	dev_size += sprintf(Buf + dev_size, "         synch       : %lu\n",
+		cont->stat_n_in_blt_synch);
+	dev_size += sprintf(Buf + dev_size, "           add       : %lu\n",
+		cont->stat_n_in_blt_add);
+	dev_size += sprintf(Buf + dev_size, "          wait       : %lu\n",
+		cont->stat_n_in_blt_wait);
+	dev_size += sprintf(Buf + dev_size, "Clients in synch 0   : %lu\n",
+		cont->stat_n_in_synch_0);
+	dev_size += sprintf(Buf + dev_size, "Clients in synch job : %lu\n",
+		cont->stat_n_in_synch_job);
+	dev_size += sprintf(Buf + dev_size, "Clients in query_cap : %lu\n",
+		cont->stat_n_in_query_cap);
+	mutex_unlock(&cont->stat_lock);
 
 	/* No more to read if offset != 0 */
 	if (*f_pos > dev_size)
@@ -3256,37 +3206,37 @@ static const struct file_operations debugfs_b2r2_blt_stat_fops = {
 };
 #endif
 
-static void init_tmp_bufs(void)
+static void init_tmp_bufs(struct b2r2_control *cont)
 {
 	int i = 0;
 
-	for (i = 0; i < MAX_TMP_BUFS_NEEDED; i++) {
-		tmp_bufs[i].buf.virt_addr = dma_alloc_coherent(
-			b2r2_blt_device(), MAX_TMP_BUF_SIZE,
-			&tmp_bufs[i].buf.phys_addr, GFP_DMA);
-		if (tmp_bufs[i].buf.virt_addr != NULL)
-			tmp_bufs[i].buf.size = MAX_TMP_BUF_SIZE;
+	for (i = 0; i < (sizeof(cont->tmp_bufs) / sizeof(struct tmp_buf));
+			i++) {
+		cont->tmp_bufs[i].buf.virt_addr = dma_alloc_coherent(
+			cont->dev, MAX_TMP_BUF_SIZE,
+			&cont->tmp_bufs[i].buf.phys_addr, GFP_DMA);
+		if (cont->tmp_bufs[i].buf.virt_addr != NULL)
+			cont->tmp_bufs[i].buf.size = MAX_TMP_BUF_SIZE;
 		else {
-			b2r2_log_err("%s: Failed to allocate temp buffer %i\n",
-								__func__, i);
-
-			tmp_bufs[i].buf.size = 0;
+			b2r2_log_err(cont->dev, "%s: Failed to allocate temp "
+				"buffer %i\n", __func__, i);
+			cont->tmp_bufs[i].buf.size = 0;
 		}
 	}
 }
 
-static void destroy_tmp_bufs(void)
+static void destroy_tmp_bufs(struct b2r2_control *cont)
 {
 	int i = 0;
 
 	for (i = 0; i < MAX_TMP_BUFS_NEEDED; i++) {
-		if (tmp_bufs[i].buf.size != 0) {
-			dma_free_coherent(b2r2_blt_device(),
-						tmp_bufs[i].buf.size,
-						tmp_bufs[i].buf.virt_addr,
-						tmp_bufs[i].buf.phys_addr);
+		if (cont->tmp_bufs[i].buf.size != 0) {
+			dma_free_coherent(cont->dev,
+					cont->tmp_bufs[i].buf.size,
+					cont->tmp_bufs[i].buf.virt_addr,
+					cont->tmp_bufs[i].buf.phys_addr);
 
-			tmp_bufs[i].buf.size = 0;
+			cont->tmp_bufs[i].buf.size = 0;
 		}
 	}
 }
@@ -3296,105 +3246,116 @@ static void destroy_tmp_bufs(void)
  *
  * Returns 0 if OK else negative error code
  */
-int b2r2_blt_module_init(void)
+int b2r2_blt_module_init(struct b2r2_control *cont)
 {
 	int ret;
 
-	mutex_init(&stat_lock);
+	mutex_init(&cont->stat_lock);
+
+	/* Register b2r2 driver */
+	cont->miscdev.minor = MISC_DYNAMIC_MINOR;
+	cont->miscdev.name = cont->name;
+	cont->miscdev.fops = &b2r2_blt_fops;
+
+	ret = misc_register(&cont->miscdev);
+	if (ret) {
+		printk(KERN_WARNING "%s: registering misc device fails\n",
+				__func__);
+		goto b2r2_misc_register_fail;
+	}
+
+	cont->dev = cont->miscdev.this_device;
+	dev_set_drvdata(cont->dev, cont);
 
 #ifdef CONFIG_B2R2_GENERIC
 	/* Initialize generic path */
-	b2r2_generic_init();
+	b2r2_generic_init(cont);
 #endif
-
 	/* Initialize node splitter */
-	ret = b2r2_node_split_init();
+	ret = b2r2_node_split_init(cont);
 	if (ret) {
-		printk(KERN_WARNING "%s: node split init fails\n",
-			__func__);
+		printk(KERN_WARNING "%s: node split init fails\n", __func__);
 		goto b2r2_node_split_init_fail;
 	}
 
-	/* Register b2r2 driver */
-	ret = misc_register(&b2r2_blt_misc_dev);
-	if (ret) {
-		printk(KERN_WARNING "%s: registering misc device fails\n",
-			__func__);
-		goto b2r2_misc_register_fail;
-	}
-
-	b2r2_blt_misc_dev.this_device->coherent_dma_mask = 0xFFFFFFFF;
-	b2r2_blt_dev = &b2r2_blt_misc_dev;
-	b2r2_log_info("%s\n", __func__);
+	b2r2_log_info(cont->dev, "%s: device registered\n", __func__);
 
 	/*
 	 * FIXME: This stuff should be done before the first requests i.e.
 	 * before misc_register, but they need the device which is not
 	 * available until after misc_register.
 	 */
-	init_tmp_bufs();
+	cont->dev->coherent_dma_mask = 0xFFFFFFFF;
+	init_tmp_bufs(cont);
+	ret = b2r2_filters_init(cont);
+	if (ret) {
+		b2r2_log_warn(cont->dev, "%s: failed to init filters\n",
+			__func__);
+		goto b2r2_filter_init_fail;
+	}
 
 	/* Initialize memory allocator */
-	ret = b2r2_mem_init(b2r2_blt_device(), B2R2_HEAP_SIZE,
+	ret = b2r2_mem_init(cont, B2R2_HEAP_SIZE,
 			4, sizeof(struct b2r2_node));
 	if (ret) {
 		printk(KERN_WARNING "%s: initializing B2R2 memhandler fails\n",
-			__func__);
+				__func__);
 		goto b2r2_mem_init_fail;
 	}
 
 #ifdef CONFIG_DEBUG_FS
 	/* Register debug fs */
-	if (!debugfs_root_dir) {
-		debugfs_root_dir = debugfs_create_dir("b2r2_blt", NULL);
-		debugfs_create_file("latest_request",
-				0666, debugfs_root_dir,
-				0,
-				&debugfs_b2r2_blt_request_fops);
-		debugfs_create_file("stat",
-				0666, debugfs_root_dir,
-				0,
-				&debugfs_b2r2_blt_stat_fops);
+	if (cont->debugfs_root_dir) {
+		debugfs_create_file("last_request", 0666,
+			cont->debugfs_root_dir,
+			cont, &debugfs_b2r2_blt_request_fops);
+		debugfs_create_file("stats", 0666,
+			cont->debugfs_root_dir,
+			cont, &debugfs_b2r2_blt_stat_fops);
 	}
 #endif
-	goto out;
 
-b2r2_misc_register_fail:
-b2r2_mem_init_fail:
-	b2r2_node_split_exit();
+	b2r2_ctl[cont->id] = cont;
+	b2r2_log_info(cont->dev, "%s: done\n", __func__);
+
+	return ret;
 
+b2r2_mem_init_fail:
+	b2r2_filters_exit(cont);
+b2r2_filter_init_fail:
+	b2r2_node_split_exit(cont);
 b2r2_node_split_init_fail:
 #ifdef CONFIG_B2R2_GENERIC
-	b2r2_generic_exit();
+	b2r2_generic_exit(cont);
 #endif
-out:
+	misc_deregister(&cont->miscdev);
+b2r2_misc_register_fail:
 	return ret;
 }
 
 /**
  * b2r2_module_exit() - Module exit function
  */
-void b2r2_blt_module_exit(void)
+void b2r2_blt_module_exit(struct b2r2_control *cont)
 {
+	if (cont) {
+		b2r2_log_info(cont->dev, "%s\n", __func__);
 #ifdef CONFIG_DEBUG_FS
-	if (debugfs_root_dir) {
-		debugfs_remove_recursive(debugfs_root_dir);
-		debugfs_root_dir = NULL;
-	}
+		if (cont->debugfs_root_dir) {
+			debugfs_remove_recursive(cont->debugfs_root_dir);
+			cont->debugfs_root_dir = NULL;
+		}
 #endif
-	if (b2r2_blt_dev) {
-		b2r2_log_info("%s\n", __func__);
-		b2r2_mem_exit();
-		destroy_tmp_bufs();
-		b2r2_blt_dev = NULL;
-		misc_deregister(&b2r2_blt_misc_dev);
-	}
-
-	b2r2_node_split_exit();
-
+		b2r2_mem_exit(cont);
+		destroy_tmp_bufs(cont);
+		b2r2_ctl[cont->id] = NULL;
+		misc_deregister(&cont->miscdev);
+		b2r2_node_split_exit(cont);
 #if defined(CONFIG_B2R2_GENERIC)
-	b2r2_generic_exit();
+		b2r2_generic_exit(cont);
 #endif
+		b2r2_filters_exit(cont);
+	}
 }
 
 MODULE_AUTHOR("Robert Fekete <robert.fekete@stericsson.com>");
diff --git a/drivers/video/b2r2/b2r2_core.c b/drivers/video/b2r2/b2r2_core.c
index 7a11a301d11..629633a7888 100644
--- a/drivers/video/b2r2/b2r2_core.c
+++ b/drivers/video/b2r2/b2r2_core.c
@@ -49,6 +49,7 @@
 #include <linux/slab.h>
 #include <linux/err.h>
 
+#include "b2r2_internal.h"
 #include "b2r2_core.h"
 #include "b2r2_global.h"
 #include "b2r2_structures.h"
@@ -103,6 +104,15 @@
  */
 #define B2R2_CORE_HIGHEST_PRIO 20
 
+/**
+ * B2R2_DOMAIN_DISABLE -
+ */
+#define B2R2_DOMAIN_DISABLE_TIMEOUT (HZ/100)
+
+/**
+ * B2R2_REGULATOR_RETRY_COUNT -
+ */
+#define B2R2_REGULATOR_RETRY_COUNT 10
 
 /**
  * B2R2 Hardware defines below
@@ -239,7 +249,8 @@ struct b2r2_core {
 	u16 min_req_time;
 	int irq;
 
-	struct device *log_dev;
+	char name[16];
+	struct device *dev;
 
 	struct list_head prio_queue;
 
@@ -267,6 +278,7 @@ struct b2r2_core {
 
 #ifdef CONFIG_DEBUG_FS
 	struct dentry *debugfs_root_dir;
+	struct dentry *debugfs_core_root_dir;
 	struct dentry *debugfs_regs_dir;
 #endif
 
@@ -291,88 +303,96 @@ struct b2r2_core {
 
 	struct clk *b2r2_clock;
 	struct regulator *b2r2_reg;
+
+	struct b2r2_control *control;
 };
 
 /**
- * b2r2_core - Administration data for B2R2 core (singleton)
+ * b2r2_core - Quick link to administration data for B2R2
  */
-static struct b2r2_core   b2r2_core;
+static struct b2r2_core   *b2r2_core[B2R2_MAX_NBR_DEVICES];
 
 /* Local functions */
-static void check_prio_list(bool atomic);
-static void  clear_interrupts(void);
-static void trigger_job(struct b2r2_core_job *job);
-static void exit_job_list(struct list_head *job_list);
-static int get_next_job_id(void);
+static void check_prio_list(struct b2r2_core *core, bool atomic);
+static void  clear_interrupts(struct b2r2_core *core);
+static void trigger_job(struct b2r2_core *core, struct b2r2_core_job *job);
+static void exit_job_list(struct b2r2_core *core,
+		struct list_head *job_list);
+static int get_next_job_id(struct b2r2_core *core);
 static void job_work_function(struct work_struct *ptr);
 static void init_job(struct b2r2_core_job *job);
-static void insert_into_prio_list(struct b2r2_core_job *job);
-static struct b2r2_core_job *find_job_in_list(
-	int job_id,
-	struct list_head *list);
-static struct b2r2_core_job *find_job_in_active_jobs(int job_id);
-static struct b2r2_core_job *find_tag_in_list(
-	int tag,
-	struct list_head *list);
-static struct b2r2_core_job *find_tag_in_active_jobs(int tag);
-
-static int domain_enable(void);
-static void domain_disable(void);
+static void insert_into_prio_list(struct b2r2_core *core,
+		struct b2r2_core_job *job);
+static struct b2r2_core_job *find_job_in_list(int job_id,
+		struct list_head *list);
+static struct b2r2_core_job *find_job_in_active_jobs(struct b2r2_core *core,
+		int job_id);
+static struct b2r2_core_job *find_tag_in_list(struct b2r2_core *core,
+		int tag, struct list_head *list);
+static struct b2r2_core_job *find_tag_in_active_jobs(struct b2r2_core *core,
+		int tag);
+
+static int domain_enable(struct b2r2_core *core);
+static void domain_disable(struct b2r2_core *core);
 
 static void stop_queue(enum b2r2_core_queue queue);
 
 #ifdef HANDLE_TIMEOUTED_JOBS
-static void printk_regs(void);
-static int hw_reset(void);
+static void printk_regs(struct b2r2_core *core);
+static int hw_reset(struct b2r2_core *core);
 static void timeout_work_function(struct work_struct *ptr);
 #endif
 
 static void reset_hw_timer(struct b2r2_core_job *job);
 static void start_hw_timer(struct b2r2_core_job *job);
-static void stop_hw_timer(struct b2r2_core_job *job);
+static void stop_hw_timer(struct b2r2_core *core,
+		struct b2r2_core_job *job);
 
-static int init_hw(void);
-static void exit_hw(void);
+static int init_hw(struct b2r2_core *core);
+static void exit_hw(struct b2r2_core *core);
 
 /* Tracking release bug... */
 #ifdef DEBUG_CHECK_ADDREF_RELEASE
 /**
  * ar_add() - Adds an addref or a release to the array
  *
+ * @core: The b2r2 core entity
  * @job: The job that has been referenced
  * @caller: The caller of addref / release
  * @addref: true if it is an addref else false for release
  */
-void ar_add(struct b2r2_core_job *job, const char *caller, bool addref)
+static void ar_add(struct b2r2_core *core, struct b2r2_core_job *job,
+		const char *caller, bool addref)
 {
-	b2r2_core.ar[b2r2_core.ar_write].addref = addref;
-	b2r2_core.ar[b2r2_core.ar_write].job = job;
-	b2r2_core.ar[b2r2_core.ar_write].caller = caller;
-	b2r2_core.ar[b2r2_core.ar_write].ref_count = job->ref_count;
-	b2r2_core.ar_write = (b2r2_core.ar_write + 1) %
-		ARRAY_SIZE(b2r2_core.ar);
-	if (b2r2_core.ar_write == b2r2_core.ar_read)
-		b2r2_core.ar_read = (b2r2_core.ar_read + 1) %
-			ARRAY_SIZE(b2r2_core.ar);
+	core->ar[core->ar_write].addref = addref;
+	core->ar[core->ar_write].job = job;
+	core->ar[core->ar_write].caller = caller;
+	core->ar[core->ar_write].ref_count = job->ref_count;
+	core->ar_write = (core->ar_write + 1) %
+		ARRAY_SIZE(core->ar);
+	if (core->ar_write == core->ar_read)
+		core->ar_read = (core->ar_read + 1) %
+			ARRAY_SIZE(core->ar);
 }
 
 /**
  * sprintf_ar() - Writes all addref / release to a string buffer
  *
+ * @core: The b2r2 core entity
  * @buf: Receiving character bufefr
  * @job: Which job to write or NULL for all
  *
  * NOTE! No buffer size check!!
  */
-char *sprintf_ar(char *buf, struct b2r2_core_job *job)
+static char *sprintf_ar(struct b2r2_core *core, char *buf,
+		struct b2r2_core_job *job)
 {
 	int i;
 	int size = 0;
 
-	for (i = b2r2_core.ar_read;
-	     i != b2r2_core.ar_write;
-	     i = (i + 1) % ARRAY_SIZE(b2r2_core.ar)) {
-		struct addref_release *ar = &b2r2_core.ar[i];
+	for (i = core->ar_read; i != core->ar_write;
+			i = (i + 1) % ARRAY_SIZE(core->ar)) {
+		struct addref_release *ar = &core->ar[i];
 		if (!job || job == ar->job)
 			size += sprintf(buf + size,
 					"%s on %p from %s, ref = %d\n",
@@ -386,21 +406,21 @@ char *sprintf_ar(char *buf, struct b2r2_core_job *job)
 /**
  * printk_ar() - Writes all addref / release using dev_info
  *
+ * @core: The b2r2 core entity
  * @job: Which job to write or NULL for all
  */
-void printk_ar(struct b2r2_core_job *job)
+static void printk_ar(struct b2r2_core *core, struct b2r2_core_job *job)
 {
 	int i;
 
-	for (i = b2r2_core.ar_read;
-	     i != b2r2_core.ar_write;
-	     i = (i + 1) % ARRAY_SIZE(b2r2_core.ar)) {
-		struct addref_release *ar = &b2r2_core.ar[i];
+	for (i = core->ar_read; i != core->ar_write;
+			i = (i + 1) % ARRAY_SIZE(core->ar)) {
+		struct addref_release *ar = &core->ar[i];
 		if (!job || job == ar->job)
-			b2r2_log_info("%s on %p from %s,"
-				 " ref = %d\n",
-				 ar->addref ? "addref" : "release",
-				 ar->job, ar->caller, ar->ref_count);
+			b2r2_log_info(core->dev, "%s on %p from %s,"
+				" ref = %d\n",
+				ar->addref ? "addref" : "release",
+				ar->job, ar->caller, ar->ref_count);
 	}
 }
 #endif
@@ -408,32 +428,34 @@ void printk_ar(struct b2r2_core_job *job)
 /**
  * internal_job_addref() - Increments the reference count for a job
  *
+ * @core: The b2r2 core entity
  * @job: Which job to increment reference count for
  * @caller: Name of function calling addref (for debug)
  *
- * Note that b2r2_core.lock _must_ be held
+ * Note that core->lock _must_ be held
  */
-static void internal_job_addref(struct b2r2_core_job *job, const char *caller)
+static void internal_job_addref(struct b2r2_core *core,
+		struct b2r2_core_job *job, const char *caller)
 {
 	u32 ref_count;
 
-	b2r2_log_info("%s (%p) (from %s)\n",
-		__func__, job, caller);
+	b2r2_log_info(core->dev, "%s (%p, %p) (from %s)\n",
+		__func__, core, job, caller);
 
 	/* Sanity checks */
 	BUG_ON(job == NULL);
 
 	if (job->start_sentinel != START_SENTINEL ||
-	    job->end_sentinel != END_SENTINEL ||
-	    job->ref_count == 0 || job->ref_count > 10)	{
-		b2r2_log_info(
-			 "%s: (%p) start=%X end=%X ref_count=%d\n",
-			 __func__, job, job->start_sentinel,
-			 job->end_sentinel, job->ref_count);
+			job->end_sentinel != END_SENTINEL ||
+			job->ref_count == 0 || job->ref_count > 10)	{
+		b2r2_log_info(core->dev, "%s: (%p, %p) start=%X end=%X "
+			"ref_count=%d\n", __func__, core, job,
+			job->start_sentinel, job->end_sentinel,
+			job->ref_count);
 
 	/* Something is wrong, print the addref / release array */
 #ifdef DEBUG_CHECK_ADDREF_RELEASE
-		printk_ar(NULL);
+		printk_ar(core, NULL);
 #endif
 	}
 
@@ -446,61 +468,61 @@ static void internal_job_addref(struct b2r2_core_job *job, const char *caller)
 
 #ifdef DEBUG_CHECK_ADDREF_RELEASE
 	/* Keep track of addref / release */
-	ar_add(job, caller, true);
+	ar_add(core, job, caller, true);
 #endif
 
-	b2r2_log_info("%s called from %s (%p): Ref Count is %d\n",
-		__func__, caller, job, job->ref_count);
+	b2r2_log_info(core->dev, "%s called from %s (%p, %p): Ref Count is "
+		"%d\n", __func__, caller, core, job, job->ref_count);
 }
 
 /**
  * internal_job_release() - Decrements the reference count for a job
  *
+ * @core: The b2r2 core entity
  * @job: Which job to decrement reference count for
  * @caller: Name of function calling release (for debug)
  *
  * Returns true if job_release should be called by caller
  * (reference count reached zero).
  *
- * Note that b2r2_core.lock _must_ be held
+ * Note that core->lock _must_ be held
  */
-bool internal_job_release(struct b2r2_core_job *job, const char *caller)
+static bool internal_job_release(struct b2r2_core *core,
+		struct b2r2_core_job *job, const char *caller)
 {
 	u32 ref_count;
 	bool call_release = false;
 
-	b2r2_log_info("%s (%p) (from %s)\n",
-		__func__, job, caller);
-
 	/* Sanity checks */
 	BUG_ON(job == NULL);
 
+	b2r2_log_info(core->dev, "%s (%p, %p) (from %s)\n",
+		__func__, core, job, caller);
+
 	if (job->start_sentinel != START_SENTINEL ||
-	    job->end_sentinel != END_SENTINEL ||
-	    job->ref_count == 0 || job->ref_count > 10) {
-		b2r2_log_info(
-			 "%s: (%p) start=%X end=%X ref_count=%d\n",
-			 __func__, job, job->start_sentinel,
-			 job->end_sentinel, job->ref_count);
+			job->end_sentinel != END_SENTINEL ||
+			job->ref_count == 0 || job->ref_count > 10) {
+		b2r2_log_info(core->dev, "%s: (%p, %p) start=%X end=%X "
+			"ref_count=%d\n", __func__, core, job,
+			job->start_sentinel, job->end_sentinel,
+			job->ref_count);
 
 #ifdef DEBUG_CHECK_ADDREF_RELEASE
-		printk_ar(NULL);
+		printk_ar(core, NULL);
 #endif
 	}
 
-
 	BUG_ON(job->start_sentinel != START_SENTINEL);
 	BUG_ON(job->end_sentinel != END_SENTINEL);
-
 	BUG_ON(job->ref_count == 0 || job->ref_count > 10);
 
 	/* Do the actual decrement */
 	ref_count = --job->ref_count;
 #ifdef DEBUG_CHECK_ADDREF_RELEASE
-	ar_add(job, caller, false);
+	ar_add(core, job, caller, false);
 #endif
-	b2r2_log_info("%s called from %s (%p) Ref Count is %d\n",
-		__func__, caller, job, ref_count);
+	b2r2_log_info(core->dev, "%s called from %s (%p, %p) Ref Count is "
+		"%d\n", __func__, caller, core, job, ref_count);
 
 	if (!ref_count && job->release) {
 		call_release = true;
@@ -515,40 +537,60 @@ bool internal_job_release(struct b2r2_core_job *job, const char *caller)
 
 /* Exported functions */
 
-/* b2r2_core.lock _must_ _NOT_ be held when calling this function */
+/**
+ * core->lock _must_ _NOT_ be held when calling this function
+ */
 void b2r2_core_job_addref(struct b2r2_core_job *job, const char *caller)
 {
 	unsigned long flags;
-	spin_lock_irqsave(&b2r2_core.lock, flags);
-	internal_job_addref(job, caller);
-	spin_unlock_irqrestore(&b2r2_core.lock, flags);
+	struct b2r2_blt_instance *instance;
+	struct b2r2_core *core;
+
+	instance = (struct b2r2_blt_instance *) job->tag;
+	core = instance->control->data;
+
+	spin_lock_irqsave(&core->lock, flags);
+	internal_job_addref(core, job, caller);
+	spin_unlock_irqrestore(&core->lock, flags);
 }
 
-/* b2r2_core.lock _must_ _NOT_ be held when calling this function */
+/**
+ * core->lock _must_ _NOT_ be held when calling this function
+ */
 void b2r2_core_job_release(struct b2r2_core_job *job, const char *caller)
 {
 	unsigned long flags;
 	bool call_release = false;
-	spin_lock_irqsave(&b2r2_core.lock, flags);
-	call_release = internal_job_release(job, caller);
-	spin_unlock_irqrestore(&b2r2_core.lock, flags);
+	struct b2r2_blt_instance *instance;
+	struct b2r2_core *core;
+
+	instance = (struct b2r2_blt_instance *) job->tag;
+	core = instance->control->data;
+
+	spin_lock_irqsave(&core->lock, flags);
+	call_release = internal_job_release(core, job, caller);
+	spin_unlock_irqrestore(&core->lock, flags);
 
 	if (call_release)
 		job->release(job);
 }
 
-/* b2r2_core.lock _must_ _NOT_ be held when calling this function */
-int b2r2_core_job_add(struct b2r2_core_job *job)
+/**
+ * core->lock _must_ _NOT_ be held when calling this function
+ */
+int b2r2_core_job_add(struct b2r2_control *control,
+		struct b2r2_core_job *job)
 {
 	unsigned long flags;
+	struct b2r2_core *core = control->data;
 
-	b2r2_log_info("%s (%p)\n", __func__, job);
+	b2r2_log_info(core->dev, "%s (%p, %p)\n", __func__, control, job);
 
 	/* Enable B2R2 */
-	domain_enable();
+	domain_enable(core);
 
-	spin_lock_irqsave(&b2r2_core.lock, flags);
-	b2r2_core.stat_n_jobs_added++;
+	spin_lock_irqsave(&core->lock, flags);
+	core->stat_n_jobs_added++;
 
 	/* Initialise internal job data */
 	init_job(job);
@@ -557,51 +599,59 @@ int b2r2_core_job_add(struct b2r2_core_job *job)
 	job->ref_count = 1;
 
 	/* Insert job into prio list */
-	insert_into_prio_list(job);
+	insert_into_prio_list(core, job);
 
 	/* Check if we can dispatch job */
-	check_prio_list(false);
-	spin_unlock_irqrestore(&b2r2_core.lock, flags);
+	check_prio_list(core, false);
+	spin_unlock_irqrestore(&core->lock, flags);
 
 	return 0;
 }
 
-/* b2r2_core.lock _must_ _NOT_ be held when calling this function */
-struct b2r2_core_job *b2r2_core_job_find(int job_id)
+/**
+ * core->lock _must_ _NOT_ be held when calling this function
+ */
+struct b2r2_core_job *b2r2_core_job_find(struct b2r2_control *control,
+		int job_id)
 {
 	unsigned long flags;
 	struct b2r2_core_job *job;
+	struct b2r2_core *core = control->data;
 
-	b2r2_log_info("%s (%d)\n", __func__, job_id);
+	b2r2_log_info(core->dev, "%s (%p, %d)\n", __func__, control, job_id);
 
-	spin_lock_irqsave(&b2r2_core.lock, flags);
+	spin_lock_irqsave(&core->lock, flags);
 	/* Look through prio queue */
-	job = find_job_in_list(job_id, &b2r2_core.prio_queue);
+	job = find_job_in_list(job_id, &core->prio_queue);
 
 	if (!job)
-		job = find_job_in_active_jobs(job_id);
+		job = find_job_in_active_jobs(core, job_id);
 
-	spin_unlock_irqrestore(&b2r2_core.lock, flags);
+	spin_unlock_irqrestore(&core->lock, flags);
 
 	return job;
 }
 
-/* b2r2_core.lock _must_ _NOT_ be held when calling this function */
-struct b2r2_core_job *b2r2_core_job_find_first_with_tag(int tag)
+/**
+ * core->lock _must_ _NOT_ be held when calling this function
+ */
+struct b2r2_core_job *b2r2_core_job_find_first_with_tag(
+		struct b2r2_control *control, int tag)
 {
 	unsigned long flags;
 	struct b2r2_core_job *job;
+	struct b2r2_core *core = control->data;
 
-	b2r2_log_info("%s (%d)\n", __func__, tag);
+	b2r2_log_info(core->dev, "%s (%p, %d)\n", __func__, control, tag);
 
-	spin_lock_irqsave(&b2r2_core.lock, flags);
+	spin_lock_irqsave(&core->lock, flags);
 	/* Look through prio queue */
-	job = find_tag_in_list(tag, &b2r2_core.prio_queue);
+	job = find_tag_in_list(core, tag, &core->prio_queue);
 
 	if (!job)
-		job = find_tag_in_active_jobs(tag);
+		job = find_tag_in_active_jobs(core, tag);
 
-	spin_unlock_irqrestore(&b2r2_core.lock, flags);
+	spin_unlock_irqrestore(&core->lock, flags);
 
 	return job;
 }
@@ -613,32 +663,48 @@ struct b2r2_core_job *b2r2_core_job_find_first_with_tag(int tag)
  *
  * Returns true if job is done or cancelled
  *
- * b2r2_core.lock must _NOT_ be held when calling this function
+ * core->lock must _NOT_ be held when calling this function
  */
 static bool is_job_done(struct b2r2_core_job *job)
 {
 	unsigned long flags;
 	bool job_is_done;
+	struct b2r2_blt_instance *instance;
+	struct b2r2_core *core;
+
+	instance = (struct b2r2_blt_instance *) job->tag;
+	core = instance->control->data;
 
-	spin_lock_irqsave(&b2r2_core.lock, flags);
+	spin_lock_irqsave(&core->lock, flags);
 	job_is_done =
 		job->job_state != B2R2_CORE_JOB_QUEUED &&
 		job->job_state != B2R2_CORE_JOB_RUNNING;
-	spin_unlock_irqrestore(&b2r2_core.lock, flags);
+	spin_unlock_irqrestore(&core->lock, flags);
 
 	return job_is_done;
 }
 
-/* b2r2_core.lock _must_ _NOT_ be held when calling this function */
+/**
+ * b2r2_core_job_wait()
+ *
+ * @job:
+ *
+ * core->lock _must_ _NOT_ be held when calling this function
+ */
 int b2r2_core_job_wait(struct b2r2_core_job *job)
 {
 	int ret = 0;
+	struct b2r2_blt_instance *instance;
+	struct b2r2_core *core;
 
-	b2r2_log_info("%s (%p)\n", __func__, job);
+	instance = (struct b2r2_blt_instance *) job->tag;
+	core = instance->control->data;
+
+	b2r2_log_info(core->dev, "%s (%p)\n", __func__, job);
 	/* Check that we have the job */
 	if (job->job_state == B2R2_CORE_JOB_IDLE) {
 		/* Never or not queued */
-		b2r2_log_info("%s: Job not queued\n", __func__);
+		b2r2_log_info(core->dev, "%s: Job not queued\n", __func__);
 		return -ENOENT;
 	}
 
@@ -648,9 +714,9 @@ int b2r2_core_job_wait(struct b2r2_core_job *job)
 		is_job_done(job));
 
 	if (ret)
-		b2r2_log_warn(
-			 "%s: wait_event_interruptible returns %d, state is %d",
-			 __func__, ret, job->job_state);
+		b2r2_log_warn(core->dev,
+			"%s: wait_event_interruptible returns %d state is %d",
+			__func__, ret, job->job_state);
 	return ret;
 }
 
@@ -662,9 +728,9 @@ int b2r2_core_job_wait(struct b2r2_core_job *job)
  *
  * Returns true if the job was found and cancelled
  *
- * b2r2_core.lock must be held when calling this function
+ * core->lock must be held when calling this function
  */
-static bool cancel_job(struct b2r2_core_job *job)
+static bool cancel_job(struct b2r2_core *core, struct b2r2_core_job *job)
 {
 	bool found_job = false;
 	bool job_was_active = false;
@@ -676,152 +742,168 @@ static bool cancel_job(struct b2r2_core_job *job)
 	}
 
 	/* Remove from active jobs */
-	if (!found_job) {
-		if (b2r2_core.n_active_jobs > 0) {
-			int i;
+	if (!found_job && core->n_active_jobs > 0) {
+		int i;
 
-			/* Look for timeout:ed jobs and put them in tmp list */
-			for (i = 0;
-			     i < ARRAY_SIZE(b2r2_core.active_jobs);
-			     i++) {
-				if (b2r2_core.active_jobs[i] == job) {
-					stop_queue((enum b2r2_core_queue)i);
-					stop_hw_timer(job);
-					b2r2_core.active_jobs[i] = NULL;
-					b2r2_core.n_active_jobs--;
-					found_job = true;
-					job_was_active = true;
-				}
+		/* Look for timeout:ed jobs and put them in tmp list */
+		for (i = 0; i < ARRAY_SIZE(core->active_jobs); i++) {
+			if (core->active_jobs[i] == job) {
+				stop_queue((enum b2r2_core_queue)i);
+				stop_hw_timer(core, job);
+				core->active_jobs[i] = NULL;
+				core->n_active_jobs--;
+				found_job = true;
+				job_was_active = true;
 			}
 		}
 	}
 
-
 	/* Handle done list & callback */
 	if (found_job) {
 		/* Job is canceled */
 		job->job_state = B2R2_CORE_JOB_CANCELED;
 
-		queue_work(b2r2_core.work_queue, &job->work);
+		queue_work(core->work_queue, &job->work);
 
 		/* Statistics */
 		if (!job_was_active)
-			b2r2_core.stat_n_jobs_in_prio_list--;
+			core->stat_n_jobs_in_prio_list--;
 
 	}
 
 	return found_job;
 }
 
-/* b2r2_core.lock _must_ _NOT_ be held when calling this function */
+/* core->lock _must_ _NOT_ be held when calling this function */
 int b2r2_core_job_cancel(struct b2r2_core_job *job)
 {
 	unsigned long flags;
 	int ret = 0;
+	struct b2r2_blt_instance *instance;
+	struct b2r2_core *core;
+
+	instance = (struct b2r2_blt_instance *) job->tag;
+	core = instance->control->data;
 
-	b2r2_log_info("%s (%p) (%d)\n", __func__,
-		job, job->job_state);
+	b2r2_log_info(core->dev, "%s (%p) (%d)\n",
+		__func__, job, job->job_state);
 	/* Check that we have the job */
 	if (job->job_state == B2R2_CORE_JOB_IDLE) {
 		/* Never or not queued */
-		b2r2_log_info("%s: Job not queued\n", __func__);
+		b2r2_log_info(core->dev, "%s: Job not queued\n", __func__);
 		return -ENOENT;
 	}
 
 	/* Remove from prio list */
-	spin_lock_irqsave(&b2r2_core.lock, flags);
-	cancel_job(job);
-	spin_unlock_irqrestore(&b2r2_core.lock, flags);
+	spin_lock_irqsave(&core->lock, flags);
+	cancel_job(core, job);
+	spin_unlock_irqrestore(&core->lock, flags);
 
 	return ret;
 }
 
 /* LOCAL FUNCTIONS BELOW */
 
-#define B2R2_DOMAIN_DISABLE_TIMEOUT (HZ/100)
-
+/**
+ * domain_disable_work_function()
+ *
+ * @core: The b2r2 core entity
+ */
 static void domain_disable_work_function(struct work_struct *work)
 {
-	if (!mutex_trylock(&b2r2_core.domain_lock))
+	struct delayed_work *twork = to_delayed_work(work);
+	struct b2r2_core *core = container_of(
+			twork, struct b2r2_core, domain_disable_work);
+
+	if (!mutex_trylock(&core->domain_lock))
 		return;
 
-	if (b2r2_core.domain_request_count == 0) {
-		exit_hw();
-		clk_disable(b2r2_core.b2r2_clock);
-		regulator_disable(b2r2_core.b2r2_reg);
-		b2r2_core.domain_enabled = false;
+	if (core->domain_request_count == 0) {
+		exit_hw(core);
+		clk_disable(core->b2r2_clock);
+		regulator_disable(core->b2r2_reg);
+		core->domain_enabled = false;
 	}
 
-	mutex_unlock(&b2r2_core.domain_lock);
+	mutex_unlock(&core->domain_lock);
 }
 
-#define B2R2_REGULATOR_RETRY_COUNT 10
-
-static int domain_enable(void)
+/**
+ * domain_enable()
+ *
+ * @core: The b2r2 core entity
+ */
+static int domain_enable(struct b2r2_core *core)
 {
-	mutex_lock(&b2r2_core.domain_lock);
-	b2r2_core.domain_request_count++;
+	mutex_lock(&core->domain_lock);
+	core->domain_request_count++;
 
-	if (!b2r2_core.domain_enabled) {
+	if (!core->domain_enabled) {
 		int retry = 0;
 		int ret;
-
 again:
 		/*
 		 * Since regulator_enable() may sleep we have to handle
 		 * interrupts.
 		 */
-		ret = regulator_enable(b2r2_core.b2r2_reg);
+		ret = regulator_enable(core->b2r2_reg);
 		if ((ret == -EAGAIN) &&
 				((retry++) < B2R2_REGULATOR_RETRY_COUNT))
 			goto again;
 		else if (ret < 0)
 			goto regulator_enable_failed;
 
-		clk_enable(b2r2_core.b2r2_clock);
-		if (init_hw() < 0)
+		clk_enable(core->b2r2_clock);
+		if (init_hw(core) < 0)
 			goto init_hw_failed;
-		b2r2_core.domain_enabled = true;
+		core->domain_enabled = true;
 	}
 
-	mutex_unlock(&b2r2_core.domain_lock);
+	mutex_unlock(&core->domain_lock);
 
 	return 0;
 
 init_hw_failed:
-	b2r2_log_err("%s: Could not initialize hardware!\n", __func__);
+	b2r2_log_err(core->dev,
+		"%s: Could not initialize hardware!\n", __func__);
 
-	clk_disable(b2r2_core.b2r2_clock);
+	clk_disable(core->b2r2_clock);
 
-	if (regulator_disable(b2r2_core.b2r2_reg) < 0)
-		b2r2_log_err("%s: regulator_disable failed!\n", __func__);
+	if (regulator_disable(core->b2r2_reg) < 0)
+		b2r2_log_err(core->dev, "%s: regulator_disable failed!\n",
+				__func__);
 
 regulator_enable_failed:
-	b2r2_core.domain_request_count--;
-	mutex_unlock(&b2r2_core.domain_lock);
+	core->domain_request_count--;
+	mutex_unlock(&core->domain_lock);
 
 	return -EFAULT;
 }
 
-static void domain_disable(void)
+/**
+ * domain_disable()
+ *
+ * @core: The b2r2 core entity
+ */
+static void domain_disable(struct b2r2_core *core)
 {
-	mutex_lock(&b2r2_core.domain_lock);
+	mutex_lock(&core->domain_lock);
 
-	if (b2r2_core.domain_request_count == 0) {
-		b2r2_log_err("%s: Unbalanced domain_disable()\n", __func__);
+	if (core->domain_request_count == 0) {
+		b2r2_log_err(core->dev,
+			"%s: Unbalanced domain_disable()\n", __func__);
 	} else {
-		b2r2_core.domain_request_count--;
+		core->domain_request_count--;
 
 		/* Cancel any existing work */
-		cancel_delayed_work_sync(&b2r2_core.domain_disable_work);
+		cancel_delayed_work_sync(&core->domain_disable_work);
 
 		/* Add a work to disable the power and clock after a delay */
-		queue_delayed_work(b2r2_core.work_queue,
-				&b2r2_core.domain_disable_work,
+		queue_delayed_work(core->work_queue, &core->domain_disable_work,
 				B2R2_DOMAIN_DISABLE_TIMEOUT);
 	}
 
-	mutex_unlock(&b2r2_core.domain_lock);
+	mutex_unlock(&core->domain_lock);
 }
 
 /**
@@ -829,47 +911,52 @@ static void domain_disable(void)
  */
 static void stop_queue(enum b2r2_core_queue queue)
 {
-	/* TODO: Implement! If this function is not implemented canceled jobs will
-	use b2r2 which is a waste of resources. Not stopping jobs will also screw up
-	the hardware timing, the job the canceled job intrerrupted (if any) will be
-	billed for the time between the point where the job is cancelled and when it
-	stops. */
+	/* TODO: Implement! If this function is not implemented canceled jobs
+	 * will use b2r2 which is a waste of resources. Not stopping jobs will
+	 * also screw up the hardware timing, the job the canceled job
+	 * intrerrupted (if any) will be billed for the time between the point
+	 * where the job is cancelled and when it stops. */
 }
 
 /**
  * exit_job_list() - Empties a job queue by canceling the jobs
  *
- * b2r2_core.lock _must_ be held when calling this function
+ * @core: The b2r2 core entity
+ *
+ * core->lock _must_ be held when calling this function
  */
-static void exit_job_list(struct list_head *job_queue)
+static void exit_job_list(struct b2r2_core *core,
+		struct list_head *job_queue)
 {
 	while (!list_empty(job_queue)) {
 		struct b2r2_core_job *job =
 			list_entry(job_queue->next,
-				   struct b2r2_core_job,
-				   list);
+				struct b2r2_core_job,
+				list);
 		/* Add reference to prevent job from disappearing
 		   in the middle of our work, released below */
-		internal_job_addref(job, __func__);
+		internal_job_addref(core, job, __func__);
 
-		cancel_job(job);
+		cancel_job(core, job);
 
 		/* Matching release to addref above */
-		internal_job_release(job, __func__);
+		internal_job_release(core, job, __func__);
 
 	}
 }
 
 /**
  * get_next_job_id() - Return a new job id.
+ *
+ * @core: The b2r2 core entity
  */
-static int get_next_job_id(void)
+static int get_next_job_id(struct b2r2_core *core)
 {
 	int job_id;
 
-	if (b2r2_core.next_job_id < 1)
-		b2r2_core.next_job_id = 1;
-	job_id = b2r2_core.next_job_id++;
+	if (core->next_job_id < 1)
+		core->next_job_id = 1;
+	job_id = core->next_job_id++;
 
 	return job_id;
 }
@@ -883,22 +970,27 @@ static int get_next_job_id(void)
 static void job_work_function(struct work_struct *ptr)
 {
 	unsigned long flags;
-	struct b2r2_core_job    *job = container_of(
-		ptr, struct b2r2_core_job, work);
+	struct b2r2_core_job *job =
+			container_of(ptr, struct b2r2_core_job, work);
+	struct b2r2_blt_instance *instance;
+	struct b2r2_core *core;
+
+	instance = (struct b2r2_blt_instance *) job->tag;
+	core = instance->control->data;
 
 	/* Disable B2R2 */
-	domain_disable();
+	domain_disable(core);
 
 	/* Release resources */
 	if (job->release_resources)
 		job->release_resources(job, false);
 
-	spin_lock_irqsave(&b2r2_core.lock, flags);
+	spin_lock_irqsave(&core->lock, flags);
 
 	/* Dispatch a new job if possible */
-	check_prio_list(false);
+	check_prio_list(core, false);
 
-	spin_unlock_irqrestore(&b2r2_core.lock, flags);
+	spin_unlock_irqrestore(&core->lock, flags);
 
 	/* Tell the client */
 	if (job->callback)
@@ -922,53 +1014,52 @@ static void timeout_work_function(struct work_struct *ptr)
 {
 	unsigned long flags;
 	struct list_head job_list;
+	struct delayed_work *twork = to_delayed_work(ptr);
+	struct b2r2_core *core = container_of(twork, struct b2r2_core,
+			timeout_work);
 
 	INIT_LIST_HEAD(&job_list);
 
 	/* Cancel all jobs if too long time since last irq */
-	spin_lock_irqsave(&b2r2_core.lock, flags);
-	if (b2r2_core.n_active_jobs > 0) {
+	spin_lock_irqsave(&core->lock, flags);
+	if (core->n_active_jobs > 0) {
 		unsigned long diff =
-			(long) jiffies - (long) b2r2_core.jiffies_last_irq;
+			(long) jiffies - (long) core->jiffies_last_irq;
 		if (diff > HZ/2) {
 			/* Active jobs and more than a second since last irq! */
 			int i;
 
-			/* Look for timeout:ed jobs and put them in tmp list. It's
-			important that the application queues are killed in order
-			of decreasing priority */
-			for (i = 0;
-			     i < ARRAY_SIZE(b2r2_core.active_jobs);
-			     i++) {
+			/* Look for timeout:ed jobs and put them in tmp list.
+			 * It's important that the application queues are
+			 * killed in order of decreasing priority */
+			for (i = 0; i < ARRAY_SIZE(core->active_jobs); i++) {
 				struct b2r2_core_job *job =
-					b2r2_core.active_jobs[i];
+					core->active_jobs[i];
 
 				if (job) {
-					stop_hw_timer(job);
-
-					b2r2_core.active_jobs[i] = NULL;
-					b2r2_core.n_active_jobs--;
-					list_add_tail(&job->list,
-						      &job_list);
+					stop_hw_timer(core, job);
+					core->active_jobs[i] = NULL;
+					core->n_active_jobs--;
+					list_add_tail(&job->list, &job_list);
 				}
 			}
 
 			/* Print the B2R2 register and reset B2R2 */
-			printk_regs();
-			hw_reset();
+			printk_regs(core);
+			hw_reset(core);
 		}
 	}
-	spin_unlock_irqrestore(&b2r2_core.lock, flags);
+	spin_unlock_irqrestore(&core->lock, flags);
 
 	/* Handle timeout:ed jobs */
-	spin_lock_irqsave(&b2r2_core.lock, flags);
+	spin_lock_irqsave(&core->lock, flags);
 	while (!list_empty(&job_list)) {
 		struct b2r2_core_job *job =
 			list_entry(job_list.next,
-				   struct b2r2_core_job,
-				   list);
+				struct b2r2_core_job,
+				list);
 
-		b2r2_log_warn("%s: Job timeout\n", __func__);
+		b2r2_log_warn(core->dev, "%s: Job timeout\n", __func__);
 
 		list_del_init(&job->list);
 
@@ -979,16 +1070,16 @@ static void timeout_work_function(struct work_struct *ptr)
 		wake_up_interruptible(&job->event);
 
 		/* Job callbacks handled via work queue */
-		queue_work(b2r2_core.work_queue, &job->work);
+		queue_work(core->work_queue, &job->work);
 	}
 
 	/* Requeue delayed work */
-	if (b2r2_core.n_active_jobs)
+	if (core->n_active_jobs)
 		queue_delayed_work(
-			b2r2_core.work_queue,
-			&b2r2_core.timeout_work, HZ/2);
+			core->work_queue,
+			&core->timeout_work, HZ/2);
 
-	spin_unlock_irqrestore(&b2r2_core.lock, flags);
+	spin_unlock_irqrestore(&core->lock, flags);
 }
 #endif
 
@@ -998,7 +1089,7 @@ static void timeout_work_function(struct work_struct *ptr)
  *
  * @job: Pointer to job struct
  *
- * b2r2_core.lock _must_ be held when calling this function
+ * core->lock _must_ be held when calling this function
  */
 static void reset_hw_timer(struct b2r2_core_job *job)
 {
@@ -1012,7 +1103,7 @@ static void reset_hw_timer(struct b2r2_core_job *job)
  *
  * @job: Pointer to job struct
  *
- * b2r2_core.lock _must_ be held when calling this function
+ * core->lock _must_ be held when calling this function
  */
 static void start_hw_timer(struct b2r2_core_job *job)
 {
@@ -1024,11 +1115,12 @@ static void start_hw_timer(struct b2r2_core_job *job)
  *                   Should be called immediatly after the hardware has
  *                   finished.
  *
+ * @core: The b2r2 core entity
  * @job: Pointer to job struct
  *
- * b2r2_core.lock _must_ be held when calling this function
+ * core->lock _must_ be held when calling this function
  */
-static void stop_hw_timer(struct b2r2_core_job *job)
+static void stop_hw_timer(struct b2r2_core *core, struct b2r2_core_job *job)
 {
 	/* Assumes only app queues are used, which is the case right now. */
 	/* Not 100% accurate. When a higher prio job interrupts a lower prio job it does
@@ -1058,7 +1150,7 @@ static void stop_hw_timer(struct b2r2_core_job *job)
 	/* Check if we have delayed the start of higher prio jobs. Can happen as queue
 	switching only can be done between nodes. */
 	for (i = (int)job->queue - 1; i >= (int)B2R2_CORE_QUEUE_AQ1; i--) {
-		struct b2r2_core_job *queue_active_job = b2r2_core.active_jobs[i];
+		struct b2r2_core_job *queue_active_job = core->active_jobs[i];
 		if (NULL == queue_active_job)
 			continue;
 
@@ -1067,17 +1159,21 @@ static void stop_hw_timer(struct b2r2_core_job *job)
 
 	/* Check if the job has stolen time from lower prio jobs */
 	for (i = (int)job->queue + 1; i < B2R2_NUM_APPLICATIONS_QUEUES; i++) {
-		struct b2r2_core_job *queue_active_job = b2r2_core.active_jobs[i];
+		struct b2r2_core_job *queue_active_job = core->active_jobs[i];
 		u32 queue_active_job_hw_start_time;
 
 		if (NULL == queue_active_job)
 			continue;
 
-		queue_active_job_hw_start_time = queue_active_job->hw_start_time + time_pos_offset;
+		queue_active_job_hw_start_time =
+			queue_active_job->hw_start_time +
+			time_pos_offset;
 
 		if (queue_active_job_hw_start_time < stop_time) {
-			u32 queue_active_job_nsec_in_hw = stop_time - queue_active_job_hw_start_time;
-			u32 num_stolen_nsec = min(queue_active_job_nsec_in_hw, nsec_in_hw);
+			u32 queue_active_job_nsec_in_hw = stop_time -
+				queue_active_job_hw_start_time;
+			u32 num_stolen_nsec = min(queue_active_job_nsec_in_hw,
+				nsec_in_hw);
 
 			queue_active_job->nsec_active_in_hw -= (s32)num_stolen_nsec;
 
@@ -1098,11 +1194,17 @@ static void stop_hw_timer(struct b2r2_core_job *job)
  */
 static void init_job(struct b2r2_core_job *job)
 {
+	struct b2r2_blt_instance *instance;
+	struct b2r2_core *core;
+
+	instance = (struct b2r2_blt_instance *) job->tag;
+	core = instance->control->data;
+
 	job->start_sentinel = START_SENTINEL;
 	job->end_sentinel = END_SENTINEL;
 
 	/* Get a job id*/
-	job->job_id = get_next_job_id();
+	job->job_id = get_next_job_id(core);
 
 	/* Job is idle, never queued */
 	job->job_state = B2R2_CORE_JOB_IDLE;
@@ -1144,62 +1246,60 @@ static void init_job(struct b2r2_core_job *job)
 /**
  * clear_interrupts() - Disables all interrupts
  *
- * b2r2_core.lock must be held
+ * core->lock _must_ be held
  */
-static void  clear_interrupts(void)
+static void  clear_interrupts(struct b2r2_core *core)
 {
-	writel(0x0, &b2r2_core.hw->BLT_ITM0);
-	writel(0x0, &b2r2_core.hw->BLT_ITM1);
-	writel(0x0, &b2r2_core.hw->BLT_ITM2);
-	writel(0x0, &b2r2_core.hw->BLT_ITM3);
+	writel(0x0, &core->hw->BLT_ITM0);
+	writel(0x0, &core->hw->BLT_ITM1);
+	writel(0x0, &core->hw->BLT_ITM2);
+	writel(0x0, &core->hw->BLT_ITM3);
 }
 
 /**
  * insert_into_prio_list() - Inserts the job into the sorted list of jobs.
  *                           The list is sorted by priority.
  *
+ * @core: The b2r2 core entity
  * @job: Job to insert
  *
- * b2r2_core.lock must be held
+ * core->lock _must_ be held
  */
-static void insert_into_prio_list(struct b2r2_core_job *job)
+static void insert_into_prio_list(struct b2r2_core *core,
+		struct b2r2_core_job *job)
 {
 	/* Ref count is increased when job put in list,
 	   should be released when job is removed from list */
-	internal_job_addref(job, __func__);
+	internal_job_addref(core, job, __func__);
 
-	b2r2_core.stat_n_jobs_in_prio_list++;
+	core->stat_n_jobs_in_prio_list++;
 
 	/* Sort in the job */
-	if (list_empty(&b2r2_core.prio_queue))
-		list_add_tail(&job->list, &b2r2_core.prio_queue);
+	if (list_empty(&core->prio_queue))
+		list_add_tail(&job->list, &core->prio_queue);
 	else {
-		struct b2r2_core_job *first_job =
-			list_entry(b2r2_core.prio_queue.next,
+		struct b2r2_core_job *first_job = list_entry(
+			core->prio_queue.next,
 				   struct b2r2_core_job, list);
-		struct b2r2_core_job *last_job =
-			list_entry(b2r2_core.prio_queue.prev,
+		struct b2r2_core_job *last_job = list_entry(
+			core->prio_queue.prev,
 				   struct b2r2_core_job, list);
 
-		/* High prio job? */
 		if (job->prio > first_job->prio)
-			/* Insert first */
-			list_add(&job->list, &b2r2_core.prio_queue);
+			list_add(&job->list, &core->prio_queue);
 		else if (job->prio <= last_job->prio)
-			/* Insert last */
-			list_add_tail(&job->list, &b2r2_core.prio_queue);
+			list_add_tail(&job->list, &core->prio_queue);
 		else {
 			/* We need to find where to put it */
 			struct list_head *ptr;
 
-			list_for_each(ptr, &b2r2_core.prio_queue) {
+			list_for_each(ptr, &core->prio_queue) {
 				struct b2r2_core_job *list_job =
 					list_entry(ptr, struct b2r2_core_job,
-						   list);
+						list);
 				if (job->prio > list_job->prio) {
-					/* Add before */
 					list_add_tail(&job->list,
-						      &list_job->list);
+						&list_job->list);
 					break;
 				}
 			}
@@ -1213,71 +1313,67 @@ static void insert_into_prio_list(struct b2r2_core_job *job)
  * check_prio_list() - Checks if the first job(s) in the prio list can
  *                     be dispatched to B2R2
  *
+ * @core: The b2r2 core entity
  * @atomic: true if in atomic context (i.e. interrupt context)
  *
- * b2r2_core.lock must be held
+ * core->lock _must_ be held
  */
-static void check_prio_list(bool atomic)
+static void check_prio_list(struct b2r2_core *core, bool atomic)
 {
 	bool dispatched_job;
 	int n_dispatched = 0;
+	struct b2r2_core_job *job;
 
-	/* Do we have anything in our prio list? */
 	do {
 		dispatched_job = false;
-		if (!list_empty(&b2r2_core.prio_queue)) {
-			/* The first job waiting */
-			struct b2r2_core_job *job =
-				list_first_entry(&b2r2_core.prio_queue,
-						 struct b2r2_core_job,
-						 list);
-
-			/* Is the B2R2 queue available? */
-			if (b2r2_core.active_jobs[job->queue] == NULL) {
-				/* Can we acquire resources? */
-				if (!job->acquire_resources ||
-				    job->acquire_resources(job, atomic) == 0) {
-					/* Ok to dispatch job */
-
-					/* Remove from list */
-					list_del_init(&job->list);
-
-					/* The job is now active */
-					b2r2_core.active_jobs[job->queue] = job;
-					b2r2_core.n_active_jobs++;
-					job->jiffies = jiffies;
-					b2r2_core.jiffies_last_active =
-						jiffies;
-
-					/* Kick off B2R2 */
-					trigger_job(job);
-
-					dispatched_job = true;
-					n_dispatched++;
+
+		/* Do we have anything in our prio list? */
+		if (list_empty(&core->prio_queue))
+			break;
+
+		/* The first job waiting */
+		job = list_first_entry(&core->prio_queue,
+				 struct b2r2_core_job, list);
+
+		/* Is the B2R2 queue available? */
+		if (core->active_jobs[job->queue] != NULL)
+			break;
+
+		/* Can we acquire resources? */
+		if (!job->acquire_resources ||
+			job->acquire_resources(job, atomic) == 0) {
+			/* Ok to dispatch job */
+
+			/* Remove from list */
+			list_del_init(&job->list);
+
+			/* The job is now active */
+			core->active_jobs[job->queue] = job;
+			core->n_active_jobs++;
+			job->jiffies = jiffies;
+			core->jiffies_last_active = jiffies;
+
+			/* Kick off B2R2 */
+			trigger_job(core, job);
+			dispatched_job = true;
+			n_dispatched++;
 
 #ifdef HANDLE_TIMEOUTED_JOBS
-					/* Check in one half second
-					   if it hangs */
-					queue_delayed_work(
-						b2r2_core.work_queue,
-						&b2r2_core.timeout_work,
-						HZ/2);
+			/* Check in one half second if it hangs */
+			queue_delayed_work(core->work_queue,
+				&core->timeout_work, HZ/2);
 #endif
-				} else {
-					/* No resources */
-					if (!atomic &&
-					    b2r2_core.n_active_jobs == 0) {
-						b2r2_log_warn(
-							"%s: No resource",
-							__func__);
-						cancel_job(job);
-					}
-				}
+		} else {
+			/* No resources */
+			if (!atomic && core->n_active_jobs == 0) {
+				b2r2_log_warn(core->dev,
+					"%s: No resource", __func__);
+				cancel_job(core, job);
 			}
 		}
 	} while (dispatched_job);
 
-	b2r2_core.stat_n_jobs_in_prio_list -= n_dispatched;
+	core->stat_n_jobs_in_prio_list -= n_dispatched;
 }
 
 /**
@@ -1288,7 +1384,7 @@ static void check_prio_list(bool atomic)
  *
  * Reference count will be incremented for found job.
  *
- * b2r2_core.lock must be held
+ * core->lock _must_ be held
  */
 static struct b2r2_core_job *find_job_in_list(int job_id,
 					      struct list_head *list)
@@ -1296,12 +1392,15 @@ static struct b2r2_core_job *find_job_in_list(int job_id,
 	struct list_head *ptr;
 
 	list_for_each(ptr, list) {
-		struct b2r2_core_job *job =
-			list_entry(ptr, struct b2r2_core_job, list);
+		struct b2r2_core_job *job = list_entry(
+				ptr, struct b2r2_core_job, list);
 		if (job->job_id == job_id) {
+			struct b2r2_blt_instance *instance =
+					(struct b2r2_blt_instance *) job->tag;
+			struct b2r2_core *core = instance->control->data;
 			/* Increase reference count, should be released by
 			   the caller of b2r2_core_job_find */
-			internal_job_addref(job, __func__);
+			internal_job_addref(core, job, __func__);
 			return job;
 		}
 	}
@@ -1311,23 +1410,25 @@ static struct b2r2_core_job *find_job_in_list(int job_id,
 /**
  * find_job_in_active_jobs() - Finds job in active job queues
  *
- * @jobid: Job id to find
+ * @core: The b2r2 core entity
+ * @job_id: Job id to find
  *
  * Reference count will be incremented for found job.
  *
- * b2r2_core.lock must be held
+ * core->lock _must_ be held
  */
-static struct b2r2_core_job *find_job_in_active_jobs(int job_id)
+static struct b2r2_core_job *find_job_in_active_jobs(struct b2r2_core *core,
+		int job_id)
 {
 	int i;
 	struct b2r2_core_job *found_job = NULL;
 
-	if (b2r2_core.n_active_jobs) {
-		for (i = 0; i < ARRAY_SIZE(b2r2_core.active_jobs); i++) {
-			struct b2r2_core_job *job = b2r2_core.active_jobs[i];
+	if (core->n_active_jobs) {
+		for (i = 0; i < ARRAY_SIZE(core->active_jobs); i++) {
+			struct b2r2_core_job *job = core->active_jobs[i];
 
 			if (job && job->job_id == job_id) {
-				internal_job_addref(job, __func__);
+				internal_job_addref(core, job, __func__);
 				found_job = job;
 				break;
 			}
@@ -1344,19 +1445,20 @@ static struct b2r2_core_job *find_job_in_active_jobs(int job_id)
  *
  * Reference count will be incremented for found job.
  *
- * b2r2_core.lock must be held
+ * core->lock must be held
  */
-static struct b2r2_core_job *find_tag_in_list(int tag, struct list_head *list)
+static struct b2r2_core_job *find_tag_in_list(struct b2r2_core *core,
+		int tag, struct list_head *list)
 {
 	struct list_head *ptr;
 
 	list_for_each(ptr, list) {
 		struct b2r2_core_job *job =
-			list_entry(ptr, struct b2r2_core_job, list);
+				list_entry(ptr, struct b2r2_core_job, list);
 		if (job->tag == tag) {
 			/* Increase reference count, should be released by
 			   the caller of b2r2_core_job_find */
-			internal_job_addref(job, __func__);
+			internal_job_addref(core, job, __func__);
 			return job;
 		}
 	}
@@ -1370,19 +1472,20 @@ static struct b2r2_core_job *find_tag_in_list(int tag, struct list_head *list)
  *
  * Reference count will be incremented for found job.
  *
- * b2r2_core.lock must be held
+ * core->lock must be held
  */
-static struct b2r2_core_job *find_tag_in_active_jobs(int tag)
+static struct b2r2_core_job *find_tag_in_active_jobs(struct b2r2_core *core,
+		int tag)
 {
 	int i;
 	struct b2r2_core_job *found_job = NULL;
 
-	if (b2r2_core.n_active_jobs) {
-		for (i = 0; i < ARRAY_SIZE(b2r2_core.active_jobs); i++) {
-			struct b2r2_core_job *job = b2r2_core.active_jobs[i];
+	if (core->n_active_jobs) {
+		for (i = 0; i < ARRAY_SIZE(core->active_jobs); i++) {
+			struct b2r2_core_job *job = core->active_jobs[i];
 
 			if (job && job->tag == tag) {
-				internal_job_addref(job, __func__);
+				internal_job_addref(core, job, __func__);
 				found_job = job;
 				break;
 			}
@@ -1396,27 +1499,27 @@ static struct b2r2_core_job *find_tag_in_active_jobs(int tag)
 /**
  * hw_reset() - Resets B2R2 hardware
  *
- * b2r2_core.lock must be held
+ * core->lock must be held
  */
-static int hw_reset(void)
+static int hw_reset(struct b2r2_core *core)
 {
 	u32 uTimeOut = B2R2_DRIVER_TIMEOUT_VALUE;
 
 	/* Tell B2R2 to reset */
-	writel(readl(&b2r2_core.hw->BLT_CTL) | B2R2BLT_CTLGLOBAL_soft_reset,
-		&b2r2_core.hw->BLT_CTL);
-	writel(0x00000000, &b2r2_core.hw->BLT_CTL);
+	writel(readl(&core->hw->BLT_CTL) | B2R2BLT_CTLGLOBAL_soft_reset,
+		&core->hw->BLT_CTL);
+	writel(0x00000000, &core->hw->BLT_CTL);
 
-	b2r2_log_info("wait for B2R2 to be idle..\n");
+	b2r2_log_info(core->dev, "wait for B2R2 to be idle..\n");
 
 	/** Wait for B2R2 to be idle (on a timeout rather than while loop) */
 	while ((uTimeOut > 0) &&
-	       ((readl(&b2r2_core.hw->BLT_STA1) &
+	       ((readl(&core->hw->BLT_STA1) &
 		 B2R2BLT_STA1BDISP_IDLE) == 0x0))
 		uTimeOut--;
 
 	if (uTimeOut == 0) {
-		b2r2_log_warn(
+		b2r2_log_warn(core->dev,
 			 "error-> after software reset B2R2 is not idle\n");
 		return -EAGAIN;
 	}
@@ -1431,114 +1534,106 @@ static int hw_reset(void)
  *
  * @job: Job to trigger
  *
- * b2r2_core.lock must be held
+ * core->lock must be held
  */
-static void trigger_job(struct b2r2_core_job *job)
+static void trigger_job(struct b2r2_core *core, struct b2r2_core_job *job)
 {
 	/* Debug prints */
-	b2r2_log_info("queue 0x%x \n", job->queue);
-	b2r2_log_info("BLT TRIG_IP 0x%x (first node)\n",
+	b2r2_log_info(core->dev, "queue 0x%x\n", job->queue);
+	b2r2_log_info(core->dev, "BLT TRIG_IP 0x%x (first node)\n",
 		job->first_node_address);
-	b2r2_log_info("BLT LNA_CTL 0x%x (last node)\n",
+	b2r2_log_info(core->dev, "BLT LNA_CTL 0x%x (last node)\n",
 		job->last_node_address);
-	b2r2_log_info("BLT TRIG_CTL 0x%x \n", job->control);
-	b2r2_log_info("BLT PACE_CTL 0x%x \n", job->pace_control);
+	b2r2_log_info(core->dev, "BLT TRIG_CTL 0x%x\n", job->control);
+	b2r2_log_info(core->dev, "BLT PACE_CTL 0x%x\n", job->pace_control);
 
 	reset_hw_timer(job);
 	job->job_state = B2R2_CORE_JOB_RUNNING;
 
 	/* Enable interrupt */
-	writel(readl(&b2r2_core.hw->BLT_ITM0) | job->interrupt_context,
-		&b2r2_core.hw->BLT_ITM0);
-
-	writel(min_t(u8, max_t(u8, b2r2_core.op_size, B2R2_PLUG_OPCODE_SIZE_8),
-				B2R2_PLUG_OPCODE_SIZE_64),
-			&b2r2_core.hw->PLUGS1_OP2);
-	writel(min_t(u8, b2r2_core.ch_size, B2R2_PLUG_CHUNK_SIZE_128),
-			&b2r2_core.hw->PLUGS1_CHZ);
-	writel(min_t(u8, b2r2_core.mg_size, B2R2_PLUG_MESSAGE_SIZE_128) |
-				(b2r2_core.min_req_time << 16),
-			&b2r2_core.hw->PLUGS1_MSZ);
-	writel(min_t(u8, b2r2_core.pg_size, B2R2_PLUG_PAGE_SIZE_256),
-			&b2r2_core.hw->PLUGS1_PGZ);
-
-	writel(min_t(u8, max_t(u8, b2r2_core.op_size, B2R2_PLUG_OPCODE_SIZE_8),
-				B2R2_PLUG_OPCODE_SIZE_64),
-			&b2r2_core.hw->PLUGS2_OP2);
-	writel(min_t(u8, b2r2_core.ch_size, B2R2_PLUG_CHUNK_SIZE_128),
-			&b2r2_core.hw->PLUGS2_CHZ);
-	writel(min_t(u8, b2r2_core.mg_size, B2R2_PLUG_MESSAGE_SIZE_128) |
-				(b2r2_core.min_req_time << 16),
-			&b2r2_core.hw->PLUGS2_MSZ);
-	writel(min_t(u8, b2r2_core.pg_size, B2R2_PLUG_PAGE_SIZE_256),
-			&b2r2_core.hw->PLUGS2_PGZ);
-
-	writel(min_t(u8, max_t(u8, b2r2_core.op_size, B2R2_PLUG_OPCODE_SIZE_8),
-				B2R2_PLUG_OPCODE_SIZE_64),
-			&b2r2_core.hw->PLUGS3_OP2);
-	writel(min_t(u8, b2r2_core.ch_size, B2R2_PLUG_CHUNK_SIZE_128),
-			&b2r2_core.hw->PLUGS3_CHZ);
-	writel(min_t(u8, b2r2_core.mg_size, B2R2_PLUG_MESSAGE_SIZE_128) |
-				(b2r2_core.min_req_time << 16),
-			&b2r2_core.hw->PLUGS3_MSZ);
-	writel(min_t(u8, b2r2_core.pg_size, B2R2_PLUG_PAGE_SIZE_256),
-			&b2r2_core.hw->PLUGS3_PGZ);
-
-	writel(min_t(u8, max_t(u8, b2r2_core.op_size, B2R2_PLUG_OPCODE_SIZE_8),
-				B2R2_PLUG_OPCODE_SIZE_64),
-			&b2r2_core.hw->PLUGT_OP2);
-	writel(min_t(u8, b2r2_core.ch_size, B2R2_PLUG_CHUNK_SIZE_128),
-			&b2r2_core.hw->PLUGT_CHZ);
-	writel(min_t(u8, b2r2_core.mg_size, B2R2_PLUG_MESSAGE_SIZE_128) |
-				(b2r2_core.min_req_time << 16),
-			&b2r2_core.hw->PLUGT_MSZ);
-	writel(min_t(u8, b2r2_core.pg_size, B2R2_PLUG_PAGE_SIZE_256),
-			&b2r2_core.hw->PLUGT_PGZ);
+	writel(readl(&core->hw->BLT_ITM0) | job->interrupt_context,
+			&core->hw->BLT_ITM0);
+
+	writel(min_t(u8, max_t(u8, core->op_size, B2R2_PLUG_OPCODE_SIZE_8),
+			B2R2_PLUG_OPCODE_SIZE_64), &core->hw->PLUGS1_OP2);
+	writel(min_t(u8, core->ch_size, B2R2_PLUG_CHUNK_SIZE_128),
+			&core->hw->PLUGS1_CHZ);
+	writel(min_t(u8, core->mg_size, B2R2_PLUG_MESSAGE_SIZE_128) |
+			(core->min_req_time << 16), &core->hw->PLUGS1_MSZ);
+	writel(min_t(u8, core->pg_size, B2R2_PLUG_PAGE_SIZE_256),
+			&core->hw->PLUGS1_PGZ);
+
+	writel(min_t(u8, max_t(u8, core->op_size, B2R2_PLUG_OPCODE_SIZE_8),
+			B2R2_PLUG_OPCODE_SIZE_64), &core->hw->PLUGS2_OP2);
+	writel(min_t(u8, core->ch_size, B2R2_PLUG_CHUNK_SIZE_128),
+			&core->hw->PLUGS2_CHZ);
+	writel(min_t(u8, core->mg_size, B2R2_PLUG_MESSAGE_SIZE_128) |
+			(core->min_req_time << 16), &core->hw->PLUGS2_MSZ);
+	writel(min_t(u8, core->pg_size, B2R2_PLUG_PAGE_SIZE_256),
+			&core->hw->PLUGS2_PGZ);
+
+	writel(min_t(u8, max_t(u8, core->op_size, B2R2_PLUG_OPCODE_SIZE_8),
+			B2R2_PLUG_OPCODE_SIZE_64), &core->hw->PLUGS3_OP2);
+	writel(min_t(u8, core->ch_size, B2R2_PLUG_CHUNK_SIZE_128),
+			&core->hw->PLUGS3_CHZ);
+	writel(min_t(u8, core->mg_size, B2R2_PLUG_MESSAGE_SIZE_128) |
+			(core->min_req_time << 16), &core->hw->PLUGS3_MSZ);
+	writel(min_t(u8, core->pg_size, B2R2_PLUG_PAGE_SIZE_256),
+			&core->hw->PLUGS3_PGZ);
+
+	writel(min_t(u8, max_t(u8, core->op_size, B2R2_PLUG_OPCODE_SIZE_8),
+			B2R2_PLUG_OPCODE_SIZE_64), &core->hw->PLUGT_OP2);
+	writel(min_t(u8, core->ch_size, B2R2_PLUG_CHUNK_SIZE_128),
+			&core->hw->PLUGT_CHZ);
+	writel(min_t(u8, core->mg_size, B2R2_PLUG_MESSAGE_SIZE_128) |
+			(core->min_req_time << 16), &core->hw->PLUGT_MSZ);
+	writel(min_t(u8, core->pg_size, B2R2_PLUG_PAGE_SIZE_256),
+			&core->hw->PLUGT_PGZ);
 
 	/* B2R2 kicks off when LNA is written, LNA write must be last! */
 	switch (job->queue) {
 	case B2R2_CORE_QUEUE_CQ1:
-		writel(job->first_node_address, &b2r2_core.hw->BLT_CQ1_TRIG_IP);
-		writel(job->control, &b2r2_core.hw->BLT_CQ1_TRIG_CTL);
-		writel(job->pace_control, &b2r2_core.hw->BLT_CQ1_PACE_CTL);
+		writel(job->first_node_address, &core->hw->BLT_CQ1_TRIG_IP);
+		writel(job->control, &core->hw->BLT_CQ1_TRIG_CTL);
+		writel(job->pace_control, &core->hw->BLT_CQ1_PACE_CTL);
 		break;
 
 	case B2R2_CORE_QUEUE_CQ2:
-		writel(job->first_node_address, &b2r2_core.hw->BLT_CQ2_TRIG_IP);
-		writel(job->control, &b2r2_core.hw->BLT_CQ2_TRIG_CTL);
-		writel(job->pace_control, &b2r2_core.hw->BLT_CQ2_PACE_CTL);
+		writel(job->first_node_address, &core->hw->BLT_CQ2_TRIG_IP);
+		writel(job->control, &core->hw->BLT_CQ2_TRIG_CTL);
+		writel(job->pace_control, &core->hw->BLT_CQ2_PACE_CTL);
 		break;
 
 	case B2R2_CORE_QUEUE_AQ1:
-		writel(job->control, &b2r2_core.hw->BLT_AQ1_CTL);
-		writel(job->first_node_address, &b2r2_core.hw->BLT_AQ1_IP);
+		writel(job->control, &core->hw->BLT_AQ1_CTL);
+		writel(job->first_node_address, &core->hw->BLT_AQ1_IP);
 		wmb();
 		start_hw_timer(job);
-		writel(job->last_node_address, &b2r2_core.hw->BLT_AQ1_LNA);
+		writel(job->last_node_address, &core->hw->BLT_AQ1_LNA);
 		break;
 
 	case B2R2_CORE_QUEUE_AQ2:
-		writel(job->control, &b2r2_core.hw->BLT_AQ2_CTL);
-		writel(job->first_node_address, &b2r2_core.hw->BLT_AQ2_IP);
+		writel(job->control, &core->hw->BLT_AQ2_CTL);
+		writel(job->first_node_address, &core->hw->BLT_AQ2_IP);
 		wmb();
 		start_hw_timer(job);
-		writel(job->last_node_address, &b2r2_core.hw->BLT_AQ2_LNA);
+		writel(job->last_node_address, &core->hw->BLT_AQ2_LNA);
 		break;
 
 	case B2R2_CORE_QUEUE_AQ3:
-		writel(job->control, &b2r2_core.hw->BLT_AQ3_CTL);
-		writel(job->first_node_address, &b2r2_core.hw->BLT_AQ3_IP);
+		writel(job->control, &core->hw->BLT_AQ3_CTL);
+		writel(job->first_node_address, &core->hw->BLT_AQ3_IP);
 		wmb();
 		start_hw_timer(job);
-		writel(job->last_node_address, &b2r2_core.hw->BLT_AQ3_LNA);
+		writel(job->last_node_address, &core->hw->BLT_AQ3_LNA);
 		break;
 
 	case B2R2_CORE_QUEUE_AQ4:
-		writel(job->control, &b2r2_core.hw->BLT_AQ4_CTL);
-		writel(job->first_node_address, &b2r2_core.hw->BLT_AQ4_IP);
+		writel(job->control, &core->hw->BLT_AQ4_CTL);
+		writel(job->first_node_address, &core->hw->BLT_AQ4_IP);
 		wmb();
 		start_hw_timer(job);
-		writel(job->last_node_address, &b2r2_core.hw->BLT_AQ4_LNA);
+		writel(job->last_node_address, &core->hw->BLT_AQ4_LNA);
 		break;
 
 		/** Handle the default case */
@@ -1554,31 +1649,32 @@ static void trigger_job(struct b2r2_core_job *job)
  *
  * @queue: Queue to handle event for
  *
- * b2r2_core.lock must be held
+ * core->lock must be held
  */
-static void handle_queue_event(enum b2r2_core_queue queue)
+static void handle_queue_event(struct b2r2_core *core,
+		enum b2r2_core_queue queue)
 {
 	struct b2r2_core_job *job;
 
-	job = b2r2_core.active_jobs[queue];
+	job = core->active_jobs[queue];
 	if (job) {
 		if (job->job_state != B2R2_CORE_JOB_RUNNING)
 			/* Should be running
 			   Severe error. TBD */
-			b2r2_log_warn(
+			b2r2_log_warn(core->dev,
 				 "%s: Job is not running", __func__);
 
-		stop_hw_timer(job);
+		stop_hw_timer(core, job);
 
 		/* Remove from queue */
-		BUG_ON(b2r2_core.n_active_jobs == 0);
-		b2r2_core.active_jobs[queue] = NULL;
-		b2r2_core.n_active_jobs--;
+		BUG_ON(core->n_active_jobs == 0);
+		core->active_jobs[queue] = NULL;
+		core->n_active_jobs--;
 	}
 
 	if (!job) {
 		/* No job, error?  */
-		b2r2_log_warn("%s: No job", __func__);
+		b2r2_log_warn(core->dev, "%s: No job", __func__);
 		return;
 	}
 
@@ -1595,7 +1691,7 @@ static void handle_queue_event(enum b2r2_core_queue queue)
 	wake_up_interruptible(&job->event);
 
 	/* Dispatch to work queue to handle callbacks */
-	queue_work(b2r2_core.work_queue, &job->work);
+	queue_work(core->work_queue, &job->work);
 }
 
 /**
@@ -1603,62 +1699,62 @@ static void handle_queue_event(enum b2r2_core_queue queue)
  *
  * @status: Contents of the B2R2 ITS register
  */
-static void process_events(u32 status)
+static void process_events(struct b2r2_core *core, u32 status)
 {
 	u32 mask = 0xF;
 	u32 disable_itm_mask = 0;
 
-	b2r2_log_info("Enters process_events \n");
-	b2r2_log_info("status 0x%x \n", status);
+	b2r2_log_info(core->dev, "Enters process_events\n");
+	b2r2_log_info(core->dev, "status 0x%x\n", status);
 
 	/* Composition queue 1 */
 	if (status & mask) {
-		handle_queue_event(B2R2_CORE_QUEUE_CQ1);
+		handle_queue_event(core, B2R2_CORE_QUEUE_CQ1);
 		disable_itm_mask |= mask;
 	}
 	mask <<= 4;
 
 	/* Composition queue 2 */
 	if (status & mask) {
-		handle_queue_event(B2R2_CORE_QUEUE_CQ2);
+		handle_queue_event(core, B2R2_CORE_QUEUE_CQ2);
 		disable_itm_mask |= mask;
 	}
 	mask <<= 8;
 
 	/* Application queue 1 */
 	if (status & mask) {
-		handle_queue_event(B2R2_CORE_QUEUE_AQ1);
+		handle_queue_event(core, B2R2_CORE_QUEUE_AQ1);
 		disable_itm_mask |= mask;
 	}
 	mask <<= 4;
 
 	/* Application queue 2 */
 	if (status & mask) {
-		handle_queue_event(B2R2_CORE_QUEUE_AQ2);
+		handle_queue_event(core, B2R2_CORE_QUEUE_AQ2);
 		disable_itm_mask |= mask;
 	}
 	mask <<= 4;
 
 	/* Application queue 3 */
 	if (status & mask) {
-		handle_queue_event(B2R2_CORE_QUEUE_AQ3);
+		handle_queue_event(core, B2R2_CORE_QUEUE_AQ3);
 		disable_itm_mask |= mask;
 	}
 	mask <<= 4;
 
 	/* Application queue 4 */
 	if (status & mask) {
-		handle_queue_event(B2R2_CORE_QUEUE_AQ4);
+		handle_queue_event(core, B2R2_CORE_QUEUE_AQ4);
 		disable_itm_mask |= mask;
 	}
 
 	/* Clear received interrupt flags */
-	writel(status, &b2r2_core.hw->BLT_ITS);
+	writel(status, &core->hw->BLT_ITS);
 	/* Disable handled interrupts */
-	writel(readl(&b2r2_core.hw->BLT_ITM0) & ~disable_itm_mask,
-		 &b2r2_core.hw->BLT_ITM0);
+	writel(readl(&core->hw->BLT_ITM0) & ~disable_itm_mask,
+		 &core->hw->BLT_ITM0);
 
-	b2r2_log_info("Returns process_events \n");
+	b2r2_log_info(core->dev, "Returns process_events\n");
 }
 
 /**
@@ -1670,23 +1766,24 @@ static void process_events(u32 status)
 static irqreturn_t b2r2_irq_handler(int irq, void *x)
 {
 	unsigned long flags;
+	struct b2r2_core* core = (struct b2r2_core *) x;
 
 	/* Spin lock is need in irq handler (SMP) */
-	spin_lock_irqsave(&b2r2_core.lock, flags);
+	spin_lock_irqsave(&core->lock, flags);
 
 	/* Make sure that we have a clock */
 
 	/* Remember time for last irq (for timeout mgmt) */
-	b2r2_core.jiffies_last_irq = jiffies;
-	b2r2_core.stat_n_irq++;
+	core->jiffies_last_irq = jiffies;
+	core->stat_n_irq++;
 
 	/* Handle the interrupt(s) */
-	process_events(readl(&b2r2_core.hw->BLT_ITS));
+	process_events(core, readl(&core->hw->BLT_ITS));
 
 	/* Check if we can dispatch new jobs */
-	check_prio_list(true);
+	check_prio_list(core, true);
 
-	spin_unlock_irqrestore(&b2r2_core.lock, flags);
+	spin_unlock_irqrestore(&core->lock, flags);
 
 	return IRQ_HANDLED;
 }
@@ -1902,18 +1999,18 @@ static const struct debugfs_reg debugfs_regs[] = {
 /**
  * printk_regs() - Print B2R2 registers to printk
  */
-static void printk_regs(void)
+static void printk_regs(struct b2r2_core *core)
 {
 #ifdef CONFIG_B2R2_DEBUG
 	int i;
 
 	for (i = 0; i < ARRAY_SIZE(debugfs_regs); i++) {
 		unsigned long value = readl(
-			(unsigned long *) (((u8 *) b2r2_core.hw) +
-					   debugfs_regs[i].offset));
-		b2r2_log_regdump("%s: %08lX\n",
-			 debugfs_regs[i].name,
-			 value);
+			(unsigned long *) (((u8 *) core->hw) +
+				debugfs_regs[i].offset));
+		b2r2_log_regdump(core->dev, "%s: %08lX\n",
+			debugfs_regs[i].name,
+			value);
 	}
 #endif
 }
@@ -1934,7 +2031,6 @@ static int debugfs_b2r2_reg_read(struct file *filp, char __user *buf,
 {
 	size_t dev_size;
 	int ret = 0;
-
 	unsigned long value;
 	char *Buf = kmalloc(sizeof(char) * 4096, GFP_KERNEL);
 
@@ -1944,9 +2040,8 @@ static int debugfs_b2r2_reg_read(struct file *filp, char __user *buf,
 	}
 
 	/* Read from B2R2 */
-	value = readl((unsigned long *) (((u8 *) b2r2_core.hw) +
-					 (u32) filp->f_dentry->
-					 d_inode->i_private));
+	value = readl((unsigned long *)
+		filp->f_dentry->d_inode->i_private);
 
 	/* Build the string */
 	dev_size = sprintf(Buf, "%8lX\n", value);
@@ -1998,8 +2093,8 @@ static int debugfs_b2r2_reg_write(struct file *filp, const char __user *buf,
 	if (sscanf(Buf, "%8lX", (unsigned long *) &reg_value) != 1)
 		return -EINVAL;
 
-	writel(reg_value, (u32 *) (((u8 *) b2r2_core.hw) +
-			(u32) filp->f_dentry->d_inode->i_private));
+	writel(reg_value, (u32 *)
+		filp->f_dentry->d_inode->i_private);
 
 	*f_pos += count;
 	ret = count;
@@ -2042,11 +2137,12 @@ static int debugfs_b2r2_regs_read(struct file *filp, char __user *buf,
 	/* Build a giant string containing all registers */
 	for (i = 0; i < ARRAY_SIZE(debugfs_regs); i++) {
 		unsigned long value =
-			readl((unsigned long *) (((u8 *) b2r2_core.hw) +
-						 debugfs_regs[i].offset));
+			readl((u32 *) (((u8 *)
+				filp->f_dentry->d_inode->i_private) +
+				debugfs_regs[i].offset));
 		dev_size += sprintf(Buf + dev_size, "%s: %08lX\n",
-				    debugfs_regs[i].name,
-				    value);
+			debugfs_regs[i].name,
+			value);
 	}
 
 	/* No more to read if offset != 0 */
@@ -2092,6 +2188,7 @@ static int debugfs_b2r2_stat_read(struct file *filp, char __user *buf,
 	int ret = 0;
 	int i = 0;
 	char *Buf = kmalloc(sizeof(char) * 4096, GFP_KERNEL);
+	struct b2r2_core *core = filp->f_dentry->d_inode->i_private;
 
 	if (Buf == NULL) {
 		ret = -ENOMEM;
@@ -2099,21 +2196,22 @@ static int debugfs_b2r2_stat_read(struct file *filp, char __user *buf,
 	}
 
 	/* Build a string containing all statistics */
-	dev_size += sprintf(Buf + dev_size, "Interrupts: %lu\n",
-			    b2r2_core.stat_n_irq);
-	dev_size += sprintf(Buf + dev_size, "Added jobs: %lu\n",
-			    b2r2_core.stat_n_jobs_added);
-	dev_size += sprintf(Buf + dev_size, "Removed jobs: %lu\n",
-			    b2r2_core.stat_n_jobs_removed);
-	dev_size += sprintf(Buf + dev_size, "Jobs in prio list: %lu\n",
-			    b2r2_core.stat_n_jobs_in_prio_list);
-	dev_size += sprintf(Buf + dev_size, "Active jobs: %lu\n",
-			    b2r2_core.n_active_jobs);
-	for (i = 0; i < ARRAY_SIZE(b2r2_core.active_jobs); i++)
-		dev_size += sprintf(Buf + dev_size, "Job in queue %d: %p\n",
-				    i, b2r2_core.active_jobs[i]);
-	dev_size += sprintf(Buf + dev_size, "Clock requests: %lu\n",
-			    b2r2_core.clock_request_count);
+	dev_size += sprintf(Buf + dev_size, "Interrupts        : %lu\n",
+			core->stat_n_irq);
+	dev_size += sprintf(Buf + dev_size, "Added jobs        : %lu\n",
+			core->stat_n_jobs_added);
+	dev_size += sprintf(Buf + dev_size, "Removed jobs      : %lu\n",
+			core->stat_n_jobs_removed);
+	dev_size += sprintf(Buf + dev_size, "Jobs in prio list : %lu\n",
+			core->stat_n_jobs_in_prio_list);
+	dev_size += sprintf(Buf + dev_size, "Active jobs       : %lu\n",
+			core->n_active_jobs);
+	for (i = 0; i < ARRAY_SIZE(core->active_jobs); i++)
+		dev_size += sprintf(Buf + dev_size,
+				"   Job in queue %d : 0x%08lx\n",
+				i, (unsigned long) core->active_jobs[i]);
+	dev_size += sprintf(Buf + dev_size, "Clock requests    : %lu\n",
+			core->clock_request_count);
 
 	/* No more to read if offset != 0 */
 	if (*f_pos > dev_size)
@@ -2159,10 +2257,11 @@ static int debugfs_b2r2_clock_read(struct file *filp, char __user *buf,
 	char Buf[10+2];
 	size_t dev_size;
 	int ret = 0;
+	struct b2r2_core *core = filp->f_dentry->d_inode->i_private;
 
-	unsigned long value = clk_get_rate(b2r2_core.b2r2_clock);
+	unsigned long value = clk_get_rate(core->b2r2_clock);
 
-	dev_size = sprintf(Buf, "%#010lX\n", value);
+	dev_size = sprintf(Buf, "%#010lx\n", value);
 
 	/* No more to read if offset != 0 */
 	if (*f_pos > dev_size)
@@ -2246,40 +2345,40 @@ static const struct file_operations debugfs_b2r2_clock_fops = {
  * 6)Recover from any error without any leaks.
  *
  */
-static int init_hw(void)
+static int init_hw(struct b2r2_core *core)
 {
 	int result = 0;
 	u32 uTimeOut = B2R2_DRIVER_TIMEOUT_VALUE;
 
 	/* Put B2R2 into reset */
-	clear_interrupts();
-
-	writel(readl(&b2r2_core.hw->BLT_CTL) | B2R2BLT_CTLGLOBAL_soft_reset,
-		&b2r2_core.hw->BLT_CTL);
+	clear_interrupts(core);
 
+	writel(readl(&core->hw->BLT_CTL) | B2R2BLT_CTLGLOBAL_soft_reset,
+		&core->hw->BLT_CTL);
 
 	/* Set up interrupt handler */
-	result = request_irq(b2r2_core.irq, b2r2_irq_handler, 0,
-			     "b2r2-interrupt", 0);
+	result = request_irq(core->irq, b2r2_irq_handler, 0,
+			     "b2r2-interrupt", core);
 	if (result) {
-		b2r2_log_err("%s: failed to register IRQ for B2R2\n", __func__);
+		b2r2_log_err(core->dev,
+			"%s: failed to register IRQ for B2R2\n", __func__);
 		goto b2r2_init_request_irq_failed;
 	}
 
-	b2r2_log_info("do a global reset..\n");
+	b2r2_log_info(core->dev, "do a global reset..\n");
 
 	/* Release reset */
-	writel(0x00000000, &b2r2_core.hw->BLT_CTL);
+	writel(0x00000000, &core->hw->BLT_CTL);
 
-	b2r2_log_info("wait for B2R2 to be idle..\n");
+	b2r2_log_info(core->dev, "wait for B2R2 to be idle..\n");
 
 	/** Wait for B2R2 to be idle (on a timeout rather than while loop) */
 	while ((uTimeOut > 0) &&
-	       ((readl(&b2r2_core.hw->BLT_STA1) &
+	       ((readl(&core->hw->BLT_STA1) &
 		 B2R2BLT_STA1BDISP_IDLE) == 0x0))
 		uTimeOut--;
 	if (uTimeOut == 0) {
-		b2r2_log_err(
+		b2r2_log_err(core->dev,
 			 "%s: B2R2 not idle after SW reset\n", __func__);
 		result = -EAGAIN;
 		goto b2r2_core_init_hw_timeout;
@@ -2287,85 +2386,81 @@ static int init_hw(void)
 
 #ifdef CONFIG_DEBUG_FS
 	/* Register debug fs files for register access */
-	if (b2r2_core.debugfs_root_dir && !b2r2_core.debugfs_regs_dir) {
+	if (core->debugfs_core_root_dir && !core->debugfs_regs_dir) {
 		int i;
-		b2r2_core.debugfs_regs_dir = debugfs_create_dir("regs",
-				b2r2_core.debugfs_root_dir);
-		debugfs_create_file("all", 0666, b2r2_core.debugfs_regs_dir,
-				0, &debugfs_b2r2_regs_fops);
+		core->debugfs_regs_dir = debugfs_create_dir("regs",
+				core->debugfs_core_root_dir);
+		debugfs_create_file("all", 0666, core->debugfs_regs_dir,
+				(void *)core->hw, &debugfs_b2r2_regs_fops);
 		/* Create debugfs entries for all static registers */
 		for (i = 0; i < ARRAY_SIZE(debugfs_regs); i++)
 			debugfs_create_file(debugfs_regs[i].name, 0666,
-					b2r2_core.debugfs_regs_dir,
-					(void *) debugfs_regs[i].offset,
+					core->debugfs_regs_dir,
+					(void *)(((u8 *) core->hw) +
+							debugfs_regs[i].offset),
 					&debugfs_b2r2_reg_fops);
 	}
 #endif
 
-	b2r2_log_info("%s ended..\n", __func__);
+	b2r2_log_info(core->dev, "%s ended..\n", __func__);
 	return result;
 
 /** Recover from any error without any leaks */
-
 b2r2_core_init_hw_timeout:
-
 	/** Free B2R2 interrupt handler */
-
-	free_irq(b2r2_core.irq, 0);
+	free_irq(core->irq, core);
 
 b2r2_init_request_irq_failed:
-
-	if (b2r2_core.hw)
-		iounmap(b2r2_core.hw);
-	b2r2_core.hw = NULL;
+	if (core->hw)
+		iounmap(core->hw);
+	core->hw = NULL;
 
 	return result;
-
 }
 
 
 /**
  * exit_hw() - B2R2 Hardware exit
  *
- * b2r2_core.lock _must_ NOT be held
+ * core->lock _must_ NOT be held
  */
-static void exit_hw(void)
+static void exit_hw(struct b2r2_core *core)
 {
 	unsigned long flags;
 
-	b2r2_log_info("%s started..\n", __func__);
+	b2r2_log_info(core->dev, "%s started..\n", __func__);
 
 #ifdef CONFIG_DEBUG_FS
 	/* Unregister our debugfs entries */
-	if (b2r2_core.debugfs_regs_dir) {
-		debugfs_remove_recursive(b2r2_core.debugfs_regs_dir);
-		b2r2_core.debugfs_regs_dir = NULL;
+	if (core->debugfs_regs_dir) {
+		debugfs_remove_recursive(core->debugfs_regs_dir);
+		core->debugfs_regs_dir = NULL;
 	}
 #endif
-	b2r2_log_debug("%s: locking b2r2_core.lock\n", __func__);
-	spin_lock_irqsave(&b2r2_core.lock, flags);
+	b2r2_log_debug(core->dev, "%s: locking core->lock\n", __func__);
+	spin_lock_irqsave(&core->lock, flags);
 
 	/* Cancel all pending jobs */
-	b2r2_log_debug("%s: canceling pending jobs\n", __func__);
-	exit_job_list(&b2r2_core.prio_queue);
+	b2r2_log_debug(core->dev, "%s: canceling pending jobs\n", __func__);
+	exit_job_list(core, &core->prio_queue);
 
 	/* Soft reset B2R2 (Close all DMA,
 	   reset all state to idle, reset regs)*/
-	b2r2_log_debug("%s: putting b2r2 in reset\n", __func__);
-	writel(readl(&b2r2_core.hw->BLT_CTL) | B2R2BLT_CTLGLOBAL_soft_reset,
-		&b2r2_core.hw->BLT_CTL);
+	b2r2_log_debug(core->dev, "%s: putting b2r2 in reset\n", __func__);
+	writel(readl(&core->hw->BLT_CTL) | B2R2BLT_CTLGLOBAL_soft_reset,
+		&core->hw->BLT_CTL);
 
-	b2r2_log_debug("%s: clearing interrupts\n", __func__);
-	clear_interrupts();
+	b2r2_log_debug(core->dev, "%s: clearing interrupts\n", __func__);
+	clear_interrupts(core);
 
 	/** Free B2R2 interrupt handler */
-	b2r2_log_debug("%s: freeing interrupt handler\n", __func__);
-	free_irq(b2r2_core.irq, 0);
+	b2r2_log_debug(core->dev, "%s: freeing interrupt handler\n", __func__);
+	free_irq(core->irq, core);
 
-	b2r2_log_debug("%s: unlocking b2r2_core.lock\n", __func__);
-	spin_unlock_irqrestore(&b2r2_core.lock, flags);
+	b2r2_log_debug(core->dev, "%s: unlocking core->lock\n", __func__);
+	spin_unlock_irqrestore(&core->lock, flags);
 
-	b2r2_log_info("%s ended...\n", __func__);
+	b2r2_log_info(core->dev, "%s ended...\n", __func__);
 }
 
 /**
@@ -2377,58 +2472,68 @@ static int b2r2_probe(struct platform_device *pdev)
 {
 	int ret = 0;
 	struct resource *res;
+	struct b2r2_core *core;
+	struct b2r2_control *control;
 
 	BUG_ON(pdev == NULL);
+	BUG_ON(pdev->id < 0 || pdev->id >= B2R2_MAX_NBR_DEVICES);
 
-	ret = b2r2_debug_init(&pdev->dev);
-	if (ret < 0) {
-		dev_err(b2r2_core.log_dev, "b2r2_debug_init failed\n");
-		goto b2r2_probe_debug_init_failed;
+	core = kzalloc(sizeof(*core), GFP_KERNEL);
+	if (!core) {
+		dev_err(&pdev->dev, "b2r2 core alloc failed\n");
+		ret = -EINVAL;
+		goto b2r2_probe_core_alloc_fail;
 	}
 
-	b2r2_core.log_dev = &pdev->dev;
-	b2r2_log_info("init started.\n");
+	core->dev = &pdev->dev;
+	dev_set_drvdata(core->dev, core);
+	if (pdev->id)
+		snprintf(core->name, sizeof(core->name), "b2r2_%d", pdev->id);
+	else
+		snprintf(core->name, sizeof(core->name), "b2r2");
+
+	dev_info(&pdev->dev, "init started.\n");
 
 	/* Init spin locks */
-	spin_lock_init(&b2r2_core.lock);
+	spin_lock_init(&core->lock);
 
 	/* Init job queues */
-	INIT_LIST_HEAD(&b2r2_core.prio_queue);
+	INIT_LIST_HEAD(&core->prio_queue);
 
 #ifdef HANDLE_TIMEOUTED_JOBS
 	/* Create work queue for callbacks & timeout */
-	INIT_DELAYED_WORK(&b2r2_core.timeout_work, timeout_work_function);
+	INIT_DELAYED_WORK(&core->timeout_work, timeout_work_function);
 #endif
 
 	/* Work queue for callbacks and timeout management */
-	b2r2_core.work_queue = create_workqueue("B2R2");
-	if (!b2r2_core.work_queue) {
+	core->work_queue = create_workqueue("B2R2");
+	if (!core->work_queue) {
 		ret = -ENOMEM;
 		goto b2r2_probe_no_work_queue;
 	}
 
 	/* Get the clock for B2R2 */
-	b2r2_core.b2r2_clock = clk_get(&pdev->dev, "b2r2");
-	if (IS_ERR(b2r2_core.b2r2_clock)) {
-		ret = PTR_ERR(b2r2_core.b2r2_clock);
-		b2r2_log_err("clk_get b2r2 failed\n");
+	core->b2r2_clock = clk_get(core->dev, "b2r2");
+	if (IS_ERR(core->b2r2_clock)) {
+		ret = PTR_ERR(core->b2r2_clock);
+		dev_err(&pdev->dev, "clk_get b2r2 failed\n");
 		goto b2r2_probe_no_clk;
 	}
 
 	/* Get the B2R2 regulator */
-	b2r2_core.b2r2_reg = regulator_get(&pdev->dev, "vsupply");
-	if (IS_ERR(b2r2_core.b2r2_reg)) {
-		ret = PTR_ERR(b2r2_core.b2r2_reg);
-		b2r2_log_err("regulator_get vsupply failed (dev_name=%s)\n",
-				dev_name(&pdev->dev));
+	core->b2r2_reg = regulator_get(core->dev, "vsupply");
+	if (IS_ERR(core->b2r2_reg)) {
+		ret = PTR_ERR(core->b2r2_reg);
+		dev_err(&pdev->dev, "regulator_get vsupply failed "
+			"(dev_name=%s)\n", dev_name(core->dev));
 		goto b2r2_probe_no_reg;
 	}
 
 	/* Init power management */
-	mutex_init(&b2r2_core.domain_lock);
-	INIT_DELAYED_WORK_DEFERRABLE(&b2r2_core.domain_disable_work,
+	mutex_init(&core->domain_lock);
+	INIT_DELAYED_WORK_DEFERRABLE(&core->domain_disable_work,
 			domain_disable_work_function);
-	b2r2_core.domain_enabled = false;
+	core->domain_enabled = false;
 
 	/* Map B2R2 into kernel virtual memory space */
 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
@@ -2436,81 +2541,113 @@ static int b2r2_probe(struct platform_device *pdev)
 		goto b2r2_probe_no_res;
 
 	/* Hook up irq */
-	b2r2_core.irq = platform_get_irq(pdev, 0);
-	if (b2r2_core.irq <= 0) {
-		b2r2_log_info("%s: Failed to request irq (irq=%d)\n", __func__,
-								b2r2_core.irq);
+	core->irq = platform_get_irq(pdev, 0);
+	if (core->irq <= 0) {
+		dev_err(&pdev->dev, "%s: Failed to request irq (irq=%d)\n",
+			__func__, core->irq);
 		goto b2r2_failed_irq_get;
 	}
 
-	b2r2_core.hw = (struct b2r2_memory_map *) ioremap(res->start,
+	core->hw = (struct b2r2_memory_map *) ioremap(res->start,
 			 res->end - res->start + 1);
-	if (b2r2_core.hw == NULL) {
-
-		b2r2_log_info("%s: ioremap failed\n", __func__);
+	if (core->hw == NULL) {
+		dev_err(&pdev->dev, "%s: ioremap failed\n", __func__);
 		ret = -ENOMEM;
 		goto b2r2_probe_ioremap_failed;
 	}
 
-	dev_dbg(b2r2_core.log_dev,
-		"b2r2 structure address %p\n",
-		b2r2_core.hw);
+	dev_dbg(core->dev, "b2r2 structure address %p\n", core->hw);
 
-	/* Initialize b2r2_blt module. FIXME: Module of it's own
-	   or perhaps a dedicated module init c file? */
-	ret = b2r2_blt_module_init();
-	if (ret < 0) {
-		b2r2_log_err("b2r2_blt_module_init failed\n");
-		goto b2r2_probe_blt_init_fail;
+	control = kzalloc(sizeof(*control), GFP_KERNEL);
+	if (!control) {
+		dev_err(&pdev->dev, "b2r2 control alloc failed\n");
+		ret = -EINVAL;
+		goto b2r2_probe_control_alloc_fail;
 	}
 
-	b2r2_core.op_size = B2R2_PLUG_OPCODE_SIZE_DEFAULT;
-	b2r2_core.ch_size = B2R2_PLUG_CHUNK_SIZE_DEFAULT;
-	b2r2_core.pg_size = B2R2_PLUG_PAGE_SIZE_DEFAULT;
-	b2r2_core.mg_size = B2R2_PLUG_MESSAGE_SIZE_DEFAULT;
-	b2r2_core.min_req_time = 0;
+	control->miscdev.parent = core->dev;
+	control->data = (void *)core;
+	control->id = pdev->id;
+	control->dev = &pdev->dev; /* Temporary device */
+	snprintf(control->name, sizeof(control->name), "%s_blt", core->name);
+
+	core->op_size = B2R2_PLUG_OPCODE_SIZE_DEFAULT;
+	core->ch_size = B2R2_PLUG_CHUNK_SIZE_DEFAULT;
+	core->pg_size = B2R2_PLUG_PAGE_SIZE_DEFAULT;
+	core->mg_size = B2R2_PLUG_MESSAGE_SIZE_DEFAULT;
+	core->min_req_time = 0;
 
 #ifdef CONFIG_DEBUG_FS
-	b2r2_core.debugfs_root_dir = debugfs_create_dir("b2r2", NULL);
-	debugfs_create_file("stat", 0666, b2r2_core.debugfs_root_dir,
-			0, &debugfs_b2r2_stat_fops);
-	debugfs_create_file("clock", 0666, b2r2_core.debugfs_root_dir,
-			0, &debugfs_b2r2_clock_fops);
-
-	debugfs_create_u8("op_size", 0666, b2r2_core.debugfs_root_dir,
-			&b2r2_core.op_size);
-	debugfs_create_u8("ch_size", 0666, b2r2_core.debugfs_root_dir,
-			&b2r2_core.ch_size);
-	debugfs_create_u8("pg_size", 0666, b2r2_core.debugfs_root_dir,
-			&b2r2_core.pg_size);
-	debugfs_create_u8("mg_size", 0666, b2r2_core.debugfs_root_dir,
-			&b2r2_core.mg_size);
-	debugfs_create_u16("min_req_time", 0666, b2r2_core.debugfs_root_dir,
-			&b2r2_core.min_req_time);
+	core->debugfs_root_dir = debugfs_create_dir(core->name, NULL);
+	core->debugfs_core_root_dir = debugfs_create_dir("core",
+			core->debugfs_root_dir);
+	debugfs_create_file("stats", 0666, core->debugfs_core_root_dir,
+			core, &debugfs_b2r2_stat_fops);
+	debugfs_create_file("clock", 0666, core->debugfs_core_root_dir,
+			core, &debugfs_b2r2_clock_fops);
+	debugfs_create_u8("op_size", 0666, core->debugfs_core_root_dir,
+			&core->op_size);
+	debugfs_create_u8("ch_size", 0666, core->debugfs_core_root_dir,
+			&core->ch_size);
+	debugfs_create_u8("pg_size", 0666, core->debugfs_core_root_dir,
+			&core->pg_size);
+	debugfs_create_u8("mg_size", 0666, core->debugfs_core_root_dir,
+			&core->mg_size);
+	debugfs_create_u16("min_req_time", 0666, core->debugfs_core_root_dir,
+			&core->min_req_time);
+
+	control->debugfs_debug_root_dir = debugfs_create_dir("debug",
+			core->debugfs_root_dir);
+	control->mem_heap.debugfs_root_dir = debugfs_create_dir("mem",
+			core->debugfs_root_dir);
+	control->debugfs_root_dir = debugfs_create_dir("blt",
+			core->debugfs_root_dir);
 #endif
 
-	b2r2_log_info("init done.\n");
+	ret = b2r2_debug_init(control);
+	if (ret < 0) {
+		dev_err(&pdev->dev, "b2r2_debug_init failed\n");
+		goto b2r2_probe_debug_init_failed;
+	}
+
+	/* Initialize b2r2_blt module. FIXME: Module of it's own
+	   or perhaps a dedicated module init c file? */
+	ret = b2r2_blt_module_init(control);
+	if (ret < 0) {
+		b2r2_log_err(&pdev->dev, "b2r2_blt_module_init failed\n");
+		goto b2r2_probe_blt_init_fail;
+	}
+
+	core->control = control;
+	b2r2_core[pdev->id] = core;
+	dev_info(&pdev->dev, "init done.\n");
 
 	return ret;
 
 /** Recover from any error if something fails */
 b2r2_probe_blt_init_fail:
+	kfree(control);
+b2r2_probe_control_alloc_fail:
 b2r2_probe_ioremap_failed:
 b2r2_failed_irq_get:
 b2r2_probe_no_res:
-	regulator_put(b2r2_core.b2r2_reg);
+	regulator_put(core->b2r2_reg);
 b2r2_probe_no_reg:
-	clk_put(b2r2_core.b2r2_clock);
+	clk_put(core->b2r2_clock);
 b2r2_probe_no_clk:
-	destroy_workqueue(b2r2_core.work_queue);
-	b2r2_core.work_queue = NULL;
+	destroy_workqueue(core->work_queue);
+	core->work_queue = NULL;
 b2r2_probe_no_work_queue:
-
-	b2r2_log_info("init done with errors.\n");
+	b2r2_debug_exit();
 b2r2_probe_debug_init_failed:
+#ifdef CONFIG_DEBUG_FS
+	debugfs_remove_recursive(core->debugfs_root_dir);
+#endif
+	kfree(core);
+b2r2_probe_core_alloc_fail:
+	dev_info(&pdev->dev, "init done with errors.\n");
 
 	return ret;
-
 }
 
 
@@ -2523,83 +2660,94 @@ b2r2_probe_debug_init_failed:
 static int b2r2_remove(struct platform_device *pdev)
 {
 	unsigned long flags;
+	struct b2r2_core *core;
 
 	BUG_ON(pdev == NULL);
 
-	b2r2_log_info("%s started\n", __func__);
+	core = dev_get_drvdata(&pdev->dev);
+	BUG_ON(core == NULL);
+	b2r2_log_info(&pdev->dev, "%s: Started\n", __func__);
 
 #ifdef CONFIG_DEBUG_FS
-	debugfs_remove_recursive(b2r2_core.debugfs_root_dir);
+	debugfs_remove_recursive(core->debugfs_root_dir);
 #endif
 
 	/* Flush B2R2 work queue (call all callbacks) */
-	flush_workqueue(b2r2_core.work_queue);
+	flush_workqueue(core->work_queue);
 
 	/* Exit b2r2 blt module */
-	b2r2_blt_module_exit();
+	b2r2_blt_module_exit(core->control);
+
+	kfree(core->control);
 
 #ifdef HANDLE_TIMEOUTED_JOBS
-	cancel_delayed_work(&b2r2_core.timeout_work);
+	cancel_delayed_work(&core->timeout_work);
 #endif
 
 	/* Flush B2R2 work queue (call all callbacks for
 	   cancelled jobs) */
-	flush_workqueue(b2r2_core.work_queue);
+	flush_workqueue(core->work_queue);
 
 	/* Make sure the power is turned off */
-	cancel_delayed_work_sync(&b2r2_core.domain_disable_work);
+	cancel_delayed_work_sync(&core->domain_disable_work);
 
 	/** Unmap B2R2 registers */
-	b2r2_log_info("unmap b2r2 registers..\n");
-	if (b2r2_core.hw) {
-		iounmap(b2r2_core.hw);
-
-		b2r2_core.hw = NULL;
+	b2r2_log_info(&pdev->dev, "unmap b2r2 registers..\n");
+	if (core->hw) {
+		iounmap(core->hw);
+		core->hw = NULL;
 	}
 
-	destroy_workqueue(b2r2_core.work_queue);
+	destroy_workqueue(core->work_queue);
 
-	spin_lock_irqsave(&b2r2_core.lock, flags);
-	b2r2_core.work_queue = NULL;
-	spin_unlock_irqrestore(&b2r2_core.lock, flags);
+	spin_lock_irqsave(&core->lock, flags);
+	core->work_queue = NULL;
+	spin_unlock_irqrestore(&core->lock, flags);
 
 	/* Return the clock */
-	clk_put(b2r2_core.b2r2_clock);
-	regulator_put(b2r2_core.b2r2_reg);
+	clk_put(core->b2r2_clock);
+	regulator_put(core->b2r2_reg);
 
-	b2r2_log_info("%s ended\n", __func__);
-
-	b2r2_core.log_dev = NULL;
+	core->dev = NULL;
+	kfree(core);
+	b2r2_core[pdev->id] = NULL;
 
 	b2r2_debug_exit();
 
-	return 0;
+	b2r2_log_info(&pdev->dev, "%s: Ended\n", __func__);
 
+	return 0;
 }
 /**
  * b2r2_suspend() - This routine puts the B2R2 device in to sustend state.
  * @pdev: platform device.
  *
- * This routine stores the current state of the b2r2 device and puts in to suspend state.
+ * This routine stores the current state of the b2r2 device and puts in to
+ * suspend state.
  *
  */
 int b2r2_suspend(struct platform_device *pdev, pm_message_t state)
 {
-	b2r2_log_info("%s\n", __func__);
+	struct b2r2_core *core;
+
+	BUG_ON(pdev == NULL);
+	core = dev_get_drvdata(&pdev->dev);
+	BUG_ON(core == NULL);
+	b2r2_log_info(core->dev, "%s\n", __func__);
 
 	/* Flush B2R2 work queue (call all callbacks) */
-	flush_workqueue(b2r2_core.work_queue);
+	flush_workqueue(core->work_queue);
 
 #ifdef HANDLE_TIMEOUTED_JOBS
-	cancel_delayed_work(&b2r2_core.timeout_work);
+	cancel_delayed_work(&core->timeout_work);
 #endif
 
 	/* Flush B2R2 work queue (call all callbacks for
 	   cancelled jobs) */
-	flush_workqueue(b2r2_core.work_queue);
+	flush_workqueue(core->work_queue);
 
 	/* Make sure power is turned off */
-	cancel_delayed_work_sync(&b2r2_core.domain_disable_work);
+	cancel_delayed_work_sync(&core->domain_disable_work);
 
 	return 0;
 }
@@ -2614,7 +2762,12 @@ int b2r2_suspend(struct platform_device *pdev, pm_message_t state)
  */
 int b2r2_resume(struct platform_device *pdev)
 {
-	b2r2_log_info("%s\n", __func__);
+	struct b2r2_core *core;
+
+	BUG_ON(pdev == NULL);
+	core = dev_get_drvdata(&pdev->dev);
+	BUG_ON(core == NULL);
+	b2r2_log_info(core->dev, "%s\n", __func__);
 
 	return 0;
 }
diff --git a/drivers/video/b2r2/b2r2_core.h b/drivers/video/b2r2/b2r2_core.h
index 2f958751694..991dd9d9d1b 100644
--- a/drivers/video/b2r2/b2r2_core.h
+++ b/drivers/video/b2r2/b2r2_core.h
@@ -18,126 +18,6 @@
 #include <linux/wait.h>
 #include <linux/workqueue.h>
 
-/**
- * enum b2r2_core_queue - Indicates the B2R2 queue that the job belongs to
- *
- * @B2R2_CORE_QUEUE_AQ1: Application queue 1
- * @B2R2_CORE_QUEUE_AQ2: Application queue 2
- * @B2R2_CORE_QUEUE_AQ3: Application queue 3
- * @B2R2_CORE_QUEUE_AQ4: Application queue 4
- * @B2R2_CORE_QUEUE_CQ1: Composition queue 1
- * @B2R2_CORE_QUEUE_CQ2: Composition queue 2
- * @B2R2_CORE_QUEUE_NO_OF: Number of queues
- */
-enum b2r2_core_queue {
-	B2R2_CORE_QUEUE_AQ1 = 0,
-	B2R2_CORE_QUEUE_AQ2,
-	B2R2_CORE_QUEUE_AQ3,
-	B2R2_CORE_QUEUE_AQ4,
-	B2R2_CORE_QUEUE_CQ1,
-	B2R2_CORE_QUEUE_CQ2,
-	B2R2_CORE_QUEUE_NO_OF,
-};
-
-#define B2R2_NUM_APPLICATIONS_QUEUES 4
-
-/**
- * enum b2r2_core_job_state - Indicates the current state of the job
- *
- * @B2R2_CORE_JOB_IDLE: Never queued
- * @B2R2_CORE_JOB_QUEUED: In queue but not started yet
- * @B2R2_CORE_JOB_RUNNING: Running, executed by B2R2
- * @B2R2_CORE_JOB_DONE: Completed
- * @B2R2_CORE_JOB_CANCELED: Canceled
- */
-enum b2r2_core_job_state {
-	B2R2_CORE_JOB_IDLE = 0,
-	B2R2_CORE_JOB_QUEUED,
-	B2R2_CORE_JOB_RUNNING,
-	B2R2_CORE_JOB_DONE,
-	B2R2_CORE_JOB_CANCELED,
-};
-
-/**
- * struct b2r2_core_job - Represents a B2R2 core job
- *
- * @start_sentinel: Memory overwrite guard
- *
- * @tag: Client value. Used by b2r2_core_job_find_first_with_tag().
- * @prio: Job priority, from -19 up to 20. Mapped to the
- *        B2R2 application queues. Filled in by the client.
- * @first_node_address: Physical address of the first node. Filled
- *                      in by the client.
- * @last_node_address: Physical address of the last node. Filled
- *                     in by the client.
- *
- * @callback: Function that will be called when the job is done.
- * @acquire_resources: Function that allocates the resources needed
- *                     to execute the job (i.e. SRAM alloc). Must not
- *                     sleep if atomic, should fail with negative error code
- *                     if resources not available.
- * @release_resources: Function that releases the resources previously
- *                     allocated by acquire_resources (i.e. SRAM alloc).
- * @release: Function that will be called when the reference count reaches
- *           zero.
- *
- * @job_id: Unique id for this job, assigned by B2R2 core
- * @job_state: The current state of the job
- * @jiffies: Number of jiffies needed for this request
- *
- * @list: List entry element for internal list management
- * @event: Wait queue event to wait for job done
- * @work: Work queue structure, for callback implementation
- *
- * @queue: The queue that this job shall be submitted to
- * @control: B2R2 Queue control
- * @pace_control: For composition queue only
- * @interrupt_context: Context for interrupt
- *
- * @end_sentinel: Memory overwrite guard
- */
-struct b2r2_core_job {
-	u32 start_sentinel;
-
-	/* Data to be filled in by client */
-	int tag;
-	int prio;
-	u32 first_node_address;
-	u32 last_node_address;
-	void (*callback)(struct b2r2_core_job *);
-	int (*acquire_resources)(struct b2r2_core_job *,
-		bool atomic);
-	void (*release_resources)(struct b2r2_core_job *,
-		bool atomic);
-	void (*release)(struct b2r2_core_job *);
-
-	/* Output data, do not modify */
-	int  job_id;
-	enum b2r2_core_job_state job_state;
-	unsigned long jiffies;
-
-	/* Data below is internal to b2r2_core, do not modify */
-
-	/* Reference counting */
-	u32 ref_count;
-
-	/* Internal data */
-	struct list_head  list;
-	wait_queue_head_t event;
-	struct work_struct work;
-
-	/* B2R2 HW data */
-	enum b2r2_core_queue queue;
-	u32 control;
-	u32 pace_control;
-	u32 interrupt_context;
-
-	/* Timing data */
-	u32 hw_start_time;
-	s32 nsec_active_in_hw;
-
-	u32 end_sentinel;
-};
 
 /**
  * b2r2_core_job_add() - Adds a job to B2R2 job queues
@@ -147,12 +27,14 @@ struct b2r2_core_job {
  * release the reference. The job callback function will be always
  * be called after the job is done or cancelled.
  *
+ * @control: The b2r2 control entity
  * @job: Job to be added
  *
  * Returns 0 if OK else negative error code
  *
  */
-int b2r2_core_job_add(struct b2r2_core_job *job);
+int b2r2_core_job_add(struct b2r2_control *control,
+		struct b2r2_core_job *job);
 
 /**
  * b2r2_core_job_wait() - Waits for an added job to be done.
@@ -179,12 +61,14 @@ int b2r2_core_job_cancel(struct b2r2_core_job *job);
  *
  * Reference count will be increased for the found job
  *
+ * @control: The b2r2 control entity
  * @job_id: Job id to find
  *
  * Returns job if found, else NULL
  *
  */
-struct b2r2_core_job *b2r2_core_job_find(int job_id);
+struct b2r2_core_job *b2r2_core_job_find(struct b2r2_control *control,
+		int job_id);
 
 /**
  * b2r2_core_job_find_first_with_tag() - Finds first job with given tag
@@ -193,12 +77,14 @@ struct b2r2_core_job *b2r2_core_job_find(int job_id);
  * This function can be used to find all jobs for a client, i.e.
  * when cancelling all jobs for a client.
  *
+ * @control: The b2r2 control entity
  * @tag: Tag to find
  *
  * Returns job if found, else NULL
  *
  */
-struct b2r2_core_job *b2r2_core_job_find_first_with_tag(int tag);
+struct b2r2_core_job *b2r2_core_job_find_first_with_tag(
+		struct b2r2_control *control, int tag);
 
 /**
  * b2r2_core_job_addref() - Increase the job reference count.
diff --git a/drivers/video/b2r2/b2r2_debug.c b/drivers/video/b2r2/b2r2_debug.c
index d4711cd3e28..23a0b1aa9ac 100644
--- a/drivers/video/b2r2/b2r2_debug.c
+++ b/drivers/video/b2r2/b2r2_debug.c
@@ -16,15 +16,11 @@
 #include <linux/uaccess.h>
 
 int b2r2_log_levels[B2R2_LOG_LEVEL_COUNT];
-struct device *b2r2_log_dev;
-
-static struct dentry *root_dir;
 static struct dentry *log_lvl_dir;
-static struct dentry *stats_dir;
+static int module_init;
 
 #define CHARS_IN_NODE_DUMP 1544
-
-static const size_t dumped_node_size = CHARS_IN_NODE_DUMP * sizeof(char) + 1;
+#define DUMPED_NODE_SIZE (CHARS_IN_NODE_DUMP * sizeof(char) + 1)
 
 static void dump_node(char *dst, struct b2r2_node *node)
 {
@@ -175,11 +171,8 @@ static void dump_node(char *dst, struct b2r2_node *node)
 
 }
 
-struct mutex last_job_lock;
-
-static struct b2r2_node *last_job;
-
-void b2r2_debug_job_done(struct b2r2_node *first_node)
+void b2r2_debug_job_done(struct b2r2_control *cont,
+		struct b2r2_node *first_node)
 {
 	struct b2r2_node *node = first_node;
 	struct b2r2_node **dst_node;
@@ -190,20 +183,20 @@ void b2r2_debug_job_done(struct b2r2_node *first_node)
 		node = node->next;
 	}
 
-	mutex_lock(&last_job_lock);
+	mutex_lock(&cont->last_job_lock);
 
-	if (last_job) {
-		node = last_job;
+	if (cont->last_job) {
+		node = cont->last_job;
 		while (node != NULL) {
 			struct b2r2_node *tmp = node->next;
 			kfree(node);
 			node = tmp;
 		}
-		last_job = NULL;
+		cont->last_job = NULL;
 	}
 
 	node = first_node;
-	dst_node = &last_job;
+	dst_node = &cont->last_job;
 	while (node != NULL) {
 		*dst_node = kzalloc(sizeof(**dst_node), GFP_KERNEL);
 		if (!(*dst_node))
@@ -215,29 +208,27 @@ void b2r2_debug_job_done(struct b2r2_node *first_node)
 		node = node->next;
 	}
 
-	mutex_unlock(&last_job_lock);
+	mutex_unlock(&cont->last_job_lock);
 
 	return;
 
 last_job_alloc_failed:
-	mutex_unlock(&last_job_lock);
+	mutex_unlock(&cont->last_job_lock);
 
-	while (last_job != NULL) {
-		struct b2r2_node *tmp = last_job->next;
-		kfree(last_job);
-		last_job = tmp;
+	while (cont->last_job != NULL) {
+		struct b2r2_node *tmp = cont->last_job->next;
+		kfree(cont->last_job);
+		cont->last_job = tmp;
 	}
 
 	return;
 }
 
-static char *last_job_chars;
-static int prev_node_count;
-
-static ssize_t last_job_read(struct file *filep, char __user *buf,
+static ssize_t last_job_read(struct file *filp, char __user *buf,
 		size_t bytes, loff_t *off)
 {
-	struct b2r2_node *node = last_job;
+	struct b2r2_control *cont = filp->f_dentry->d_inode->i_private;
+	struct b2r2_node *node = cont->last_job;
 	int node_count = 0;
 	int i;
 
@@ -248,26 +239,27 @@ static ssize_t last_job_read(struct file *filep, char __user *buf,
 	for (; node != NULL; node = node->next)
 		node_count++;
 
-	size = node_count * dumped_node_size;
+	size = node_count * DUMPED_NODE_SIZE;
 
-	if (node_count != prev_node_count) {
-		kfree(last_job_chars);
+	if (node_count != cont->prev_node_count) {
+		kfree(cont->last_job_chars);
 
-		last_job_chars = kzalloc(size, GFP_KERNEL);
-		if (!last_job_chars)
+		cont->last_job_chars = kzalloc(size, GFP_KERNEL);
+		if (!cont->last_job_chars)
 			return 0;
-		prev_node_count = node_count;
+		cont->prev_node_count = node_count;
 	}
 
-	mutex_lock(&last_job_lock);
-	node = last_job;
+	mutex_lock(&cont->last_job_lock);
+	node = cont->last_job;
 	for (i = 0; i < node_count; i++) {
 		BUG_ON(node == NULL);
-		dump_node(last_job_chars + i * dumped_node_size/sizeof(char),
-				node);
+		dump_node(cont->last_job_chars +
+			i * DUMPED_NODE_SIZE/sizeof(char),
+			node);
 		node = node->next;
 	}
-	mutex_unlock(&last_job_lock);
+	mutex_unlock(&cont->last_job_lock);
 
 	if (offs > size)
 		return 0;
@@ -277,7 +269,7 @@ static ssize_t last_job_read(struct file *filep, char __user *buf,
 	else
 		count = bytes;
 
-	if (copy_to_user(buf, last_job_chars + offs, count))
+	if (copy_to_user(buf, cont->last_job_chars + offs, count))
 		return -EFAULT;
 
 	*off = offs + count;
@@ -288,48 +280,48 @@ static const struct file_operations last_job_fops = {
 	.read = last_job_read,
 };
 
-int b2r2_debug_init(struct device *log_dev)
+int b2r2_debug_init(struct b2r2_control *cont)
 {
 	int i;
 
-	b2r2_log_dev = log_dev;
-
-	for (i = 0; i < B2R2_LOG_LEVEL_COUNT; i++)
-		b2r2_log_levels[i] = 0;
-
-	root_dir = debugfs_create_dir("b2r2_debug", NULL);
-	if (!root_dir) {
-		b2r2_log_warn("%s: could not create root dir\n", __func__);
-		return -ENODEV;
-	}
+	if (!module_init) {
+		for (i = 0; i < B2R2_LOG_LEVEL_COUNT; i++)
+			b2r2_log_levels[i] = 0;
 
 #if !defined(CONFIG_DYNAMIC_DEBUG) && defined(CONFIG_DEBUG_FS)
-	/*
-	 * If dynamic debug is disabled we need some other way to control the
-	 * log prints
-	 */
-	log_lvl_dir = debugfs_create_dir("logs", root_dir);
-
-	/* No need to save the files, they will be removed recursively */
-	(void)debugfs_create_bool("warnings", 0644, log_lvl_dir,
-				&b2r2_log_levels[B2R2_LOG_LEVEL_WARN]);
-	(void)debugfs_create_bool("info", 0644, log_lvl_dir,
-				&b2r2_log_levels[B2R2_LOG_LEVEL_INFO]);
-	(void)debugfs_create_bool("debug", 0644, log_lvl_dir,
-				&b2r2_log_levels[B2R2_LOG_LEVEL_DEBUG]);
-	(void)debugfs_create_bool("regdumps", 0644, log_lvl_dir,
-				&b2r2_log_levels[B2R2_LOG_LEVEL_REGDUMP]);
+		/*
+		 * If dynamic debug is disabled we need some other way to
+		 * control the log prints
+		 */
+		log_lvl_dir = debugfs_create_dir("b2r2_log", NULL);
+
+		/* No need to save the files,
+		 * they will be removed recursively */
+		(void)debugfs_create_bool("warnings", 0644, log_lvl_dir,
+			&b2r2_log_levels[B2R2_LOG_LEVEL_WARN]);
+		(void)debugfs_create_bool("info", 0644, log_lvl_dir,
+			&b2r2_log_levels[B2R2_LOG_LEVEL_INFO]);
+		(void)debugfs_create_bool("debug", 0644, log_lvl_dir,
+			&b2r2_log_levels[B2R2_LOG_LEVEL_DEBUG]);
+		(void)debugfs_create_bool("regdumps", 0644, log_lvl_dir,
+			&b2r2_log_levels[B2R2_LOG_LEVEL_REGDUMP]);
 
 #elif defined(CONFIG_DYNAMIC_DEBUG)
-	/* log_lvl_dir is never used */
-	(void)log_lvl_dir;
+		/* log_lvl_dir is never used */
+		(void)log_lvl_dir;
 #endif
+		module_init++;
+	}
 
-	stats_dir = debugfs_create_dir("stats", root_dir);
-	(void)debugfs_create_file("last_job", 0444, stats_dir, NULL,
-			&last_job_fops);
+	if (cont->debugfs_debug_root_dir) {
+		/* No need to save the file,
+		 * it will be removed recursively */
+		(void)debugfs_create_file("last_job", 0444,
+				cont->debugfs_debug_root_dir, cont,
+				&last_job_fops);
+	}
 
-	mutex_init(&last_job_lock);
+	mutex_init(&cont->last_job_lock);
 
 	return 0;
 }
@@ -337,7 +329,10 @@ int b2r2_debug_init(struct device *log_dev)
 void b2r2_debug_exit(void)
 {
 #if !defined(CONFIG_DYNAMIC_DEBUG) && defined(CONFIG_DEBUG_FS)
-	if (root_dir)
-		debugfs_remove_recursive(root_dir);
+	module_init--;
+	if (!module_init && log_lvl_dir) {
+		debugfs_remove_recursive(log_lvl_dir);
+		log_lvl_dir = NULL;
+	}
 #endif
 }
diff --git a/drivers/video/b2r2/b2r2_debug.h b/drivers/video/b2r2/b2r2_debug.h
index f87ca728482..1b1ac83f6cb 100644
--- a/drivers/video/b2r2/b2r2_debug.h
+++ b/drivers/video/b2r2/b2r2_debug.h
@@ -33,50 +33,47 @@ enum b2r2_log_levels {
  */
 extern int b2r2_log_levels[B2R2_LOG_LEVEL_COUNT];
 
-extern struct device *b2r2_log_dev;
-
-#define b2r2_log_err(...) do { \
+#define b2r2_log_err(b2r2_log_dev, ...) do { \
 		dev_err(b2r2_log_dev, __VA_ARGS__); \
 	} while (0)
 
 /* If dynamic debug is enabled it should be used instead of loglevels */
 #ifdef CONFIG_DYNAMIC_DEBUG
-#  define b2r2_log_warn(...) do { \
+#  define b2r2_log_warn(b2r2_log_dev, ...) do { \
 		dev_dbg(b2r2_log_dev, "WARN " __VA_ARGS__); \
 	} while (0)
-#  define b2r2_log_info(...) do { \
+#  define b2r2_log_info(b2r2_log_dev, ...) do { \
 		dev_dbg(b2r2_log_dev, "INFO " __VA_ARGS__); \
 	} while (0)
-#  define b2r2_log_debug(...) do { \
+#  define b2r2_log_debug(b2r2_log_dev, ...) do { \
 		dev_dbg(b2r2_log_dev, "DEBUG " __VA_ARGS__); \
 	} while (0)
-#  define b2r2_log_regdump(...) do { \
+#  define b2r2_log_regdump(b2r2_log_dev, ...) do { \
 		dev_dbg(b2r2_log_dev, "REGD " __VA_ARGS__); \
 	} while (0)
 #else
-#  define b2r2_log_warn(...) do { \
+#  define b2r2_log_warn(b2r2_log_dev, ...) do { \
 		if (b2r2_log_levels[B2R2_LOG_LEVEL_WARN]) \
 			dev_warn(b2r2_log_dev, "WARN " __VA_ARGS__); \
 	} while (0)
-#  define b2r2_log_info(...) do { \
+#  define b2r2_log_info(b2r2_log_dev, ...) do { \
 		if (b2r2_log_levels[B2R2_LOG_LEVEL_INFO]) \
 			dev_info(b2r2_log_dev, "INFO " __VA_ARGS__); \
 	} while (0)
-#  define b2r2_log_debug(...) do { \
+#  define b2r2_log_debug(b2r2_log_dev, ...) do { \
 		if (b2r2_log_levels[B2R2_LOG_LEVEL_DEBUG]) \
 			dev_dbg(b2r2_log_dev, "DEBUG " __VA_ARGS__); \
 	} while (0)
-#  define b2r2_log_regdump(...) do { \
+#  define b2r2_log_regdump(b2r2_log_dev, ...) do { \
 		if (b2r2_log_levels[B2R2_LOG_LEVEL_REGDUMP]) \
 			dev_vdbg(b2r2_log_dev, "REGD " __VA_ARGS__); \
 	} while (0)
 #endif
 
-
-int b2r2_debug_init(struct device *log_dev);
+int b2r2_debug_init(struct b2r2_control *cont);
 void b2r2_debug_exit(void);
-
-void b2r2_debug_job_done(struct b2r2_node *node);
+void b2r2_debug_job_done(struct b2r2_control *cont,
+		struct b2r2_node *node);
 
 #else
 
@@ -86,7 +83,7 @@ void b2r2_debug_job_done(struct b2r2_node *node);
 #define b2r2_log_debug(...)
 #define b2r2_log_regdump(...)
 
-static inline int b2r2_debug_init(struct device *log_dev)
+static inline int b2r2_debug_init(struct b2r2_control *cont)
 {
 	return 0;
 }
@@ -94,7 +91,8 @@ static inline void b2r2_debug_exit(void)
 {
 	return;
 }
-static inline void b2r2_debug_job_done(struct b2r2_node *node)
+static inline void b2r2_debug_job_done(struct b2r2_control *cont,
+		struct b2r2_node *node)
 {
 	return;
 }
diff --git a/drivers/video/b2r2/b2r2_filters.c b/drivers/video/b2r2/b2r2_filters.c
index 85cb697b522..a969816a9e7 100644
--- a/drivers/video/b2r2/b2r2_filters.c
+++ b/drivers/video/b2r2/b2r2_filters.c
@@ -236,49 +236,49 @@ static struct b2r2_filter_spec blur_filter = {
 };
 
 /* Private function declarations */
-static int alloc_filter_coeffs(struct b2r2_filter_spec *filter);
-static void free_filter_coeffs(struct b2r2_filter_spec *filter);
+static int alloc_filter_coeffs(struct device *dev,
+		struct b2r2_filter_spec *filter);
+static void free_filter_coeffs(struct device *dev,
+		struct b2r2_filter_spec *filter);
 
 /* Public functions */
 
-static int filters_initialized;
-
-int b2r2_filters_init()
+int b2r2_filters_init(struct b2r2_control *cont)
 {
 	int i;
 
-	if (filters_initialized)
+	if (cont->filters_initialized)
 		return 0;
 
 	for (i = 0; i < filters_size; i++) {
-		alloc_filter_coeffs(&filters[i]);
+		alloc_filter_coeffs(cont->dev, &filters[i]);
 	}
 
-	alloc_filter_coeffs(&bilinear_filter);
-	alloc_filter_coeffs(&default_downscale_filter);
-	alloc_filter_coeffs(&blur_filter);
+	alloc_filter_coeffs(cont->dev, &bilinear_filter);
+	alloc_filter_coeffs(cont->dev, &default_downscale_filter);
+	alloc_filter_coeffs(cont->dev, &blur_filter);
 
-	filters_initialized = 1;
+	cont->filters_initialized = 1;
 
 	return 0;
 }
 
-void b2r2_filters_exit()
+void b2r2_filters_exit(struct b2r2_control *cont)
 {
 	int i;
 
-	if (!filters_initialized)
+	if (!cont->filters_initialized)
 		return;
 
 	for (i = 0; i < filters_size; i++) {
-		free_filter_coeffs(&filters[i]);
+		free_filter_coeffs(cont->dev, &filters[i]);
 	}
 
-	free_filter_coeffs(&bilinear_filter);
-	free_filter_coeffs(&default_downscale_filter);
-	free_filter_coeffs(&blur_filter);
+	free_filter_coeffs(cont->dev, &bilinear_filter);
+	free_filter_coeffs(cont->dev, &default_downscale_filter);
+	free_filter_coeffs(cont->dev, &blur_filter);
 
-	filters_initialized = 0;
+	cont->filters_initialized = 0;
 }
 
 struct b2r2_filter_spec *b2r2_filter_find(u16 scale_factor)
@@ -323,11 +323,12 @@ struct b2r2_filter_spec *b2r2_filter_blur()
 }
 
 /* Private functions */
-static int alloc_filter_coeffs(struct b2r2_filter_spec *filter)
+static int alloc_filter_coeffs(struct device *dev,
+		struct b2r2_filter_spec *filter)
 {
 	int ret;
 
-	filter->h_coeffs_dma_addr = dma_alloc_coherent(b2r2_blt_device(),
+	filter->h_coeffs_dma_addr = dma_alloc_coherent(dev,
 			B2R2_HF_TABLE_SIZE, &(filter->h_coeffs_phys_addr),
 			GFP_DMA | GFP_KERNEL);
 	if (filter->h_coeffs_dma_addr == NULL) {
@@ -335,7 +336,7 @@ static int alloc_filter_coeffs(struct b2r2_filter_spec *filter)
 		goto error;
 	}
 
-	filter->v_coeffs_dma_addr = dma_alloc_coherent(b2r2_blt_device(),
+	filter->v_coeffs_dma_addr = dma_alloc_coherent(dev,
 			B2R2_VF_TABLE_SIZE, &(filter->v_coeffs_phys_addr),
 			GFP_DMA | GFP_KERNEL);
 	if (filter->v_coeffs_dma_addr == NULL) {
@@ -343,25 +344,28 @@ static int alloc_filter_coeffs(struct b2r2_filter_spec *filter)
 		goto error;
 	}
 
-	memcpy(filter->h_coeffs_dma_addr, filter->h_coeffs, B2R2_HF_TABLE_SIZE);
-	memcpy(filter->v_coeffs_dma_addr, filter->v_coeffs, B2R2_VF_TABLE_SIZE);
+	memcpy(filter->h_coeffs_dma_addr, filter->h_coeffs,
+			B2R2_HF_TABLE_SIZE);
+	memcpy(filter->v_coeffs_dma_addr, filter->v_coeffs,
+			B2R2_VF_TABLE_SIZE);
 
 	return 0;
 
 error:
-	free_filter_coeffs(filter);
+	free_filter_coeffs(dev, filter);
 	return ret;
 
 }
 
-static void free_filter_coeffs(struct b2r2_filter_spec *filter)
+static void free_filter_coeffs(struct device *dev,
+		struct b2r2_filter_spec *filter)
 {
 	if (filter->h_coeffs_dma_addr != NULL)
-		dma_free_coherent(b2r2_blt_device(), B2R2_HF_TABLE_SIZE,
+		dma_free_coherent(dev, B2R2_HF_TABLE_SIZE,
 				filter->h_coeffs_dma_addr,
 				filter->h_coeffs_phys_addr);
 	if (filter->v_coeffs_dma_addr != NULL)
-		dma_free_coherent(b2r2_blt_device(), B2R2_VF_TABLE_SIZE,
+		dma_free_coherent(dev, B2R2_VF_TABLE_SIZE,
 				filter->v_coeffs_dma_addr,
 				filter->v_coeffs_phys_addr);
 
diff --git a/drivers/video/b2r2/b2r2_filters.h b/drivers/video/b2r2/b2r2_filters.h
index 0eeefc6b0e0..790c9ec8ee9 100644
--- a/drivers/video/b2r2/b2r2_filters.h
+++ b/drivers/video/b2r2/b2r2_filters.h
@@ -13,6 +13,8 @@
 
 #include <linux/kernel.h>
 
+#include "b2r2_internal.h"
+
 #define B2R2_HF_TABLE_SIZE 64
 #define B2R2_VF_TABLE_SIZE 40
 
@@ -45,12 +47,12 @@ struct b2r2_filter_spec {
 /**
  * b2r2_filters_init() - Initilizes the B2R2 filters
  */
-int b2r2_filters_init(void);
+int b2r2_filters_init(struct b2r2_control *control);
 
 /**
  * b2r2_filters_init() - De-initilizes the B2R2 filters
  */
-void b2r2_filters_exit(void);
+void b2r2_filters_exit(struct b2r2_control *control);
 
 /**
  * b2r2_filter_find() - Find a filter matching the given scale factor
diff --git a/drivers/video/b2r2/b2r2_generic.c b/drivers/video/b2r2/b2r2_generic.c
index 5941e39be91..1a27adbaadf 100644
--- a/drivers/video/b2r2/b2r2_generic.c
+++ b/drivers/video/b2r2/b2r2_generic.c
@@ -37,9 +37,10 @@
 /**
  * reset_nodes() - clears the node list
  */
-static void reset_nodes(struct b2r2_node *node)
+static void reset_nodes(struct b2r2_control *cont,
+		struct b2r2_node *node)
 {
-	b2r2_log_info("%s ENTRY\n", __func__);
+	b2r2_log_info(cont->dev, "%s ENTRY\n", __func__);
 
 	while (node != NULL) {
 		memset(&(node->node), 0, sizeof(node->node));
@@ -54,113 +55,115 @@ static void reset_nodes(struct b2r2_node *node)
 
 		node = node->next;
 	}
-	b2r2_log_info("%s DONE\n", __func__);
+	b2r2_log_info(cont->dev, "%s DONE\n", __func__);
 }
 
 /**
  * dump_nodes() - prints the node list
  */
-static void dump_nodes(struct b2r2_node *first, bool dump_all)
+static void dump_nodes(struct b2r2_control *cont,
+		struct b2r2_node *first, bool dump_all)
 {
 	struct b2r2_node *node = first;
-	b2r2_log_info("%s ENTRY\n", __func__);
+	b2r2_log_info(cont->dev, "%s ENTRY\n", __func__);
 	do {
-		b2r2_log_debug("\nNODE START:\n=============\n");
-		b2r2_log_debug("B2R2_ACK: \t0x%.8x\n",
+		b2r2_log_debug(cont->dev, "\nNODE START:\n=============\n");
+		b2r2_log_debug(cont->dev, "B2R2_ACK: \t0x%.8x\n",
 				node->node.GROUP0.B2R2_ACK);
-		b2r2_log_debug("B2R2_INS: \t0x%.8x\n",
+		b2r2_log_debug(cont->dev, "B2R2_INS: \t0x%.8x\n",
 				node->node.GROUP0.B2R2_INS);
-		b2r2_log_debug("B2R2_CIC: \t0x%.8x\n",
+		b2r2_log_debug(cont->dev, "B2R2_CIC: \t0x%.8x\n",
 				node->node.GROUP0.B2R2_CIC);
-		b2r2_log_debug("B2R2_NIP: \t0x%.8x\n",
+		b2r2_log_debug(cont->dev, "B2R2_NIP: \t0x%.8x\n",
 				node->node.GROUP0.B2R2_NIP);
 
-		b2r2_log_debug("B2R2_TSZ: \t0x%.8x\n",
+		b2r2_log_debug(cont->dev, "B2R2_TSZ: \t0x%.8x\n",
 				node->node.GROUP1.B2R2_TSZ);
-		b2r2_log_debug("B2R2_TXY: \t0x%.8x\n",
+		b2r2_log_debug(cont->dev, "B2R2_TXY: \t0x%.8x\n",
 				node->node.GROUP1.B2R2_TXY);
-		b2r2_log_debug("B2R2_TTY: \t0x%.8x\n",
+		b2r2_log_debug(cont->dev, "B2R2_TTY: \t0x%.8x\n",
 				node->node.GROUP1.B2R2_TTY);
-		b2r2_log_debug("B2R2_TBA: \t0x%.8x\n",
+		b2r2_log_debug(cont->dev, "B2R2_TBA: \t0x%.8x\n",
 				node->node.GROUP1.B2R2_TBA);
 
-		b2r2_log_debug("B2R2_S2CF: \t0x%.8x\n",
+		b2r2_log_debug(cont->dev, "B2R2_S2CF: \t0x%.8x\n",
 				node->node.GROUP2.B2R2_S2CF);
-		b2r2_log_debug("B2R2_S1CF: \t0x%.8x\n",
+		b2r2_log_debug(cont->dev, "B2R2_S1CF: \t0x%.8x\n",
 				node->node.GROUP2.B2R2_S1CF);
 
-		b2r2_log_debug("B2R2_S1SZ: \t0x%.8x\n",
+		b2r2_log_debug(cont->dev, "B2R2_S1SZ: \t0x%.8x\n",
 				node->node.GROUP3.B2R2_SSZ);
-		b2r2_log_debug("B2R2_S1XY: \t0x%.8x\n",
+		b2r2_log_debug(cont->dev, "B2R2_S1XY: \t0x%.8x\n",
 				node->node.GROUP3.B2R2_SXY);
-		b2r2_log_debug("B2R2_S1TY: \t0x%.8x\n",
+		b2r2_log_debug(cont->dev, "B2R2_S1TY: \t0x%.8x\n",
 				node->node.GROUP3.B2R2_STY);
-		b2r2_log_debug("B2R2_S1BA: \t0x%.8x\n",
+		b2r2_log_debug(cont->dev, "B2R2_S1BA: \t0x%.8x\n",
 				node->node.GROUP3.B2R2_SBA);
 
-		b2r2_log_debug("B2R2_S2SZ: \t0x%.8x\n",
+		b2r2_log_debug(cont->dev, "B2R2_S2SZ: \t0x%.8x\n",
 				node->node.GROUP4.B2R2_SSZ);
-		b2r2_log_debug("B2R2_S2XY: \t0x%.8x\n",
+		b2r2_log_debug(cont->dev, "B2R2_S2XY: \t0x%.8x\n",
 				node->node.GROUP4.B2R2_SXY);
-		b2r2_log_debug("B2R2_S2TY: \t0x%.8x\n",
+		b2r2_log_debug(cont->dev, "B2R2_S2TY: \t0x%.8x\n",
 				node->node.GROUP4.B2R2_STY);
-		b2r2_log_debug("B2R2_S2BA: \t0x%.8x\n",
+		b2r2_log_debug(cont->dev, "B2R2_S2BA: \t0x%.8x\n",
 				node->node.GROUP4.B2R2_SBA);
 
-		b2r2_log_debug("B2R2_S3SZ: \t0x%.8x\n",
+		b2r2_log_debug(cont->dev, "B2R2_S3SZ: \t0x%.8x\n",
 				node->node.GROUP5.B2R2_SSZ);
-		b2r2_log_debug("B2R2_S3XY: \t0x%.8x\n",
+		b2r2_log_debug(cont->dev, "B2R2_S3XY: \t0x%.8x\n",
 				node->node.GROUP5.B2R2_SXY);
-		b2r2_log_debug("B2R2_S3TY: \t0x%.8x\n",
+		b2r2_log_debug(cont->dev, "B2R2_S3TY: \t0x%.8x\n",
 				node->node.GROUP5.B2R2_STY);
-		b2r2_log_debug("B2R2_S3BA: \t0x%.8x\n",
+		b2r2_log_debug(cont->dev, "B2R2_S3BA: \t0x%.8x\n",
 				node->node.GROUP5.B2R2_SBA);
 
-		b2r2_log_debug("B2R2_CWS: \t0x%.8x\n",
+		b2r2_log_debug(cont->dev, "B2R2_CWS: \t0x%.8x\n",
 				node->node.GROUP6.B2R2_CWS);
-		b2r2_log_debug("B2R2_CWO: \t0x%.8x\n",
+		b2r2_log_debug(cont->dev, "B2R2_CWO: \t0x%.8x\n",
 				node->node.GROUP6.B2R2_CWO);
 
-		b2r2_log_debug("B2R2_FCTL: \t0x%.8x\n",
+		b2r2_log_debug(cont->dev, "B2R2_FCTL: \t0x%.8x\n",
 				node->node.GROUP8.B2R2_FCTL);
-		b2r2_log_debug("B2R2_RSF: \t0x%.8x\n",
+		b2r2_log_debug(cont->dev, "B2R2_RSF: \t0x%.8x\n",
 				node->node.GROUP9.B2R2_RSF);
-		b2r2_log_debug("B2R2_RZI: \t0x%.8x\n",
+		b2r2_log_debug(cont->dev, "B2R2_RZI: \t0x%.8x\n",
 				node->node.GROUP9.B2R2_RZI);
-		b2r2_log_debug("B2R2_HFP: \t0x%.8x\n",
+		b2r2_log_debug(cont->dev, "B2R2_HFP: \t0x%.8x\n",
 				node->node.GROUP9.B2R2_HFP);
-		b2r2_log_debug("B2R2_VFP: \t0x%.8x\n",
+		b2r2_log_debug(cont->dev, "B2R2_VFP: \t0x%.8x\n",
 				node->node.GROUP9.B2R2_VFP);
-		b2r2_log_debug("B2R2_LUMA_RSF: \t0x%.8x\n",
+		b2r2_log_debug(cont->dev, "B2R2_LUMA_RSF: \t0x%.8x\n",
 				node->node.GROUP10.B2R2_RSF);
-		b2r2_log_debug("B2R2_LUMA_RZI: \t0x%.8x\n",
+		b2r2_log_debug(cont->dev, "B2R2_LUMA_RZI: \t0x%.8x\n",
 				node->node.GROUP10.B2R2_RZI);
-		b2r2_log_debug("B2R2_LUMA_HFP: \t0x%.8x\n",
+		b2r2_log_debug(cont->dev, "B2R2_LUMA_HFP: \t0x%.8x\n",
 				node->node.GROUP10.B2R2_HFP);
-		b2r2_log_debug("B2R2_LUMA_VFP: \t0x%.8x\n",
+		b2r2_log_debug(cont->dev, "B2R2_LUMA_VFP: \t0x%.8x\n",
 				node->node.GROUP10.B2R2_VFP);
 
 
-		b2r2_log_debug("B2R2_IVMX0: \t0x%.8x\n",
+		b2r2_log_debug(cont->dev, "B2R2_IVMX0: \t0x%.8x\n",
 				node->node.GROUP15.B2R2_VMX0);
-		b2r2_log_debug("B2R2_IVMX1: \t0x%.8x\n",
+		b2r2_log_debug(cont->dev, "B2R2_IVMX1: \t0x%.8x\n",
 				node->node.GROUP15.B2R2_VMX1);
-		b2r2_log_debug("B2R2_IVMX2: \t0x%.8x\n",
+		b2r2_log_debug(cont->dev, "B2R2_IVMX2: \t0x%.8x\n",
 				node->node.GROUP15.B2R2_VMX2);
-		b2r2_log_debug("B2R2_IVMX3: \t0x%.8x\n",
+		b2r2_log_debug(cont->dev, "B2R2_IVMX3: \t0x%.8x\n",
 				node->node.GROUP15.B2R2_VMX3);
-		b2r2_log_debug("\n=============\nNODE END\n");
+		b2r2_log_debug(cont->dev, "\n=============\nNODE END\n");
 
 		node = node->next;
 	} while (node != NULL && dump_all);
 
-	b2r2_log_info("%s DONE\n", __func__);
+	b2r2_log_info(cont->dev, "%s DONE\n", __func__);
 }
 
 /**
  * to_native_fmt() - returns the native B2R2 format
  */
-static inline enum b2r2_native_fmt to_native_fmt(enum b2r2_blt_fmt fmt)
+static inline enum b2r2_native_fmt to_native_fmt(struct b2r2_control *cont,
+		enum b2r2_blt_fmt fmt)
 {
 
 	switch (fmt) {
@@ -216,7 +219,8 @@ static inline enum b2r2_native_fmt to_native_fmt(enum b2r2_blt_fmt fmt)
 /**
  * get_alpha_range() - returns the alpha range of the given format
  */
-static inline enum b2r2_ty get_alpha_range(enum b2r2_blt_fmt fmt)
+static inline enum b2r2_ty get_alpha_range(struct b2r2_control *cont,
+		enum b2r2_blt_fmt fmt)
 {
 	switch (fmt) {
 	case B2R2_BLT_FMT_24_BIT_ARGB8565:
@@ -234,7 +238,8 @@ static inline enum b2r2_ty get_alpha_range(enum b2r2_blt_fmt fmt)
 	return B2R2_TY_ALPHA_RANGE_128; /* 0 - 128 */
 }
 
-static unsigned int get_pitch(enum b2r2_blt_fmt format, u32 width)
+static unsigned int get_pitch(struct b2r2_control *cont,
+		enum b2r2_blt_fmt format, u32 width)
 {
 	switch (format) {
 	case B2R2_BLT_FMT_1_BIT_A1: {
@@ -269,7 +274,7 @@ static unsigned int get_pitch(enum b2r2_blt_fmt format, u32 width)
 	case B2R2_BLT_FMT_CB_Y_CR_Y:
 		/* width of the buffer must be a multiple of 4 */
 		if (width & 3) {
-			b2r2_log_warn("%s: Illegal width "
+			b2r2_log_warn(cont->dev, "%s: Illegal width "
 				"for fmt=%#010x width=%d\n", __func__,
 				format, width);
 			return 0;
@@ -290,7 +295,7 @@ static unsigned int get_pitch(enum b2r2_blt_fmt format, u32 width)
 	case B2R2_BLT_FMT_YVU422_PACKED_SEMI_PLANAR:
 		/* width of the buffer must be a multiple of 2 */
 		if (width & 1) {
-			b2r2_log_warn("%s: Illegal width "
+			b2r2_log_warn(cont->dev, "%s: Illegal width "
 				"for fmt=%#010x width=%d\n", __func__,
 				format, width);
 			return 0;
@@ -305,7 +310,7 @@ static unsigned int get_pitch(enum b2r2_blt_fmt format, u32 width)
 	case B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE:
 		/* width of the buffer must be a multiple of 16. */
 		if (width & 15) {
-			b2r2_log_warn("%s: Illegal width "
+			b2r2_log_warn(cont->dev, "%s: Illegal width "
 				"for fmt=%#010x width=%d\n", __func__,
 				format, width);
 			return 0;
@@ -317,35 +322,36 @@ static unsigned int get_pitch(enum b2r2_blt_fmt format, u32 width)
 		return width;
 		break;
 	default:
-		b2r2_log_warn("%s: Unable to determine pitch "
+		b2r2_log_warn(cont->dev, "%s: Unable to determine pitch "
 			"for fmt=%#010x width=%d\n", __func__,
 			format, width);
 		return 0;
 	}
 }
 
-static s32 validate_buf(const struct b2r2_blt_img *image,
-			const struct b2r2_resolved_buf *buf)
+static s32 validate_buf(struct b2r2_control *cont,
+		const struct b2r2_blt_img *image,
+		const struct b2r2_resolved_buf *buf)
 {
 	u32 expect_buf_size;
 	u32 pitch;
 
 	if (image->width <= 0 || image->height <= 0) {
-		b2r2_log_warn("%s: width=%d or height=%d negative.\n", __func__,
-			image->width, image->height);
+		b2r2_log_warn(cont->dev, "%s: width=%d or height=%d negative"
+				".\n", __func__, image->width, image->height);
 		return -EINVAL;
 	}
 
 	if (image->pitch == 0) {
 		/* autodetect pitch based on format and width */
-		pitch = get_pitch(image->fmt, image->width);
+		pitch = get_pitch(cont, image->fmt, image->width);
 	} else
 		pitch = image->pitch;
 
 	expect_buf_size = pitch * image->height;
 
 	if (pitch == 0) {
-		b2r2_log_warn("%s: Unable to detect pitch. "
+		b2r2_log_warn(cont->dev, "%s: Unable to detect pitch. "
 			"fmt=%#010x, width=%d\n",
 			__func__,
 			image->fmt, image->width);
@@ -393,7 +399,7 @@ static s32 validate_buf(const struct b2r2_blt_img *image,
 	case B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE:
 		/* Height must be a multiple of 16 for macro-block format.*/
 		if (image->height & 15) {
-			b2r2_log_warn("%s: Illegal height "
+			b2r2_log_warn(cont->dev, "%s: Illegal height "
 				"for fmt=%#010x height=%d\n", __func__,
 				image->fmt, image->height);
 			return -EINVAL;
@@ -403,7 +409,7 @@ static s32 validate_buf(const struct b2r2_blt_img *image,
 	case B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE:
 		/* Height must be a multiple of 16 for macro-block format.*/
 		if (image->height & 15) {
-			b2r2_log_warn("%s: Illegal height "
+			b2r2_log_warn(cont->dev, "%s: Illegal height "
 				"for fmt=%#010x height=%d\n", __func__,
 				image->fmt, image->height);
 			return -EINVAL;
@@ -415,7 +421,7 @@ static s32 validate_buf(const struct b2r2_blt_img *image,
 	}
 
 	if (buf->file_len < expect_buf_size) {
-		b2r2_log_warn("%s: Invalid buffer size:\n"
+		b2r2_log_warn(cont->dev, "%s: Invalid buffer size:\n"
 			"fmt=%#010x w=%d h=%d buf.len=%d expect_buf_size=%d\n",
 			__func__,
 			image->fmt, image->width, image->height, buf->file_len,
@@ -424,8 +430,8 @@ static s32 validate_buf(const struct b2r2_blt_img *image,
 	}
 
 	if (image->buf.type == B2R2_BLT_PTR_VIRTUAL) {
-		b2r2_log_warn("%s: Virtual pointers not supported yet.\n",
-			__func__);
+		b2r2_log_warn(cont->dev, "%s: Virtual pointers not supported"
+				" yet.\n", __func__);
 		return -EINVAL;
 	}
 	return 0;
@@ -435,7 +441,8 @@ static s32 validate_buf(const struct b2r2_blt_img *image,
  * Bit-expand the color from fmt to RGB888 with blue at LSB.
  * Copy MSBs into missing LSBs.
  */
-static u32 to_RGB888(u32 color, const enum b2r2_blt_fmt fmt)
+static u32 to_RGB888(struct b2r2_control *cont, u32 color,
+		const enum b2r2_blt_fmt fmt)
 {
 	u32 out_color = 0;
 	u32 r = 0;
@@ -491,7 +498,9 @@ static void setup_fill_input_stage(const struct b2r2_blt_request *req,
 	enum b2r2_native_fmt fill_fmt = 0;
 	u32 src_color = req->user_req.src_color;
 	const struct b2r2_blt_img *dst_img = &(req->user_req.dst_img);
-	b2r2_log_info("%s ENTRY\n", __func__);
+	struct b2r2_control *cont = req->instance->control;
+
+	b2r2_log_info(cont->dev, "%s ENTRY\n", __func__);
 
 	/* Determine format in src_color */
 	switch (dst_img->fmt) {
@@ -509,7 +518,7 @@ static void setup_fill_input_stage(const struct b2r2_blt_request *req,
 			fill_fmt = B2R2_NATIVE_ARGB8888;
 		} else {
 			/* SOURCE_FILL_RAW */
-			fill_fmt = to_native_fmt(dst_img->fmt);
+			fill_fmt = to_native_fmt(cont, dst_img->fmt);
 			if (dst_img->fmt == B2R2_BLT_FMT_32_BIT_ABGR8888) {
 				/*
 				 * Color is read from a register,
@@ -606,7 +615,7 @@ static void setup_fill_input_stage(const struct b2r2_blt_request *req,
 				 */
 				fill_fmt = B2R2_NATIVE_AYCBCR8888;
 			} else {
-				fill_fmt = to_native_fmt(dst_img->fmt);
+				fill_fmt = to_native_fmt(cont, dst_img->fmt);
 			}
 
 			switch (dst_img->fmt) {
@@ -704,7 +713,7 @@ static void setup_fill_input_stage(const struct b2r2_blt_request *req,
 	node->node.GROUP4.B2R2_STY =
 		(0 << B2R2_TY_BITMAP_PITCH_SHIFT) |
 		fill_fmt |
-		get_alpha_range(dst_img->fmt) |
+		get_alpha_range(cont, dst_img->fmt) |
 		B2R2_TY_HSO_LEFT_TO_RIGHT |
 		B2R2_TY_VSO_TOP_TO_BOTTOM;
 
@@ -714,7 +723,7 @@ static void setup_fill_input_stage(const struct b2r2_blt_request *req,
 	node->node.GROUP2.B2R2_S2CF = src_color;
 
 	node->node.GROUP0.B2R2_ACK |= B2R2_ACK_MODE_BYPASS_S2_S3;
-	b2r2_log_info("%s DONE\n", __func__);
+	b2r2_log_info(cont->dev, "%s DONE\n", __func__);
 }
 
 static void setup_input_stage(const struct b2r2_blt_request *req,
@@ -756,23 +765,25 @@ static void setup_input_stage(const struct b2r2_blt_request *req,
 	bool use_h_filter = false;
 	bool use_v_filter = false;
 
-	b2r2_log_info("%s ENTRY\n", __func__);
+	struct b2r2_control *cont = req->instance->control;
+
+	b2r2_log_info(cont->dev, "%s ENTRY\n", __func__);
 
 	if (((B2R2_BLT_FLAG_SOURCE_FILL | B2R2_BLT_FLAG_SOURCE_FILL_RAW) &
 			req->user_req.flags) != 0) {
 		setup_fill_input_stage(req, node, out_buf);
-		b2r2_log_info("%s DONE\n", __func__);
+		b2r2_log_info(cont->dev, "%s DONE\n", __func__);
 		return;
 	}
 
 	if (src_img->pitch == 0) {
 		/* Determine pitch based on format and width of the image. */
-		src_pitch = get_pitch(src_img->fmt, src_img->width);
+		src_pitch = get_pitch(cont, src_img->fmt, src_img->width);
 	} else {
 		src_pitch = src_img->pitch;
 	}
 
-	b2r2_log_info("%s transform=%#010x\n",
+	b2r2_log_info(cont->dev, "%s transform=%#010x\n",
 			__func__, req->user_req.transform);
 	if (req->user_req.transform & B2R2_BLT_TRANSFORM_CCW_ROT_90) {
 		h_scf = (src_rect->width << 10) / dst_rect->height;
@@ -798,7 +809,7 @@ static void setup_input_stage(const struct b2r2_blt_request *req,
 
 	/* Configure horizontal rescale */
 	if (h_scf != (1 << 10)) {
-		b2r2_log_info("%s: Scaling horizontally by 0x%.8x"
+		b2r2_log_info(cont->dev, "%s: Scaling horizontally by 0x%.8x"
 			"\ns(%d, %d)->d(%d, %d)\n", __func__,
 			h_scf, src_rect->width, src_rect->height,
 			dst_rect->width, dst_rect->height);
@@ -810,7 +821,7 @@ static void setup_input_stage(const struct b2r2_blt_request *req,
 
 	/* Configure vertical rescale */
 	if (v_scf != (1 << 10)) {
-		b2r2_log_info("%s: Scaling vertically by 0x%.8x"
+		b2r2_log_info(cont->dev, "%s: Scaling vertically by 0x%.8x"
 			"\ns(%d, %d)->d(%d, %d)\n", __func__,
 			v_scf, src_rect->width, src_rect->height,
 			dst_rect->width, dst_rect->height);
@@ -1095,7 +1106,8 @@ static void setup_input_stage(const struct b2r2_blt_request *req,
 		bool swapped_chroma =
 			src_img->fmt == B2R2_BLT_FMT_YVU420_PACKED_PLANAR ||
 			src_img->fmt == B2R2_BLT_FMT_YVU422_PACKED_PLANAR;
-		enum b2r2_native_fmt src_fmt = to_native_fmt(src_img->fmt);
+		enum b2r2_native_fmt src_fmt =
+			to_native_fmt(cont, src_img->fmt);
 
 		if (swapped_chroma)
 			cr_addr = req->src_resolved.physical_address +
@@ -1173,7 +1185,8 @@ static void setup_input_stage(const struct b2r2_blt_request *req,
 			src_pitch * src_img->height;
 		u32 chroma_pitch = src_pitch;
 
-		enum b2r2_native_fmt src_fmt = to_native_fmt(src_img->fmt);
+		enum b2r2_native_fmt src_fmt =
+			to_native_fmt(cont, src_img->fmt);
 
 		node->node.GROUP4.B2R2_SBA = chroma_addr;
 		node->node.GROUP4.B2R2_STY =
@@ -1199,8 +1212,8 @@ static void setup_input_stage(const struct b2r2_blt_request *req,
 		node->node.GROUP4.B2R2_SBA = req->src_resolved.physical_address;
 		node->node.GROUP4.B2R2_STY =
 			(src_pitch << B2R2_TY_BITMAP_PITCH_SHIFT) |
-			to_native_fmt(src_img->fmt) |
-			get_alpha_range(src_img->fmt) |
+			to_native_fmt(cont, src_img->fmt) |
+			get_alpha_range(cont, src_img->fmt) |
 			B2R2_TY_HSO_LEFT_TO_RIGHT |
 			B2R2_TY_VSO_TOP_TO_BOTTOM |
 			endianness;
@@ -1220,7 +1233,7 @@ static void setup_input_stage(const struct b2r2_blt_request *req,
 
 	node->node.GROUP0.B2R2_ACK |= B2R2_ACK_MODE_BYPASS_S2_S3;
 
-	b2r2_log_info("%s DONE\n", __func__);
+	b2r2_log_info(cont->dev, "%s DONE\n", __func__);
 }
 
 static void setup_transform_stage(const struct b2r2_blt_request *req,
@@ -1231,8 +1244,11 @@ static void setup_transform_stage(const struct b2r2_blt_request *req,
 	/* vertical scan order for out_buf */
 	enum b2r2_ty dst_vso = B2R2_TY_VSO_TOP_TO_BOTTOM;
 	enum b2r2_blt_transform transform = req->user_req.transform;
+#ifdef CONFIG_B2R2_DEBUG
+	struct b2r2_control *cont = req->instance->control;
+#endif
 
-	b2r2_log_info("%s ENTRY\n", __func__);
+	b2r2_log_info(cont->dev, "%s ENTRY\n", __func__);
 
 	if (transform & B2R2_BLT_TRANSFORM_CCW_ROT_90) {
 		/*
@@ -1265,7 +1281,7 @@ static void setup_transform_stage(const struct b2r2_blt_request *req,
 	node->node.GROUP0.B2R2_CIC |= B2R2_CIC_SOURCE_2;
 	node->node.GROUP0.B2R2_ACK |= B2R2_ACK_MODE_BYPASS_S2_S3;
 
-	b2r2_log_info("%s DONE\n", __func__);
+	b2r2_log_info(cont->dev, "%s DONE\n", __func__);
 }
 
 /*
@@ -1299,14 +1315,16 @@ static void setup_dst_read_stage(const struct b2r2_blt_request *req,
 		dst_img->fmt == B2R2_BLT_FMT_YUV444_PACKED_PLANAR;
 
 	u32 dst_pitch = 0;
+	struct b2r2_control *cont = req->instance->control;
+
 	if (dst_img->pitch == 0) {
 		/* Determine pitch based on format and width of the image. */
-		dst_pitch = get_pitch(dst_img->fmt, dst_img->width);
+		dst_pitch = get_pitch(cont, dst_img->fmt, dst_img->width);
 	} else {
 		dst_pitch = dst_img->pitch;
 	}
 
-	b2r2_log_info("%s ENTRY\n", __func__);
+	b2r2_log_info(cont->dev, "%s ENTRY\n", __func__);
 
 	/* Adjustments that depend on the destination format */
 	switch (dst_img->fmt) {
@@ -1497,7 +1515,7 @@ static void setup_dst_read_stage(const struct b2r2_blt_request *req,
 			dst_img->fmt == B2R2_BLT_FMT_YVU420_PACKED_PLANAR ||
 			dst_img->fmt == B2R2_BLT_FMT_YVU422_PACKED_PLANAR;
 		enum b2r2_native_fmt dst_native_fmt =
-				to_native_fmt(dst_img->fmt);
+				to_native_fmt(cont, dst_img->fmt);
 
 		if (swapped_chroma)
 			cr_addr = req->dst_resolved.physical_address +
@@ -1573,7 +1591,7 @@ static void setup_dst_read_stage(const struct b2r2_blt_request *req,
 		u32 chroma_pitch = dst_pitch;
 
 		enum b2r2_native_fmt dst_native_fmt =
-				to_native_fmt(dst_img->fmt);
+				to_native_fmt(cont, dst_img->fmt);
 
 		node->node.GROUP4.B2R2_SBA = chroma_addr;
 		node->node.GROUP4.B2R2_STY =
@@ -1599,8 +1617,8 @@ static void setup_dst_read_stage(const struct b2r2_blt_request *req,
 		node->node.GROUP4.B2R2_SBA = req->dst_resolved.physical_address;
 		node->node.GROUP4.B2R2_STY =
 			(dst_pitch << B2R2_TY_BITMAP_PITCH_SHIFT) |
-			to_native_fmt(dst_img->fmt) |
-			get_alpha_range(dst_img->fmt) |
+			to_native_fmt(cont, dst_img->fmt) |
+			get_alpha_range(cont, dst_img->fmt) |
 			B2R2_TY_HSO_LEFT_TO_RIGHT |
 			B2R2_TY_VSO_TOP_TO_BOTTOM |
 			endianness;
@@ -1612,7 +1630,7 @@ static void setup_dst_read_stage(const struct b2r2_blt_request *req,
 
 	node->node.GROUP0.B2R2_ACK |= B2R2_ACK_MODE_BYPASS_S2_S3;
 
-	b2r2_log_info("%s DONE\n", __func__);
+	b2r2_log_info(cont->dev, "%s DONE\n", __func__);
 }
 
 static void setup_blend_stage(const struct b2r2_blt_request *req,
@@ -1621,7 +1639,11 @@ static void setup_blend_stage(const struct b2r2_blt_request *req,
 			      struct b2r2_work_buf *fg_buf)
 {
 	u32 global_alpha = req->user_req.global_alpha;
-	b2r2_log_info("%s ENTRY\n", __func__);
+#ifdef CONFIG_B2R2_DEBUG
+	struct b2r2_control *cont = req->instance->control;
+#endif
+
+	b2r2_log_info(cont->dev, "%s ENTRY\n", __func__);
 
 	node->node.GROUP0.B2R2_ACK = 0;
 
@@ -1723,7 +1745,7 @@ static void setup_blend_stage(const struct b2r2_blt_request *req,
 			B2R2_TY_VSO_TOP_TO_BOTTOM;
 	}
 
-	b2r2_log_info("%s DONE\n", __func__);
+	b2r2_log_info(cont->dev, "%s DONE\n", __func__);
 }
 
 static void setup_writeback_stage(const struct b2r2_blt_request *req,
@@ -1758,11 +1780,13 @@ static void setup_writeback_stage(const struct b2r2_blt_request *req,
 	u32 dst_pitch = 0;
 	u32 endianness = 0;
 
-	b2r2_log_info("%s ENTRY\n", __func__);
+	struct b2r2_control *cont = req->instance->control;
+
+	b2r2_log_info(cont->dev, "%s ENTRY\n", __func__);
 
 	if (dst_img->pitch == 0) {
 		/* Determine pitch based on format and width of the image. */
-		dst_pitch = get_pitch(dst_img->fmt, dst_img->width);
+		dst_pitch = get_pitch(cont, dst_img->fmt, dst_img->width);
 	} else
 		dst_pitch = dst_img->pitch;
 
@@ -1793,8 +1817,8 @@ static void setup_writeback_stage(const struct b2r2_blt_request *req,
 			dst_fmt == B2R2_BLT_FMT_YVU420_PACKED_PLANAR ||
 			dst_fmt == B2R2_BLT_FMT_YVU422_PACKED_PLANAR;
 		enum b2r2_native_fmt dst_native_fmt =
-				to_native_fmt(dst_img->fmt);
-		enum b2r2_ty alpha_range = get_alpha_range(dst_img->fmt);
+				to_native_fmt(cont, dst_img->fmt);
+		enum b2r2_ty alpha_range = get_alpha_range(cont, dst_img->fmt);
 
 		if (swapped_chroma)
 			cr_addr = req->dst_resolved.physical_address +
@@ -1980,8 +2004,8 @@ static void setup_writeback_stage(const struct b2r2_blt_request *req,
 			dst_pitch * dst_img->height;
 		u32 chroma_pitch = dst_pitch;
 		enum b2r2_native_fmt dst_native_fmt =
-				to_native_fmt(dst_img->fmt);
-		enum b2r2_ty alpha_range = get_alpha_range(dst_img->fmt);
+				to_native_fmt(cont, dst_img->fmt);
+		enum b2r2_ty alpha_range = get_alpha_range(cont, dst_img->fmt);
 
 		if (dst_fmt == B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR ||
 			dst_fmt ==
@@ -2154,8 +2178,8 @@ static void setup_writeback_stage(const struct b2r2_blt_request *req,
 		node->node.GROUP1.B2R2_TBA = req->dst_resolved.physical_address;
 		node->node.GROUP1.B2R2_TTY =
 			(dst_pitch << B2R2_TY_BITMAP_PITCH_SHIFT) |
-			to_native_fmt(dst_img->fmt) |
-			get_alpha_range(dst_img->fmt) |
+			to_native_fmt(cont, dst_img->fmt) |
+			get_alpha_range(cont, dst_img->fmt) |
 			B2R2_TY_HSO_LEFT_TO_RIGHT |
 			B2R2_TY_VSO_TOP_TO_BOTTOM |
 			dst_dither |
@@ -2179,7 +2203,7 @@ static void setup_writeback_stage(const struct b2r2_blt_request *req,
 			node->node.GROUP0.B2R2_INS |= B2R2_INS_CKEY_ENABLED;
 			node->node.GROUP0.B2R2_CIC |= B2R2_CIC_COLOR_KEY;
 
-			key_color = to_RGB888(req->user_req.src_color,
+			key_color = to_RGB888(cont, req->user_req.src_color,
 				req->user_req.src_img.fmt);
 			node->node.GROUP12.B2R2_KEY1 = key_color;
 			node->node.GROUP12.B2R2_KEY2 = key_color;
@@ -2195,20 +2219,20 @@ static void setup_writeback_stage(const struct b2r2_blt_request *req,
 	 */
 	node->node.GROUP0.B2R2_NIP = 0;
 
-	b2r2_log_info("%s DONE\n", __func__);
+	b2r2_log_info(cont->dev, "%s DONE\n", __func__);
 }
 
 /*
  * Public functions
  */
-void b2r2_generic_init()
+void b2r2_generic_init(struct b2r2_control *cont)
 {
-	b2r2_filters_init();
+
 }
 
-void b2r2_generic_exit(void)
+void b2r2_generic_exit(struct b2r2_control *cont)
 {
-	b2r2_filters_exit();
+
 }
 
 int b2r2_generic_analyze(const struct b2r2_blt_request *req,
@@ -2230,13 +2254,13 @@ int b2r2_generic_analyze(const struct b2r2_blt_request *req,
 	bool is_src_fill = false;
 	bool yuv_planar_dst;
 	bool yuv_semi_planar_dst;
-
 	struct b2r2_blt_rect src_rect;
 	struct b2r2_blt_rect dst_rect;
+	struct b2r2_control *cont = req->instance->control;
 
 	if (req == NULL || work_buf_width == NULL || work_buf_height == NULL ||
 			work_buf_count == NULL || node_count == NULL) {
-		b2r2_log_warn("%s: Invalid in or out pointers:\n"
+		b2r2_log_warn(cont->dev, "%s: Invalid in or out pointers:\n"
 			"req=0x%p\n"
 			"work_buf_width=0x%p work_buf_height=0x%p "
 			"work_buf_count=0x%p\n"
@@ -2281,7 +2305,8 @@ int b2r2_generic_analyze(const struct b2r2_blt_request *req,
 
 	if ((yuv_planar_dst || yuv_semi_planar_dst) &&
 			(req->user_req.flags & B2R2_BLT_FLAG_SOURCE_FILL_RAW)) {
-		b2r2_log_warn("%s: Invalid combination: source_fill_raw"
+		b2r2_log_warn(cont->dev,
+			"%s: Invalid combination: source_fill_raw"
 			" and multi-buffer destination.\n",
 			__func__);
 		return -EINVAL;
@@ -2289,7 +2314,8 @@ int b2r2_generic_analyze(const struct b2r2_blt_request *req,
 
 	if ((req->user_req.flags & B2R2_BLT_FLAG_SOURCE_COLOR_KEY) != 0 &&
 			(req->user_req.flags & B2R2_BLT_FLAG_DEST_COLOR_KEY)) {
-		b2r2_log_warn("%s: Invalid combination: source and "
+		b2r2_log_warn(cont->dev,
+			"%s: Invalid combination: source and "
 			"destination color keying.\n", __func__);
 		return -EINVAL;
 	}
@@ -2300,7 +2326,7 @@ int b2r2_generic_analyze(const struct b2r2_blt_request *req,
 			(req->user_req.flags &
 			(B2R2_BLT_FLAG_SOURCE_COLOR_KEY |
 			B2R2_BLT_FLAG_DEST_COLOR_KEY))) {
-		b2r2_log_warn("%s: Invalid combination: "
+		b2r2_log_warn(cont->dev, "%s: Invalid combination: "
 			"source_fill and color keying.\n",
 			__func__);
 		return -EINVAL;
@@ -2312,7 +2338,7 @@ int b2r2_generic_analyze(const struct b2r2_blt_request *req,
 			(req->user_req.flags &
 			(B2R2_BLT_FLAG_DEST_COLOR_KEY |
 			B2R2_BLT_FLAG_SOURCE_COLOR_KEY))) {
-		b2r2_log_warn("%s: Invalid combination: "
+		b2r2_log_warn(cont->dev, "%s: Invalid combination: "
 			"blending and color keying.\n",
 			__func__);
 		return -EINVAL;
@@ -2322,8 +2348,8 @@ int b2r2_generic_analyze(const struct b2r2_blt_request *req,
 			(req->user_req.flags &
 			(B2R2_BLT_FLAG_DEST_COLOR_KEY |
 			B2R2_BLT_FLAG_SOURCE_COLOR_KEY))) {
-		b2r2_log_warn("%s: Invalid combination: source mask and "
-			"color keying.\n",
+		b2r2_log_warn(cont->dev, "%s: Invalid combination: source mask"
+				"and color keying.\n",
 			__func__);
 		return -EINVAL;
 	}
@@ -2331,7 +2357,7 @@ int b2r2_generic_analyze(const struct b2r2_blt_request *req,
 	if (req->user_req.flags &
 			(B2R2_BLT_FLAG_DEST_COLOR_KEY |
 			B2R2_BLT_FLAG_SOURCE_MASK)) {
-		b2r2_log_warn("%s: Unsupported: source mask, "
+		b2r2_log_warn(cont->dev, "%s: Unsupported: source mask, "
 			"destination color keying.\n",
 			__func__);
 		return -ENOSYS;
@@ -2355,9 +2381,9 @@ int b2r2_generic_analyze(const struct b2r2_blt_request *req,
 			src_fmt == B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE;
 		if (yuv_src || src_fmt == B2R2_BLT_FMT_1_BIT_A1 ||
 				src_fmt == B2R2_BLT_FMT_8_BIT_A8) {
-			b2r2_log_warn("%s: Unsupported: source color keying "
-					"with YUV or pure alpha formats.\n",
-					__func__);
+			b2r2_log_warn(cont->dev, "%s: Unsupported: source "
+				"color keying with YUV or pure alpha "
+				"formats.\n", __func__);
 			return -ENOSYS;
 		}
 	}
@@ -2369,7 +2395,7 @@ int b2r2_generic_analyze(const struct b2r2_blt_request *req,
 	if (!is_src_fill && (src_rect.x < 0 || src_rect.y < 0 ||
 		src_rect.x + src_rect.width > req->user_req.src_img.width ||
 		src_rect.y + src_rect.height > req->user_req.src_img.height)) {
-		b2r2_log_warn("%s: src_rect outside src_img:\n"
+		b2r2_log_warn(cont->dev, "%s: src_rect outside src_img:\n"
 			"src(x,y,w,h)=(%d, %d, %d, %d) "
 			"src_img(w,h)=(%d, %d).\n",
 			__func__,
@@ -2380,7 +2406,7 @@ int b2r2_generic_analyze(const struct b2r2_blt_request *req,
 	}
 
 	if (!is_src_fill && (src_rect.width <= 0 || src_rect.height <= 0)) {
-		b2r2_log_warn("%s: Invalid source dimensions:\n"
+		b2r2_log_warn(cont->dev, "%s: Invalid source dimensions:\n"
 			"src(w,h)=(%d, %d).\n",
 			__func__,
 			src_rect.width, src_rect.height);
@@ -2388,7 +2414,7 @@ int b2r2_generic_analyze(const struct b2r2_blt_request *req,
 	}
 
 	if (dst_rect.width <= 0 || dst_rect.height <= 0) {
-		b2r2_log_warn("%s: Invalid dest dimensions:\n"
+		b2r2_log_warn(cont->dev, "%s: Invalid dest dimensions:\n"
 			"dst(w,h)=(%d, %d).\n",
 			__func__,
 			dst_rect.width, dst_rect.height);
@@ -2397,18 +2423,18 @@ int b2r2_generic_analyze(const struct b2r2_blt_request *req,
 
 	if ((req->user_req.flags & B2R2_BLT_FLAG_CLUT_COLOR_CORRECTION) &&
 			req->user_req.clut == NULL) {
-		b2r2_log_warn("%s: Invalid request: no table specified "
-			"for CLUT color correction.\n",
+		b2r2_log_warn(cont->dev, "%s: Invalid request: no table "
+				"specified for CLUT color correction.\n",
 			__func__);
 		return -EINVAL;
 	}
 
 	/* Check for invalid image params */
-	if (!is_src_fill && validate_buf(&(req->user_req.src_img),
+	if (!is_src_fill && validate_buf(cont, &(req->user_req.src_img),
 			&(req->src_resolved)))
 		return -EINVAL;
 
-	if (validate_buf(&(req->user_req.dst_img), &(req->dst_resolved)))
+	if (validate_buf(cont, &(req->user_req.dst_img), &(req->dst_resolved)))
 		return -EINVAL;
 
 	if (is_src_fill) {
@@ -2425,9 +2451,8 @@ int b2r2_generic_analyze(const struct b2r2_blt_request *req,
 		*work_buf_height = B2R2_GENERIC_WORK_BUF_HEIGHT;
 		*work_buf_count = n_work_bufs;
 		*node_count = n_nodes;
-		b2r2_log_info("%s DONE buf_w=%d buf_h=%d buf_count=%d "
-			"node_count=%d\n",
-			__func__,
+		b2r2_log_info(cont->dev, "%s DONE buf_w=%d buf_h=%d "
+				"buf_count=%d node_count=%d\n", __func__,
 			*work_buf_width, *work_buf_height,
 			*work_buf_count, *node_count);
 		return 0;
@@ -2447,7 +2472,8 @@ int b2r2_generic_analyze(const struct b2r2_blt_request *req,
 
 	/* Check for degenerate/out_of_range scaling factors. */
 	if (h_scf <= 0 || v_scf <= 0 || h_scf > 0x7C00 || v_scf > 0x7C00) {
-		b2r2_log_warn("%s: Dimensions result in degenerate or "
+		b2r2_log_warn(cont->dev,
+			"%s: Dimensions result in degenerate or "
 			"out of range scaling:\n"
 			"src(w,h)=(%d, %d) "
 			"dst(w,h)=(%d,%d).\n"
@@ -2468,10 +2494,9 @@ int b2r2_generic_analyze(const struct b2r2_blt_request *req,
 	*work_buf_height = B2R2_GENERIC_WORK_BUF_HEIGHT;
 	*work_buf_count = n_work_bufs;
 	*node_count = n_nodes;
-	b2r2_log_info("%s DONE buf_w=%d buf_h=%d buf_count=%d node_count=%d\n",
-		__func__,
-		*work_buf_width, *work_buf_height, *work_buf_count,
-		*node_count);
+	b2r2_log_info(cont->dev, "%s DONE buf_w=%d buf_h=%d buf_count=%d "
+		"node_count=%d\n", __func__, *work_buf_width,
+		*work_buf_height, *work_buf_count, *node_count);
 	return 0;
 }
 
@@ -2487,6 +2512,7 @@ int b2r2_generic_configure(const struct b2r2_blt_request *req,
 	struct b2r2_work_buf *in_buf = NULL;
 	struct b2r2_work_buf *out_buf = NULL;
 	struct b2r2_work_buf *empty_buf = NULL;
+	struct b2r2_control *cont = req->instance->control;
 
 #ifdef B2R2_GENERIC_DEBUG
 	u32 needed_bufs = 0;
@@ -2498,7 +2524,8 @@ int b2r2_generic_configure(const struct b2r2_blt_request *req,
 					       &work_buf_height, &needed_bufs,
 					       &needed_nodes);
 	if (invalid_req < 0) {
-		b2r2_log_warn("%s: Invalid request supplied, ec=%d\n",
+		b2r2_log_warn(cont->dev,
+			"%s: Invalid request supplied, ec=%d\n",
 			__func__, invalid_req);
 		return -EINVAL;
 	}
@@ -2510,20 +2537,20 @@ int b2r2_generic_configure(const struct b2r2_blt_request *req,
 		node = node->next;
 	}
 	if (n_nodes < needed_nodes) {
-		b2r2_log_warn("%s: Not enough nodes %d < %d.\n",
+		b2r2_log_warn(cont->dev, "%s: Not enough nodes %d < %d.\n",
 			      __func__, n_nodes, needed_nodes);
 		return -EINVAL;
 	}
 
 	if (buf_count < needed_bufs) {
-		b2r2_log_warn("%s: Not enough buffers %d < %d.\n",
+		b2r2_log_warn(cont->dev, "%s: Not enough buffers %d < %d.\n",
 			      __func__, buf_count, needed_bufs);
 		return -EINVAL;
 	}
 
 #endif
 
-	reset_nodes(first);
+	reset_nodes(cont, first);
 	node = first;
 	empty_buf = tmp_bufs;
 	out_buf = empty_buf;
@@ -2611,8 +2638,9 @@ void b2r2_generic_set_areas(const struct b2r2_blt_request *req,
 	/* Dst coords inside the dst_rect, not the buffer */
 	s32 dst_x = dst_rect_area->x;
 	s32 dst_y = dst_rect_area->y;
+	struct b2r2_control *cont = req->instance->control;
 
-	b2r2_log_info("%s ENTRY\n", __func__);
+	b2r2_log_info(cont->dev, "%s ENTRY\n", __func__);
 
 	if (req->user_req.transform & B2R2_BLT_TRANSFORM_CCW_ROT_90) {
 		h_scf = (src_rect->width << 10) / dst_rect->height;
@@ -2907,8 +2935,8 @@ void b2r2_generic_set_areas(const struct b2r2_blt_request *req,
 
 	if (B2R2_GENERIC_DEBUG_AREAS && dst_rect_area->x == 0 &&
 			dst_rect_area->y == 0) {
-		dump_nodes(node, false);
-		b2r2_log_debug("%s Input node done.\n", __func__);
+		dump_nodes(cont, node, false);
+		b2r2_log_debug(cont->dev, "%s Input node done.\n", __func__);
 	}
 
 	/* Transform */
@@ -2945,8 +2973,9 @@ void b2r2_generic_set_areas(const struct b2r2_blt_request *req,
 
 		if (B2R2_GENERIC_DEBUG_AREAS && dst_rect_area->x == 0 &&
 				dst_rect_area->y == 0) {
-			dump_nodes(node, false);
-			b2r2_log_debug("%s Tranform node done.\n", __func__);
+			dump_nodes(cont, node, false);
+			b2r2_log_debug(cont->dev,
+				"%s Tranform node done.\n", __func__);
 		}
 	}
 
@@ -2962,8 +2991,9 @@ void b2r2_generic_set_areas(const struct b2r2_blt_request *req,
 		 */
 		if (B2R2_GENERIC_DEBUG_AREAS && dst_rect_area->x == 0 &&
 				dst_rect_area->y == 0) {
-			dump_nodes(node, false);
-			b2r2_log_debug("%s Source mask node done.\n", __func__);
+			dump_nodes(cont, node, false);
+			b2r2_log_debug(cont->dev,
+				"%s Source mask node done.\n", __func__);
 		}
 	}
 
@@ -3079,8 +3109,8 @@ void b2r2_generic_set_areas(const struct b2r2_blt_request *req,
 
 	if (B2R2_GENERIC_DEBUG_AREAS && dst_rect_area->x == 0 &&
 			dst_rect_area->y == 0) {
-		dump_nodes(node, false);
-		b2r2_log_debug("%s dst_read node done.\n", __func__);
+		dump_nodes(cont, node, false);
+		b2r2_log_debug(cont->dev, "%s dst_read node done.\n", __func__);
 	}
 
 	/* blend */
@@ -3102,8 +3132,8 @@ void b2r2_generic_set_areas(const struct b2r2_blt_request *req,
 
 	if (B2R2_GENERIC_DEBUG_AREAS && dst_rect_area->x == 0 &&
 			dst_rect_area->y == 0) {
-		dump_nodes(node, false);
-		b2r2_log_debug("%s Blend node done.\n", __func__);
+		dump_nodes(cont, node, false);
+		b2r2_log_debug(cont->dev, "%s Blend node done.\n", __func__);
 	}
 
 	/* writeback */
@@ -3177,9 +3207,9 @@ void b2r2_generic_set_areas(const struct b2r2_blt_request *req,
 
 		if (B2R2_GENERIC_DEBUG_AREAS && dst_rect_area->x == 0 &&
 				dst_rect_area->y == 0) {
-			dump_nodes(node, false);
-			b2r2_log_debug("%s Writeback luma node done.\n",
-				__func__);
+			dump_nodes(cont, node, false);
+			b2r2_log_debug(cont->dev,
+				"%s Writeback luma node done.\n", __func__);
 		}
 
 		node = node->next;
@@ -3268,9 +3298,9 @@ void b2r2_generic_set_areas(const struct b2r2_blt_request *req,
 
 			if (B2R2_GENERIC_DEBUG_AREAS && dst_rect_area->x == 0 &&
 					dst_rect_area->y == 0) {
-				dump_nodes(node, false);
-				b2r2_log_debug("%s Writeback chroma node "
-					"%d of %d done.\n",
+				dump_nodes(cont, node, false);
+				b2r2_log_debug(cont->dev, "%s Writeback chroma "
+						"node %d of %d done.\n",
 					__func__, i + 1, n_nodes);
 			}
 
@@ -3294,10 +3324,11 @@ void b2r2_generic_set_areas(const struct b2r2_blt_request *req,
 
 		if (B2R2_GENERIC_DEBUG_AREAS && dst_rect_area->x == 0 &&
 				dst_rect_area->y == 0) {
-			dump_nodes(node, false);
-			b2r2_log_debug("%s Writeback node done.\n", __func__);
+			dump_nodes(cont, node, false);
+			b2r2_log_debug(cont->dev, "%s Writeback node done.\n",
+					__func__);
 		}
 	}
 
-	b2r2_log_info("%s DONE\n", __func__);
+	b2r2_log_info(cont->dev, "%s DONE\n", __func__);
 }
diff --git a/drivers/video/b2r2/b2r2_generic.h b/drivers/video/b2r2/b2r2_generic.h
index 35451543c5c..3b22f654deb 100644
--- a/drivers/video/b2r2/b2r2_generic.h
+++ b/drivers/video/b2r2/b2r2_generic.h
@@ -20,12 +20,12 @@
 /**
  * b2r2_generic_init()
  */
-void b2r2_generic_init(void);
+void b2r2_generic_init(struct b2r2_control *cont);
 
 /**
  * b2r2_generic_exit()
  */
-void b2r2_generic_exit(void);
+void b2r2_generic_exit(struct b2r2_control *cont);
 
 /**
  * b2r2_generic_analyze()
diff --git a/drivers/video/b2r2/b2r2_input_validation.c b/drivers/video/b2r2/b2r2_input_validation.c
index 602041c9294..ac8b5728847 100644
--- a/drivers/video/b2r2/b2r2_input_validation.c
+++ b/drivers/video/b2r2/b2r2_input_validation.c
@@ -19,8 +19,8 @@
  */
 
 
+#include "b2r2_internal.h"
 #include "b2r2_input_validation.h"
-
 #include "b2r2_debug.h"
 #include "b2r2_utils.h"
 
@@ -32,16 +32,18 @@
 static bool is_valid_format(enum b2r2_blt_fmt fmt);
 static bool is_valid_bg_format(enum b2r2_blt_fmt fmt);
 
-static bool is_valid_pitch_for_fmt(u32 pitch, s32 width,
-		enum b2r2_blt_fmt fmt);
+static bool is_valid_pitch_for_fmt(struct b2r2_control *cont,
+		u32 pitch, s32 width, enum b2r2_blt_fmt fmt);
 
 static bool is_aligned_width_for_fmt(s32 width, enum b2r2_blt_fmt fmt);
 static s32 width_2_complete_width(s32 width, enum b2r2_blt_fmt fmt);
 static bool is_complete_width_for_fmt(s32 width, enum b2r2_blt_fmt fmt);
 static bool is_valid_height_for_fmt(s32 height, enum b2r2_blt_fmt fmt);
 
-static bool validate_img(struct b2r2_blt_img *img);
-static bool validate_rect(struct b2r2_blt_rect *rect);
+static bool validate_img(struct b2r2_control *cont,
+		struct b2r2_blt_img *img);
+static bool validate_rect(struct b2r2_control *cont,
+		struct b2r2_blt_rect *rect);
 
 
 static bool is_valid_format(enum b2r2_blt_fmt fmt)
@@ -101,15 +103,16 @@ static bool is_valid_bg_format(enum b2r2_blt_fmt fmt)
 }
 
 
-static bool is_valid_pitch_for_fmt(u32 pitch, s32 width, enum b2r2_blt_fmt fmt)
+static bool is_valid_pitch_for_fmt(struct b2r2_control *cont,
+		u32 pitch, s32 width, enum b2r2_blt_fmt fmt)
 {
 	s32 complete_width;
 	u32 pitch_derived_from_width;
 
 	complete_width =  width_2_complete_width(width, fmt);
 
-	pitch_derived_from_width =
-			b2r2_calc_pitch_from_width(complete_width, fmt);
+	pitch_derived_from_width = b2r2_calc_pitch_from_width(cont,
+			complete_width, fmt);
 
 	if (pitch < pitch_derived_from_width)
 		return false;
@@ -260,7 +263,8 @@ static bool is_valid_height_for_fmt(s32 height, enum b2r2_blt_fmt fmt)
 	return true;
 }
 
-static bool validate_img(struct b2r2_blt_img *img)
+static bool validate_img(struct b2r2_control *cont,
+		struct b2r2_blt_img *img)
 {
 	/*
 	 * So that we always can do width * height * bpp without overflowing a
@@ -272,13 +276,14 @@ static bool validate_img(struct b2r2_blt_img *img)
 	s32 img_size;
 
 	if (!is_valid_format(img->fmt)) {
-		b2r2_log_info("Validation Error: !is_valid_format(img->fmt)\n");
+		b2r2_log_info(cont->dev, "Validation Error: "
+				"!is_valid_format(img->fmt)\n");
 		return false;
 	}
 
 	if (img->width < 0 || img->width > max_img_width_height ||
 		img->height < 0 || img->height > max_img_width_height) {
-		b2r2_log_info("Validation Error: "
+		b2r2_log_info(cont->dev, "Validation Error: "
 				"img->width < 0 || "
 				"img->width > max_img_width_height || "
 				"img->height < 0 || "
@@ -288,7 +293,7 @@ static bool validate_img(struct b2r2_blt_img *img)
 
 	if (b2r2_is_mb_fmt(img->fmt)) {
 		if (!is_complete_width_for_fmt(img->width, img->fmt)) {
-			b2r2_log_info("Validation Error: "
+			b2r2_log_info(cont->dev, "Validation Error: "
 					"!is_complete_width_for_fmt(img->width,"
 					" img->fmt)\n");
 			return false;
@@ -297,7 +302,8 @@ static bool validate_img(struct b2r2_blt_img *img)
 		if (0 == img->pitch &&
 			(!is_aligned_width_for_fmt(img->width, img->fmt) ||
 			!is_complete_width_for_fmt(img->width, img->fmt))) {
-			b2r2_log_info("Validation Error: "
+			b2r2_log_info(cont->dev,
+					"Validation Error: "
 					"0 == img->pitch && "
 					"(!is_aligned_width_for_fmt(img->width,"
 					" img->fmt) || "
@@ -307,24 +313,24 @@ static bool validate_img(struct b2r2_blt_img *img)
 		}
 
 		if (img->pitch != 0 &&
-			!is_valid_pitch_for_fmt(img->pitch, img->width,
-					img->fmt)) {
-			b2r2_log_info("Validation Error: "
-					"img->pitch != 0 && "
-					"!is_valid_pitch_for_fmt(img->pitch, "
-					"img->width, img->fmt)\n");
+			!is_valid_pitch_for_fmt(cont, img->pitch, img->width,
+				img->fmt)) {
+			b2r2_log_info(cont->dev,
+				"Validation Error: "
+				"img->pitch != 0 && "
+				"!is_valid_pitch_for_fmt(cont, "
+				"img->pitch, img->width, img->fmt)\n");
 			return false;
 		}
 	}
 
 	if (!is_valid_height_for_fmt(img->width, img->fmt)) {
-		b2r2_log_info("Validation Error: "
-				"!is_valid_height_for_fmt(img->width, "
-				"img->fmt)\n");
+		b2r2_log_info(cont->dev, "Validation Error: "
+				"!is_valid_height_for_fmt(img->width, img->fmt)\n");
 		return false;
 	}
 
-	img_size = b2r2_get_img_size(img);
+	img_size = b2r2_get_img_size(cont, img);
 
 	/*
 	 * To keep the entire image inside s32 range.
@@ -332,7 +338,7 @@ static bool validate_img(struct b2r2_blt_img *img)
 	if ((B2R2_BLT_PTR_HWMEM_BUF_NAME_OFFSET == img->buf.type ||
 				B2R2_BLT_PTR_FD_OFFSET == img->buf.type) &&
 			img->buf.offset > (u32)b2r2_s32_max - (u32)img_size) {
-		b2r2_log_info("Validation Error: "
+		b2r2_log_info(cont->dev, "Validation Error: "
 				"(B2R2_BLT_PTR_HWMEM_BUF_NAME_OFFSET == "
 				"img->buf.type || B2R2_BLT_PTR_FD_OFFSET == "
 				"img->buf.type) && img->buf.offset > "
@@ -343,10 +349,11 @@ static bool validate_img(struct b2r2_blt_img *img)
 	return true;
 }
 
-static bool validate_rect(struct b2r2_blt_rect *rect)
+static bool validate_rect(struct b2r2_control *cont,
+		struct b2r2_blt_rect *rect)
 {
 	if (rect->width < 0 || rect->height < 0) {
-		b2r2_log_info("Validation Error: "
+		b2r2_log_info(cont->dev, "Validation Error: "
 				"rect->width < 0 || rect->height < 0\n");
 		return false;
 	}
@@ -354,7 +361,8 @@ static bool validate_rect(struct b2r2_blt_rect *rect)
 	return true;
 }
 
-bool b2r2_validate_user_req(struct b2r2_blt_req *req)
+bool b2r2_validate_user_req(struct b2r2_control *cont,
+		struct b2r2_blt_req *req)
 {
 	bool is_src_img_used;
 	bool is_bg_img_used;
@@ -362,43 +370,43 @@ bool b2r2_validate_user_req(struct b2r2_blt_req *req)
 	bool is_dst_clip_rect_used;
 
 	if (req->size != sizeof(struct b2r2_blt_req)) {
-		b2r2_log_err("Validation Error: "
+		b2r2_log_err(cont->dev, "Validation Error: "
 				"req->size != sizeof(struct b2r2_blt_req)\n");
 		return false;
 	}
 
 	is_src_img_used = !(req->flags & B2R2_BLT_FLAG_SOURCE_FILL ||
-				req->flags & B2R2_BLT_FLAG_SOURCE_FILL_RAW);
+		req->flags & B2R2_BLT_FLAG_SOURCE_FILL_RAW);
 	is_bg_img_used = (req->flags & B2R2_BLT_FLAG_BG_BLEND);
 	is_src_mask_used = req->flags & B2R2_BLT_FLAG_SOURCE_MASK;
 	is_dst_clip_rect_used = req->flags & B2R2_BLT_FLAG_DESTINATION_CLIP;
 
 	if (is_src_img_used || is_src_mask_used) {
-		if (!validate_rect(&req->src_rect)) {
-			b2r2_log_info("Validation Error: "
-					"!validate_rect(&req->src_rect)\n");
+		if (!validate_rect(cont, &req->src_rect)) {
+			b2r2_log_info(cont->dev, "Validation Error: "
+				"!validate_rect(cont, &req->src_rect)\n");
 			return false;
 		}
 	}
 
-	if (!validate_rect(&req->dst_rect)) {
-		b2r2_log_info("Validation Error: "
-				"!validate_rect(&req->dst_rect)\n");
+	if (!validate_rect(cont, &req->dst_rect)) {
+		b2r2_log_info(cont->dev, "Validation Error: "
+			"!validate_rect(cont, &req->dst_rect)\n");
 		return false;
 	}
 
 	if (is_bg_img_used)	{
-		if (!validate_rect(&req->bg_rect)) {
-			b2r2_log_info("Validation Error: "
-					"!validate_rect(&req->bg_rect)\n");
+		if (!validate_rect(cont, &req->bg_rect)) {
+			b2r2_log_info(cont->dev, "Validation Error: "
+				"!validate_rect(cont, &req->bg_rect)\n");
 			return false;
 		}
 	}
 
 	if (is_dst_clip_rect_used) {
-		if (!validate_rect(&req->dst_clip_rect)) {
-			b2r2_log_info("Validation Error: "
-				"!validate_rect(&req->dst_clip_rect)\n");
+		if (!validate_rect(cont, &req->dst_clip_rect)) {
+			b2r2_log_info(cont->dev, "Validation Error: "
+				"!validate_rect(cont, &req->dst_clip_rect)\n");
 			return false;
 		}
 	}
@@ -406,17 +414,17 @@ bool b2r2_validate_user_req(struct b2r2_blt_req *req)
 	if (is_src_img_used) {
 		struct b2r2_blt_rect src_img_bounding_rect;
 
-		if (!validate_img(&req->src_img)) {
-			b2r2_log_info("Validation Error: "
-					"!validate_img(&req->src_img)\n");
+		if (!validate_img(cont, &req->src_img)) {
+			b2r2_log_info(cont->dev, "Validation Error: "
+					"!validate_img(cont, &req->src_img)\n");
 			return false;
 		}
 
 		b2r2_get_img_bounding_rect(&req->src_img,
 				&src_img_bounding_rect);
 		if (!b2r2_is_rect_inside_rect(&req->src_rect,
-					&src_img_bounding_rect)) {
-			b2r2_log_info("Validation Error: "
+				&src_img_bounding_rect)) {
+			b2r2_log_info(cont->dev, "Validation Error: "
 				"!b2r2_is_rect_inside_rect(&req->src_rect, "
 				"&src_img_bounding_rect)\n");
 			return false;
@@ -426,23 +434,23 @@ bool b2r2_validate_user_req(struct b2r2_blt_req *req)
 	if (is_bg_img_used) {
 		struct b2r2_blt_rect bg_img_bounding_rect;
 
-		if (!validate_img(&req->bg_img)) {
-			b2r2_log_info("Validation Error: "
-					"!validate_img(&req->bg_img)\n");
+		if (!validate_img(cont, &req->bg_img)) {
+			b2r2_log_info(cont->dev, "Validation Error: "
+				"!validate_img(cont, &req->bg_img)\n");
 			return false;
 		}
 
 		if (!is_valid_bg_format(req->bg_img.fmt)) {
-			b2r2_log_info("Validation Error: "
-					"!is_valid_bg_format(req->bg_img->fmt)\n");
+			b2r2_log_info(cont->dev, "Validation Error: "
+				"!is_valid_bg_format(req->bg_img->fmt)\n");
 			return false;
 		}
 
 		b2r2_get_img_bounding_rect(&req->bg_img,
-				&bg_img_bounding_rect);
+			&bg_img_bounding_rect);
 		if (!b2r2_is_rect_inside_rect(&req->bg_rect,
-					&bg_img_bounding_rect)) {
-			b2r2_log_info("Validation Error: "
+				&bg_img_bounding_rect)) {
+			b2r2_log_info(cont->dev, "Validation Error: "
 				"!b2r2_is_rect_inside_rect(&req->bg_rect, "
 				"&bg_img_bounding_rect)\n");
 			return false;
@@ -452,33 +460,32 @@ bool b2r2_validate_user_req(struct b2r2_blt_req *req)
 	if (is_src_mask_used) {
 		struct b2r2_blt_rect src_mask_bounding_rect;
 
-		if (!validate_img(&req->src_mask)) {
-			b2r2_log_info("Validation Error: "
-					"!validate_img(&req->src_mask)\n");
+		if (!validate_img(cont, &req->src_mask)) {
+			b2r2_log_info(cont->dev, "Validation Error: "
+				"!validate_img(cont, &req->src_mask)\n");
 			return false;
 		}
 
 		b2r2_get_img_bounding_rect(&req->src_mask,
-				&src_mask_bounding_rect);
+			&src_mask_bounding_rect);
 		if (!b2r2_is_rect_inside_rect(&req->src_rect,
 					&src_mask_bounding_rect)) {
-			b2r2_log_info("Validation Error: "
+			b2r2_log_info(cont->dev, "Validation Error: "
 				"!b2r2_is_rect_inside_rect(&req->src_rect, "
-					"&src_mask_bounding_rect)\n");
+				"&src_mask_bounding_rect)\n");
 			return false;
 		}
 	}
 
-	if (!validate_img(&req->dst_img)) {
-		b2r2_log_info("Validation Error: "
-				"!validate_img(&req->dst_img)\n");
+	if (!validate_img(cont, &req->dst_img)) {
+		b2r2_log_info(cont->dev, "Validation Error: "
+			"!validate_img(cont, &req->dst_img)\n");
 		return false;
 	}
 
 	if (is_bg_img_used)	{
-		if (!b2r2_is_rect_gte_rect(&req->bg_rect,
-					&req->dst_rect)) {
-			b2r2_log_info("Validation Error: "
+		if (!b2r2_is_rect_gte_rect(&req->bg_rect, &req->dst_rect)) {
+			b2r2_log_info(cont->dev, "Validation Error: "
 				"!b2r2_is_rect_gte_rect(&req->bg_rect, "
 				"&req->dst_rect)\n");
 			return false;
diff --git a/drivers/video/b2r2/b2r2_input_validation.h b/drivers/video/b2r2/b2r2_input_validation.h
index 9a736343e06..d3c6ae1b296 100644
--- a/drivers/video/b2r2/b2r2_input_validation.h
+++ b/drivers/video/b2r2/b2r2_input_validation.h
@@ -23,6 +23,9 @@
 
 #include <video/b2r2_blt.h>
 
-bool b2r2_validate_user_req(struct b2r2_blt_req *req);
+#include "b2r2_internal.h"
+
+bool b2r2_validate_user_req(struct b2r2_control *cont,
+		struct b2r2_blt_req *req);
 
 #endif
diff --git a/drivers/video/b2r2/b2r2_internal.h b/drivers/video/b2r2/b2r2_internal.h
index 718d1ad40c9..7a46bbda19e 100644
--- a/drivers/video/b2r2/b2r2_internal.h
+++ b/drivers/video/b2r2/b2r2_internal.h
@@ -13,14 +13,18 @@
 #ifndef _LINUX_DRIVERS_VIDEO_B2R2_INTERNAL_H_
 #define _LINUX_DRIVERS_VIDEO_B2R2_INTERNAL_H_
 
-
+#include <linux/device.h>
+#include <linux/miscdevice.h>
 #include <video/b2r2_blt.h>
 
-#include "b2r2_core.h"
 #include "b2r2_global.h"
-
 #include "b2r2_hw.h"
 
+/**
+ * B2R2_MAX_NBR_DEVICES - The maximum number of B2R2s handled
+ */
+#define B2R2_MAX_NBR_DEVICES 1
+
 /* The maximum possible number of temporary buffers needed */
 #define MAX_TMP_BUFS_NEEDED 2
 
@@ -28,12 +32,99 @@
 #define CLUT_SIZE 1024
 
 /**
- * b2r2_blt_device() - Returns the device associated with B2R2 BLT.
- *                     Mainly for debugging with dev_... functions.
+ * b2r2_op_type - the type of B2R2 operation to configure
+ */
+enum b2r2_op_type {
+	B2R2_DIRECT_COPY,
+	B2R2_DIRECT_FILL,
+	B2R2_COPY,
+	B2R2_FILL,
+	B2R2_SCALE,
+	B2R2_ROTATE,
+	B2R2_SCALE_AND_ROTATE,
+	B2R2_FLIP,
+};
+
+/**
+ * b2r2_fmt_type - the type of buffer for a given format
+ */
+enum b2r2_fmt_type {
+	B2R2_FMT_TYPE_RASTER,
+	B2R2_FMT_TYPE_SEMI_PLANAR,
+	B2R2_FMT_TYPE_PLANAR,
+};
+
+/**
+ * b2r2_fmt_conv - the type of format conversion to do
+ */
+enum b2r2_fmt_conv {
+	B2R2_FMT_CONV_NONE,
+	B2R2_FMT_CONV_RGB_TO_YUV,
+	B2R2_FMT_CONV_YUV_TO_RGB,
+	B2R2_FMT_CONV_YUV_TO_YUV,
+	B2R2_FMT_CONV_RGB_TO_BGR,
+	B2R2_FMT_CONV_BGR_TO_RGB,
+	B2R2_FMT_CONV_YUV_TO_BGR,
+	B2R2_FMT_CONV_BGR_TO_YUV,
+};
+
+/**
+ * enum b2r2_core_queue - Indicates the B2R2 queue that the job belongs to
+ *
+ * @B2R2_CORE_QUEUE_AQ1: Application queue 1
+ * @B2R2_CORE_QUEUE_AQ2: Application queue 2
+ * @B2R2_CORE_QUEUE_AQ3: Application queue 3
+ * @B2R2_CORE_QUEUE_AQ4: Application queue 4
+ * @B2R2_CORE_QUEUE_CQ1: Composition queue 1
+ * @B2R2_CORE_QUEUE_CQ2: Composition queue 2
+ * @B2R2_CORE_QUEUE_NO_OF: Number of queues
+ */
+enum b2r2_core_queue {
+	B2R2_CORE_QUEUE_AQ1 = 0,
+	B2R2_CORE_QUEUE_AQ2,
+	B2R2_CORE_QUEUE_AQ3,
+	B2R2_CORE_QUEUE_AQ4,
+	B2R2_CORE_QUEUE_CQ1,
+	B2R2_CORE_QUEUE_CQ2,
+	B2R2_CORE_QUEUE_NO_OF,
+};
+
+#define B2R2_NUM_APPLICATIONS_QUEUES 4
+
+/**
+ * enum b2r2_core_job_state - Indicates the current state of the job
  *
- * Returns the device pointer or NULL
+ * @B2R2_CORE_JOB_IDLE: Never queued
+ * @B2R2_CORE_JOB_QUEUED: In queue but not started yet
+ * @B2R2_CORE_JOB_RUNNING: Running, executed by B2R2
+ * @B2R2_CORE_JOB_DONE: Completed
+ * @B2R2_CORE_JOB_CANCELED: Canceled
  */
-struct device *b2r2_blt_device(void);
+enum b2r2_core_job_state {
+	B2R2_CORE_JOB_IDLE = 0,
+	B2R2_CORE_JOB_QUEUED,
+	B2R2_CORE_JOB_RUNNING,
+	B2R2_CORE_JOB_DONE,
+	B2R2_CORE_JOB_CANCELED,
+};
+
+/**
+ * b2r2_work_buf - specification for a temporary work buffer
+ *
+ * @size      - the size of the buffer (set by b2r2_node_split)
+ * @phys_addr - the physical address of the buffer (set by b2r2_blt_main)
+ */
+struct b2r2_work_buf {
+	u32 size;
+	u32 phys_addr;
+	void *virt_addr;
+	u32 mem_handle;
+};
+
+struct tmp_buf {
+	struct b2r2_work_buf buf;
+	bool in_use;
+};
 
 /**
  * struct b2r2_blt_instance - Represents the B2R2 instance (one per open)
@@ -46,6 +137,7 @@ struct device *b2r2_blt_device(void);
  *                         in callback.
  * @synching: true if any client is waiting for b2r2_blt_synch(0)
  * @synch_done_waitq: Wait queue to handle synching on request_id 0
+ * @control: The b2r2 control entity
  */
 struct b2r2_blt_instance {
 	struct mutex lock;
@@ -58,6 +150,8 @@ struct b2r2_blt_instance {
 	u32 no_of_active_requests;
 	bool synching;
 	wait_queue_head_t synch_done_waitq;
+
+	struct b2r2_control *control;
 };
 
 /**
@@ -111,58 +205,6 @@ struct b2r2_resolved_buf {
 	u32                   file_len;
 };
 
-
-/**
- * b2r2_work_buf - specification for a temporary work buffer
- *
- * @size      - the size of the buffer (set by b2r2_node_split)
- * @phys_addr - the physical address of the buffer (set by b2r2_blt_main)
- */
-struct b2r2_work_buf {
-	u32 size;
-	u32 phys_addr;
-	void *virt_addr;
-	u32 mem_handle;
-};
-
-
-/**
- * b2r2_op_type - the type of B2R2 operation to configure
- */
-enum b2r2_op_type {
-	B2R2_DIRECT_COPY,
-	B2R2_DIRECT_FILL,
-	B2R2_COPY,
-	B2R2_FILL,
-	B2R2_SCALE,
-	B2R2_ROTATE,
-	B2R2_SCALE_AND_ROTATE,
-	B2R2_FLIP,
-};
-
-/**
- * b2r2_fmt_type - the type of buffer for a given format
- */
-enum b2r2_fmt_type {
-	B2R2_FMT_TYPE_RASTER,
-	B2R2_FMT_TYPE_SEMI_PLANAR,
-	B2R2_FMT_TYPE_PLANAR,
-};
-
-/**
- * b2r2_fmt_conv - the type of format conversion to do
- */
-enum b2r2_fmt_conv {
-	B2R2_FMT_CONV_NONE,
-	B2R2_FMT_CONV_RGB_TO_YUV,
-	B2R2_FMT_CONV_YUV_TO_RGB,
-	B2R2_FMT_CONV_YUV_TO_YUV,
-	B2R2_FMT_CONV_RGB_TO_BGR,
-	B2R2_FMT_CONV_BGR_TO_RGB,
-	B2R2_FMT_CONV_YUV_TO_BGR,
-	B2R2_FMT_CONV_BGR_TO_YUV,
-};
-
 /**
  * b2r2_node_split_buf - information about a source or destination buffer
  *
@@ -280,6 +322,89 @@ struct b2r2_node_split_job {
 	u32 max_buf_size;
 };
 
+/**
+ * struct b2r2_core_job - Represents a B2R2 core job
+ *
+ * @start_sentinel: Memory overwrite guard
+ *
+ * @tag: Client value. Used by b2r2_core_job_find_first_with_tag().
+ * @prio: Job priority, from -19 up to 20. Mapped to the
+ *        B2R2 application queues. Filled in by the client.
+ * @first_node_address: Physical address of the first node. Filled
+ *                      in by the client.
+ * @last_node_address: Physical address of the last node. Filled
+ *                     in by the client.
+ *
+ * @callback: Function that will be called when the job is done.
+ * @acquire_resources: Function that allocates the resources needed
+ *                     to execute the job (i.e. SRAM alloc). Must not
+ *                     sleep if atomic, should fail with negative error code
+ *                     if resources not available.
+ * @release_resources: Function that releases the resources previously
+ *                     allocated by acquire_resources (i.e. SRAM alloc).
+ * @release: Function that will be called when the reference count reaches
+ *           zero.
+ *
+ * @job_id: Unique id for this job, assigned by B2R2 core
+ * @job_state: The current state of the job
+ * @jiffies: Number of jiffies needed for this request
+ *
+ * @list: List entry element for internal list management
+ * @event: Wait queue event to wait for job done
+ * @work: Work queue structure, for callback implementation
+ *
+ * @queue: The queue that this job shall be submitted to
+ * @control: B2R2 Queue control
+ * @pace_control: For composition queue only
+ * @interrupt_context: Context for interrupt
+ * @hw_start_time: The point when the b2r2 HW queue is activated for this job
+ * @nsec_active_in_hw: Time spent on the b2r2 HW queue for this job
+ *
+ * @end_sentinel: Memory overwrite guard
+ */
+struct b2r2_core_job {
+	u32 start_sentinel;
+
+	/* Data to be filled in by client */
+	int tag;
+	int prio;
+	u32 first_node_address;
+	u32 last_node_address;
+	void (*callback)(struct b2r2_core_job *);
+	int (*acquire_resources)(struct b2r2_core_job *,
+		bool atomic);
+	void (*release_resources)(struct b2r2_core_job *,
+		bool atomic);
+	void (*release)(struct b2r2_core_job *);
+
+	/* Output data, do not modify */
+	int  job_id;
+	enum b2r2_core_job_state job_state;
+	unsigned long jiffies;
+
+	/* Data below is internal to b2r2_core, do not modify */
+
+	/* Reference counting */
+	u32 ref_count;
+
+	/* Internal data */
+	struct list_head  list;
+	wait_queue_head_t event;
+	struct work_struct work;
+
+	/* B2R2 HW data */
+	enum b2r2_core_queue queue;
+	u32 control;
+	u32 pace_control;
+	u32 interrupt_context;
+
+	/* Timing data */
+	u32 hw_start_time;
+	s32 nsec_active_in_hw;
+
+	u32 end_sentinel;
+};
+
 /**
  * struct b2r2_blt_request - Represents one B2R2 blit request
  *
@@ -330,6 +455,105 @@ struct b2r2_blt_request {
 	s32 total_time_nsec;
 };
 
+/**
+ * struct b2r2_mem_heap - The memory heap
+ *
+ * @start_phys_addr: Physical memory start address
+ * @start_virt_ptr: Virtual pointer to start
+ * @size: Memory size
+ * @align: Alignment
+ * @blocks: List of all blocks
+ * @heap_lock: Protection for the heap
+ * @node_size: Size of each B2R2 node
+ * @node_heap: Heap for B2R2 node allocations
+ * @debugfs_root_dir: Debugfs B2R2 mem root dir
+ * @debugfs_heap_stats: Debugfs B2R2 memory status
+ * @debugfs_dir_blocks: Debugfs B2R2 free blocks dir
+ */
+struct b2r2_mem_heap {
+	dma_addr_t       start_phys_addr;
+	void             *start_virt_ptr;
+	u32              size;
+	u32              align;
+	struct list_head blocks;
+	spinlock_t       heap_lock;
+	u32              node_size;
+	struct dma_pool *node_heap;
+#ifdef CONFIG_DEBUG_FS
+	struct dentry   *debugfs_root_dir;
+	struct dentry   *debugfs_heap_stats;
+	struct dentry   *debugfs_dir_blocks;
+#endif
+};
+
+/**
+ *
+ * @miscdev: The miscdev presenting b2r2 to the system
+ * @dev: The device handle of the b2r2 instance
+ * @id: The id of the b2r2 instance
+ * @name: The name of the b2r2 instance
+ * @data: Used to store a reference to b2r2_core
+ * @tmp_bufs: Temporary buffers needed in the node splitter
+ * @filters_initialized: Indicating of filters has been
+ *                       initialized for this b2r2 instance
+ * @mem_heap: The b2r2 heap, e.g. used to allocate nodes
+ * @debugfs_latest_request: Copy of the latest request issued
+ * @debugfs_root_dir: The debugfs root directory, e.g. /debugfs/b2r2
+ * @debugfs_debug_root_dir: The b2r2 debug root directory,
+ *                          e.g. /debugfs/b2r2/debug
+ * @stat_lock: Spin lock protecting the statistics
+ * @stat_n_jobs_added: Number of jobs added to b2r2_core
+ * @stat_n_jobs_released: Number of jobs released (job_release called)
+ * @stat_n_jobs_in_report_list: Number of jobs currently in the report list
+ * @stat_n_in_blt: Number of client threads currently exec inside b2r2_blt()
+ * @stat_n_in_blt_synch: Number of client threads currently waiting for synch
+ * @stat_n_in_blt_add: Number of client threads currenlty adding in b2r2_blt
+ * @stat_n_in_blt_wait: Number of client threads currently waiting in b2r2_blt
+ * @stat_n_in_synch_0: Number of client threads currently in b2r2_blt_sync
+ *                     waiting for all client jobs to finish
+ * @stat_n_in_synch_job: Number of client threads currently in b2r2_blt_sync
+ *                       waiting specific job to finish
+ * @stat_n_in_query_cap: Number of clients currently in query cap
+ * @stat_n_in_open: Number of clients currently in b2r2_blt_open
+ * @stat_n_in_release: Number of clients currently in b2r2_blt_release
+ * @last_job_lock: Mutex protecting last_job
+ * @last_job: The last running job on this b2r2 instance
+ * @last_job_chars: Temporary buffer used in printing last_job
+ * @prev_node_count: Node cound of last_job
+ */
+struct b2r2_control {
+	struct miscdevice		miscdev;
+	struct device			*dev;
+	int						id;
+	char					name[16];
+	void					*data;
+	struct tmp_buf			tmp_bufs[MAX_TMP_BUFS_NEEDED];
+	int						filters_initialized;
+	struct b2r2_mem_heap	mem_heap;
+#ifdef CONFIG_DEBUG_FS
+	struct b2r2_blt_request	debugfs_latest_request;
+	struct dentry			*debugfs_root_dir;
+	struct dentry			*debugfs_debug_root_dir;
+#endif
+	struct mutex			stat_lock;
+	unsigned long			stat_n_jobs_added;
+	unsigned long			stat_n_jobs_released;
+	unsigned long			stat_n_jobs_in_report_list;
+	unsigned long			stat_n_in_blt;
+	unsigned long			stat_n_in_blt_synch;
+	unsigned long			stat_n_in_blt_add;
+	unsigned long			stat_n_in_blt_wait;
+	unsigned long			stat_n_in_synch_0;
+	unsigned long			stat_n_in_synch_job;
+	unsigned long			stat_n_in_query_cap;
+	unsigned long			stat_n_in_open;
+	unsigned long			stat_n_in_release;
+	struct mutex			last_job_lock;
+	struct b2r2_node		*last_job;
+	char					*last_job_chars;
+	int						prev_node_count;
+};
+
 /* FIXME: The functions below should be removed when we are
    switching to the new Robert Lind allocator */
 
@@ -341,7 +565,8 @@ struct b2r2_blt_request {
  * Return:
  *   Returns a pointer to the first node in the node list.
  */
-struct b2r2_node *b2r2_blt_alloc_nodes(int node_count);
+struct b2r2_node *b2r2_blt_alloc_nodes(struct b2r2_control *cont,
+		int node_count);
 
 /**
  * b2r2_blt_free_nodes() - Release nodes previously allocated via
@@ -349,16 +574,17 @@ struct b2r2_node *b2r2_blt_alloc_nodes(int node_count);
  *
  * @first_node: First node in linked list of nodes
  */
-void b2r2_blt_free_nodes(struct b2r2_node *first_node);
+void b2r2_blt_free_nodes(struct b2r2_control *cont,
+		struct b2r2_node *first_node);
 
 /**
  * b2r2_blt_module_init() - Initialize the B2R2 blt module
  */
-int b2r2_blt_module_init(void);
+int b2r2_blt_module_init(struct b2r2_control *cont);
 
 /**
  * b2r2_blt_module_exit() - Un-initialize the B2R2 blt module
  */
-void b2r2_blt_module_exit(void);
+void b2r2_blt_module_exit(struct b2r2_control *cont);
 
 #endif
diff --git a/drivers/video/b2r2/b2r2_mem_alloc.c b/drivers/video/b2r2/b2r2_mem_alloc.c
index 0dcd9b6a55e..e5235d2c97f 100644
--- a/drivers/video/b2r2/b2r2_mem_alloc.c
+++ b/drivers/video/b2r2/b2r2_mem_alloc.c
@@ -24,56 +24,12 @@
 #include "b2r2_internal.h"
 #include "b2r2_mem_alloc.h"
 
-
-/* Represents one block of b2r2 physical memory, free or allocated */
-struct b2r2_mem_block {
-	struct list_head list; /* For membership in list */
-
-	u32 offset;        /* Offset in b2r2 physical memory area (aligned) */
-	u32 size;          /* Size of the object (requested size if busy,
-			      else actual) */
-	bool free;         /* True if the block is free */
-
-	u32 lock_count;    /* Lock count */
-
-#ifdef CONFIG_DEBUG_FS
-	char          debugfs_fname[80]; /* debugfs file name */
-	struct dentry *debugfs_block;	 /* debugfs dir entry for the block */
-#endif
-};
-
-/* The memory heap */
-struct b2r2_mem_heap {
-	struct device *dev;        /* Device pointer for memory allocation  */
-	dma_addr_t start_phys_addr;/* Physical memory start address         */
-	void *start_virt_ptr;      /* Virtual pointer to start              */
-	u32 size;                  /* Memory size                           */
-	u32 align;                 /* Alignment                             */
-
-	struct list_head blocks;   /* List of all blocks                    */
-
-	spinlock_t heap_lock;      /* Protection for the heap               */
-
-	u32 node_size;             /* Size of each B2R2 node                */
-	struct dma_pool *node_heap;/* Heap for B2R2 node allocations        */
-
-#ifdef CONFIG_DEBUG_FS
-	struct dentry *debugfs_sub_root_dir; /* debugfs: B2R2 MEM root dir  */
-	struct dentry *debugfs_heap_stats;   /* debugfs: B2R2 memory status */
-	struct dentry *debugfs_dir_blocks;   /* debugfs: Free blocks dir    */
-#endif
-};
-
-static struct b2r2_mem_heap *mem_heap;
-
-#ifdef CONFIG_DEBUG_FS
-static struct dentry *debugfs_root_dir;      /* debugfs: B2R2 MEM root dir */
-#endif
-
 /* Forward declarations */
 static struct b2r2_mem_block *b2r2_mem_block_alloc(
-	u32 offset, u32 size, bool free);
-static void   b2r2_mem_block_free(struct b2r2_mem_block *mem_block);
+		struct b2r2_control *cont, u32 offset, u32 size, bool free);
+static void b2r2_mem_block_free(struct b2r2_mem_block *mem_block);
+static int b2r2_mem_heap_status(struct b2r2_mem_heap *mem_heap,
+		struct b2r2_mem_heap_status *mem_heap_status);
 
 /* Align value down to specified alignment */
 static inline u32 align_down(u32 align, u32 value)
@@ -95,10 +51,10 @@ static inline u32 align_up(u32 align, u32 value)
  *  Mount like this:
  *  mkdir /debug
  *  mount -t debugfs none /debug
- *  ls /debug/b2r2_mem
+ *  ls /debug/b2r2/mem
  *
- *  ls -al /debug/b2r2_mem/blocks
- *  cat /debug/b2r2_mem/stats
+ *  ls -al /debug/b2r2/mem/blocks
+ *  cat /debug/b2r2/mem/stats
  */
 
 
@@ -107,41 +63,41 @@ static char *get_b2r2_mem_stats(struct b2r2_mem_heap *mem_heap, char *buf)
 {
 	struct b2r2_mem_heap_status mem_heap_status;
 
-	if (b2r2_mem_heap_status(&mem_heap_status) != 0) {
+	if (b2r2_mem_heap_status(mem_heap, &mem_heap_status) != 0) {
 		strcpy(buf, "Error, failed to get status\n");
 		return buf;
 	}
 
 	sprintf(buf,
-		"Handle                 : 0x%lX\n"
-		"Physical start address : 0x%lX\n"
-		"Size                   : %lu\n"
-		"Align                  : %lu\n"
-		"No of blocks allocated : %lu\n"
-		"Allocated size         : %lu\n"
-		"No of free blocks      : %lu\n"
-		"Free size              : %lu\n"
-		"No of locks            : %lu\n"
-		"No of locked           : %lu\n"
-		"No of nodes            : %lu\n",
-		(unsigned long) mem_heap,
-		(unsigned long) mem_heap_status.start_phys_addr,
-		(unsigned long) mem_heap_status.size,
-		(unsigned long) mem_heap_status.align,
-		(unsigned long) mem_heap_status.num_alloc,
-		(unsigned long) mem_heap_status.allocated_size,
-		(unsigned long) mem_heap_status.num_free,
-		(unsigned long) mem_heap_status.free_size,
-		(unsigned long) mem_heap_status.num_locks,
-		(unsigned long) mem_heap_status.num_locked,
-		(unsigned long) mem_heap_status.num_nodes);
+			"Handle                 : 0x%lX\n"
+			"Physical start address : 0x%lX\n"
+			"Size                   : %lu\n"
+			"Align                  : %lu\n"
+			"No of blocks allocated : %lu\n"
+			"Allocated size         : %lu\n"
+			"No of free blocks      : %lu\n"
+			"Free size              : %lu\n"
+			"No of locks            : %lu\n"
+			"No of locked           : %lu\n"
+			"No of nodes            : %lu\n",
+			(unsigned long) mem_heap,
+			(unsigned long) mem_heap_status.start_phys_addr,
+			(unsigned long) mem_heap_status.size,
+			(unsigned long) mem_heap_status.align,
+			(unsigned long) mem_heap_status.num_alloc,
+			(unsigned long) mem_heap_status.allocated_size,
+			(unsigned long) mem_heap_status.num_free,
+			(unsigned long) mem_heap_status.free_size,
+			(unsigned long) mem_heap_status.num_locks,
+			(unsigned long) mem_heap_status.num_locked,
+			(unsigned long) mem_heap_status.num_nodes);
 
 	return buf;
 }
 
 /*
  * Print memory heap status on file
- * (Use like "cat /debug/b2r2_mem/igram/stats")
+ * (Use like "cat /debug/b2r2/mem/stats")
  */
 static int debugfs_b2r2_mem_stats_read(struct file *filp, char __user *buf,
 				       size_t count, loff_t *f_pos)
@@ -186,11 +142,11 @@ static int debugfs_b2r2_mem_block_read(struct file *filp, char __user *buf,
 	int ret = 0;
 
 	dev_size = sprintf(Buf, "offset: %08lX %s size: %8d "
-			   "lock_count: %2d\n",
-			   (unsigned long) mem_block->offset,
-			   mem_block->free ? "free" : "allc",
-			   mem_block->size,
-			   mem_block->lock_count);
+			"lock_count: %2d\n",
+			(unsigned long) mem_block->offset,
+			mem_block->free ? "free" : "allc",
+			mem_block->size,
+			mem_block->lock_count);
 
 	/* No more to read if offset != 0 */
 	if (*f_pos > dev_size)
@@ -235,13 +191,13 @@ void debugfs_create_mem_block_entry(struct b2r2_mem_block *mem_block,
 	/* Add the block in debugfs */
 	if (mem_block->free)
 		sprintf(mem_block->debugfs_fname, "%08lX free",
-			(unsigned long) mem_block->offset);
+				(unsigned long) mem_block->offset);
 	else {
 		sprintf(mem_block->debugfs_fname, "%08lX allc h:%08lX "
-			"lck:%d ",
-			(unsigned long) mem_block->offset,
-			(unsigned long) mem_block,
-			mem_block->lock_count);
+				"lck:%d ",
+				(unsigned long) mem_block->offset,
+				(unsigned long) mem_block,
+				mem_block->lock_count);
 	}
 
 	mem_block->debugfs_block = debugfs_create_file(
@@ -258,75 +214,66 @@ void debugfs_create_mem_block_entry(struct b2r2_mem_block *mem_block,
 #endif   /* CONFIG_DEBUG_FS */
 
 /* Module initialization function */
-int b2r2_mem_init(struct device *dev, u32 heap_size, u32 align, u32 node_size)
+int b2r2_mem_init(struct b2r2_control *cont,
+		u32 heap_size, u32 align, u32 node_size)
 {
 	struct b2r2_mem_block *mem_block;
 	u32 aligned_size;
 
-	printk(KERN_INFO "B2R2_MEM: Creating heap for size %d bytes\n",
-		(int) heap_size);
+	dev_info(cont->dev, "%s: Creating heap for size %d bytes\n",
+		__func__, (int) heap_size);
 
 	/* Align size */
 	aligned_size = align_down(align, heap_size);
 	if (aligned_size == 0)
 		return -EINVAL;
 
-	mem_heap = kcalloc(sizeof(struct b2r2_mem_heap), 1, GFP_KERNEL);
-	if (!mem_heap)
-		return -ENOMEM;
-
-	mem_heap->start_virt_ptr = dma_alloc_coherent(dev,
-		aligned_size, &(mem_heap->start_phys_addr), GFP_KERNEL);
-	if (!mem_heap->start_phys_addr || !mem_heap->start_virt_ptr) {
+	cont->mem_heap.start_virt_ptr = dma_alloc_coherent(cont->dev,
+		aligned_size, &(cont->mem_heap.start_phys_addr), GFP_KERNEL);
+	if (!cont->mem_heap.start_phys_addr || !cont->mem_heap.start_virt_ptr) {
 		printk(KERN_ERR "B2R2_MEM: Failed to allocate memory\n");
 		return -ENOMEM;
 	}
 
 	/* Initialize the heap */
-	mem_heap->dev   = dev;
-	mem_heap->size  = aligned_size;
-	mem_heap->align = align;
+	cont->mem_heap.size  = aligned_size;
+	cont->mem_heap.align = align;
 
-	INIT_LIST_HEAD(&mem_heap->blocks);
+	INIT_LIST_HEAD(&cont->mem_heap.blocks);
 
 #ifdef CONFIG_DEBUG_FS
 	/* Register debugfs */
-
-	debugfs_root_dir = debugfs_create_dir("b2r2_mem", NULL);
-
-	mem_heap->debugfs_sub_root_dir = debugfs_create_dir("b2r2_mem",
-		debugfs_root_dir);
-	mem_heap->debugfs_heap_stats = debugfs_create_file(
-		"stats", 0444, mem_heap->debugfs_sub_root_dir, mem_heap,
-		&debugfs_b2r2_mem_stats_fops);
-	mem_heap->debugfs_dir_blocks = debugfs_create_dir(
-		"blocks", mem_heap->debugfs_sub_root_dir);
+	if (cont->mem_heap.debugfs_root_dir) {
+		cont->mem_heap.debugfs_heap_stats = debugfs_create_file(
+			"stats", 0444, cont->mem_heap.debugfs_root_dir,
+			&cont->mem_heap, &debugfs_b2r2_mem_stats_fops);
+		cont->mem_heap.debugfs_dir_blocks = debugfs_create_dir(
+			"blocks", cont->mem_heap.debugfs_root_dir);
+	}
 #endif
 
 	/* Create the first _free_ memory block */
-	mem_block = b2r2_mem_block_alloc(0, aligned_size, true);
+	mem_block = b2r2_mem_block_alloc(cont, 0, aligned_size, true);
 	if (!mem_block) {
-		dma_free_coherent(dev, aligned_size,
-			mem_heap->start_virt_ptr,
-			mem_heap->start_phys_addr);
-		kfree(mem_heap);
+		dma_free_coherent(cont->dev, aligned_size,
+			cont->mem_heap.start_virt_ptr,
+			cont->mem_heap.start_phys_addr);
 		printk(KERN_ERR "B2R2_MEM: Failed to allocate memory\n");
 		return -ENOMEM;
 	}
 
 	/* Add the free block to the blocks list */
-	list_add(&mem_block->list, &mem_heap->blocks);
+	list_add(&mem_block->list, &cont->mem_heap.blocks);
 
 	/* Allocate separate heap for B2R2 nodes */
-	mem_heap->node_size = node_size;
-	mem_heap->node_heap = dma_pool_create("b2r2_node_cache",
-		dev, node_size, align, 4096);
-	if (!mem_heap->node_heap) {
+	cont->mem_heap.node_size = node_size;
+	cont->mem_heap.node_heap = dma_pool_create("b2r2_node_cache",
+		cont->dev, node_size, align, 4096);
+	if (!cont->mem_heap.node_heap) {
 		b2r2_mem_block_free(mem_block);
-		dma_free_coherent(dev, aligned_size,
-			mem_heap->start_virt_ptr,
-			mem_heap->start_phys_addr);
-		kfree(mem_heap);
+		dma_free_coherent(cont->dev, aligned_size,
+			cont->mem_heap.start_virt_ptr,
+			cont->mem_heap.start_phys_addr);
 		printk(KERN_ERR "B2R2_MEM: Failed to allocate memory\n");
 		return -ENOMEM;
 	}
@@ -336,53 +283,45 @@ int b2r2_mem_init(struct device *dev, u32 heap_size, u32 align, u32 node_size)
 EXPORT_SYMBOL(b2r2_mem_init);
 
 /* Module exit function */
-void b2r2_mem_exit(void)
+void b2r2_mem_exit(struct b2r2_control *cont)
 {
 	struct list_head *ptr;
 
 	/* Free B2R2 node heap */
-	dma_pool_destroy(mem_heap->node_heap);
-
-#ifdef CONFIG_DEBUG_FS
-	/* debugfs root dir */
-	if (debugfs_root_dir) {
-		debugfs_remove_recursive(debugfs_root_dir);
-		debugfs_root_dir = NULL;
-	}
-#endif
+	dma_pool_destroy(cont->mem_heap.node_heap);
 
-	list_for_each(ptr, &mem_heap->blocks) {
+	list_for_each(ptr, &cont->mem_heap.blocks) {
 		struct b2r2_mem_block *mem_block =
 			list_entry(ptr, struct b2r2_mem_block, list);
 
 		b2r2_mem_block_free(mem_block);
 	}
 
-	dma_free_coherent(mem_heap->dev, mem_heap->size,
-		mem_heap->start_virt_ptr,
-		mem_heap->start_phys_addr);
-	kfree(mem_heap);
+	dma_free_coherent(cont->dev, cont->mem_heap.size,
+		cont->mem_heap.start_virt_ptr,
+		cont->mem_heap.start_phys_addr);
 }
 EXPORT_SYMBOL(b2r2_mem_exit);
 
 /* Return status of the heap */
-int b2r2_mem_heap_status(struct b2r2_mem_heap_status *mem_heap_status)
+static int b2r2_mem_heap_status(struct b2r2_mem_heap *mheap,
+		struct b2r2_mem_heap_status *mem_heap_status)
 {
 	struct list_head *ptr;
 
-	if (!mem_heap || !mem_heap_status)
+	if (!mheap || !mem_heap_status)
 		return -EINVAL;
 	memset(mem_heap_status, 0, sizeof(*mem_heap_status));
 
 	/* Lock the heap */
-	spin_lock(&mem_heap->heap_lock);
+	spin_lock(&mheap->heap_lock);
 
 	/* Fill in static info */
-	mem_heap_status->start_phys_addr = mem_heap->start_phys_addr;
-	mem_heap_status->size = mem_heap->size;
-	mem_heap_status->align = mem_heap->align;
+	mem_heap_status->start_phys_addr = mheap->start_phys_addr;
+	mem_heap_status->size = mheap->size;
+	mem_heap_status->align = mheap->align;
 
-	list_for_each(ptr, &mem_heap->blocks) {
+	list_for_each(ptr, &mheap->blocks) {
 		struct b2r2_mem_block *mem_block =
 			list_entry(ptr, struct b2r2_mem_block, list);
 
@@ -400,7 +339,7 @@ int b2r2_mem_heap_status(struct b2r2_mem_heap_status *mem_heap_status)
 		}
 	}
 
-	spin_unlock(&mem_heap->heap_lock);
+	spin_unlock(&mheap->heap_lock);
 
 	return 0;
 }
@@ -410,7 +349,7 @@ EXPORT_SYMBOL(b2r2_mem_heap_status);
  * for an allocated or free memory block
  */
 static struct b2r2_mem_block *b2r2_mem_block_alloc(
-	u32 offset, u32 size, bool free)
+		struct b2r2_control *cont, u32 offset, u32 size, bool free)
 {
 	struct b2r2_mem_block *mem_block = kmalloc(
 		sizeof(struct b2r2_mem_block), GFP_KERNEL);
@@ -427,7 +366,7 @@ static struct b2r2_mem_block *b2r2_mem_block_alloc(
 		mem_block->debugfs_block  = NULL;
 		/* Add the block in debugfs */
 		debugfs_create_mem_block_entry(mem_block,
-			mem_heap->debugfs_dir_blocks);
+			cont->mem_heap.debugfs_dir_blocks);
 #endif
 	}
 
@@ -446,7 +385,8 @@ static void b2r2_mem_block_free(struct b2r2_mem_block *mem_block)
 }
 
 /* Allocate a block from the heap */
-int b2r2_mem_alloc(u32 requested_size, u32 *returned_size, u32 *mem_handle)
+int b2r2_mem_alloc(struct b2r2_control *cont, u32 requested_size,
+		u32 *returned_size, u32 *mem_handle)
 {
 	int ret = 0;
 	struct list_head *ptr;
@@ -459,21 +399,19 @@ int b2r2_mem_alloc(u32 requested_size, u32 *returned_size, u32 *mem_handle)
 	printk(KERN_INFO "%s: size=%d\n", __func__, requested_size);
 
 	*mem_handle = 0;
-	if (!mem_heap)
-		return -EINVAL;
 
 	/* Lock the heap */
-	spin_lock(&mem_heap->heap_lock);
+	spin_lock(&cont->mem_heap.heap_lock);
 
-	aligned_size = align_up(mem_heap->align, requested_size);
+	aligned_size = align_up(cont->mem_heap.align, requested_size);
 	/* Try to find the best matching free block of suitable size */
-	list_for_each(ptr, &mem_heap->blocks) {
+	list_for_each(ptr, &cont->mem_heap.blocks) {
 		struct b2r2_mem_block *mem_block =
 			list_entry(ptr, struct b2r2_mem_block, list);
 
 		if (mem_block->free && mem_block->size >= aligned_size &&
-			(!found_mem_block ||
-			 mem_block->size < found_mem_block->size)) {
+				(!found_mem_block ||
+				mem_block->size < found_mem_block->size)) {
 			found_mem_block = mem_block;
 			if (found_mem_block->size == aligned_size)
 				break;
@@ -482,7 +420,8 @@ int b2r2_mem_alloc(u32 requested_size, u32 *returned_size, u32 *mem_handle)
 
 	if (found_mem_block) {
 		struct b2r2_mem_block *new_block
-			= b2r2_mem_block_alloc(found_mem_block->offset,
+			= b2r2_mem_block_alloc(cont,
+				found_mem_block->offset,
 				requested_size, false);
 
 		if (new_block) {
@@ -500,7 +439,7 @@ int b2r2_mem_alloc(u32 requested_size, u32 *returned_size, u32 *mem_handle)
 #ifdef CONFIG_DEBUG_FS
 				debugfs_create_mem_block_entry(
 					found_mem_block,
-					mem_heap->debugfs_dir_blocks);
+					cont->mem_heap.debugfs_dir_blocks);
 #endif
 			}
 
@@ -518,14 +457,14 @@ int b2r2_mem_alloc(u32 requested_size, u32 *returned_size, u32 *mem_handle)
 	}
 
 	/* Unlock */
-	spin_unlock(&mem_heap->heap_lock);
+	spin_unlock(&cont->mem_heap.heap_lock);
 
 	return ret;
 }
 EXPORT_SYMBOL(b2r2_mem_alloc);
 
 /* Free the allocated block */
-int b2r2_mem_free(u32 mem_handle)
+int b2r2_mem_free(struct b2r2_control *cont, u32 mem_handle)
 {
 	int ret = 0;
 	struct b2r2_mem_block *mem_block = (struct b2r2_mem_block *) mem_handle;
@@ -534,7 +473,7 @@ int b2r2_mem_free(u32 mem_handle)
 		return -EINVAL;
 
 	/* Lock the heap */
-	spin_lock(&mem_heap->heap_lock);
+	spin_lock(&cont->mem_heap.heap_lock);
 
 	if (!ret && mem_block->free)
 		ret = -EINVAL;
@@ -544,18 +483,18 @@ int b2r2_mem_free(u32 mem_handle)
 		/* Release the block */
 
 		mem_block->free = true;
-		mem_block->size = align_up(mem_heap->align,
+		mem_block->size = align_up(cont->mem_heap.align,
 					   mem_block->size);
 
 		/* Join with previous block if possible */
-		if (mem_block->list.prev != &mem_heap->blocks) {
+		if (mem_block->list.prev != &cont->mem_heap.blocks) {
 			struct b2r2_mem_block *prev_block =
 				list_entry(mem_block->list.prev,
 					struct b2r2_mem_block, list);
 
 			if (prev_block->free &&
-			    (prev_block->offset + prev_block->size) ==
-			    mem_block->offset) {
+				(prev_block->offset + prev_block->size) ==
+				mem_block->offset) {
 				mem_block->offset = prev_block->offset;
 				mem_block->size   += prev_block->size;
 
@@ -564,15 +503,15 @@ int b2r2_mem_free(u32 mem_handle)
 		}
 
 		/* Join with next block if possible */
-		if (mem_block->list.next != &mem_heap->blocks) {
+		if (mem_block->list.next != &cont->mem_heap.blocks) {
 			struct b2r2_mem_block *next_block
 				= list_entry(mem_block->list.next,
-						 struct b2r2_mem_block,
-						 list);
+						struct b2r2_mem_block,
+						list);
 
 			if (next_block->free &&
-			    (mem_block->offset + mem_block->size) ==
-			    next_block->offset) {
+				(mem_block->offset + mem_block->size) ==
+				next_block->offset) {
 				mem_block->size   += next_block->size;
 
 				b2r2_mem_block_free(next_block);
@@ -580,19 +519,20 @@ int b2r2_mem_free(u32 mem_handle)
 		}
 #ifdef CONFIG_DEBUG_FS
 		debugfs_create_mem_block_entry(mem_block,
-			mem_heap->debugfs_dir_blocks);
+				cont->mem_heap.debugfs_dir_blocks);
 #endif
 	}
 
 	/* Unlock */
-	spin_unlock(&mem_heap->heap_lock);
+	spin_unlock(&cont->mem_heap.heap_lock);
 
 	return ret;
 }
 EXPORT_SYMBOL(b2r2_mem_free);
 
 /* Lock the allocated block in memory */
-int b2r2_mem_lock(u32 mem_handle, u32 *phys_addr, void **virt_ptr, u32 *size)
+int b2r2_mem_lock(struct b2r2_control *cont, u32 mem_handle,
+		u32 *phys_addr, void **virt_ptr, u32 *size)
 {
 	struct b2r2_mem_block *mem_block =
 		(struct b2r2_mem_block *) mem_handle;
@@ -601,30 +541,30 @@ int b2r2_mem_lock(u32 mem_handle, u32 *phys_addr, void **virt_ptr, u32 *size)
 		return -EINVAL;
 
 	/* Lock the heap */
-	spin_lock(&mem_heap->heap_lock);
+	spin_lock(&cont->mem_heap.heap_lock);
 
 	mem_block->lock_count++;
 
 	if (phys_addr)
-		*phys_addr = mem_heap->start_phys_addr + mem_block->offset;
+		*phys_addr = cont->mem_heap.start_phys_addr + mem_block->offset;
 	if (virt_ptr)
-		*virt_ptr = (char *) mem_heap->start_virt_ptr +
+		*virt_ptr = (char *) cont->mem_heap.start_virt_ptr +
 			mem_block->offset;
 	if (size)
-		*size = align_up(mem_heap->align, mem_block->size);
+		*size = align_up(cont->mem_heap.align, mem_block->size);
 #ifdef CONFIG_DEBUG_FS
 	debugfs_create_mem_block_entry(mem_block,
-		mem_heap->debugfs_dir_blocks);
+		cont->mem_heap.debugfs_dir_blocks);
 #endif
 
-	spin_unlock(&mem_heap->heap_lock);
+	spin_unlock(&cont->mem_heap.heap_lock);
 
 	return 0;
 }
 EXPORT_SYMBOL(b2r2_mem_lock);
 
 /* Unlock the allocated block in memory */
-int b2r2_mem_unlock(u32 mem_handle)
+int b2r2_mem_unlock(struct b2r2_control *cont, u32 mem_handle)
 {
 	struct b2r2_mem_block *mem_block =
 		(struct b2r2_mem_block *) mem_handle;
@@ -633,11 +573,11 @@ int b2r2_mem_unlock(u32 mem_handle)
 		return -EINVAL;
 
 	/* Lock the heap */
-	spin_lock(&mem_heap->heap_lock);
+	spin_lock(&cont->mem_heap.heap_lock);
 
 	mem_block->lock_count--;
 
-	spin_unlock(&mem_heap->heap_lock);
+	spin_unlock(&cont->mem_heap.heap_lock);
 
 	/* debugfs will be updated in release */
 	return 0;
@@ -646,7 +586,8 @@ int b2r2_mem_unlock(u32 mem_handle)
 EXPORT_SYMBOL(b2r2_mem_unlock);
 
 /* Allocate one or more b2r2 nodes from DMA pool */
-int b2r2_node_alloc(u32 num_nodes, struct b2r2_node **first_node)
+int b2r2_node_alloc(struct b2r2_control *cont, u32 num_nodes,
+		struct b2r2_node **first_node)
 {
 	int i;
 	int ret = 0;
@@ -656,7 +597,7 @@ int b2r2_node_alloc(u32 num_nodes, struct b2r2_node **first_node)
 
 	/* Check input parameters */
 	if ((num_nodes <= 0) || !first_node) {
-		printk(KERN_ERR
+		dev_err(cont->dev,
 			"B2R2_MEM: Invalid parameter for b2r2_node_alloc, "
 			"num_nodes=%d, first_node=%ld\n",
 			(int) num_nodes, (long) first_node);
@@ -664,48 +605,49 @@ int b2r2_node_alloc(u32 num_nodes, struct b2r2_node **first_node)
 	}
 
 	/* Allocate the first node */
-	first_node_ptr = dma_pool_alloc(mem_heap->node_heap,
+	first_node_ptr = dma_pool_alloc(cont->mem_heap.node_heap,
 		GFP_DMA | GFP_KERNEL, &physical_address);
-	if (first_node_ptr) {
-		/* Initialize first node */
-		first_node_ptr->next = NULL;
-		first_node_ptr->physical_address = physical_address +
+	if (!first_node_ptr) {
+		dev_err(cont->dev,
+			"B2R2_MEM: Failed to allocate memory for node\n");
+		return -ENOMEM;
+	}
+
+	/* Initialize first node */
+	first_node_ptr->next = NULL;
+	first_node_ptr->physical_address = physical_address +
 			offsetof(struct b2r2_node, node);
 
-		/* Allocate and initialize remaining nodes, */
-		/* and link them into a list                */
-		for (i = 1, node_ptr = first_node_ptr; i < num_nodes; i++) {
-			node_ptr->next = dma_pool_alloc(mem_heap->node_heap,
+	/* Allocate and initialize remaining nodes, */
+	/* and link them into a list                */
+	for (i = 1, node_ptr = first_node_ptr; i < num_nodes; i++) {
+		node_ptr->next = dma_pool_alloc(cont->mem_heap.node_heap,
 				GFP_DMA | GFP_KERNEL, &physical_address);
-			if (node_ptr->next) {
-				node_ptr = node_ptr->next;
-				node_ptr->next = NULL;
-				node_ptr->physical_address = physical_address +
+		if (node_ptr->next) {
+			node_ptr = node_ptr->next;
+			node_ptr->next = NULL;
+			node_ptr->physical_address = physical_address +
 					offsetof(struct b2r2_node, node);
-			} else {
-				printk(KERN_ERR "B2R2_MEM: Failed to allocate memory for node\n");
-				ret = -ENOMEM;
-				break;
-			}
+		} else {
+			printk(KERN_ERR "B2R2_MEM: Failed to allocate memory for node\n");
+			ret = -ENOMEM;
+			break;
 		}
-
-		/* If all nodes were allocated successfully, */
-		/* return the first node                     */
-		if (!ret)
-			*first_node = first_node_ptr;
-		else
-			b2r2_node_free(first_node_ptr);
-	} else {
-		printk(KERN_ERR "B2R2_MEM: Failed to allocate memory for node\n");
-		ret = -ENOMEM;
 	}
 
+	/* If all nodes were allocated successfully, */
+	/* return the first node                     */
+	if (!ret)
+		*first_node = first_node_ptr;
+	else
+		b2r2_node_free(cont, first_node_ptr);
+
 	return ret;
 }
 EXPORT_SYMBOL(b2r2_node_alloc);
 
 /* Free a linked list of b2r2 nodes */
-void b2r2_node_free(struct b2r2_node *first_node)
+void b2r2_node_free(struct b2r2_control *cont, struct b2r2_node *first_node)
 {
 	struct b2r2_node *current_node = first_node;
 	struct b2r2_node *next_node = NULL;
@@ -713,9 +655,9 @@ void b2r2_node_free(struct b2r2_node *first_node)
 	/* Traverse the linked list and free the nodes */
 	while (current_node != NULL) {
 		next_node = current_node->next;
-		dma_pool_free(mem_heap->node_heap, current_node,
-			current_node->physical_address -
-			offsetof(struct b2r2_node, node));
+		dma_pool_free(cont->mem_heap.node_heap, current_node,
+				current_node->physical_address -
+				offsetof(struct b2r2_node, node));
 		current_node = next_node;
 	}
 }
diff --git a/drivers/video/b2r2/b2r2_mem_alloc.h b/drivers/video/b2r2/b2r2_mem_alloc.h
index 33309c972f5..4fd1e66abca 100644
--- a/drivers/video/b2r2/b2r2_mem_alloc.h
+++ b/drivers/video/b2r2/b2r2_mem_alloc.h
@@ -17,6 +17,7 @@
 
 /**
  * struct b2r2_mem_heap_status - Information about current state of the heap
+ *
  * @start_phys_addr: Physical address of the the memory area
  * @size: Size of the memory area
  * @align: Alignment of start and allocation sizes (in bytes).
@@ -42,6 +43,30 @@ struct b2r2_mem_heap_status {
 	u32 num_nodes;
 };
 
+/**
+ * struct b2r2_mem_block - Represents one block of b2r2
+ *                         physical memory, free or allocated
+ *
+ * @list: For membership in list
+ * @offset: Offset in b2r2 physical memory area (aligned)
+ * @size: Size of the object (requested size if busy, else actual)
+ * @free: True if the block is free
+ * @lock_count: Lock count
+ * @debugfs_fname: Debugfs file name
+ * @debugfs_block: Debugfs dir entry for the block
+ */
+struct b2r2_mem_block {
+	struct list_head	list;
+	u32					offset;
+	u32					size;
+	bool				free;
+	u32					lock_count;
+#ifdef CONFIG_DEBUG_FS
+	char				debugfs_fname[80];
+	struct dentry		*debugfs_block;
+#endif
+};
+
 
 /* B2R2 memory API (kernel) */
 
@@ -54,21 +79,14 @@ struct b2r2_mem_heap_status {
  *
  * Returns 0 if success, else negative error code
  **/
-int b2r2_mem_init(struct device *dev, u32 heap_size, u32 align, u32 node_size);
+int b2r2_mem_init(struct b2r2_control *cont,
+		u32 heap_size, u32 align, u32 node_size);
 
 /**
  * b2r2_mem_exit() - Cleans up the B2R2 memory manager
  *
  **/
-void b2r2_mem_exit(void);
-
-/**
- * b2r2_mem_heap_status() - Get information about the current heap state
- * @mem_heap_status: Struct containing status info on succesful return
- *
- * Returns 0 if success, else negative error code
- **/
-int b2r2_mem_heap_status(struct b2r2_mem_heap_status *mem_heap_status);
+void b2r2_mem_exit(struct b2r2_control *cont);
 
 /**
  * b2r2_mem_alloc() - Allocates memory block from physical memory heap
@@ -81,7 +99,8 @@ int b2r2_mem_heap_status(struct b2r2_mem_heap_status *mem_heap_status);
  * All memory allocations are movable when not locked.
  * Returns 0 if OK else negative error value
  **/
-int b2r2_mem_alloc(u32 requested_size, u32 *returned_size, u32 *mem_handle);
+int b2r2_mem_alloc(struct b2r2_control *cont, u32 requested_size,
+		u32 *returned_size, u32 *mem_handle);
 
 /**
  * b2r2_mem_free() - Frees an allocation
@@ -89,7 +108,7 @@ int b2r2_mem_alloc(u32 requested_size, u32 *returned_size, u32 *mem_handle);
  *
  * Returns 0 if OK else negative error value
  **/
-int b2r2_mem_free(u32 mem_handle);
+int b2r2_mem_free(struct b2r2_control *cont, u32 mem_handle);
 
 /**
  * b2r2_mem_lock() - Lock memory in memory and return physical address
@@ -107,7 +126,8 @@ int b2r2_mem_free(u32 mem_handle);
  * b2r2_mem_lock.
  * Returns 0 if OK else negative error value
  **/
-int b2r2_mem_lock(u32 mem_handle, u32 *phys_addr, void **virt_ptr, u32 *size);
+int b2r2_mem_lock(struct b2r2_control *cont, u32 mem_handle,
+		u32 *phys_addr, void **virt_ptr, u32 *size);
 
 /**
  * b2r2_mem_unlock() - Unlock previously locked memory
@@ -117,7 +137,7 @@ int b2r2_mem_lock(u32 mem_handle, u32 *phys_addr, void **virt_ptr, u32 *size);
  * memory area is movable again.
  * Returns 0 if OK else negative error value
  **/
-int b2r2_mem_unlock(u32 mem_handle);
+int b2r2_mem_unlock(struct b2r2_control *cont, u32 mem_handle);
 
 /**
  * b2r2_node_alloc() - Allocates B2R2 node from physical memory heap
@@ -126,7 +146,8 @@ int b2r2_mem_unlock(u32 mem_handle);
  *
  * Returns 0 if OK else negative error value
  **/
-int b2r2_node_alloc(u32 num_nodes, struct b2r2_node **first_node);
+int b2r2_node_alloc(struct b2r2_control *cont, u32 num_nodes,
+		struct b2r2_node **first_node);
 
 /**
  * b2r2_node_free() - Frees a linked list of allocated B2R2 nodes
@@ -134,7 +155,7 @@ int b2r2_node_alloc(u32 num_nodes, struct b2r2_node **first_node);
  *
  * Returns 0 if OK else negative error value
  **/
-void b2r2_node_free(struct b2r2_node *first_node);
+void b2r2_node_free(struct b2r2_control *cont, struct b2r2_node *first_node);
 
 
 #endif /* __B2R2_MEM_ALLOC_H */
diff --git a/drivers/video/b2r2/b2r2_node_gen.c b/drivers/video/b2r2/b2r2_node_gen.c
index f452a4b11df..1f48bac6fe7 100644
--- a/drivers/video/b2r2/b2r2_node_gen.c
+++ b/drivers/video/b2r2/b2r2_node_gen.c
@@ -15,7 +15,8 @@
 #include <asm/dma-mapping.h>
 #include "b2r2_internal.h"
 
-static void free_nodes(struct b2r2_node *first_node)
+static void free_nodes(struct b2r2_control *cont,
+		struct b2r2_node *first_node)
 {
 	struct b2r2_node *node = first_node;
 	int no_of_nodes = 0;
@@ -25,34 +26,35 @@ static void free_nodes(struct b2r2_node *first_node)
 		node = node->next;
 	}
 
-	dma_free_coherent(b2r2_blt_device(),
-			  no_of_nodes * sizeof(struct b2r2_node),
-			  first_node,
-			  first_node->physical_address -
-			  offsetof(struct b2r2_node, node));
+	dma_free_coherent(cont->dev,
+			no_of_nodes * sizeof(struct b2r2_node),
+			first_node,
+			first_node->physical_address -
+			offsetof(struct b2r2_node, node));
 }
 
-struct b2r2_node *b2r2_blt_alloc_nodes(int no_of_nodes)
+struct b2r2_node *b2r2_blt_alloc_nodes(struct b2r2_control *cont,
+		int no_of_nodes)
 {
 	u32 physical_address;
 	struct b2r2_node *nodes;
 	struct b2r2_node *tmpnode;
 
 	if (no_of_nodes <= 0) {
-		dev_err(b2r2_blt_device(), "%s: Wrong number of nodes (%d)",
-			__func__, no_of_nodes);
+		dev_err(cont->dev, "%s: Wrong number of nodes (%d)",
+				__func__, no_of_nodes);
 		return NULL;
 	}
 
 	/* Allocate the memory */
-	nodes = (struct b2r2_node *) dma_alloc_coherent(b2r2_blt_device(),
-				      no_of_nodes * sizeof(struct b2r2_node),
-				      &physical_address, GFP_DMA | GFP_KERNEL);
+	nodes = (struct b2r2_node *) dma_alloc_coherent(cont->dev,
+			no_of_nodes * sizeof(struct b2r2_node),
+			&physical_address, GFP_DMA | GFP_KERNEL);
 
 	if (nodes == NULL) {
-		dev_err(b2r2_blt_device(),
-			"%s: Failed to alloc memory for nodes",
-			__func__);
+		dev_err(cont->dev,
+				"%s: Failed to alloc memory for nodes",
+				__func__);
 		return NULL;
 	}
 
@@ -73,8 +75,9 @@ struct b2r2_node *b2r2_blt_alloc_nodes(int no_of_nodes)
 	return nodes;
 }
 
-void b2r2_blt_free_nodes(struct b2r2_node *first_node)
+void b2r2_blt_free_nodes(struct b2r2_control *cont,
+		struct b2r2_node *first_node)
 {
-	free_nodes(first_node);
+	free_nodes(cont, first_node);
 }
 
diff --git a/drivers/video/b2r2/b2r2_node_split.c b/drivers/video/b2r2/b2r2_node_split.c
index 22a0b9c0e5c..6587ef0c343 100644
--- a/drivers/video/b2r2/b2r2_node_split.c
+++ b/drivers/video/b2r2/b2r2_node_split.c
@@ -155,8 +155,8 @@ static const u32 vmx_yvu_to_yuv[] = {
 /*
  * Forward declaration of private functions
  */
-
-static int analyze_fmt_conv(struct b2r2_node_split_buf *src,
+static int analyze_fmt_conv(struct b2r2_control *cont,
+		struct b2r2_node_split_buf *src,
 		struct b2r2_node_split_buf *dst,
 		const u32 **vmx, u32 *node_count);
 static int analyze_color_fill(struct b2r2_node_split_job *this,
@@ -176,56 +176,67 @@ static int analyze_transform(struct b2r2_node_split_job *this,
 static int analyze_rot_scale(struct b2r2_node_split_job *this,
 		const struct b2r2_blt_request *req, u32 *node_count,
 		u32 *buf_count);
-static int analyze_scale_factors(struct b2r2_node_split_job *this);
+static int analyze_scale_factors(struct b2r2_control *cont,
+		struct b2r2_node_split_job *this);
 
-static void configure_src(struct b2r2_node *node,
+static void configure_src(struct b2r2_control *cont, struct b2r2_node *node,
 		struct b2r2_node_split_buf *src, const u32 *ivmx);
-static void configure_bg(struct b2r2_node *node,
+static void configure_bg(struct b2r2_control *cont, struct b2r2_node *node,
 		struct b2r2_node_split_buf *bg, bool swap_fg_bg);
-static int configure_dst(struct b2r2_node *node,
+static int configure_dst(struct b2r2_control *cont, struct b2r2_node *node,
 		struct b2r2_node_split_buf *dst, const u32 *ivmx,
 		struct b2r2_node **next);
-static void configure_blend(struct b2r2_node *node, u32 flags,
-		u32 global_alpha);
-static void configure_clip(struct b2r2_node *node,
+static void configure_blend(struct b2r2_control *cont, struct b2r2_node *node,
+		u32 flags, u32 global_alpha);
+static void configure_clip(struct b2r2_control *cont, struct b2r2_node *node,
 		struct b2r2_blt_rect *clip_rect);
 
-static int configure_tile(struct b2r2_node_split_job *this,
-		struct b2r2_node *node, struct b2r2_node **next);
-static void configure_direct_fill(struct b2r2_node *node, u32 color,
-		struct b2r2_node_split_buf *dst, struct b2r2_node **next);
-static int configure_fill(struct b2r2_node *node, u32 color,
-		enum b2r2_blt_fmt fmt, struct b2r2_node_split_buf *dst,
-		const u32 *ivmx, struct b2r2_node **next);
-static void configure_direct_copy(struct b2r2_node *node,
-		struct b2r2_node_split_buf *src,
+static int configure_tile(struct b2r2_control *cont,
+		struct b2r2_node_split_job *this, struct b2r2_node *node,
+		struct b2r2_node **next);
+static void configure_direct_fill(struct b2r2_control *cont,
+		struct b2r2_node *node, u32 color,
+		struct b2r2_node_split_buf *dst,
+		struct b2r2_node **next);
+static int configure_fill(struct b2r2_control *cont,
+		struct b2r2_node *node, u32 color, enum b2r2_blt_fmt fmt,
+		struct b2r2_node_split_buf *dst, const u32 *ivmx,
+		struct b2r2_node **next);
+static void configure_direct_copy(struct b2r2_control *cont,
+		struct b2r2_node *node, struct b2r2_node_split_buf *src,
 		struct b2r2_node_split_buf *dst, struct b2r2_node **next);
-static int configure_copy(struct b2r2_node *node,
-		struct b2r2_node_split_buf *src,
+static int configure_copy(struct b2r2_control *cont,
+		struct b2r2_node *node,	struct b2r2_node_split_buf *src,
 		struct b2r2_node_split_buf *dst, const u32 *ivmx,
 		struct b2r2_node **next,
 		struct b2r2_node_split_job *this);
-static int configure_rotate(struct b2r2_node *node,
-		struct b2r2_node_split_buf *src,
+static int configure_rotate(struct b2r2_control *cont,
+		struct b2r2_node *node, struct b2r2_node_split_buf *src,
 		struct b2r2_node_split_buf *dst, const u32 *ivmx,
 		struct b2r2_node **next,
 		struct b2r2_node_split_job *this);
-static int configure_scale(struct b2r2_node *node,
-		struct b2r2_node_split_buf *src,
+static int configure_scale(struct b2r2_control *cont,
+		struct b2r2_node *node, struct b2r2_node_split_buf *src,
 		struct b2r2_node_split_buf *dst, u16 h_rsf, u16 v_rsf,
 		const u32 *ivmx, struct b2r2_node **next,
 		struct b2r2_node_split_job *this);
-static int configure_rot_scale(struct b2r2_node_split_job *this,
-		struct b2r2_node *node, struct b2r2_node **next);
+static int configure_rot_scale(struct b2r2_control *cont,
+		struct b2r2_node_split_job *this, struct b2r2_node *node,
+		struct b2r2_node **next);
+
+static void recalculate_rects(struct b2r2_control *cont,
+		struct b2r2_blt_req *req);
 
-static void recalculate_rects(struct b2r2_blt_req *req);
-static int check_rect(const struct b2r2_blt_img *img,
+static int check_rect(struct b2r2_control *cont,
+		const struct b2r2_blt_img *img,
 		const struct b2r2_blt_rect *rect,
 		const struct b2r2_blt_rect *clip);
-static void set_buf(struct b2r2_node_split_buf *buf, u32 addr,
-		const struct b2r2_blt_img *img,
+static void set_buf(struct b2r2_control *cont,
+		struct b2r2_node_split_buf *buf,
+		u32 addr, const struct b2r2_blt_img *img,
 		const struct b2r2_blt_rect *rect, bool color_fill, u32 color);
-static int setup_tmp_buf(struct b2r2_node_split_buf *this, u32 max_size,
+static int setup_tmp_buf(struct b2r2_control *cont,
+		struct b2r2_node_split_buf *this, u32 max_size,
 		enum b2r2_blt_fmt pref_fmt, u32 pref_width, u32 pref_height);
 
 static enum b2r2_ty get_alpha_range(enum b2r2_blt_fmt fmt);
@@ -249,7 +260,7 @@ static u32 to_RGB888(u32 color, const enum b2r2_blt_fmt fmt);
 static enum b2r2_fmt_type get_fmt_type(enum b2r2_blt_fmt fmt);
 
 static bool is_transform(const struct b2r2_blt_request *req);
-static s32 rescale(s32 dim, u16 sf);
+static s32 rescale(struct b2r2_control *cont, s32 dim, u16 sf);
 static s32 inv_rescale(s32 dim, u16 sf);
 
 static void set_target(struct b2r2_node *node, u32 addr,
@@ -282,8 +293,9 @@ int b2r2_node_split_analyze(const struct b2r2_blt_request *req,
 {
 	int ret;
 	bool color_fill;
+	struct b2r2_control *cont = req->instance->control;
 
-	b2r2_log_info("%s\n", __func__);
+	b2r2_log_info(cont->dev, "%s\n", __func__);
 
 	memset(this, 0, sizeof(*this));
 
@@ -331,14 +343,13 @@ int b2r2_node_split_analyze(const struct b2r2_blt_request *req,
 	}
 
 	/* Unsupported formats on bg */
-	if (this->flags & B2R2_BLT_FLAG_BG_BLEND) {
+	if (this->flags & B2R2_BLT_FLAG_BG_BLEND)
 		/*
-		 * There are no ivmx on source 1, so check that
-		 * there is no such requirement on the background
-		 * to destination format conversion. This check is sufficient
-		 * since the node splitter currently does not support
-		 * destination ivmx. That fact also removes
-		 * the source format as a parameter when checking the
+		 * There are no ivmx on source 1, so check that there is no
+		 * such requirement on the background to destination format
+		 * conversion. This check is sufficient since the node splitter
+		 * currently does not support destination ivmx. That fact also
+		 * removes the source format as a parameter when checking the
 		 * background format.
 		 */
 		if (bg_format_require_ivmx(req->user_req.bg_img.fmt,
@@ -346,63 +357,60 @@ int b2r2_node_split_analyze(const struct b2r2_blt_request *req,
 			ret = -ENOSYS;
 			goto unsupported;
 		}
-	}
 
 	if ((this->flags & B2R2_BLT_FLAG_SOURCE_COLOR_KEY) &&
 			(is_yuv_fmt(req->user_req.src_img.fmt) ||
 			req->user_req.src_img.fmt == B2R2_BLT_FMT_1_BIT_A1 ||
 			req->user_req.src_img.fmt == B2R2_BLT_FMT_8_BIT_A8)) {
-		b2r2_log_warn("%s: Unsupported: source color keying with "
-			"YUV or pure alpha formats.\n",
-			__func__);
+		b2r2_log_warn(cont->dev, "%s: Unsupported: source color keying "
+			"with YUV or pure alpha formats.\n", __func__);
 		ret = -ENOSYS;
 		goto unsupported;
 	}
 
 	if (this->flags & (B2R2_BLT_FLAG_DEST_COLOR_KEY |
 			B2R2_BLT_FLAG_SOURCE_MASK)) {
-		b2r2_log_warn("%s: Unsupported: source mask, "
-			"destination color keying.\n",
-			__func__);
+		b2r2_log_warn(cont->dev, "%s: Unsupported: source mask, "
+			"destination color keying.\n", __func__);
 		ret = -ENOSYS;
 		goto unsupported;
 	}
 
 	if ((req->user_req.flags & B2R2_BLT_FLAG_CLUT_COLOR_CORRECTION) &&
 			req->user_req.clut == NULL) {
-		b2r2_log_warn("%s: Invalid request: no table specified "
-			"for CLUT color correction.\n",
+		b2r2_log_warn(cont->dev, "%s: Invalid request: no table "
+			"specified for CLUT color correction.\n",
 			__func__);
 		return -EINVAL;
 	}
 
 	/* Check for color fill */
 	color_fill = (this->flags & (B2R2_BLT_FLAG_SOURCE_FILL |
-				B2R2_BLT_FLAG_SOURCE_FILL_RAW)) != 0;
+		B2R2_BLT_FLAG_SOURCE_FILL_RAW)) != 0;
 
 	/*
 	 * B2R2 cannot handle destination clipping on buffers
 	 * allocated close to 64MiB bank boundaries.
 	 * recalculate src_ and dst_rect to avoid clipping.
 	 */
-	recalculate_rects((struct b2r2_blt_req *) &req->user_req);
+	recalculate_rects(cont, (struct b2r2_blt_req *) &req->user_req);
 
 	/* Configure the source and destination buffers */
-	set_buf(&this->src, req->src_resolved.physical_address,
-			&req->user_req.src_img, &req->user_req.src_rect,
-			color_fill, req->user_req.src_color);
+	set_buf(cont, &this->src, req->src_resolved.physical_address,
+		&req->user_req.src_img, &req->user_req.src_rect,
+		color_fill, req->user_req.src_color);
 
 	if (this->flags & B2R2_BLT_FLAG_BG_BLEND) {
-		set_buf(&this->bg, req->bg_resolved.physical_address,
-				&req->user_req.bg_img, &req->user_req.bg_rect,
-				false, 0);
+		set_buf(cont, &this->bg, req->bg_resolved.physical_address,
+			&req->user_req.bg_img, &req->user_req.bg_rect,
+			false, 0);
 	}
 
-	set_buf(&this->dst, req->dst_resolved.physical_address,
+	set_buf(cont, &this->dst, req->dst_resolved.physical_address,
 			&req->user_req.dst_img, &req->user_req.dst_rect, false,
 			0);
 
-	b2r2_log_info("%s:\n"
+	b2r2_log_info(cont->dev, "%s:\n"
 		"\t\tsrc.rect=(%4d, %4d, %4d, %4d)\t"
 		"bg.rect=(%4d, %4d, %4d, %4d)\t"
 		"dst.rect=(%4d, %4d, %4d, %4d)\n", __func__, this->src.rect.x,
@@ -428,15 +436,14 @@ int b2r2_node_split_analyze(const struct b2r2_blt_request *req,
 		this->blend = true;
 
 	if (this->blend && this->src.type == B2R2_FMT_TYPE_PLANAR) {
-		b2r2_log_warn("%s: Unsupported: blend with planar source\n",
-				__func__);
+		b2r2_log_warn(cont->dev, "%s: Unsupported: blend with planar"
+			" source\n", __func__);
 		ret = -ENOSYS;
 		goto unsupported;
 	}
 
 	/* Check for clipping */
-	this->clip = (this->flags &
-				B2R2_BLT_FLAG_DESTINATION_CLIP) != 0;
+	this->clip = (this->flags & B2R2_BLT_FLAG_DESTINATION_CLIP) != 0;
 	if (this->clip) {
 		s32 l = req->user_req.dst_clip_rect.x;
 		s32 r = l + req->user_req.dst_clip_rect.width;
@@ -466,14 +473,14 @@ int b2r2_node_split_analyze(const struct b2r2_blt_request *req,
 	}
 
 	/* Validate the destination */
-	ret = check_rect(&req->user_req.dst_img, &req->user_req.dst_rect,
+	ret = check_rect(cont, &req->user_req.dst_img, &req->user_req.dst_rect,
 			&this->clip_rect);
 	if (ret < 0)
 		goto error;
 
 	/* Validate the source (if not color fill) */
 	if (!color_fill) {
-		ret = check_rect(&req->user_req.src_img,
+		ret = check_rect(cont, &req->user_req.src_img,
 					&req->user_req.src_rect, NULL);
 		if (ret < 0)
 			goto error;
@@ -481,7 +488,7 @@ int b2r2_node_split_analyze(const struct b2r2_blt_request *req,
 
 	/* Validate the background source */
 	if (this->flags & B2R2_BLT_FLAG_BG_BLEND) {
-		ret = check_rect(&req->user_req.bg_img,
+		ret = check_rect(cont, &req->user_req.bg_img,
 					&req->user_req.bg_rect, NULL);
 		if (ret < 0)
 			goto error;
@@ -519,7 +526,7 @@ int b2r2_node_split_analyze(const struct b2r2_blt_request *req,
 	if (ret == -ENOSYS) {
 		goto unsupported;
 	} else if (ret < 0) {
-		b2r2_log_warn("%s: Analysis failed!\n", __func__);
+		b2r2_log_warn(cont->dev, "%s: Analysis failed!\n", __func__);
 		goto error;
 	}
 
@@ -545,21 +552,22 @@ int b2r2_node_split_analyze(const struct b2r2_blt_request *req,
 	if (this->buf_count > 0)
 		*bufs = &this->work_bufs[0];
 
-	b2r2_log_info("%s: dst.win=(%d, %d, %d, %d), dst.dx=%d, dst.dy=%d\n",
-			__func__, this->dst.win.x, this->dst.win.y,
-			this->dst.win.width, this->dst.win.height, this->dst.dx,
-			this->dst.dy);
+	b2r2_log_info(cont->dev, "%s: dst.win=(%d, %d, %d, %d), "
+		"dst.dx=%d, dst.dy=%d\n", __func__, this->dst.win.x,
+		this->dst.win.y, this->dst.win.width, this->dst.win.height,
+		this->dst.dx, this->dst.dy);
 	if (this->buf_count > 0)
-		b2r2_log_info("%s: buf_count=%d, buf_size=%d, node_count=%d\n",
-			__func__, *buf_count, bufs[0]->size, *node_count);
+		b2r2_log_info(cont->dev, "%s: buf_count=%d, buf_size=%d, "
+			"node_count=%d\n", __func__, *buf_count,
+			bufs[0]->size, *node_count);
 	else
-		b2r2_log_info("%s: buf_count=%d, node_count=%d\n",
+		b2r2_log_info(cont->dev, "%s: buf_count=%d, node_count=%d\n",
 			__func__, *buf_count, *node_count);
 
 	return 0;
 
 error:
-	b2r2_log_warn("%s: Exit...\n", __func__);
+	b2r2_log_warn(cont->dev, "%s: Exit...\n", __func__);
 unsupported:
 	return ret;
 }
@@ -567,8 +575,8 @@ unsupported:
 /**
  * b2r2_node_split_configure() - configures the node list
  */
-int b2r2_node_split_configure(struct b2r2_node_split_job *this,
-		struct b2r2_node *first)
+int b2r2_node_split_configure(struct b2r2_control *cont,
+		struct b2r2_node_split_job *this, struct b2r2_node *first)
 {
 	int ret;
 
@@ -594,13 +602,14 @@ int b2r2_node_split_configure(struct b2r2_node_split_job *this,
 			if (dst_w > dst->rect.width - x_pixels)
 				dst->win.width = dst->rect.width - x_pixels;
 
-			ret = configure_tile(this, node, &node);
+			ret = configure_tile(cont, this, node, &node);
 			if (ret < 0)
 				goto error;
 
 			dst->win.x += dst->dx;
 			x_pixels += max(dst->dx, -dst->dx);
-			b2r2_log_info("%s: x_pixels=%d\n", __func__, x_pixels);
+			b2r2_log_info(cont->dev, "%s: x_pixels=%d\n",
+				__func__, x_pixels);
 		}
 
 		dst->win.y += dst->dy;
@@ -610,22 +619,23 @@ int b2r2_node_split_configure(struct b2r2_node_split_job *this,
 		dst->win.width = dst_w;
 		x_pixels = 0;
 
-		b2r2_log_info("%s: y_pixels=%d\n", __func__, y_pixels);
+		b2r2_log_info(cont->dev, "%s: y_pixels=%d\n",
+			__func__, y_pixels);
 	}
 
 	return 0;
 
 error:
-	b2r2_log_warn("%s: error!\n", __func__);
+	b2r2_log_warn(cont->dev, "%s: error!\n", __func__);
 	return ret;
 }
 
 /**
  * b2r2_node_split_assign_buffers() - assigns temporary buffers to the node list
  */
-int b2r2_node_split_assign_buffers(struct b2r2_node_split_job *this,
-		struct b2r2_node *first, struct b2r2_work_buf *bufs,
-		u32 buf_count)
+int b2r2_node_split_assign_buffers(struct b2r2_control *cont,
+		struct b2r2_node_split_job *this, struct b2r2_node *first,
+		struct b2r2_work_buf *bufs, u32 buf_count)
 {
 	struct b2r2_node *node = first;
 
@@ -634,8 +644,8 @@ int b2r2_node_split_assign_buffers(struct b2r2_node_split_job *this,
 		if (node->dst_tmp_index) {
 			BUG_ON(node->dst_tmp_index > buf_count);
 
-			b2r2_log_info("%s: assigning buf %d as dst\n",
-					__func__, node->dst_tmp_index);
+			b2r2_log_info(cont->dev, "%s: assigning buf %d as "
+				"dst\n", __func__, node->dst_tmp_index);
 
 			node->node.GROUP1.B2R2_TBA =
 				bufs[node->dst_tmp_index - 1].phys_addr;
@@ -643,23 +653,23 @@ int b2r2_node_split_assign_buffers(struct b2r2_node_split_job *this,
 		if (node->src_tmp_index) {
 			u32 addr = bufs[node->src_tmp_index - 1].phys_addr;
 
-			b2r2_log_info("%s: "
-				"assigning buf %d as src %d ", __func__,
-					node->src_tmp_index, node->src_index);
+			b2r2_log_info(cont->dev, "%s: assigning buf %d as src "
+				"%d ", __func__, node->src_tmp_index,
+				node->src_index);
 
 			BUG_ON(node->src_tmp_index > buf_count);
 
 			switch (node->src_index) {
 			case 1:
-				b2r2_log_info("1\n");
+				b2r2_log_info(cont->dev, "1\n");
 				node->node.GROUP3.B2R2_SBA = addr;
 				break;
 			case 2:
-				b2r2_log_info("2\n");
+				b2r2_log_info(cont->dev, "2\n");
 				node->node.GROUP4.B2R2_SBA = addr;
 				break;
 			case 3:
-				b2r2_log_info("3\n");
+				b2r2_log_info(cont->dev, "3\n");
 				node->node.GROUP5.B2R2_SBA = addr;
 				break;
 			default:
@@ -668,7 +678,7 @@ int b2r2_node_split_assign_buffers(struct b2r2_node_split_job *this,
 			}
 		}
 
-		b2r2_log_info("%s: tba=%p\tsba=%p\n", __func__,
+		b2r2_log_info(cont->dev, "%s: tba=%p\tsba=%p\n", __func__,
 			(void *)node->node.GROUP1.B2R2_TBA,
 			(void *)node->node.GROUP4.B2R2_SBA);
 
@@ -681,8 +691,8 @@ int b2r2_node_split_assign_buffers(struct b2r2_node_split_job *this,
 /**
  * b2r2_node_split_unassign_buffers() - releases temporary buffers
  */
-void b2r2_node_split_unassign_buffers(struct b2r2_node_split_job *this,
-		struct b2r2_node *first)
+void b2r2_node_split_unassign_buffers(struct b2r2_control *cont,
+		struct b2r2_node_split_job *this, struct b2r2_node *first)
 {
 	return;
 }
@@ -690,7 +700,8 @@ void b2r2_node_split_unassign_buffers(struct b2r2_node_split_job *this,
 /**
  * b2r2_node_split_cancel() - cancels and releases a job instance
  */
-void b2r2_node_split_cancel(struct b2r2_node_split_job *this)
+void b2r2_node_split_cancel(struct b2r2_control *cont,
+		struct b2r2_node_split_job *this)
 {
 	memset(this, 0, sizeof(*this));
 
@@ -701,20 +712,23 @@ void b2r2_node_split_cancel(struct b2r2_node_split_job *this)
  * Private functions
  */
 
-static void recalculate_rects(struct b2r2_blt_req *req)
+static void recalculate_rects(struct b2r2_control *cont,
+		struct b2r2_blt_req *req)
 {
 	struct b2r2_blt_rect new_dst_rect;
 	struct b2r2_blt_rect new_src_rect;
 	struct b2r2_blt_rect new_bg_rect;
 
-	b2r2_trim_rects(req, &new_bg_rect, &new_dst_rect, &new_src_rect);
+	b2r2_trim_rects(cont,
+		req, &new_bg_rect, &new_dst_rect, &new_src_rect);
 
 	req->dst_rect = new_dst_rect;
 	req->src_rect = new_src_rect;
 	req->bg_rect = new_bg_rect;
 }
 
-static int check_rect(const struct b2r2_blt_img *img,
+static int check_rect(struct b2r2_control *cont,
+		const struct b2r2_blt_img *img,
 		const struct b2r2_blt_rect *rect,
 		const struct b2r2_blt_rect *clip)
 {
@@ -724,9 +738,9 @@ static int check_rect(const struct b2r2_blt_img *img,
 
 	/* Check rectangle dimensions*/
 	if ((rect->width <= 0) || (rect->height <= 0)) {
-		b2r2_log_warn("%s: "
-			"Illegal rect (%d, %d, %d, %d)\n",
-			__func__, rect->x, rect->y, rect->width, rect->height);
+		b2r2_log_warn(cont->dev, "%s: Illegal rect (%d, %d, %d, %d)\n",
+				__func__, rect->x, rect->y, rect->width,
+				rect->height);
 		ret = -EINVAL;
 		goto error;
 	}
@@ -747,23 +761,23 @@ static int check_rect(const struct b2r2_blt_img *img,
 
 	/* Check so that the rect isn't outside the buffer */
 	if ((l < 0) || (t < 0) || (l >= img->width) || (t >= img->height)) {
-		b2r2_log_warn("%s: "
-			"rect origin outside buffer\n", __func__);
+		b2r2_log_warn(cont->dev, "%s: rect origin outside buffer\n",
+			__func__);
 		ret = -EINVAL;
 		goto error;
 	}
 
 	if ((r > img->width) || (b > img->height)) {
-		b2r2_log_warn("%s: "
-			"rect ends outside buffer\n", __func__);
+		b2r2_log_warn(cont->dev, "%s: rect ends outside buffer\n",
+			__func__);
 		ret = -EINVAL;
 		goto error;
 	}
 
 	/* Check so the intersected rectangle isn't empty */
 	if ((l == r) || (t == b)) {
-		b2r2_log_warn("%s: "
-			"rect is empty (width or height zero)\n",
+		b2r2_log_warn(cont->dev,
+			"%s: rect is empty (width or height zero)\n",
 			__func__);
 		ret = -EINVAL;
 		goto error;
@@ -771,7 +785,7 @@ static int check_rect(const struct b2r2_blt_img *img,
 
 	return 0;
 error:
-	b2r2_log_warn("%s: Exit...\n", __func__);
+	b2r2_log_warn(cont->dev, "%s: Exit...\n", __func__);
 	return ret;
 }
 
@@ -860,7 +874,8 @@ static bool bg_format_require_ivmx(enum b2r2_blt_fmt bg_fmt,
 /**
  * analyze_fmt_conv() - analyze the format conversions needed for a job
  */
-static int analyze_fmt_conv(struct b2r2_node_split_buf *src,
+static int analyze_fmt_conv(struct b2r2_control *cont,
+		struct b2r2_node_split_buf *src,
 		struct b2r2_node_split_buf *dst,
 		const u32 **vmx, u32 *node_count)
 {
@@ -966,10 +981,12 @@ static int analyze_color_fill(struct b2r2_node_split_job *this,
 		const struct b2r2_blt_request *req, u32 *node_count)
 {
 	int ret;
+	struct b2r2_control *cont = req->instance->control;
 
 	/* Destination must be raster for raw fill to work */
 	if (this->dst.type != B2R2_FMT_TYPE_RASTER) {
-		b2r2_log_warn("%s: fill requires raster destination\n",
+		b2r2_log_warn(cont->dev,
+			"%s: fill requires raster destination\n",
 			__func__);
 		ret = -EINVAL;
 		goto error;
@@ -1012,7 +1029,7 @@ static int analyze_color_fill(struct b2r2_node_split_job *this,
 				this->src.fmt =	B2R2_BLT_FMT_32_BIT_ARGB8888;
 			} else {
 				/* Wait, what? */
-				b2r2_log_warn("%s: "
+				b2r2_log_warn(cont->dev, "%s: "
 					"Illegal destination format for fill",
 					__func__);
 				ret = -EINVAL;
@@ -1037,8 +1054,9 @@ static int analyze_color_fill(struct b2r2_node_split_job *this,
 						this->src.color);
 		}
 
-		ret = analyze_fmt_conv(&this->src, &this->dst, &this->ivmx,
-				node_count);
+		ret = analyze_fmt_conv(
+			cont, &this->src, &this->dst, &this->ivmx,
+			node_count);
 		if (ret < 0)
 			goto error;
 	}
@@ -1046,7 +1064,7 @@ static int analyze_color_fill(struct b2r2_node_split_job *this,
 	return 0;
 
 error:
-	b2r2_log_warn("%s: Exit...\n", __func__);
+	b2r2_log_warn(cont->dev, "%s: Exit...\n", __func__);
 	return ret;
 
 }
@@ -1059,10 +1077,12 @@ static int analyze_transform(struct b2r2_node_split_job *this,
 		u32 *buf_count)
 {
 	int ret;
-
 	bool is_scaling;
+#ifdef CONFIG_B2R2_DEBUG
+	struct b2r2_control *cont = req->instance->control;
+#endif
 
-	b2r2_log_info("%s\n", __func__);
+	b2r2_log_info(cont->dev, "%s\n", __func__);
 
 	/*
 	 * The transform enum is defined so that all rotation transforms are
@@ -1074,9 +1094,10 @@ static int analyze_transform(struct b2r2_node_split_job *this,
 	if (this->rotation && (this->dst.type != B2R2_FMT_TYPE_RASTER ||
 				this->dst.fmt == B2R2_BLT_FMT_Y_CB_Y_CR ||
 				this->dst.fmt == B2R2_BLT_FMT_CB_Y_CR_Y)) {
-		b2r2_log_warn("%s: Unsupported operation "
-				"(rot && (!dst_raster || dst==422R))",
-				__func__);
+		b2r2_log_warn(cont->dev,
+			"%s: Unsupported operation "
+			"(rot && (!dst_raster || dst==422R))",
+			__func__);
 		ret = -ENOSYS;
 		goto unsupported;
 	}
@@ -1105,8 +1126,8 @@ static int analyze_transform(struct b2r2_node_split_job *this,
 
 	if (is_scaling && this->rotation && this->blend) {
 		/* TODO: This is unsupported. Fix it! */
-		b2r2_log_info("%s: Unsupported operation (rot+rescale+blend)\n",
-			__func__);
+		b2r2_log_info(cont->dev, "%s: Unsupported operation "
+			"(rot+rescale+blend)\n", __func__);
 		ret = -ENOSYS;
 		goto unsupported;
 	}
@@ -1135,7 +1156,7 @@ static int analyze_transform(struct b2r2_node_split_job *this,
 	return 0;
 
 error:
-	b2r2_log_warn("%s: error!\n", __func__);
+	b2r2_log_warn(cont->dev, "%s: error!\n", __func__);
 unsupported:
 	return ret;
 }
@@ -1148,6 +1169,7 @@ static int analyze_copy(struct b2r2_node_split_job *this,
 		u32 *buf_count)
 {
 	int ret;
+	struct b2r2_control *cont = req->instance->control;
 
 	memcpy(&this->dst.win, &this->dst.rect, sizeof(this->dst.win));
 
@@ -1168,8 +1190,8 @@ static int analyze_copy(struct b2r2_node_split_job *this,
 
 		this->type = B2R2_COPY;
 
-		ret = analyze_fmt_conv(&this->src, &this->dst, &this->ivmx,
-				&copy_count);
+		ret = analyze_fmt_conv(cont, &this->src, &this->dst,
+			&this->ivmx, &copy_count);
 		if (ret < 0)
 			goto error;
 
@@ -1179,7 +1201,7 @@ static int analyze_copy(struct b2r2_node_split_job *this,
 	return 0;
 
 error:
-	b2r2_log_warn("%s: Exit...\n", __func__);
+	b2r2_log_warn(cont->dev, "%s: Exit...\n", __func__);
 	return ret;
 }
 
@@ -1202,34 +1224,30 @@ static int analyze_rot_scale_downscale(struct b2r2_node_split_job *this,
 		u32 *buf_count)
 {
 	int ret;
-
+	struct b2r2_control *cont = req->instance->control;
 	struct b2r2_node_split_buf *src = &this->src;
 	struct b2r2_node_split_buf *dst = &this->dst;
 	struct b2r2_node_split_buf *tmp = &this->tmp_bufs[0];
 
 	u32 num_rows;
 	u32 num_cols;
-
 	u32 rot_count;
 	u32 rescale_count;
-
 	u32 nodes_per_rot;
 	u32 nodes_per_rescale;
-
 	u32 right_width;
 	u32 bottom_height;
-
 	const u32 *dummy_vmx;
 
-	b2r2_log_info("%s\n", __func__);
+	b2r2_log_info(cont->dev, "%s\n", __func__);
 
 	/* Calculate the desired tmp buffer size */
-	tmp->win.width = rescale(B2R2_RESCALE_MAX_WIDTH - 1, this->h_rsf);
+	tmp->win.width = rescale(cont, B2R2_RESCALE_MAX_WIDTH - 1, this->h_rsf);
 	tmp->win.width >>= 10;
 	tmp->win.width = min(tmp->win.width, dst->rect.height);
 	tmp->win.height = dst->rect.width;
 
-	setup_tmp_buf(tmp, this->max_buf_size, dst->fmt, tmp->win.width,
+	setup_tmp_buf(cont, tmp, this->max_buf_size, dst->fmt, tmp->win.width,
 			tmp->win.height);
 	tmp->tmp_buf_index = 1;
 	this->work_bufs[0].size = tmp->pitch * tmp->height;
@@ -1254,12 +1272,12 @@ static int analyze_rot_scale_downscale(struct b2r2_node_split_job *this,
 	 * Calculate how many nodes are required to copy to and from the tmp
 	 * buffer
 	 */
-	ret = analyze_fmt_conv(src, tmp, &this->ivmx, &nodes_per_rescale);
+	ret = analyze_fmt_conv(cont, src, tmp, &this->ivmx, &nodes_per_rescale);
 	if (ret < 0)
 		goto error;
 
 	/* We will not do any format conversion in the rotation stage */
-	ret = analyze_fmt_conv(tmp, dst, &dummy_vmx, &nodes_per_rot);
+	ret = analyze_fmt_conv(cont, tmp, dst, &dummy_vmx, &nodes_per_rot);
 	if (ret < 0)
 		goto error;
 
@@ -1280,8 +1298,8 @@ static int analyze_rot_scale_downscale(struct b2r2_node_split_job *this,
 
 		rot_count += count * num_rows;
 		rescale_count += num_rows;
-		b2r2_log_info("%s: rightmost: %d nodes\n", __func__,
-				count*num_rows);
+		b2r2_log_info(cont->dev, "%s: rightmost: %d nodes\n", __func__,
+			count*num_rows);
 	}
 
 	/* Calculate node count for the bottom tiles */
@@ -1290,8 +1308,8 @@ static int analyze_rot_scale_downscale(struct b2r2_node_split_job *this,
 
 		rot_count += count * num_cols;
 		rescale_count += num_cols;
-		b2r2_log_info("%s: bottom: %d nodes\n", __func__,
-				count * num_cols);
+		b2r2_log_info(cont->dev, "%s: bottom: %d nodes\n", __func__,
+			count * num_cols);
 
 	}
 
@@ -1301,7 +1319,8 @@ static int analyze_rot_scale_downscale(struct b2r2_node_split_job *this,
 
 		rot_count += count;
 		rescale_count++;
-		b2r2_log_info("%s: bottom right: %d nodes\n", __func__, count);
+		b2r2_log_info(cont->dev, "%s: bottom right: %d nodes\n",
+			__func__, count);
 
 	}
 
@@ -1312,7 +1331,7 @@ static int analyze_rot_scale_downscale(struct b2r2_node_split_job *this,
 	return 0;
 
 error:
-	b2r2_log_warn("%s: error!\n", __func__);
+	b2r2_log_warn(cont->dev, "%s: error!\n", __func__);
 	return ret;
 }
 
@@ -1332,10 +1351,10 @@ static int analyze_rot_scale(struct b2r2_node_split_job *this,
 		u32 *buf_count)
 {
 	int ret;
-
 	bool upscale;
+	struct b2r2_control *cont = req->instance->control;
 
-	ret = analyze_scale_factors(this);
+	ret = analyze_scale_factors(cont, this);
 	if (ret < 0)
 		goto error;
 
@@ -1367,20 +1386,19 @@ static int analyze_scaling(struct b2r2_node_split_job *this,
 		u32 *buf_count)
 {
 	int ret;
-
 	u32 copy_count;
 	u32 nbr_cols;
-
 	s32 dst_w;
+	struct b2r2_control *cont = req->instance->control;
 
-	b2r2_log_info("%s\n", __func__);
+	b2r2_log_info(cont->dev, "%s\n", __func__);
 
-	ret = analyze_scale_factors(this);
+	ret = analyze_scale_factors(cont, this);
 	if (ret < 0)
 		goto error;
 
 	/* Find out how many nodes a simple copy would require */
-	ret = analyze_fmt_conv(&this->src, &this->dst, &this->ivmx,
+	ret = analyze_fmt_conv(cont, &this->src, &this->dst, &this->ivmx,
 			&copy_count);
 	if (ret < 0)
 		goto error;
@@ -1398,18 +1416,19 @@ static int analyze_scaling(struct b2r2_node_split_job *this,
 	 *
 	 *   The stripe will touch pixels 127.8 through 255.6, i.e. 129 pixels.
 	 */
-	dst_w = rescale(B2R2_RESCALE_MAX_WIDTH - 1, this->h_rsf);
+	dst_w = rescale(cont, B2R2_RESCALE_MAX_WIDTH - 1, this->h_rsf);
 	if (dst_w < (1 << 10))
 		dst_w = 1;
 	else
 		dst_w >>= 10;
 
-	b2r2_log_info("%s: dst_w=%d dst.rect.width=%d\n", __func__, dst_w,
-			this->dst.rect.width);
+	b2r2_log_info(cont->dev, "%s: dst_w=%d dst.rect.width=%d\n",
+		__func__, dst_w, this->dst.rect.width);
 
 	this->dst.win.width = min(dst_w, this->dst.rect.width);
 
-	b2r2_log_info("%s: dst.win.width=%d\n", __func__, this->dst.win.width);
+	b2r2_log_info(cont->dev, "%s: dst.win.width=%d\n",
+		__func__, this->dst.win.width);
 
 	nbr_cols = this->dst.rect.width / this->dst.win.width;
 	if (this->dst.rect.width % this->dst.win.width)
@@ -1419,12 +1438,12 @@ static int analyze_scaling(struct b2r2_node_split_job *this,
 
 	this->type = B2R2_SCALE;
 
-	b2r2_log_info("%s exit\n", __func__);
+	b2r2_log_info(cont->dev, "%s exit\n", __func__);
 
 	return 0;
 
 error:
-	b2r2_log_warn("%s: Exit...\n", __func__);
+	b2r2_log_warn(cont->dev, "%s: Exit...\n", __func__);
 	return ret;
 
 }
@@ -1437,11 +1456,11 @@ static int analyze_rotate(struct b2r2_node_split_job *this,
 		u32 *buf_count)
 {
 	int ret;
-
 	u32 nodes_per_tile;
+	struct b2r2_control *cont = req->instance->control;
 
 	/* Find out how many nodes a simple copy would require */
-	ret = analyze_fmt_conv(&this->src, &this->dst, &this->ivmx,
+	ret = analyze_fmt_conv(cont, &this->src, &this->dst, &this->ivmx,
 			&nodes_per_tile);
 	if (ret < 0)
 		goto error;
@@ -1477,7 +1496,7 @@ static int analyze_rotate(struct b2r2_node_split_job *this,
 		else
 			tmp_fmt = B2R2_BLT_FMT_32_BIT_ARGB8888;
 
-		setup_tmp_buf(tmp, this->max_buf_size, tmp_fmt,
+		setup_tmp_buf(cont, tmp, this->max_buf_size, tmp_fmt,
 				this->dst.win.width, this->dst.win.height);
 
 		tmp->tmp_buf_index = 1;
@@ -1506,14 +1525,15 @@ static int analyze_rotate(struct b2r2_node_split_job *this,
 	return 0;
 
 error:
-	b2r2_log_warn("%s: Exit...\n", __func__);
+	b2r2_log_warn(cont->dev, "%s: Exit...\n", __func__);
 	return ret;
 }
 
 /**
  * analyze_scale_factors() - determines the scale factors for the op
  */
-static int analyze_scale_factors(struct b2r2_node_split_job *this)
+static int analyze_scale_factors(struct b2r2_control *cont,
+		struct b2r2_node_split_job *this)
 {
 	int ret;
 
@@ -1521,22 +1541,22 @@ static int analyze_scale_factors(struct b2r2_node_split_job *this)
 	u16 vsf;
 
 	if (this->rotation) {
-		ret = calculate_scale_factor(this->src.rect.width,
+		ret = calculate_scale_factor(cont, this->src.rect.width,
 					this->dst.rect.height, &hsf);
 		if (ret < 0)
 			goto error;
 
-		ret = calculate_scale_factor(this->src.rect.height,
+		ret = calculate_scale_factor(cont, this->src.rect.height,
 					this->dst.rect.width, &vsf);
 		if (ret < 0)
 			goto error;
 	} else {
-		ret = calculate_scale_factor(this->src.rect.width,
+		ret = calculate_scale_factor(cont, this->src.rect.width,
 					this->dst.rect.width, &hsf);
 		if (ret < 0)
 			goto error;
 
-		ret = calculate_scale_factor(this->src.rect.height,
+		ret = calculate_scale_factor(cont, this->src.rect.height,
 					this->dst.rect.height, &vsf);
 		if (ret < 0)
 			goto error;
@@ -1548,20 +1568,21 @@ static int analyze_scale_factors(struct b2r2_node_split_job *this)
 	this->h_rsf = hsf;
 	this->v_rsf = vsf;
 
-	b2r2_log_info("%s: h_rsf=%.4x\n", __func__, this->h_rsf);
-	b2r2_log_info("%s: v_rsf=%.4x\n", __func__, this->v_rsf);
+	b2r2_log_info(cont->dev, "%s: h_rsf=%.4x\n", __func__, this->h_rsf);
+	b2r2_log_info(cont->dev, "%s: v_rsf=%.4x\n", __func__, this->v_rsf);
 
 	return 0;
 error:
-	b2r2_log_warn("%s: Exit...\n", __func__);
+	b2r2_log_warn(cont->dev, "%s: Exit...\n", __func__);
 	return ret;
 }
 
 /**
  * configure_tile() - configures one tile of a blit operation
  */
-static int configure_tile(struct b2r2_node_split_job *this,
-		struct b2r2_node *node, struct b2r2_node **next)
+static int configure_tile(struct b2r2_control *cont,
+		struct b2r2_node_split_job *this, struct b2r2_node *node,
+		struct b2r2_node **next)
 {
 	int ret = 0;
 
@@ -1625,21 +1646,22 @@ static int configure_tile(struct b2r2_node_split_job *this,
 	/* Do the configuration depending on operation type */
 	switch (this->type) {
 	case B2R2_DIRECT_FILL:
-		configure_direct_fill(node, this->src.color, dst, &last);
+		configure_direct_fill(cont, node, this->src.color, dst, &last);
 		break;
 
 	case B2R2_DIRECT_COPY:
-		configure_direct_copy(node, src, dst, &last);
+		configure_direct_copy(cont, node, src, dst, &last);
 		break;
 
 	case B2R2_FILL:
-		ret = configure_fill(node, src->color, src->fmt,
+		ret = configure_fill(cont, node, src->color, src->fmt,
 				dst, this->ivmx, &last);
 		break;
 
 	case B2R2_FLIP: /* FLIP is just a copy with different VSO/HSO */
 	case B2R2_COPY:
-		ret = configure_copy(node, src, dst, this->ivmx, &last, this);
+		ret = configure_copy(
+			cont, node, src, dst, this->ivmx, &last, this);
 		break;
 
 	case B2R2_ROTATE:
@@ -1647,8 +1669,8 @@ static int configure_tile(struct b2r2_node_split_job *this,
 			struct b2r2_node_split_buf *tmp = &this->tmp_bufs[0];
 
 			if (this->blend) {
-				b2r2_log_info("%s: rotation + blend\n",
-						__func__);
+				b2r2_log_info(cont->dev, "%s: rotation + "
+						"blend\n", __func__);
 
 				tmp->win.x = 0;
 				tmp->win.y = tmp->win.height - 1;
@@ -1656,33 +1678,33 @@ static int configure_tile(struct b2r2_node_split_job *this,
 				tmp->win.height = dst->win.height;
 
 				/* Rotate to the temp buf */
-				ret = configure_rotate(node, src, tmp,
+				ret = configure_rotate(cont, node, src, tmp,
 						this->ivmx, &node, NULL);
 				if (ret < 0)
 					goto error;
 
 				/* Then do a copy to the destination */
-				ret = configure_copy(node, tmp, dst, NULL,
+				ret = configure_copy(cont, node, tmp, dst, NULL,
 						&last, this);
 			} else {
 				/* Just do a rotation */
-				ret = configure_rotate(node, src, dst,
+				ret = configure_rotate(cont, node, src, dst,
 						this->ivmx, &last, this);
 			}
 		}
 		break;
 
 	case B2R2_SCALE:
-		ret = configure_scale(node, src, dst, this->h_rsf, this->v_rsf,
-				this->ivmx, &last, this);
+		ret = configure_scale(cont, node, src, dst, this->h_rsf,
+				this->v_rsf, this->ivmx, &last, this);
 		break;
 
 	case B2R2_SCALE_AND_ROTATE:
-		ret = configure_rot_scale(this, node, &last);
+		ret = configure_rot_scale(cont, this, node, &last);
 		break;
 
 	default:
-		b2r2_log_warn("%s: Unsupported request\n", __func__);
+		b2r2_log_warn(cont->dev, "%s: Unsupported request\n", __func__);
 		ret = -ENOSYS;
 		goto error;
 		break;
@@ -1698,7 +1720,7 @@ static int configure_tile(struct b2r2_node_split_job *this,
 		/* Configure blending and clipping */
 		do {
 			if (node == NULL) {
-				b2r2_log_warn("%s: "
+				b2r2_log_warn(cont->dev, "%s: "
 					"Internal error! Out of nodes!\n",
 					__func__);
 				ret = -ENOMEM;
@@ -1706,18 +1728,17 @@ static int configure_tile(struct b2r2_node_split_job *this,
 			}
 
 			if (this->blend) {
-				if (this->flags & B2R2_BLT_FLAG_BG_BLEND) {
-					configure_bg(node, bg,
+				if (this->flags & B2R2_BLT_FLAG_BG_BLEND)
+					configure_bg(cont, node, bg,
 							this->swap_fg_bg);
-				} else {
-					configure_bg(node, dst,
+				else
+					configure_bg(cont, node, dst,
 							this->swap_fg_bg);
-				}
-				configure_blend(node, this->flags,
+				configure_blend(cont, node, this->flags,
 						this->global_alpha);
 			}
 			if (this->clip)
-				configure_clip(node, &this->clip_rect);
+				configure_clip(cont, node, &this->clip_rect);
 
 			node = node->next;
 
@@ -1730,7 +1751,7 @@ static int configure_tile(struct b2r2_node_split_job *this,
 	return 0;
 
 error:
-	b2r2_log_warn("%s: Error!\n", __func__);
+	b2r2_log_warn(cont->dev, "%s: Error!\n", __func__);
 	return ret;
 }
 
@@ -1740,7 +1761,8 @@ error:
  * This functions configures a set of nodes for rotation using the destination
  * window instead of the rectangle for calculating tiles.
  */
-static int configure_sub_rot(struct b2r2_node *node,
+static int configure_sub_rot(struct b2r2_control *cont,
+		struct b2r2_node *node,
 		struct b2r2_node_split_buf *src,
 		struct b2r2_node_split_buf *dst,
 		const u32 *ivmx, struct b2r2_node **next,
@@ -1757,7 +1779,7 @@ static int configure_sub_rot(struct b2r2_node *node,
 	memcpy(&src_win, &src->win, sizeof(src_win));
 	memcpy(&dst_win, &dst->win, sizeof(dst_win));
 
-	b2r2_log_info("%s: src_win=(%d, %d, %d, %d) "
+	b2r2_log_info(cont->dev, "%s: src_win=(%d, %d, %d, %d) "
 			"dst_win=(%d, %d, %d, %d)\n", __func__,
 			src_win.x, src_win.y, src_win.width, src_win.height,
 			dst_win.x, dst_win.y, dst_win.width, dst_win.height);
@@ -1772,21 +1794,23 @@ static int configure_sub_rot(struct b2r2_node *node,
 		u32 dst_y = dst->win.y;
 		u32 dst_h = dst->win.height;
 
-		dst->win.width = min(dst->win.width,
-				dst_win.width - (int)x_pixels);
+		dst->win.width = min(dst->win.width, dst_win.width -
+			(int)x_pixels);
 		src->win.height = dst->win.width;
 
-		b2r2_log_info("%s: x_pixels=%d\n", __func__, x_pixels);
+		b2r2_log_info(cont->dev, "%s: x_pixels=%d\n",
+			__func__, x_pixels);
 
 		while (y_pixels < dst_win.height) {
 			dst->win.height = min(dst->win.height,
 					dst_win.height - (int)y_pixels);
 			src->win.width = dst->win.height;
 
-			b2r2_log_info("%s: y_pixels=%d\n", __func__, y_pixels);
+			b2r2_log_info(cont->dev, "%s: y_pixels=%d\n",
+				__func__, y_pixels);
 
-			ret = configure_rotate(node, src, dst, ivmx, &node,
-					job);
+			ret = configure_rotate(cont, node, src, dst,
+				ivmx, &node, job);
 			if (ret < 0)
 				goto error;
 
@@ -1821,7 +1845,7 @@ static int configure_sub_rot(struct b2r2_node *node,
 	return 0;
 
 error:
-	b2r2_log_warn("%s: error!\n", __func__);
+	b2r2_log_warn(cont->dev, "%s: error!\n", __func__);
 	return ret;
 }
 
@@ -1830,8 +1854,9 @@ error:
  *
  * When doing a downscale it is better to do the rotation last.
  */
-static int configure_rot_downscale(struct b2r2_node_split_job *this,
-		struct b2r2_node *node, struct b2r2_node **next)
+static int configure_rot_downscale(struct b2r2_control *cont,
+		struct b2r2_node_split_job *this,
+		struct b2r2_node *node,	struct b2r2_node **next)
 {
 	int ret;
 
@@ -1844,12 +1869,12 @@ static int configure_rot_downscale(struct b2r2_node_split_job *this,
 	tmp->win.width = dst->win.height;
 	tmp->win.height = dst->win.width;
 
-	ret = configure_scale(node, src, tmp, this->h_rsf, this->v_rsf,
+	ret = configure_scale(cont, node, src, tmp, this->h_rsf, this->v_rsf,
 			this->ivmx, &node, this);
 	if (ret < 0)
 		goto error;
 
-	ret = configure_sub_rot(node, tmp, dst, NULL, &node, this);
+	ret = configure_sub_rot(cont, node, tmp, dst, NULL, &node, this);
 	if (ret < 0)
 		goto error;
 
@@ -1858,7 +1883,7 @@ static int configure_rot_downscale(struct b2r2_node_split_job *this,
 	return 0;
 
 error:
-	b2r2_log_info("%s: error!\n", __func__);
+	b2r2_log_info(cont->dev, "%s: error!\n", __func__);
 	return ret;
 }
 
@@ -1867,27 +1892,29 @@ error:
  *
  * When doing an upscale it is better to do the rotation first.
  */
-static int configure_rot_upscale(struct b2r2_node_split_job *this,
-		struct b2r2_node *node, struct b2r2_node **next)
+static int configure_rot_upscale(struct b2r2_control *cont,
+		struct b2r2_node_split_job *this, struct b2r2_node *node,
+		struct b2r2_node **next)
 {
 	/* TODO: Implement a optimal upscale (rotation first) */
-	return configure_rot_downscale(this, node, next);
+	return configure_rot_downscale(cont, this, node, next);
 }
 
 /**
  * configure_rot_scale() - configures a combined rotation and scaling op
  */
-static int configure_rot_scale(struct b2r2_node_split_job *this,
-		struct b2r2_node *node, struct b2r2_node **next)
+static int configure_rot_scale(struct b2r2_control *cont,
+		struct b2r2_node_split_job *this, struct b2r2_node *node,
+		struct b2r2_node **next)
 {
 	int ret;
 
 	bool upscale = (u32)this->h_rsf * (u32)this->v_rsf < (1 << 10);
 
 	if (upscale)
-		ret = configure_rot_upscale(this, node, next);
+		ret = configure_rot_upscale(cont, this, node, next);
 	else
-		ret = configure_rot_downscale(this, node, next);
+		ret = configure_rot_downscale(cont, this, node, next);
 
 	if (ret < 0)
 		goto error;
@@ -1895,7 +1922,7 @@ static int configure_rot_scale(struct b2r2_node_split_job *this,
 	return 0;
 
 error:
-	b2r2_log_warn("%s: error!\n", __func__);
+	b2r2_log_warn(cont->dev, "%s: error!\n", __func__);
 	return ret;
 }
 
@@ -1909,8 +1936,12 @@ error:
  *
  * This operation will always consume one node only.
  */
-static void configure_direct_fill(struct b2r2_node *node, u32 color,
-		struct b2r2_node_split_buf *dst, struct b2r2_node **next)
+static void configure_direct_fill(
+		struct b2r2_control *cont,
+		struct b2r2_node *node,
+		u32 color,
+		struct b2r2_node_split_buf *dst,
+		struct b2r2_node **next)
 {
 	node->node.GROUP0.B2R2_CIC |= B2R2_CIC_COLOR_FILL | B2R2_CIC_SOURCE_1;
 	node->node.GROUP0.B2R2_INS |= B2R2_INS_SOURCE_1_DIRECT_FILL;
@@ -1939,9 +1970,12 @@ static void configure_direct_fill(struct b2r2_node *node, u32 color,
  *
  * This operation will always consume one node only.
  */
-static void configure_direct_copy(struct b2r2_node *node,
+static void configure_direct_copy(
+		struct b2r2_control *cont,
+		struct b2r2_node *node,
 		struct b2r2_node_split_buf *src,
-		struct b2r2_node_split_buf *dst, struct b2r2_node **next)
+		struct b2r2_node_split_buf *dst,
+		struct b2r2_node **next)
 {
 	node->node.GROUP0.B2R2_CIC |= B2R2_CIC_SOURCE_1;
 	node->node.GROUP0.B2R2_INS |= B2R2_INS_SOURCE_1_DIRECT_COPY;
@@ -1971,21 +2005,26 @@ static void configure_direct_copy(struct b2r2_node *node,
  * This operation will consume as many nodes as are required to write to the
  * destination format.
  */
-static int configure_fill(struct b2r2_node *node, u32 color,
-		enum b2r2_blt_fmt fmt, struct b2r2_node_split_buf *dst,
-		const u32 *ivmx, struct b2r2_node **next)
+static int configure_fill(
+		struct b2r2_control *cont,
+		struct b2r2_node *node,
+		u32 color,
+		enum b2r2_blt_fmt fmt,
+		struct b2r2_node_split_buf *dst,
+		const u32 *ivmx,
+		struct b2r2_node **next)
 {
 	int ret;
 	struct b2r2_node *last;
 
 	/* Configure the destination */
-	ret = configure_dst(node, dst, ivmx, &last);
+	ret = configure_dst(cont, node, dst, ivmx, &last);
 	if (ret < 0)
 		goto error;
 
 	do {
 		if (node == NULL) {
-			b2r2_log_warn("%s: "
+			b2r2_log_warn(cont->dev, "%s: "
 			"Internal error! Out of nodes!\n", __func__);
 			ret = -ENOMEM;
 			goto error;
@@ -2044,7 +2083,7 @@ static int configure_fill(struct b2r2_node *node, u32 color,
 
 	return 0;
 error:
-	b2r2_log_warn("%s: Exit...\n", __func__);
+	b2r2_log_warn(cont->dev, "%s: Exit...\n", __func__);
 	return ret;
 }
 
@@ -2060,9 +2099,12 @@ error:
  * This operation will consume as many nodes as are required to write to the
  * destination format.
  */
-static int configure_copy(struct b2r2_node *node,
+static int configure_copy(
+		struct b2r2_control *cont,
+		struct b2r2_node *node,
 		struct b2r2_node_split_buf *src,
-		struct b2r2_node_split_buf *dst, const u32 *ivmx,
+		struct b2r2_node_split_buf *dst,
+		const u32 *ivmx,
 		struct b2r2_node **next,
 		struct b2r2_node_split_job *this)
 {
@@ -2070,15 +2112,16 @@ static int configure_copy(struct b2r2_node *node,
 
 	struct b2r2_node *last;
 
-	ret = configure_dst(node, dst, ivmx, &last);
+	ret = configure_dst(cont, node, dst, ivmx, &last);
 	if (ret < 0)
 		goto error;
 
 	/* Configure the source for each node */
 	do {
 		if (node == NULL) {
-			b2r2_log_warn("%s: "
-			" Internal error! Out of nodes!\n", __func__);
+			b2r2_log_warn(cont->dev, "%s: "
+				" Internal error! Out of nodes!\n",
+				__func__);
 			ret = -ENOMEM;
 			goto error;
 		}
@@ -2116,7 +2159,7 @@ static int configure_copy(struct b2r2_node *node,
 			node->node.GROUP7.B2R2_CML = request->clut_phys_addr;
 		}
 		/* Configure the source(s) */
-		configure_src(node, src, ivmx);
+		configure_src(cont, node, src, ivmx);
 
 		node = node->next;
 	} while (node != last);
@@ -2126,7 +2169,7 @@ static int configure_copy(struct b2r2_node *node,
 
 	return 0;
 error:
-	b2r2_log_warn("%s: Exit...\n", __func__);
+	b2r2_log_warn(cont->dev, "%s: Exit...\n", __func__);
 	return ret;
 }
 
@@ -2142,9 +2185,12 @@ error:
  * This operation will consume as many nodes are are required by the combination
  * of rotating and writing the destination format.
  */
-static int configure_rotate(struct b2r2_node *node,
+static int configure_rotate(
+		struct b2r2_control *cont,
+		struct b2r2_node *node,
 		struct b2r2_node_split_buf *src,
-		struct b2r2_node_split_buf *dst, const u32 *ivmx,
+		struct b2r2_node_split_buf *dst,
+		const u32 *ivmx,
 		struct b2r2_node **next,
 		struct b2r2_node_split_job *this)
 {
@@ -2152,21 +2198,22 @@ static int configure_rotate(struct b2r2_node *node,
 
 	struct b2r2_node *last;
 
-	ret = configure_copy(node, src, dst, ivmx, &last, this);
+	ret = configure_copy(cont, node, src, dst, ivmx, &last, this);
 	if (ret < 0)
 		goto error;
 
 	do {
 		if (node == NULL) {
-			b2r2_log_warn("%s: "
-				"Internal error! Out of nodes!\n", __func__);
+			b2r2_log_warn(cont->dev, "%s: "
+				"Internal error! Out of nodes!\n",
+				__func__);
 			ret = -ENOMEM;
 			goto error;
 		}
 
 		node->node.GROUP0.B2R2_INS |= B2R2_INS_ROTATION_ENABLED;
 
-		b2r2_log_debug("%s:\n"
+		b2r2_log_debug(cont->dev, "%s:\n"
 				"\tB2R2_TXY:  %.8x\tB2R2_TSZ:  %.8x\n"
 				"\tB2R2_S1XY: %.8x\tB2R2_S1SZ: %.8x\n"
 				"\tB2R2_S2XY: %.8x\tB2R2_S2SZ: %.8x\n"
@@ -2190,7 +2237,7 @@ static int configure_rotate(struct b2r2_node *node,
 
 	return 0;
 error:
-	b2r2_log_warn("%s: error!\n", __func__);
+	b2r2_log_warn(cont->dev, "%s: error!\n", __func__);
 	return ret;
 }
 
@@ -2205,7 +2252,9 @@ error:
  * @ivmx  - the iVMX to use for color conversion
  * @next  - the next empty node in the node list
  */
-static int configure_scale(struct b2r2_node *node,
+static int configure_scale(
+		struct b2r2_control *cont,
+		struct b2r2_node *node,
 		struct b2r2_node_split_buf *src,
 		struct b2r2_node_split_buf *dst,
 		u16 h_rsf, u16 v_rsf,
@@ -2250,6 +2299,8 @@ static int configure_scale(struct b2r2_node *node,
 	bool downsample;
 
 	struct b2r2_blt_rect tmp_win = src->win;
+	bool src_raster = src->type == B2R2_FMT_TYPE_RASTER;
+	bool dst_raster = dst->type == B2R2_FMT_TYPE_RASTER;
 
 	/* Rescale the normalized source window */
 	src_x = inv_rescale(src->win.x - src->rect.x, luma_h_rsf);
@@ -2277,8 +2328,7 @@ static int configure_scale(struct b2r2_node *node,
 	luma_vsrc_init = src_y & 0x3ff;
 
 	/* Check for upsampling of chroma */
-	upsample = src->type != B2R2_FMT_TYPE_RASTER &&
-		!is_yuv444_fmt(src->fmt);
+	upsample = !src_raster && !is_yuv444_fmt(src->fmt);
 	if (upsample) {
 		h_rsf /= 2;
 
@@ -2287,8 +2337,7 @@ static int configure_scale(struct b2r2_node *node,
 	}
 
 	/* Check for downsampling of chroma */
-	downsample = dst->type != B2R2_FMT_TYPE_RASTER &&
-		!is_yuv444_fmt(dst->fmt);
+	downsample = !dst_raster && !is_yuv444_fmt(dst->fmt);
 	if (downsample) {
 		h_rsf *= 2;
 
@@ -2303,9 +2352,9 @@ static int configure_scale(struct b2r2_node *node,
 
 	/* Configure resize and filters */
 	fctl = B2R2_FCTL_HF2D_MODE_ENABLE_RESIZER |
-		B2R2_FCTL_VF2D_MODE_ENABLE_RESIZER;
+			B2R2_FCTL_VF2D_MODE_ENABLE_RESIZER;
 	luma_fctl = B2R2_FCTL_LUMA_HF2D_MODE_ENABLE_RESIZER |
-		B2R2_FCTL_LUMA_VF2D_MODE_ENABLE_RESIZER;
+			B2R2_FCTL_LUMA_VF2D_MODE_ENABLE_RESIZER;
 
 	rsf =  (h_rsf << B2R2_RSF_HSRC_INC_SHIFT) |
 			(v_rsf << B2R2_RSF_VSRC_INC_SHIFT);
@@ -2313,13 +2362,13 @@ static int configure_scale(struct b2r2_node *node,
 			(luma_v_rsf << B2R2_RSF_VSRC_INC_SHIFT);
 
 	rzi = B2R2_RZI_DEFAULT_HNB_REPEAT |
-		(2 << B2R2_RZI_VNB_REPEAT_SHIFT) |
-		(hsrc_init << B2R2_RZI_HSRC_INIT_SHIFT) |
-		(vsrc_init << B2R2_RZI_VSRC_INIT_SHIFT);
+			(2 << B2R2_RZI_VNB_REPEAT_SHIFT) |
+			(hsrc_init << B2R2_RZI_HSRC_INIT_SHIFT) |
+			(vsrc_init << B2R2_RZI_VSRC_INIT_SHIFT);
 	luma_rzi = B2R2_RZI_DEFAULT_HNB_REPEAT |
-		(2 << B2R2_RZI_VNB_REPEAT_SHIFT) |
-		(luma_hsrc_init << B2R2_RZI_HSRC_INIT_SHIFT) |
-		(luma_vsrc_init << B2R2_RZI_VSRC_INIT_SHIFT);
+			(2 << B2R2_RZI_VNB_REPEAT_SHIFT) |
+			(luma_hsrc_init << B2R2_RZI_HSRC_INIT_SHIFT) |
+			(luma_vsrc_init << B2R2_RZI_VSRC_INIT_SHIFT);
 
 	/*
 	 * We should only filter if there is an actual rescale (i.e. not when
@@ -2354,28 +2403,27 @@ static int configure_scale(struct b2r2_node *node,
 		luma_vfp = luma_vf->v_coeffs_phys_addr;
 	}
 
-	ret = configure_copy(node, src, dst, ivmx, &last, this);
+	ret = configure_copy(cont, node, src, dst, ivmx, &last, this);
 	if (ret < 0)
 		goto error;
 
 	do {
 		bool chroma_rescale =
-			(h_rsf != (1 << 10)) || (v_rsf != (1 << 10));
+				(h_rsf != (1 << 10)) || (v_rsf != (1 << 10));
 		bool luma_rescale =
-			(luma_h_rsf != (1 << 10)) || (luma_v_rsf != (1 << 10));
-		bool src_raster = src->type == B2R2_FMT_TYPE_RASTER;
-		bool dst_raster = dst->type == B2R2_FMT_TYPE_RASTER;
-		bool dst_chroma =
-			node->node.GROUP1.B2R2_TTY & B2R2_TTY_CHROMA_NOT_LUMA;
+				(luma_h_rsf != (1 << 10)) ||
+				(luma_v_rsf != (1 << 10));
+		bool dst_chroma = node->node.GROUP1.B2R2_TTY &
+				B2R2_TTY_CHROMA_NOT_LUMA;
+		bool dst_luma = !dst_chroma;
 
 		if (node == NULL) {
-			b2r2_log_warn("%s: "
-				"Internal error! Out of nodes!\n", __func__);
+			b2r2_log_warn(cont->dev, "%s: Internal error! Out "
+					"of nodes!\n", __func__);
 			ret = -ENOMEM;
 			goto error;
 		}
 
-
 		node->node.GROUP0.B2R2_CIC |= B2R2_CIC_FILTER_CONTROL;
 
 		/*
@@ -2391,10 +2439,10 @@ static int configure_scale(struct b2r2_node *node,
 		 */
 
 		if (!src_raster || (chroma_rescale &&
-					(dst_raster || dst_chroma))) {
+				(dst_raster || dst_chroma))) {
 			/* Enable chroma resize */
 			node->node.GROUP0.B2R2_INS |=
-				B2R2_INS_RESCALE2D_ENABLED;
+					B2R2_INS_RESCALE2D_ENABLED;
 			node->node.GROUP0.B2R2_CIC |= B2R2_CIC_RESIZE_CHROMA;
 			node->node.GROUP8.B2R2_FCTL |= fctl;
 
@@ -2405,10 +2453,10 @@ static int configure_scale(struct b2r2_node *node,
 		}
 
 		if (!src_raster || (luma_rescale &&
-					(dst_raster || !dst_chroma))) {
+				(dst_raster || dst_luma))) {
 			/* Enable luma resize */
 			node->node.GROUP0.B2R2_INS |=
-				B2R2_INS_RESCALE2D_ENABLED;
+					B2R2_INS_RESCALE2D_ENABLED;
 			node->node.GROUP0.B2R2_CIC |= B2R2_CIC_RESIZE_LUMA;
 			node->node.GROUP8.B2R2_FCTL |= luma_fctl;
 
@@ -2442,7 +2490,7 @@ static int configure_scale(struct b2r2_node *node,
 			}
 		}
 
-		b2r2_log_info("%s:\n"
+		b2r2_log_info(cont->dev, "%s:\n"
 				"\tB2R2_TXY:  %.8x\tB2R2_TSZ:  %.8x\n"
 				"\tB2R2_S1XY: %.8x\tB2R2_S1SZ: %.8x\n"
 				"\tB2R2_S2XY: %.8x\tB2R2_S2SZ: %.8x\n"
@@ -2468,7 +2516,7 @@ static int configure_scale(struct b2r2_node *node,
 
 	return 0;
 error:
-	b2r2_log_warn("%s: Exit...\n", __func__);
+	b2r2_log_warn(cont->dev, "%s: Exit...\n", __func__);
 	return ret;
 }
 
@@ -2481,12 +2529,14 @@ error:
  *
  * This operation will not consume any nodes
  */
-static void configure_src(struct b2r2_node *node,
+static void configure_src(struct b2r2_control *cont,
+		struct b2r2_node *node,
 		struct b2r2_node_split_buf *src, const u32 *ivmx)
 {
 	struct b2r2_node_split_buf tmp_buf;
 
-	b2r2_log_info("%s: src.win=(%d, %d, %d, %d)\n", __func__,
+	b2r2_log_info(cont->dev,
+			"%s: src.win=(%d, %d, %d, %d)\n", __func__,
 			src->win.x, src->win.y, src->win.width,
 			src->win.height);
 
@@ -2508,7 +2558,7 @@ static void configure_src(struct b2r2_node *node,
 
 			if (is_yuv420_fmt(src->fmt)) {
 				tmp_buf.win.height =
-					(tmp_buf.win.height + 1) / 2;
+						(tmp_buf.win.height + 1) / 2;
 				tmp_buf.win.y >>= 1;
 			}
 		}
@@ -2536,7 +2586,7 @@ static void configure_src(struct b2r2_node *node,
 			 */
 			if (is_yuv420_fmt(src->fmt)) {
 				tmp_buf.win.height =
-					(tmp_buf.win.height + 1) / 2;
+						(tmp_buf.win.height + 1) / 2;
 				tmp_buf.win.y >>= 1;
 			}
 		}
@@ -2572,10 +2622,12 @@ static void configure_src(struct b2r2_node *node,
  * WARNING: Take care when using this with semi-planar or planar sources since
  *          either S1 or S2 will be overwritten!
  */
-static void configure_bg(struct b2r2_node *node,
+static void configure_bg(struct b2r2_control *cont,
+		struct b2r2_node *node,
 		struct b2r2_node_split_buf *bg, bool swap_fg_bg)
 {
-	b2r2_log_info("%s: bg.win=(%d, %d, %d, %d)\n", __func__,
+	b2r2_log_info(cont->dev,
+			"%s: bg.win=(%d, %d, %d, %d)\n", __func__,
 			bg->win.x, bg->win.y, bg->win.width,
 			bg->win.height);
 
@@ -2614,7 +2666,7 @@ static void configure_bg(struct b2r2_node *node,
  * This operation will consume as many nodes as are required to write the
  * destination format.
  */
-static int configure_dst(struct b2r2_node *node,
+static int configure_dst(struct b2r2_control *cont, struct b2r2_node *node,
 		struct b2r2_node_split_buf *dst, const u32 *ivmx,
 		struct b2r2_node **next)
 {
@@ -2624,9 +2676,10 @@ static int configure_dst(struct b2r2_node *node,
 
 	struct b2r2_node_split_buf dst_planes[3];
 
-	b2r2_log_info("%s: dst.win=(%d, %d, %d, %d)\n", __func__,
-			dst->win.x, dst->win.y, dst->win.width,
-			dst->win.height);
+	b2r2_log_info(cont->dev,
+		"%s: dst.win=(%d, %d, %d, %d)\n", __func__,
+		dst->win.x, dst->win.y, dst->win.width,
+		dst->win.height);
 
 	memcpy(&dst_planes[0], dst, sizeof(dst_planes[0]));
 
@@ -2691,7 +2744,7 @@ static int configure_dst(struct b2r2_node *node,
 	for (i = 0; i < nbr_planes; i++) {
 
 		if (node == NULL) {
-			b2r2_log_warn("%s: "
+			b2r2_log_warn(cont->dev, "%s: "
 				"Internal error! Out of nodes!\n", __func__);
 			ret = -ENOMEM;
 			goto error;
@@ -2729,7 +2782,6 @@ static int configure_dst(struct b2r2_node *node,
 			}
 		}
 
-
 		set_target(node, dst_planes[i].addr, &dst_planes[i]);
 
 		node = node->next;
@@ -2740,7 +2792,7 @@ static int configure_dst(struct b2r2_node *node,
 
 	return 0;
 error:
-	b2r2_log_warn("%s: Exit...\n", __func__);
+	b2r2_log_warn(cont->dev, "%s: Exit...\n", __func__);
 	return ret;
 
 }
@@ -2760,7 +2812,8 @@ error:
  * WARNING: Take care when using this with semi-planar or planar sources since
  *          either S1 or S2 will be overwritten!
  */
-static void configure_blend(struct b2r2_node *node, u32 flags, u32 global_alpha)
+static void configure_blend(struct b2r2_control *cont,
+		struct b2r2_node *node, u32 flags, u32 global_alpha)
 {
 	node->node.GROUP0.B2R2_ACK &= ~(B2R2_ACK_MODE_BYPASS_S2_S3);
 
@@ -2792,7 +2845,7 @@ static void configure_blend(struct b2r2_node *node, u32 flags, u32 global_alpha)
  *
  *  This operation does not consume any nodes.
  */
-static void configure_clip(struct b2r2_node *node,
+static void configure_clip(struct b2r2_control *cont, struct b2r2_node *node,
 		struct b2r2_blt_rect *clip_rect)
 {
 	s32 l = clip_rect->x;
@@ -2821,9 +2874,13 @@ static void configure_clip(struct b2r2_node *node,
  * @color_fill - determines whether the buffer should be used for color fill
  * @color      - the color to use in case of color fill
  */
-static void set_buf(struct b2r2_node_split_buf *buf, u32 addr,
+static void set_buf(struct b2r2_control *cont,
+		struct b2r2_node_split_buf *buf,
+		u32 addr,
 		const struct b2r2_blt_img *img,
-		const struct b2r2_blt_rect *rect, bool color_fill, u32 color)
+		const struct b2r2_blt_rect *rect,
+		bool color_fill,
+		u32 color)
 {
 	memset(buf, 0, sizeof(*buf));
 
@@ -2895,8 +2952,12 @@ static void set_buf(struct b2r2_node_split_buf *buf, u32 addr,
 /**
  * setup_tmp_buf() - configure a temporary buffer
  */
-static int setup_tmp_buf(struct b2r2_node_split_buf *tmp, u32 max_size,
-		enum b2r2_blt_fmt pref_fmt, u32 pref_width, u32 pref_height)
+static int setup_tmp_buf(struct b2r2_control *cont,
+		struct b2r2_node_split_buf *tmp,
+		u32 max_size,
+		enum b2r2_blt_fmt pref_fmt,
+		u32 pref_width,
+		u32 pref_height)
 {
 	int ret;
 
@@ -2918,9 +2979,9 @@ static int setup_tmp_buf(struct b2r2_node_split_buf *tmp, u32 max_size,
 		fmt = B2R2_BLT_FMT_32_BIT_AYUV8888;
 	} else {
 		/* Wait, what? */
-		b2r2_log_warn("%s: "
-			"Cannot create tmp buf from this fmt (%d)\n", __func__,
-			pref_fmt);
+		b2r2_log_warn(cont->dev, "%s: "
+			"Cannot create tmp buf from this fmt (%d)\n",
+			__func__, pref_fmt);
 		ret = -EINVAL;
 		goto error;
 	}
@@ -2941,7 +3002,7 @@ static int setup_tmp_buf(struct b2r2_node_split_buf *tmp, u32 max_size,
 
 	/* We should at least have enough room for one scanline */
 	if (height == 0) {
-		b2r2_log_warn("%s: Not enough tmp mem!\n",
+		b2r2_log_warn(cont->dev, "%s: Not enough tmp mem!\n",
 			__func__);
 		ret = -ENOMEM;
 		goto error;
@@ -2961,7 +3022,7 @@ static int setup_tmp_buf(struct b2r2_node_split_buf *tmp, u32 max_size,
 
 	return 0;
 error:
-	b2r2_log_warn("%s: Exit...\n", __func__);
+	b2r2_log_warn(cont->dev, "%s: Exit...\n", __func__);
 	return ret;
 
 }
@@ -3449,12 +3510,12 @@ static bool is_transform(const struct b2r2_blt_request *req)
  *
  * Returns the rescaled dimension in 22.10 fixed point format.
  */
-static s32 rescale(s32 dim, u16 sf)
+static s32 rescale(struct b2r2_control *cont, s32 dim, u16 sf)
 {
-	b2r2_log_info("%s\n", __func__);
+	b2r2_log_info(cont->dev, "%s\n", __func__);
 
 	if (sf == 0) {
-		b2r2_log_err("%s: Scale factor is 0!\n", __func__);
+		b2r2_log_err(cont->dev, "%s: Scale factor is 0!\n", __func__);
 		BUG_ON(1);
 	}
 
@@ -3662,14 +3723,12 @@ static void reset_nodes(struct b2r2_node *node)
 	}
 }
 
-int b2r2_node_split_init(void)
+int b2r2_node_split_init(struct b2r2_control *cont)
 {
-	b2r2_filters_init();
-
 	return 0;
 }
 
-void b2r2_node_split_exit(void)
+void b2r2_node_split_exit(struct b2r2_control *cont)
 {
-	b2r2_filters_exit();
+
 }
diff --git a/drivers/video/b2r2/b2r2_node_split.h b/drivers/video/b2r2/b2r2_node_split.h
index 5bceac28488..a577241c31b 100644
--- a/drivers/video/b2r2/b2r2_node_split.h
+++ b/drivers/video/b2r2/b2r2_node_split.h
@@ -54,8 +54,8 @@ int b2r2_node_split_analyze(const struct b2r2_blt_request *req, u32 max_buf_size
  * Returns:
  *   A negative value if an error occurred, 0 otherwise.
  */
-int b2r2_node_split_configure(struct b2r2_node_split_job *job,
-		struct b2r2_node *first);
+int b2r2_node_split_configure(struct b2r2_control *cont,
+		struct b2r2_node_split_job *job, struct b2r2_node *first);
 
 /**
  * b2r2_node_split_assign_buffers() - Assignes physical addresses
@@ -74,7 +74,8 @@ int b2r2_node_split_configure(struct b2r2_node_split_job *job,
  * Returns:
  *   A negative value if an error occurred, 0 otherwise.
  */
-int b2r2_node_split_assign_buffers(struct b2r2_node_split_job *job,
+int b2r2_node_split_assign_buffers(struct b2r2_control *cont,
+		struct b2r2_node_split_job *job,
 		struct b2r2_node *first, struct b2r2_work_buf *bufs,
 		u32 buf_count);
 
@@ -89,7 +90,8 @@ int b2r2_node_split_assign_buffers(struct b2r2_node_split_job *job,
  * This makes it possible to reuse the node list with new buffers by calling
  * b2r2_node_split_assign_buffers again. Useful for caching node lists.
  */
-void b2r2_node_split_unassign_buffers(struct b2r2_node_split_job *job,
+void b2r2_node_split_unassign_buffers(struct b2r2_control *cont,
+		struct b2r2_node_split_job *job,
 		struct b2r2_node *first);
 
 /**
@@ -102,20 +104,21 @@ void b2r2_node_split_unassign_buffers(struct b2r2_node_split_job *job,
  * This should always be called once b2r2_node_split_analyze has been called
  * in order to release any resources allocated while analyzing.
  */
-void b2r2_node_split_cancel(struct b2r2_node_split_job *job);
+void b2r2_node_split_cancel(struct b2r2_control *cont,
+		struct b2r2_node_split_job *job);
 
 /**
  * b2r2_node_split_init() - Initializes the node split module
  *
  * Initializes the node split module and creates debugfs files.
  */
-int b2r2_node_split_init(void);
+int b2r2_node_split_init(struct b2r2_control *cont);
 
 /**
  * b2r2_node_split_exit() - Deinitializes the node split module
  *
  * Releases all resources for the node split module.
  */
-void b2r2_node_split_exit(void);
+void b2r2_node_split_exit(struct b2r2_control *cont);
 
 #endif
diff --git a/drivers/video/b2r2/b2r2_profiler/b2r2_profiler.c b/drivers/video/b2r2/b2r2_profiler/b2r2_profiler.c
index 2e7c5ca5a7a..e038941b4e8 100644
--- a/drivers/video/b2r2/b2r2_profiler/b2r2_profiler.c
+++ b/drivers/video/b2r2/b2r2_profiler/b2r2_profiler.c
@@ -32,10 +32,10 @@ module_param(print_blts_on, bool, S_IRUGO | S_IWUSR);
 static int use_mpix_per_second_in_print_blts = 1;
 module_param(use_mpix_per_second_in_print_blts, bool, S_IRUGO | S_IWUSR);
 
-static int min_avg_max_mpix_per_second_on = 1;
-module_param(min_avg_max_mpix_per_second_on, bool, S_IRUGO | S_IWUSR);
+static int profiler_stats_on = 1;
+module_param(profiler_stats_on, bool, S_IRUGO | S_IWUSR);
 
-static const unsigned int min_avg_max_mpix_per_second_num_blts_used = 400;
+static const unsigned int profiler_stats_blts_used = 400;
 static struct {
 	unsigned long sampling_start_time_jiffies;
 
@@ -51,22 +51,27 @@ static struct {
 	s32 accumulated_num_usecs;
 
 	u32 num_blts_done;
-} min_avg_max_mpix_per_second_state;
+} profiler_stats;
 
 
 static s32 nsec_2_usec(const s32 nsec);
 
 static int is_scale_blt(const struct b2r2_blt_req * const request);
-static s32 get_blt_mpix_per_second(const struct b2r2_blt_req * const request, const struct b2r2_blt_profiling_info * const blt_profiling_info);
-static void print_blt(const struct b2r2_blt_req * const request, const struct b2r2_blt_profiling_info * const blt_profiling_info);
+static s32 get_blt_mpix_per_second(const struct b2r2_blt_req * const request,
+	const struct b2r2_blt_profiling_info * const blt_profiling_info);
+static void print_blt(const struct b2r2_blt_req * const request,
+	const struct b2r2_blt_profiling_info * const blt_profiling_info);
 
 static s32 get_num_pixels_in_blt(const struct b2r2_blt_req * const request);
 static s32 get_mpix_per_second(const s32 num_pixels, const s32 num_usecs);
-static void print_min_avg_max_mpix_per_second_state(void);
-static void reset_min_avg_max_mpix_per_second_state(void);
-static void do_min_avg_max_mpix_per_second(const struct b2r2_blt_req * const request, const struct b2r2_blt_profiling_info * const blt_profiling_info);
+static void print_profiler_stats(void);
+static void reset_profiler_stats(void);
+static void do_profiler_stats(const struct b2r2_blt_req * const request,
+	const struct b2r2_blt_profiling_info * const blt_profiling_info);
 
-static void blt_done(const struct b2r2_blt_req * const blt, const s32 request_id, const struct b2r2_blt_profiling_info * const blt_profiling_info);
+static void blt_done(const struct b2r2_blt_req * const blt,
+	const s32 request_id,
+	const struct b2r2_blt_profiling_info * const blt_profiling_info);
 
 
 static struct b2r2_profiler this = {
@@ -83,23 +88,30 @@ static s32 nsec_2_usec(const s32 nsec)
 static int is_scale_blt(const struct b2r2_blt_req * const request)
 {
 	if ((request->transform & B2R2_BLT_TRANSFORM_CCW_ROT_90 &&
-		(request->src_rect.width != request->dst_rect.height ||
-		request->src_rect.height != request->dst_rect.width)) ||
+			(request->src_rect.width !=
+				request->dst_rect.height ||
+			request->src_rect.height !=
+				request->dst_rect.width)) ||
 		(!(request->transform & B2R2_BLT_TRANSFORM_CCW_ROT_90) &&
-		(request->src_rect.width != request->dst_rect.width ||
-		request->src_rect.height != request->dst_rect.height)))
+			(request->src_rect.width !=
+				request->dst_rect.width ||
+			request->src_rect.height !=
+				request->dst_rect.height)))
 		return 1;
 	else
 		return 0;
 }
 
-static s32 get_blt_mpix_per_second(const struct b2r2_blt_req * const request, const struct b2r2_blt_profiling_info * const blt_profiling_info)
+static s32 get_blt_mpix_per_second(const struct b2r2_blt_req * const request,
+	const struct b2r2_blt_profiling_info * const blt_profiling_info)
 {
 	return get_mpix_per_second(get_num_pixels_in_blt(request),
-		nsec_2_usec(blt_profiling_info->nsec_active_in_cpu + blt_profiling_info->nsec_active_in_b2r2));
+			nsec_2_usec(blt_profiling_info->nsec_active_in_cpu +
+			blt_profiling_info->nsec_active_in_b2r2));
 }
 
-static void print_blt(const struct b2r2_blt_req * const request, const struct b2r2_blt_profiling_info * const blt_profiling_info)
+static void print_blt(const struct b2r2_blt_req * const request,
+	const struct b2r2_blt_profiling_info * const blt_profiling_info)
 {
 	char tmp_str[128];
 	sprintf(tmp_str, "SF: %#10x, DF: %#10x, F: %#10x, T: %#3x, S: %1i, P: %7i",
@@ -110,13 +122,11 @@ static void print_blt(const struct b2r2_blt_req * const request, const struct b2
 		is_scale_blt(request),
 		get_num_pixels_in_blt(request));
 	if (use_mpix_per_second_in_print_blts)
-		printk(KERN_ALERT "%s, MPix/s: %3i\n",
-			tmp_str,
+		printk(KERN_ALERT "%s, MPix/s: %3i\n", tmp_str,
 			get_blt_mpix_per_second(request, blt_profiling_info));
 	else
 		printk(KERN_ALERT "%s, CPU: %10i, B2R2: %10i, Tot: %10i ns\n",
-			tmp_str,
-			blt_profiling_info->nsec_active_in_cpu,
+			tmp_str, blt_profiling_info->nsec_active_in_cpu,
 			blt_profiling_info->nsec_active_in_b2r2,
 			blt_profiling_info->total_time_nsec);
 }
@@ -135,8 +145,10 @@ static s32 get_num_pixels_in_blt(const struct b2r2_blt_req * const request)
 
 static s32 get_mpix_per_second(const s32 num_pixels, const s32 num_usecs)
 {
-	s32 num_pixels_scale_factor = num_pixels != 0 ? S32_MAX / num_pixels : S32_MAX;
-	s32 num_usecs_scale_factor = num_usecs != 0 ? S32_MAX / num_usecs : S32_MAX;
+	s32 num_pixels_scale_factor = num_pixels != 0 ?
+		S32_MAX / num_pixels : S32_MAX;
+	s32 num_usecs_scale_factor = num_usecs != 0 ?
+		S32_MAX / num_usecs : S32_MAX;
 	s32 scale_factor = min(num_pixels_scale_factor, num_usecs_scale_factor);
 
 	s32 num_pixels_scaled = num_pixels * scale_factor;
@@ -148,82 +160,82 @@ static s32 get_mpix_per_second(const s32 num_pixels, const s32 num_usecs)
 	return (num_pixels_scaled / 1000000) / (num_usecs_scaled / 1000000);
 }
 
-static void print_min_avg_max_mpix_per_second_state(void)
+static void print_profiler_stats(void)
 {
 	printk(KERN_ALERT "Min: %3i, Avg: %3i, Max: %3i MPix/s\n",
-		min_avg_max_mpix_per_second_state.min_mpix_per_second,
-		get_mpix_per_second(min_avg_max_mpix_per_second_state.accumulated_num_pixels,
-		min_avg_max_mpix_per_second_state.accumulated_num_usecs),
-		min_avg_max_mpix_per_second_state.max_mpix_per_second);
+		profiler_stats.min_mpix_per_second,
+		get_mpix_per_second(
+			profiler_stats.accumulated_num_pixels,
+			profiler_stats.accumulated_num_usecs),
+			profiler_stats.max_mpix_per_second);
 	printk(KERN_ALERT "Min blit:\n");
-	print_blt(&min_avg_max_mpix_per_second_state.min_blt_request,
-		&min_avg_max_mpix_per_second_state.min_blt_profiling_info);
+	print_blt(&profiler_stats.min_blt_request,
+		&profiler_stats.min_blt_profiling_info);
 	printk(KERN_ALERT "Max blit:\n");
-	print_blt(&min_avg_max_mpix_per_second_state.max_blt_request,
-		&min_avg_max_mpix_per_second_state.max_blt_profiling_info);
+	print_blt(&profiler_stats.max_blt_request,
+		&profiler_stats.max_blt_profiling_info);
 }
 
-static void reset_min_avg_max_mpix_per_second_state(void)
+static void reset_profiler_stats(void)
 {
-	min_avg_max_mpix_per_second_state.sampling_start_time_jiffies =
-		jiffies;
-	min_avg_max_mpix_per_second_state.min_mpix_per_second = S32_MAX;
-	min_avg_max_mpix_per_second_state.max_mpix_per_second = 0;
-	min_avg_max_mpix_per_second_state.accumulated_num_pixels = 0;
-	min_avg_max_mpix_per_second_state.accumulated_num_usecs = 0;
-	min_avg_max_mpix_per_second_state.num_blts_done = 0;
+	profiler_stats.sampling_start_time_jiffies = jiffies;
+	profiler_stats.min_mpix_per_second = S32_MAX;
+	profiler_stats.max_mpix_per_second = 0;
+	profiler_stats.accumulated_num_pixels = 0;
+	profiler_stats.accumulated_num_usecs = 0;
+	profiler_stats.num_blts_done = 0;
 }
 
-static void do_min_avg_max_mpix_per_second(const struct b2r2_blt_req * const request, const struct b2r2_blt_profiling_info * const blt_profiling_info)
+static void do_profiler_stats(const struct b2r2_blt_req * const request,
+	const struct b2r2_blt_profiling_info * const blt_profiling_info)
 {
 	s32 num_pixels_in_blt;
 	s32 num_usec_blt_took;
 	s32 blt_mpix_per_second;
 
-	if (time_before(jiffies, min_avg_max_mpix_per_second_state.sampling_start_time_jiffies))
+	if (time_before(jiffies, profiler_stats.sampling_start_time_jiffies))
 		return;
 
 	num_pixels_in_blt = get_num_pixels_in_blt(request);
-	num_usec_blt_took = nsec_2_usec(blt_profiling_info->nsec_active_in_cpu + blt_profiling_info->nsec_active_in_b2r2);
+	num_usec_blt_took = nsec_2_usec(blt_profiling_info->nsec_active_in_cpu +
+		blt_profiling_info->nsec_active_in_b2r2);
 	blt_mpix_per_second = get_mpix_per_second(num_pixels_in_blt,
 		num_usec_blt_took);
 
-	if (blt_mpix_per_second <= min_avg_max_mpix_per_second_state.min_mpix_per_second) {
-		min_avg_max_mpix_per_second_state.min_mpix_per_second =
-			blt_mpix_per_second;
-		memcpy(&min_avg_max_mpix_per_second_state.min_blt_request,
+	if (blt_mpix_per_second <=
+			profiler_stats.min_mpix_per_second) {
+		profiler_stats.min_mpix_per_second = blt_mpix_per_second;
+		memcpy(&profiler_stats.min_blt_request,
 			request, sizeof(struct b2r2_blt_req));
-		memcpy(&min_avg_max_mpix_per_second_state.min_blt_profiling_info,
-			blt_profiling_info, sizeof(struct b2r2_blt_profiling_info));
+		memcpy(&profiler_stats.min_blt_profiling_info,
+			blt_profiling_info,
+			sizeof(struct b2r2_blt_profiling_info));
 	}
 
-	if (blt_mpix_per_second >= min_avg_max_mpix_per_second_state.max_mpix_per_second) {
-		min_avg_max_mpix_per_second_state.max_mpix_per_second =
-			blt_mpix_per_second;
-		memcpy(&min_avg_max_mpix_per_second_state.max_blt_request,
-			request, sizeof(struct b2r2_blt_req));
-		memcpy(&min_avg_max_mpix_per_second_state.max_blt_profiling_info,
+	if (blt_mpix_per_second >= profiler_stats.max_mpix_per_second) {
+		profiler_stats.max_mpix_per_second = blt_mpix_per_second;
+		memcpy(&profiler_stats.max_blt_request, request,
+			sizeof(struct b2r2_blt_req));
+		memcpy(&profiler_stats.max_blt_profiling_info,
 			blt_profiling_info, sizeof(struct b2r2_blt_profiling_info));
 	}
 
-	min_avg_max_mpix_per_second_state.accumulated_num_pixels +=
-		num_pixels_in_blt;
-	min_avg_max_mpix_per_second_state.accumulated_num_usecs +=
-		num_usec_blt_took;
-
-	min_avg_max_mpix_per_second_state.num_blts_done++;
+	profiler_stats.accumulated_num_pixels += num_pixels_in_blt;
+	profiler_stats.accumulated_num_usecs += num_usec_blt_took;
+	profiler_stats.num_blts_done++;
 
-	if (min_avg_max_mpix_per_second_state.num_blts_done >= min_avg_max_mpix_per_second_num_blts_used) {
-		print_min_avg_max_mpix_per_second_state();
-		reset_min_avg_max_mpix_per_second_state();
+	if (profiler_stats.num_blts_done >= profiler_stats_blts_used) {
+		print_profiler_stats();
+		reset_profiler_stats();
 		/* The printouts initiated above can disturb the next measurement
 		so we delay it two seconds to give the printouts a chance to finish. */
-		min_avg_max_mpix_per_second_state.sampling_start_time_jiffies =
-			jiffies + (2 * HZ);
+		profiler_stats.sampling_start_time_jiffies = jiffies + (2 * HZ);
 	}
 }
 
-static void blt_done(const struct b2r2_blt_req * const request, const s32 request_id, const struct b2r2_blt_profiling_info * const blt_profiling_info)
+static void blt_done(const struct b2r2_blt_req * const request,
+		const s32 request_id,
+		const struct b2r2_blt_profiling_info * const blt_profiling_info)
 {
 	/* Filters */
 	if (src_format_filter_on && request->src_img.fmt != src_format_filter)
@@ -233,14 +245,14 @@ static void blt_done(const struct b2r2_blt_req * const request, const s32 reques
 	if (print_blts_on)
 		print_blt(request, blt_profiling_info);
 
-	if (min_avg_max_mpix_per_second_on)
-		do_min_avg_max_mpix_per_second(request, blt_profiling_info);
+	if (profiler_stats_on)
+		do_profiler_stats(request, blt_profiling_info);
 }
 
 
 static int __init b2r2_profiler_init(void)
 {
-	reset_min_avg_max_mpix_per_second_state();
+	reset_profiler_stats();
 
 	return b2r2_register_profiler(&this);
 }
diff --git a/drivers/video/b2r2/b2r2_profiler_socket.c b/drivers/video/b2r2/b2r2_profiler_socket.c
index f96ab5be76e..ffa7f2870c8 100644
--- a/drivers/video/b2r2/b2r2_profiler_socket.c
+++ b/drivers/video/b2r2/b2r2_profiler_socket.c
@@ -81,12 +81,13 @@ void b2r2_call_profiler_blt_done(const struct b2r2_blt_request * const request)
 {
 	int return_value;
 	struct b2r2_blt_profiling_info blt_profiling_info;
+	struct b2r2_control *cont = request->instance->control;
 
 	return_value = down_interruptible(&b2r2_profiler_lock);
 	if (return_value != 0) {
-		dev_err(b2r2_blt_device(),
-			"%s: Failed to acquire semaphore, ret=%i. Lost profiler call!\n",
-			__func__, return_value);
+		dev_err(cont->dev,
+			"%s: Failed to acquire semaphore, ret=%i. "
+			"Lost profiler call!\n", __func__, return_value);
 
 		return;
 	}
diff --git a/drivers/video/b2r2/b2r2_utils.c b/drivers/video/b2r2/b2r2_utils.c
index 87949a37b6b..3df7a272211 100644
--- a/drivers/video/b2r2/b2r2_utils.c
+++ b/drivers/video/b2r2/b2r2_utils.c
@@ -8,15 +8,14 @@
  * License terms: GNU General Public License (GPL), version 2.
  */
 
-#include "b2r2_utils.h"
-
-#include "b2r2_debug.h"
-
-#include <video/b2r2_blt.h>
-
 #include <linux/kernel.h>
 #include <linux/errno.h>
 
+#include <video/b2r2_blt.h>
+
+#include "b2r2_utils.h"
+#include "b2r2_debug.h"
+#include "b2r2_internal.h"
 
 const s32 b2r2_s32_max = 2147483647;
 
@@ -25,18 +24,19 @@ const s32 b2r2_s32_max = 2147483647;
  * calculate_scale_factor() - calculates the scale factor between the given
  *                            values
  */
-int calculate_scale_factor(u32 from, u32 to, u16 *sf_out)
+int calculate_scale_factor(struct b2r2_control *cont,
+			u32 from, u32 to, u16 *sf_out)
 {
 	int ret;
 	u32 sf;
 
-	b2r2_log_info("%s\n", __func__);
+	b2r2_log_info(cont->dev, "%s\n", __func__);
 
 	if (to == from) {
 		*sf_out = 1 << 10;
 		return 0;
 	} else if (to == 0) {
-		b2r2_log_err("%s: To is 0!\n", __func__);
+		b2r2_log_err(cont->dev, "%s: To is 0!\n", __func__);
 		BUG_ON(1);
 	}
 
@@ -44,12 +44,12 @@ int calculate_scale_factor(u32 from, u32 to, u16 *sf_out)
 
 	if ((sf & 0xffff0000) != 0) {
 		/* Overflow error */
-		b2r2_log_warn("%s: "
+		b2r2_log_warn(cont->dev, "%s: "
 			"Scale factor too large\n", __func__);
 		ret = -EINVAL;
 		goto error;
 	} else if (sf == 0) {
-		b2r2_log_warn("%s: "
+		b2r2_log_warn(cont->dev, "%s: "
 			"Scale factor too small\n", __func__);
 		ret = -EINVAL;
 		goto error;
@@ -57,12 +57,12 @@ int calculate_scale_factor(u32 from, u32 to, u16 *sf_out)
 
 	*sf_out = (u16)sf;
 
-	b2r2_log_info("%s exit\n", __func__);
+	b2r2_log_info(cont->dev, "%s exit\n", __func__);
 
 	return 0;
 
 error:
-	b2r2_log_warn("%s: Exit...\n", __func__);
+	b2r2_log_warn(cont->dev, "%s: Exit...\n", __func__);
 	return ret;
 }
 
@@ -127,7 +127,8 @@ void b2r2_intersect_rects(struct b2r2_blt_rect *rect1,
  * the old source rectangle corresponds to
  * to the new part of old destination rectangle.
  */
-void b2r2_trim_rects(const struct b2r2_blt_req *req,
+void b2r2_trim_rects(struct b2r2_control *cont,
+			const struct b2r2_blt_req *req,
 			struct b2r2_blt_rect *new_bg_rect,
 			struct b2r2_blt_rect *new_dst_rect,
 			struct b2r2_blt_rect *new_src_rect)
@@ -149,10 +150,12 @@ void b2r2_trim_rects(const struct b2r2_blt_req *req,
 	s16 hsf;
 	s16 vsf;
 
-	b2r2_log_info("%s\nold_dst_rect(x,y,w,h)=(%d, %d, %d, %d)\n", __func__,
+	b2r2_log_info(cont->dev,
+		"%s\nold_dst_rect(x,y,w,h)=(%d, %d, %d, %d)\n", __func__,
 		old_dst_rect->x, old_dst_rect->y,
 		old_dst_rect->width, old_dst_rect->height);
-	b2r2_log_info("%s\nold_src_rect(x,y,w,h)=(%d, %d, %d, %d)\n", __func__,
+	b2r2_log_info(cont->dev,
+		"%s\nold_src_rect(x,y,w,h)=(%d, %d, %d, %d)\n", __func__,
 		old_src_rect->x, old_src_rect->y,
 		old_src_rect->width, old_src_rect->height);
 
@@ -164,7 +167,8 @@ void b2r2_trim_rects(const struct b2r2_blt_req *req,
 		goto keep_rects;
 
 	b2r2_intersect_rects(old_dst_rect, &dst_img_bounds, new_dst_rect);
-	b2r2_log_info("%s\nnew_dst_rect(x,y,w,h)=(%d, %d, %d, %d)\n", __func__,
+	b2r2_log_info(cont->dev,
+		"%s\nnew_dst_rect(x,y,w,h)=(%d, %d, %d, %d)\n", __func__,
 		new_dst_rect->x, new_dst_rect->y,
 		new_dst_rect->width, new_dst_rect->height);
 
@@ -177,13 +181,13 @@ void b2r2_trim_rects(const struct b2r2_blt_req *req,
 
 	if (transform & B2R2_BLT_TRANSFORM_CCW_ROT_90) {
 		int res = 0;
-		res = calculate_scale_factor(old_src_rect->width,
+		res = calculate_scale_factor(cont, old_src_rect->width,
 			old_dst_rect->height, &hsf);
 		/* invalid dimensions, leave them to validation */
 		if (res < 0)
 			goto keep_rects;
 
-		res = calculate_scale_factor(old_src_rect->height,
+		res = calculate_scale_factor(cont, old_src_rect->height,
 			old_dst_rect->width, &vsf);
 		if (res < 0)
 			goto keep_rects;
@@ -203,12 +207,12 @@ void b2r2_trim_rects(const struct b2r2_blt_req *req,
 		src_h = new_dst_rect->width * vsf;
 	} else {
 		int res = 0;
-		res = calculate_scale_factor(old_src_rect->width,
+		res = calculate_scale_factor(cont, old_src_rect->width,
 			old_dst_rect->width, &hsf);
 		if (res < 0)
 			goto keep_rects;
 
-		res = calculate_scale_factor(old_src_rect->height,
+		res = calculate_scale_factor(cont, old_src_rect->height,
 			old_dst_rect->height, &vsf);
 		if (res < 0)
 			goto keep_rects;
@@ -266,7 +270,8 @@ void b2r2_trim_rects(const struct b2r2_blt_req *req,
 	new_src_rect->width = src_w;
 	new_src_rect->height = src_h;
 
-	b2r2_log_info("%s\nnew_src_rect(x,y,w,h)=(%d, %d, %d, %d)\n", __func__,
+	b2r2_log_info(cont->dev,
+		"%s\nnew_src_rect(x,y,w,h)=(%d, %d, %d, %d)\n", __func__,
 		new_src_rect->x, new_src_rect->y,
 		new_src_rect->width, new_src_rect->height);
 
@@ -274,14 +279,16 @@ void b2r2_trim_rects(const struct b2r2_blt_req *req,
 		/* Modify bg_rect in the same way as dst_rect */
 		s32 dw = new_dst_rect->width - old_dst_rect->width;
 		s32 dh = new_dst_rect->height - old_dst_rect->height;
-		b2r2_log_info("%s\nold bg_rect(x,y,w,h)=(%d, %d, %d, %d)\n",
+		b2r2_log_info(cont->dev,
+			"%s\nold bg_rect(x,y,w,h)=(%d, %d, %d, %d)\n",
 			__func__, old_bg_rect->x, old_bg_rect->y,
 			old_bg_rect->width, old_bg_rect->height);
 		new_bg_rect->x = old_bg_rect->x + dx;
 		new_bg_rect->y = old_bg_rect->y + dy;
 		new_bg_rect->width = old_bg_rect->width + dw;
 		new_bg_rect->height = old_bg_rect->height + dh;
-		b2r2_log_info("%s\nnew bg_rect(x,y,w,h)=(%d, %d, %d, %d)\n",
+		b2r2_log_info(cont->dev,
+			"%s\nnew bg_rect(x,y,w,h)=(%d, %d, %d, %d)\n",
 			__func__, new_bg_rect->x, new_bg_rect->y,
 			new_bg_rect->width, new_bg_rect->height);
 	}
@@ -294,11 +301,11 @@ keep_rects:
 	*new_src_rect = *old_src_rect;
 	*new_dst_rect = *old_dst_rect;
 	*new_bg_rect = *old_bg_rect;
-	b2r2_log_info("%s original rectangles preserved.\n", __func__);
+	b2r2_log_info(cont->dev, "%s original rectangles preserved.\n", __func__);
 	return;
 }
 
-int b2r2_get_fmt_bpp(enum b2r2_blt_fmt fmt)
+int b2r2_get_fmt_bpp(struct b2r2_control *cont, enum b2r2_blt_fmt fmt)
 {
 	/*
 	 * Currently this function is not used that often but if that changes a
@@ -344,13 +351,14 @@ int b2r2_get_fmt_bpp(enum b2r2_blt_fmt fmt)
 		return 32;
 
 	default:
-		b2r2_log_err("%s: Internal error! Format %#x not recognized.\n",
+		b2r2_log_err(cont->dev,
+			"%s: Internal error! Format %#x not recognized.\n",
 			__func__, fmt);
 		return 32;
 	}
 }
 
-int b2r2_get_fmt_y_bpp(enum b2r2_blt_fmt fmt)
+int b2r2_get_fmt_y_bpp(struct b2r2_control *cont, enum b2r2_blt_fmt fmt)
 {
 	switch (fmt) {
 	case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
@@ -373,7 +381,8 @@ int b2r2_get_fmt_y_bpp(enum b2r2_blt_fmt fmt)
 		return 8;
 
 	default:
-		b2r2_log_err("%s: Internal error! Non YCbCr format supplied.\n",
+		b2r2_log_err(cont->dev,
+			"%s: Internal error! Non YCbCr format supplied.\n",
 			__func__);
 		return 8;
 	}
@@ -533,39 +542,40 @@ bool b2r2_is_mb_fmt(enum b2r2_blt_fmt fmt)
 	}
 }
 
-u32 b2r2_calc_pitch_from_width(s32 width, enum b2r2_blt_fmt fmt)
+u32 b2r2_calc_pitch_from_width(struct b2r2_control *cont,
+		s32 width, enum b2r2_blt_fmt fmt)
 {
 	if (b2r2_is_single_plane_fmt(fmt)) {
 		return (u32)b2r2_div_round_up(width *
-				b2r2_get_fmt_bpp(fmt), 8);
+			b2r2_get_fmt_bpp(cont, fmt), 8);
 	} else if (b2r2_is_ycbcrsp_fmt(fmt) || b2r2_is_ycbcrp_fmt(fmt)) {
 		return (u32)b2r2_div_round_up(width *
-				b2r2_get_fmt_y_bpp(fmt), 8);
+			b2r2_get_fmt_y_bpp(cont, fmt), 8);
 	} else {
-		b2r2_log_err("%s: Internal error! "
-				"Pitchless format supplied.\n",
-				__func__);
+		b2r2_log_err(cont->dev, "%s: Internal error! "
+			"Pitchless format supplied.\n",
+			__func__);
 		return 0;
 	}
 }
 
-u32 b2r2_get_img_pitch(struct b2r2_blt_img *img)
+u32 b2r2_get_img_pitch(struct b2r2_control *cont, struct b2r2_blt_img *img)
 {
 	if (img->pitch != 0)
 		return img->pitch;
 	else
-		return b2r2_calc_pitch_from_width(img->width, img->fmt);
+		return b2r2_calc_pitch_from_width(cont, img->width, img->fmt);
 }
 
-s32 b2r2_get_img_size(struct b2r2_blt_img *img)
+s32 b2r2_get_img_size(struct b2r2_control *cont, struct b2r2_blt_img *img)
 {
 	if (b2r2_is_single_plane_fmt(img->fmt)) {
-		return (s32)b2r2_get_img_pitch(img) * img->height;
+		return (s32)b2r2_get_img_pitch(cont, img) * img->height;
 	} else if (b2r2_is_ycbcrsp_fmt(img->fmt) ||
 			b2r2_is_ycbcrp_fmt(img->fmt)) {
 		s32 y_plane_size;
 
-		y_plane_size = (s32)b2r2_get_img_pitch(img) * img->height;
+		y_plane_size = (s32)b2r2_get_img_pitch(cont, img) * img->height;
 
 		if (b2r2_is_ycbcr420_fmt(img->fmt)) {
 			return y_plane_size + y_plane_size / 2;
@@ -574,18 +584,18 @@ s32 b2r2_get_img_size(struct b2r2_blt_img *img)
 		} else if (b2r2_is_ycbcr444_fmt(img->fmt)) {
 			return y_plane_size * 3;
 		} else {
-			b2r2_log_err("%s: Internal error! "
-					"Format %#x not recognized.\n",
-					__func__, img->fmt);
+			b2r2_log_err(cont->dev,	"%s: Internal error!"
+				" Format %#x not recognized.\n",
+				__func__, img->fmt);
 			return 0;
 		}
 	} else if (b2r2_is_mb_fmt(img->fmt)) {
 		return (img->width * img->height *
-				b2r2_get_fmt_bpp(img->fmt)) / 8;
+			b2r2_get_fmt_bpp(cont, img->fmt)) / 8;
 	} else {
-		b2r2_log_err("%s: Internal error! "
-				"Format %#x not recognized.\n",
-				__func__, img->fmt);
+		b2r2_log_err(cont->dev, "%s: Internal error! "
+			"Format %#x not recognized.\n",
+			__func__, img->fmt);
 		return 0;
 	}
 }
diff --git a/drivers/video/b2r2/b2r2_utils.h b/drivers/video/b2r2/b2r2_utils.h
index 4597b2bd684..0516447b42f 100644
--- a/drivers/video/b2r2/b2r2_utils.h
+++ b/drivers/video/b2r2/b2r2_utils.h
@@ -13,9 +13,12 @@
 
 #include <video/b2r2_blt.h>
 
+#include "b2r2_internal.h"
+
 extern const s32 b2r2_s32_max;
 
-int calculate_scale_factor(u32 from, u32 to, u16 *sf_out);
+int calculate_scale_factor(struct b2r2_control *cont,
+		u32 from, u32 to, u16 *sf_out);
 void b2r2_get_img_bounding_rect(struct b2r2_blt_img *img,
 		struct b2r2_blt_rect *bounding_rect);
 
@@ -27,13 +30,14 @@ bool b2r2_is_rect_gte_rect(struct b2r2_blt_rect *rect1,
 void b2r2_intersect_rects(struct b2r2_blt_rect *rect1,
 		struct b2r2_blt_rect *rect2,
 		struct b2r2_blt_rect *intersection);
-void b2r2_trim_rects(const struct b2r2_blt_req *req,
+void b2r2_trim_rects(struct b2r2_control *cont,
+			const struct b2r2_blt_req *req,
 			struct b2r2_blt_rect *new_bg_rect,
 			struct b2r2_blt_rect *new_dst_rect,
 			struct b2r2_blt_rect *new_src_rect);
 
-int b2r2_get_fmt_bpp(enum b2r2_blt_fmt fmt);
-int b2r2_get_fmt_y_bpp(enum b2r2_blt_fmt fmt);
+int b2r2_get_fmt_bpp(struct b2r2_control *cont, enum b2r2_blt_fmt fmt);
+int b2r2_get_fmt_y_bpp(struct b2r2_control *cont, enum b2r2_blt_fmt fmt);
 
 bool b2r2_is_single_plane_fmt(enum b2r2_blt_fmt fmt);
 bool b2r2_is_independent_pixel_fmt(enum b2r2_blt_fmt fmt);
@@ -48,9 +52,12 @@ bool b2r2_is_mb_fmt(enum b2r2_blt_fmt fmt);
 /*
  * Rounds up if an invalid width causes the pitch to be non byte aligned.
  */
-u32 b2r2_calc_pitch_from_width(s32 width, enum b2r2_blt_fmt fmt);
-u32 b2r2_get_img_pitch(struct b2r2_blt_img *img);
-s32 b2r2_get_img_size(struct b2r2_blt_img *img);
+u32 b2r2_calc_pitch_from_width(struct b2r2_control *cont,
+		s32 width, enum b2r2_blt_fmt fmt);
+u32 b2r2_get_img_pitch(struct b2r2_control *cont,
+		struct b2r2_blt_img *img);
+s32 b2r2_get_img_size(struct b2r2_control *cont,
+		struct b2r2_blt_img *img);
 
 s32 b2r2_div_round_up(s32 dividend, s32 divisor);
 bool b2r2_is_aligned(s32 value, s32 alignment);
-- 
cgit v1.2.3


From 2ac95500019aefe0009249cb44b76b6c2e6a041c Mon Sep 17 00:00:00 2001
From: Jimmy Rubin <jimmy.rubin@stericsson.com>
Date: Thu, 1 Dec 2011 11:14:01 +0100
Subject: video: mcde: Fix build warning

In update_overlay_registers, fifo_size was not used anymore.
This variable is removed.

ST-Ericsson ID: 401522
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: Ib2e741d1e26d8457441387e5516342f7e4855ba3
Signed-off-by: Jimmy Rubin <jimmy.rubin@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/40909
Reviewed-by: QATOOLS
Reviewed-by: QABUILD
Reviewed-by: Jayarami REDDY <jayarami.reddy@stericsson.com>
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
---
 drivers/video/mcde/mcde_hw.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index c825c4c6273..2580252a12f 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -1398,7 +1398,6 @@ static void update_overlay_registers(u8 idx, struct ovly_regs *regs,
 	s32 ljinc = stride;
 	u32 pixelfetchwtrmrklevel;
 	u8  nr_of_bufs = 1;
-	u32 fifo_size;
 	u32 sel_mod = MCDE_EXTSRC0CR_SEL_MOD_SOFTWARE_SEL;
 
 	if (rotation == MCDE_DISPLAY_ROT_180_CCW) {
-- 
cgit v1.2.3


From e9aee2a19979fd78a3f787732987da8ae09ef78f Mon Sep 17 00:00:00 2001
From: Jimmy Rubin <jimmy.rubin@stericsson.com>
Date: Thu, 1 Dec 2011 12:35:37 +0100
Subject: video: mcde: Handle MCDE_DISPLAY_PM_ON in probe

When startup graphics is enabled, valid power modes are
MCDE_DISPLAY_PM_ON and MCDE_DISPLAY_PM_STANDBY.

Handling of MCDE_DISPLAY_PM_ON is added to the probes of the
displays.

ST-Ericsson ID: 400915
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I3d268096ac3640c53f20811e7dc0988b0b605ffe
Signed-off-by: Jimmy Rubin <jimmy.rubin@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/40910
Reviewed-by: QATOOLS
Reviewed-by: QABUILD
Reviewed-by: Jayarami REDDY <jayarami.reddy@stericsson.com>
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
---
 drivers/video/mcde/display-samsung_s6d16d0.c    | 2 +-
 drivers/video/mcde/display-sony_acx424akp_dsi.c | 4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/video/mcde/display-samsung_s6d16d0.c b/drivers/video/mcde/display-samsung_s6d16d0.c
index 09c9e817e7f..2f67f3e6abf 100644
--- a/drivers/video/mcde/display-samsung_s6d16d0.c
+++ b/drivers/video/mcde/display-samsung_s6d16d0.c
@@ -180,7 +180,7 @@ static int __devinit samsung_s6d16d0_probe(struct mcde_display_device *ddev)
 		goto regulator_voltage_failed;
 
 	/* Get in sync with u-boot */
-	if (ddev->power_mode == MCDE_DISPLAY_PM_STANDBY)
+	if (ddev->power_mode != MCDE_DISPLAY_PM_OFF)
 		(void)regulator_enable(di->regulator);
 
 	ddev->set_power_mode = set_power_mode;
diff --git a/drivers/video/mcde/display-sony_acx424akp_dsi.c b/drivers/video/mcde/display-sony_acx424akp_dsi.c
index b570e832893..b8fbe708893 100644
--- a/drivers/video/mcde/display-sony_acx424akp_dsi.c
+++ b/drivers/video/mcde/display-sony_acx424akp_dsi.c
@@ -285,9 +285,9 @@ static int __devinit sony_acx424akp_probe(struct mcde_display_device *dev)
 	* This is the case here, the display driver has to
 	* enable the regulator for the display.
 	*/
-	if (dev->power_mode == MCDE_DISPLAY_PM_STANDBY) {
+	if (dev->power_mode != MCDE_DISPLAY_PM_OFF) {
 		(void) regulator_enable(di->regulator);
-	} else if (dev->power_mode == MCDE_DISPLAY_PM_OFF) {
+	} else {
 		power_on(dev);
 		dev->power_mode = MCDE_DISPLAY_PM_STANDBY;
 	}
-- 
cgit v1.2.3


From df6ca5f4ec1fb1904929998459ff8a4f2bcc6c6d Mon Sep 17 00:00:00 2001
From: Jimmy Rubin <jimmy.rubin@stericsson.com>
Date: Mon, 5 Dec 2011 08:44:15 +0100
Subject: video: mcde: Update power on/off sequence for Sony

The sony display driver did not properly handle the
reset gpio during power on / power off.

In power off the the reset gpio is set to 0.

ST-Ericsson ID: 401537
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: Ie954e8e9a9b829029409885ccf92df1963ceb951
Signed-off-by: Jimmy Rubin <jimmy.rubin@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/40911
Reviewed-by: QATOOLS
Reviewed-by: QABUILD
Reviewed-by: QATEST
Reviewed-by: Jayarami REDDY <jayarami.reddy@stericsson.com>
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
---
 drivers/video/mcde/display-sony_acx424akp_dsi.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/video/mcde/display-sony_acx424akp_dsi.c b/drivers/video/mcde/display-sony_acx424akp_dsi.c
index b8fbe708893..a365a42b4d2 100644
--- a/drivers/video/mcde/display-sony_acx424akp_dsi.c
+++ b/drivers/video/mcde/display-sony_acx424akp_dsi.c
@@ -87,6 +87,8 @@ static int power_on(struct mcde_display_device *dev)
 	dev_dbg(&dev->dev, "%s: Reset & power on sony display\n", __func__);
 
 	regulator_enable(di->regulator);
+	gpio_set_value_cansleep(di->reset_gpio, 1);
+	msleep(RESET_DELAY_MS);
 	gpio_set_value_cansleep(di->reset_gpio, 0);
 	udelay(RESET_LOW_DELAY_US);
 	gpio_set_value_cansleep(di->reset_gpio, 1);
@@ -101,6 +103,8 @@ static int power_off(struct mcde_display_device *dev)
 
 	dev_dbg(&dev->dev, "%s:Reset & power off sony display\n", __func__);
 
+	gpio_set_value_cansleep(di->reset_gpio, 0);
+	msleep(RESET_DELAY_MS);
 	regulator_disable(di->regulator);
 
 	return 0;
-- 
cgit v1.2.3


From a1bc7e2d274fce6ee12971b5c924f87bd64b1d6b Mon Sep 17 00:00:00 2001
From: Jimmy Rubin <jimmy.rubin@stericsson.com>
Date: Mon, 5 Dec 2011 08:45:35 +0100
Subject: u8500: mcde: Wrong gpio used for sony display

For HREF, GPIO65 should be used for the main display.

ST-Ericsson ID: 401537
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I4d7f8c0bd85a6a015b0f483267668db4504e74e7
Signed-off-by: Jimmy Rubin <jimmy.rubin@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/40912
Reviewed-by: QATOOLS
Reviewed-by: QABUILD
Reviewed-by: QATEST
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
---
 arch/arm/mach-ux500/board-mop500-mcde.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/mach-ux500/board-mop500-mcde.c b/arch/arm/mach-ux500/board-mop500-mcde.c
index f35e77acff9..35f8d417a73 100644
--- a/arch/arm/mach-ux500/board-mop500-mcde.c
+++ b/arch/arm/mach-ux500/board-mop500-mcde.c
@@ -110,7 +110,7 @@ static struct mcde_port sony_port0 = {
 
 static struct mcde_display_sony_acx424akp_platform_data
 			sony_acx424akp_display0_pdata = {
-	.reset_gpio = HREFV60_DISP2_RST_GPIO,
+	.reset_gpio = HREFV60_DISP1_RST_GPIO,
 };
 
 static struct mcde_display_device sony_acx424akp_display0 = {
-- 
cgit v1.2.3


From 8e3285064199eeb228662b59e8da14c033e0bb66 Mon Sep 17 00:00:00 2001
From: Jimmy Rubin <jimmy.rubin@stericsson.com>
Date: Fri, 28 Oct 2011 09:26:31 +0200
Subject: arm: ux500: Add new dsi clocks for mcde

dsi_pll, dsi0clk, dsi1clk and dsixescclk is added to the
clock struct for u8500.

Set rate of dsi_pll, hdmi and tv clk is performed in
init_display_devices in board-mop500-mcde.c

ST-Ericsson ID: 359227, 352847
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I2628212112716df7738e285d3063c6927f71b02e
Signed-off-by: Jimmy Rubin <jimmy.rubin@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/42451
Reviewed-by: QATOOLS
Reviewed-by: QABUILD
Reviewed-by: Jonas ABERG <jonas.aberg@stericsson.com>
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
Reviewed-by: Jayarami REDDY <jayarami.reddy@stericsson.com>
---
 arch/arm/mach-ux500/board-mop500-mcde.c | 48 +++++++++++++++++++++++++++++++++
 1 file changed, 48 insertions(+)

diff --git a/arch/arm/mach-ux500/board-mop500-mcde.c b/arch/arm/mach-ux500/board-mop500-mcde.c
index 35f8d417a73..470302b6809 100644
--- a/arch/arm/mach-ux500/board-mop500-mcde.c
+++ b/arch/arm/mach-ux500/board-mop500-mcde.c
@@ -14,6 +14,8 @@
 #include <linux/workqueue.h>
 #include <linux/dispdev.h>
 #include <asm/mach-types.h>
+#include <linux/clk.h>
+#include <mach/devices.h>
 #include <video/av8100.h>
 #include <video/mcde_display.h>
 #include <video/mcde_display-vuib500-dpi.h>
@@ -31,6 +33,11 @@
 #define DSI_UNIT_INTERVAL_1	0x9
 #define DSI_UNIT_INTERVAL_2	0x5
 
+#define DSI_PLL_FREQ_HZ		840320000
+/* Based on PLL DDR Freq at 798,72 MHz */
+#define HDMI_FREQ_HZ		33280000
+#define TV_FREQ_HZ		38400000
+
 #ifdef CONFIG_U8500_TV_OUTPUT_AV8100
 /* The initialization of hdmi disp driver must be delayed in order to
  * ensure that inputclk will be available (needed by hdmi hw) */
@@ -427,6 +434,47 @@ static int __init init_display_devices(void)
 	if (uib_is_stuib())
 		samsung_s6d16d0_display0.synchronized_update = false;
 
+	/* Initialize all needed clocks*/
+	if (!display_initialized_during_boot) {
+		struct clk *clk_dsi_pll;
+		struct clk *clk_hdmi;
+		struct clk *clk_tv;
+
+		/*
+		 * The TV CLK is used as parent for the
+		 * DSI LP clock.
+		 */
+		clk_tv = clk_get(&u8500_mcde_device.dev, "tv");
+		if (TV_FREQ_HZ != clk_round_rate(clk_tv, TV_FREQ_HZ))
+			pr_warning("%s: TV_CLK freq differs %ld\n", __func__,
+					clk_round_rate(clk_tv, TV_FREQ_HZ));
+		clk_set_rate(clk_tv, TV_FREQ_HZ);
+		clk_put(clk_tv);
+
+		/*
+		 * The HDMI CLK is used as parent for the
+		 * DSI HS clock.
+		 */
+		clk_hdmi = clk_get(&u8500_mcde_device.dev, "hdmi");
+		if (HDMI_FREQ_HZ != clk_round_rate(clk_hdmi, HDMI_FREQ_HZ))
+			pr_warning("%s: HDMI freq differs %ld\n", __func__,
+					clk_round_rate(clk_hdmi, HDMI_FREQ_HZ));
+		clk_set_rate(clk_hdmi, HDMI_FREQ_HZ);
+		clk_put(clk_hdmi);
+
+		/*
+		 * The DSI PLL CLK is used as DSI PLL for direct freq for
+		 * link 2. Link 0/1 is then divided with 1/2/4 from this freq.
+		 */
+		clk_dsi_pll = clk_get(&u8500_mcde_device.dev, "dsihs2");
+		if (DSI_PLL_FREQ_HZ != clk_round_rate(clk_dsi_pll,
+							DSI_PLL_FREQ_HZ))
+			pr_warning("%s: DSI_PLL freq differs %ld\n", __func__,
+				clk_round_rate(clk_dsi_pll, DSI_PLL_FREQ_HZ));
+		clk_set_rate(clk_dsi_pll, DSI_PLL_FREQ_HZ);
+		clk_put(clk_dsi_pll);
+	}
+
 	if (uib_is_u8500uib() || uib_is_stuib())
 		/* Samsung display on U8500 and ST UIB */
 		(void)mcde_display_device_register(&samsung_s6d16d0_display0);
-- 
cgit v1.2.3


From a5c5d89cfaee85c040e12de7c3f8007cc76969ae Mon Sep 17 00:00:00 2001
From: Jimmy Rubin <jimmy.rubin@stericsson.com>
Date: Fri, 28 Oct 2011 12:32:33 +0200
Subject: video: mcde: Add dsi/dpi freq settings

For U8500, the clocks used by DSI is dsilp and dsihs.
These clock rates of these clocks must be specified in the port struct.

The lcd clk is set from the port struct.

ST-Ericsson ID: 359227, 352847
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I089a736da281014902ca8d503e72a572c9ce1bbe
Signed-off-by: Jimmy Rubin <jimmy.rubin@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/42452
Reviewed-by: QATOOLS
Reviewed-by: QABUILD
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
---
 drivers/video/mcde/display-av8100.c             |  11 +-
 drivers/video/mcde/display-samsung_s6d16d0.c    |   5 +
 drivers/video/mcde/display-sony_acx424akp_dsi.c |   5 +
 drivers/video/mcde/mcde_hw.c                    | 169 ++++++++++++++++--------
 include/video/mcde.h                            |   4 +
 5 files changed, 136 insertions(+), 58 deletions(-)

diff --git a/drivers/video/mcde/display-av8100.c b/drivers/video/mcde/display-av8100.c
index b99fda2f34c..b5116621e16 100644
--- a/drivers/video/mcde/display-av8100.c
+++ b/drivers/video/mcde/display-av8100.c
@@ -39,6 +39,9 @@
 #define NUM_FB_BUFFERS 2
 #endif
 
+#define DSI_HS_FREQ_HZ 840320000
+#define DSI_LP_FREQ_HZ 19200000
+
 struct cea_vesa_video_mode {
 	u32 cea;
 	u32 vesa_cea_nr;
@@ -1421,6 +1424,7 @@ set_power_and_exit:
 static int __devinit hdmi_probe(struct mcde_display_device *dev)
 {
 	int ret = 0;
+	struct mcde_port *port;
 	struct display_driver_data *driver_data;
 	struct mcde_display_hdmi_platform_data *pdata =
 		dev->dev.platform_data;
@@ -1454,7 +1458,12 @@ static int __devinit hdmi_probe(struct mcde_display_device *dev)
 	dev->set_pixel_format = hdmi_set_pixel_format;
 	dev->set_power_mode = hdmi_set_power_mode;
 
-	dev->port->phy.dsi.host_eot_gen = true;
+	port = dev->port;
+
+	port->phy.dsi.host_eot_gen = true;
+	port->phy.dsi.num_data_lanes = 2;
+	port->phy.dsi.hs_freq = DSI_HS_FREQ_HZ;
+	port->phy.dsi.lp_freq = DSI_LP_FREQ_HZ;
 
 	/* Create sysfs files */
 	if (device_create_file(&dev->dev, &dev_attr_hdmisdtvswitch))
diff --git a/drivers/video/mcde/display-samsung_s6d16d0.c b/drivers/video/mcde/display-samsung_s6d16d0.c
index 2f67f3e6abf..62db3db6556 100644
--- a/drivers/video/mcde/display-samsung_s6d16d0.c
+++ b/drivers/video/mcde/display-samsung_s6d16d0.c
@@ -27,6 +27,9 @@
 #define IO_REGU_MIN		1650000
 #define IO_REGU_MAX		3300000
 
+#define DSI_HS_FREQ_HZ		420160000
+#define DSI_LP_FREQ_HZ		19200000
+
 struct device_info {
 	int reset_gpio;
 	struct mcde_port port;
@@ -165,6 +168,8 @@ static int __devinit samsung_s6d16d0_probe(struct mcde_display_device *ddev)
 	di->port.phy.dsi.host_eot_gen = true;
 	/* TODO: Move UI to mcde_hw.c when clk_get_rate(dsi) is done */
 	di->port.phy.dsi.ui = 9;
+	di->port.phy.dsi.hs_freq = DSI_HS_FREQ_HZ;
+	di->port.phy.dsi.lp_freq = DSI_LP_FREQ_HZ;
 
 	ret = gpio_request(di->reset_gpio, NULL);
 	if (ret)
diff --git a/drivers/video/mcde/display-sony_acx424akp_dsi.c b/drivers/video/mcde/display-sony_acx424akp_dsi.c
index a365a42b4d2..44302de8f1b 100644
--- a/drivers/video/mcde/display-sony_acx424akp_dsi.c
+++ b/drivers/video/mcde/display-sony_acx424akp_dsi.c
@@ -29,6 +29,9 @@
 #define IO_REGU_MIN		1600000
 #define IO_REGU_MAX		3300000
 
+#define DSI_HS_FREQ_HZ		420160000
+#define DSI_LP_FREQ_HZ		19200000
+
 struct device_info {
 	int reset_gpio;
 	struct mcde_port port;
@@ -259,6 +262,8 @@ static int __devinit sony_acx424akp_probe(struct mcde_display_device *dev)
 	di->port.phy.dsi.host_eot_gen = true;
 	/* TODO: Move UI to mcde_hw.c when clk_get_rate(dsi) is done */
 	di->port.phy.dsi.ui = 9;
+	di->port.phy.dsi.hs_freq = DSI_HS_FREQ_HZ;
+	di->port.phy.dsi.lp_freq = DSI_LP_FREQ_HZ;
 
 	ret = gpio_request(di->reset_gpio, NULL);
 	if (WARN_ON(ret))
diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index 2580252a12f..3db1d50d3c1 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -99,6 +99,7 @@ static void wait_for_flow_disabled(struct mcde_chnl_state *chnl);
 #define DSI_READ_DELAY 5
 #define DSI_READ_NBR_OF_RETRIES 2
 #define MCDE_FLOWEN_MAX_TRIAL 60
+#define DSI_RESET_SW 0x7
 
 #define MCDE_VERSION_4_1_3 0x04010300
 #define MCDE_VERSION_4_0_4 0x04000400
@@ -106,6 +107,9 @@ static void wait_for_flow_disabled(struct mcde_chnl_state *chnl);
 #define MCDE_VERSION_3_0_5 0x03000500
 #define MCDE_VERSION_1_0_4 0x01000400
 
+#define CLK_MCDE	"mcde"
+#define CLK_DPI		"lcd"
+
 static u8 *mcdeio;
 static u8 **dsiio;
 static struct platform_device *mcde_dev;
@@ -120,14 +124,17 @@ static u32 output_fifo_c0c1_size;
 static struct regulator *regulator_vana;
 static struct regulator *regulator_mcde_epod;
 static struct regulator *regulator_esram_epod;
-static struct clk *clock_dpi;
-static struct clk *clock_dsi;
 static struct clk *clock_mcde;
+
+/* TODO remove when all platforms support dsilp and dsihs clocks */
+static struct clk *clock_dsi;
 static struct clk *clock_dsi_lp;
+
 static u8 mcde_is_enabled;
 static struct delayed_work hw_timeout_work;
 static u8 dsi_pll_is_enabled;
 static u8 dsi_ifc_is_supported;
+static u8 dsi_use_clk_framework;
 static u32 mcde_clk_rate; /* In Hz */
 
 static struct mutex mcde_hw_lock;
@@ -348,6 +355,10 @@ struct mcde_chnl_state {
 	wait_queue_head_t vcmp_waitq;
 	atomic_t vcmp_cnt;
 	struct timer_list dsi_te_timer;
+	struct clk *clk_dsi_lp;
+	struct clk *clk_dsi_hs;
+	struct clk *clk_dpi;
+
 	enum mcde_display_power_mode power_mode;
 
 	/* Staged settings */
@@ -414,7 +425,8 @@ static void enable_clocks_and_power(struct platform_device *pdev)
 
 	WARN_ON_ONCE(regulator_enable(regulator_mcde_epod));
 
-	pdata->platform_set_clocks();
+	if (!dsi_use_clk_framework)
+		pdata->platform_set_clocks();
 
 	WARN_ON_ONCE(clk_enable(clock_mcde));
 }
@@ -532,26 +544,32 @@ static void dsi_link_handle_ulpm(struct mcde_port *port, bool enter_ulpm)
 
 static int dsi_link_enable(struct mcde_chnl_state *chnl)
 {
+	int ret = 0;
 	u8 link = chnl->port.link;
 
-	WARN_ON_ONCE(clk_enable(clock_dsi));
-	WARN_ON_ONCE(clk_enable(clock_dsi_lp));
-
-	if (!dsi_pll_is_enabled) {
-		int ret;
-		struct mcde_platform_data *pdata =
-				mcde_dev->dev.platform_data;
-		ret = pdata->platform_enable_dsipll();
-		if (ret < 0) {
-			dev_warn(&mcde_dev->dev, "%s: "
-				"enable_dsipll failed ret = %d\n",
-							__func__, ret);
-			goto enable_dsipll_err;
+	if (dsi_use_clk_framework) {
+		prcmu_write(DB8500_PRCM_DSI_SW_RESET, DSI_RESET_SW);
+		WARN_ON_ONCE(clk_enable(chnl->clk_dsi_lp));
+		WARN_ON_ONCE(clk_enable(chnl->clk_dsi_hs));
+	} else {
+		WARN_ON_ONCE(clk_enable(clock_dsi));
+		WARN_ON_ONCE(clk_enable(clock_dsi_lp));
+
+		if (!dsi_pll_is_enabled) {
+			struct mcde_platform_data *pdata =
+					mcde_dev->dev.platform_data;
+			ret = pdata->platform_enable_dsipll();
+			if (ret < 0) {
+				dev_warn(&mcde_dev->dev, "%s: "
+					"enable_dsipll failed ret = %d\n",
+								__func__, ret);
+				goto enable_dsipll_err;
+			}
+			dev_dbg(&mcde_dev->dev, "%s enable dsipll\n",
+								__func__);
 		}
-		dev_dbg(&mcde_dev->dev, "%s enable dsipll\n",
-							__func__);
+		dsi_pll_is_enabled++;
 	}
-	dsi_pll_is_enabled++;
 
 	dsi_wfld(link, DSI_MCTL_MAIN_DATA_CTL, LINK_EN, true);
 
@@ -575,7 +593,7 @@ static int dsi_link_enable(struct mcde_chnl_state *chnl)
 enable_dsipll_err:
 	clk_disable(clock_dsi_lp);
 	clk_disable(clock_dsi);
-	return -EINVAL;
+	return ret;
 }
 
 static void dsi_link_disable(struct mcde_chnl_state *chnl, bool suspend)
@@ -584,15 +602,20 @@ static void dsi_link_disable(struct mcde_chnl_state *chnl, bool suspend)
 	/* only enter ULPM when device is suspended */
 	if (suspend)
 		dsi_link_handle_ulpm(&chnl->port, true);
-	if (dsi_pll_is_enabled && (--dsi_pll_is_enabled == 0)) {
-		struct mcde_platform_data *pdata =
-			    mcde_dev->dev.platform_data;
-		dev_dbg(&mcde_dev->dev, "%s disable dsipll\n",
-							__func__);
-		pdata->platform_disable_dsipll();
+	if (dsi_use_clk_framework) {
+		clk_disable(chnl->clk_dsi_lp);
+		clk_disable(chnl->clk_dsi_hs);
+	} else {
+		if (dsi_pll_is_enabled && (--dsi_pll_is_enabled == 0)) {
+			struct mcde_platform_data *pdata =
+				    mcde_dev->dev.platform_data;
+			dev_dbg(&mcde_dev->dev, "%s disable dsipll\n",
+								__func__);
+			pdata->platform_disable_dsipll();
+		}
+		clk_disable(clock_dsi);
+		clk_disable(clock_dsi_lp);
 	}
-	clk_disable(clock_dsi);
-	clk_disable(clock_dsi_lp);
 
 	dsi_wfld(chnl->port.link, DSI_MCTL_MAIN_DATA_CTL, LINK_EN, false);
 }
@@ -618,7 +641,7 @@ static void disable_mcde_hw(bool force_disable, bool suspend)
 				if (chnl->port.type == MCDE_PORTTYPE_DSI)
 					dsi_link_disable(chnl, suspend);
 				else if (chnl->port.type == MCDE_PORTTYPE_DPI)
-					clk_disable(clock_dpi);
+					clk_disable(chnl->clk_dpi);
 				chnl->formatter_updated = false;
 			}
 			if (chnl->esram_is_enabled) {
@@ -1279,8 +1302,15 @@ static int update_channel_static_registers(struct mcde_chnl_state *chnl)
 		}
 	}
 
-	if (port->type == MCDE_PORTTYPE_DPI)
-		WARN_ON_ONCE(clk_enable(clock_dpi));
+	if (port->type == MCDE_PORTTYPE_DPI) {
+		if (port->phy.dpi.lcd_freq != clk_round_rate(chnl->clk_dpi,
+							port->phy.dpi.lcd_freq))
+			dev_warn(&mcde_dev->dev, "Could not set lcd freq"
+					" to %d\n", port->phy.dpi.lcd_freq);
+		WARN_ON_ONCE(clk_set_rate(chnl->clk_dpi,
+						port->phy.dpi.lcd_freq));
+		WARN_ON_ONCE(clk_enable(chnl->clk_dpi));
+	}
 
 	mcde_wfld(MCDE_CR, MCDEEN, true);
 	chnl->formatter_updated = true;
@@ -2588,10 +2618,32 @@ static struct mcde_chnl_state *_mcde_chnl_get(enum mcde_chnl chnl_id,
 	chnl->reserved = true;
 
 	if (chnl->port.type == MCDE_PORTTYPE_DPI) {
+		chnl->clk_dpi = clk_get(&mcde_dev->dev, CLK_DPI);
 		if (chnl->port.phy.dpi.tv_mode)
 			chnl->vcmp_per_field = true;
+	} else if (chnl->port.type == MCDE_PORTTYPE_DSI &&
+							dsi_use_clk_framework) {
+		char dsihs_name[10];
+		char dsilp_name[10];
+
+		sprintf(dsihs_name, "dsihs%d", port->link);
+		sprintf(dsilp_name, "dsilp%d", port->link);
+
+		chnl->clk_dsi_lp = clk_get(&mcde_dev->dev, dsilp_name);
+		chnl->clk_dsi_hs = clk_get(&mcde_dev->dev, dsihs_name);
+		if (port->phy.dsi.lp_freq != clk_round_rate(chnl->clk_dsi_lp,
+							port->phy.dsi.lp_freq))
+			dev_warn(&mcde_dev->dev, "Could not set dsi lp freq"
+					" to %d\n", port->phy.dsi.lp_freq);
+		WARN_ON_ONCE(clk_set_rate(chnl->clk_dsi_lp,
+							port->phy.dsi.lp_freq));
+		if (port->phy.dsi.hs_freq != clk_round_rate(chnl->clk_dsi_hs,
+							port->phy.dsi.hs_freq))
+			dev_warn(&mcde_dev->dev, "Could not set dsi hs freq"
+					" to %d\n", port->phy.dsi.hs_freq);
+		WARN_ON_ONCE(clk_set_rate(chnl->clk_dsi_hs,
+							port->phy.dsi.hs_freq));
 	}
-
 	return chnl;
 }
 
@@ -2989,10 +3041,16 @@ void mcde_chnl_put(struct mcde_chnl_state *chnl)
 
 	chnl->reserved = false;
 	if (chnl->port.type == MCDE_PORTTYPE_DPI) {
+		clk_put(chnl->clk_dpi);
 		if (chnl->port.phy.dpi.tv_mode) {
 			chnl->vcmp_per_field = false;
 			chnl->even_vcmp = false;
 		}
+	} else if (chnl->port.type == MCDE_PORTTYPE_DSI) {
+		if (dsi_use_clk_framework) {
+			clk_put(chnl->clk_dsi_lp);
+			clk_put(chnl->clk_dsi_hs);
+		}
 	}
 
 	dev_vdbg(&mcde_dev->dev, "%s exit\n", __func__);
@@ -3283,39 +3341,32 @@ static int init_clocks_and_power(struct platform_device *pdev)
 								__func__);
 	}
 
-    /*
-     * DSI, DSI LP and DPI clocks are not necessary to get
-     * There can be platforms that not have DSI, DPI support
-    */
-	clock_dsi = clk_get(&pdev->dev, pdata->clock_dsi_id);
-	if (IS_ERR(clock_dsi))
-		dev_dbg(&pdev->dev, "%s: Failed to get clock '%s'\n",
-					__func__, pdata->clock_dsi_id);
+	if (!dsi_use_clk_framework) {
+		clock_dsi = clk_get(&pdev->dev, pdata->clock_dsi_id);
+		if (IS_ERR(clock_dsi))
+			dev_dbg(&pdev->dev, "%s: Failed to get clock '%s'\n",
+						__func__, pdata->clock_dsi_id);
 
-	clock_dsi_lp = clk_get(&pdev->dev, pdata->clock_dsi_lp_id);
-	if (IS_ERR(clock_dsi_lp))
-		dev_dbg(&pdev->dev, "%s: Failed to get clock '%s'\n",
+		clock_dsi_lp = clk_get(&pdev->dev, pdata->clock_dsi_lp_id);
+		if (IS_ERR(clock_dsi_lp))
+			dev_dbg(&pdev->dev, "%s: Failed to get clock '%s'\n",
 					__func__, pdata->clock_dsi_lp_id);
+	}
 
-	clock_dpi = clk_get(&pdev->dev, pdata->clock_dpi_id);
-	if (IS_ERR(clock_dpi))
-		dev_dbg(&pdev->dev, "%s: Failed to get clock '%s'\n",
-					__func__, pdata->clock_dpi_id);
-
-	clock_mcde = clk_get(&pdev->dev, pdata->clock_mcde_id);
+	clock_mcde = clk_get(&pdev->dev, CLK_MCDE);
 	if (IS_ERR(clock_mcde)) {
 		ret = PTR_ERR(clock_mcde);
-		dev_warn(&pdev->dev, "%s: Failed to get clock '%s'\n",
-					__func__, pdata->clock_mcde_id);
+		dev_warn(&pdev->dev, "%s: Failed to get mcde_clk\n", __func__);
 		goto clk_mcde_err;
 	}
 
 	return ret;
 
 clk_mcde_err:
-	clk_put(clock_dpi);
-	clk_put(clock_dsi_lp);
-	clk_put(clock_dsi);
+	if (!dsi_use_clk_framework) {
+		clk_put(clock_dsi_lp);
+		clk_put(clock_dsi);
+	}
 
 	if (regulator_vana)
 		regulator_put(regulator_vana);
@@ -3331,9 +3382,10 @@ static void remove_clocks_and_power(struct platform_device *pdev)
 {
 	/* REVIEW: Release only if exist */
 	/* REVIEW: Remove make sure MCDE is done */
-	clk_put(clock_dpi);
-	clk_put(clock_dsi_lp);
-	clk_put(clock_dsi);
+	if (!dsi_use_clk_framework) {
+		clk_put(clock_dsi_lp);
+		clk_put(clock_dsi);
+	}
 	clk_put(clock_mcde);
 	if (regulator_vana)
 		regulator_put(regulator_vana);
@@ -3369,6 +3421,7 @@ static int probe_hw(struct platform_device *pdev)
 		input_fifo_size = 128;
 		output_fifo_ab_size = 640;
 		output_fifo_c0c1_size = 160;
+		dsi_use_clk_framework = true;
 		dev_info(&mcde_dev->dev, "db8500 V2 HW\n");
 		break;
 	case MCDE_VERSION_4_0_4:
@@ -3378,6 +3431,7 @@ static int probe_hw(struct platform_device *pdev)
 		input_fifo_size = 80;
 		output_fifo_ab_size = 320;
 		dsi_ifc_is_supported = false;
+		dsi_use_clk_framework = false;
 		dev_info(&mcde_dev->dev, "db5500 V2 HW\n");
 		break;
 	case MCDE_VERSION_4_1_3:
@@ -3388,6 +3442,7 @@ static int probe_hw(struct platform_device *pdev)
 		input_fifo_size = 192;
 		output_fifo_ab_size = 640;
 		output_fifo_c0c1_size = 160;
+		dsi_use_clk_framework = false;
 		dev_info(&mcde_dev->dev, "db9540 V1 HW\n");
 		break;
 	case MCDE_VERSION_3_0_5:
diff --git a/include/video/mcde.h b/include/video/mcde.h
index 39b190c6403..015350f4495 100644
--- a/include/video/mcde.h
+++ b/include/video/mcde.h
@@ -138,6 +138,9 @@ struct mcde_port {
 			 */
 			u32 vid_wakeup_time;
 
+			u32 hs_freq;
+			u32 lp_freq;
+
 			/* DSI data lanes are swapped if true */
 			bool data_lanes_swap;
 		} dsi;
@@ -146,6 +149,7 @@ struct mcde_port {
 			bool tv_mode;
 			u16 clock_div; /* use 0 or 1 for no clock divider */
 			u32 polarity;    /* see DPI_ACT_LOW_* definitions */
+			u32 lcd_freq;
 		} dpi;
 	} phy;
 };
-- 
cgit v1.2.3


From b5478f54d905e5c81680d1974e3a5fae1ca8941d Mon Sep 17 00:00:00 2001
From: Maciej Socha <maciej.socha@stericsson.com>
Date: Tue, 6 Dec 2011 12:39:36 +0100
Subject: misc: compdev added
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

This driver is needed to support new display composition cases in HC/ICS. The
driver is similar to the dispdev driver but not the same.

ST-Ericsson ID: 350337
ST-Ericsson FOSS-OUT ID: NA

Change-Id: Ide63b6f3994dece44259ac25da26b06a2fcca832
Signed-off-by: Jörgen Nilsson <jorgen.nilsson@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/42890
Reviewed-by: Per-Daniel OLSSON <per-daniel.olsson@stericsson.com>
Tested-by: Per-Daniel OLSSON <per-daniel.olsson@stericsson.com>
Reviewed-by: Jonas ABERG <jonas.aberg@stericsson.com>
---
 arch/arm/mach-ux500/board-mop500-mcde.c |  17 +-
 drivers/misc/Kconfig                    |   9 +
 drivers/misc/Makefile                   |   1 +
 drivers/misc/compdev/Makefile           |   1 +
 drivers/misc/compdev/compdev.c          | 481 ++++++++++++++++++++++++++++++++
 include/linux/compdev.h                 | 106 +++++++
 6 files changed, 614 insertions(+), 1 deletion(-)
 create mode 100644 drivers/misc/compdev/Makefile
 create mode 100644 drivers/misc/compdev/compdev.c
 create mode 100644 include/linux/compdev.h

diff --git a/arch/arm/mach-ux500/board-mop500-mcde.c b/arch/arm/mach-ux500/board-mop500-mcde.c
index 470302b6809..8b9e0b5a9c2 100644
--- a/arch/arm/mach-ux500/board-mop500-mcde.c
+++ b/arch/arm/mach-ux500/board-mop500-mcde.c
@@ -13,6 +13,7 @@
 #include <linux/mfd/ab8500/denc.h>
 #include <linux/workqueue.h>
 #include <linux/dispdev.h>
+#include <linux/compdev.h>
 #include <asm/mach-types.h>
 #include <linux/clk.h>
 #include <mach/devices.h>
@@ -348,7 +349,7 @@ static int display_postregistered_callback(struct notifier_block *nb,
 	u16 virtual_height;
 	u32 rotate = FB_ROTATE_UR;
 	struct fb_info *fbi;
-#ifdef CONFIG_DISPDEV
+#if defined(CONFIG_DISPDEV) || defined(CONFIG_COMPDEV)
 	struct mcde_fb *mfb;
 #endif
 
@@ -397,6 +398,20 @@ static int display_postregistered_callback(struct notifier_block *nb,
 	}
 #endif
 
+#ifdef CONFIG_COMPDEV
+	mfb = to_mcde_fb(fbi);
+	/* Create a compdev overlay for this display */
+	if (compdev_create(ddev, mfb->ovlys[0]) < 0) {
+		dev_warn(&ddev->dev,
+			"Failed to create compdev for display %s\n",
+					ddev->name);
+		goto display_postregistered_callback_err;
+	} else {
+		dev_info(&ddev->dev, "compdev created for (%s)\n",
+					ddev->name);
+	}
+#endif
+
 out:
 	return 0;
 
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index 1b3e2b1ae2c..c7c7114859f 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -470,6 +470,15 @@ config DISPDEV
 	  addition to the framebuffer). The device allows for registration of
 	  userspace buffers to be used with the overlay.
 
+config COMPDEV
+	bool "Display composition device"
+	depends on FB_MCDE && HWMEM
+	default n
+	help
+	  This driver provides a way to use several overlays for a display.
+	  This driver replaces the use of the framebuffer The device allows
+	  for posting userspace buffers to be used with the overlays.
+
 config PCH_PHUB
 	tristate "Intel EG20T PCH/LAPIS Semicon IOH(ML7213/ML7223/ML7831) PHUB"
 	depends on PCI
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 2868ec61bc5..6f925aafbd5 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -47,6 +47,7 @@ obj-$(CONFIG_AB8500_PWM)	+= ab8500-pwm.o
 obj-y				+= lis3lv02d/
 obj-y				+= carma/
 obj-$(CONFIG_DISPDEV)		+= dispdev/
+obj-$(CONFIG_COMPDEV)		+= compdev/
 obj-$(CONFIG_USB_SWITCH_FSA9480) += fsa9480.o
 obj-$(CONFIG_ALTERA_STAPL)	+=altera-stapl/
 obj-$(CONFIG_MAX8997_MUIC)	+= max8997-muic.o
diff --git a/drivers/misc/compdev/Makefile b/drivers/misc/compdev/Makefile
new file mode 100644
index 00000000000..8d5cd14dc36
--- /dev/null
+++ b/drivers/misc/compdev/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_DISPDEV) += compdev.o
diff --git a/drivers/misc/compdev/compdev.c b/drivers/misc/compdev/compdev.c
new file mode 100644
index 00000000000..7e840a59d9c
--- /dev/null
+++ b/drivers/misc/compdev/compdev.c
@@ -0,0 +1,481 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2011
+ *
+ * Display overlay compositer device driver
+ *
+ * Author: Anders Bauer <anders.bauer@stericsson.com>
+ * for ST-Ericsson.
+ *
+ * Modified: Per-Daniel Olsson <per-daniel.olsson@stericsson.com>
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+
+#include <linux/kernel.h>
+#include <linux/fs.h>
+#include <linux/err.h>
+#include <linux/slab.h>
+#include <linux/miscdevice.h>
+#include <linux/uaccess.h>
+#include <linux/list.h>
+#include <linux/mutex.h>
+#include <linux/ioctl.h>
+
+#include <linux/compdev.h>
+#include <linux/hwmem.h>
+#include <video/mcde_dss.h>
+
+static LIST_HEAD(dev_list);
+static DEFINE_MUTEX(dev_list_lock);
+
+struct compdev_buffer {
+	struct hwmem_alloc *alloc;
+	enum compdev_ptr_type type;
+	u32 size;
+	u32 paddr; /* if pinned */
+};
+
+struct compdev {
+	bool open;
+	struct mutex lock;
+	struct miscdevice mdev;
+	struct list_head list;
+	struct mcde_display_device *ddev;
+	struct mcde_overlay *ovly[NUM_COMPDEV_BUFS];
+	struct compdev_buffer ovly_buffer[NUM_COMPDEV_BUFS];
+	struct compdev_size phy_size;
+};
+
+static int compdev_open(struct inode *inode, struct file *file)
+{
+	struct compdev *cd = NULL;
+
+	mutex_lock(&dev_list_lock);
+	list_for_each_entry(cd, &dev_list, list)
+		if (cd->mdev.minor == iminor(inode))
+			break;
+
+	if (&cd->list == &dev_list) {
+		mutex_unlock(&dev_list_lock);
+		return -ENODEV;
+	}
+
+	if (cd->open) {
+		mutex_unlock(&dev_list_lock);
+		return -EBUSY;
+	}
+
+	cd->open = true;
+
+	mutex_unlock(&dev_list_lock);
+
+	file->private_data = cd;
+
+	return 0;
+}
+
+static int disable_overlay(struct mcde_overlay *ovly)
+{
+	struct mcde_overlay_info info;
+
+	mcde_dss_get_overlay_info(ovly, &info);
+	if (info.paddr != 0) {
+		/* Set the pointer to zero to disable the overlay */
+		info.paddr = 0;
+		mcde_dss_apply_overlay(ovly, &info);
+	}
+	return 0;
+}
+
+static int compdev_release(struct inode *inode, struct file *file)
+{
+	struct compdev *cd = NULL;
+	int i;
+
+	mutex_lock(&dev_list_lock);
+	list_for_each_entry(cd, &dev_list, list)
+		if (cd->mdev.minor == iminor(inode))
+			break;
+	mutex_unlock(&dev_list_lock);
+
+	if (&cd->list == &dev_list)
+		return -ENODEV;
+
+	for (i = 0; i < NUM_COMPDEV_BUFS; i++) {
+		disable_overlay(cd->ovly[i]);
+		if (cd->ovly_buffer[i].paddr &&
+				cd->ovly_buffer[i].type ==
+				COMPDEV_PTR_HWMEM_BUF_NAME_OFFSET)
+			hwmem_unpin(cd->ovly_buffer[i].alloc);
+
+		cd->ovly_buffer[i].alloc = NULL;
+		cd->ovly_buffer[i].size = 0;
+		cd->ovly_buffer[i].paddr = 0;
+	}
+
+	cd->open = false;
+	return 0;
+}
+
+static enum mcde_ovly_pix_fmt get_ovly_fmt(enum compdev_fmt fmt)
+{
+	switch (fmt) {
+	default:
+	case COMPDEV_FMT_RGB565:
+		return MCDE_OVLYPIXFMT_RGB565;
+	case COMPDEV_FMT_RGB888:
+		return MCDE_OVLYPIXFMT_RGB888;
+	case COMPDEV_FMT_RGBA8888:
+		return MCDE_OVLYPIXFMT_RGBA8888;
+	case COMPDEV_FMT_RGBX8888:
+		return MCDE_OVLYPIXFMT_RGBX8888;
+	case COMPDEV_FMT_YUV422:
+		return MCDE_OVLYPIXFMT_YCbCr422;
+	}
+}
+
+static int compdev_setup_ovly(struct compdev_img *img,
+		struct compdev_buffer *buffer,
+		struct mcde_overlay *ovly,
+		int z_order,
+		struct compdev *cd)
+{
+	int ret = 0;
+	enum hwmem_mem_type memtype;
+	enum hwmem_access access;
+	struct hwmem_mem_chunk mem_chunk;
+	size_t mem_chunk_length = 1;
+	struct hwmem_region rgn = { .offset = 0, .count = 1, .start = 0 };
+	struct mcde_overlay_info info;
+
+	if (img->buf.type == COMPDEV_PTR_HWMEM_BUF_NAME_OFFSET) {
+		buffer->type = COMPDEV_PTR_HWMEM_BUF_NAME_OFFSET;
+		buffer->alloc = hwmem_resolve_by_name(img->buf.hwmem_buf_name);
+		if (IS_ERR(buffer->alloc)) {
+			ret = PTR_ERR(buffer->alloc);
+			dev_warn(cd->mdev.this_device,
+				"HWMEM resolve failed, %d\n", ret);
+			goto resolve_failed;
+		}
+
+		hwmem_get_info(buffer->alloc, &buffer->size, &memtype,
+				&access);
+
+		if (!(access & HWMEM_ACCESS_READ) ||
+				memtype != HWMEM_MEM_CONTIGUOUS_SYS) {
+			ret = -EACCES;
+			dev_warn(cd->mdev.this_device,
+				"Invalid_mem overlay, %d\n", ret);
+			goto invalid_mem;
+		}
+		ret = hwmem_pin(buffer->alloc, &mem_chunk, &mem_chunk_length);
+		if (ret) {
+			dev_warn(cd->mdev.this_device,
+				"Pin failed, %d\n", ret);
+			goto pin_failed;
+		}
+
+		rgn.size = rgn.end = buffer->size;
+		ret = hwmem_set_domain(buffer->alloc, HWMEM_ACCESS_READ,
+			HWMEM_DOMAIN_SYNC, &rgn);
+		if (ret)
+			dev_warn(cd->mdev.this_device,
+				"Set domain failed, %d\n", ret);
+
+		buffer->paddr = mem_chunk.paddr;
+	} else if (img->buf.type == COMPDEV_PTR_PHYSICAL) {
+		buffer->type = COMPDEV_PTR_PHYSICAL;
+		buffer->alloc = NULL;
+		buffer->size = img->buf.len;
+		buffer->paddr = img->buf.offset;
+	}
+
+	info.stride = img->pitch;
+	info.fmt = get_ovly_fmt(img->fmt);
+	info.src_x = 0;
+	info.src_y = 0;
+	info.dst_x = img->dst_rect.x;
+	info.dst_y = img->dst_rect.y;
+	info.dst_z = z_order;
+	info.w = img->dst_rect.width;
+	info.h = img->dst_rect.height;
+	info.dirty.x = 0;
+	info.dirty.y = 0;
+	info.dirty.w = cd->phy_size.width;
+	info.dirty.h = cd->phy_size.height;
+	info.paddr = buffer->paddr;
+	mcde_dss_apply_overlay(ovly, &info);
+	return ret;
+
+pin_failed:
+invalid_mem:
+	buffer->alloc = NULL;
+	buffer->size = 0;
+	buffer->paddr = 0;
+
+resolve_failed:
+	return ret;
+}
+
+static int release_prev_frame(struct compdev *cd)
+{
+	int ret = 0;
+	int i;
+
+	/* Handle unpin of previous buffers */
+	for (i = 0; i < NUM_COMPDEV_BUFS; i++) {
+		if (cd->ovly_buffer[i].type ==
+				COMPDEV_PTR_HWMEM_BUF_NAME_OFFSET &&
+				cd->ovly_buffer[i].paddr != 0) {
+			hwmem_unpin(cd->ovly_buffer[i].alloc);
+			hwmem_release(cd->ovly_buffer[i].alloc);
+		}
+		cd->ovly_buffer[i].alloc = NULL;
+		cd->ovly_buffer[i].size = 0;
+		cd->ovly_buffer[i].paddr = 0;
+	}
+	return ret;
+
+}
+
+static void check_buffer(struct compdev *cd,
+		struct compdev_buffer *overlay_buffer,
+		struct compdev_buf *posted_buffer)
+{
+	if (overlay_buffer->type == COMPDEV_PTR_PHYSICAL &&
+			posted_buffer->type == COMPDEV_PTR_PHYSICAL &&
+			overlay_buffer->paddr == posted_buffer->offset &&
+			overlay_buffer->paddr != 0)
+		dev_warn(cd->mdev.this_device, "The same FB pointer!!\n");
+}
+
+static int compdev_post_buffers(struct compdev *cd,
+		struct compdev_post_buffers_req *req)
+{
+	int ret = 0;
+	int i, j;
+
+	for (i = 0; i < NUM_COMPDEV_BUFS; i++)
+		for (j = 0; j < NUM_COMPDEV_BUFS; j++)
+			check_buffer(cd, &cd->ovly_buffer[i],
+				&req->img_buffers[j].buf);
+
+	/* Unpin the previous frame */
+	release_prev_frame(cd);
+
+	/* Validate buffer count */
+	if (req->buffer_count > NUM_COMPDEV_BUFS || req->buffer_count == 0)	{
+		dev_warn(cd->mdev.this_device,
+			"Illegal buffer count, will be clamped to %d\n",
+			NUM_COMPDEV_BUFS);
+		req->buffer_count = NUM_COMPDEV_BUFS;
+	}
+
+	/* Handle buffers */
+	for (i = 0; i < req->buffer_count; i++) {
+		int overlay_index = req->buffer_count - i - 1;
+		ret = compdev_setup_ovly(&req->img_buffers[i],
+			&cd->ovly_buffer[i], cd->ovly[overlay_index], i, cd);
+		if (ret)
+			dev_warn(cd->mdev.this_device,
+				"Failed to setup overlay[%d], %d\n", i, ret);
+	}
+
+	for (i = NUM_COMPDEV_BUFS; i > req->buffer_count; i--)
+		disable_overlay(cd->ovly[i-1]);
+
+	/* Do the display update */
+	if (req->buffer_count > 0)
+		mcde_dss_update_overlay(cd->ovly[0], false);
+	else
+		dev_warn(cd->mdev.this_device, "No overlays requested\n");
+	return ret;
+}
+
+static long compdev_ioctl(struct file *file,
+		unsigned int cmd,
+		unsigned long arg)
+{
+	int ret;
+	struct compdev *cd = (struct compdev *)file->private_data;
+	struct compdev_post_buffers_req req;
+
+	mutex_lock(&cd->lock);
+
+	switch (cmd) {
+	case COMPDEV_GET_SIZE_IOC:
+		ret = copy_to_user((void __user *)arg, &cd->phy_size,
+				sizeof(cd->phy_size));
+		if (ret)
+			ret = -EFAULT;
+		break;
+	case COMPDEV_POST_BUFFERS_IOC:
+		/* arg is user pointer to struct compdev_post_buffers_req */
+
+		/* Initialize the structure */
+		memset(&req, 0, sizeof(req));
+
+		/*
+		 * The user request is a sub structure of the
+		 * kernel request structure.
+		 */
+
+		/* Get the user data */
+		if (copy_from_user(&req, (void *)arg, sizeof(req))) {
+			dev_warn(cd->mdev.this_device,
+				"%s: copy_from_user failed\n",
+				__func__);
+			mutex_unlock(&cd->lock);
+			return -EFAULT;
+		}
+
+		ret = compdev_post_buffers(cd, &req);
+
+		break;
+	default:
+		ret = -ENOSYS;
+	}
+
+	mutex_unlock(&cd->lock);
+
+	return ret;
+}
+
+static const struct file_operations compdev_fops = {
+	.open = compdev_open,
+	.release = compdev_release,
+	.unlocked_ioctl = compdev_ioctl,
+};
+
+static void init_compdev(struct compdev *cd, struct mcde_display_device *ddev,
+							const char *name)
+{
+	mutex_init(&cd->lock);
+	INIT_LIST_HEAD(&cd->list);
+	cd->ddev = ddev;
+	cd->mdev.minor = MISC_DYNAMIC_MINOR;
+	cd->mdev.name = name;
+	cd->mdev.fops = &compdev_fops;
+}
+
+int compdev_create(struct mcde_display_device *ddev,
+		struct mcde_overlay *parent_ovly)
+{
+	int ret = 0;
+	int i;
+	struct compdev *cd;
+	struct mcde_video_mode vmode;
+	struct mcde_overlay_info info;
+
+	static int counter;
+	char name[10];
+
+	cd = kzalloc(sizeof(struct compdev), GFP_KERNEL);
+	if (!cd)
+		return -ENOMEM;
+
+	snprintf(name, sizeof(name), "%s%d", COMPDEV_DEFAULT_DEVICE_PREFIX,
+		counter++);
+	init_compdev(cd, ddev, name);
+	mcde_dss_get_video_mode(ddev, &vmode);
+
+	cd->ovly[0] = parent_ovly;
+	if (!cd->ovly[0]) {
+		ret = -ENOMEM;
+		goto fail_create_ovly;
+	}
+
+	for (i = 1; i < NUM_COMPDEV_BUFS; i++) {
+		cd->ovly[i] = mcde_dss_create_overlay(ddev, &info);
+		if (!cd->ovly[i]) {
+			ret = -ENOMEM;
+			goto fail_create_ovly;
+		}
+		mcde_dss_enable_overlay(cd->ovly[i]);
+		disable_overlay(cd->ovly[i]);
+	}
+
+	mcde_dss_get_native_resolution(ddev, &cd->phy_size.width,
+			&cd->phy_size.height);
+
+	ret = misc_register(&cd->mdev);
+	if (ret)
+		goto fail_register_misc;
+	mutex_lock(&dev_list_lock);
+	list_add_tail(&cd->list, &dev_list);
+	mutex_unlock(&dev_list_lock);
+
+	goto out;
+
+fail_register_misc:
+fail_create_ovly:
+	for (i = 0; i < NUM_COMPDEV_BUFS; i++) {
+		if (cd->ovly[i])
+			mcde_dss_destroy_overlay(cd->ovly[i]);
+	}
+	kfree(cd);
+out:
+	return ret;
+}
+
+void compdev_destroy(struct mcde_display_device *ddev)
+{
+	struct compdev *cd;
+	struct compdev *tmp;
+	int i;
+
+	mutex_lock(&dev_list_lock);
+	list_for_each_entry_safe(cd, tmp, &dev_list, list) {
+		if (cd->ddev == ddev) {
+			list_del(&cd->list);
+			misc_deregister(&cd->mdev);
+			for (i = 0; i < NUM_COMPDEV_BUFS; i++)
+				mcde_dss_destroy_overlay(cd->ovly[i]);
+			kfree(cd);
+			break;
+		}
+	}
+	mutex_unlock(&dev_list_lock);
+}
+
+static void compdev_destroy_all(void)
+{
+	struct compdev *cd;
+	struct compdev *tmp;
+	int i;
+
+	mutex_lock(&dev_list_lock);
+	list_for_each_entry_safe(cd, tmp, &dev_list, list) {
+		list_del(&cd->list);
+		misc_deregister(&cd->mdev);
+		for (i = 0; i < NUM_COMPDEV_BUFS; i++)
+			mcde_dss_destroy_overlay(cd->ovly[i]);
+		kfree(cd);
+	}
+	mutex_unlock(&dev_list_lock);
+
+	mutex_destroy(&dev_list_lock);
+}
+
+static int __init compdev_init(void)
+{
+	pr_info("%s\n", __func__);
+
+	mutex_init(&dev_list_lock);
+
+	return 0;
+}
+module_init(compdev_init);
+
+static void __exit compdev_exit(void)
+{
+	compdev_destroy_all();
+	pr_info("%s\n", __func__);
+}
+module_exit(compdev_exit);
+
+MODULE_AUTHOR("Anders Bauer <anders.bauer@stericsson.com>");
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("Display overlay device driver");
+
diff --git a/include/linux/compdev.h b/include/linux/compdev.h
new file mode 100644
index 00000000000..9e707c7b770
--- /dev/null
+++ b/include/linux/compdev.h
@@ -0,0 +1,106 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2011
+ *
+ * ST-Ericsson Display overlay compositer device driver
+ *
+ * Author: Anders Bauer <anders.bauer@stericsson.com>
+ * for ST-Ericsson.
+ *
+ * Modified: Per-Daniel Olsson <per-daniel.olsson@stericsson.com>
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+
+#ifndef _COMPDEV_H_
+#define _COMPDEV_H_
+
+#if !defined(__KERNEL__) && !defined(_KERNEL)
+#include <stdint.h>
+#else
+#include <linux/types.h>
+#include <video/mcde.h>
+#endif
+
+#if defined(__KERNEL__) || defined(_KERNEL)
+#include <linux/mm_types.h>
+#include <linux/bitops.h>
+#else
+#define BIT(nr)			(1UL << (nr))
+#endif
+
+#define COMPDEV_DEFAULT_DEVICE_PREFIX "comp"
+#define NUM_COMPDEV_BUFS 2
+
+enum compdev_fmt {
+	COMPDEV_FMT_RGB565,
+	COMPDEV_FMT_RGB888,
+	COMPDEV_FMT_RGBX8888,
+	COMPDEV_FMT_RGBA8888,
+	COMPDEV_FMT_YUV422,
+};
+
+struct compdev_size {
+	uint16_t width;
+	uint16_t height;
+};
+
+/* Display rotation */
+enum compdev_rotation {
+	COMPDEV_ROT_0       = 0,
+	COMPDEV_ROT_90_CCW  = 90,
+	COMPDEV_ROT_180_CCW = 180,
+	COMPDEV_ROT_270_CCW = 270,
+	COMPDEV_ROT_90_CW   = COMPDEV_ROT_270_CCW,
+	COMPDEV_ROT_180_CW  = COMPDEV_ROT_180_CCW,
+	COMPDEV_ROT_270_CW  = COMPDEV_ROT_90_CCW,
+};
+
+enum compdev_ptr_type {
+	COMPDEV_PTR_PHYSICAL,
+	COMPDEV_PTR_HWMEM_BUF_NAME_OFFSET,
+};
+
+struct compdev_rect {
+	__s32  x;
+	__s32  y;
+	__s32  width;
+	__s32  height;
+};
+
+struct compdev_buf {
+	enum compdev_ptr_type  type;
+	__s32                  hwmem_buf_name;
+	__s32                  fd;
+	__u32                  offset;
+	__u32                  len;
+};
+
+struct compdev_img {
+	enum compdev_fmt     fmt;
+	struct compdev_buf   buf;
+	__s32                width;
+	__s32                height;
+	__u32                pitch;
+	struct compdev_rect  dst_rect;
+};
+
+struct compdev_post_buffers_req {
+	enum   compdev_rotation  rotation;
+	struct compdev_img       img_buffers[NUM_COMPDEV_BUFS];
+	__u8                     buffer_count;
+};
+
+#define COMPDEV_GET_SIZE_IOC       _IOR('D', 1, struct compdev_size)
+#define COMPDEV_POST_BUFFERS_IOC   _IOW('D', 2, struct compdev_post_buffers_req)
+
+#ifdef __KERNEL__
+
+int compdev_create(struct mcde_display_device *ddev,
+		struct mcde_overlay *parent_ovly);
+void compdev_destroy(struct mcde_display_device *ddev);
+
+#endif /* __KERNEL__ */
+
+#endif /* _COMPDEV_H_ */
+
-- 
cgit v1.2.3


From 01505bc0bb2b83630610521c252204cf8c263d57 Mon Sep 17 00:00:00 2001
From: Jörgen Nilsson <jorgen.nilsson@stericsson.com>
Date: Thu, 15 Dec 2011 08:09:12 +0100
Subject: misc: compdev: Handle rotation
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Make sure to handle incoming rotated surfaces with
MCDE.

ST-Ericsson ID: 404691
ST-Ericsson FOSS-OUT ID: NA

Change-Id: Ia3c836df61e266e3e3d95f2a2e44140c50cf55db
Signed-off-by: Jörgen Nilsson <jorgen.nilsson@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/42891
Reviewed-by: Jonas ABERG <jonas.aberg@stericsson.com>
---
 drivers/misc/compdev/compdev.c | 67 ++++++++++++++++++++++++++++++++++++++----
 1 file changed, 62 insertions(+), 5 deletions(-)

diff --git a/drivers/misc/compdev/compdev.c b/drivers/misc/compdev/compdev.c
index 7e840a59d9c..d7ed1c867e2 100644
--- a/drivers/misc/compdev/compdev.c
+++ b/drivers/misc/compdev/compdev.c
@@ -45,6 +45,8 @@ struct compdev {
 	struct mcde_overlay *ovly[NUM_COMPDEV_BUFS];
 	struct compdev_buffer ovly_buffer[NUM_COMPDEV_BUFS];
 	struct compdev_size phy_size;
+	enum mcde_display_rotation display_rotation;
+	enum compdev_rotation current_buffer_rotation;
 };
 
 static int compdev_open(struct inode *inode, struct file *file)
@@ -218,6 +220,37 @@ resolve_failed:
 	return ret;
 }
 
+static int compdev_update_rotation(struct compdev *cd, enum compdev_rotation rotation)
+{
+	/* Set video mode */
+	struct mcde_video_mode vmode;
+	int ret = 0;
+
+	memset(&vmode, 0, sizeof(struct mcde_video_mode));
+	mcde_dss_get_video_mode(cd->ddev, &vmode);
+	if ((cd->display_rotation + rotation) % 180) {
+		vmode.xres = cd->phy_size.height;
+		vmode.yres = cd->phy_size.width;
+	} else {
+		vmode.xres = cd->phy_size.width;
+		vmode.yres = cd->phy_size.height;
+	}
+
+	ret = mcde_dss_set_video_mode(cd->ddev, &vmode);
+	if (ret != 0)
+		goto exit;
+
+	/* Set rotation */
+	ret = mcde_dss_set_rotation(cd->ddev, (cd->display_rotation + rotation) % 360);
+	if (ret != 0)
+		goto exit;
+
+	/* Apply */
+	ret = mcde_dss_apply_channel(cd->ddev);
+exit:
+	return ret;
+}
+
 static int release_prev_frame(struct compdev *cd)
 {
 	int ret = 0;
@@ -265,13 +298,24 @@ static int compdev_post_buffers(struct compdev *cd,
 	release_prev_frame(cd);
 
 	/* Validate buffer count */
-	if (req->buffer_count > NUM_COMPDEV_BUFS || req->buffer_count == 0)	{
+	if (req->buffer_count > NUM_COMPDEV_BUFS || req->buffer_count == 0) {
 		dev_warn(cd->mdev.this_device,
 			"Illegal buffer count, will be clamped to %d\n",
 			NUM_COMPDEV_BUFS);
 		req->buffer_count = NUM_COMPDEV_BUFS;
 	}
 
+	/* Set channel rotation */
+	if (req->buffer_count > 0 &&
+			(cd->current_buffer_rotation != req->rotation)) {
+		if (compdev_update_rotation(cd, req->rotation) != 0)
+			dev_warn(cd->mdev.this_device,
+				"Failed to update MCDE rotation (req->rotation = %d), %d\n",
+				req->rotation, ret);
+		else
+			cd->current_buffer_rotation = req->rotation;
+	}
+
 	/* Handle buffers */
 	for (i = 0; i < req->buffer_count; i++) {
 		int overlay_index = req->buffer_count - i - 1;
@@ -305,10 +349,20 @@ static long compdev_ioctl(struct file *file,
 
 	switch (cmd) {
 	case COMPDEV_GET_SIZE_IOC:
-		ret = copy_to_user((void __user *)arg, &cd->phy_size,
-				sizeof(cd->phy_size));
-		if (ret)
-			ret = -EFAULT;
+		{
+			struct compdev_size tmp;
+			if ((cd->display_rotation) % 180) {
+				tmp.height = cd->phy_size.width;
+				tmp.width = cd->phy_size.height;
+			} else {
+				tmp.height = cd->phy_size.height;
+				tmp.width = cd->phy_size.width;
+			}
+			ret = copy_to_user((void __user *)arg, &tmp,
+								sizeof(tmp));
+			if (ret)
+				ret = -EFAULT;
+		}
 		break;
 	case COMPDEV_POST_BUFFERS_IOC:
 		/* arg is user pointer to struct compdev_post_buffers_req */
@@ -399,6 +453,9 @@ int compdev_create(struct mcde_display_device *ddev,
 	mcde_dss_get_native_resolution(ddev, &cd->phy_size.width,
 			&cd->phy_size.height);
 
+	cd->display_rotation = mcde_dss_get_rotation(ddev);
+	cd->current_buffer_rotation = 0;
+
 	ret = misc_register(&cd->mdev);
 	if (ret)
 		goto fail_register_misc;
-- 
cgit v1.2.3


From 476bdd627a2358b29d25f77a7452f3823cdbbd76 Mon Sep 17 00:00:00 2001
From: Marcus Lorentzon <marcus.xm.lorentzon@stericsson.com>
Date: Thu, 22 Dec 2011 14:20:58 +0100
Subject: video: mcde: Overlay register access race

When two updates are requested before display vsync interrupt
of first update has arrived, then MCDE update screen using the
buffer of the second update for both updates.
This fix makes sure MCDE driver wait for first update before
updating overlay registers.

ST-Ericsson ID: 406356
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I65aa73455ac4a27d150ae196477d6a313cada85b
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/43515
Reviewed-by: Marcus LORENTZON <marcus.xm.lorentzon@stericsson.com>
Reviewed-by: QABUILD
Reviewed-by: Marta LOFSTEDT <marta.lofstedt@stericsson.com>
Tested-by: Marta LOFSTEDT <marta.lofstedt@stericsson.com>
Reviewed-by: Anders BAUER <anders.bauer@stericsson.com>
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
---
 drivers/video/mcde/mcde_hw.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index 3db1d50d3c1..6e846e60f47 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -2764,10 +2764,14 @@ static void chnl_update_overlay(struct mcde_chnl_state *chnl,
 		return;
 
 	if (ovly->regs.dirty_buf) {
+		if (!chnl->port.update_auto_trig)
+			set_channel_state_sync(chnl, CHNLSTATE_SETUP);
 		update_overlay_registers_on_the_fly(ovly->idx, &ovly->regs);
 		mcde_debugfs_overlay_update(chnl->id, ovly != chnl->ovly0);
 	}
 	if (ovly->regs.dirty) {
+		if (!chnl->port.update_auto_trig)
+			set_channel_state_sync(chnl, CHNLSTATE_SETUP);
 		chnl_ovly_pixel_format_apply(chnl, ovly);
 		update_overlay_registers(ovly->idx, &ovly->regs, &chnl->port,
 			chnl->fifo, chnl->regs.x, chnl->regs.y,
-- 
cgit v1.2.3


From da8b01762a1f6e80099bf99d7700df7d085982f3 Mon Sep 17 00:00:00 2001
From: Thierry STRUDEL <thierry.strudel@stericsson.com>
Date: Fri, 21 Oct 2011 12:16:25 +0200
Subject: header files: install STE video headers

Installs STE video header files to allow building the STE Ux5xx
STELP.

Signed-off-by: Thierry STRUDEL <thierry.strudel@stericsson.com>
---
 include/linux/Kbuild | 1 +
 include/video/Kbuild | 1 +
 2 files changed, 2 insertions(+)

diff --git a/include/linux/Kbuild b/include/linux/Kbuild
index 3c9b616c834..b3d7e23440e 100644
--- a/include/linux/Kbuild
+++ b/include/linux/Kbuild
@@ -151,6 +151,7 @@ header-y += hid.h
 header-y += hiddev.h
 header-y += hidraw.h
 header-y += hpet.h
+header-y += hwmem.h
 header-y += hysdn_if.h
 header-y += i2c-dev.h
 header-y += i2c.h
diff --git a/include/video/Kbuild b/include/video/Kbuild
index ad3e622c533..d73b95df921 100644
--- a/include/video/Kbuild
+++ b/include/video/Kbuild
@@ -1,3 +1,4 @@
+header-y += b2r2_blt.h
 header-y += edid.h
 header-y += sisfb.h
 header-y += uvesafb.h
-- 
cgit v1.2.3


From 247d6c91f12bb303f6f9710af3aa799fbd065a7d Mon Sep 17 00:00:00 2001
From: Philippe Langlais <philippe.langlais@linaro.org>
Date: Wed, 18 Jan 2012 15:31:50 +0100
Subject: video: compdev: Add include <linux/module.h> for 3.2

Signed-off-by: Philippe Langlais <philippe.langlais@linaro.org>
---
 drivers/misc/compdev/compdev.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/misc/compdev/compdev.c b/drivers/misc/compdev/compdev.c
index d7ed1c867e2..4810e20d4cd 100644
--- a/drivers/misc/compdev/compdev.c
+++ b/drivers/misc/compdev/compdev.c
@@ -13,6 +13,7 @@
  */
 
 #include <linux/kernel.h>
+#include <linux/module.h>
 #include <linux/fs.h>
 #include <linux/err.h>
 #include <linux/slab.h>
-- 
cgit v1.2.3


From 85b9ff145bc61526d2e8d7c61c9c26abd61d8244 Mon Sep 17 00:00:00 2001
From: Philippe Langlais <philippe.langlais@linaro.org>
Date: Fri, 20 Jan 2012 10:50:03 +0100
Subject: mach-ux500: mcde: Change WARN_ON to pr_warning for unknown UI board

On Snowball, we don't support any User Interface Board, now this message
is more discreet.

Signed-off-by: Philippe Langlais <philippe.langlais@linaro.org>
---
 arch/arm/mach-ux500/board-mop500-mcde.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/mach-ux500/board-mop500-mcde.c b/arch/arm/mach-ux500/board-mop500-mcde.c
index 8b9e0b5a9c2..23da62638f8 100644
--- a/arch/arm/mach-ux500/board-mop500-mcde.c
+++ b/arch/arm/mach-ux500/board-mop500-mcde.c
@@ -497,7 +497,7 @@ static int __init init_display_devices(void)
 		/* Sony display on U8500UIBV3 */
 		(void)mcde_display_device_register(&sony_acx424akp_display0);
 	else
-		WARN_ON("Unknown UI board");
+		pr_warning("Unknown UI board\n");
 
 	/* Display reset GPIO is different depending on reference boards */
 	if (uib_is_stuib())
-- 
cgit v1.2.3


From 6615fc55c3bda7b9deeecb7ef8b52ccea3268d00 Mon Sep 17 00:00:00 2001
From: Philippe Langlais <philippe.langlais@stericsson.com>
Date: Mon, 30 Jan 2012 11:21:51 +0100
Subject: mcde: ab8500: Changes for porting on 3.3

Signed-off-by: Philippe Langlais <philippe.langlais@stericsson.com>
---
 drivers/video/mcde/display-ab8500.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/video/mcde/display-ab8500.c b/drivers/video/mcde/display-ab8500.c
index f465b0617c7..a761a5eec80 100644
--- a/drivers/video/mcde/display-ab8500.c
+++ b/drivers/video/mcde/display-ab8500.c
@@ -10,6 +10,7 @@
  */
 
 #include <linux/kernel.h>
+#include <linux/module.h>
 #include <linux/device.h>
 #include <linux/regulator/consumer.h>
 #include <linux/slab.h>
@@ -357,7 +358,7 @@ static int set_video_mode(
 static int set_power_mode(struct mcde_display_device *ddev,
 	enum mcde_display_power_mode power_mode)
 {
-	int ret;
+	int ret = 0;
 	int i;
 	struct display_driver_data *driver_data = dev_get_drvdata(&ddev->dev);
 	AB8500_DISP_TRACE;
-- 
cgit v1.2.3


From 527c0f7b29feec34d498291999ea4ee7ebfa91f0 Mon Sep 17 00:00:00 2001
From: Philippe Langlais <philippe.langlais@linaro.org>
Date: Sat, 10 Mar 2012 21:21:38 +0100
Subject: video: b2r2: Fix kernel headers check problem

Signed-off-by: Philippe Langlais <philippe.langlais@linaro.org>
---
 include/video/b2r2_blt.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/video/b2r2_blt.h b/include/video/b2r2_blt.h
index 26748d4f212..771d4f60fdb 100644
--- a/include/video/b2r2_blt.h
+++ b/include/video/b2r2_blt.h
@@ -16,7 +16,7 @@
 
 #include <linux/types.h>
 
-#if defined(__KERNEL__) || defined(_KERNEL)
+#if defined(__KERNEL__)
 #include <linux/mm_types.h>
 #include <linux/bitops.h>
 #else
-- 
cgit v1.2.3


From 11f7b4afa5d8ede8bbf762dc5c7dfb221e42aa1f Mon Sep 17 00:00:00 2001
From: Marcus Lorentzon <marcus.xm.lorentzon@stericsson.com>
Date: Tue, 15 Nov 2011 18:17:08 +0100
Subject: video: mcde: Hide display physical orientation

User space should not have to compensate fbdev rotation
for different physical mounting orientations of panels.
This patch hide the mounting orientation from user space.

ST-Ericsson ID: 368097
ST-Ericsson FOSS-OUT ID: Trivial
ST-Ericsson Linux next: NA

Change-Id: Ia6088066af04477cf9643e3151f72e4350531ccc
Signed-off-by: Marcus Lorentzon <marcus.xm.lorentzon@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/34137
Reviewed-by: QATOOLS
Reviewed-by: QABUILD
Reviewed-by: QATEST
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Reviewed-by: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com>
---
 drivers/video/mcde/mcde_display.c | 26 ++++++++++----------------
 drivers/video/mcde/mcde_dss.c     | 15 ++++++++++++++-
 drivers/video/mcde/mcde_hw.c      |  4 +++-
 include/video/mcde_display.h      |  1 +
 4 files changed, 28 insertions(+), 18 deletions(-)

diff --git a/drivers/video/mcde/mcde_display.c b/drivers/video/mcde/mcde_display.c
index a461b36c9b6..1e71514ab34 100644
--- a/drivers/video/mcde/mcde_display.c
+++ b/drivers/video/mcde/mcde_display.c
@@ -210,25 +210,19 @@ static int mcde_display_set_rotation_default(struct mcde_display_device *ddev,
 	enum mcde_display_rotation rotation)
 {
 	int ret;
+	u8 param = 0;
+	enum mcde_display_rotation final;
 
-	ret = mcde_chnl_set_rotation(ddev->chnl_state, rotation,
-		ddev->rotbuf1, ddev->rotbuf2);
-	if (ret < 0) {
-		dev_warn(&ddev->dev, "%s:Failed to set rotation = %d\n",
-							__func__, rotation);
+	final = (360 + rotation - ddev->orientation) % 360;
+	ret = mcde_chnl_set_rotation(ddev->chnl_state, final,
+						ddev->rotbuf1, ddev->rotbuf2);
+	if (WARN_ON(ret))
 		return ret;
-	}
 
-	if (rotation == MCDE_DISPLAY_ROT_180_CCW) {
-		u8 param = 0x40;
-		(void) mcde_dsi_dcs_write(ddev->chnl_state,
-				DCS_CMD_SET_ADDRESS_MODE, &param, 1);
-	} else if (ddev->rotation == MCDE_DISPLAY_ROT_180_CCW &&
-			rotation != MCDE_DISPLAY_ROT_180_CCW) {
-		u8 param = 0;
-		(void) mcde_dsi_dcs_write(ddev->chnl_state,
-				DCS_CMD_SET_ADDRESS_MODE, &param, 1);
-	}
+	if (final == MCDE_DISPLAY_ROT_180_CW)
+		param = 0x40; /* Horizontal flip */
+	(void)mcde_dsi_dcs_write(ddev->chnl_state, DCS_CMD_SET_ADDRESS_MODE,
+								&param, 1);
 
 	ddev->rotation = rotation;
 	ddev->update_flags |= UPDATE_FLAG_ROTATION;
diff --git a/drivers/video/mcde/mcde_dss.c b/drivers/video/mcde/mcde_dss.c
index 044e39ad285..a2ef0b652d7 100644
--- a/drivers/video/mcde/mcde_dss.c
+++ b/drivers/video/mcde/mcde_dss.c
@@ -121,6 +121,10 @@ int mcde_dss_enable_display(struct mcde_display_device *ddev)
 	if (ret < 0)
 		dev_warn(&ddev->dev, "Failed to set sync\n");
 
+	ret = ddev->set_rotation(ddev, ddev->get_rotation(ddev));
+	if (ret < 0)
+		dev_warn(&ddev->dev, "Failed to set rotation\n");
+
 	ret = mcde_chnl_enable_synchronized_update(ddev->chnl_state,
 		ddev->synchronized_update);
 	if (ret < 0) {
@@ -301,8 +305,17 @@ EXPORT_SYMBOL(mcde_dss_get_overlay_info);
 void mcde_dss_get_native_resolution(struct mcde_display_device *ddev,
 	u16 *x_res, u16 *y_res)
 {
+	u16 x_tmp, y_tmp;
 	mutex_lock(&ddev->display_lock);
-	ddev->get_native_resolution(ddev, x_res, y_res);
+	ddev->get_native_resolution(ddev, &x_tmp, &y_tmp);
+	if (ddev->orientation == MCDE_DISPLAY_ROT_90_CW ||
+				ddev->orientation == MCDE_DISPLAY_ROT_90_CCW) {
+		*x_res = y_tmp;
+		*y_res = x_tmp;
+	} else {
+		*x_res = x_tmp;
+		*y_res = y_tmp;
+	}
 	mutex_unlock(&ddev->display_lock);
 }
 EXPORT_SYMBOL(mcde_dss_get_native_resolution);
diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index 6e846e60f47..dfda6490ae2 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -2944,7 +2944,9 @@ int mcde_chnl_set_rotation(struct mcde_chnl_state *chnl,
 	if (!chnl->reserved)
 		return -EINVAL;
 
-	if (chnl->id != MCDE_CHNL_A && chnl->id != MCDE_CHNL_B)
+	if ((rotation == MCDE_DISPLAY_ROT_90_CW ||
+			rotation == MCDE_DISPLAY_ROT_90_CCW) &&
+			(chnl->id != MCDE_CHNL_A && chnl->id != MCDE_CHNL_B))
 		return -EINVAL;
 
 	chnl->rotation = rotation;
diff --git a/include/video/mcde_display.h b/include/video/mcde_display.h
index 97326cbc28c..b94e7befa8b 100644
--- a/include/video/mcde_display.h
+++ b/include/video/mcde_display.h
@@ -61,6 +61,7 @@ struct mcde_display_device {
 	enum mcde_ovly_pix_fmt default_pixel_format;
 	enum mcde_ovly_pix_fmt pixel_format;
 	enum mcde_display_rotation rotation;
+	enum mcde_display_rotation orientation;
 	bool synchronized_update;
 	struct mcde_video_mode video_mode;
 	int update_flags;
-- 
cgit v1.2.3


From 6c5f7815f1fa691895c836e4e514d462606f5a26 Mon Sep 17 00:00:00 2001
From: Marcus Lorentzon <marcus.xm.lorentzon@stericsson.com>
Date: Mon, 14 Nov 2011 19:25:35 +0100
Subject: ux500: mcde: Hide display physical orientation

User space should not have to compensate fbdev rotation
for different physical mounting orientations of panels.
This patch hide the mounting orientation from user space.

ST-Ericsson ID: 368097
ST-Ericsson FOSS-OUT ID: Trivial
ST-Ericsson Linux next: NA

Change-Id: If8b825506c26c5070e2e7f5fb7eb401f2f6c5600
Signed-off-by: Marcus Lorentzon <marcus.xm.lorentzon@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/37719
Reviewed-by: QABUILD
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Reviewed-by: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com>
---
 arch/arm/mach-ux500/board-mop500-mcde.c | 30 ++++++++++++++----------------
 1 file changed, 14 insertions(+), 16 deletions(-)

diff --git a/arch/arm/mach-ux500/board-mop500-mcde.c b/arch/arm/mach-ux500/board-mop500-mcde.c
index 23da62638f8..7d2f160f6c0 100644
--- a/arch/arm/mach-ux500/board-mop500-mcde.c
+++ b/arch/arm/mach-ux500/board-mop500-mcde.c
@@ -127,6 +127,7 @@ static struct mcde_display_device sony_acx424akp_display0 = {
 	.port = &sony_port0,
 	.chnl_id = MCDE_CHNL_A,
 	.fifo = MCDE_FIFO_A,
+	.orientation = MCDE_DISPLAY_ROT_180_CW,
 	.default_pixel_format = MCDE_OVLYPIXFMT_RGBA8888,
 #ifdef CONFIG_DISPLAY_GENERIC_DSI_PRIMARY_VSYNC
 	.synchronized_update = true,
@@ -149,6 +150,7 @@ static struct mcde_display_device samsung_s6d16d0_display1 = {
 	.id = SECONDARY_DISPLAY_ID,
 	.chnl_id = MCDE_CHNL_C1,
 	.fifo = MCDE_FIFO_C1,
+	.orientation = MCDE_DISPLAY_ROT_90_CCW,
 	.default_pixel_format = MCDE_OVLYPIXFMT_RGB565,
 	.synchronized_update = false,
 	.dev = {
@@ -347,7 +349,6 @@ static int display_postregistered_callback(struct notifier_block *nb,
 	struct mcde_display_device *ddev = dev;
 	u16 width, height;
 	u16 virtual_height;
-	u32 rotate = FB_ROTATE_UR;
 	struct fb_info *fbi;
 #if defined(CONFIG_DISPDEV) || defined(CONFIG_COMPDEV)
 	struct mcde_fb *mfb;
@@ -360,13 +361,6 @@ static int display_postregistered_callback(struct notifier_block *nb,
 		return 0;
 
 	mcde_dss_get_native_resolution(ddev, &width, &height);
-
-	if ((uib_is_u8500uib() || uib_is_stuib()) &&
-					ddev->id == PRIMARY_DISPLAY_ID) {
-		rotate = FB_ROTATE_CW;
-		swap(width, height);
-	}
-
 	virtual_height = height * 2;
 
 #ifndef CONFIG_MCDE_DISPLAY_HDMI_FB_AUTO_CREATE
@@ -376,7 +370,7 @@ static int display_postregistered_callback(struct notifier_block *nb,
 
 	/* Create frame buffer */
 	fbi = mcde_fb_create(ddev, width, height, width, virtual_height,
-					ddev->default_pixel_format, rotate);
+				ddev->default_pixel_format, FB_ROTATE_UR);
 	if (IS_ERR(fbi)) {
 		dev_warn(&ddev->dev,
 			"Failed to create fb for display %s\n", ddev->name);
@@ -445,10 +439,6 @@ static int __init init_display_devices(void)
 		samsung_s6d16d0_pdata1.reset_gpio = MOP500_DISP2_RST_GPIO;
 	}
 
-	/* Not all STUIBs supports VSYNC, disable vsync for STUIB */
-	if (uib_is_stuib())
-		samsung_s6d16d0_display0.synchronized_update = false;
-
 	/* Initialize all needed clocks*/
 	if (!display_initialized_during_boot) {
 		struct clk *clk_dsi_pll;
@@ -490,12 +480,20 @@ static int __init init_display_devices(void)
 		clk_put(clk_dsi_pll);
 	}
 
-	if (uib_is_u8500uib() || uib_is_stuib())
-		/* Samsung display on U8500 and ST UIB */
+	/* Not all STUIBs supports VSYNC, disable vsync for STUIB */
+	if (uib_is_stuib()) {
+		/* Samsung display on STUIB */
+		samsung_s6d16d0_display0.synchronized_update = false;
+		samsung_s6d16d0_display0.orientation = MCDE_DISPLAY_ROT_90_CCW;
 		(void)mcde_display_device_register(&samsung_s6d16d0_display0);
-	else if (uib_is_u8500uibr3())
+	} else if (uib_is_u8500uib()) {
+		/* Samsung display on U8500UIB */
+		samsung_s6d16d0_display0.orientation = MCDE_DISPLAY_ROT_90_CW;
+		(void)mcde_display_device_register(&samsung_s6d16d0_display0);
+	} else if (uib_is_u8500uibr3()) {
 		/* Sony display on U8500UIBV3 */
 		(void)mcde_display_device_register(&sony_acx424akp_display0);
+	}
 	else
 		pr_warning("Unknown UI board\n");
 
-- 
cgit v1.2.3


From b47f59c9f03f771093b1cfb717b06d5173079454 Mon Sep 17 00:00:00 2001
From: Marcus Lorentzon <marcus.xm.lorentzon@stericsson.com>
Date: Mon, 14 Nov 2011 19:28:43 +0100
Subject: ux500: Remove old rotation configs

When hiding display physical orientation in previous
patches, static rotation configs are no longer used.
This patch remove those obsolete config settings.

ST-Ericsson ID: 368097
ST-Ericsson FOSS-OUT ID: Trivial
ST-Ericsson Linux next: NA

Change-Id: I29c941fe2da15f925d2f4dfb7b703010d72e7652
Signed-off-by: Marcus Lorentzon <marcus.xm.lorentzon@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/37721
Reviewed-by: QATOOLS
Reviewed-by: QABUILD
Reviewed-by: QATEST
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Reviewed-by: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com>
---
 arch/arm/mach-ux500/Kconfig-arch | 23 -----------------------
 1 file changed, 23 deletions(-)

diff --git a/arch/arm/mach-ux500/Kconfig-arch b/arch/arm/mach-ux500/Kconfig-arch
index c3e0fa583a1..d05ab5a80d4 100644
--- a/arch/arm/mach-ux500/Kconfig-arch
+++ b/arch/arm/mach-ux500/Kconfig-arch
@@ -45,29 +45,6 @@ config MCDE_DISPLAY_PRIMARY_32BPP
 
 endchoice
 
-choice DISPLAY_GENERIC_DSI_PRIMARY_ROTATION
-	prompt "Enable main display rotation"
-	default DISPLAY_GENERIC_DSI_PRIMARY_ROTATION_90
-	help
-	  Set rotation of main display
-
-config DISPLAY_GENERIC_DSI_PRIMARY_ROTATION_0
-	bool "0 degrees"
-config DISPLAY_GENERIC_DSI_PRIMARY_ROTATION_90
-	bool "90 degrees"
-config DISPLAY_GENERIC_DSI_PRIMARY_ROTATION_180
-	bool "180 degrees"
-config DISPLAY_GENERIC_DSI_PRIMARY_ROTATION_270
-	bool "270 degrees"
-endchoice
-
-config DISPLAY_GENERIC_DSI_PRIMARY_ROTATION_ANGLE
-	int
-	default "0" if DISPLAY_GENERIC_DSI_PRIMARY_ROTATION_0
-	default "90" if DISPLAY_GENERIC_DSI_PRIMARY_ROTATION_90
-	default "180" if DISPLAY_GENERIC_DSI_PRIMARY_ROTATION_180
-	default "270" if DISPLAY_GENERIC_DSI_PRIMARY_ROTATION_270
-
 config DISPLAY_GENERIC_DSI_PRIMARY_VSYNC
 	bool "Enable v-sync for primary display"
 	default n
-- 
cgit v1.2.3


From be54b155563428a1b859f564679e9257e3d67d9d Mon Sep 17 00:00:00 2001
From: Jörgen Nilsson <jorgen.nilsson@stericsson.com>
Date: Fri, 13 Jan 2012 16:09:03 +0100
Subject: b2r2: Check return value from debugfs calls
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Check for NULL and errors before using return value when
building the debugfs nodes for B2R2.

ST-Ericsson Linux next: NA
ST-Ericsson ID: 406740
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I11f33d9ca794070c540463a69228136fe1b35bae
Signed-off-by: Jörgen Nilsson <jorgen.nilsson@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/45486
Reviewed-by: QABUILD
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Reviewed-by: Per-Daniel OLSSON <per-daniel.olsson@stericsson.com>
---
 drivers/video/b2r2/b2r2_blt_main.c  |  4 +--
 drivers/video/b2r2/b2r2_core.c      | 71 ++++++++++++++++++++++---------------
 drivers/video/b2r2/b2r2_debug.c     | 22 ++++++------
 drivers/video/b2r2/b2r2_mem_alloc.c |  7 ++--
 4 files changed, 60 insertions(+), 44 deletions(-)

diff --git a/drivers/video/b2r2/b2r2_blt_main.c b/drivers/video/b2r2/b2r2_blt_main.c
index f79bfaee9ab..919de1ef0ee 100644
--- a/drivers/video/b2r2/b2r2_blt_main.c
+++ b/drivers/video/b2r2/b2r2_blt_main.c
@@ -3305,7 +3305,7 @@ int b2r2_blt_module_init(struct b2r2_control *cont)
 
 #ifdef CONFIG_DEBUG_FS
 	/* Register debug fs */
-	if (cont->debugfs_root_dir) {
+	if (!IS_ERR_OR_NULL(cont->debugfs_root_dir)) {
 		debugfs_create_file("last_request", 0666,
 			cont->debugfs_root_dir,
 			cont, &debugfs_b2r2_blt_request_fops);
@@ -3341,7 +3341,7 @@ void b2r2_blt_module_exit(struct b2r2_control *cont)
 	if (cont) {
 		b2r2_log_info(cont->dev, "%s\n", __func__);
 #ifdef CONFIG_DEBUG_FS
-		if (cont->debugfs_root_dir) {
+		if (!IS_ERR_OR_NULL(cont->debugfs_root_dir)) {
 			debugfs_remove_recursive(cont->debugfs_root_dir);
 			cont->debugfs_root_dir = NULL;
 		}
diff --git a/drivers/video/b2r2/b2r2_core.c b/drivers/video/b2r2/b2r2_core.c
index 629633a7888..ed5f52598da 100644
--- a/drivers/video/b2r2/b2r2_core.c
+++ b/drivers/video/b2r2/b2r2_core.c
@@ -2386,10 +2386,13 @@ static int init_hw(struct b2r2_core *core)
 
 #ifdef CONFIG_DEBUG_FS
 	/* Register debug fs files for register access */
-	if (core->debugfs_core_root_dir && !core->debugfs_regs_dir) {
-		int i;
+	if (!IS_ERR_OR_NULL(core->debugfs_core_root_dir) &&
+			IS_ERR_OR_NULL(core->debugfs_regs_dir)) {
 		core->debugfs_regs_dir = debugfs_create_dir("regs",
 				core->debugfs_core_root_dir);
+	}
+	if (!IS_ERR_OR_NULL(core->debugfs_regs_dir)) {
+		int i;
 		debugfs_create_file("all", 0666, core->debugfs_regs_dir,
 				(void *)core->hw, &debugfs_b2r2_regs_fops);
 		/* Create debugfs entries for all static registers */
@@ -2397,7 +2400,7 @@ static int init_hw(struct b2r2_core *core)
 			debugfs_create_file(debugfs_regs[i].name, 0666,
 					core->debugfs_regs_dir,
 					(void *)(((u8 *) core->hw) +
-							debugfs_regs[i].offset),
+						debugfs_regs[i].offset),
 					&debugfs_b2r2_reg_fops);
 	}
 #endif
@@ -2432,7 +2435,7 @@ static void exit_hw(struct b2r2_core *core)
 
 #ifdef CONFIG_DEBUG_FS
 	/* Unregister our debugfs entries */
-	if (core->debugfs_regs_dir) {
+	if (!IS_ERR_OR_NULL(core->debugfs_regs_dir)) {
 		debugfs_remove_recursive(core->debugfs_regs_dir);
 		core->debugfs_regs_dir = NULL;
 	}
@@ -2579,29 +2582,33 @@ static int b2r2_probe(struct platform_device *pdev)
 
 #ifdef CONFIG_DEBUG_FS
 	core->debugfs_root_dir = debugfs_create_dir(core->name, NULL);
-	core->debugfs_core_root_dir = debugfs_create_dir("core",
-			core->debugfs_root_dir);
-	debugfs_create_file("stats", 0666, core->debugfs_core_root_dir,
-			core, &debugfs_b2r2_stat_fops);
-	debugfs_create_file("clock", 0666, core->debugfs_core_root_dir,
-			core, &debugfs_b2r2_clock_fops);
-	debugfs_create_u8("op_size", 0666, core->debugfs_core_root_dir,
-			&core->op_size);
-	debugfs_create_u8("ch_size", 0666, core->debugfs_core_root_dir,
-			&core->ch_size);
-	debugfs_create_u8("pg_size", 0666, core->debugfs_core_root_dir,
-			&core->pg_size);
-	debugfs_create_u8("mg_size", 0666, core->debugfs_core_root_dir,
-			&core->mg_size);
-	debugfs_create_u16("min_req_time", 0666, core->debugfs_core_root_dir,
-			&core->min_req_time);
-
-	control->debugfs_debug_root_dir = debugfs_create_dir("debug",
-			core->debugfs_root_dir);
-	control->mem_heap.debugfs_root_dir = debugfs_create_dir("mem",
-			core->debugfs_root_dir);
-	control->debugfs_root_dir = debugfs_create_dir("blt",
-			core->debugfs_root_dir);
+	if (!IS_ERR_OR_NULL(core->debugfs_root_dir)) {
+		core->debugfs_core_root_dir = debugfs_create_dir("core",
+				core->debugfs_root_dir);
+		control->debugfs_debug_root_dir = debugfs_create_dir("debug",
+				core->debugfs_root_dir);
+		control->mem_heap.debugfs_root_dir = debugfs_create_dir("mem",
+				core->debugfs_root_dir);
+		control->debugfs_root_dir = debugfs_create_dir("blt",
+				core->debugfs_root_dir);
+	}
+
+	if (!IS_ERR_OR_NULL(core->debugfs_core_root_dir)) {
+		debugfs_create_file("stats", 0666, core->debugfs_core_root_dir,
+				core, &debugfs_b2r2_stat_fops);
+		debugfs_create_file("clock", 0666, core->debugfs_core_root_dir,
+				core, &debugfs_b2r2_clock_fops);
+		debugfs_create_u8("op_size", 0666, core->debugfs_core_root_dir,
+				&core->op_size);
+		debugfs_create_u8("ch_size", 0666, core->debugfs_core_root_dir,
+				&core->ch_size);
+		debugfs_create_u8("pg_size", 0666, core->debugfs_core_root_dir,
+				&core->pg_size);
+		debugfs_create_u8("mg_size", 0666, core->debugfs_core_root_dir,
+				&core->mg_size);
+		debugfs_create_u16("min_req_time", 0666,
+			core->debugfs_core_root_dir, &core->min_req_time);
+	}
 #endif
 
 	ret = b2r2_debug_init(control);
@@ -2641,7 +2648,10 @@ b2r2_probe_no_work_queue:
 	b2r2_debug_exit();
 b2r2_probe_debug_init_failed:
 #ifdef CONFIG_DEBUG_FS
-	debugfs_remove_recursive(core->debugfs_root_dir);
+	if (!IS_ERR_OR_NULL(core->debugfs_root_dir)) {
+		debugfs_remove_recursive(core->debugfs_root_dir);
+		core->debugfs_root_dir = NULL;
+	}
 #endif
 	kfree(core);
 b2r2_probe_core_alloc_fail:
@@ -2669,7 +2679,10 @@ static int b2r2_remove(struct platform_device *pdev)
 	b2r2_log_info(&pdev->dev, "%s: Started\n", __func__);
 
 #ifdef CONFIG_DEBUG_FS
-	debugfs_remove_recursive(core->debugfs_root_dir);
+	if (!IS_ERR_OR_NULL(core->debugfs_root_dir)) {
+		debugfs_remove_recursive(core->debugfs_root_dir);
+		core->debugfs_root_dir = NULL;
+	}
 #endif
 
 	/* Flush B2R2 work queue (call all callbacks) */
diff --git a/drivers/video/b2r2/b2r2_debug.c b/drivers/video/b2r2/b2r2_debug.c
index 23a0b1aa9ac..934ba938ee5 100644
--- a/drivers/video/b2r2/b2r2_debug.c
+++ b/drivers/video/b2r2/b2r2_debug.c
@@ -297,14 +297,16 @@ int b2r2_debug_init(struct b2r2_control *cont)
 
 		/* No need to save the files,
 		 * they will be removed recursively */
-		(void)debugfs_create_bool("warnings", 0644, log_lvl_dir,
-			&b2r2_log_levels[B2R2_LOG_LEVEL_WARN]);
-		(void)debugfs_create_bool("info", 0644, log_lvl_dir,
-			&b2r2_log_levels[B2R2_LOG_LEVEL_INFO]);
-		(void)debugfs_create_bool("debug", 0644, log_lvl_dir,
-			&b2r2_log_levels[B2R2_LOG_LEVEL_DEBUG]);
-		(void)debugfs_create_bool("regdumps", 0644, log_lvl_dir,
-			&b2r2_log_levels[B2R2_LOG_LEVEL_REGDUMP]);
+		if (!IS_ERR_OR_NULL(log_lvl_dir)) {
+			(void)debugfs_create_bool("warnings", 0644, log_lvl_dir,
+				&b2r2_log_levels[B2R2_LOG_LEVEL_WARN]);
+			(void)debugfs_create_bool("info", 0644, log_lvl_dir,
+				&b2r2_log_levels[B2R2_LOG_LEVEL_INFO]);
+			(void)debugfs_create_bool("debug", 0644, log_lvl_dir,
+				&b2r2_log_levels[B2R2_LOG_LEVEL_DEBUG]);
+			(void)debugfs_create_bool("regdumps", 0644, log_lvl_dir,
+				&b2r2_log_levels[B2R2_LOG_LEVEL_REGDUMP]);
+		}
 
 #elif defined(CONFIG_DYNAMIC_DEBUG)
 		/* log_lvl_dir is never used */
@@ -313,7 +315,7 @@ int b2r2_debug_init(struct b2r2_control *cont)
 		module_init++;
 	}
 
-	if (cont->debugfs_debug_root_dir) {
+	if (!IS_ERR_OR_NULL(cont->debugfs_debug_root_dir)) {
 		/* No need to save the file,
 		 * it will be removed recursively */
 		(void)debugfs_create_file("last_job", 0444,
@@ -330,7 +332,7 @@ void b2r2_debug_exit(void)
 {
 #if !defined(CONFIG_DYNAMIC_DEBUG) && defined(CONFIG_DEBUG_FS)
 	module_init--;
-	if (!module_init && log_lvl_dir) {
+	if (!module_init && !IS_ERR_OR_NULL(log_lvl_dir)) {
 		debugfs_remove_recursive(log_lvl_dir);
 		log_lvl_dir = NULL;
 	}
diff --git a/drivers/video/b2r2/b2r2_mem_alloc.c b/drivers/video/b2r2/b2r2_mem_alloc.c
index e5235d2c97f..584b324b8fe 100644
--- a/drivers/video/b2r2/b2r2_mem_alloc.c
+++ b/drivers/video/b2r2/b2r2_mem_alloc.c
@@ -182,10 +182,11 @@ void debugfs_create_mem_block_entry(struct b2r2_mem_block *mem_block,
 	struct timespec mtime = tm;
 	struct timespec ctime = tm;
 
-	if (mem_block->debugfs_block) {
+	if (!IS_ERR_OR_NULL(mem_block->debugfs_block)) {
 		atime = mem_block->debugfs_block->d_inode->i_atime;
 		ctime = mem_block->debugfs_block->d_inode->i_ctime;
 		debugfs_remove(mem_block->debugfs_block);
+		mem_block->debugfs_block = NULL;
 	}
 
 	/* Add the block in debugfs */
@@ -204,7 +205,7 @@ void debugfs_create_mem_block_entry(struct b2r2_mem_block *mem_block,
 		mem_block->debugfs_fname,
 		0444, parent, mem_block,
 		&debugfs_b2r2_mem_block_fops);
-	if (mem_block->debugfs_block) {
+	if (!IS_ERR_OR_NULL(mem_block->debugfs_block)) {
 		mem_block->debugfs_block->d_inode->i_size = mem_block->size;
 		mem_block->debugfs_block->d_inode->i_atime = atime;
 		mem_block->debugfs_block->d_inode->i_mtime = mtime;
@@ -243,7 +244,7 @@ int b2r2_mem_init(struct b2r2_control *cont,
 
 #ifdef CONFIG_DEBUG_FS
 	/* Register debugfs */
-	if (cont->mem_heap.debugfs_root_dir) {
+	if (!IS_ERR_OR_NULL(cont->mem_heap.debugfs_root_dir)) {
 		cont->mem_heap.debugfs_heap_stats = debugfs_create_file(
 			"stats", 0444, cont->mem_heap.debugfs_root_dir,
 			&cont->mem_heap, &debugfs_b2r2_mem_stats_fops);
-- 
cgit v1.2.3


From f3498255ca5335d0de97ba2333e4cbd0883ed25f Mon Sep 17 00:00:00 2001
From: Jimmy Rubin <jimmy.rubin@stericsson.com>
Date: Fri, 13 Jan 2012 12:42:35 +0100
Subject: video: mcde: Correct ULPM sequence

This patch corrects an issue when the exit ULPM
failed because the byteclk was not changed from
hs clock to system clock before entering ULPM.

ST-Ericsson ID: 403880
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: Ib0d4ce8716e0248c5a9dda1ab9ad2b15e89e7eb6
Signed-off-by: Jimmy Rubin <jimmy.rubin@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/42965
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
Reviewed-by: QATOOLS
---
 drivers/video/mcde/mcde_hw.c | 113 ++++++++++++++++++++++++++++++++++---------
 1 file changed, 89 insertions(+), 24 deletions(-)

diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index dfda6490ae2..b1fbb88dd26 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -99,7 +99,6 @@ static void wait_for_flow_disabled(struct mcde_chnl_state *chnl);
 #define DSI_READ_DELAY 5
 #define DSI_READ_NBR_OF_RETRIES 2
 #define MCDE_FLOWEN_MAX_TRIAL 60
-#define DSI_RESET_SW 0x7
 
 #define MCDE_VERSION_4_1_3 0x04010300
 #define MCDE_VERSION_4_0_4 0x04000400
@@ -484,6 +483,82 @@ static void update_mcde_registers(void)
 		MCDE_VSCRC1_VSPMAX(0xff));
 }
 
+static void dsi_link_handle_reset(u8 link, bool release)
+{
+	u32 value;
+
+	value = prcmu_read(DB8500_PRCM_DSI_SW_RESET);
+	if (release) {
+		switch (link) {
+		case 0:
+			value |= DB8500_PRCM_DSI_SW_RESET_DSI0_SW_RESETN;
+			break;
+		case 1:
+			value |= DB8500_PRCM_DSI_SW_RESET_DSI1_SW_RESETN;
+			break;
+		case 2:
+			value |= DB8500_PRCM_DSI_SW_RESET_DSI2_SW_RESETN;
+			break;
+		default:
+			break;
+		}
+	} else {
+		switch (link) {
+		case 0:
+			value &= ~DB8500_PRCM_DSI_SW_RESET_DSI0_SW_RESETN;
+			break;
+		case 1:
+			value &= ~DB8500_PRCM_DSI_SW_RESET_DSI1_SW_RESETN;
+			break;
+		case 2:
+			value &= ~DB8500_PRCM_DSI_SW_RESET_DSI2_SW_RESETN;
+			break;
+		default:
+			break;
+		}
+	}
+	prcmu_write(DB8500_PRCM_DSI_SW_RESET, value);
+}
+
+static void dsi_link_switch_byte_clk(u8 link, bool to_system_clock)
+{
+	u32 value;
+
+	value = prcmu_read(DB8500_PRCM_DSI_GLITCHFREE_EN);
+	if (to_system_clock) {
+		switch (link) {
+		case 0:
+			value |= DB8500_PRCM_DSI_GLITCHFREE_EN_DSI0_BYTE_CLK;
+			break;
+		case 1:
+			value |= DB8500_PRCM_DSI_GLITCHFREE_EN_DSI1_BYTE_CLK;
+			break;
+		case 2:
+			value |= DB8500_PRCM_DSI_GLITCHFREE_EN_DSI2_BYTE_CLK;
+			break;
+		default:
+			break;
+		}
+	} else {
+		switch (link) {
+		case 0:
+			value &= ~DB8500_PRCM_DSI_GLITCHFREE_EN_DSI0_BYTE_CLK;
+			break;
+		case 1:
+			value &= ~DB8500_PRCM_DSI_GLITCHFREE_EN_DSI1_BYTE_CLK;
+			break;
+		case 2:
+			value &= ~DB8500_PRCM_DSI_GLITCHFREE_EN_DSI2_BYTE_CLK;
+			break;
+		default:
+			break;
+		}
+
+	}
+	prcmu_write(DB8500_PRCM_DSI_GLITCHFREE_EN, value);
+	dsi_wfld(link, DSI_MCTL_PLL_CTL, PLL_OUT_SEL, to_system_clock);
+}
+
 static void dsi_link_handle_ulpm(struct mcde_port *port, bool enter_ulpm)
 {
 	u8 link = port->link;
@@ -502,14 +577,20 @@ static void dsi_link_handle_ulpm(struct mcde_port *port, bool enter_ulpm)
 			DSI_MCTL_ULPOUT_TIME_CKLANE_ULPOUT_TIME(0x1FF) |
 			DSI_MCTL_ULPOUT_TIME_DATA_ULPOUT_TIME(0x1FF));
 
+	if (enter_ulpm) {
+		lane_state = DSI_LANE_STATE_ULPM;
+		dsi_link_switch_byte_clk(link, true);
+	}
+
 	dsi_wfld(link, DSI_MCTL_MAIN_EN, DAT1_ULPM_REQ, enter_ulpm);
 	dsi_wfld(link, DSI_MCTL_MAIN_EN, DAT2_ULPM_REQ,
 					enter_ulpm && num_data_lanes == 2);
+	dsi_wfld(link, DSI_MCTL_MAIN_EN, CLKLANE_ULPM_REQ, enter_ulpm);
 
-	if (enter_ulpm)
-		lane_state = DSI_LANE_STATE_ULPM;
-	else
+	if (!enter_ulpm) {
 		lane_state = DSI_LANE_STATE_IDLE;
+		dsi_link_switch_byte_clk(link, false);
+	}
 
 	/* Wait for data lanes to enter ULPM */
 	while (dsi_rfld(link, DSI_MCTL_LANE_STS, DATLANE1_STATE)
@@ -519,22 +600,20 @@ static void dsi_link_handle_ulpm(struct mcde_port *port, bool enter_ulpm)
 							num_data_lanes > 1)) {
 		mdelay(DSI_WAIT_FOR_ULPM_STATE_MS);
 		if (nbr_of_retries++ == DSI_ULPM_STATE_NBR_OF_RETRIES) {
-			dev_warn(&mcde_dev->dev,
+			dev_dbg(&mcde_dev->dev,
 				"Could not enter correct state=%d (link=%d)!\n",
 							lane_state, link);
 			break;
 		}
 	}
 
-	dsi_wfld(link, DSI_MCTL_MAIN_EN, CLKLANE_ULPM_REQ, enter_ulpm);
 	nbr_of_retries = 0;
-
 	/* Wait for clock lane to enter ULPM */
 	while (dsi_rfld(link, DSI_MCTL_LANE_STS, CLKLANE_STATE)
 						!= lane_state) {
 		mdelay(DSI_WAIT_FOR_ULPM_STATE_MS);
 		if (nbr_of_retries++ == DSI_ULPM_STATE_NBR_OF_RETRIES) {
-			dev_warn(&mcde_dev->dev,
+			dev_dbg(&mcde_dev->dev,
 				"Could not enter correct state=%d (link=%d)!\n",
 							lane_state, link);
 			break;
@@ -548,9 +627,9 @@ static int dsi_link_enable(struct mcde_chnl_state *chnl)
 	u8 link = chnl->port.link;
 
 	if (dsi_use_clk_framework) {
-		prcmu_write(DB8500_PRCM_DSI_SW_RESET, DSI_RESET_SW);
 		WARN_ON_ONCE(clk_enable(chnl->clk_dsi_lp));
 		WARN_ON_ONCE(clk_enable(chnl->clk_dsi_hs));
+		dsi_link_handle_reset(link, true);
 	} else {
 		WARN_ON_ONCE(clk_enable(clock_dsi));
 		WARN_ON_ONCE(clk_enable(clock_dsi_lp));
@@ -573,19 +652,6 @@ static int dsi_link_enable(struct mcde_chnl_state *chnl)
 
 	dsi_wfld(link, DSI_MCTL_MAIN_DATA_CTL, LINK_EN, true);
 
-	if (dsi_rfld(link, DSI_MCTL_LANE_STS, CLKLANE_STATE) ==
-						DSI_LANE_STATE_ULPM ||
-		dsi_rfld(link, DSI_MCTL_LANE_STS, DATLANE1_STATE)
-						== DSI_LANE_STATE_ULPM ||
-		dsi_rfld(link, DSI_MCTL_LANE_STS, DATLANE2_STATE)
-						== DSI_LANE_STATE_ULPM) {
-		/* Switch hs clock to sys_clk */
-		dsi_wfld(link, DSI_MCTL_PLL_CTL, PLL_OUT_SEL, 0x1);
-		dsi_link_handle_ulpm(&chnl->port, false);
-		/* Switch hs clock to tx_byte_hs_clk */
-		dsi_wfld(link, DSI_MCTL_PLL_CTL, PLL_OUT_SEL, 0x0);
-	}
-
 	dev_dbg(&mcde_dev->dev, "DSI%d LINK_EN\n", link);
 
 	return 0;
@@ -616,8 +682,6 @@ static void dsi_link_disable(struct mcde_chnl_state *chnl, bool suspend)
 		clk_disable(clock_dsi);
 		clk_disable(clock_dsi_lp);
 	}
-
-	dsi_wfld(chnl->port.link, DSI_MCTL_MAIN_DATA_CTL, LINK_EN, false);
 }
 
 static void disable_mcde_hw(bool force_disable, bool suspend)
@@ -1280,6 +1344,7 @@ static int update_channel_static_registers(struct mcde_chnl_state *chnl)
 			}
 		}
 
+		dsi_link_handle_ulpm(&chnl->port, false);
 		mcde_wreg(MCDE_DSIVID0CONF0 +
 			idx * MCDE_DSIVID0CONF0_GROUPOFFSET,
 			MCDE_DSIVID0CONF0_BLANKING(0) |
-- 
cgit v1.2.3


From 55dc6638a530902e014c8ac107e7710264d06706 Mon Sep 17 00:00:00 2001
From: Jimmy Rubin <jimmy.rubin@stericsson.com>
Date: Tue, 17 Jan 2012 14:26:54 +0100
Subject: video: mcde: Always enter ULPM in dsilink_disable

When a channel is disabled the dsilink should enter ulpm

ST-Ericsson ID: 403880
ST-Ericsson FOSS-OUT ID: Trivial
ST-Ericsson Linux next: NA

Change-Id: I543b676f16325d20f355cdb50ee9b64b714a2151
Signed-off-by: Jimmy Rubin <jimmy.rubin@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/45695
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
Reviewed-by: QATOOLS
---
 drivers/video/mcde/mcde_hw.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index b1fbb88dd26..d6c9dd3304e 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -665,9 +665,7 @@ enable_dsipll_err:
 static void dsi_link_disable(struct mcde_chnl_state *chnl, bool suspend)
 {
 	wait_while_dsi_running(chnl->port.link);
-	/* only enter ULPM when device is suspended */
-	if (suspend)
-		dsi_link_handle_ulpm(&chnl->port, true);
+	dsi_link_handle_ulpm(&chnl->port, true);
 	if (dsi_use_clk_framework) {
 		clk_disable(chnl->clk_dsi_lp);
 		clk_disable(chnl->clk_dsi_hs);
-- 
cgit v1.2.3


From 3ab7d44dfec825176fe7b58a91f5a8a5b0641729 Mon Sep 17 00:00:00 2001
From: Jimmy Rubin <jimmy.rubin@stericsson.com>
Date: Fri, 13 Jan 2012 12:45:00 +0100
Subject: video: mcde: Add delay after ENTER_SLEEP

For the sony display, when an ENTER_SLEEP is issued there should be
a msleep for at least 4 frames (assuming 60 Hz).

ST-Ericsson ID: 411444
ST-Ericsson FOSS-OUT ID: Trivial
ST-Ericsson Linux next: NA

Change-Id: I4d77e99034ac7eb31ef388b11cafbb3938df5f57
Signed-off-by: Jimmy Rubin <jimmy.rubin@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/45449
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
Reviewed-by: QATOOLS
---
 drivers/video/mcde/display-sony_acx424akp_dsi.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/video/mcde/display-sony_acx424akp_dsi.c b/drivers/video/mcde/display-sony_acx424akp_dsi.c
index 44302de8f1b..e5d8c19bff0 100644
--- a/drivers/video/mcde/display-sony_acx424akp_dsi.c
+++ b/drivers/video/mcde/display-sony_acx424akp_dsi.c
@@ -25,6 +25,7 @@
 #define RESET_DELAY_MS		11
 #define RESET_LOW_DELAY_US	20
 #define SLEEP_OUT_DELAY_MS	140
+#define SLEEP_IN_DELAY_MS	85	/* Assume 60 Hz 5 frames */
 #define IO_REGU			"vddi"
 #define IO_REGU_MIN		1600000
 #define IO_REGU_MAX		3300000
@@ -139,8 +140,12 @@ static int display_off(struct mcde_display_device *ddev)
 	if (ret)
 		return ret;
 
-	return mcde_dsi_dcs_write(ddev->chnl_state, DCS_CMD_ENTER_SLEEP_MODE,
+	ret = mcde_dsi_dcs_write(ddev->chnl_state, DCS_CMD_ENTER_SLEEP_MODE,
 								NULL, 0);
+	/* Wait for 4 frames or more */
+	msleep(SLEEP_IN_DELAY_MS);
+
+	return ret;
 }
 
 static int sony_acx424akp_set_scan_mode(struct mcde_display_device *ddev,
-- 
cgit v1.2.3


From a4ad291c8913d7ead160bc8f45cc07feae5676a2 Mon Sep 17 00:00:00 2001
From: Jörgen Nilsson <jorgen.nilsson@stericsson.com>
Date: Mon, 23 Jan 2012 14:39:01 +0100
Subject: b2r2: Possible to set YUV range

The YUV range can be either full or narrow (601 standard).
A flag has been added to be able to choose which YUV range
to use for the B2R2 request. The conversion matrices (iVMx)
has also been updated to default to narrow range. Narrow range
is the preferred range since it is used for video encoding.
The full range case is targeted for JPEG encoding.

Conversion matrix assignment has been broken out to a
separate file. As a consequence of this some functionality
in the node splitter has been moved to utilis.

ST-Ericsson ID: 407107
ST-Ericsson FOSS-OUT ID: Trivial
ST-Ericsson Linux next: NA

Change-Id: Id4edb38170b0c398927ad4eddbdecc62e4734cdf
Signed-off-by: Jorgen Nilsson <jorgen.nilsson@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/46251
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Reviewed-by: Jonas ABERG <jonas.aberg@stericsson.com>
---
 drivers/video/b2r2/Makefile          |   2 +-
 drivers/video/b2r2/b2r2_generic.c    | 358 +++++----------
 drivers/video/b2r2/b2r2_hw.h         | 249 -----------
 drivers/video/b2r2/b2r2_hw_convert.c | 747 +++++++++++++++++++++++++++++++
 drivers/video/b2r2/b2r2_hw_convert.h |  53 +++
 drivers/video/b2r2/b2r2_internal.h   |   3 +
 drivers/video/b2r2/b2r2_node_split.c | 843 ++++-------------------------------
 drivers/video/b2r2/b2r2_utils.c      | 466 +++++++++++++++++++
 drivers/video/b2r2/b2r2_utils.h      |  18 +
 include/video/b2r2_blt.h             |   1 +
 10 files changed, 1491 insertions(+), 1249 deletions(-)
 create mode 100644 drivers/video/b2r2/b2r2_hw_convert.c
 create mode 100644 drivers/video/b2r2/b2r2_hw_convert.h

diff --git a/drivers/video/b2r2/Makefile b/drivers/video/b2r2/Makefile
index 0150ad6f761..9900ebf8216 100644
--- a/drivers/video/b2r2/Makefile
+++ b/drivers/video/b2r2/Makefile
@@ -2,7 +2,7 @@
 
 obj-$(CONFIG_FB_B2R2) += b2r2.o
 
-b2r2-objs = b2r2_blt_main.o b2r2_core.o b2r2_mem_alloc.o b2r2_generic.o b2r2_node_gen.o b2r2_node_split.o b2r2_profiler_socket.o b2r2_timing.o b2r2_filters.o b2r2_utils.o b2r2_input_validation.o
+b2r2-objs = b2r2_blt_main.o b2r2_core.o b2r2_mem_alloc.o b2r2_generic.o b2r2_node_gen.o b2r2_node_split.o b2r2_profiler_socket.o b2r2_timing.o b2r2_filters.o b2r2_utils.o b2r2_input_validation.o b2r2_hw_convert.o
 
 ifdef CONFIG_B2R2_DEBUG
 b2r2-objs += b2r2_debug.o
diff --git a/drivers/video/b2r2/b2r2_generic.c b/drivers/video/b2r2/b2r2_generic.c
index 1a27adbaadf..4191e497e13 100644
--- a/drivers/video/b2r2/b2r2_generic.c
+++ b/drivers/video/b2r2/b2r2_generic.c
@@ -18,6 +18,7 @@
 #include "b2r2_global.h"
 #include "b2r2_debug.h"
 #include "b2r2_filters.h"
+#include "b2r2_hw_convert.h"
 
 /*
  * Debug printing
@@ -499,6 +500,8 @@ static void setup_fill_input_stage(const struct b2r2_blt_request *req,
 	u32 src_color = req->user_req.src_color;
 	const struct b2r2_blt_img *dst_img = &(req->user_req.dst_img);
 	struct b2r2_control *cont = req->instance->control;
+	bool fullrange = (req->user_req.flags &
+		B2R2_BLT_FLAG_FULL_RANGE_YUV) != 0;
 
 	b2r2_log_info(cont->dev, "%s ENTRY\n", __func__);
 
@@ -525,17 +528,7 @@ static void setup_fill_input_stage(const struct b2r2_blt_request *req,
 				 * where it is stored in ABGR format.
 				 * Set up IVMX.
 				 */
-				node->node.GROUP0.B2R2_INS |=
-						B2R2_INS_IVMX_ENABLED;
-				node->node.GROUP0.B2R2_CIC |= B2R2_CIC_IVMX;
-				node->node.GROUP15.B2R2_VMX0 =
-						B2R2_VMX0_RGB_TO_BGR;
-				node->node.GROUP15.B2R2_VMX1 =
-						B2R2_VMX1_RGB_TO_BGR;
-				node->node.GROUP15.B2R2_VMX2 =
-						B2R2_VMX2_RGB_TO_BGR;
-				node->node.GROUP15.B2R2_VMX3 =
-						B2R2_VMX3_RGB_TO_BGR;
+				b2r2_setup_ivmx(node, B2R2_CC_RGB_TO_BGR);
 			}
 		}
 		break;
@@ -568,16 +561,10 @@ static void setup_fill_input_stage(const struct b2r2_blt_request *req,
 			 * Format of the supplied src_color is
 			 * B2R2_BLT_FMT_32_BIT_AYUV8888.
 			 */
-			node->node.GROUP0.B2R2_INS |= B2R2_INS_IVMX_ENABLED;
-			node->node.GROUP0.B2R2_CIC |= B2R2_CIC_IVMX;
-			node->node.GROUP15.B2R2_VMX0 =
-					B2R2_VMX0_BLT_YUV888_TO_RGB_601_VIDEO;
-			node->node.GROUP15.B2R2_VMX1 =
-					B2R2_VMX1_BLT_YUV888_TO_RGB_601_VIDEO;
-			node->node.GROUP15.B2R2_VMX2 =
-					B2R2_VMX2_BLT_YUV888_TO_RGB_601_VIDEO;
-			node->node.GROUP15.B2R2_VMX3 =
-					B2R2_VMX3_BLT_YUV888_TO_RGB_601_VIDEO;
+			if (fullrange)
+				b2r2_setup_ivmx(node, B2R2_CC_BLT_YUV888_FULL_TO_RGB);
+			else
+				b2r2_setup_ivmx(node, B2R2_CC_BLT_YUV888_TO_RGB);
 		} else {
 			/* SOURCE_FILL_RAW */
 			bool dst_yuv_planar =
@@ -623,17 +610,12 @@ static void setup_fill_input_stage(const struct b2r2_blt_request *req,
 			case B2R2_BLT_FMT_32_BIT_AYUV8888:
 			case B2R2_BLT_FMT_24_BIT_VUY888:
 			case B2R2_BLT_FMT_32_BIT_VUYA8888:
-				node->node.GROUP0.B2R2_INS |=
-					B2R2_INS_IVMX_ENABLED;
-				node->node.GROUP0.B2R2_CIC |= B2R2_CIC_IVMX;
-				node->node.GROUP15.B2R2_VMX0 =
-					B2R2_VMX0_BLT_YUV888_TO_RGB_601_VIDEO;
-				node->node.GROUP15.B2R2_VMX1 =
-					B2R2_VMX1_BLT_YUV888_TO_RGB_601_VIDEO;
-				node->node.GROUP15.B2R2_VMX2 =
-					B2R2_VMX2_BLT_YUV888_TO_RGB_601_VIDEO;
-				node->node.GROUP15.B2R2_VMX3 =
-					B2R2_VMX3_BLT_YUV888_TO_RGB_601_VIDEO;
+				if (fullrange)
+					b2r2_setup_ivmx(node,
+						B2R2_CC_BLT_YUV888_FULL_TO_RGB);
+				else
+					b2r2_setup_ivmx(node,
+						B2R2_CC_BLT_YUV888_TO_RGB);
 				/*
 				 * Re-arrange the color components from
 				 * VUY(A) to (A)YUV
@@ -663,14 +645,11 @@ static void setup_fill_input_stage(const struct b2r2_blt_request *req,
 				 * Chroma components are swapped so
 				 * it is YVU and not YUV.
 				 */
-				node->node.GROUP15.B2R2_VMX0 =
-					B2R2_VMX0_YVU_TO_RGB_601_VIDEO;
-				node->node.GROUP15.B2R2_VMX1 =
-					B2R2_VMX1_YVU_TO_RGB_601_VIDEO;
-				node->node.GROUP15.B2R2_VMX2 =
-					B2R2_VMX2_YVU_TO_RGB_601_VIDEO;
-				node->node.GROUP15.B2R2_VMX3 =
-					B2R2_VMX3_YVU_TO_RGB_601_VIDEO;
+				if (fullrange)
+					b2r2_setup_ivmx(node,
+						B2R2_CC_YVU_FULL_TO_RGB);
+				else
+					b2r2_setup_ivmx(node, B2R2_CC_YVU_TO_RGB);
 				break;
 			default:
 				/*
@@ -680,17 +659,11 @@ static void setup_fill_input_stage(const struct b2r2_blt_request *req,
 				 * an intermediate buffer which is RGB.
 				 * Hence the conversion from YUV to RGB.
 				 */
-				node->node.GROUP0.B2R2_INS |=
-					B2R2_INS_IVMX_ENABLED;
-				node->node.GROUP0.B2R2_CIC |= B2R2_CIC_IVMX;
-				node->node.GROUP15.B2R2_VMX0 =
-					B2R2_VMX0_YUV_TO_RGB_601_VIDEO;
-				node->node.GROUP15.B2R2_VMX1 =
-					B2R2_VMX1_YUV_TO_RGB_601_VIDEO;
-				node->node.GROUP15.B2R2_VMX2 =
-					B2R2_VMX2_YUV_TO_RGB_601_VIDEO;
-				node->node.GROUP15.B2R2_VMX3 =
-					B2R2_VMX3_YUV_TO_RGB_601_VIDEO;
+				if (fullrange)
+					b2r2_setup_ivmx(node,
+						B2R2_CC_YUV_FULL_TO_RGB);
+				else
+					b2r2_setup_ivmx(node, B2R2_CC_YUV_TO_RGB);
 				break;
 			}
 		}
@@ -766,6 +739,8 @@ static void setup_input_stage(const struct b2r2_blt_request *req,
 	bool use_v_filter = false;
 
 	struct b2r2_control *cont = req->instance->control;
+	bool fullrange = (req->user_req.flags &
+		B2R2_BLT_FLAG_FULL_RANGE_YUV) != 0;
 
 	b2r2_log_info(cont->dev, "%s ENTRY\n", __func__);
 
@@ -837,14 +812,7 @@ static void setup_input_stage(const struct b2r2_blt_request *req,
 	/* Adjustments that depend on the source format */
 	switch (src_img->fmt) {
 	case B2R2_BLT_FMT_32_BIT_ABGR8888:
-		/* Set up IVMX */
-		node->node.GROUP0.B2R2_INS |= B2R2_INS_IVMX_ENABLED;
-		node->node.GROUP0.B2R2_CIC |= B2R2_CIC_IVMX;
-
-		node->node.GROUP15.B2R2_VMX0 = B2R2_VMX0_RGB_TO_BGR;
-		node->node.GROUP15.B2R2_VMX1 = B2R2_VMX1_RGB_TO_BGR;
-		node->node.GROUP15.B2R2_VMX2 = B2R2_VMX2_RGB_TO_BGR;
-		node->node.GROUP15.B2R2_VMX3 = B2R2_VMX3_RGB_TO_BGR;
+		b2r2_setup_ivmx(node, B2R2_CC_RGB_TO_BGR);
 		break;
 	case B2R2_BLT_FMT_Y_CB_Y_CR:
 		/*
@@ -852,29 +820,16 @@ static void setup_input_stage(const struct b2r2_blt_request *req,
 		 * Chroma components are swapped so
 		 * it is YVU and not YUV.
 		 */
-		node->node.GROUP0.B2R2_INS |= B2R2_INS_IVMX_ENABLED;
-		node->node.GROUP0.B2R2_CIC |= B2R2_CIC_IVMX;
-		node->node.GROUP15.B2R2_VMX0 =
-			B2R2_VMX0_YVU_TO_RGB_601_VIDEO;
-		node->node.GROUP15.B2R2_VMX1 =
-			B2R2_VMX1_YVU_TO_RGB_601_VIDEO;
-		node->node.GROUP15.B2R2_VMX2 =
-			B2R2_VMX2_YVU_TO_RGB_601_VIDEO;
-		node->node.GROUP15.B2R2_VMX3 =
-			B2R2_VMX3_YVU_TO_RGB_601_VIDEO;
+		if (fullrange)
+			b2r2_setup_ivmx(node, B2R2_CC_YVU_FULL_TO_RGB);
+		else
+			b2r2_setup_ivmx(node, B2R2_CC_YVU_TO_RGB);
 		break;
 	case B2R2_BLT_FMT_CB_Y_CR_Y:
-		/* Set up IVMX */
-		node->node.GROUP0.B2R2_INS |= B2R2_INS_IVMX_ENABLED;
-		node->node.GROUP0.B2R2_CIC |= B2R2_CIC_IVMX;
-		node->node.GROUP15.B2R2_VMX0 =
-			B2R2_VMX0_YUV_TO_RGB_601_VIDEO;
-		node->node.GROUP15.B2R2_VMX1 =
-			B2R2_VMX1_YUV_TO_RGB_601_VIDEO;
-		node->node.GROUP15.B2R2_VMX2 =
-			B2R2_VMX2_YUV_TO_RGB_601_VIDEO;
-		node->node.GROUP15.B2R2_VMX3 =
-			B2R2_VMX3_YUV_TO_RGB_601_VIDEO;
+		if (fullrange)
+			b2r2_setup_ivmx(node, B2R2_CC_YUV_FULL_TO_RGB);
+		else
+			b2r2_setup_ivmx(node, B2R2_CC_YUV_TO_RGB);
 		break;
 	case B2R2_BLT_FMT_24_BIT_YUV888:
 	case B2R2_BLT_FMT_32_BIT_AYUV8888:
@@ -889,16 +844,10 @@ static void setup_input_stage(const struct b2r2_blt_request *req,
 		 * B2R2 expects them to be as U, Y, V, (A)
 		 * with U at the first byte.
 		 */
-		node->node.GROUP0.B2R2_INS |= B2R2_INS_IVMX_ENABLED;
-		node->node.GROUP0.B2R2_CIC |= B2R2_CIC_IVMX;
-		node->node.GROUP15.B2R2_VMX0 =
-			B2R2_VMX0_BLT_YUV888_TO_RGB_601_VIDEO;
-		node->node.GROUP15.B2R2_VMX1 =
-			B2R2_VMX1_BLT_YUV888_TO_RGB_601_VIDEO;
-		node->node.GROUP15.B2R2_VMX2 =
-			B2R2_VMX2_BLT_YUV888_TO_RGB_601_VIDEO;
-		node->node.GROUP15.B2R2_VMX3 =
-			B2R2_VMX3_BLT_YUV888_TO_RGB_601_VIDEO;
+		if (fullrange)
+			b2r2_setup_ivmx(node, B2R2_CC_BLT_YUV888_FULL_TO_RGB);
+		else
+			b2r2_setup_ivmx(node, B2R2_CC_BLT_YUV888_TO_RGB);
 
 		/*
 		 * Re-arrange color components from VUY(A) to (A)YUV
@@ -927,32 +876,21 @@ static void setup_input_stage(const struct b2r2_blt_request *req,
 		u32 rsf_luma = 0;
 		u32 rzi_luma = 0;
 
-		/* Set up IVMX */
-		node->node.GROUP0.B2R2_INS |=
-			B2R2_INS_IVMX_ENABLED | B2R2_INS_RESCALE2D_ENABLED;
-		node->node.GROUP0.B2R2_CIC |=
-			B2R2_CIC_IVMX | B2R2_CIC_RESIZE_LUMA;
+		node->node.GROUP0.B2R2_INS |= B2R2_INS_RESCALE2D_ENABLED;
+		node->node.GROUP0.B2R2_CIC |= B2R2_CIC_RESIZE_LUMA;
 
 		if (src_img->fmt == B2R2_BLT_FMT_YVU420_PACKED_SEMI_PLANAR ||
 			src_img->fmt ==
 				B2R2_BLT_FMT_YVU422_PACKED_SEMI_PLANAR) {
-			node->node.GROUP15.B2R2_VMX0 =
-				B2R2_VMX0_YVU_TO_RGB_601_VIDEO;
-			node->node.GROUP15.B2R2_VMX1 =
-				B2R2_VMX1_YVU_TO_RGB_601_VIDEO;
-			node->node.GROUP15.B2R2_VMX2 =
-				B2R2_VMX2_YVU_TO_RGB_601_VIDEO;
-			node->node.GROUP15.B2R2_VMX3 =
-				B2R2_VMX3_YVU_TO_RGB_601_VIDEO;
+			if (fullrange)
+				b2r2_setup_ivmx(node, B2R2_CC_YVU_FULL_TO_RGB);
+			else
+				b2r2_setup_ivmx(node, B2R2_CC_YVU_TO_RGB);
 		} else {
-			node->node.GROUP15.B2R2_VMX0 =
-				B2R2_VMX0_YUV_TO_RGB_601_VIDEO;
-			node->node.GROUP15.B2R2_VMX1 =
-				B2R2_VMX1_YUV_TO_RGB_601_VIDEO;
-			node->node.GROUP15.B2R2_VMX2 =
-				B2R2_VMX2_YUV_TO_RGB_601_VIDEO;
-			node->node.GROUP15.B2R2_VMX3 =
-				B2R2_VMX3_YUV_TO_RGB_601_VIDEO;
+			if (fullrange)
+				b2r2_setup_ivmx(node, B2R2_CC_YUV_FULL_TO_RGB);
+			else
+				b2r2_setup_ivmx(node, B2R2_CC_YUV_TO_RGB);
 		}
 
 		fctl |= B2R2_FCTL_LUMA_HF2D_MODE_ENABLE_RESIZER |
@@ -1316,6 +1254,8 @@ static void setup_dst_read_stage(const struct b2r2_blt_request *req,
 
 	u32 dst_pitch = 0;
 	struct b2r2_control *cont = req->instance->control;
+	bool fullrange = (req->user_req.flags &
+		B2R2_BLT_FLAG_FULL_RANGE_YUV) != 0;
 
 	if (dst_img->pitch == 0) {
 		/* Determine pitch based on format and width of the image. */
@@ -1329,37 +1269,24 @@ static void setup_dst_read_stage(const struct b2r2_blt_request *req,
 	/* Adjustments that depend on the destination format */
 	switch (dst_img->fmt) {
 	case B2R2_BLT_FMT_32_BIT_ABGR8888:
-		/* Set up IVMX */
-		node->node.GROUP0.B2R2_INS |= B2R2_INS_IVMX_ENABLED;
-		node->node.GROUP0.B2R2_CIC |= B2R2_CIC_IVMX;
-
-		node->node.GROUP15.B2R2_VMX0 = B2R2_VMX0_RGB_TO_BGR;
-		node->node.GROUP15.B2R2_VMX1 = B2R2_VMX1_RGB_TO_BGR;
-		node->node.GROUP15.B2R2_VMX2 = B2R2_VMX2_RGB_TO_BGR;
-		node->node.GROUP15.B2R2_VMX3 = B2R2_VMX3_RGB_TO_BGR;
+		b2r2_setup_ivmx(node, B2R2_CC_RGB_TO_BGR);
 		break;
 	case B2R2_BLT_FMT_Y_CB_Y_CR:
-		/* Set up IVMX */
-		node->node.GROUP0.B2R2_INS |= B2R2_INS_IVMX_ENABLED;
-		node->node.GROUP0.B2R2_CIC |= B2R2_CIC_IVMX;
 		/*
 		 * Setup input VMX to convert YVU to RGB 601 VIDEO
 		 * Chroma components are swapped
 		 * so it is YVU and not YUV.
 		 */
-		node->node.GROUP15.B2R2_VMX0 = B2R2_VMX0_YVU_TO_RGB_601_VIDEO;
-		node->node.GROUP15.B2R2_VMX1 = B2R2_VMX1_YVU_TO_RGB_601_VIDEO;
-		node->node.GROUP15.B2R2_VMX2 = B2R2_VMX2_YVU_TO_RGB_601_VIDEO;
-		node->node.GROUP15.B2R2_VMX3 = B2R2_VMX3_YVU_TO_RGB_601_VIDEO;
+		if (fullrange)
+			b2r2_setup_ivmx(node, B2R2_CC_YVU_FULL_TO_RGB);
+		else
+			b2r2_setup_ivmx(node, B2R2_CC_YVU_TO_RGB);
 		break;
 	case B2R2_BLT_FMT_CB_Y_CR_Y:
-		/* Set up IVMX */
-		node->node.GROUP0.B2R2_INS |= B2R2_INS_IVMX_ENABLED;
-		node->node.GROUP0.B2R2_CIC |= B2R2_CIC_IVMX;
-		node->node.GROUP15.B2R2_VMX0 = B2R2_VMX0_YUV_TO_RGB_601_VIDEO;
-		node->node.GROUP15.B2R2_VMX1 = B2R2_VMX1_YUV_TO_RGB_601_VIDEO;
-		node->node.GROUP15.B2R2_VMX2 = B2R2_VMX2_YUV_TO_RGB_601_VIDEO;
-		node->node.GROUP15.B2R2_VMX3 = B2R2_VMX3_YUV_TO_RGB_601_VIDEO;
+		if (fullrange)
+			b2r2_setup_ivmx(node, B2R2_CC_YUV_FULL_TO_RGB);
+		else
+			b2r2_setup_ivmx(node, B2R2_CC_YUV_TO_RGB);
 		break;
 	case B2R2_BLT_FMT_24_BIT_YUV888:
 	case B2R2_BLT_FMT_32_BIT_AYUV8888:
@@ -1374,16 +1301,10 @@ static void setup_dst_read_stage(const struct b2r2_blt_request *req,
 		 * B2R2 expects them to be as U, Y, V, (A)
 		 * with U at the first byte.
 		 */
-		node->node.GROUP0.B2R2_INS |= B2R2_INS_IVMX_ENABLED;
-		node->node.GROUP0.B2R2_CIC |= B2R2_CIC_IVMX;
-		node->node.GROUP15.B2R2_VMX0 =
-			B2R2_VMX0_BLT_YUV888_TO_RGB_601_VIDEO;
-		node->node.GROUP15.B2R2_VMX1 =
-			B2R2_VMX1_BLT_YUV888_TO_RGB_601_VIDEO;
-		node->node.GROUP15.B2R2_VMX2 =
-			B2R2_VMX2_BLT_YUV888_TO_RGB_601_VIDEO;
-		node->node.GROUP15.B2R2_VMX3 =
-			B2R2_VMX3_BLT_YUV888_TO_RGB_601_VIDEO;
+		if (fullrange)
+			b2r2_setup_ivmx(node, B2R2_CC_BLT_YUV888_FULL_TO_RGB);
+		else
+			b2r2_setup_ivmx(node, B2R2_CC_BLT_YUV888_TO_RGB);
 
 		/*
 		 * Re-arrange color components from VUY(A) to (A)YUV
@@ -1404,30 +1325,18 @@ static void setup_dst_read_stage(const struct b2r2_blt_request *req,
 	case B2R2_BLT_FMT_YVU422_PACKED_SEMI_PLANAR:
 	case B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE:
 	case B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE: {
-		/* Set up IVMX */
-		node->node.GROUP0.B2R2_INS |= B2R2_INS_IVMX_ENABLED;
-		node->node.GROUP0.B2R2_CIC |= B2R2_CIC_IVMX;
-
 		if (dst_img->fmt == B2R2_BLT_FMT_YVU420_PACKED_SEMI_PLANAR ||
 			dst_img->fmt ==
 				B2R2_BLT_FMT_YVU422_PACKED_SEMI_PLANAR) {
-			node->node.GROUP15.B2R2_VMX0 =
-				B2R2_VMX0_YVU_TO_RGB_601_VIDEO;
-			node->node.GROUP15.B2R2_VMX1 =
-				B2R2_VMX1_YVU_TO_RGB_601_VIDEO;
-			node->node.GROUP15.B2R2_VMX2 =
-				B2R2_VMX2_YVU_TO_RGB_601_VIDEO;
-			node->node.GROUP15.B2R2_VMX3 =
-				B2R2_VMX3_YVU_TO_RGB_601_VIDEO;
+			if (fullrange)
+				b2r2_setup_ivmx(node, B2R2_CC_YVU_FULL_TO_RGB);
+			else
+				b2r2_setup_ivmx(node, B2R2_CC_YVU_TO_RGB);
 		} else {
-			node->node.GROUP15.B2R2_VMX0 =
-				B2R2_VMX0_YUV_TO_RGB_601_VIDEO;
-			node->node.GROUP15.B2R2_VMX1 =
-				B2R2_VMX1_YUV_TO_RGB_601_VIDEO;
-			node->node.GROUP15.B2R2_VMX2 =
-				B2R2_VMX2_YUV_TO_RGB_601_VIDEO;
-			node->node.GROUP15.B2R2_VMX3 =
-				B2R2_VMX3_YUV_TO_RGB_601_VIDEO;
+			if (fullrange)
+				b2r2_setup_ivmx(node, B2R2_CC_YUV_FULL_TO_RGB);
+			else
+				b2r2_setup_ivmx(node, B2R2_CC_YUV_TO_RGB);
 		}
 
 		switch (dst_img->fmt) {
@@ -1781,6 +1690,8 @@ static void setup_writeback_stage(const struct b2r2_blt_request *req,
 	u32 endianness = 0;
 
 	struct b2r2_control *cont = req->instance->control;
+	bool fullrange = (req->user_req.flags &
+		B2R2_BLT_FLAG_FULL_RANGE_YUV) != 0;
 
 	b2r2_log_info(cont->dev, "%s ENTRY\n", __func__);
 
@@ -1803,12 +1714,10 @@ static void setup_writeback_stage(const struct b2r2_blt_request *req,
 		u32 rsf = 0;
 		const u32 group0_b2r2_ins =
 			B2R2_INS_SOURCE_2_FETCH_FROM_MEM |
-			B2R2_INS_RECT_CLIP_ENABLED |
-			B2R2_INS_IVMX_ENABLED;
+			B2R2_INS_RECT_CLIP_ENABLED;
 		const u32 group0_b2r2_cic =
 			B2R2_CIC_SOURCE_2 |
-			B2R2_CIC_CLIP_WINDOW |
-			B2R2_CIC_IVMX;
+			B2R2_CIC_CLIP_WINDOW;
 
 		u32 cb_addr = 0;
 		u32 cr_addr = 0;
@@ -1891,10 +1800,10 @@ static void setup_writeback_stage(const struct b2r2_blt_request *req,
 			B2R2_TY_VSO_TOP_TO_BOTTOM |
 			dst_dither;
 
-		node->node.GROUP15.B2R2_VMX0 = B2R2_VMX0_RGB_TO_YUV_601_VIDEO;
-		node->node.GROUP15.B2R2_VMX1 = B2R2_VMX1_RGB_TO_YUV_601_VIDEO;
-		node->node.GROUP15.B2R2_VMX2 = B2R2_VMX2_RGB_TO_YUV_601_VIDEO;
-		node->node.GROUP15.B2R2_VMX3 = B2R2_VMX3_RGB_TO_YUV_601_VIDEO;
+		if (fullrange)
+			b2r2_setup_ivmx(node, B2R2_CC_RGB_TO_YUV_FULL);
+		else
+			b2r2_setup_ivmx(node, B2R2_CC_RGB_TO_YUV);
 
 		 /* bypass ALU, no blending here. Handled in its own stage. */
 		node->node.GROUP0.B2R2_ACK = B2R2_ACK_MODE_BYPASS_S2_S3;
@@ -1916,10 +1825,10 @@ static void setup_writeback_stage(const struct b2r2_blt_request *req,
 			dst_dither |
 			B2R2_TTY_CHROMA_NOT_LUMA;
 
-		node->node.GROUP15.B2R2_VMX0 = B2R2_VMX0_RGB_TO_YUV_601_VIDEO;
-		node->node.GROUP15.B2R2_VMX1 = B2R2_VMX1_RGB_TO_YUV_601_VIDEO;
-		node->node.GROUP15.B2R2_VMX2 = B2R2_VMX2_RGB_TO_YUV_601_VIDEO;
-		node->node.GROUP15.B2R2_VMX3 = B2R2_VMX3_RGB_TO_YUV_601_VIDEO;
+		if (fullrange)
+			b2r2_setup_ivmx(node, B2R2_CC_RGB_TO_YUV_FULL);
+		else
+			b2r2_setup_ivmx(node, B2R2_CC_RGB_TO_YUV);
 
 		node->node.GROUP0.B2R2_ACK = B2R2_ACK_MODE_BYPASS_S2_S3;
 		node->node.GROUP0.B2R2_INS = group0_b2r2_ins;
@@ -1959,10 +1868,10 @@ static void setup_writeback_stage(const struct b2r2_blt_request *req,
 			dst_dither |
 			B2R2_TTY_CHROMA_NOT_LUMA;
 
-		node->node.GROUP15.B2R2_VMX0 = B2R2_VMX0_RGB_TO_YUV_601_VIDEO;
-		node->node.GROUP15.B2R2_VMX1 = B2R2_VMX1_RGB_TO_YUV_601_VIDEO;
-		node->node.GROUP15.B2R2_VMX2 = B2R2_VMX2_RGB_TO_YUV_601_VIDEO;
-		node->node.GROUP15.B2R2_VMX3 = B2R2_VMX3_RGB_TO_YUV_601_VIDEO;
+		if (fullrange)
+			b2r2_setup_ivmx(node, B2R2_CC_RGB_TO_YUV_FULL);
+		else
+			b2r2_setup_ivmx(node, B2R2_CC_RGB_TO_YUV);
 
 		node->node.GROUP0.B2R2_ACK = B2R2_ACK_MODE_BYPASS_S2_S3;
 		node->node.GROUP0.B2R2_INS = group0_b2r2_ins;
@@ -1993,12 +1902,10 @@ static void setup_writeback_stage(const struct b2r2_blt_request *req,
 		u32 rsf = 0;
 		const u32 group0_b2r2_ins =
 			B2R2_INS_SOURCE_2_FETCH_FROM_MEM |
-			B2R2_INS_RECT_CLIP_ENABLED |
-			B2R2_INS_IVMX_ENABLED;
+			B2R2_INS_RECT_CLIP_ENABLED;
 		const u32 group0_b2r2_cic =
 			B2R2_CIC_SOURCE_2 |
-			B2R2_CIC_CLIP_WINDOW |
-			B2R2_CIC_IVMX;
+			B2R2_CIC_CLIP_WINDOW;
 
 		u32 chroma_addr = req->dst_resolved.physical_address +
 			dst_pitch * dst_img->height;
@@ -2047,23 +1954,15 @@ static void setup_writeback_stage(const struct b2r2_blt_request *req,
 
 		if (dst_fmt == B2R2_BLT_FMT_YVU420_PACKED_SEMI_PLANAR ||
 			dst_fmt == B2R2_BLT_FMT_YVU422_PACKED_SEMI_PLANAR) {
-			node->node.GROUP15.B2R2_VMX0 =
-				B2R2_VMX0_RGB_TO_YVU_601_VIDEO;
-			node->node.GROUP15.B2R2_VMX1 =
-				B2R2_VMX1_RGB_TO_YVU_601_VIDEO;
-			node->node.GROUP15.B2R2_VMX2 =
-				B2R2_VMX2_RGB_TO_YVU_601_VIDEO;
-			node->node.GROUP15.B2R2_VMX3 =
-				B2R2_VMX3_RGB_TO_YVU_601_VIDEO;
+			if (fullrange)
+				b2r2_setup_ivmx(node, B2R2_CC_RGB_TO_YVU_FULL);
+			else
+				b2r2_setup_ivmx(node, B2R2_CC_RGB_TO_YVU);
 		} else {
-			node->node.GROUP15.B2R2_VMX0 =
-				B2R2_VMX0_RGB_TO_YUV_601_VIDEO;
-			node->node.GROUP15.B2R2_VMX1 =
-				B2R2_VMX1_RGB_TO_YUV_601_VIDEO;
-			node->node.GROUP15.B2R2_VMX2 =
-				B2R2_VMX2_RGB_TO_YUV_601_VIDEO;
-			node->node.GROUP15.B2R2_VMX3 =
-				B2R2_VMX3_RGB_TO_YUV_601_VIDEO;
+			if (fullrange)
+				b2r2_setup_ivmx(node, B2R2_CC_RGB_TO_YUV_FULL);
+			else
+				b2r2_setup_ivmx(node, B2R2_CC_RGB_TO_YUV);
 		}
 
 		 /* bypass ALU, no blending here. Handled in its own stage. */
@@ -2088,23 +1987,15 @@ static void setup_writeback_stage(const struct b2r2_blt_request *req,
 
 		if (dst_fmt == B2R2_BLT_FMT_YVU420_PACKED_SEMI_PLANAR ||
 			dst_fmt == B2R2_BLT_FMT_YVU422_PACKED_SEMI_PLANAR) {
-			node->node.GROUP15.B2R2_VMX0 =
-				B2R2_VMX0_RGB_TO_YVU_601_VIDEO;
-			node->node.GROUP15.B2R2_VMX1 =
-				B2R2_VMX1_RGB_TO_YVU_601_VIDEO;
-			node->node.GROUP15.B2R2_VMX2 =
-				B2R2_VMX2_RGB_TO_YVU_601_VIDEO;
-			node->node.GROUP15.B2R2_VMX3 =
-				B2R2_VMX3_RGB_TO_YVU_601_VIDEO;
+			if (fullrange)
+				b2r2_setup_ivmx(node, B2R2_CC_RGB_TO_YVU_FULL);
+			else
+				b2r2_setup_ivmx(node, B2R2_CC_RGB_TO_YVU);
 		} else {
-			node->node.GROUP15.B2R2_VMX0 =
-				B2R2_VMX0_RGB_TO_YUV_601_VIDEO;
-			node->node.GROUP15.B2R2_VMX1 =
-				B2R2_VMX1_RGB_TO_YUV_601_VIDEO;
-			node->node.GROUP15.B2R2_VMX2 =
-				B2R2_VMX2_RGB_TO_YUV_601_VIDEO;
-			node->node.GROUP15.B2R2_VMX3 =
-				B2R2_VMX3_RGB_TO_YUV_601_VIDEO;
+			if (fullrange)
+				b2r2_setup_ivmx(node, B2R2_CC_RGB_TO_YUV_FULL);
+			else
+				b2r2_setup_ivmx(node, B2R2_CC_RGB_TO_YUV);
 		}
 
 		node->node.GROUP0.B2R2_ACK = B2R2_ACK_MODE_BYPASS_S2_S3;
@@ -2126,43 +2017,24 @@ static void setup_writeback_stage(const struct b2r2_blt_request *req,
 	} else {
 		/* single buffer target */
 
-		/* Set up OVMX */
 		switch (dst_fmt) {
 		case B2R2_BLT_FMT_32_BIT_ABGR8888:
-			node->node.GROUP0.B2R2_INS |= B2R2_INS_OVMX_ENABLED;
-			node->node.GROUP0.B2R2_CIC |= B2R2_CIC_OVMX;
-			node->node.GROUP16.B2R2_VMX0 = B2R2_VMX0_RGB_TO_BGR;
-			node->node.GROUP16.B2R2_VMX1 = B2R2_VMX1_RGB_TO_BGR;
-			node->node.GROUP16.B2R2_VMX2 = B2R2_VMX2_RGB_TO_BGR;
-			node->node.GROUP16.B2R2_VMX3 = B2R2_VMX3_RGB_TO_BGR;
+			b2r2_setup_ovmx(node, B2R2_CC_RGB_TO_BGR);
 			break;
 		case B2R2_BLT_FMT_Y_CB_Y_CR:
-			node->node.GROUP0.B2R2_INS |= B2R2_INS_OVMX_ENABLED;
-			node->node.GROUP0.B2R2_CIC |= B2R2_CIC_OVMX;
-			node->node.GROUP16.B2R2_VMX0 =
-				B2R2_VMX0_RGB_TO_YVU_601_VIDEO;
-			node->node.GROUP16.B2R2_VMX1 =
-				B2R2_VMX1_RGB_TO_YVU_601_VIDEO;
-			node->node.GROUP16.B2R2_VMX2 =
-				B2R2_VMX2_RGB_TO_YVU_601_VIDEO;
-			node->node.GROUP16.B2R2_VMX3 =
-				B2R2_VMX3_RGB_TO_YVU_601_VIDEO;
+			if (fullrange)
+				b2r2_setup_ovmx(node, B2R2_CC_RGB_TO_YVU_FULL);
+			else
+				b2r2_setup_ovmx(node, B2R2_CC_RGB_TO_YVU);
 			break;
 		case B2R2_BLT_FMT_24_BIT_YUV888: /* fall through */
 		case B2R2_BLT_FMT_32_BIT_AYUV8888: /* fall through */
 		case B2R2_BLT_FMT_24_BIT_VUY888: /* fall through */
 		case B2R2_BLT_FMT_32_BIT_VUYA8888:
-			node->node.GROUP0.B2R2_INS |= B2R2_INS_OVMX_ENABLED;
-			node->node.GROUP0.B2R2_CIC |= B2R2_CIC_OVMX;
-			node->node.GROUP16.B2R2_VMX0 =
-				B2R2_VMX0_RGB_TO_BLT_YUV888_601_VIDEO;
-			node->node.GROUP16.B2R2_VMX1 =
-				B2R2_VMX1_RGB_TO_BLT_YUV888_601_VIDEO;
-			node->node.GROUP16.B2R2_VMX2 =
-				B2R2_VMX2_RGB_TO_BLT_YUV888_601_VIDEO;
-			node->node.GROUP16.B2R2_VMX3 =
-				B2R2_VMX3_RGB_TO_BLT_YUV888_601_VIDEO;
-
+			if (fullrange)
+				b2r2_setup_ovmx(node, B2R2_CC_RGB_TO_BLT_YUV888_FULL);
+			else
+				b2r2_setup_ovmx(node, B2R2_CC_RGB_TO_BLT_YUV888);
 			/*
 			 * Re-arrange color components from (A)YUV to VUY(A)
 			 * when bytes are stored in memory.
diff --git a/drivers/video/b2r2/b2r2_hw.h b/drivers/video/b2r2/b2r2_hw.h
index d492168913a..9739912d78c 100644
--- a/drivers/video/b2r2/b2r2_hw.h
+++ b/drivers/video/b2r2/b2r2_hw.h
@@ -455,253 +455,4 @@ enum b2r2_plug_page_size {
 #  define B2R2_PLUG_PAGE_SIZE_DEFAULT 0
 #endif
 
-/*  VMX register values for RGB to YUV color conversion */
-/*  Magic numbers from 27.11 in DB8500_DesignSpecification_v2.5.pdf */
-
-/* 601 Video Matrix (standard 601 conversion) */
-#define B2R2_VMX0_RGB_TO_YUV_601_VIDEO 0x107e4beb
-#define B2R2_VMX1_RGB_TO_YUV_601_VIDEO 0x0982581d
-#define B2R2_VMX2_RGB_TO_YUV_601_VIDEO 0xfa9ea483
-#define B2R2_VMX3_RGB_TO_YUV_601_VIDEO 0x08000080
-
-/* 601 Gfx Matrix (full range conversion) */
-#define B2R2_VMX0_RGB_TO_YUV_601_GFX 0x0e1e8bee
-#define B2R2_VMX1_RGB_TO_YUV_601_GFX 0x08420419
-#define B2R2_VMX2_RGB_TO_YUV_601_GFX 0xfb5ed471
-#define B2R2_VMX3_RGB_TO_YUV_601_GFX 0x08004080
-
-/* 709 Video Matrix (standard 709 conversion) */
-#define B2R2_VMX0_RGB_TO_YUV_709_VIDEO 0x107e27f4
-#define B2R2_VMX1_RGB_TO_YUV_709_VIDEO 0x06e2dc13
-#define B2R2_VMX2_RGB_TO_YUV_709_VIDEO 0xfc5e6c83
-#define B2R2_VMX3_RGB_TO_YUV_709_VIDEO 0x08000080
-
-/* 709 Gfx Matrix (standard 709 conversion) */
-#define B2R2_VMX0_RGB_TO_YUV_709_GFX 0x0e3e6bf5
-#define B2R2_VMX1_RGB_TO_YUV_709_GFX 0x05e27410
-#define B2R2_VMX2_RGB_TO_YUV_709_GFX 0xfcdea471
-#define B2R2_VMX3_RGB_TO_YUV_709_GFX 0x08004080
-
-/* VMX register values for YUV to RGB color conversion */
-
-/* 601 Video Matrix (standard 601 conversion) */
-#define B2R2_VMX0_YUV_TO_RGB_601_VIDEO 0x2c440000
-#define B2R2_VMX1_YUV_TO_RGB_601_VIDEO 0xe9a403aa
-#define B2R2_VMX2_YUV_TO_RGB_601_VIDEO 0x0004013f
-#define B2R2_VMX3_YUV_TO_RGB_601_VIDEO 0x34f21322
-
-/* 601 Gfx Matrix (full range conversion) */
-#define B2R2_VMX0_YUV_TO_RGB_601_GFX 0x3324a800
-#define B2R2_VMX1_YUV_TO_RGB_601_GFX 0xe604ab9c
-#define B2R2_VMX2_YUV_TO_RGB_601_GFX 0x0004a957
-#define B2R2_VMX3_YUV_TO_RGB_601_GFX 0x32121eeb
-
-/* 709 Video Matrix (standard 709 conversion) */
-#define B2R2_VMX0_YUV_TO_RGB_709_VIDEO 0x31440000
-#define B2R2_VMX1_YUV_TO_RGB_709_VIDEO 0xf16403d1
-#define B2R2_VMX2_YUV_TO_RGB_709_VIDEO 0x00040145
-#define B2R2_VMX3_YUV_TO_RGB_709_VIDEO 0x33b14b18
-
-/* 709 Gfx Matrix (standard 709 conversion) */
-#define B2R2_VMX0_YUV_TO_RGB_709_GFX 0x3964a800
-#define B2R2_VMX1_YUV_TO_RGB_709_GFX 0xef04abc9
-#define B2R2_VMX2_YUV_TO_RGB_709_GFX 0x0004a95f
-#define B2R2_VMX3_YUV_TO_RGB_709_GFX 0x307132df
-
-/* VMX register values for RGB to BGR conversion */
-#define B2R2_VMX0_RGB_TO_BGR 0x00000100
-#define B2R2_VMX1_RGB_TO_BGR 0x00040000
-#define B2R2_VMX2_RGB_TO_BGR 0x20000000
-#define B2R2_VMX3_RGB_TO_BGR 0x00000000
-
-/* VMX register values for BGR to YUV color conversion */
-/* Note: All BGR -> YUV values are calculated by multiplying
- * the RGB -> YUV matrices [A], with [S] to form [A]x[S] where
- *     |0 0 1|
- * S = |0 1 0|
- *     |1 0 0|
- * Essentially swapping first and third columns in
- * the matrices (VMX0, VMX1 and VMX2 values).
- * The offset vector VMX3 remains untouched.
- * Put another way, the value of bits 0 through 9
- * is swapped with the value of
- * bits 20 through 31 in VMX0, VMX1 and VMX2,
- * taking into consideration the compression
- * that is used on bits 0 through 9. Bit 0 being LSB.
- */
-
-/* 601 Video Matrix (standard 601 conversion) */
-#define B2R2_VMX0_BGR_TO_YUV_601_VIDEO 0xfd7e4883
-#define B2R2_VMX1_BGR_TO_YUV_601_VIDEO 0x03a2584c
-#define B2R2_VMX2_BGR_TO_YUV_601_VIDEO 0x107ea7d4
-#define B2R2_VMX3_BGR_TO_YUV_601_VIDEO 0x08000080
-
-/* 601 Gfx Matrix (full range conversion) */
-#define B2R2_VMX0_BGR_TO_YUV_601_GFX 0xfdde8870
-#define B2R2_VMX1_BGR_TO_YUV_601_GFX 0x03220442
-#define B2R2_VMX2_BGR_TO_YUV_601_GFX 0x0e3ed7da
-#define B2R2_VMX3_BGR_TO_YUV_601_GFX 0x08004080
-
-/* 709 Video Matrix (standard 709 conversion) */
-#define B2R2_VMX0_BGR_TO_YUV_709_VIDEO 0xfe9e2483
-#define B2R2_VMX1_BGR_TO_YUV_709_VIDEO 0x0262dc37
-#define B2R2_VMX2_BGR_TO_YUV_709_VIDEO 0x107e6fe2
-#define B2R2_VMX3_BGR_TO_YUV_709_VIDEO 0x08000080
-
-/* 709 Gfx Matrix (standard 709 conversion) */
-#define B2R2_VMX0_BGR_TO_YUV_709_GFX 0xfebe6871
-#define B2R2_VMX1_BGR_TO_YUV_709_GFX 0x0202742f
-#define B2R2_VMX2_BGR_TO_YUV_709_GFX 0x0e3ea7e6
-#define B2R2_VMX3_BGR_TO_YUV_709_GFX 0x08004080
-
-
-/* VMX register values for YUV to BGR conversion */
-/*  Note: All YUV -> BGR values are constructed
- * from the YUV -> RGB ones, by swapping
- * first and third rows in the matrix
- * (VMX0 and VMX2 values). Further, the first and
- * third values in the offset vector need to be
- * swapped as well, i.e. bits 0 through 9 are swapped
- * with bits 20 through 29 in the VMX3 value.
- * Bit 0 being LSB.
- */
-
-/* 601 Video Matrix (standard 601 conversion) */
-#define B2R2_VMX0_YUV_TO_BGR_601_VIDEO 0x0004013f
-#define B2R2_VMX1_YUV_TO_BGR_601_VIDEO 0xe9a403aa
-#define B2R2_VMX2_YUV_TO_BGR_601_VIDEO 0x2c440000
-#define B2R2_VMX3_YUV_TO_BGR_601_VIDEO 0x3222134f
-
-/* 601 Gfx Matrix (full range conversion) */
-#define B2R2_VMX0_YUV_TO_BGR_601_GFX 0x0004a957
-#define B2R2_VMX1_YUV_TO_BGR_601_GFX 0xe604ab9c
-#define B2R2_VMX2_YUV_TO_BGR_601_GFX 0x3324a800
-#define B2R2_VMX3_YUV_TO_BGR_601_GFX 0x2eb21f21
-
-/* 709 Video Matrix (standard 709 conversion) */
-#define B2R2_VMX0_YUV_TO_BGR_709_VIDEO 0x00040145
-#define B2R2_VMX1_YUV_TO_BGR_709_VIDEO 0xf16403d1
-#define B2R2_VMX2_YUV_TO_BGR_709_VIDEO 0x31440000
-#define B2R2_VMX3_YUV_TO_BGR_709_VIDEO 0x31814b3b
-
-/* 709 Gfx Matrix (standard 709 conversion) */
-#define B2R2_VMX0_YUV_TO_BGR_709_GFX 0x0004a95f
-#define B2R2_VMX1_YUV_TO_BGR_709_GFX 0xef04abc9
-#define B2R2_VMX2_YUV_TO_BGR_709_GFX 0x3964a800
-#define B2R2_VMX3_YUV_TO_BGR_709_GFX 0x2df13307
-
-
-/* VMX register values for YVU to RGB conversion */
-
-/* 601 Video Matrix (standard 601 conversion) */
-#define B2R2_VMX0_YVU_TO_RGB_601_VIDEO 0x00040120
-#define B2R2_VMX1_YVU_TO_RGB_601_VIDEO 0xF544034D
-#define B2R2_VMX2_YVU_TO_RGB_601_VIDEO 0x37840000
-#define B2R2_VMX3_YVU_TO_RGB_601_VIDEO 0x34f21322
-
-/* VMX register values for RGB to YVU conversion */
-
-/* 601 Video Matrix (standard 601 conversion) */
-#define B2R2_VMX0_RGB_TO_YVU_601_VIDEO 0xfa9ea483
-#define B2R2_VMX1_RGB_TO_YVU_601_VIDEO 0x0982581d
-#define B2R2_VMX2_RGB_TO_YVU_601_VIDEO 0x107e4beb
-#define B2R2_VMX3_RGB_TO_YVU_601_VIDEO 0x08000080
-
-/* VMX register values for YVU to BGR conversion */
-
-/* 601 Video Matrix (standard 601 conversion) */
-#define B2R2_VMX0_YVU_TO_BGR_601_VIDEO 0x37840000
-#define B2R2_VMX1_YVU_TO_BGR_601_VIDEO 0xF544034D
-#define B2R2_VMX2_YVU_TO_BGR_601_VIDEO 0x00040120
-#define B2R2_VMX3_YVU_TO_BGR_601_VIDEO 0x3222134F
-
-/* VMX register values for BGR to YVU conversion */
-
-/* 601 Video Matrix (standard 601 conversion) */
-#define B2R2_VMX0_BGR_TO_YVU_601_VIDEO 0x107ea7d4
-#define B2R2_VMX1_BGR_TO_YVU_601_VIDEO 0x03a2584c
-#define B2R2_VMX2_BGR_TO_YVU_601_VIDEO 0xfd7e4883
-#define B2R2_VMX3_BGR_TO_YVU_601_VIDEO 0x08000080
-
-/* VMX register values for YVU to YUV conversion */
-
-/* 601 Video Matrix (standard 601 conversion) */
-/* Internally, the components are in fact stored
- * with luma in the middle, i.e. UYV, which is why
- * the values are just like for RGB->BGR conversion.
- */
-#define B2R2_VMX0_YVU_TO_YUV_601_VIDEO 0x00000100
-#define B2R2_VMX1_YVU_TO_YUV_601_VIDEO 0x00040000
-#define B2R2_VMX2_YVU_TO_YUV_601_VIDEO 0x20000000
-#define B2R2_VMX3_YVU_TO_YUV_601_VIDEO 0x00000000
-
-/* VMX register values for RGB to BLT_YUV888 conversion */
-
-/* 601 Video Matrix (standard 601 conversion) */
-/*
- * BLT_YUV888 has color components laid out in memory as V, U, Y, (Alpha)
- * with V at the first byte (due to little endian addressing).
- * B2R2 expects them to be as U, Y, V, (A)
- * with U at the first byte.
- * Note: RGB -> BLT_YUV888 values are calculated by multiplying
- * the RGB -> YUV matrix [A], with [S] to form [S]x[A] where
- *     |0 1 0|
- * S = |0 0 1|
- *     |1 0 0|
- * Essentially changing the order of rows in the original
- * matrix [A].
- * row1 -> row3
- * row2 -> row1
- * row3 -> row2
- * Values in the offset vector are swapped in the same manner.
- */
-#define B2R2_VMX0_RGB_TO_BLT_YUV888_601_VIDEO 0x0982581d
-#define B2R2_VMX1_RGB_TO_BLT_YUV888_601_VIDEO 0xfa9ea483
-#define B2R2_VMX2_RGB_TO_BLT_YUV888_601_VIDEO 0x107e4beb
-#define B2R2_VMX3_RGB_TO_BLT_YUV888_601_VIDEO 0x00020080
-
-/* VMX register values for BLT_YUV888 to RGB conversion */
-
-/*
- * Note: BLT_YUV888 -> RGB values are calculated by multiplying
- * the YUV -> RGB matrix [A], with [S] to form [A]x[S] where
- *     |0 0 1|
- * S = |1 0 0|
- *     |0 1 0|
- * Essentially changing the order of columns in the original
- * matrix [A].
- * col1 -> col3
- * col2 -> col1
- * col3 -> col2
- * Values in the offset vector remain unchanged.
- */
-#define B2R2_VMX0_BLT_YUV888_TO_RGB_601_VIDEO 0x20000121
-#define B2R2_VMX1_BLT_YUV888_TO_RGB_601_VIDEO 0x201ea74c
-#define B2R2_VMX2_BLT_YUV888_TO_RGB_601_VIDEO 0x2006f000
-#define B2R2_VMX3_BLT_YUV888_TO_RGB_601_VIDEO 0x34f21322
-
-/* VMX register values for YUV to BLT_YUV888 conversion */
-#define B2R2_VMX0_YUV_TO_BLT_YUV888 0x00040000
-#define B2R2_VMX1_YUV_TO_BLT_YUV888 0x00000100
-#define B2R2_VMX2_YUV_TO_BLT_YUV888 0x20000000
-#define B2R2_VMX3_YUV_TO_BLT_YUV888 0x00000000
-
-/* VMX register values for BLT_YUV888 to YUV conversion */
-#define B2R2_VMX0_BLT_YUV888_TO_YUV 0x00000100
-#define B2R2_VMX1_BLT_YUV888_TO_YUV 0x20000000
-#define B2R2_VMX2_BLT_YUV888_TO_YUV 0x00040000
-#define B2R2_VMX3_BLT_YUV888_TO_YUV 0x00000000
-
-/* VMX register values for YVU to BLT_YUV888 conversion */
-#define B2R2_VMX0_YVU_TO_BLT_YUV888 0x00040000
-#define B2R2_VMX1_YVU_TO_BLT_YUV888 0x20000000
-#define B2R2_VMX2_YVU_TO_BLT_YUV888 0x00000100
-#define B2R2_VMX3_YVU_TO_BLT_YUV888 0x00000000
-
-/* VMX register values for BLT_YUV888 to YVU conversion */
-#define B2R2_VMX0_BLT_YUV888_TO_YVU 0x00040000
-#define B2R2_VMX1_BLT_YUV888_TO_YVU 0x20000000
-#define B2R2_VMX2_BLT_YUV888_TO_YVU 0x00000100
-#define B2R2_VMX3_BLT_YUV888_TO_YVU 0x00000000
-
 #endif /* B2R2_HW_H__ */
diff --git a/drivers/video/b2r2/b2r2_hw_convert.c b/drivers/video/b2r2/b2r2_hw_convert.c
new file mode 100644
index 00000000000..d1b44db79c3
--- /dev/null
+++ b/drivers/video/b2r2/b2r2_hw_convert.c
@@ -0,0 +1,747 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2012
+ *
+ * ST-Ericsson B2R2 node splitter
+ *
+ * Author: Jorgen Nilsson <jorgen.nilsson@stericsson.com>
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+
+#include "b2r2_hw_convert.h"
+#include "b2r2_internal.h"
+#include "b2r2_utils.h"
+
+/*
+ * Macros and constants
+ */
+
+/*  VMX register values for RGB to YUV color conversion */
+/*  Magic numbers from 27.11 in DB8500_DesignSpecification_v2.5.pdf */
+
+/* 601 Full range conversion matrix */
+#define B2R2_VMX0_RGB_TO_YUV_601_FULL_RANGE 0x107e4beb
+#define B2R2_VMX1_RGB_TO_YUV_601_FULL_RANGE 0x0982581d
+#define B2R2_VMX2_RGB_TO_YUV_601_FULL_RANGE 0xfa9ea483
+#define B2R2_VMX3_RGB_TO_YUV_601_FULL_RANGE 0x08000080
+
+/* 601 Standard (clamped) conversion matrix */
+#define B2R2_VMX0_RGB_TO_YUV_601_STANDARD 0x0e1e8bee
+#define B2R2_VMX1_RGB_TO_YUV_601_STANDARD 0x08420419
+#define B2R2_VMX2_RGB_TO_YUV_601_STANDARD 0xfb5ed471
+#define B2R2_VMX3_RGB_TO_YUV_601_STANDARD 0x08004080
+
+/* 709 Full range conversion matrix */
+#define B2R2_VMX0_RGB_TO_YUV_709_FULL_RANGE 0x107e27f4
+#define B2R2_VMX1_RGB_TO_YUV_709_FULL_RANGE 0x06e2dc13
+#define B2R2_VMX2_RGB_TO_YUV_709_FULL_RANGE 0xfc5e6c83
+#define B2R2_VMX3_RGB_TO_YUV_709_FULL_RANGE 0x08000080
+
+/* 709 Standard (clamped) conversion matrix */
+#define B2R2_VMX0_RGB_TO_YUV_709_STANDARD 0x0e3e6bf5
+#define B2R2_VMX1_RGB_TO_YUV_709_STANDARD 0x05e27410
+#define B2R2_VMX2_RGB_TO_YUV_709_STANDARD 0xfcdea471
+#define B2R2_VMX3_RGB_TO_YUV_709_STANDARD 0x08004080
+
+/* VMX register values for YUV to RGB color conversion */
+
+/* 601 Full range conversion matrix */
+#define B2R2_VMX0_YUV_TO_RGB_601_FULL_RANGE 0x2c440000
+#define B2R2_VMX1_YUV_TO_RGB_601_FULL_RANGE 0xe9a403aa
+#define B2R2_VMX2_YUV_TO_RGB_601_FULL_RANGE 0x0004013f
+#define B2R2_VMX3_YUV_TO_RGB_601_FULL_RANGE 0x34f21322
+
+/* 601 Standard (clamped) conversion matrix */
+#define B2R2_VMX0_YUV_TO_RGB_601_STANDARD 0x3324a800
+#define B2R2_VMX1_YUV_TO_RGB_601_STANDARD 0xe604ab9c
+#define B2R2_VMX2_YUV_TO_RGB_601_STANDARD 0x0004a957
+#define B2R2_VMX3_YUV_TO_RGB_601_STANDARD 0x32121eeb
+
+/* 709 Full range conversion matrix */
+#define B2R2_VMX0_YUV_TO_RGB_709_FULL_RANGE 0x31440000
+#define B2R2_VMX1_YUV_TO_RGB_709_FULL_RANGE 0xf16403d1
+#define B2R2_VMX2_YUV_TO_RGB_709_FULL_RANGE 0x00040145
+#define B2R2_VMX3_YUV_TO_RGB_709_FULL_RANGE 0x33b14b18
+
+/* 709 Standard (clamped) conversion matrix */
+#define B2R2_VMX0_YUV_TO_RGB_709_STANDARD 0x3964a800
+#define B2R2_VMX1_YUV_TO_RGB_709_STANDARD 0xef04abc9
+#define B2R2_VMX2_YUV_TO_RGB_709_STANDARD 0x0004a95f
+#define B2R2_VMX3_YUV_TO_RGB_709_STANDARD 0x307132df
+
+/* VMX register values for RGB to BGR conversion */
+#define B2R2_VMX0_RGB_TO_BGR 0x00000100
+#define B2R2_VMX1_RGB_TO_BGR 0x00040000
+#define B2R2_VMX2_RGB_TO_BGR 0x20000000
+#define B2R2_VMX3_RGB_TO_BGR 0x00000000
+
+/* VMX register values for BGR to YUV color conversion */
+/* Note: All BGR -> YUV values are calculated by multiplying
+ * the RGB -> YUV matrices [A], with [S] to form [A]x[S] where
+ *     |0 0 1|
+ * S = |0 1 0|
+ *     |1 0 0|
+ * Essentially swapping first and third columns in
+ * the matrices (VMX0, VMX1 and VMX2 values).
+ * The offset vector VMX3 remains untouched.
+ * Put another way, the value of bits 0 through 9
+ * is swapped with the value of
+ * bits 20 through 31 in VMX0, VMX1 and VMX2,
+ * taking into consideration the compression
+ * that is used on bits 0 through 9. Bit 0 being LSB.
+ */
+
+/* 601 Full range conversion matrix */
+#define B2R2_VMX0_BGR_TO_YUV_601_FULL_RANGE 0xfd7e4883
+#define B2R2_VMX1_BGR_TO_YUV_601_FULL_RANGE 0x03a2584c
+#define B2R2_VMX2_BGR_TO_YUV_601_FULL_RANGE 0x107ea7d4
+#define B2R2_VMX3_BGR_TO_YUV_601_FULL_RANGE 0x08000080
+
+/* 601 Standard (clamped) conversion matrix */
+#define B2R2_VMX0_BGR_TO_YUV_601_STANDARD 0xfdde8870
+#define B2R2_VMX1_BGR_TO_YUV_601_STANDARD 0x03220442
+#define B2R2_VMX2_BGR_TO_YUV_601_STANDARD 0x0e3ed7da
+#define B2R2_VMX3_BGR_TO_YUV_601_STANDARD 0x08004080
+
+/* 709 Full range conversion matrix */
+#define B2R2_VMX0_BGR_TO_YUV_709_FULL_RANGE 0xfe9e2483
+#define B2R2_VMX1_BGR_TO_YUV_709_FULL_RANGE 0x0262dc37
+#define B2R2_VMX2_BGR_TO_YUV_709_FULL_RANGE 0x107e6fe2
+#define B2R2_VMX3_BGR_TO_YUV_709_FULL_RANGE 0x08000080
+
+/* 709 Standard (clamped) conversion matrix */
+#define B2R2_VMX0_BGR_TO_YUV_709_STANDARD 0xfebe6871
+#define B2R2_VMX1_BGR_TO_YUV_709_STANDARD 0x0202742f
+#define B2R2_VMX2_BGR_TO_YUV_709_STANDARD 0x0e3ea7e6
+#define B2R2_VMX3_BGR_TO_YUV_709_STANDARD 0x08004080
+
+
+/* VMX register values for YUV to BGR conversion */
+/*  Note: All YUV -> BGR values are constructed
+ * from the YUV -> RGB ones, by swapping
+ * first and third rows in the matrix
+ * (VMX0 and VMX2 values). Further, the first and
+ * third values in the offset vector need to be
+ * swapped as well, i.e. bits 0 through 9 are swapped
+ * with bits 20 through 29 in the VMX3 value.
+ * Bit 0 being LSB.
+ */
+
+/* 601 Full range conversion matrix */
+#define B2R2_VMX0_YUV_TO_BGR_601_FULL_RANGE (B2R2_VMX2_YUV_TO_RGB_601_FULL_RANGE)
+#define B2R2_VMX1_YUV_TO_BGR_601_FULL_RANGE (B2R2_VMX1_YUV_TO_RGB_601_FULL_RANGE)
+#define B2R2_VMX2_YUV_TO_BGR_601_FULL_RANGE (B2R2_VMX0_YUV_TO_RGB_601_FULL_RANGE)
+#define B2R2_VMX3_YUV_TO_BGR_601_FULL_RANGE 0x3222134f
+
+/* 601 Standard (clamped) conversion matrix */
+#define B2R2_VMX0_YUV_TO_BGR_601_STANDARD (B2R2_VMX2_YUV_TO_RGB_601_STANDARD)
+#define B2R2_VMX1_YUV_TO_BGR_601_STANDARD (B2R2_VMX1_YUV_TO_RGB_601_STANDARD)
+#define B2R2_VMX2_YUV_TO_BGR_601_STANDARD (B2R2_VMX0_YUV_TO_RGB_601_STANDARD)
+#define B2R2_VMX3_YUV_TO_BGR_601_STANDARD 0x2eb21f21
+
+/* 709 Full range conversion matrix */
+#define B2R2_VMX0_YUV_TO_BGR_709_FULL_RANGE (B2R2_VMX2_YUV_TO_RGB_709_FULL_RANGE)
+#define B2R2_VMX1_YUV_TO_BGR_709_FULL_RANGE (B2R2_VMX1_YUV_TO_RGB_709_FULL_RANGE)
+#define B2R2_VMX2_YUV_TO_BGR_709_FULL_RANGE (B2R2_VMX0_YUV_TO_RGB_709_FULL_RANGE)
+#define B2R2_VMX3_YUV_TO_BGR_709_FULL_RANGE 0x31814b3b
+
+/* 709 Standard (clamped) conversion matrix */
+#define B2R2_VMX0_YUV_TO_BGR_709_STANDARD (B2R2_VMX2_YUV_TO_RGB_709_STANDARD)
+#define B2R2_VMX1_YUV_TO_BGR_709_STANDARD (B2R2_VMX1_YUV_TO_RGB_709_STANDARD)
+#define B2R2_VMX2_YUV_TO_BGR_709_STANDARD (B2R2_VMX0_YUV_TO_RGB_709_STANDARD)
+#define B2R2_VMX3_YUV_TO_BGR_709_STANDARD 0x2df13307
+
+
+/* VMX register values for YVU to RGB conversion */
+
+/* 601 Full range conversion matrix */
+#define B2R2_VMX0_YVU_TO_RGB_601_FULL_RANGE 0x00040120
+#define B2R2_VMX1_YVU_TO_RGB_601_FULL_RANGE 0xF544034D
+#define B2R2_VMX2_YVU_TO_RGB_601_FULL_RANGE 0x37840000
+#define B2R2_VMX3_YVU_TO_RGB_601_FULL_RANGE (B2R2_VMX3_YUV_TO_RGB_601_FULL_RANGE)
+
+/* 601 Standard (clamped) conversion matrix */
+#define B2R2_VMX0_YVU_TO_RGB_601_STANDARD 0x0004A999
+#define B2R2_VMX1_YVU_TO_RGB_601_STANDARD 0xF384AB30
+#define B2R2_VMX2_YVU_TO_RGB_601_STANDARD 0x40A4A800
+#define B2R2_VMX3_YVU_TO_RGB_601_STANDARD (B2R2_VMX3_YUV_TO_RGB_601_STANDARD)
+
+/* VMX register values for RGB to YVU conversion */
+
+/* 601 Full range conversion matrix */
+#define B2R2_VMX0_RGB_TO_YVU_601_FULL_RANGE (B2R2_VMX2_RGB_TO_YUV_601_FULL_RANGE)
+#define B2R2_VMX1_RGB_TO_YVU_601_FULL_RANGE (B2R2_VMX1_RGB_TO_YUV_601_FULL_RANGE)
+#define B2R2_VMX2_RGB_TO_YVU_601_FULL_RANGE (B2R2_VMX0_RGB_TO_YUV_601_FULL_RANGE)
+#define B2R2_VMX3_RGB_TO_YVU_601_FULL_RANGE (B2R2_VMX3_RGB_TO_YUV_601_FULL_RANGE)
+
+/* 601 Standard (clamped) conversion matrix */
+#define B2R2_VMX0_RGB_TO_YVU_601_STANDARD (B2R2_VMX2_RGB_TO_YUV_601_STANDARD)
+#define B2R2_VMX1_RGB_TO_YVU_601_STANDARD (B2R2_VMX1_RGB_TO_YUV_601_STANDARD)
+#define B2R2_VMX2_RGB_TO_YVU_601_STANDARD (B2R2_VMX0_RGB_TO_YUV_601_STANDARD)
+#define B2R2_VMX3_RGB_TO_YVU_601_STANDARD (B2R2_VMX3_RGB_TO_YUV_601_STANDARD)
+
+/* VMX register values for YVU to BGR conversion */
+
+/* 601 Full range conversion matrix */
+#define B2R2_VMX0_YVU_TO_BGR_601_FULL_RANGE (B2R2_VMX2_YVU_TO_RGB_601_FULL_RANGE)
+#define B2R2_VMX1_YVU_TO_BGR_601_FULL_RANGE (B2R2_VMX1_YVU_TO_RGB_601_FULL_RANGE)
+#define B2R2_VMX2_YVU_TO_BGR_601_FULL_RANGE (B2R2_VMX0_YVU_TO_RGB_601_FULL_RANGE)
+#define B2R2_VMX3_YVU_TO_BGR_601_FULL_RANGE 0x3222134F
+
+/* 601 Standard (clamped) conversion matrix */
+#define B2R2_VMX0_YVU_TO_BGR_601_STANDARD (B2R2_VMX2_YVU_TO_RGB_601_STANDARD)
+#define B2R2_VMX1_YVU_TO_BGR_601_STANDARD (B2R2_VMX1_YVU_TO_RGB_601_STANDARD)
+#define B2R2_VMX2_YVU_TO_BGR_601_STANDARD (B2R2_VMX0_YVU_TO_RGB_601_STANDARD)
+#define B2R2_VMX3_YVU_TO_BGR_601_STANDARD 0x3222134F
+
+/* VMX register values for BGR to YVU conversion */
+
+/* 601 Full range conversion matrix */
+#define B2R2_VMX0_BGR_TO_YVU_601_FULL_RANGE (B2R2_VMX2_BGR_TO_YUV_601_FULL_RANGE)
+#define B2R2_VMX1_BGR_TO_YVU_601_FULL_RANGE (B2R2_VMX1_BGR_TO_YUV_601_FULL_RANGE)
+#define B2R2_VMX2_BGR_TO_YVU_601_FULL_RANGE (B2R2_VMX0_BGR_TO_YUV_601_FULL_RANGE)
+#define B2R2_VMX3_BGR_TO_YVU_601_FULL_RANGE (B2R2_VMX3_BGR_TO_YUV_601_FULL_RANGE)
+
+/* 601 Standard (clamped) conversion matrix */
+#define B2R2_VMX0_BGR_TO_YVU_601_STANDARD (B2R2_VMX2_BGR_TO_YUV_601_STANDARD)
+#define B2R2_VMX1_BGR_TO_YVU_601_STANDARD (B2R2_VMX1_BGR_TO_YUV_601_STANDARD)
+#define B2R2_VMX2_BGR_TO_YVU_601_STANDARD (B2R2_VMX0_BGR_TO_YUV_601_STANDARD)
+#define B2R2_VMX3_BGR_TO_YVU_601_STANDARD (B2R2_VMX3_BGR_TO_YUV_601_STANDARD)
+
+/* VMX register values for YVU to YUV conversion */
+
+/* 601 Video Matrix (standard 601 conversion) */
+/* Internally, the components are in fact stored
+ * with luma in the middle, i.e. UYV, which is why
+ * the values are just like for RGB->BGR conversion.
+ */
+#define B2R2_VMX0_YVU_TO_YUV 0x00000100
+#define B2R2_VMX1_YVU_TO_YUV 0x00040000
+#define B2R2_VMX2_YVU_TO_YUV 0x20000000
+#define B2R2_VMX3_YVU_TO_YUV 0x00000000
+
+/* VMX register values for RGB to BLT_YUV888 conversion */
+
+/*
+ * BLT_YUV888 has color components laid out in memory as V, U, Y, (Alpha)
+ * with V at the first byte (due to little endian addressing).
+ * B2R2 expects them to be as U, Y, V, (A)
+ * with U at the first byte.
+ * Note: RGB -> BLT_YUV888 values are calculated by multiplying
+ * the RGB -> YUV matrix [A], with [S] to form [S]x[A] where
+ *     |0 1 0|
+ * S = |0 0 1|
+ *     |1 0 0|
+ * Essentially changing the order of rows in the original
+ * matrix [A].
+ * row1 -> row3
+ * row2 -> row1
+ * row3 -> row2
+ * Values in the offset vector are swapped in the same manner.
+ */
+/* 601 Full range conversion matrix */
+#define B2R2_VMX0_RGB_TO_BLT_YUV888_601_FULL_RANGE (B2R2_VMX1_RGB_TO_YUV_601_FULL_RANGE)
+#define B2R2_VMX1_RGB_TO_BLT_YUV888_601_FULL_RANGE (B2R2_VMX2_RGB_TO_YUV_601_FULL_RANGE)
+#define B2R2_VMX2_RGB_TO_BLT_YUV888_601_FULL_RANGE (B2R2_VMX0_RGB_TO_YUV_601_FULL_RANGE)
+#define B2R2_VMX3_RGB_TO_BLT_YUV888_601_FULL_RANGE 0x00020080
+
+/* 601 Standard (clamped) conversion matrix */
+#define B2R2_VMX0_RGB_TO_BLT_YUV888_601_STANDARD (B2R2_VMX1_RGB_TO_YUV_601_STANDARD)
+#define B2R2_VMX1_RGB_TO_BLT_YUV888_601_STANDARD (B2R2_VMX2_RGB_TO_YUV_601_STANDARD)
+#define B2R2_VMX2_RGB_TO_BLT_YUV888_601_STANDARD (B2R2_VMX0_RGB_TO_YUV_601_STANDARD)
+#define B2R2_VMX3_RGB_TO_BLT_YUV888_601_STANDARD 0x00020080
+
+/* VMX register values for BLT_YUV888 to RGB conversion */
+
+/*
+ * Note: BLT_YUV888 -> RGB values are calculated by multiplying
+ * the YUV -> RGB matrix [A], with [S] to form [A]x[S] where
+ *     |0 0 1|
+ * S = |1 0 0|
+ *     |0 1 0|
+ * Essentially changing the order of columns in the original
+ * matrix [A].
+ * col1 -> col3
+ * col2 -> col1
+ * col3 -> col2
+ * Values in the offset vector remain unchanged.
+ */
+/* 601 Full range conversion matrix */
+#define B2R2_VMX0_BLT_YUV888_TO_RGB_601_FULL_RANGE 0x20000121
+#define B2R2_VMX1_BLT_YUV888_TO_RGB_601_FULL_RANGE 0x201ea74c
+#define B2R2_VMX2_BLT_YUV888_TO_RGB_601_FULL_RANGE 0x2006f000
+#define B2R2_VMX3_BLT_YUV888_TO_RGB_601_FULL_RANGE (B2R2_VMX3_YUV_TO_RGB_601_FULL_RANGE)
+
+/* 601 Standard (clamped) conversion matrix */
+#define B2R2_VMX0_BLT_YUV888_TO_RGB_601_STANDARD 0x25400133
+#define B2R2_VMX1_BLT_YUV888_TO_RGB_601_STANDARD 0x255E7330
+#define B2R2_VMX2_BLT_YUV888_TO_RGB_601_STANDARD 0x25481400
+#define B2R2_VMX3_BLT_YUV888_TO_RGB_601_STANDARD (B2R2_VMX3_YUV_TO_RGB_601_FULL_RANGE)
+
+/* VMX register values for YUV to BLT_YUV888 conversion */
+#define B2R2_VMX0_YUV_TO_BLT_YUV888 0x00040000
+#define B2R2_VMX1_YUV_TO_BLT_YUV888 0x00000100
+#define B2R2_VMX2_YUV_TO_BLT_YUV888 0x20000000
+#define B2R2_VMX3_YUV_TO_BLT_YUV888 0x00000000
+
+/* VMX register values for BLT_YUV888 to YUV conversion */
+#define B2R2_VMX0_BLT_YUV888_TO_YUV 0x00000100
+#define B2R2_VMX1_BLT_YUV888_TO_YUV 0x20000000
+#define B2R2_VMX2_BLT_YUV888_TO_YUV 0x00040000
+#define B2R2_VMX3_BLT_YUV888_TO_YUV 0x00000000
+
+/* VMX register values for YVU to BLT_YUV888 conversion */
+#define B2R2_VMX0_YVU_TO_BLT_YUV888 0x00040000
+#define B2R2_VMX1_YVU_TO_BLT_YUV888 0x20000000
+#define B2R2_VMX2_YVU_TO_BLT_YUV888 0x00000100
+#define B2R2_VMX3_YVU_TO_BLT_YUV888 0x00000000
+
+/* VMX register values for BLT_YUV888 to YVU conversion */
+#define B2R2_VMX0_BLT_YUV888_TO_YVU 0x00040000
+#define B2R2_VMX1_BLT_YUV888_TO_YVU 0x20000000
+#define B2R2_VMX2_BLT_YUV888_TO_YVU 0x00000100
+#define B2R2_VMX3_BLT_YUV888_TO_YVU 0x00000000
+
+/*
+ * Internal types
+ */
+
+/*
+ * Global variables
+ */
+
+ /**
+ * VMx values for color space conversion
+ * (component swap)
+ */
+static const u32 vmx_yuv_to_blt_yuv888[] = {
+	B2R2_VMX0_YUV_TO_BLT_YUV888,
+	B2R2_VMX1_YUV_TO_BLT_YUV888,
+	B2R2_VMX2_YUV_TO_BLT_YUV888,
+	B2R2_VMX3_YUV_TO_BLT_YUV888,
+};
+
+static const u32 vmx_blt_yuv888_to_yuv[] = {
+	B2R2_VMX0_BLT_YUV888_TO_YUV,
+	B2R2_VMX1_BLT_YUV888_TO_YUV,
+	B2R2_VMX2_BLT_YUV888_TO_YUV,
+	B2R2_VMX3_BLT_YUV888_TO_YUV,
+};
+
+static const u32 vmx_yvu_to_blt_yuv888[] = {
+	B2R2_VMX0_YVU_TO_BLT_YUV888,
+	B2R2_VMX1_YVU_TO_BLT_YUV888,
+	B2R2_VMX2_YVU_TO_BLT_YUV888,
+	B2R2_VMX3_YVU_TO_BLT_YUV888,
+};
+
+static const u32 vmx_blt_yuv888_to_yvu[] = {
+	B2R2_VMX0_BLT_YUV888_TO_YVU,
+	B2R2_VMX1_BLT_YUV888_TO_YVU,
+	B2R2_VMX2_BLT_YUV888_TO_YVU,
+	B2R2_VMX3_BLT_YUV888_TO_YVU,
+};
+
+static const u32 vmx_rgb_to_bgr[] = {
+	B2R2_VMX0_RGB_TO_BGR,
+	B2R2_VMX1_RGB_TO_BGR,
+	B2R2_VMX2_RGB_TO_BGR,
+	B2R2_VMX3_RGB_TO_BGR,
+};
+
+static const u32 vmx_yvu_to_yuv[] = {
+	B2R2_VMX0_YVU_TO_YUV,
+	B2R2_VMX1_YVU_TO_YUV,
+	B2R2_VMX2_YVU_TO_YUV,
+	B2R2_VMX3_YVU_TO_YUV,
+};
+
+/**
+ * VMx values for color space conversions
+ * (standard 601 conversions)
+ */
+static const u32 vmx_rgb_to_yuv[] = {
+	B2R2_VMX0_RGB_TO_YUV_601_STANDARD,
+	B2R2_VMX1_RGB_TO_YUV_601_STANDARD,
+	B2R2_VMX2_RGB_TO_YUV_601_STANDARD,
+	B2R2_VMX3_RGB_TO_YUV_601_STANDARD,
+};
+
+static const u32 vmx_yuv_to_rgb[] = {
+	B2R2_VMX0_YUV_TO_RGB_601_STANDARD,
+	B2R2_VMX1_YUV_TO_RGB_601_STANDARD,
+	B2R2_VMX2_YUV_TO_RGB_601_STANDARD,
+	B2R2_VMX3_YUV_TO_RGB_601_STANDARD,
+};
+
+static const u32 vmx_rgb_to_blt_yuv888[] = {
+	B2R2_VMX0_RGB_TO_BLT_YUV888_601_STANDARD,
+	B2R2_VMX1_RGB_TO_BLT_YUV888_601_STANDARD,
+	B2R2_VMX2_RGB_TO_BLT_YUV888_601_STANDARD,
+	B2R2_VMX3_RGB_TO_BLT_YUV888_601_STANDARD,
+};
+
+static const u32 vmx_blt_yuv888_to_rgb[] = {
+	B2R2_VMX0_BLT_YUV888_TO_RGB_601_STANDARD,
+	B2R2_VMX1_BLT_YUV888_TO_RGB_601_STANDARD,
+	B2R2_VMX2_BLT_YUV888_TO_RGB_601_STANDARD,
+	B2R2_VMX3_BLT_YUV888_TO_RGB_601_STANDARD,
+};
+
+static const u32 vmx_rgb_to_yvu[] = {
+	B2R2_VMX0_RGB_TO_YVU_601_STANDARD,
+	B2R2_VMX1_RGB_TO_YVU_601_STANDARD,
+	B2R2_VMX2_RGB_TO_YVU_601_STANDARD,
+	B2R2_VMX3_RGB_TO_YVU_601_STANDARD,
+};
+
+static const u32 vmx_yvu_to_rgb[] = {
+	B2R2_VMX0_YVU_TO_RGB_601_STANDARD,
+	B2R2_VMX1_YVU_TO_RGB_601_STANDARD,
+	B2R2_VMX2_YVU_TO_RGB_601_STANDARD,
+	B2R2_VMX3_YVU_TO_RGB_601_STANDARD,
+};
+
+static const u32 vmx_bgr_to_yuv[] = {
+	B2R2_VMX0_BGR_TO_YUV_601_STANDARD,
+	B2R2_VMX1_BGR_TO_YUV_601_STANDARD,
+	B2R2_VMX2_BGR_TO_YUV_601_STANDARD,
+	B2R2_VMX3_BGR_TO_YUV_601_STANDARD,
+};
+
+static const u32 vmx_yuv_to_bgr[] = {
+	B2R2_VMX0_YUV_TO_BGR_601_STANDARD,
+	B2R2_VMX1_YUV_TO_BGR_601_STANDARD,
+	B2R2_VMX2_YUV_TO_BGR_601_STANDARD,
+	B2R2_VMX3_YUV_TO_BGR_601_STANDARD,
+};
+
+static const u32 vmx_bgr_to_yvu[] = {
+	B2R2_VMX0_BGR_TO_YVU_601_STANDARD,
+	B2R2_VMX1_BGR_TO_YVU_601_STANDARD,
+	B2R2_VMX2_BGR_TO_YVU_601_STANDARD,
+	B2R2_VMX3_BGR_TO_YVU_601_STANDARD,
+};
+
+static const u32 vmx_yvu_to_bgr[] = {
+	B2R2_VMX0_YVU_TO_BGR_601_STANDARD,
+	B2R2_VMX1_YVU_TO_BGR_601_STANDARD,
+	B2R2_VMX2_YVU_TO_BGR_601_STANDARD,
+	B2R2_VMX3_YVU_TO_BGR_601_STANDARD,
+};
+
+/**
+ * VMx values for color space conversions
+ * (full range conversions)
+ */
+
+static const u32 vmx_full_rgb_to_yuv[] = {
+	B2R2_VMX0_RGB_TO_YUV_601_FULL_RANGE,
+	B2R2_VMX1_RGB_TO_YUV_601_FULL_RANGE,
+	B2R2_VMX2_RGB_TO_YUV_601_FULL_RANGE,
+	B2R2_VMX3_RGB_TO_YUV_601_FULL_RANGE,
+};
+
+static const u32 vmx_full_yuv_to_rgb[] = {
+	B2R2_VMX0_YUV_TO_RGB_601_FULL_RANGE,
+	B2R2_VMX1_YUV_TO_RGB_601_FULL_RANGE,
+	B2R2_VMX2_YUV_TO_RGB_601_FULL_RANGE,
+	B2R2_VMX3_YUV_TO_RGB_601_FULL_RANGE,
+};
+
+static const u32 vmx_full_rgb_to_blt_yuv888[] = {
+	B2R2_VMX0_RGB_TO_BLT_YUV888_601_FULL_RANGE,
+	B2R2_VMX1_RGB_TO_BLT_YUV888_601_FULL_RANGE,
+	B2R2_VMX2_RGB_TO_BLT_YUV888_601_FULL_RANGE,
+	B2R2_VMX3_RGB_TO_BLT_YUV888_601_FULL_RANGE,
+};
+
+static const u32 vmx_full_blt_yuv888_to_rgb[] = {
+	B2R2_VMX0_BLT_YUV888_TO_RGB_601_FULL_RANGE,
+	B2R2_VMX1_BLT_YUV888_TO_RGB_601_FULL_RANGE,
+	B2R2_VMX2_BLT_YUV888_TO_RGB_601_FULL_RANGE,
+	B2R2_VMX3_BLT_YUV888_TO_RGB_601_FULL_RANGE,
+};
+
+static const u32 vmx_full_yvu_to_rgb[] = {
+	B2R2_VMX0_YVU_TO_RGB_601_FULL_RANGE,
+	B2R2_VMX1_YVU_TO_RGB_601_FULL_RANGE,
+	B2R2_VMX2_YVU_TO_RGB_601_FULL_RANGE,
+	B2R2_VMX3_YVU_TO_RGB_601_FULL_RANGE,
+};
+
+static const u32 vmx_full_rgb_to_yvu[] = {
+	B2R2_VMX0_RGB_TO_YVU_601_FULL_RANGE,
+	B2R2_VMX1_RGB_TO_YVU_601_FULL_RANGE,
+	B2R2_VMX2_RGB_TO_YVU_601_FULL_RANGE,
+	B2R2_VMX3_RGB_TO_YVU_601_FULL_RANGE,
+};
+
+static const u32 vmx_full_bgr_to_yuv[] = {
+	B2R2_VMX0_BGR_TO_YUV_601_FULL_RANGE,
+	B2R2_VMX1_BGR_TO_YUV_601_FULL_RANGE,
+	B2R2_VMX2_BGR_TO_YUV_601_FULL_RANGE,
+	B2R2_VMX3_BGR_TO_YUV_601_FULL_RANGE,
+};
+
+static const u32 vmx_full_yuv_to_bgr[] = {
+	B2R2_VMX0_YUV_TO_BGR_601_FULL_RANGE,
+	B2R2_VMX1_YUV_TO_BGR_601_FULL_RANGE,
+	B2R2_VMX2_YUV_TO_BGR_601_FULL_RANGE,
+	B2R2_VMX3_YUV_TO_BGR_601_FULL_RANGE,
+};
+
+static const u32 vmx_full_bgr_to_yvu[] = {
+	B2R2_VMX0_BGR_TO_YVU_601_FULL_RANGE,
+	B2R2_VMX1_BGR_TO_YVU_601_FULL_RANGE,
+	B2R2_VMX2_BGR_TO_YVU_601_FULL_RANGE,
+	B2R2_VMX3_BGR_TO_YVU_601_FULL_RANGE,
+};
+
+static const u32 vmx_full_yvu_to_bgr[] = {
+	B2R2_VMX0_YVU_TO_BGR_601_FULL_RANGE,
+	B2R2_VMX1_YVU_TO_BGR_601_FULL_RANGE,
+	B2R2_VMX2_YVU_TO_BGR_601_FULL_RANGE,
+	B2R2_VMX3_YVU_TO_BGR_601_FULL_RANGE,
+};
+
+/*
+ * Forward declaration of private functions
+ */
+
+/*
+ * Public functions
+ */
+
+/**
+ * Setup input versatile matrix for color space conversion
+ */
+int b2r2_setup_ivmx(struct b2r2_node *node, enum b2r2_color_conversion cc)
+{
+	const u32 *vmx = NULL;
+
+	if (b2r2_get_vmx(cc, &vmx) < 0 || vmx == NULL)
+		return -1;
+
+	node->node.GROUP0.B2R2_INS |= B2R2_INS_IVMX_ENABLED;
+	node->node.GROUP0.B2R2_CIC |= B2R2_CIC_IVMX;
+
+	node->node.GROUP15.B2R2_VMX0 = vmx[0];
+	node->node.GROUP15.B2R2_VMX1 = vmx[1];
+	node->node.GROUP15.B2R2_VMX2 = vmx[2];
+	node->node.GROUP15.B2R2_VMX3 = vmx[3];
+
+	return 0;
+}
+
+/**
+ * Setup output versatile matrix for color space conversion
+ */
+int b2r2_setup_ovmx(struct b2r2_node *node, enum b2r2_color_conversion cc)
+{
+	const u32 *vmx = NULL;
+
+	if (b2r2_get_vmx(cc, &vmx) < 0 || vmx == NULL)
+		return -1;
+
+	node->node.GROUP0.B2R2_INS |= B2R2_INS_OVMX_ENABLED;
+	node->node.GROUP0.B2R2_CIC |= B2R2_CIC_OVMX;
+
+	node->node.GROUP16.B2R2_VMX0 = vmx[0];
+	node->node.GROUP16.B2R2_VMX1 = vmx[1];
+	node->node.GROUP16.B2R2_VMX2 = vmx[2];
+	node->node.GROUP16.B2R2_VMX3 = vmx[3];
+
+	return 0;
+}
+
+enum b2r2_color_conversion b2r2_get_color_conversion(enum b2r2_blt_fmt src_fmt,
+		enum b2r2_blt_fmt dst_fmt, bool fullrange)
+{
+	if (b2r2_is_rgb_fmt(src_fmt)) {
+		if (b2r2_is_yvu_fmt(dst_fmt))
+			return fullrange ? B2R2_CC_RGB_TO_YVU_FULL :
+				B2R2_CC_RGB_TO_YVU;
+		else if (dst_fmt == B2R2_BLT_FMT_24_BIT_YUV888 ||
+				dst_fmt == B2R2_BLT_FMT_32_BIT_AYUV8888 ||
+				dst_fmt == B2R2_BLT_FMT_24_BIT_VUY888 ||
+				dst_fmt == B2R2_BLT_FMT_32_BIT_VUYA8888)
+			/*
+			 * (A)YUV/VUY(A) formats differ only in component
+			 * order. This is handled by the endianness bit
+			 * in B2R2_STY/TTY registers when src/target are set.
+			 */
+			return fullrange ? B2R2_CC_RGB_TO_BLT_YUV888_FULL :
+				B2R2_CC_RGB_TO_BLT_YUV888;
+		else if (b2r2_is_yuv_fmt(dst_fmt))
+			return fullrange ? B2R2_CC_RGB_TO_YUV_FULL :
+				B2R2_CC_RGB_TO_YUV;
+		else if (b2r2_is_bgr_fmt(dst_fmt))
+			return B2R2_CC_RGB_TO_BGR;
+	} else if (b2r2_is_yvu_fmt(src_fmt)) {
+		if (b2r2_is_rgb_fmt(dst_fmt))
+			return fullrange ? B2R2_CC_YVU_FULL_TO_RGB :
+				B2R2_CC_YVU_TO_RGB;
+		else if (b2r2_is_bgr_fmt(dst_fmt))
+			return fullrange ? B2R2_CC_YVU_FULL_TO_BGR :
+				B2R2_CC_YVU_TO_BGR;
+		else if (dst_fmt == B2R2_BLT_FMT_24_BIT_YUV888 ||
+				dst_fmt == B2R2_BLT_FMT_32_BIT_AYUV8888 ||
+				dst_fmt == B2R2_BLT_FMT_24_BIT_VUY888 ||
+				dst_fmt == B2R2_BLT_FMT_32_BIT_VUYA8888)
+			return B2R2_CC_YVU_TO_BLT_YUV888;
+		else if (b2r2_is_yuv_fmt(dst_fmt) &&
+				!b2r2_is_yvu_fmt(dst_fmt))
+			return B2R2_CC_YVU_TO_YUV;
+	} else if (src_fmt == B2R2_BLT_FMT_24_BIT_YUV888 ||
+			src_fmt == B2R2_BLT_FMT_32_BIT_AYUV8888 ||
+			src_fmt == B2R2_BLT_FMT_24_BIT_VUY888 ||
+			src_fmt == B2R2_BLT_FMT_32_BIT_VUYA8888) {
+		/*
+		 * (A)YUV/VUY(A) formats differ only in component
+		 * order. This is handled by the endianness bit
+		 * in B2R2_STY/TTY registers when src/target are set.
+		 */
+		if (b2r2_is_rgb_fmt(dst_fmt))
+			return fullrange ? B2R2_CC_BLT_YUV888_FULL_TO_RGB :
+				B2R2_CC_BLT_YUV888_TO_RGB;
+		else if (b2r2_is_yvu_fmt(dst_fmt))
+			return B2R2_CC_BLT_YUV888_TO_YVU;
+		else if (b2r2_is_yuv_fmt(dst_fmt)) {
+			switch (dst_fmt) {
+			case B2R2_BLT_FMT_24_BIT_YUV888:
+			case B2R2_BLT_FMT_32_BIT_AYUV8888:
+			case B2R2_BLT_FMT_24_BIT_VUY888:
+			case B2R2_BLT_FMT_32_BIT_VUYA8888:
+				return B2R2_CC_NOTHING;
+			default:
+				return B2R2_CC_BLT_YUV888_TO_YUV;
+			}
+		}
+	} else if (b2r2_is_yuv_fmt(src_fmt)) {
+		if (b2r2_is_rgb_fmt(dst_fmt))
+			return fullrange ? B2R2_CC_YUV_FULL_TO_RGB :
+				B2R2_CC_YUV_TO_RGB;
+		else if (b2r2_is_bgr_fmt(dst_fmt))
+			return fullrange ? B2R2_CC_YUV_FULL_TO_BGR :
+				B2R2_CC_YUV_TO_BGR;
+		else if (dst_fmt == B2R2_BLT_FMT_24_BIT_YUV888 ||
+				dst_fmt == B2R2_BLT_FMT_32_BIT_AYUV8888 ||
+				dst_fmt == B2R2_BLT_FMT_24_BIT_VUY888 ||
+				dst_fmt == B2R2_BLT_FMT_32_BIT_VUYA8888)
+			return B2R2_CC_YUV_TO_BLT_YUV888;
+		else if (b2r2_is_yvu_fmt(dst_fmt))
+			return B2R2_CC_YVU_TO_YUV;
+	} else if (b2r2_is_bgr_fmt(src_fmt)) {
+		if (b2r2_is_rgb_fmt(dst_fmt))
+			return B2R2_CC_RGB_TO_BGR;
+		else if (b2r2_is_yvu_fmt(dst_fmt))
+			return fullrange ? B2R2_CC_BGR_TO_YVU_FULL :
+				B2R2_CC_BGR_TO_YVU;
+		else if (dst_fmt == B2R2_BLT_FMT_24_BIT_YUV888 ||
+				dst_fmt == B2R2_BLT_FMT_32_BIT_AYUV8888 ||
+				dst_fmt == B2R2_BLT_FMT_24_BIT_VUY888 ||
+				dst_fmt == B2R2_BLT_FMT_32_BIT_VUYA8888)
+			BUG_ON(1);
+		else if (b2r2_is_yuv_fmt(dst_fmt))
+			return fullrange ? B2R2_CC_BGR_TO_YUV_FULL :
+				B2R2_CC_BGR_TO_YUV;
+	}
+
+	return B2R2_CC_NOTHING;
+}
+
+int b2r2_get_vmx(enum b2r2_color_conversion cc, const u32 **vmx)
+{
+	if (vmx == NULL)
+		return -1;
+
+	switch (cc) {
+	case B2R2_CC_RGB_TO_BGR:
+		*vmx = &vmx_rgb_to_bgr[0];
+		break;
+	case B2R2_CC_BLT_YUV888_TO_YVU:
+		*vmx = &vmx_blt_yuv888_to_yvu[0];
+		break;
+	case B2R2_CC_BLT_YUV888_TO_YUV:
+		*vmx = &vmx_blt_yuv888_to_yuv[0];
+		break;
+	case B2R2_CC_YVU_TO_YUV:
+		*vmx = &vmx_yvu_to_yuv[0];
+		break;
+	case B2R2_CC_YVU_TO_BLT_YUV888:
+		*vmx = &vmx_yvu_to_blt_yuv888[0];
+		break;
+	case B2R2_CC_YUV_TO_BLT_YUV888:
+		*vmx = &vmx_yuv_to_blt_yuv888[0];
+		break;
+	case B2R2_CC_RGB_TO_YUV:
+		*vmx = &vmx_rgb_to_yuv[0];
+		break;
+	case B2R2_CC_RGB_TO_YUV_FULL:
+		*vmx = &vmx_full_rgb_to_yuv[0];
+		break;
+	case B2R2_CC_RGB_TO_YVU:
+		*vmx = &vmx_rgb_to_yvu[0];
+		break;
+	case B2R2_CC_RGB_TO_YVU_FULL:
+		*vmx = &vmx_full_rgb_to_yvu[0];
+		break;
+	case B2R2_CC_RGB_TO_BLT_YUV888:
+		*vmx = &vmx_rgb_to_blt_yuv888[0];
+		break;
+	case B2R2_CC_RGB_TO_BLT_YUV888_FULL:
+		*vmx = &vmx_full_rgb_to_blt_yuv888[0];
+		break;
+	case B2R2_CC_BGR_TO_YVU:
+		*vmx = &vmx_bgr_to_yvu[0];
+		break;
+	case B2R2_CC_BGR_TO_YVU_FULL:
+		*vmx = &vmx_full_bgr_to_yvu[0];
+		break;
+	case B2R2_CC_BGR_TO_YUV:
+		*vmx = &vmx_bgr_to_yuv[0];
+		break;
+	case B2R2_CC_BGR_TO_YUV_FULL:
+		*vmx = &vmx_full_bgr_to_yuv[0];
+		break;
+	case B2R2_CC_YUV_TO_RGB:
+		*vmx = &vmx_yuv_to_rgb[0];
+		break;
+	case B2R2_CC_YUV_FULL_TO_RGB:
+		*vmx = &vmx_full_yuv_to_rgb[0];
+		break;
+	case B2R2_CC_YUV_TO_BGR:
+		*vmx = &vmx_yuv_to_bgr[0];
+		break;
+	case B2R2_CC_YUV_FULL_TO_BGR:
+		*vmx = &vmx_full_yuv_to_bgr[0];
+		break;
+	case B2R2_CC_YVU_TO_RGB:
+		*vmx = &vmx_yvu_to_rgb[0];
+		break;
+	case B2R2_CC_YVU_FULL_TO_RGB:
+		*vmx = &vmx_full_yvu_to_rgb[0];
+		break;
+	case B2R2_CC_YVU_TO_BGR:
+		*vmx = &vmx_yvu_to_bgr[0];
+		break;
+	case B2R2_CC_YVU_FULL_TO_BGR:
+		*vmx = &vmx_full_yvu_to_bgr[0];
+		break;
+	case B2R2_CC_BLT_YUV888_TO_RGB:
+		*vmx = &vmx_blt_yuv888_to_rgb[0];
+		break;
+	case B2R2_CC_BLT_YUV888_FULL_TO_RGB:
+		*vmx = &vmx_full_blt_yuv888_to_rgb[0];
+		break;
+	case B2R2_CC_NOTHING:
+	default:
+		break;
+	}
+
+	return 0;
+}
+
+
diff --git a/drivers/video/b2r2/b2r2_hw_convert.h b/drivers/video/b2r2/b2r2_hw_convert.h
new file mode 100644
index 00000000000..e173e898e44
--- /dev/null
+++ b/drivers/video/b2r2/b2r2_hw_convert.h
@@ -0,0 +1,53 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2012
+ *
+ * ST-Ericsson B2R2 hw color conversion definitions
+ *
+ * Author: Jorgen Nilsson <jorgen.nilsson@stericsson.com>
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+
+#ifndef B2R2_HW_CONVERT_H__
+#define B2R2_HW_CONVERT_H__
+
+#include "b2r2_internal.h"
+
+enum b2r2_color_conversion {
+	B2R2_CC_NOTHING = 0,
+	B2R2_CC_RGB_TO_BGR,
+	B2R2_CC_BLT_YUV888_TO_YVU,
+	B2R2_CC_BLT_YUV888_TO_YUV,
+	B2R2_CC_YUV_TO_BLT_YUV888,
+	B2R2_CC_YVU_TO_YUV,
+	B2R2_CC_YVU_TO_BLT_YUV888,
+	B2R2_CC_RGB_TO_YUV,
+	B2R2_CC_RGB_TO_YUV_FULL,
+	B2R2_CC_RGB_TO_YVU,
+	B2R2_CC_RGB_TO_YVU_FULL,
+	B2R2_CC_RGB_TO_BLT_YUV888,
+	B2R2_CC_RGB_TO_BLT_YUV888_FULL,
+	B2R2_CC_BGR_TO_YVU,
+	B2R2_CC_BGR_TO_YVU_FULL,
+	B2R2_CC_BGR_TO_YUV,
+	B2R2_CC_BGR_TO_YUV_FULL,
+	B2R2_CC_YUV_TO_RGB,
+	B2R2_CC_YUV_FULL_TO_RGB,
+	B2R2_CC_YUV_TO_BGR,
+	B2R2_CC_YUV_FULL_TO_BGR,
+	B2R2_CC_YVU_TO_RGB,
+	B2R2_CC_YVU_FULL_TO_RGB,
+	B2R2_CC_YVU_TO_BGR,
+	B2R2_CC_YVU_FULL_TO_BGR,
+	B2R2_CC_BLT_YUV888_TO_RGB,
+	B2R2_CC_BLT_YUV888_FULL_TO_RGB,
+};
+
+int b2r2_setup_ivmx(struct b2r2_node *node, enum b2r2_color_conversion cc);
+int b2r2_setup_ovmx(struct b2r2_node *node, enum b2r2_color_conversion cc);
+enum b2r2_color_conversion b2r2_get_color_conversion(enum b2r2_blt_fmt src_fmt,
+		enum b2r2_blt_fmt dst_fmt, bool fullrange);
+int b2r2_get_vmx(enum b2r2_color_conversion cc, const u32 **vmx);
+
+#endif /* B2R2_HW_CONVERT_H__ */
diff --git a/drivers/video/b2r2/b2r2_internal.h b/drivers/video/b2r2/b2r2_internal.h
index 7a46bbda19e..c46e814df14 100644
--- a/drivers/video/b2r2/b2r2_internal.h
+++ b/drivers/video/b2r2/b2r2_internal.h
@@ -264,6 +264,8 @@ struct b2r2_node_split_buf {
  * @ivmx          - the ivmx matrix to use for color conversion
  * @blend         - determines if blending is enabled
  * @clip          - determines if destination clipping is enabled
+ * @rotation      - determines if rotation is requested
+ * @fullrange     - determines YUV<->RGB conversion matrix (iVMx)
  * @swap_fg_bg    - determines if FG and BG should be swapped when blending
  * @flags         - the flags passed in the blt request
  * @flag_param    - parameter required by certain flags,
@@ -294,6 +296,7 @@ struct b2r2_node_split_job {
 	bool blend;
 	bool clip;
 	bool rotation;
+	bool fullrange;
 
 	bool swap_fg_bg;
 
diff --git a/drivers/video/b2r2/b2r2_node_split.c b/drivers/video/b2r2/b2r2_node_split.c
index 6587ef0c343..d773865223b 100644
--- a/drivers/video/b2r2/b2r2_node_split.c
+++ b/drivers/video/b2r2/b2r2_node_split.c
@@ -12,7 +12,7 @@
 #include "b2r2_debug.h"
 #include "b2r2_node_split.h"
 #include "b2r2_internal.h"
-#include "b2r2_hw.h"
+#include "b2r2_hw_convert.h"
 #include "b2r2_filters.h"
 #include "b2r2_utils.h"
 
@@ -37,120 +37,6 @@
  * Global variables
  */
 
-/**
- * VMX values for different color space conversions
- */
-static const u32 vmx_rgb_to_yuv[] = {
-	B2R2_VMX0_RGB_TO_YUV_601_VIDEO,
-	B2R2_VMX1_RGB_TO_YUV_601_VIDEO,
-	B2R2_VMX2_RGB_TO_YUV_601_VIDEO,
-	B2R2_VMX3_RGB_TO_YUV_601_VIDEO,
-};
-
-static const u32 vmx_rgb_to_blt_yuv888[] = {
-	B2R2_VMX0_RGB_TO_BLT_YUV888_601_VIDEO,
-	B2R2_VMX1_RGB_TO_BLT_YUV888_601_VIDEO,
-	B2R2_VMX2_RGB_TO_BLT_YUV888_601_VIDEO,
-	B2R2_VMX3_RGB_TO_BLT_YUV888_601_VIDEO,
-};
-
-static const u32 vmx_yuv_to_rgb[] = {
-	B2R2_VMX0_YUV_TO_RGB_601_VIDEO,
-	B2R2_VMX1_YUV_TO_RGB_601_VIDEO,
-	B2R2_VMX2_YUV_TO_RGB_601_VIDEO,
-	B2R2_VMX3_YUV_TO_RGB_601_VIDEO,
-};
-
-static const u32 vmx_blt_yuv888_to_rgb[] = {
-	B2R2_VMX0_BLT_YUV888_TO_RGB_601_VIDEO,
-	B2R2_VMX1_BLT_YUV888_TO_RGB_601_VIDEO,
-	B2R2_VMX2_BLT_YUV888_TO_RGB_601_VIDEO,
-	B2R2_VMX3_BLT_YUV888_TO_RGB_601_VIDEO,
-};
-
-static const u32 vmx_yuv_to_blt_yuv888[] = {
-	B2R2_VMX0_YUV_TO_BLT_YUV888,
-	B2R2_VMX1_YUV_TO_BLT_YUV888,
-	B2R2_VMX2_YUV_TO_BLT_YUV888,
-	B2R2_VMX3_YUV_TO_BLT_YUV888,
-};
-
-static const u32 vmx_blt_yuv888_to_yuv[] = {
-	B2R2_VMX0_BLT_YUV888_TO_YUV,
-	B2R2_VMX1_BLT_YUV888_TO_YUV,
-	B2R2_VMX2_BLT_YUV888_TO_YUV,
-	B2R2_VMX3_BLT_YUV888_TO_YUV,
-};
-
-static const u32 vmx_yvu_to_blt_yuv888[] = {
-	B2R2_VMX0_YVU_TO_BLT_YUV888,
-	B2R2_VMX1_YVU_TO_BLT_YUV888,
-	B2R2_VMX2_YVU_TO_BLT_YUV888,
-	B2R2_VMX3_YVU_TO_BLT_YUV888,
-};
-
-static const u32 vmx_blt_yuv888_to_yvu[] = {
-	B2R2_VMX0_BLT_YUV888_TO_YVU,
-	B2R2_VMX1_BLT_YUV888_TO_YVU,
-	B2R2_VMX2_BLT_YUV888_TO_YVU,
-	B2R2_VMX3_BLT_YUV888_TO_YVU,
-};
-
-static const u32 vmx_yvu_to_rgb[] = {
-	B2R2_VMX0_YVU_TO_RGB_601_VIDEO,
-	B2R2_VMX1_YVU_TO_RGB_601_VIDEO,
-	B2R2_VMX2_YVU_TO_RGB_601_VIDEO,
-	B2R2_VMX3_YVU_TO_RGB_601_VIDEO,
-};
-
-static const u32 vmx_rgb_to_yvu[] = {
-	B2R2_VMX0_RGB_TO_YVU_601_VIDEO,
-	B2R2_VMX1_RGB_TO_YVU_601_VIDEO,
-	B2R2_VMX2_RGB_TO_YVU_601_VIDEO,
-	B2R2_VMX3_RGB_TO_YVU_601_VIDEO,
-};
-
-static const u32 vmx_rgb_to_bgr[] = {
-	B2R2_VMX0_RGB_TO_BGR,
-	B2R2_VMX1_RGB_TO_BGR,
-	B2R2_VMX2_RGB_TO_BGR,
-	B2R2_VMX3_RGB_TO_BGR,
-};
-
-static const u32 vmx_bgr_to_yuv[] = {
-	B2R2_VMX0_BGR_TO_YUV_601_VIDEO,
-	B2R2_VMX1_BGR_TO_YUV_601_VIDEO,
-	B2R2_VMX2_BGR_TO_YUV_601_VIDEO,
-	B2R2_VMX3_BGR_TO_YUV_601_VIDEO,
-};
-
-static const u32 vmx_yuv_to_bgr[] = {
-	B2R2_VMX0_YUV_TO_BGR_601_VIDEO,
-	B2R2_VMX1_YUV_TO_BGR_601_VIDEO,
-	B2R2_VMX2_YUV_TO_BGR_601_VIDEO,
-	B2R2_VMX3_YUV_TO_BGR_601_VIDEO,
-};
-
-static const u32 vmx_bgr_to_yvu[] = {
-	B2R2_VMX0_BGR_TO_YVU_601_VIDEO,
-	B2R2_VMX1_BGR_TO_YVU_601_VIDEO,
-	B2R2_VMX2_BGR_TO_YVU_601_VIDEO,
-	B2R2_VMX3_BGR_TO_YVU_601_VIDEO,
-};
-
-static const u32 vmx_yvu_to_bgr[] = {
-	B2R2_VMX0_YVU_TO_BGR_601_VIDEO,
-	B2R2_VMX1_YVU_TO_BGR_601_VIDEO,
-	B2R2_VMX2_YVU_TO_BGR_601_VIDEO,
-	B2R2_VMX3_YVU_TO_BGR_601_VIDEO,
-};
-
-static const u32 vmx_yvu_to_yuv[] = {
-	B2R2_VMX0_YVU_TO_YUV_601_VIDEO,
-	B2R2_VMX1_YVU_TO_YUV_601_VIDEO,
-	B2R2_VMX2_YVU_TO_YUV_601_VIDEO,
-	B2R2_VMX3_YVU_TO_YUV_601_VIDEO,
-};
 
 /*
  * Forward declaration of private functions
@@ -158,7 +44,8 @@ static const u32 vmx_yvu_to_yuv[] = {
 static int analyze_fmt_conv(struct b2r2_control *cont,
 		struct b2r2_node_split_buf *src,
 		struct b2r2_node_split_buf *dst,
-		const u32 **vmx, u32 *node_count);
+		const u32 **vmx, u32 *node_count,
+		bool fullrange);
 static int analyze_color_fill(struct b2r2_node_split_job *this,
 		const struct b2r2_blt_request *req, u32 *node_count);
 static int analyze_copy(struct b2r2_node_split_job *this,
@@ -239,26 +126,6 @@ static int setup_tmp_buf(struct b2r2_control *cont,
 		struct b2r2_node_split_buf *this, u32 max_size,
 		enum b2r2_blt_fmt pref_fmt, u32 pref_width, u32 pref_height);
 
-static enum b2r2_ty get_alpha_range(enum b2r2_blt_fmt fmt);
-static u32 set_alpha(enum b2r2_blt_fmt fmt, u8 alpha, u32 color);
-static u8  get_alpha(enum b2r2_blt_fmt fmt, u32 pixel);
-static bool fmt_has_alpha(enum b2r2_blt_fmt fmt);
-
-static bool is_rgb_fmt(enum b2r2_blt_fmt fmt);
-static bool is_bgr_fmt(enum b2r2_blt_fmt fmt);
-static bool is_yuv_fmt(enum b2r2_blt_fmt fmt);
-static bool is_yvu_fmt(enum b2r2_blt_fmt fmt);
-static bool is_yuv420_fmt(enum b2r2_blt_fmt fmt);
-static bool is_yuv422_fmt(enum b2r2_blt_fmt fmt);
-static bool is_yuv444_fmt(enum b2r2_blt_fmt fmt);
-static bool is_yvu420_fmt(enum b2r2_blt_fmt fmt);
-static bool is_yvu422_fmt(enum b2r2_blt_fmt fmt);
-
-static int fmt_byte_pitch(enum b2r2_blt_fmt fmt, u32 width);
-static enum b2r2_native_fmt to_native_fmt(enum b2r2_blt_fmt fmt);
-static u32 to_RGB888(u32 color, const enum b2r2_blt_fmt fmt);
-static enum b2r2_fmt_type get_fmt_type(enum b2r2_blt_fmt fmt);
-
 static bool is_transform(const struct b2r2_blt_request *req);
 static s32 rescale(struct b2r2_control *cont, s32 dim, u16 sf);
 static s32 inv_rescale(s32 dim, u16 sf);
@@ -318,7 +185,7 @@ int b2r2_node_split_analyze(const struct b2r2_blt_request *req,
 	case B2R2_BLT_FMT_32_BIT_AYUV8888:
 	case B2R2_BLT_FMT_24_BIT_VUY888:
 	case B2R2_BLT_FMT_32_BIT_VUYA8888:
-		if (is_bgr_fmt(req->user_req.dst_img.fmt)) {
+		if (b2r2_is_bgr_fmt(req->user_req.dst_img.fmt)) {
 			ret = -ENOSYS;
 			goto unsupported;
 		}
@@ -333,7 +200,7 @@ int b2r2_node_split_analyze(const struct b2r2_blt_request *req,
 	case B2R2_BLT_FMT_32_BIT_AYUV8888:
 	case B2R2_BLT_FMT_24_BIT_VUY888:
 	case B2R2_BLT_FMT_32_BIT_VUYA8888:
-		if (is_bgr_fmt(req->user_req.src_img.fmt)) {
+		if (b2r2_is_bgr_fmt(req->user_req.src_img.fmt)) {
 			ret = -ENOSYS;
 			goto unsupported;
 		}
@@ -359,7 +226,7 @@ int b2r2_node_split_analyze(const struct b2r2_blt_request *req,
 		}
 
 	if ((this->flags & B2R2_BLT_FLAG_SOURCE_COLOR_KEY) &&
-			(is_yuv_fmt(req->user_req.src_img.fmt) ||
+			(b2r2_is_yuv_fmt(req->user_req.src_img.fmt) ||
 			req->user_req.src_img.fmt == B2R2_BLT_FMT_1_BIT_A1 ||
 			req->user_req.src_img.fmt == B2R2_BLT_FMT_8_BIT_A8)) {
 		b2r2_log_warn(cont->dev, "%s: Unsupported: source color keying "
@@ -430,11 +297,15 @@ int b2r2_node_split_analyze(const struct b2r2_blt_request *req,
 			(this->global_alpha != 255))
 		this->blend = true;
 	else if (this->flags & B2R2_BLT_FLAG_PER_PIXEL_ALPHA_BLEND)
-		this->blend = (color_fill && fmt_has_alpha(this->dst.fmt)) ||
-				fmt_has_alpha(this->src.fmt);
+		this->blend = (color_fill && b2r2_fmt_has_alpha(this->dst.fmt)) ||
+				b2r2_fmt_has_alpha(this->src.fmt);
 	else if (this->flags & B2R2_BLT_FLAG_BG_BLEND)
 		this->blend = true;
 
+	/* Check for full range YUV conversion */
+	if (this->flags & B2R2_BLT_FLAG_FULL_RANGE_YUV)
+		this->fullrange = true;
+
 	if (this->blend && this->src.type == B2R2_FMT_TYPE_PLANAR) {
 		b2r2_log_warn(cont->dev, "%s: Unsupported: blend with planar"
 			" source\n", __func__);
@@ -511,9 +382,9 @@ int b2r2_node_split_analyze(const struct b2r2_blt_request *req,
 		 *       likely a bug in the hardware.
 		 */
 		upsample = this->src.type != B2R2_FMT_TYPE_RASTER &&
-			is_yuv_fmt(this->src.fmt);
+			b2r2_is_yuv_fmt(this->src.fmt);
 		downsample = this->dst.type != B2R2_FMT_TYPE_RASTER &&
-			is_yuv_fmt(this->dst.fmt);
+			b2r2_is_yuv_fmt(this->dst.fmt);
 
 		if (is_transform(req) || upsample || downsample)
 			ret = analyze_transform(this, req, &this->node_count,
@@ -798,40 +669,40 @@ error:
 static bool bg_format_require_ivmx(enum b2r2_blt_fmt bg_fmt,
 				enum b2r2_blt_fmt dst_fmt)
 {
-	if (is_rgb_fmt(bg_fmt)) {
-		if (is_yvu_fmt(dst_fmt))
+	if (b2r2_is_rgb_fmt(bg_fmt)) {
+		if (b2r2_is_yvu_fmt(dst_fmt))
 			return true;
 		else if (dst_fmt == B2R2_BLT_FMT_24_BIT_YUV888 ||
 				dst_fmt == B2R2_BLT_FMT_32_BIT_AYUV8888 ||
 				dst_fmt == B2R2_BLT_FMT_24_BIT_VUY888 ||
 				dst_fmt == B2R2_BLT_FMT_32_BIT_VUYA8888)
 			return true;
-		else if (is_yuv_fmt(dst_fmt))
+		else if (b2r2_is_yuv_fmt(dst_fmt))
 			return true;
-		else if (is_bgr_fmt(dst_fmt))
+		else if (b2r2_is_bgr_fmt(dst_fmt))
 			return true;
-	} else if (is_yvu_fmt(bg_fmt)) {
-		if (is_rgb_fmt(dst_fmt))
+	} else if (b2r2_is_yvu_fmt(bg_fmt)) {
+		if (b2r2_is_rgb_fmt(dst_fmt))
 			return true;
-		else if (is_bgr_fmt(dst_fmt))
+		else if (b2r2_is_bgr_fmt(dst_fmt))
 			return true;
 		else if (dst_fmt == B2R2_BLT_FMT_24_BIT_YUV888 ||
 				dst_fmt == B2R2_BLT_FMT_32_BIT_AYUV8888 ||
 				dst_fmt == B2R2_BLT_FMT_24_BIT_VUY888 ||
 				dst_fmt == B2R2_BLT_FMT_32_BIT_VUYA8888)
 			return true;
-		else if (is_yuv_fmt(dst_fmt) &&
-				!is_yvu_fmt(dst_fmt))
+		else if (b2r2_is_yuv_fmt(dst_fmt) &&
+				!b2r2_is_yvu_fmt(dst_fmt))
 			return true;
 	} else if (bg_fmt == B2R2_BLT_FMT_24_BIT_YUV888 ||
 			bg_fmt == B2R2_BLT_FMT_32_BIT_AYUV8888 ||
 			bg_fmt == B2R2_BLT_FMT_24_BIT_VUY888 ||
 			bg_fmt == B2R2_BLT_FMT_32_BIT_VUYA8888) {
-		if (is_rgb_fmt(dst_fmt)) {
+		if (b2r2_is_rgb_fmt(dst_fmt)) {
 			return true;
-		} else if (is_yvu_fmt(dst_fmt)) {
+		} else if (b2r2_is_yvu_fmt(dst_fmt)) {
 			return true;
-		} else if (is_yuv_fmt(dst_fmt)) {
+		} else if (b2r2_is_yuv_fmt(dst_fmt)) {
 			switch (dst_fmt) {
 			case B2R2_BLT_FMT_24_BIT_YUV888:
 			case B2R2_BLT_FMT_32_BIT_AYUV8888:
@@ -842,29 +713,29 @@ static bool bg_format_require_ivmx(enum b2r2_blt_fmt bg_fmt,
 				return true;
 			}
 		}
-	} else if (is_yuv_fmt(bg_fmt)) {
-		if (is_rgb_fmt(dst_fmt))
+	} else if (b2r2_is_yuv_fmt(bg_fmt)) {
+		if (b2r2_is_rgb_fmt(dst_fmt))
 			return true;
-		else if (is_bgr_fmt(dst_fmt))
+		else if (b2r2_is_bgr_fmt(dst_fmt))
 			return true;
 		else if (dst_fmt == B2R2_BLT_FMT_24_BIT_YUV888 ||
 				dst_fmt == B2R2_BLT_FMT_32_BIT_AYUV8888 ||
 				dst_fmt == B2R2_BLT_FMT_24_BIT_VUY888 ||
 				dst_fmt == B2R2_BLT_FMT_32_BIT_VUYA8888)
 			return true;
-		else if (is_yvu_fmt(dst_fmt))
+		else if (b2r2_is_yvu_fmt(dst_fmt))
 			return true;
-	} else if (is_bgr_fmt(bg_fmt)) {
-		if (is_rgb_fmt(dst_fmt))
+	} else if (b2r2_is_bgr_fmt(bg_fmt)) {
+		if (b2r2_is_rgb_fmt(dst_fmt))
 			return true;
-		else if (is_yvu_fmt(dst_fmt))
+		else if (b2r2_is_yvu_fmt(dst_fmt))
 			return true;
 		else if (dst_fmt == B2R2_BLT_FMT_24_BIT_YUV888 ||
 				dst_fmt == B2R2_BLT_FMT_32_BIT_AYUV8888 ||
 				dst_fmt == B2R2_BLT_FMT_24_BIT_VUY888 ||
 				dst_fmt == B2R2_BLT_FMT_32_BIT_VUYA8888)
 			return true;
-		else if (is_yuv_fmt(dst_fmt))
+		else if (b2r2_is_yuv_fmt(dst_fmt))
 			return true;
 	}
 
@@ -877,88 +748,12 @@ static bool bg_format_require_ivmx(enum b2r2_blt_fmt bg_fmt,
 static int analyze_fmt_conv(struct b2r2_control *cont,
 		struct b2r2_node_split_buf *src,
 		struct b2r2_node_split_buf *dst,
-		const u32 **vmx, u32 *node_count)
+		const u32 **vmx, u32 *node_count, bool fullrange)
 {
-	if (is_rgb_fmt(src->fmt)) {
-		if (is_yvu_fmt(dst->fmt))
-			*vmx = &vmx_rgb_to_yvu[0];
-		else if (dst->fmt == B2R2_BLT_FMT_24_BIT_YUV888 ||
-				dst->fmt == B2R2_BLT_FMT_32_BIT_AYUV8888 ||
-				dst->fmt == B2R2_BLT_FMT_24_BIT_VUY888 ||
-				dst->fmt == B2R2_BLT_FMT_32_BIT_VUYA8888)
-			/*
-			 * (A)YUV/VUY(A) formats differ only in component
-			 * order. This is handled by the endianness bit
-			 * in B2R2_STY/TTY registers when src/target are set.
-			 */
-			*vmx = &vmx_rgb_to_blt_yuv888[0];
-		else if (is_yuv_fmt(dst->fmt))
-			*vmx = &vmx_rgb_to_yuv[0];
-		else if (is_bgr_fmt(dst->fmt))
-			*vmx = &vmx_rgb_to_bgr[0];
-	} else if (is_yvu_fmt(src->fmt)) {
-		if (is_rgb_fmt(dst->fmt))
-			*vmx = &vmx_yvu_to_rgb[0];
-		else if (is_bgr_fmt(dst->fmt))
-			*vmx = &vmx_yvu_to_bgr[0];
-		else if (dst->fmt == B2R2_BLT_FMT_24_BIT_YUV888 ||
-				dst->fmt == B2R2_BLT_FMT_32_BIT_AYUV8888 ||
-				dst->fmt == B2R2_BLT_FMT_24_BIT_VUY888 ||
-				dst->fmt == B2R2_BLT_FMT_32_BIT_VUYA8888)
-			*vmx = &vmx_yvu_to_blt_yuv888[0];
-		else if (is_yuv_fmt(dst->fmt) &&
-				!is_yvu_fmt(dst->fmt))
-			*vmx = &vmx_yvu_to_yuv[0];
-	} else if (src->fmt == B2R2_BLT_FMT_24_BIT_YUV888 ||
-			src->fmt == B2R2_BLT_FMT_32_BIT_AYUV8888 ||
-			src->fmt == B2R2_BLT_FMT_24_BIT_VUY888 ||
-			src->fmt == B2R2_BLT_FMT_32_BIT_VUYA8888) {
-		/*
-		 * (A)YUV/VUY(A) formats differ only in component
-		 * order. This is handled by the endianness bit
-		 * in B2R2_STY/TTY registers when src/target are set.
-		 */
-		if (is_rgb_fmt(dst->fmt)) {
-			*vmx = &vmx_blt_yuv888_to_rgb[0];
-		} else if (is_yvu_fmt(dst->fmt)) {
-			*vmx = &vmx_blt_yuv888_to_yvu[0];
-		} else if (is_yuv_fmt(dst->fmt)) {
-			switch (dst->fmt) {
-			case B2R2_BLT_FMT_24_BIT_YUV888:
-			case B2R2_BLT_FMT_32_BIT_AYUV8888:
-			case B2R2_BLT_FMT_24_BIT_VUY888:
-			case B2R2_BLT_FMT_32_BIT_VUYA8888: /* do nothing */
-				break;
-			default:
-				*vmx = &vmx_blt_yuv888_to_yuv[0];
-				break;
-			}
-		}
-	} else if (is_yuv_fmt(src->fmt)) {
-		if (is_rgb_fmt(dst->fmt))
-			*vmx = &vmx_yuv_to_rgb[0];
-		else if (is_bgr_fmt(dst->fmt))
-			*vmx = &vmx_yuv_to_bgr[0];
-		else if (dst->fmt == B2R2_BLT_FMT_24_BIT_YUV888 ||
-				dst->fmt == B2R2_BLT_FMT_32_BIT_AYUV8888 ||
-				dst->fmt == B2R2_BLT_FMT_24_BIT_VUY888 ||
-				dst->fmt == B2R2_BLT_FMT_32_BIT_VUYA8888)
-			*vmx = &vmx_yuv_to_blt_yuv888[0];
-		else if (is_yvu_fmt(dst->fmt))
-			*vmx = &vmx_yvu_to_yuv[0];
-	} else if (is_bgr_fmt(src->fmt)) {
-		if (is_rgb_fmt(dst->fmt))
-			*vmx = &vmx_rgb_to_bgr[0];
-		else if (is_yvu_fmt(dst->fmt))
-			*vmx = &vmx_bgr_to_yvu[0];
-		else if (dst->fmt == B2R2_BLT_FMT_24_BIT_YUV888 ||
-				dst->fmt == B2R2_BLT_FMT_32_BIT_AYUV8888 ||
-				dst->fmt == B2R2_BLT_FMT_24_BIT_VUY888 ||
-				dst->fmt == B2R2_BLT_FMT_32_BIT_VUYA8888)
-			BUG_ON(1);
-		else if (is_yuv_fmt(dst->fmt))
-			*vmx = &vmx_bgr_to_yuv[0];
-	}
+	enum b2r2_color_conversion cc =
+		b2r2_get_color_conversion(src->fmt, dst->fmt, fullrange);
+
+	b2r2_get_vmx(cc, vmx);
 
 	if (dst->type == B2R2_FMT_TYPE_RASTER) {
 		*node_count = 1;
@@ -1019,11 +814,11 @@ static int analyze_color_fill(struct b2r2_node_split_job *this,
 			this->src.fmt = this->dst.fmt;
 		} else {
 			/* If the dst fmt is YUV the fill fmt will be as well */
-			if (is_yuv_fmt(this->dst.fmt)) {
+			if (b2r2_is_yuv_fmt(this->dst.fmt)) {
 				this->src.fmt =	B2R2_BLT_FMT_32_BIT_AYUV8888;
-			} else if (is_rgb_fmt(this->dst.fmt)) {
+			} else if (b2r2_is_rgb_fmt(this->dst.fmt)) {
 				this->src.fmt =	B2R2_BLT_FMT_32_BIT_ARGB8888;
-			} else if (is_bgr_fmt(this->dst.fmt)) {
+			} else if (b2r2_is_bgr_fmt(this->dst.fmt)) {
 				/* Color will still be ARGB, we will translate
 				   using IVMX (configured later) */
 				this->src.fmt =	B2R2_BLT_FMT_32_BIT_ARGB8888;
@@ -1041,8 +836,8 @@ static int analyze_color_fill(struct b2r2_node_split_job *this,
 		if (((this->flags & B2R2_BLT_FLAG_PER_PIXEL_ALPHA_BLEND)
 					!= 0) &&
 				((this->flags & B2R2_BLT_FLAG_SOURCE_FILL_RAW)
-					== 0) && fmt_has_alpha(this->src.fmt)) {
-			u8 pixel_alpha = get_alpha(this->src.fmt,
+					== 0) && b2r2_fmt_has_alpha(this->src.fmt)) {
+			u8 pixel_alpha = b2r2_get_alpha(this->src.fmt,
 							this->src.color);
 			u32 new_global = pixel_alpha * this->global_alpha / 255;
 
@@ -1050,13 +845,13 @@ static int analyze_color_fill(struct b2r2_node_split_job *this,
 
 			/* Set the pixel alpha to full opaque so we don't get
 			   any nasty surprises */
-			this->src.color = set_alpha(this->src.fmt, 0xFF,
+			this->src.color = b2r2_set_alpha(this->src.fmt, 0xFF,
 						this->src.color);
 		}
 
 		ret = analyze_fmt_conv(
 			cont, &this->src, &this->dst, &this->ivmx,
-			node_count);
+			node_count, this->fullrange);
 		if (ret < 0)
 			goto error;
 	}
@@ -1191,7 +986,7 @@ static int analyze_copy(struct b2r2_node_split_job *this,
 		this->type = B2R2_COPY;
 
 		ret = analyze_fmt_conv(cont, &this->src, &this->dst,
-			&this->ivmx, &copy_count);
+			&this->ivmx, &copy_count, this->fullrange);
 		if (ret < 0)
 			goto error;
 
@@ -1272,12 +1067,14 @@ static int analyze_rot_scale_downscale(struct b2r2_node_split_job *this,
 	 * Calculate how many nodes are required to copy to and from the tmp
 	 * buffer
 	 */
-	ret = analyze_fmt_conv(cont, src, tmp, &this->ivmx, &nodes_per_rescale);
+	ret = analyze_fmt_conv(cont, src, tmp, &this->ivmx, &nodes_per_rescale,
+			this->fullrange);
 	if (ret < 0)
 		goto error;
 
 	/* We will not do any format conversion in the rotation stage */
-	ret = analyze_fmt_conv(cont, tmp, dst, &dummy_vmx, &nodes_per_rot);
+	ret = analyze_fmt_conv(cont, tmp, dst, &dummy_vmx, &nodes_per_rot,
+			this->fullrange);
 	if (ret < 0)
 		goto error;
 
@@ -1399,7 +1196,7 @@ static int analyze_scaling(struct b2r2_node_split_job *this,
 
 	/* Find out how many nodes a simple copy would require */
 	ret = analyze_fmt_conv(cont, &this->src, &this->dst, &this->ivmx,
-			&copy_count);
+			&copy_count, this->fullrange);
 	if (ret < 0)
 		goto error;
 
@@ -1461,7 +1258,7 @@ static int analyze_rotate(struct b2r2_node_split_job *this,
 
 	/* Find out how many nodes a simple copy would require */
 	ret = analyze_fmt_conv(cont, &this->src, &this->dst, &this->ivmx,
-			&nodes_per_tile);
+			&nodes_per_tile, this->fullrange);
 	if (ret < 0)
 		goto error;
 
@@ -1489,9 +1286,9 @@ static int analyze_rotate(struct b2r2_node_split_job *this,
 		struct b2r2_node_split_buf *tmp = &this->tmp_bufs[0];
 		enum b2r2_blt_fmt tmp_fmt;
 
-		if (is_yuv_fmt(this->dst.fmt))
+		if (b2r2_is_yuv_fmt(this->dst.fmt))
 			tmp_fmt = B2R2_BLT_FMT_32_BIT_AYUV8888;
-		else if (is_bgr_fmt(this->dst.fmt))
+		else if (b2r2_is_bgr_fmt(this->dst.fmt))
 			tmp_fmt = B2R2_BLT_FMT_32_BIT_ABGR8888;
 		else
 			tmp_fmt = B2R2_BLT_FMT_32_BIT_ARGB8888;
@@ -1952,7 +1749,7 @@ static void configure_direct_fill(
 	/* Source setup */
 
 	/* It seems B2R2 checks so that source and dest has the same format */
-	node->node.GROUP3.B2R2_STY = to_native_fmt(dst->fmt);
+	node->node.GROUP3.B2R2_STY = b2r2_to_native_fmt(dst->fmt);
 	node->node.GROUP2.B2R2_S1CF = color;
 	node->node.GROUP2.B2R2_S2CF = 0;
 
@@ -2043,7 +1840,7 @@ static int configure_fill(
 
 		/* TO BE REMOVED: */
 		set_src_2(node, dst->addr, dst);
-		node->node.GROUP4.B2R2_STY = to_native_fmt(fmt);
+		node->node.GROUP4.B2R2_STY = b2r2_to_native_fmt(fmt);
 
 		/* Setup the iVMX for color conversion */
 		if (ivmx != NULL)
@@ -2140,7 +1937,7 @@ static int configure_copy(
 			node->node.GROUP0.B2R2_INS |= B2R2_INS_CKEY_ENABLED;
 			node->node.GROUP0.B2R2_CIC |= B2R2_CIC_COLOR_KEY;
 
-			key_color = to_RGB888(this->flag_param, src->fmt);
+			key_color = b2r2_to_RGB888(this->flag_param, src->fmt);
 			node->node.GROUP12.B2R2_KEY1 = key_color;
 			node->node.GROUP12.B2R2_KEY2 = key_color;
 		}
@@ -2328,20 +2125,20 @@ static int configure_scale(
 	luma_vsrc_init = src_y & 0x3ff;
 
 	/* Check for upsampling of chroma */
-	upsample = !src_raster && !is_yuv444_fmt(src->fmt);
+	upsample = !src_raster && !b2r2_is_yuv444_fmt(src->fmt);
 	if (upsample) {
 		h_rsf /= 2;
 
-		if (is_yuv420_fmt(src->fmt))
+		if (b2r2_is_yuv420_fmt(src->fmt))
 			v_rsf /= 2;
 	}
 
 	/* Check for downsampling of chroma */
-	downsample = !dst_raster && !is_yuv444_fmt(dst->fmt);
+	downsample = !dst_raster && !b2r2_is_yuv444_fmt(dst->fmt);
 	if (downsample) {
 		h_rsf *= 2;
 
-		if (is_yuv420_fmt(dst->fmt))
+		if (b2r2_is_yuv420_fmt(dst->fmt))
 			v_rsf *= 2;
 	}
 
@@ -2552,11 +2349,11 @@ static void configure_src(struct b2r2_control *cont,
 		 * For 420 and 422 the chroma has lower resolution than the
 		 * luma
 		 */
-		if (!is_yuv444_fmt(src->fmt)) {
+		if (!b2r2_is_yuv444_fmt(src->fmt)) {
 			tmp_buf.win.x >>= 1;
 			tmp_buf.win.width = (tmp_buf.win.width + 1) / 2;
 
-			if (is_yuv420_fmt(src->fmt)) {
+			if (b2r2_is_yuv420_fmt(src->fmt)) {
 				tmp_buf.win.height =
 						(tmp_buf.win.height + 1) / 2;
 				tmp_buf.win.y >>= 1;
@@ -2569,7 +2366,7 @@ static void configure_src(struct b2r2_control *cont,
 	case B2R2_FMT_TYPE_PLANAR:
 		memcpy(&tmp_buf, src, sizeof(tmp_buf));
 
-		if (!is_yuv444_fmt(src->fmt)) {
+		if (!b2r2_is_yuv444_fmt(src->fmt)) {
 			/*
 			 * Each chroma buffer will have half as many values
 			 * per line as the luma buffer
@@ -2584,7 +2381,7 @@ static void configure_src(struct b2r2_control *cont,
 			 * If the buffer is in YUV420 format, the vertical
 			 * resolution is half as well
 			 */
-			if (is_yuv420_fmt(src->fmt)) {
+			if (b2r2_is_yuv420_fmt(src->fmt)) {
 				tmp_buf.win.height =
 						(tmp_buf.win.height + 1) / 2;
 				tmp_buf.win.y >>= 1;
@@ -2692,7 +2489,7 @@ static int configure_dst(struct b2r2_control *cont, struct b2r2_node *node,
 		dst_planes[1].addr = dst->chroma_addr;
 		dst_planes[1].plane_selection = B2R2_TTY_CHROMA_NOT_LUMA;
 
-		if (!is_yuv444_fmt(dst->fmt)) {
+		if (!b2r2_is_yuv444_fmt(dst->fmt)) {
 			/* Horizontal resolution is half */
 			dst_planes[1].win.x /= 2;
 			/*
@@ -2709,7 +2506,7 @@ static int configure_dst(struct b2r2_control *cont, struct b2r2_node *node,
 			 * resolution is half as well. Height must be rounded in
 			 * the same way as is done for width.
 			 */
-			if (is_yuv420_fmt(dst->fmt)) {
+			if (b2r2_is_yuv420_fmt(dst->fmt)) {
 				dst_planes[1].win.y /= 2;
 				dst_planes[1].win.height =
 					(dst_planes[1].win.height + 1) / 2;
@@ -2720,7 +2517,7 @@ static int configure_dst(struct b2r2_control *cont, struct b2r2_node *node,
 			/* There will be a third plane as well */
 			nbr_planes = 3;
 
-			if (!is_yuv444_fmt(dst->fmt)) {
+			if (!b2r2_is_yuv444_fmt(dst->fmt)) {
 				/* The chroma planes have half the luma pitch */
 				dst_planes[1].pitch /= 2;
 			}
@@ -2885,7 +2682,7 @@ static void set_buf(struct b2r2_control *cont,
 	memset(buf, 0, sizeof(*buf));
 
 	buf->fmt = img->fmt;
-	buf->type = get_fmt_type(img->fmt);
+	buf->type = b2r2_get_fmt_type(img->fmt);
 
 	if (color_fill) {
 		buf->type = B2R2_FMT_TYPE_RASTER;
@@ -2893,10 +2690,10 @@ static void set_buf(struct b2r2_control *cont,
 	} else {
 		buf->addr = addr;
 
-		buf->alpha_range = get_alpha_range(img->fmt);
+		buf->alpha_range = b2r2_get_alpha_range(img->fmt);
 
 		if (img->pitch == 0)
-			buf->pitch = fmt_byte_pitch(img->fmt, img->width);
+			buf->pitch = b2r2_fmt_byte_pitch(img->fmt, img->width);
 		else
 			buf->pitch = img->pitch;
 
@@ -2909,15 +2706,15 @@ static void set_buf(struct b2r2_control *cont,
 					buf->pitch * buf->height);
 			break;
 		case B2R2_FMT_TYPE_PLANAR:
-			if (is_yuv422_fmt(buf->fmt) ||
-					is_yuv420_fmt(buf->fmt)) {
+			if (b2r2_is_yuv422_fmt(buf->fmt) ||
+					b2r2_is_yuv420_fmt(buf->fmt)) {
 				buf->chroma_addr = (u32)(((u8 *)addr) +
 					buf->pitch * buf->height);
 			} else {
 				buf->chroma_cr_addr = (u32)(((u8 *)addr) +
 					buf->pitch * buf->height);
 			}
-			if (is_yuv420_fmt(buf->fmt)) {
+			if (b2r2_is_yuv420_fmt(buf->fmt)) {
 				/*
 				 * Use ceil(height/2) in case
 				 * buffer height is not divisible by 2.
@@ -2926,16 +2723,16 @@ static void set_buf(struct b2r2_control *cont,
 					(u32)(((u8 *)buf->chroma_addr) +
 					(buf->pitch >> 1) *
 					((buf->height + 1) >> 1));
-			} else if (is_yuv422_fmt(buf->fmt)) {
+			} else if (b2r2_is_yuv422_fmt(buf->fmt)) {
 				buf->chroma_cr_addr =
 					(u32)(((u8 *)buf->chroma_addr) +
 					(buf->pitch >> 1) * buf->height);
-			} else if (is_yvu420_fmt(buf->fmt)) {
+			} else if (b2r2_is_yvu420_fmt(buf->fmt)) {
 				buf->chroma_addr =
 					(u32)(((u8 *)buf->chroma_cr_addr) +
 					(buf->pitch >> 1) *
 					((buf->height + 1) >> 1));
-			} else if (is_yvu422_fmt(buf->fmt)) {
+			} else if (b2r2_is_yvu422_fmt(buf->fmt)) {
 				buf->chroma_addr =
 					(u32)(((u8 *)buf->chroma_cr_addr) +
 					(buf->pitch >> 1) * buf->height);
@@ -2969,13 +2766,13 @@ static int setup_tmp_buf(struct b2r2_control *cont,
 	u32 size;
 
 	/* Determine what format we should use for the tmp buf */
-	if (is_rgb_fmt(pref_fmt)) {
+	if (b2r2_is_rgb_fmt(pref_fmt)) {
 		fmt = B2R2_BLT_FMT_32_BIT_ARGB8888;
-	} else if (is_bgr_fmt(pref_fmt)) {
+	} else if (b2r2_is_bgr_fmt(pref_fmt)) {
 		fmt = B2R2_BLT_FMT_32_BIT_ABGR8888;
-	} else if (is_yvu_fmt(pref_fmt)) {
+	} else if (b2r2_is_yvu_fmt(pref_fmt)) {
 		fmt = B2R2_BLT_FMT_CB_Y_CR_Y;
-	} else if (is_yuv_fmt(pref_fmt)) {
+	} else if (b2r2_is_yuv_fmt(pref_fmt)) {
 		fmt = B2R2_BLT_FMT_32_BIT_AYUV8888;
 	} else {
 		/* Wait, what? */
@@ -2989,13 +2786,13 @@ static int setup_tmp_buf(struct b2r2_control *cont,
 	/* See if we can fit the entire preferred rectangle */
 	width = pref_width;
 	height = pref_height;
-	pitch = fmt_byte_pitch(fmt, width);
+	pitch = b2r2_fmt_byte_pitch(fmt, width);
 	size = pitch * height;
 
 	if (size > max_size) {
 		/* We need to limit the size, so we choose a different width */
 		width = MIN(width, B2R2_RESCALE_MAX_WIDTH);
-		pitch = fmt_byte_pitch(fmt, width);
+		pitch = b2r2_fmt_byte_pitch(fmt, width);
 		height = MIN(height, max_size / pitch);
 		size = pitch * height;
 	}
@@ -3027,472 +2824,6 @@ error:
 
 }
 
-/**
- * get_alpha_range() - returns the alpha range of the given format
- */
-static enum b2r2_ty get_alpha_range(enum b2r2_blt_fmt fmt)
-{
-	switch (fmt) {
-	case B2R2_BLT_FMT_24_BIT_ARGB8565:
-	case B2R2_BLT_FMT_32_BIT_ARGB8888:
-	case B2R2_BLT_FMT_32_BIT_AYUV8888:
-	case B2R2_BLT_FMT_32_BIT_VUYA8888:
-	case B2R2_BLT_FMT_8_BIT_A8:
-	case B2R2_BLT_FMT_32_BIT_ABGR8888:
-		return B2R2_TY_ALPHA_RANGE_255; /* 0 - 255 */
-	default:
-		return B2R2_TY_ALPHA_RANGE_128; /* 0 - 128 */
-	}
-}
-
-/**
- * get_alpha() - returns the pixel alpha in 0...255 range
- */
-static u8 get_alpha(enum b2r2_blt_fmt fmt, u32 pixel)
-{
-	switch (fmt) {
-	case B2R2_BLT_FMT_32_BIT_ARGB8888:
-	case B2R2_BLT_FMT_32_BIT_ABGR8888:
-	case B2R2_BLT_FMT_32_BIT_AYUV8888:
-		return (pixel >> 24) & 0xff;
-	case B2R2_BLT_FMT_32_BIT_VUYA8888:
-		return pixel & 0xff;
-	case B2R2_BLT_FMT_24_BIT_ARGB8565:
-		return (pixel & 0xfff) >> 16;
-	case B2R2_BLT_FMT_16_BIT_ARGB4444:
-		return (((pixel >> 12) & 0xf) * 255) / 15;
-	case B2R2_BLT_FMT_16_BIT_ARGB1555:
-		return (pixel >> 15) * 255;
-	case B2R2_BLT_FMT_1_BIT_A1:
-		return pixel * 255;
-	case B2R2_BLT_FMT_8_BIT_A8:
-		return pixel;
-	default:
-		return 255;
-	}
-}
-
-/**
- * set_alpha() - returns a color value with the alpha component set
- */
-static u32 set_alpha(enum b2r2_blt_fmt fmt, u8 alpha, u32 color)
-{
-	u32 alpha_mask;
-
-	switch (fmt) {
-	case B2R2_BLT_FMT_32_BIT_ARGB8888:
-	case B2R2_BLT_FMT_32_BIT_ABGR8888:
-	case B2R2_BLT_FMT_32_BIT_AYUV8888:
-		color &= 0x00ffffff;
-		alpha_mask = alpha << 24;
-		break;
-	case B2R2_BLT_FMT_32_BIT_VUYA8888:
-		color &= 0xffffff00;
-		alpha_mask = alpha;
-		break;
-	case B2R2_BLT_FMT_24_BIT_ARGB8565:
-		color &= 0x00ffff;
-		alpha_mask = alpha << 16;
-		break;
-	case B2R2_BLT_FMT_16_BIT_ARGB4444:
-		color &= 0x0fff;
-		alpha_mask = (alpha << 8) & 0xF000;
-		break;
-	case B2R2_BLT_FMT_16_BIT_ARGB1555:
-		color &= 0x7fff;
-		alpha_mask = (alpha / 255) << 15 ;
-		break;
-	case B2R2_BLT_FMT_1_BIT_A1:
-		color = 0;
-		alpha_mask = (alpha / 255);
-		break;
-	case B2R2_BLT_FMT_8_BIT_A8:
-		color = 0;
-		alpha_mask = alpha;
-		break;
-	default:
-		alpha_mask = 0;
-	}
-
-	return color | alpha_mask;
-}
-
-/**
- * fmt_has_alpha() - returns whether the given format carries an alpha value
- */
-static bool fmt_has_alpha(enum b2r2_blt_fmt fmt)
-{
-	switch (fmt) {
-	case B2R2_BLT_FMT_16_BIT_ARGB4444:
-	case B2R2_BLT_FMT_16_BIT_ARGB1555:
-	case B2R2_BLT_FMT_32_BIT_ARGB8888:
-	case B2R2_BLT_FMT_32_BIT_ABGR8888:
-	case B2R2_BLT_FMT_24_BIT_ARGB8565:
-	case B2R2_BLT_FMT_32_BIT_AYUV8888:
-	case B2R2_BLT_FMT_32_BIT_VUYA8888:
-	case B2R2_BLT_FMT_1_BIT_A1:
-	case B2R2_BLT_FMT_8_BIT_A8:
-		return true;
-	default:
-		return false;
-	}
-}
-
-/**
- * is_rgb_fmt() - returns whether the given format is a rgb format
- */
-static bool is_rgb_fmt(enum b2r2_blt_fmt fmt)
-{
-	switch (fmt) {
-	case B2R2_BLT_FMT_16_BIT_ARGB4444:
-	case B2R2_BLT_FMT_16_BIT_ARGB1555:
-	case B2R2_BLT_FMT_16_BIT_RGB565:
-	case B2R2_BLT_FMT_24_BIT_RGB888:
-	case B2R2_BLT_FMT_32_BIT_ARGB8888:
-	case B2R2_BLT_FMT_24_BIT_ARGB8565:
-	case B2R2_BLT_FMT_1_BIT_A1:
-	case B2R2_BLT_FMT_8_BIT_A8:
-		return true;
-	default:
-		return false;
-	}
-}
-
-/**
- * is_bgr_fmt() - returns whether the given format is a bgr format
- */
-static bool is_bgr_fmt(enum b2r2_blt_fmt fmt)
-{
-	return (fmt == B2R2_BLT_FMT_32_BIT_ABGR8888);
-}
-
-/**
- * is_yuv_fmt() - returns whether the given format is a yuv format
- */
-static bool is_yuv_fmt(enum b2r2_blt_fmt fmt)
-{
-	switch (fmt) {
-	case B2R2_BLT_FMT_24_BIT_YUV888:
-	case B2R2_BLT_FMT_32_BIT_AYUV8888:
-	case B2R2_BLT_FMT_24_BIT_VUY888:
-	case B2R2_BLT_FMT_32_BIT_VUYA8888:
-	case B2R2_BLT_FMT_Y_CB_Y_CR:
-	case B2R2_BLT_FMT_CB_Y_CR_Y:
-	case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
-	case B2R2_BLT_FMT_YVU420_PACKED_PLANAR:
-	case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:
-	case B2R2_BLT_FMT_YVU422_PACKED_PLANAR:
-	case B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR:
-	case B2R2_BLT_FMT_YVU420_PACKED_SEMI_PLANAR:
-	case B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR:
-	case B2R2_BLT_FMT_YVU422_PACKED_SEMI_PLANAR:
-	case B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE:
-	case B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE:
-	case B2R2_BLT_FMT_YUV444_PACKED_PLANAR:
-		return true;
-	default:
-		return false;
-	}
-}
-
-/**
- * is_yvu_fmt() - returns whether the given format is a yvu format
- */
-static bool is_yvu_fmt(enum b2r2_blt_fmt fmt)
-{
-	switch (fmt) {
-	case B2R2_BLT_FMT_Y_CB_Y_CR:
-	case B2R2_BLT_FMT_YVU420_PACKED_PLANAR:
-	case B2R2_BLT_FMT_YVU422_PACKED_PLANAR:
-	case B2R2_BLT_FMT_YVU420_PACKED_SEMI_PLANAR:
-	case B2R2_BLT_FMT_YVU422_PACKED_SEMI_PLANAR:
-		return true;
-	default:
-		return false;
-	}
-}
-
-/**
- * is_yuv420_fmt() - returns whether the given format is a yuv420 format
- */
-static bool is_yuv420_fmt(enum b2r2_blt_fmt fmt)
-{
-
-	switch (fmt) {
-	case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
-	case B2R2_BLT_FMT_YVU420_PACKED_PLANAR:
-	case B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR:
-	case B2R2_BLT_FMT_YVU420_PACKED_SEMI_PLANAR:
-	case B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE:
-		return true;
-	default:
-		return false;
-	}
-}
-
-static bool is_yuv422_fmt(enum b2r2_blt_fmt fmt)
-{
-	switch (fmt) {
-	case B2R2_BLT_FMT_Y_CB_Y_CR:
-	case B2R2_BLT_FMT_CB_Y_CR_Y:
-	case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:
-	case B2R2_BLT_FMT_YVU422_PACKED_PLANAR:
-	case B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR:
-	case B2R2_BLT_FMT_YVU422_PACKED_SEMI_PLANAR:
-	case B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE:
-		return true;
-	default:
-		return false;
-	}
-}
-
-/**
- * is_yvu420_fmt() - returns whether the given format is a yvu420 format
- */
-static bool is_yvu420_fmt(enum b2r2_blt_fmt fmt)
-{
-	switch (fmt) {
-	case B2R2_BLT_FMT_YVU420_PACKED_PLANAR:
-	case B2R2_BLT_FMT_YVU420_PACKED_SEMI_PLANAR:
-		return true;
-	default:
-		return false;
-	}
-}
-
-static bool is_yvu422_fmt(enum b2r2_blt_fmt fmt)
-{
-	switch (fmt) {
-	case B2R2_BLT_FMT_CB_Y_CR_Y:
-	case B2R2_BLT_FMT_YVU422_PACKED_PLANAR:
-	case B2R2_BLT_FMT_YVU422_PACKED_SEMI_PLANAR:
-		return true;
-	default:
-		return false;
-	}
-}
-
-
-/**
- * is_yuv444_fmt() - returns whether the given format is a yuv444 format
- */
-static bool is_yuv444_fmt(enum b2r2_blt_fmt fmt)
-{
-	switch (fmt) {
-	case B2R2_BLT_FMT_24_BIT_YUV888:
-	case B2R2_BLT_FMT_32_BIT_AYUV8888:
-	case B2R2_BLT_FMT_24_BIT_VUY888:
-	case B2R2_BLT_FMT_32_BIT_VUYA8888:
-	case B2R2_BLT_FMT_YUV444_PACKED_PLANAR:
-		return true;
-	default:
-		return false;
-	}
-}
-
-/**
- * get_fmt_byte_pitch() - returns the pitch of a pixmap with the given width
- */
-static int fmt_byte_pitch(enum b2r2_blt_fmt fmt, u32 width)
-{
-	int pitch;
-
-	switch (fmt) {
-
-	case B2R2_BLT_FMT_1_BIT_A1:
-		pitch = width >> 3; /* Shift is faster than division */
-		if ((width & 0x3) != 0) /* Check for remainder */
-			pitch++;
-		return pitch;
-
-	case B2R2_BLT_FMT_8_BIT_A8:                        /* Fall through */
-	case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:            /* Fall through */
-	case B2R2_BLT_FMT_YVU420_PACKED_PLANAR:            /* Fall through */
-	case B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE: /* Fall through */
-	case B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR:       /* Fall through */
-	case B2R2_BLT_FMT_YVU420_PACKED_SEMI_PLANAR:       /* Fall through */
-	case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:            /* Fall through */
-	case B2R2_BLT_FMT_YVU422_PACKED_PLANAR:            /* Fall through */
-	case B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE: /* Fall through */
-	case B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR:       /* Fall through */
-	case B2R2_BLT_FMT_YVU422_PACKED_SEMI_PLANAR:       /* Fall through */
-	case B2R2_BLT_FMT_YUV444_PACKED_PLANAR:
-		return width;
-
-	case B2R2_BLT_FMT_16_BIT_ARGB4444: /* Fall through */
-	case B2R2_BLT_FMT_16_BIT_ARGB1555: /* Fall through */
-	case B2R2_BLT_FMT_16_BIT_RGB565:   /* Fall through */
-	case B2R2_BLT_FMT_Y_CB_Y_CR:       /* Fall through */
-	case B2R2_BLT_FMT_CB_Y_CR_Y:
-		return width << 1;
-
-	case B2R2_BLT_FMT_24_BIT_RGB888:   /* Fall through */
-	case B2R2_BLT_FMT_24_BIT_ARGB8565: /* Fall through */
-	case B2R2_BLT_FMT_24_BIT_YUV888:   /* Fall through */
-	case B2R2_BLT_FMT_24_BIT_VUY888:
-		return width * 3;
-
-	case B2R2_BLT_FMT_32_BIT_ARGB8888: /* Fall through */
-	case B2R2_BLT_FMT_32_BIT_ABGR8888: /* Fall through */
-	case B2R2_BLT_FMT_32_BIT_AYUV8888: /* Fall through */
-	case B2R2_BLT_FMT_32_BIT_VUYA8888:
-		return width << 2;
-
-	default:
-		/* Should never, ever happen */
-		BUG_ON(1);
-		return 0;
-	}
-}
-
-/**
- * to_native_fmt() - returns the native B2R2 format
- */
-static enum b2r2_native_fmt to_native_fmt(enum b2r2_blt_fmt fmt)
-{
-
-	switch (fmt) {
-	case B2R2_BLT_FMT_UNUSED:
-		return B2R2_NATIVE_RGB565;
-	case B2R2_BLT_FMT_1_BIT_A1:
-		return B2R2_NATIVE_A1;
-	case B2R2_BLT_FMT_8_BIT_A8:
-		return B2R2_NATIVE_A8;
-	case B2R2_BLT_FMT_16_BIT_RGB565:
-		return B2R2_NATIVE_RGB565;
-	case B2R2_BLT_FMT_16_BIT_ARGB4444:
-		return B2R2_NATIVE_ARGB4444;
-	case B2R2_BLT_FMT_16_BIT_ARGB1555:
-		return B2R2_NATIVE_ARGB1555;
-	case B2R2_BLT_FMT_24_BIT_ARGB8565:
-		return B2R2_NATIVE_ARGB8565;
-	case B2R2_BLT_FMT_24_BIT_RGB888:
-		return B2R2_NATIVE_RGB888;
-	case B2R2_BLT_FMT_24_BIT_YUV888:
-	case B2R2_BLT_FMT_24_BIT_VUY888: /* Not actually supported by HW */
-		return B2R2_NATIVE_YCBCR888;
-	case B2R2_BLT_FMT_32_BIT_ABGR8888: /* Not actually supported by HW */
-	case B2R2_BLT_FMT_32_BIT_ARGB8888:
-		return B2R2_NATIVE_ARGB8888;
-	case B2R2_BLT_FMT_32_BIT_AYUV8888:
-	case B2R2_BLT_FMT_32_BIT_VUYA8888: /* Not actually supported by HW */
-		return B2R2_NATIVE_AYCBCR8888;
-	case B2R2_BLT_FMT_CB_Y_CR_Y:
-		return B2R2_NATIVE_YCBCR422R;
-	case B2R2_BLT_FMT_Y_CB_Y_CR:
-		return B2R2_NATIVE_YCBCR422R;
-	case B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR:
-	case B2R2_BLT_FMT_YVU420_PACKED_SEMI_PLANAR:
-	case B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR:
-	case B2R2_BLT_FMT_YVU422_PACKED_SEMI_PLANAR:
-		return B2R2_NATIVE_YCBCR42X_R2B;
-	case B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE:
-	case B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE:
-		return B2R2_NATIVE_YCBCR42X_MBN;
-	case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
-	case B2R2_BLT_FMT_YVU420_PACKED_PLANAR:
-	case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:
-	case B2R2_BLT_FMT_YVU422_PACKED_PLANAR:
-	case B2R2_BLT_FMT_YUV444_PACKED_PLANAR:
-		return B2R2_NATIVE_YUV;
-	default:
-		/* Should never ever happen */
-		return B2R2_NATIVE_BYTE;
-	}
-}
-
-/**
- * Bit-expand the color from fmt to RGB888 with blue at LSB.
- * Copy MSBs into missing LSBs.
- */
-static u32 to_RGB888(u32 color, const enum b2r2_blt_fmt fmt)
-{
-	u32 out_color = 0;
-	u32 r = 0;
-	u32 g = 0;
-	u32 b = 0;
-	switch (fmt) {
-	case B2R2_BLT_FMT_16_BIT_ARGB4444:
-		r = ((color & 0xf00) << 12) | ((color & 0xf00) << 8);
-		g = ((color & 0xf0) << 8) | ((color & 0xf0) << 4);
-		b = ((color & 0xf) << 4) | (color & 0xf);
-		out_color = r | g | b;
-		break;
-	case B2R2_BLT_FMT_16_BIT_ARGB1555:
-		r = ((color & 0x7c00) << 9) | ((color & 0x7000) << 4);
-		g = ((color & 0x3e0) << 6) | ((color & 0x380) << 1);
-		b = ((color & 0x1f) << 3) | ((color & 0x1c) >> 2);
-		out_color = r | g | b;
-		break;
-	case B2R2_BLT_FMT_16_BIT_RGB565:
-		r = ((color & 0xf800) << 8) | ((color & 0xe000) << 3);
-		g = ((color & 0x7e0) << 5) | ((color & 0x600) >> 1);
-		b = ((color & 0x1f) << 3) | ((color & 0x1c) >> 2);
-		out_color = r | g | b;
-		break;
-	case B2R2_BLT_FMT_24_BIT_RGB888:
-	case B2R2_BLT_FMT_32_BIT_ARGB8888:
-		out_color = color & 0xffffff;
-		break;
-	case B2R2_BLT_FMT_32_BIT_ABGR8888:
-		r = (color & 0xff) << 16;
-		g = color & 0xff00;
-		b = (color & 0xff0000) >> 16;
-		out_color = r | g | b;
-		break;
-	case B2R2_BLT_FMT_24_BIT_ARGB8565:
-		r = ((color & 0xf800) << 8) | ((color & 0xe000) << 3);
-		g = ((color & 0x7e0) << 5) | ((color & 0x600) >> 1);
-		b = ((color & 0x1f) << 3) | ((color & 0x1c) >> 2);
-		out_color = r | g | b;
-		break;
-	default:
-		break;
-	}
-
-	return out_color;
-}
-
-/**
- * get_fmt_type() - returns the type of the given format (raster, planar, etc.)
- */
-static enum b2r2_fmt_type get_fmt_type(enum b2r2_blt_fmt fmt)
-{
-	switch (fmt) {
-	case B2R2_BLT_FMT_16_BIT_ARGB4444:
-	case B2R2_BLT_FMT_16_BIT_ARGB1555:
-	case B2R2_BLT_FMT_16_BIT_RGB565:
-	case B2R2_BLT_FMT_24_BIT_RGB888:
-	case B2R2_BLT_FMT_32_BIT_ARGB8888:
-	case B2R2_BLT_FMT_Y_CB_Y_CR:
-	case B2R2_BLT_FMT_CB_Y_CR_Y:
-	case B2R2_BLT_FMT_32_BIT_ABGR8888:
-	case B2R2_BLT_FMT_24_BIT_ARGB8565:
-	case B2R2_BLT_FMT_24_BIT_YUV888:
-	case B2R2_BLT_FMT_32_BIT_AYUV8888:
-	case B2R2_BLT_FMT_24_BIT_VUY888:
-	case B2R2_BLT_FMT_32_BIT_VUYA8888:
-	case B2R2_BLT_FMT_1_BIT_A1:
-	case B2R2_BLT_FMT_8_BIT_A8:
-		return B2R2_FMT_TYPE_RASTER;
-	case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
-	case B2R2_BLT_FMT_YVU420_PACKED_PLANAR:
-	case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:
-	case B2R2_BLT_FMT_YVU422_PACKED_PLANAR:
-	case B2R2_BLT_FMT_YUV444_PACKED_PLANAR:
-		return B2R2_FMT_TYPE_PLANAR;
-	case B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR:
-	case B2R2_BLT_FMT_YVU420_PACKED_SEMI_PLANAR:
-	case B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR:
-	case B2R2_BLT_FMT_YVU422_PACKED_SEMI_PLANAR:
-	case B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE:
-	case B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE:
-		return B2R2_FMT_TYPE_SEMI_PLANAR;
-	default:
-		return B2R2_FMT_TYPE_RASTER;
-	}
-}
-
 /**
  * is_transform() - returns whether the given request is a transform operation
  */
@@ -3555,7 +2886,7 @@ static void set_target(struct b2r2_node *node, u32 addr,
 		node->dst_tmp_index = buf->tmp_buf_index;
 
 	node->node.GROUP1.B2R2_TBA = addr;
-	node->node.GROUP1.B2R2_TTY = buf->pitch | to_native_fmt(buf->fmt) |
+	node->node.GROUP1.B2R2_TTY = buf->pitch | b2r2_to_native_fmt(buf->fmt) |
 			buf->alpha_range | buf->chroma_selection | buf->hso |
 			buf->vso | buf->dither | buf->plane_selection;
 
@@ -3611,7 +2942,7 @@ static void set_src(struct b2r2_src_config *src, u32 addr,
 		struct b2r2_node_split_buf *buf)
 {
 	src->B2R2_SBA = addr;
-	src->B2R2_STY = buf->pitch | to_native_fmt(buf->fmt) |
+	src->B2R2_STY = buf->pitch | b2r2_to_native_fmt(buf->fmt) |
 			buf->alpha_range | buf->hso | buf->vso;
 
 	if (buf->fmt == B2R2_BLT_FMT_24_BIT_VUY888 ||
@@ -3640,7 +2971,7 @@ static void set_src_1(struct b2r2_node *node, u32 addr,
 	node->node.GROUP0.B2R2_INS |= B2R2_INS_SOURCE_1_FETCH_FROM_MEM;
 
 	node->node.GROUP3.B2R2_SBA = addr;
-	node->node.GROUP3.B2R2_STY = buf->pitch | to_native_fmt(buf->fmt) |
+	node->node.GROUP3.B2R2_STY = buf->pitch | b2r2_to_native_fmt(buf->fmt) |
 			buf->alpha_range | buf->hso | buf->vso;
 
 	if (buf->fmt == B2R2_BLT_FMT_24_BIT_VUY888 ||
diff --git a/drivers/video/b2r2/b2r2_utils.c b/drivers/video/b2r2/b2r2_utils.c
index 3df7a272211..d482701089e 100644
--- a/drivers/video/b2r2/b2r2_utils.c
+++ b/drivers/video/b2r2/b2r2_utils.c
@@ -631,3 +631,469 @@ s32 b2r2_align_up(s32 value, s32 alignment)
 
 	return value + value_to_add;
 }
+
+/**
+ * b2r2_get_alpha_range() - returns the alpha range of the given format
+ */
+enum b2r2_ty b2r2_get_alpha_range(enum b2r2_blt_fmt fmt)
+{
+	switch (fmt) {
+	case B2R2_BLT_FMT_24_BIT_ARGB8565:
+	case B2R2_BLT_FMT_32_BIT_ARGB8888:
+	case B2R2_BLT_FMT_32_BIT_AYUV8888:
+	case B2R2_BLT_FMT_32_BIT_VUYA8888:
+	case B2R2_BLT_FMT_8_BIT_A8:
+	case B2R2_BLT_FMT_32_BIT_ABGR8888:
+		return B2R2_TY_ALPHA_RANGE_255; /* 0 - 255 */
+	default:
+		return B2R2_TY_ALPHA_RANGE_128; /* 0 - 128 */
+	}
+}
+
+/**
+ * b2r2_get_alpha() - returns the pixel alpha in 0...255 range
+ */
+u8 b2r2_get_alpha(enum b2r2_blt_fmt fmt, u32 pixel)
+{
+	switch (fmt) {
+	case B2R2_BLT_FMT_32_BIT_ARGB8888:
+	case B2R2_BLT_FMT_32_BIT_ABGR8888:
+	case B2R2_BLT_FMT_32_BIT_AYUV8888:
+		return (pixel >> 24) & 0xff;
+	case B2R2_BLT_FMT_32_BIT_VUYA8888:
+		return pixel & 0xff;
+	case B2R2_BLT_FMT_24_BIT_ARGB8565:
+		return (pixel & 0xfff) >> 16;
+	case B2R2_BLT_FMT_16_BIT_ARGB4444:
+		return (((pixel >> 12) & 0xf) * 255) / 15;
+	case B2R2_BLT_FMT_16_BIT_ARGB1555:
+		return (pixel >> 15) * 255;
+	case B2R2_BLT_FMT_1_BIT_A1:
+		return pixel * 255;
+	case B2R2_BLT_FMT_8_BIT_A8:
+		return pixel;
+	default:
+		return 255;
+	}
+}
+
+/**
+ * b2r2_set_alpha() - returns a color value with the alpha component set
+ */
+u32 b2r2_set_alpha(enum b2r2_blt_fmt fmt, u8 alpha, u32 color)
+{
+	u32 alpha_mask;
+
+	switch (fmt) {
+	case B2R2_BLT_FMT_32_BIT_ARGB8888:
+	case B2R2_BLT_FMT_32_BIT_ABGR8888:
+	case B2R2_BLT_FMT_32_BIT_AYUV8888:
+		color &= 0x00ffffff;
+		alpha_mask = alpha << 24;
+		break;
+	case B2R2_BLT_FMT_32_BIT_VUYA8888:
+		color &= 0xffffff00;
+		alpha_mask = alpha;
+		break;
+	case B2R2_BLT_FMT_24_BIT_ARGB8565:
+		color &= 0x00ffff;
+		alpha_mask = alpha << 16;
+		break;
+	case B2R2_BLT_FMT_16_BIT_ARGB4444:
+		color &= 0x0fff;
+		alpha_mask = (alpha << 8) & 0xF000;
+		break;
+	case B2R2_BLT_FMT_16_BIT_ARGB1555:
+		color &= 0x7fff;
+		alpha_mask = (alpha / 255) << 15 ;
+		break;
+	case B2R2_BLT_FMT_1_BIT_A1:
+		color = 0;
+		alpha_mask = (alpha / 255);
+		break;
+	case B2R2_BLT_FMT_8_BIT_A8:
+		color = 0;
+		alpha_mask = alpha;
+		break;
+	default:
+		alpha_mask = 0;
+	}
+
+	return color | alpha_mask;
+}
+
+/**
+ * b2r2_fmt_has_alpha() - returns whether the given format carries an alpha value
+ */
+bool b2r2_fmt_has_alpha(enum b2r2_blt_fmt fmt)
+{
+	switch (fmt) {
+	case B2R2_BLT_FMT_16_BIT_ARGB4444:
+	case B2R2_BLT_FMT_16_BIT_ARGB1555:
+	case B2R2_BLT_FMT_32_BIT_ARGB8888:
+	case B2R2_BLT_FMT_32_BIT_ABGR8888:
+	case B2R2_BLT_FMT_24_BIT_ARGB8565:
+	case B2R2_BLT_FMT_32_BIT_AYUV8888:
+	case B2R2_BLT_FMT_32_BIT_VUYA8888:
+	case B2R2_BLT_FMT_1_BIT_A1:
+	case B2R2_BLT_FMT_8_BIT_A8:
+		return true;
+	default:
+		return false;
+	}
+}
+
+/**
+ * b2r2_is_rgb_fmt() - returns whether the given format is a rgb format
+ */
+bool b2r2_is_rgb_fmt(enum b2r2_blt_fmt fmt)
+{
+	switch (fmt) {
+	case B2R2_BLT_FMT_16_BIT_ARGB4444:
+	case B2R2_BLT_FMT_16_BIT_ARGB1555:
+	case B2R2_BLT_FMT_16_BIT_RGB565:
+	case B2R2_BLT_FMT_24_BIT_RGB888:
+	case B2R2_BLT_FMT_32_BIT_ARGB8888:
+	case B2R2_BLT_FMT_24_BIT_ARGB8565:
+	case B2R2_BLT_FMT_1_BIT_A1:
+	case B2R2_BLT_FMT_8_BIT_A8:
+		return true;
+	default:
+		return false;
+	}
+}
+
+/**
+ * b2r2_is_bgr_fmt() - returns whether the given format is a bgr format
+ */
+bool b2r2_is_bgr_fmt(enum b2r2_blt_fmt fmt)
+{
+	return (fmt == B2R2_BLT_FMT_32_BIT_ABGR8888);
+}
+
+/**
+ * b2r2_is_yuv_fmt() - returns whether the given format is a yuv format
+ */
+bool b2r2_is_yuv_fmt(enum b2r2_blt_fmt fmt)
+{
+	switch (fmt) {
+	case B2R2_BLT_FMT_24_BIT_YUV888:
+	case B2R2_BLT_FMT_32_BIT_AYUV8888:
+	case B2R2_BLT_FMT_24_BIT_VUY888:
+	case B2R2_BLT_FMT_32_BIT_VUYA8888:
+	case B2R2_BLT_FMT_Y_CB_Y_CR:
+	case B2R2_BLT_FMT_CB_Y_CR_Y:
+	case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YVU420_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YVU422_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YVU420_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YVU422_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE:
+	case B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE:
+	case B2R2_BLT_FMT_YUV444_PACKED_PLANAR:
+		return true;
+	default:
+		return false;
+	}
+}
+
+/**
+ * b2r2_is_yvu_fmt() - returns whether the given format is a yvu format
+ */
+bool b2r2_is_yvu_fmt(enum b2r2_blt_fmt fmt)
+{
+	switch (fmt) {
+	case B2R2_BLT_FMT_Y_CB_Y_CR:
+	case B2R2_BLT_FMT_YVU420_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YVU422_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YVU420_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YVU422_PACKED_SEMI_PLANAR:
+		return true;
+	default:
+		return false;
+	}
+}
+
+/**
+ * b2r2_is_yuv420_fmt() - returns whether the given format is a yuv420 format
+ */
+bool b2r2_is_yuv420_fmt(enum b2r2_blt_fmt fmt)
+{
+
+	switch (fmt) {
+	case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YVU420_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YVU420_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE:
+		return true;
+	default:
+		return false;
+	}
+}
+
+bool b2r2_is_yuv422_fmt(enum b2r2_blt_fmt fmt)
+{
+	switch (fmt) {
+	case B2R2_BLT_FMT_Y_CB_Y_CR:
+	case B2R2_BLT_FMT_CB_Y_CR_Y:
+	case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YVU422_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YVU422_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE:
+		return true;
+	default:
+		return false;
+	}
+}
+
+/**
+ * b2r2_is_yvu420_fmt() - returns whether the given format is a yvu420 format
+ */
+bool b2r2_is_yvu420_fmt(enum b2r2_blt_fmt fmt)
+{
+	switch (fmt) {
+	case B2R2_BLT_FMT_YVU420_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YVU420_PACKED_SEMI_PLANAR:
+		return true;
+	default:
+		return false;
+	}
+}
+
+bool b2r2_is_yvu422_fmt(enum b2r2_blt_fmt fmt)
+{
+	switch (fmt) {
+	case B2R2_BLT_FMT_CB_Y_CR_Y:
+	case B2R2_BLT_FMT_YVU422_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YVU422_PACKED_SEMI_PLANAR:
+		return true;
+	default:
+		return false;
+	}
+}
+
+
+/**
+ * b2r2_is_yuv444_fmt() - returns whether the given format is a yuv444 format
+ */
+bool b2r2_is_yuv444_fmt(enum b2r2_blt_fmt fmt)
+{
+	switch (fmt) {
+	case B2R2_BLT_FMT_24_BIT_YUV888:
+	case B2R2_BLT_FMT_32_BIT_AYUV8888:
+	case B2R2_BLT_FMT_24_BIT_VUY888:
+	case B2R2_BLT_FMT_32_BIT_VUYA8888:
+	case B2R2_BLT_FMT_YUV444_PACKED_PLANAR:
+		return true;
+	default:
+		return false;
+	}
+}
+
+/**
+ * b2r2_fmt_byte_pitch() - returns the pitch of a pixmap with the given width
+ */
+int b2r2_fmt_byte_pitch(enum b2r2_blt_fmt fmt, u32 width)
+{
+	int pitch;
+
+	switch (fmt) {
+
+	case B2R2_BLT_FMT_1_BIT_A1:
+		pitch = width >> 3; /* Shift is faster than division */
+		if ((width & 0x3) != 0) /* Check for remainder */
+			pitch++;
+		return pitch;
+
+	case B2R2_BLT_FMT_8_BIT_A8:                        /* Fall through */
+	case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:            /* Fall through */
+	case B2R2_BLT_FMT_YVU420_PACKED_PLANAR:            /* Fall through */
+	case B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE: /* Fall through */
+	case B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR:       /* Fall through */
+	case B2R2_BLT_FMT_YVU420_PACKED_SEMI_PLANAR:       /* Fall through */
+	case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:            /* Fall through */
+	case B2R2_BLT_FMT_YVU422_PACKED_PLANAR:            /* Fall through */
+	case B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE: /* Fall through */
+	case B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR:       /* Fall through */
+	case B2R2_BLT_FMT_YVU422_PACKED_SEMI_PLANAR:       /* Fall through */
+	case B2R2_BLT_FMT_YUV444_PACKED_PLANAR:
+		return width;
+
+	case B2R2_BLT_FMT_16_BIT_ARGB4444: /* Fall through */
+	case B2R2_BLT_FMT_16_BIT_ARGB1555: /* Fall through */
+	case B2R2_BLT_FMT_16_BIT_RGB565:   /* Fall through */
+	case B2R2_BLT_FMT_Y_CB_Y_CR:       /* Fall through */
+	case B2R2_BLT_FMT_CB_Y_CR_Y:
+		return width << 1;
+
+	case B2R2_BLT_FMT_24_BIT_RGB888:   /* Fall through */
+	case B2R2_BLT_FMT_24_BIT_ARGB8565: /* Fall through */
+	case B2R2_BLT_FMT_24_BIT_YUV888:   /* Fall through */
+	case B2R2_BLT_FMT_24_BIT_VUY888:
+		return width * 3;
+
+	case B2R2_BLT_FMT_32_BIT_ARGB8888: /* Fall through */
+	case B2R2_BLT_FMT_32_BIT_ABGR8888: /* Fall through */
+	case B2R2_BLT_FMT_32_BIT_AYUV8888: /* Fall through */
+	case B2R2_BLT_FMT_32_BIT_VUYA8888:
+		return width << 2;
+
+	default:
+		/* Should never, ever happen */
+		BUG_ON(1);
+		return 0;
+	}
+}
+
+/**
+ * b2r2_to_native_fmt() - returns the native B2R2 format
+ */
+enum b2r2_native_fmt b2r2_to_native_fmt(enum b2r2_blt_fmt fmt)
+{
+
+	switch (fmt) {
+	case B2R2_BLT_FMT_UNUSED:
+		return B2R2_NATIVE_RGB565;
+	case B2R2_BLT_FMT_1_BIT_A1:
+		return B2R2_NATIVE_A1;
+	case B2R2_BLT_FMT_8_BIT_A8:
+		return B2R2_NATIVE_A8;
+	case B2R2_BLT_FMT_16_BIT_RGB565:
+		return B2R2_NATIVE_RGB565;
+	case B2R2_BLT_FMT_16_BIT_ARGB4444:
+		return B2R2_NATIVE_ARGB4444;
+	case B2R2_BLT_FMT_16_BIT_ARGB1555:
+		return B2R2_NATIVE_ARGB1555;
+	case B2R2_BLT_FMT_24_BIT_ARGB8565:
+		return B2R2_NATIVE_ARGB8565;
+	case B2R2_BLT_FMT_24_BIT_RGB888:
+		return B2R2_NATIVE_RGB888;
+	case B2R2_BLT_FMT_24_BIT_YUV888:
+	case B2R2_BLT_FMT_24_BIT_VUY888: /* Not actually supported by HW */
+		return B2R2_NATIVE_YCBCR888;
+	case B2R2_BLT_FMT_32_BIT_ABGR8888: /* Not actually supported by HW */
+	case B2R2_BLT_FMT_32_BIT_ARGB8888:
+		return B2R2_NATIVE_ARGB8888;
+	case B2R2_BLT_FMT_32_BIT_AYUV8888:
+	case B2R2_BLT_FMT_32_BIT_VUYA8888: /* Not actually supported by HW */
+		return B2R2_NATIVE_AYCBCR8888;
+	case B2R2_BLT_FMT_CB_Y_CR_Y:
+		return B2R2_NATIVE_YCBCR422R;
+	case B2R2_BLT_FMT_Y_CB_Y_CR:
+		return B2R2_NATIVE_YCBCR422R;
+	case B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YVU420_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YVU422_PACKED_SEMI_PLANAR:
+		return B2R2_NATIVE_YCBCR42X_R2B;
+	case B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE:
+	case B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE:
+		return B2R2_NATIVE_YCBCR42X_MBN;
+	case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YVU420_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YVU422_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YUV444_PACKED_PLANAR:
+		return B2R2_NATIVE_YUV;
+	default:
+		/* Should never ever happen */
+		return B2R2_NATIVE_BYTE;
+	}
+}
+
+/**
+ * Bit-expand the color from fmt to RGB888 with blue at LSB.
+ * Copy MSBs into missing LSBs.
+ */
+u32 b2r2_to_RGB888(u32 color, const enum b2r2_blt_fmt fmt)
+{
+	u32 out_color = 0;
+	u32 r = 0;
+	u32 g = 0;
+	u32 b = 0;
+	switch (fmt) {
+	case B2R2_BLT_FMT_16_BIT_ARGB4444:
+		r = ((color & 0xf00) << 12) | ((color & 0xf00) << 8);
+		g = ((color & 0xf0) << 8) | ((color & 0xf0) << 4);
+		b = ((color & 0xf) << 4) | (color & 0xf);
+		out_color = r | g | b;
+		break;
+	case B2R2_BLT_FMT_16_BIT_ARGB1555:
+		r = ((color & 0x7c00) << 9) | ((color & 0x7000) << 4);
+		g = ((color & 0x3e0) << 6) | ((color & 0x380) << 1);
+		b = ((color & 0x1f) << 3) | ((color & 0x1c) >> 2);
+		out_color = r | g | b;
+		break;
+	case B2R2_BLT_FMT_16_BIT_RGB565:
+		r = ((color & 0xf800) << 8) | ((color & 0xe000) << 3);
+		g = ((color & 0x7e0) << 5) | ((color & 0x600) >> 1);
+		b = ((color & 0x1f) << 3) | ((color & 0x1c) >> 2);
+		out_color = r | g | b;
+		break;
+	case B2R2_BLT_FMT_24_BIT_RGB888:
+	case B2R2_BLT_FMT_32_BIT_ARGB8888:
+		out_color = color & 0xffffff;
+		break;
+	case B2R2_BLT_FMT_32_BIT_ABGR8888:
+		r = (color & 0xff) << 16;
+		g = color & 0xff00;
+		b = (color & 0xff0000) >> 16;
+		out_color = r | g | b;
+		break;
+	case B2R2_BLT_FMT_24_BIT_ARGB8565:
+		r = ((color & 0xf800) << 8) | ((color & 0xe000) << 3);
+		g = ((color & 0x7e0) << 5) | ((color & 0x600) >> 1);
+		b = ((color & 0x1f) << 3) | ((color & 0x1c) >> 2);
+		out_color = r | g | b;
+		break;
+	default:
+		break;
+	}
+
+	return out_color;
+}
+
+/**
+ * b2r2_get_fmt_type() - returns the type of the given format (raster, planar, etc.)
+ */
+enum b2r2_fmt_type b2r2_get_fmt_type(enum b2r2_blt_fmt fmt)
+{
+	switch (fmt) {
+	case B2R2_BLT_FMT_16_BIT_ARGB4444:
+	case B2R2_BLT_FMT_16_BIT_ARGB1555:
+	case B2R2_BLT_FMT_16_BIT_RGB565:
+	case B2R2_BLT_FMT_24_BIT_RGB888:
+	case B2R2_BLT_FMT_32_BIT_ARGB8888:
+	case B2R2_BLT_FMT_Y_CB_Y_CR:
+	case B2R2_BLT_FMT_CB_Y_CR_Y:
+	case B2R2_BLT_FMT_32_BIT_ABGR8888:
+	case B2R2_BLT_FMT_24_BIT_ARGB8565:
+	case B2R2_BLT_FMT_24_BIT_YUV888:
+	case B2R2_BLT_FMT_32_BIT_AYUV8888:
+	case B2R2_BLT_FMT_24_BIT_VUY888:
+	case B2R2_BLT_FMT_32_BIT_VUYA8888:
+	case B2R2_BLT_FMT_1_BIT_A1:
+	case B2R2_BLT_FMT_8_BIT_A8:
+		return B2R2_FMT_TYPE_RASTER;
+	case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YVU420_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YVU422_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YUV444_PACKED_PLANAR:
+		return B2R2_FMT_TYPE_PLANAR;
+	case B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YVU420_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YVU422_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE:
+	case B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE:
+		return B2R2_FMT_TYPE_SEMI_PLANAR;
+	default:
+		return B2R2_FMT_TYPE_RASTER;
+	}
+}
diff --git a/drivers/video/b2r2/b2r2_utils.h b/drivers/video/b2r2/b2r2_utils.h
index 0516447b42f..e639e454121 100644
--- a/drivers/video/b2r2/b2r2_utils.h
+++ b/drivers/video/b2r2/b2r2_utils.h
@@ -63,4 +63,22 @@ s32 b2r2_div_round_up(s32 dividend, s32 divisor);
 bool b2r2_is_aligned(s32 value, s32 alignment);
 s32 b2r2_align_up(s32 value, s32 alignment);
 
+enum b2r2_ty b2r2_get_alpha_range(enum b2r2_blt_fmt fmt);
+u8 b2r2_get_alpha(enum b2r2_blt_fmt fmt, u32 pixel);
+u32 b2r2_set_alpha(enum b2r2_blt_fmt fmt, u8 alpha, u32 color);
+bool b2r2_fmt_has_alpha(enum b2r2_blt_fmt fmt);
+bool b2r2_is_rgb_fmt(enum b2r2_blt_fmt fmt);
+bool b2r2_is_bgr_fmt(enum b2r2_blt_fmt fmt);
+bool b2r2_is_yuv_fmt(enum b2r2_blt_fmt fmt);
+bool b2r2_is_yvu_fmt(enum b2r2_blt_fmt fmt);
+bool b2r2_is_yuv420_fmt(enum b2r2_blt_fmt fmt);
+bool b2r2_is_yuv422_fmt(enum b2r2_blt_fmt fmt);
+bool b2r2_is_yvu420_fmt(enum b2r2_blt_fmt fmt);
+bool b2r2_is_yvu422_fmt(enum b2r2_blt_fmt fmt);
+bool b2r2_is_yuv444_fmt(enum b2r2_blt_fmt fmt);
+int b2r2_fmt_byte_pitch(enum b2r2_blt_fmt fmt, u32 width);
+enum b2r2_native_fmt b2r2_to_native_fmt(enum b2r2_blt_fmt fmt);
+u32 b2r2_to_RGB888(u32 color, const enum b2r2_blt_fmt fmt);
+enum b2r2_fmt_type b2r2_get_fmt_type(enum b2r2_blt_fmt fmt);
+
 #endif
diff --git a/include/video/b2r2_blt.h b/include/video/b2r2_blt.h
index 771d4f60fdb..0964c95af36 100644
--- a/include/video/b2r2_blt.h
+++ b/include/video/b2r2_blt.h
@@ -372,6 +372,7 @@ enum b2r2_blt_flag {
 	B2R2_BLT_FLAG_DST_NO_CACHE_FLUSH    = BIT(16),/*0x10000*/
 	B2R2_BLT_FLAG_BG_BLEND              = BIT(17),/*0x20000*/
 	B2R2_BLT_FLAG_BG_NO_CACHE_FLUSH     = BIT(18),/*0x40000*/
+	B2R2_BLT_FLAG_FULL_RANGE_YUV        = BIT(19),/*0x20000*/
 	B2R2_BLT_FLAG_REPORT_WHEN_DONE      = BIT(29),/*0x20000000*/
 	B2R2_BLT_FLAG_REPORT_PERFORMANCE    = BIT(30),/*0x40000000*/
 	B2R2_BLT_FLAG_CLUT_COLOR_CORRECTION = BIT(31),/*0x80000000*/
-- 
cgit v1.2.3


From f907dd40646ccca916b05fbc2ccd2eafa1d5e591 Mon Sep 17 00:00:00 2001
From: Torbjorn Svensson <torbjorn.x.svensson@stericsson.com>
Date: Thu, 12 Jan 2012 12:30:00 +0100
Subject: video: mcde: add rotbufsize

This adds rotbufsize and moves the declaration of the rotbufs from the
board-mop500-mcde.c file to the devices-db8500.c file.

ST-Ericsson ID: 373680
ST-Ericsson FOSS-OUT ID: Trivial
ST-Ericsson Linux next: NA

Change-Id: I72274c6cb51abf88acc4e2f2f845a816a3bcd5be
Signed-off-by: Torbjorn Svensson <torbjorn.x.svensson@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/45515
Reviewed-by: QATOOLS
Reviewed-by: QABUILD
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
---
 arch/arm/mach-ux500/board-mop500-mcde.c | 5 -----
 arch/arm/mach-ux500/board-u5500-mcde.c  | 2 --
 include/video/mcde.h                    | 5 +++++
 3 files changed, 5 insertions(+), 7 deletions(-)

diff --git a/arch/arm/mach-ux500/board-mop500-mcde.c b/arch/arm/mach-ux500/board-mop500-mcde.c
index 7d2f160f6c0..b90bf78c60d 100644
--- a/arch/arm/mach-ux500/board-mop500-mcde.c
+++ b/arch/arm/mach-ux500/board-mop500-mcde.c
@@ -104,9 +104,6 @@ static struct mcde_display_device samsung_s6d16d0_display0 = {
 #else
 	.synchronized_update = false,
 #endif
-	/* TODO: Remove rotation buffers once ESRAM driver is completed */
-	.rotbuf1 = U8500_ESRAM_BASE + 0x20000 * 4 + 0x2000,
-	.rotbuf2 = U8500_ESRAM_BASE + 0x20000 * 4 + 0x10000,
 	.dev = {
 		.platform_data = &samsung_s6d16d0_pdata0,
 	},
@@ -134,8 +131,6 @@ static struct mcde_display_device sony_acx424akp_display0 = {
 #else
 	.synchronized_update = false,
 #endif
-	.rotbuf1 = U8500_ESRAM_BASE + 0x20000 * 4 + 0x2000,
-	.rotbuf2 = U8500_ESRAM_BASE + 0x20000 * 4 + 0x10000,
 	.dev = {
 		.platform_data = &sony_acx424akp_display0_pdata,
 	},
diff --git a/arch/arm/mach-ux500/board-u5500-mcde.c b/arch/arm/mach-ux500/board-u5500-mcde.c
index 5c4ba76055d..b002b6f6688 100644
--- a/arch/arm/mach-ux500/board-u5500-mcde.c
+++ b/arch/arm/mach-ux500/board-u5500-mcde.c
@@ -87,8 +87,6 @@ static struct mcde_display_device sony_acx424akp_display0 = {
 #else
 	.synchronized_update = false,
 #endif
-	.rotbuf1 = U5500_ESRAM_BASE + 0x20000 * 2,
-	.rotbuf2 = U5500_ESRAM_BASE + 0x20000 * 2 + 0x10000,
 	.dev = {
 		.platform_data = &sony_acx424akp_display0_pdata,
 	},
diff --git a/include/video/mcde.h b/include/video/mcde.h
index 015350f4495..f55ad8dd69e 100644
--- a/include/video/mcde.h
+++ b/include/video/mcde.h
@@ -372,6 +372,11 @@ struct mcde_platform_data {
 	u8 outmux[5]; /* MCDE_CONF0.OUTMUXx */
 	u8 syncmux;   /* MCDE_CONF0.SYNCMUXx */
 
+	/* TODO: Remove once ESRAM allocator is done */
+	u32 rotbuf1;
+	u32 rotbuf2;
+	u32 rotbufsize;
+
 	const char *regulator_vana_id;
 	const char *regulator_mcde_epod_id;
 	const char *regulator_esram_epod_id;
-- 
cgit v1.2.3


From 73efbbbbfa125389e7d80cbae160557b26e3f16e Mon Sep 17 00:00:00 2001
From: Anders Bauer <anders.bauer@stericsson.com>
Date: Fri, 16 Dec 2011 13:38:18 +0100
Subject: video: mcde: send SET_TEAR_ON from display driver

The DSI command SET_TEAR_ON is sent in display
init sequence before EXIT_SLEEP.

ST-Ericsson ID: 405619
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I434b0190bab1457f7c814d488b6ce52bdcfcf570
Signed-off-by: Anders Bauer <anders.bauer@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/43218
Reviewed-by: Torbjorn SVENSSON <torbjorn.x.svensson@stericsson.com>
Reviewed-by: QATOOLS
Reviewed-by: QABUILD
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Tested-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
---
 drivers/video/mcde/display-samsung_s6d16d0.c    | 7 +++++++
 drivers/video/mcde/display-sony_acx424akp_dsi.c | 7 +++++++
 2 files changed, 14 insertions(+)

diff --git a/drivers/video/mcde/display-samsung_s6d16d0.c b/drivers/video/mcde/display-samsung_s6d16d0.c
index 62db3db6556..ac46a37130c 100644
--- a/drivers/video/mcde/display-samsung_s6d16d0.c
+++ b/drivers/video/mcde/display-samsung_s6d16d0.c
@@ -70,9 +70,16 @@ static int power_off(struct mcde_display_device *ddev)
 static int display_on(struct mcde_display_device *ddev)
 {
 	int ret;
+	u8 val = 0;
 
 	dev_dbg(&ddev->dev, "Display on s6d16d0\n");
 
+	ret = mcde_dsi_dcs_write(ddev->chnl_state,
+						DCS_CMD_SET_TEAR_ON, &val, 1);
+	if (ret)
+		dev_warn(&ddev->dev,
+			"%s:Failed to enable synchronized update\n", __func__);
+
 	ret = mcde_dsi_dcs_write(ddev->chnl_state, DCS_CMD_EXIT_SLEEP_MODE,
 								NULL, 0);
 	if (ret)
diff --git a/drivers/video/mcde/display-sony_acx424akp_dsi.c b/drivers/video/mcde/display-sony_acx424akp_dsi.c
index e5d8c19bff0..5a027203e9a 100644
--- a/drivers/video/mcde/display-sony_acx424akp_dsi.c
+++ b/drivers/video/mcde/display-sony_acx424akp_dsi.c
@@ -117,9 +117,16 @@ static int power_off(struct mcde_display_device *dev)
 static int display_on(struct mcde_display_device *ddev)
 {
 	int ret;
+	u8 val = 0;
 
 	dev_dbg(&ddev->dev, "Display on sony display\n");
 
+	ret = mcde_dsi_dcs_write(ddev->chnl_state,
+						DCS_CMD_SET_TEAR_ON, &val, 1);
+	if (ret)
+		dev_warn(&ddev->dev,
+			"%s:Failed to enable synchronized update\n", __func__);
+
 	ret = mcde_dsi_dcs_write(ddev->chnl_state, DCS_CMD_EXIT_SLEEP_MODE,
 								NULL, 0);
 	if (ret)
-- 
cgit v1.2.3


From 6f99b48c3f644ce08db9b8cbd62a87f39da42707 Mon Sep 17 00:00:00 2001
From: Anders Bauer <anders.bauer@stericsson.com>
Date: Tue, 10 Jan 2012 12:28:15 +0100
Subject: ux500: mcde: remove synchronized_update

The synchronized_update parameter is
removed and replaced by SYNCSRC_OFF
when disabling vertical synchronization
for display.

ST-Ericsson ID: 405619
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I3e7323b507266706edddc693cdf20da6079ae7f4
Signed-off-by: Anders Bauer <anders.bauer@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/45036
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Tested-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Reviewed-by: QATOOLS
Reviewed-by: QABUILD
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
---
 arch/arm/mach-ux500/Kconfig-arch        |  6 ------
 arch/arm/mach-ux500/board-mop500-mcde.c | 24 ++++++++++++------------
 arch/arm/mach-ux500/board-u5500-mcde.c  |  6 +-----
 3 files changed, 13 insertions(+), 23 deletions(-)

diff --git a/arch/arm/mach-ux500/Kconfig-arch b/arch/arm/mach-ux500/Kconfig-arch
index d05ab5a80d4..45fc2716814 100644
--- a/arch/arm/mach-ux500/Kconfig-arch
+++ b/arch/arm/mach-ux500/Kconfig-arch
@@ -45,12 +45,6 @@ config MCDE_DISPLAY_PRIMARY_32BPP
 
 endchoice
 
-config DISPLAY_GENERIC_DSI_PRIMARY_VSYNC
-	bool "Enable v-sync for primary display"
-	default n
-	help
-	  Say yes to enable v-sync for primary display
-
 config DISPLAY_AV8100_TRIPPLE_BUFFER
 	bool "Enable tripple buffer for HDMI display"
 	depends on MCDE_DISPLAY_AV8100
diff --git a/arch/arm/mach-ux500/board-mop500-mcde.c b/arch/arm/mach-ux500/board-mop500-mcde.c
index b90bf78c60d..36bbe12863a 100644
--- a/arch/arm/mach-ux500/board-mop500-mcde.c
+++ b/arch/arm/mach-ux500/board-mop500-mcde.c
@@ -89,6 +89,10 @@ static struct mcde_col_transform rgb_2_yCbCr_transform = {
 };
 #endif
 
+static struct mcde_port samsung_s6d16d0_port0 = {
+	.sync_src = MCDE_SYNCSRC_BTA,
+};
+
 static struct mcde_display_dsi_platform_data samsung_s6d16d0_pdata0 = {
 	.link = 0,
 };
@@ -96,14 +100,10 @@ static struct mcde_display_dsi_platform_data samsung_s6d16d0_pdata0 = {
 static struct mcde_display_device samsung_s6d16d0_display0 = {
 	.name = "samsung_s6d16d0",
 	.id = PRIMARY_DISPLAY_ID,
+	.port = &samsung_s6d16d0_port0,
 	.chnl_id = MCDE_CHNL_A,
 	.fifo = MCDE_FIFO_A,
 	.default_pixel_format = MCDE_OVLYPIXFMT_RGBA8888,
-#ifdef CONFIG_DISPLAY_GENERIC_DSI_PRIMARY_VSYNC
-	.synchronized_update = true,
-#else
-	.synchronized_update = false,
-#endif
 	.dev = {
 		.platform_data = &samsung_s6d16d0_pdata0,
 	},
@@ -111,6 +111,7 @@ static struct mcde_display_device samsung_s6d16d0_display0 = {
 
 static struct mcde_port sony_port0 = {
 	.link = 0,
+	.sync_src = MCDE_SYNCSRC_BTA,
 };
 
 static struct mcde_display_sony_acx424akp_platform_data
@@ -126,16 +127,15 @@ static struct mcde_display_device sony_acx424akp_display0 = {
 	.fifo = MCDE_FIFO_A,
 	.orientation = MCDE_DISPLAY_ROT_180_CW,
 	.default_pixel_format = MCDE_OVLYPIXFMT_RGBA8888,
-#ifdef CONFIG_DISPLAY_GENERIC_DSI_PRIMARY_VSYNC
-	.synchronized_update = true,
-#else
-	.synchronized_update = false,
-#endif
 	.dev = {
 		.platform_data = &sony_acx424akp_display0_pdata,
 	},
 };
 
+static struct mcde_port samsung_s6d16d0_port1 = {
+	.sync_src = MCDE_SYNCSRC_BTA,
+};
+
 static struct mcde_display_dsi_platform_data samsung_s6d16d0_pdata1 = {
 	.link = 1,
 };
@@ -143,11 +143,11 @@ static struct mcde_display_dsi_platform_data samsung_s6d16d0_pdata1 = {
 static struct mcde_display_device samsung_s6d16d0_display1 = {
 	.name = "samsung_s6d16d0",
 	.id = SECONDARY_DISPLAY_ID,
+	.port = &samsung_s6d16d0_port1,
 	.chnl_id = MCDE_CHNL_C1,
 	.fifo = MCDE_FIFO_C1,
 	.orientation = MCDE_DISPLAY_ROT_90_CCW,
 	.default_pixel_format = MCDE_OVLYPIXFMT_RGB565,
-	.synchronized_update = false,
 	.dev = {
 		.platform_data = &samsung_s6d16d0_pdata1,
 	},
@@ -478,7 +478,7 @@ static int __init init_display_devices(void)
 	/* Not all STUIBs supports VSYNC, disable vsync for STUIB */
 	if (uib_is_stuib()) {
 		/* Samsung display on STUIB */
-		samsung_s6d16d0_display0.synchronized_update = false;
+		samsung_s6d16d0_display0.port->sync_src = MCDE_SYNCSRC_OFF;
 		samsung_s6d16d0_display0.orientation = MCDE_DISPLAY_ROT_90_CCW;
 		(void)mcde_display_device_register(&samsung_s6d16d0_display0);
 	} else if (uib_is_u8500uib()) {
diff --git a/arch/arm/mach-ux500/board-u5500-mcde.c b/arch/arm/mach-ux500/board-u5500-mcde.c
index b002b6f6688..53345ecf13f 100644
--- a/arch/arm/mach-ux500/board-u5500-mcde.c
+++ b/arch/arm/mach-ux500/board-u5500-mcde.c
@@ -68,6 +68,7 @@ static struct mcde_col_transform rgb_2_yCbCr_transform = {
 
 static struct mcde_port sony_port0 = {
 	.link = 0,
+	.sync_src = MCDE_SYNCSRC_BTA,
 };
 
 static struct mcde_display_sony_acx424akp_platform_data \
@@ -82,11 +83,6 @@ static struct mcde_display_device sony_acx424akp_display0 = {
 	.chnl_id = MCDE_CHNL_A,
 	.fifo = MCDE_FIFO_A,
 	.default_pixel_format = MCDE_OVLYPIXFMT_RGBA8888,
-#ifdef CONFIG_DISPLAY_GENERIC_DSI_PRIMARY_VSYNC
-	.synchronized_update = true,
-#else
-	.synchronized_update = false,
-#endif
 	.dev = {
 		.platform_data = &sony_acx424akp_display0_pdata,
 	},
-- 
cgit v1.2.3


From 51da222046dff73d3b221b9a8bc72dbe7eb77013 Mon Sep 17 00:00:00 2001
From: Anders Bauer <anders.bauer@stericsson.com>
Date: Fri, 16 Dec 2011 13:13:47 +0100
Subject: video: mcde: remove synchronized_update

The SET_TEAR_ON command is sent in display
driver file which makes the
set_synchronized_update function
unnecessary and hence it is removed.

ST-Ericsson ID: 405619
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: Ie00000290ffb95ad490ba8c13d3eeb576fc8681e
Signed-off-by: Anders Bauer <anders.bauer@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/43219
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Tested-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Reviewed-by: QATOOLS
Reviewed-by: QABUILD
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
---
 drivers/video/mcde/display-generic_dsi.c        |  2 --
 drivers/video/mcde/display-sony_acx424akp_dsi.c |  2 --
 drivers/video/mcde/mcde_display.c               | 43 ----------------------
 drivers/video/mcde/mcde_dss.c                   | 47 -------------------------
 drivers/video/mcde/mcde_hw.c                    | 37 ++++++-------------
 include/video/mcde.h                            |  2 --
 include/video/mcde_display.h                    |  5 ---
 7 files changed, 11 insertions(+), 127 deletions(-)

diff --git a/drivers/video/mcde/display-generic_dsi.c b/drivers/video/mcde/display-generic_dsi.c
index 6c63f4cd750..dfbaa4a8765 100644
--- a/drivers/video/mcde/display-generic_dsi.c
+++ b/drivers/video/mcde/display-generic_dsi.c
@@ -254,8 +254,6 @@ static int generic_resume(struct mcde_display_device *ddev)
 	if (ret < 0)
 		dev_warn(&ddev->dev, "%s:Failed to resume display\n"
 			, __func__);
-	ddev->set_synchronized_update(ddev,
-					ddev->get_synchronized_update(ddev));
 	return ret;
 }
 
diff --git a/drivers/video/mcde/display-sony_acx424akp_dsi.c b/drivers/video/mcde/display-sony_acx424akp_dsi.c
index 5a027203e9a..78b1477c15c 100644
--- a/drivers/video/mcde/display-sony_acx424akp_dsi.c
+++ b/drivers/video/mcde/display-sony_acx424akp_dsi.c
@@ -368,8 +368,6 @@ static int sony_acx424akp_resume(struct mcde_display_device *ddev)
 	if (ret < 0)
 		dev_warn(&ddev->dev, "%s:Failed to resume display\n"
 			, __func__);
-	ddev->set_synchronized_update(ddev,
-					ddev->get_synchronized_update(ddev));
 	return ret;
 }
 
diff --git a/drivers/video/mcde/mcde_display.c b/drivers/video/mcde/mcde_display.c
index 1e71514ab34..bf8bd2ca92f 100644
--- a/drivers/video/mcde/mcde_display.c
+++ b/drivers/video/mcde/mcde_display.c
@@ -236,49 +236,10 @@ static inline enum mcde_display_rotation mcde_display_get_rotation_default(
 	return ddev->rotation;
 }
 
-static int mcde_display_set_synchronized_update_default(
-	struct mcde_display_device *ddev, bool enable)
-{
-	if (ddev->port->type == MCDE_PORTTYPE_DSI && enable) {
-		int ret;
-		u8 m = 0;
-
-		if (ddev->port->sync_src == MCDE_SYNCSRC_OFF)
-			return -EINVAL;
-
-		ret = mcde_dsi_dcs_write(ddev->chnl_state,
-						DCS_CMD_SET_TEAR_ON, &m, 1);
-		if (ret < 0) {
-			dev_warn(&ddev->dev,
-				"%s:Failed to set synchornized update = %d\n",
-				__func__, enable);
-			return ret;
-		}
-	}
-	ddev->synchronized_update = enable;
-	return 0;
-}
-
-static inline bool mcde_display_get_synchronized_update_default(
-	struct mcde_display_device *ddev)
-{
-	return ddev->synchronized_update;
-}
-
 static int mcde_display_apply_config_default(struct mcde_display_device *ddev)
 {
 	int ret;
 
-	ret = mcde_chnl_enable_synchronized_update(ddev->chnl_state,
-		ddev->synchronized_update);
-
-	if (ret < 0) {
-		dev_warn(&ddev->dev,
-			"%s:Failed to enable synchronized update\n",
-			__func__);
-		return ret;
-	}
-
 	if (!ddev->update_flags)
 		return 0;
 
@@ -396,10 +357,6 @@ void mcde_display_init_device(struct mcde_display_device *ddev)
 	ddev->get_pixel_format = mcde_display_get_pixel_format_default;
 	ddev->set_rotation = mcde_display_set_rotation_default;
 	ddev->get_rotation = mcde_display_get_rotation_default;
-	ddev->set_synchronized_update =
-				mcde_display_set_synchronized_update_default;
-	ddev->get_synchronized_update =
-				mcde_display_get_synchronized_update_default;
 	ddev->apply_config = mcde_display_apply_config_default;
 	ddev->invalidate_area = mcde_display_invalidate_area_default;
 	ddev->update = mcde_display_update_default;
diff --git a/drivers/video/mcde/mcde_dss.c b/drivers/video/mcde/mcde_dss.c
index a2ef0b652d7..35a6cbe9540 100644
--- a/drivers/video/mcde/mcde_dss.c
+++ b/drivers/video/mcde/mcde_dss.c
@@ -116,25 +116,10 @@ int mcde_dss_enable_display(struct mcde_display_device *ddev)
 		goto display_failed;
 	}
 
-	ret = ddev->set_synchronized_update(ddev,
-					ddev->get_synchronized_update(ddev));
-	if (ret < 0)
-		dev_warn(&ddev->dev, "Failed to set sync\n");
-
 	ret = ddev->set_rotation(ddev, ddev->get_rotation(ddev));
 	if (ret < 0)
 		dev_warn(&ddev->dev, "Failed to set rotation\n");
 
-	ret = mcde_chnl_enable_synchronized_update(ddev->chnl_state,
-		ddev->synchronized_update);
-	if (ret < 0) {
-		dev_warn(&ddev->dev,
-			"%s:Failed to enable synchronized update\n",
-			__func__);
-		goto enable_sync_failed;
-	}
-	/* TODO: call driver for all defaults like sync_update above */
-
 	dev_dbg(&ddev->dev, "Display enabled, chnl=%d\n",
 					ddev->chnl_id);
 	ddev->enabled = true;
@@ -142,8 +127,6 @@ int mcde_dss_enable_display(struct mcde_display_device *ddev)
 
 	return 0;
 
-enable_sync_failed:
-	ddev->set_power_mode(ddev, MCDE_DISPLAY_PM_OFF);
 display_failed:
 	mcde_chnl_disable(ddev->chnl_state);
 	mutex_unlock(&ddev->display_lock);
@@ -451,36 +434,6 @@ enum mcde_display_rotation mcde_dss_get_rotation(
 }
 EXPORT_SYMBOL(mcde_dss_get_rotation);
 
-int mcde_dss_set_synchronized_update(struct mcde_display_device *ddev,
-	bool enable)
-{
-	int ret;
-	mutex_lock(&ddev->display_lock);
-	ret = ddev->set_synchronized_update(ddev, enable);
-	if (ret)
-		goto sync_update_failed;
-
-	if (ddev->chnl_state)
-		mcde_chnl_enable_synchronized_update(ddev->chnl_state, enable);
-	mutex_unlock(&ddev->display_lock);
-	return 0;
-
-sync_update_failed:
-	mutex_unlock(&ddev->display_lock);
-	return ret;
-}
-EXPORT_SYMBOL(mcde_dss_set_synchronized_update);
-
-bool mcde_dss_get_synchronized_update(struct mcde_display_device *ddev)
-{
-	int ret;
-	mutex_lock(&ddev->display_lock);
-	ret = ddev->get_synchronized_update(ddev);
-	mutex_unlock(&ddev->display_lock);
-	return ret;
-}
-EXPORT_SYMBOL(mcde_dss_get_synchronized_update);
-
 int __init mcde_dss_init(void)
 {
 	return 0;
diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index d6c9dd3304e..3b394106416 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -283,7 +283,6 @@ struct chnl_regs {
 	u16 (*map_b)(u8);
 	bool palette_enable;
 	bool bcd;
-	bool synchronized_update;
 	bool roten;
 	u8   rotdir;
 	u32  rotbuf1;
@@ -365,7 +364,6 @@ struct mcde_chnl_state {
 	u16 (*map_g)(u8);
 	u16 (*map_b)(u8);
 	bool palette_enable;
-	bool synchronized_update;
 	struct mcde_video_mode vmode;
 	enum mcde_display_rotation rotation;
 	u32 rotbuf1;
@@ -2725,7 +2723,6 @@ static int _mcde_chnl_apply(struct mcde_chnl_state *chnl)
 	/* REVIEW: 180 deg? */
 
 	chnl->regs.bpp = portfmt2bpp(chnl->port.pixel_format);
-	chnl->regs.synchronized_update = chnl->synchronized_update;
 	chnl->regs.roten = roten;
 	chnl->regs.rotdir = rotdir;
 	chnl->regs.rotbuf1 = chnl->rotbuf1;
@@ -2808,15 +2805,17 @@ static void chnl_update_non_continous(struct mcde_chnl_state *chnl)
 	/* Commit settings to registers */
 	setup_channel(chnl);
 
-	if (chnl->regs.synchronized_update &&
-				chnl->power_mode == MCDE_DISPLAY_PM_ON) {
-		if (chnl->port.type == MCDE_PORTTYPE_DSI &&
-					chnl->port.sync_src == MCDE_SYNCSRC_BTA)
-			dsi_te_request(chnl);
-	} else {
-		do_softwaretrig(chnl);
-		dev_vdbg(&mcde_dev->dev, "Channel update (no sync), chnl=%d\n",
-			chnl->id);
+	if (chnl->port.type == MCDE_PORTTYPE_DSI) {
+		if (chnl->port.sync_src == MCDE_SYNCSRC_OFF) {
+			do_softwaretrig(chnl);
+			dev_vdbg(&mcde_dev->dev, "Channel update (no sync), "
+							"chnl=%d\n", chnl->id);
+		} else if (chnl->port.sync_src == MCDE_SYNCSRC_BTA) {
+			if (chnl->power_mode == MCDE_DISPLAY_PM_ON)
+				dsi_te_request(chnl);
+			else
+				do_softwaretrig(chnl);
+		}
 	}
 }
 
@@ -3021,20 +3020,6 @@ int mcde_chnl_set_rotation(struct mcde_chnl_state *chnl,
 	return 0;
 }
 
-int mcde_chnl_enable_synchronized_update(struct mcde_chnl_state *chnl,
-								bool enable)
-{
-	dev_vdbg(&mcde_dev->dev, "%s\n", __func__);
-	if (!chnl->reserved)
-		return -EINVAL;
-
-	chnl->synchronized_update = enable;
-
-	dev_vdbg(&mcde_dev->dev, "%s exit\n", __func__);
-
-	return 0;
-}
-
 int mcde_chnl_set_power_mode(struct mcde_chnl_state *chnl,
 				enum mcde_display_power_mode power_mode)
 {
diff --git a/include/video/mcde.h b/include/video/mcde.h
index f55ad8dd69e..94344812f33 100644
--- a/include/video/mcde.h
+++ b/include/video/mcde.h
@@ -277,8 +277,6 @@ int mcde_chnl_set_video_mode(struct mcde_chnl_state *chnl,
 /* TODO: Remove rotbuf* parameters when ESRAM allocator is implemented*/
 int mcde_chnl_set_rotation(struct mcde_chnl_state *chnl,
 		enum mcde_display_rotation rotation, u32 rotbuf1, u32 rotbuf2);
-int mcde_chnl_enable_synchronized_update(struct mcde_chnl_state *chnl,
-								bool enable);
 int mcde_chnl_set_power_mode(struct mcde_chnl_state *chnl,
 				enum mcde_display_power_mode power_mode);
 
diff --git a/include/video/mcde_display.h b/include/video/mcde_display.h
index b94e7befa8b..25a06aaae6b 100644
--- a/include/video/mcde_display.h
+++ b/include/video/mcde_display.h
@@ -62,7 +62,6 @@ struct mcde_display_device {
 	enum mcde_ovly_pix_fmt pixel_format;
 	enum mcde_display_rotation rotation;
 	enum mcde_display_rotation orientation;
-	bool synchronized_update;
 	struct mcde_video_mode video_mode;
 	int update_flags;
 	bool stay_alive;
@@ -99,10 +98,6 @@ struct mcde_display_device {
 	enum mcde_display_rotation (*get_rotation)(
 		struct mcde_display_device *dev);
 
-	int (*set_synchronized_update)(struct mcde_display_device *dev,
-		bool enable);
-	bool (*get_synchronized_update)(struct mcde_display_device *dev);
-
 	int (*apply_config)(struct mcde_display_device *dev);
 	int (*invalidate_area)(struct mcde_display_device *dev,
 						struct mcde_rectangle *area);
-- 
cgit v1.2.3


From 4728b0c732f4d1c8c80702ba8e4bf48bd627d273 Mon Sep 17 00:00:00 2001
From: Anders Bauer <anders.bauer@stericsson.com>
Date: Thu, 1 Dec 2011 16:41:53 +0100
Subject: video: mcde: use hw frame trig from mcde formatter

DSI BTA always rely on software frame trigger.
This patch introduces hardware frame trigger from
MCDE formatter and makes it selectable from LCD
driver to use either software or hardware frame
trigger on DSI BTA vertical synchronization.

ST-Ericsson ID: 405619
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: Idb7ed9b999760ecf3156895c9fd313a7613b39cb
Signed-off-by: Anders Bauer <anders.bauer@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/40866
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Tested-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Reviewed-by: QATOOLS
Reviewed-by: QABUILD
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
---
 drivers/video/mcde/display-samsung_s6d16d0.c    |   3 +-
 drivers/video/mcde/display-sony_acx424akp_dsi.c |   3 +-
 drivers/video/mcde/mcde_hw.c                    | 162 ++++++++++++++++--------
 include/video/mcde.h                            |   8 +-
 4 files changed, 117 insertions(+), 59 deletions(-)

diff --git a/drivers/video/mcde/display-samsung_s6d16d0.c b/drivers/video/mcde/display-samsung_s6d16d0.c
index ac46a37130c..900c3f70aa6 100644
--- a/drivers/video/mcde/display-samsung_s6d16d0.c
+++ b/drivers/video/mcde/display-samsung_s6d16d0.c
@@ -170,7 +170,8 @@ static int __devinit samsung_s6d16d0_probe(struct mcde_display_device *ddev)
 	di->port.type = MCDE_PORTTYPE_DSI;
 	di->port.mode = MCDE_PORTMODE_CMD;
 	di->port.pixel_format = MCDE_PORTPIXFMT_DSI_24BPP;
-	di->port.sync_src = MCDE_SYNCSRC_BTA;
+	di->port.sync_src = ddev->port->sync_src;
+	di->port.frame_trig = ddev->port->frame_trig;
 	di->port.phy.dsi.num_data_lanes = 2;
 	di->port.phy.dsi.host_eot_gen = true;
 	/* TODO: Move UI to mcde_hw.c when clk_get_rate(dsi) is done */
diff --git a/drivers/video/mcde/display-sony_acx424akp_dsi.c b/drivers/video/mcde/display-sony_acx424akp_dsi.c
index 78b1477c15c..a197f5cc1df 100644
--- a/drivers/video/mcde/display-sony_acx424akp_dsi.c
+++ b/drivers/video/mcde/display-sony_acx424akp_dsi.c
@@ -268,7 +268,8 @@ static int __devinit sony_acx424akp_probe(struct mcde_display_device *dev)
 	di->port.type = MCDE_PORTTYPE_DSI;
 	di->port.mode = MCDE_PORTMODE_CMD;
 	di->port.pixel_format = MCDE_PORTPIXFMT_DSI_24BPP;
-	di->port.sync_src = MCDE_SYNCSRC_BTA;
+	di->port.sync_src = dev->port->sync_src;
+	di->port.frame_trig = dev->port->frame_trig;
 	di->port.phy.dsi.num_data_lanes = 2;
 	di->port.link = port->link;
 	di->port.phy.dsi.host_eot_gen = true;
diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index 3b394106416..220b6dcb8e9 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -975,7 +975,8 @@ static void handle_dsi_irq(struct mcde_chnl_state *chnl, int i)
 		dsi_wreg(i, DSI_DIRECT_CMD_STS_CLR,
 				DSI_DIRECT_CMD_STS_CLR_TE_RECEIVED_CLR(true));
 		dev_vdbg(&mcde_dev->dev, "BTA TE DSI%d\n", i);
-		do_softwaretrig(chnl);
+		if (chnl->port.frame_trig == MCDE_TRIG_SW)
+			do_softwaretrig(chnl);
 	}
 
 	irq_status = dsi_rfld(i, DSI_CMD_MODE_STS_FLAG, ERR_NO_TE_FLAG);
@@ -1984,13 +1985,94 @@ static void update_vid_frame_parameters(struct mcde_port *port,
 							blkline_pck - 6);
 }
 
+static void set_vsync_method(u8 idx, struct mcde_port *port)
+{
+	u32 out_synch_src;
+	u32 src_synch;
+
+	if (port->type == MCDE_PORTTYPE_DSI) {
+		switch (port->frame_trig) {
+		case MCDE_TRIG_HW:
+			src_synch = MCDE_CHNL0SYNCHMOD_SRC_SYNCH_HARDWARE;
+			break;
+		case MCDE_TRIG_SW:
+			src_synch = MCDE_CHNL0SYNCHMOD_SRC_SYNCH_SOFTWARE;
+			break;
+		default:
+			src_synch = MCDE_CHNL0SYNCHMOD_SRC_SYNCH_HARDWARE;
+			break;
+		}
+
+		switch (port->sync_src) {
+		case MCDE_SYNCSRC_OFF:
+			out_synch_src =
+				MCDE_CHNL0SYNCHMOD_OUT_SYNCH_SRC_FORMATTER;
+			break;
+		case MCDE_SYNCSRC_TE0:
+			out_synch_src = MCDE_CHNL0SYNCHMOD_OUT_SYNCH_SRC_TE0;
+			if (src_synch ==
+				MCDE_CHNL0SYNCHMOD_SRC_SYNCH_SOFTWARE) {
+				dev_dbg(&mcde_dev->dev, "%s: badly configured "
+						"frame sync, TE0 defaulting "
+						"to hw frame trig\n", __func__);
+				src_synch =
+					MCDE_CHNL0SYNCHMOD_SRC_SYNCH_HARDWARE;
+			}
+			break;
+		case MCDE_SYNCSRC_TE1:
+			out_synch_src = MCDE_CHNL0SYNCHMOD_OUT_SYNCH_SRC_TE1;
+			if (src_synch ==
+				MCDE_CHNL0SYNCHMOD_SRC_SYNCH_SOFTWARE) {
+				dev_dbg(&mcde_dev->dev, "%s: badly configured "
+						"frame sync, TE1 defaulting "
+						"to hw frame trig\n", __func__);
+				src_synch =
+					MCDE_CHNL0SYNCHMOD_SRC_SYNCH_HARDWARE;
+			}
+			break;
+		case MCDE_SYNCSRC_BTA:
+			out_synch_src =
+				MCDE_CHNL0SYNCHMOD_OUT_SYNCH_SRC_FORMATTER;
+			break;
+		case MCDE_SYNCSRC_TE_POLLING:
+			out_synch_src =
+				MCDE_CHNL0SYNCHMOD_OUT_SYNCH_SRC_FORMATTER;
+			if (src_synch ==
+				MCDE_CHNL0SYNCHMOD_SRC_SYNCH_SOFTWARE) {
+				dev_dbg(&mcde_dev->dev, "%s: badly configured "
+					"frame sync, TE_POLLING defaulting "
+						"to hw frame trig\n", __func__);
+				src_synch =
+					MCDE_CHNL0SYNCHMOD_SRC_SYNCH_HARDWARE;
+			}
+			break;
+		default:
+			out_synch_src =
+				MCDE_CHNL0SYNCHMOD_OUT_SYNCH_SRC_FORMATTER;
+			src_synch = MCDE_CHNL0SYNCHMOD_SRC_SYNCH_HARDWARE;
+			dev_dbg(&mcde_dev->dev, "%s: no sync src selected, "
+						"defaulting to DSI BTA with "
+						"hw frame trig\n", __func__);
+			break;
+		}
+	} else if (port->type == MCDE_PORTTYPE_DPI) {
+		out_synch_src = MCDE_CHNL0SYNCHMOD_OUT_SYNCH_SRC_FORMATTER;
+		src_synch = port->update_auto_trig ?
+					MCDE_CHNL0SYNCHMOD_SRC_SYNCH_HARDWARE :
+					MCDE_CHNL0SYNCHMOD_SRC_SYNCH_SOFTWARE;
+	}
+
+	mcde_wreg(MCDE_CHNL0SYNCHMOD +
+		idx * MCDE_CHNL0SYNCHMOD_GROUPOFFSET,
+		MCDE_CHNL0SYNCHMOD_SRC_SYNCH(src_synch) |
+		MCDE_CHNL0SYNCHMOD_OUT_SYNCH_SRC(out_synch_src));
+}
+
 void update_channel_registers(enum mcde_chnl chnl_id, struct chnl_regs *regs,
 				struct mcde_port *port, enum mcde_fifo fifo,
 				struct mcde_video_mode *video_mode)
 {
 	u8 idx = chnl_id;
-	u32 out_synch_src = MCDE_CHNL0SYNCHMOD_OUT_SYNCH_SRC_FORMATTER;
-	u32 src_synch = MCDE_CHNL0SYNCHMOD_SRC_SYNCH_SOFTWARE;
 	u32 fifo_wtrmrk = 0;
 
 	dev_vdbg(&mcde_dev->dev, "%s\n", __func__);
@@ -2022,51 +2104,7 @@ void update_channel_registers(enum mcde_chnl chnl_id, struct chnl_regs *regs,
 		break;
 	}
 
-	/* Channel */
-	if (port->type == MCDE_PORTTYPE_DSI) {
-		if (port->update_auto_trig) {
-			switch (port->sync_src) {
-			case MCDE_SYNCSRC_TE0:
-				out_synch_src =
-				MCDE_CHNL0SYNCHMOD_OUT_SYNCH_SRC_TE0;
-				src_synch =
-				MCDE_CHNL0SYNCHMOD_SRC_SYNCH_HARDWARE;
-				break;
-			case MCDE_SYNCSRC_OFF:
-				src_synch =
-				MCDE_CHNL0SYNCHMOD_SRC_SYNCH_SOFTWARE;
-				break;
-			case MCDE_SYNCSRC_TE1:
-			default:
-				out_synch_src =
-				MCDE_CHNL0SYNCHMOD_OUT_SYNCH_SRC_TE1;
-				src_synch =
-				MCDE_CHNL0SYNCHMOD_SRC_SYNCH_HARDWARE;
-				break;
-			case MCDE_SYNCSRC_TE_POLLING:
-				src_synch =
-				MCDE_CHNL0SYNCHMOD_SRC_SYNCH_HARDWARE;
-				break;
-			case MCDE_SYNCSRC_FORMATTER:
-				out_synch_src =
-				MCDE_CHNL0SYNCHMOD_OUT_SYNCH_SRC_FORMATTER;
-				src_synch =
-				MCDE_CHNL0SYNCHMOD_SRC_SYNCH_HARDWARE;
-				break;
-			}
-		} else {
-			if (port->sync_src == MCDE_SYNCSRC_TE0) {
-				out_synch_src =
-				MCDE_CHNL0SYNCHMOD_OUT_SYNCH_SRC_TE0;
-				src_synch =
-				MCDE_CHNL0SYNCHMOD_SRC_SYNCH_HARDWARE;
-			}
-		}
-	} else if (port->type == MCDE_PORTTYPE_DPI) {
-		src_synch = port->update_auto_trig ?
-					MCDE_CHNL0SYNCHMOD_SRC_SYNCH_HARDWARE :
-					MCDE_CHNL0SYNCHMOD_SRC_SYNCH_SOFTWARE;
-	}
+	set_vsync_method(idx, port);
 
 	mcde_wreg(MCDE_CHNL0CONF + idx * MCDE_CHNL0CONF_GROUPOFFSET,
 		MCDE_CHNL0CONF_PPL(regs->ppl-1) |
@@ -2074,10 +2112,6 @@ void update_channel_registers(enum mcde_chnl chnl_id, struct chnl_regs *regs,
 	mcde_wreg(MCDE_CHNL0STAT + idx * MCDE_CHNL0STAT_GROUPOFFSET,
 		MCDE_CHNL0STAT_CHNLBLBCKGND_EN(false) |
 		MCDE_CHNL0STAT_CHNLRD(true));
-	mcde_wreg(MCDE_CHNL0SYNCHMOD +
-		idx * MCDE_CHNL0SYNCHMOD_GROUPOFFSET,
-		MCDE_CHNL0SYNCHMOD_SRC_SYNCH(src_synch) |
-		MCDE_CHNL0SYNCHMOD_OUT_SYNCH_SRC(out_synch_src));
 	mcde_wreg(MCDE_CHNL0BCKGNDCOL + idx * MCDE_CHNL0BCKGNDCOL_GROUPOFFSET,
 		MCDE_CHNL0BCKGNDCOL_B(0) |
 		MCDE_CHNL0BCKGNDCOL_G(0) |
@@ -2807,14 +2841,30 @@ static void chnl_update_non_continous(struct mcde_chnl_state *chnl)
 
 	if (chnl->port.type == MCDE_PORTTYPE_DSI) {
 		if (chnl->port.sync_src == MCDE_SYNCSRC_OFF) {
-			do_softwaretrig(chnl);
+			if (chnl->port.frame_trig == MCDE_TRIG_SW) {
+				do_softwaretrig(chnl);
+			} else {
+				enable_flow(chnl);
+				disable_flow(chnl);
+			}
 			dev_vdbg(&mcde_dev->dev, "Channel update (no sync), "
 							"chnl=%d\n", chnl->id);
 		} else if (chnl->port.sync_src == MCDE_SYNCSRC_BTA) {
-			if (chnl->power_mode == MCDE_DISPLAY_PM_ON)
+			if (chnl->power_mode == MCDE_DISPLAY_PM_ON) {
 				dsi_te_request(chnl);
-			else
-				do_softwaretrig(chnl);
+			} else {
+				if (chnl->port.frame_trig == MCDE_TRIG_SW)
+					do_softwaretrig(chnl);
+			}
+			if (chnl->port.frame_trig == MCDE_TRIG_HW) {
+				/*
+				 * During BTA TE the MCDE block will be stalled,
+				 * once the TE is received the DMA trig will
+				 * happen
+				 */
+				enable_flow(chnl);
+				disable_flow(chnl);
+			}
 		}
 	}
 }
diff --git a/include/video/mcde.h b/include/video/mcde.h
index 94344812f33..b9f6a6b55fd 100644
--- a/include/video/mcde.h
+++ b/include/video/mcde.h
@@ -46,7 +46,12 @@ enum mcde_sync_src {
 	MCDE_SYNCSRC_TE1 = 2, /* MCDE ext TE1 */
 	MCDE_SYNCSRC_BTA = 3, /* DSI BTA */
 	MCDE_SYNCSRC_TE_POLLING = 4, /* DSI TE_POLLING */
-	MCDE_SYNCSRC_FORMATTER = 5, /* Sync from formatter */
+};
+
+/* Frame trig method */
+enum mcde_trig_method {
+	MCDE_TRIG_HW = 0, /* frame trig from MCDE formatter */
+	MCDE_TRIG_SW = 1, /* frame trig from software */
 };
 
 /* Interface pixel formats (output) */
@@ -118,6 +123,7 @@ struct mcde_port {
 	u8 ifc;
 	u8 link;
 	enum mcde_sync_src sync_src;
+	enum mcde_trig_method frame_trig;
 	bool update_auto_trig;
 	enum mcde_hdmi_sdtv_switch hdmi_sdtv_switch;
 	union {
-- 
cgit v1.2.3


From ebe29ef21682470fa88500777b19d88cb8e24c85 Mon Sep 17 00:00:00 2001
From: Anders Bauer <anders.bauer@stericsson.com>
Date: Thu, 1 Dec 2011 16:05:17 +0100
Subject: ux500: mcde: use software trig for display refresh

The DSI display panel drivers by default uses
DSI BTA for TE signaling and software trigger
for frame refresh.

ST-Ericsson ID: 405619
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I4f31c13f2883e03cb074021ebe505dd6cfbc60c6
Signed-off-by: Anders Bauer <anders.bauer@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/40865
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Tested-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Reviewed-by: QATOOLS
Reviewed-by: QABUILD
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
---
 arch/arm/mach-ux500/board-mop500-mcde.c | 3 +++
 arch/arm/mach-ux500/board-u5500-mcde.c  | 1 +
 2 files changed, 4 insertions(+)

diff --git a/arch/arm/mach-ux500/board-mop500-mcde.c b/arch/arm/mach-ux500/board-mop500-mcde.c
index 36bbe12863a..7ddd9f2fb4e 100644
--- a/arch/arm/mach-ux500/board-mop500-mcde.c
+++ b/arch/arm/mach-ux500/board-mop500-mcde.c
@@ -91,6 +91,7 @@ static struct mcde_col_transform rgb_2_yCbCr_transform = {
 
 static struct mcde_port samsung_s6d16d0_port0 = {
 	.sync_src = MCDE_SYNCSRC_BTA,
+	.frame_trig = MCDE_TRIG_SW,
 };
 
 static struct mcde_display_dsi_platform_data samsung_s6d16d0_pdata0 = {
@@ -112,6 +113,7 @@ static struct mcde_display_device samsung_s6d16d0_display0 = {
 static struct mcde_port sony_port0 = {
 	.link = 0,
 	.sync_src = MCDE_SYNCSRC_BTA,
+	.frame_trig = MCDE_TRIG_HW,
 };
 
 static struct mcde_display_sony_acx424akp_platform_data
@@ -134,6 +136,7 @@ static struct mcde_display_device sony_acx424akp_display0 = {
 
 static struct mcde_port samsung_s6d16d0_port1 = {
 	.sync_src = MCDE_SYNCSRC_BTA,
+	.frame_trig = MCDE_TRIG_SW,
 };
 
 static struct mcde_display_dsi_platform_data samsung_s6d16d0_pdata1 = {
diff --git a/arch/arm/mach-ux500/board-u5500-mcde.c b/arch/arm/mach-ux500/board-u5500-mcde.c
index 53345ecf13f..d28ee6473df 100644
--- a/arch/arm/mach-ux500/board-u5500-mcde.c
+++ b/arch/arm/mach-ux500/board-u5500-mcde.c
@@ -69,6 +69,7 @@ static struct mcde_col_transform rgb_2_yCbCr_transform = {
 static struct mcde_port sony_port0 = {
 	.link = 0,
 	.sync_src = MCDE_SYNCSRC_BTA,
+	.frame_trig = MCDE_TRIG_SW,
 };
 
 static struct mcde_display_sony_acx424akp_platform_data \
-- 
cgit v1.2.3


From 22a2dbf89186f2079f989e2b25e32856dc99492b Mon Sep 17 00:00:00 2001
From: Torbjorn Svensson <torbjorn.x.svensson@stericsson.com>
Date: Tue, 17 Jan 2012 09:34:25 +0100
Subject: video: mcde: enable rotbufsize

This patch enables rotbufsize by making the neccesary mcde_hw.c changes.

ST-Ericsson ID: 373680
ST-Ericsson FOSS-OUT ID: Trivial
ST-Ericsson Linux next: NA

Change-Id: Ia0ee39696199ccf01a65a473a685bf8d59cba379
Signed-off-by: Torbjorn Svensson <torbjorn.x.svensson@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/45632
Reviewed-by: QATOOLS
Reviewed-by: QABUILD
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Tested-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
---
 drivers/video/mcde/mcde_display.c |  3 +--
 drivers/video/mcde/mcde_hw.c      | 11 ++++++++---
 include/video/mcde.h              |  2 +-
 include/video/mcde_display.h      |  4 +---
 4 files changed, 11 insertions(+), 9 deletions(-)

diff --git a/drivers/video/mcde/mcde_display.c b/drivers/video/mcde/mcde_display.c
index bf8bd2ca92f..9e9eb78516e 100644
--- a/drivers/video/mcde/mcde_display.c
+++ b/drivers/video/mcde/mcde_display.c
@@ -214,8 +214,7 @@ static int mcde_display_set_rotation_default(struct mcde_display_device *ddev,
 	enum mcde_display_rotation final;
 
 	final = (360 + rotation - ddev->orientation) % 360;
-	ret = mcde_chnl_set_rotation(ddev->chnl_state, final,
-						ddev->rotbuf1, ddev->rotbuf2);
+	ret = mcde_chnl_set_rotation(ddev->chnl_state, final);
 	if (WARN_ON(ret))
 		return ret;
 
diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index 220b6dcb8e9..afa53e90712 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -287,6 +287,7 @@ struct chnl_regs {
 	u8   rotdir;
 	u32  rotbuf1;
 	u32  rotbuf2;
+	u32  rotbufsize;
 
 	/* Blending */
 	u8 blend_ctrl;
@@ -368,6 +369,7 @@ struct mcde_chnl_state {
 	enum mcde_display_rotation rotation;
 	u32 rotbuf1;
 	u32 rotbuf2;
+	u32 rotbufsize;
 
 	struct mcde_col_transform rgb_2_ycbcr;
 	struct mcde_col_transform ycbcr_2_rgb;
@@ -2665,6 +2667,7 @@ static struct mcde_chnl_state *_mcde_chnl_get(enum mcde_chnl chnl_id,
 {
 	int i;
 	struct mcde_chnl_state *chnl = NULL;
+	struct mcde_platform_data *pdata = mcde_dev->dev.platform_data;
 
 	static struct mcde_col_transform ycbcr_2_rgb = {
 		/* Note that in MCDE YUV 422 pixels come as VYU pixels */
@@ -2708,6 +2711,9 @@ static struct mcde_chnl_state *_mcde_chnl_get(enum mcde_chnl chnl_id,
 	chnl->blend_en = true;
 	chnl->blend_ctrl = MCDE_CRA0_BLENDCTRL_SOURCE;
 	chnl->alpha_blend = 0xFF;
+	chnl->rotbuf1 = pdata->rotbuf1;
+	chnl->rotbuf2 = pdata->rotbuf2;
+	chnl->rotbufsize = pdata->rotbufsize;
 
 	_mcde_chnl_apply(chnl);
 	chnl->reserved = true;
@@ -2761,6 +2767,7 @@ static int _mcde_chnl_apply(struct mcde_chnl_state *chnl)
 	chnl->regs.rotdir = rotdir;
 	chnl->regs.rotbuf1 = chnl->rotbuf1;
 	chnl->regs.rotbuf2 = chnl->rotbuf2;
+	chnl->regs.rotbufsize = chnl->rotbufsize;
 	chnl->regs.palette_enable = chnl->palette_enable;
 	chnl->regs.map_r = chnl->map_r;
 	chnl->regs.map_g = chnl->map_g;
@@ -3049,7 +3056,7 @@ int mcde_chnl_set_video_mode(struct mcde_chnl_state *chnl,
 EXPORT_SYMBOL(mcde_chnl_set_video_mode);
 
 int mcde_chnl_set_rotation(struct mcde_chnl_state *chnl,
-		enum mcde_display_rotation rotation, u32 rotbuf1, u32 rotbuf2)
+					enum mcde_display_rotation rotation)
 {
 	dev_vdbg(&mcde_dev->dev, "%s\n", __func__);
 
@@ -3062,8 +3069,6 @@ int mcde_chnl_set_rotation(struct mcde_chnl_state *chnl,
 		return -EINVAL;
 
 	chnl->rotation = rotation;
-	chnl->rotbuf1  = rotbuf1;
-	chnl->rotbuf2  = rotbuf2;
 
 	dev_vdbg(&mcde_dev->dev, "%s exit\n", __func__);
 
diff --git a/include/video/mcde.h b/include/video/mcde.h
index b9f6a6b55fd..499ce5cfecc 100644
--- a/include/video/mcde.h
+++ b/include/video/mcde.h
@@ -282,7 +282,7 @@ int mcde_chnl_set_video_mode(struct mcde_chnl_state *chnl,
 					struct mcde_video_mode *vmode);
 /* TODO: Remove rotbuf* parameters when ESRAM allocator is implemented*/
 int mcde_chnl_set_rotation(struct mcde_chnl_state *chnl,
-		enum mcde_display_rotation rotation, u32 rotbuf1, u32 rotbuf2);
+					enum mcde_display_rotation rotation);
 int mcde_chnl_set_power_mode(struct mcde_chnl_state *chnl,
 				enum mcde_display_power_mode power_mode);
 
diff --git a/include/video/mcde_display.h b/include/video/mcde_display.h
index 25a06aaae6b..5130b228d84 100644
--- a/include/video/mcde_display.h
+++ b/include/video/mcde_display.h
@@ -48,9 +48,7 @@ struct mcde_display_device {
 	struct mcde_chnl_state *chnl_state;
 	struct list_head ovlys;
 	struct mcde_rectangle update_area;
-	/* TODO: Remove once ESRAM allocator is done */
-	u32 rotbuf1;
-	u32 rotbuf2;
+
 
 	/* Display driver internal */
 	u16 native_x_res;
-- 
cgit v1.2.3


From 8b16cc380e5dbaa57d1954cceed882ffb4f9e2f2 Mon Sep 17 00:00:00 2001
From: Yann Gautier <yann.gautier@stericsson.com>
Date: Tue, 10 Jan 2012 09:36:14 +0100
Subject: video: mach-ux500: Add support for 9540

ST-Ericsson ID: 398896

Signed-off-by: Yann Gautier <yann.gautier@stericsson.com>
---
 arch/arm/mach-ux500/board-mop500-mcde.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/mach-ux500/board-mop500-mcde.c b/arch/arm/mach-ux500/board-mop500-mcde.c
index 7ddd9f2fb4e..97d68cdeb85 100644
--- a/arch/arm/mach-ux500/board-mop500-mcde.c
+++ b/arch/arm/mach-ux500/board-mop500-mcde.c
@@ -429,7 +429,7 @@ static int __init init_display_devices(void)
 	}
 
 	/* Display reset GPIO is different depending on reference boards */
-	if (machine_is_hrefv60()) {
+	if (machine_is_hrefv60() || machine_is_u9540()) {
 		samsung_s6d16d0_pdata0.reset_gpio = HREFV60_DISP1_RST_GPIO;
 		samsung_s6d16d0_pdata1.reset_gpio = HREFV60_DISP2_RST_GPIO;
 	} else {
-- 
cgit v1.2.3


From 7d0073edc6aa56185574b1fa7e52df6882d31d61 Mon Sep 17 00:00:00 2001
From: Bengt Jonsson <bengt.g.jonsson@stericsson.com>
Date: Thu, 2 Feb 2012 11:36:49 +0100
Subject: mcde: ux500: Add U8520 machine

ST-Ericsson ID: 371953

Signed-off-by: Bengt Jonsson <bengt.g.jonsson@stericsson.com>
---
 arch/arm/mach-ux500/board-mop500-mcde.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/mach-ux500/board-mop500-mcde.c b/arch/arm/mach-ux500/board-mop500-mcde.c
index 97d68cdeb85..d9b7fbf8a32 100644
--- a/arch/arm/mach-ux500/board-mop500-mcde.c
+++ b/arch/arm/mach-ux500/board-mop500-mcde.c
@@ -429,7 +429,7 @@ static int __init init_display_devices(void)
 	}
 
 	/* Display reset GPIO is different depending on reference boards */
-	if (machine_is_hrefv60() || machine_is_u9540()) {
+	if (machine_is_hrefv60() || machine_is_u8520() || machine_is_u9540()) {
 		samsung_s6d16d0_pdata0.reset_gpio = HREFV60_DISP1_RST_GPIO;
 		samsung_s6d16d0_pdata1.reset_gpio = HREFV60_DISP2_RST_GPIO;
 	} else {
-- 
cgit v1.2.3


From 5ce10cd55898e8dba21d40cad3e911c8ffa52140 Mon Sep 17 00:00:00 2001
From: Jimmy Rubin <jimmy.rubin@stericsson.com>
Date: Fri, 3 Feb 2012 14:08:13 +0100
Subject: video: mcde: Add set_rotation to display_av8100.c

The function set_rotation should be handled in the av8100
display driver. Set_rotation should just return 0 because
mcde should not rotate for the channel connected to av8100.

ST-Ericsson ID: 412591
ST-Ericsson FOSS-OUT ID: Trivial
ST_Ericsson Linux next: NA

Change-Id: If18c048f9bd2507bbb93206211924c467ca77e46
Signed-off-by: Jimmy Rubin <jimmy.rubin@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/47793
Reviewed-by: QABUILD
Reviewed-by: Jonas ABERG <jonas.aberg@stericsson.com>
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
---
 drivers/video/mcde/display-av8100.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/video/mcde/display-av8100.c b/drivers/video/mcde/display-av8100.c
index b5116621e16..b443f7f1760 100644
--- a/drivers/video/mcde/display-av8100.c
+++ b/drivers/video/mcde/display-av8100.c
@@ -1421,6 +1421,13 @@ set_power_and_exit:
 	return ret;
 }
 
+static int hdmi_set_rotation(struct mcde_display_device *ddev,
+				enum mcde_display_rotation rotation)
+{
+	/* Not possible to rotate HDMI */
+	return 0;
+}
+
 static int __devinit hdmi_probe(struct mcde_display_device *dev)
 {
 	int ret = 0;
@@ -1457,6 +1464,7 @@ static int __devinit hdmi_probe(struct mcde_display_device *dev)
 	dev->apply_config = hdmi_apply_config;
 	dev->set_pixel_format = hdmi_set_pixel_format;
 	dev->set_power_mode = hdmi_set_power_mode;
+	dev->set_rotation = hdmi_set_rotation;
 
 	port = dev->port;
 
-- 
cgit v1.2.3


From 640a92c3f6e24fff4a0f84c87da63957e371046d Mon Sep 17 00:00:00 2001
From: Torbjorn Svensson <torbjorn.x.svensson@stericsson.com>
Date: Fri, 13 Jan 2012 15:55:34 +0100
Subject: video: mcde: optimized stripe calculation

This patch adds stripe calculation, based on the rotbufsize and
display panel width.

ST-Ericsson ID: 373680
ST-Ericsson FOSS-OUT ID: Trivial
ST-Ericsson Linux next: NA

Change-Id: I3e14d49a97cc635c244950cd40ceb9584588c736
Signed-off-by: Torbjorn Svensson <torbjorn.x.svensson@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/45516
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
Reviewed-by: QATOOLS
Reviewed-by: QABUILD
---
 drivers/video/mcde/mcde_hw.c | 19 ++++++++++++++++++-
 1 file changed, 18 insertions(+), 1 deletion(-)

diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index afa53e90712..7f86028dc49 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -2246,6 +2246,23 @@ void update_channel_registers(enum mcde_chnl chnl_id, struct chnl_regs *regs,
 	}
 
 	if (regs->roten) {
+		u32 stripwidth;
+		u32 stripwidth_val;
+
+		/* calc strip width, 32 bits used internally */
+		stripwidth = regs->rotbufsize / (video_mode->yres * 4);
+		if (stripwidth >= 32)
+			stripwidth_val = MCDE_ROTACONF_STRIP_WIDTH_32PIX;
+		else if (stripwidth >= 16)
+			stripwidth_val = MCDE_ROTACONF_STRIP_WIDTH_16PIX;
+		else if (stripwidth >= 8)
+			stripwidth_val = MCDE_ROTACONF_STRIP_WIDTH_8PIX;
+		else if (stripwidth >= 4)
+			stripwidth_val = MCDE_ROTACONF_STRIP_WIDTH_4PIX;
+		else
+			stripwidth_val = MCDE_ROTACONF_STRIP_WIDTH_2PIX;
+		dev_vdbg(&mcde_dev->dev, "%s stripwidth=%d\n", __func__,
+						1 << (stripwidth_val + 1));
 		mcde_wreg(MCDE_ROTADD0A + chnl_id * MCDE_ROTADD0A_GROUPOFFSET,
 			regs->rotbuf1);
 		mcde_wreg(MCDE_ROTADD1A + chnl_id * MCDE_ROTADD1A_GROUPOFFSET,
@@ -2253,7 +2270,7 @@ void update_channel_registers(enum mcde_chnl chnl_id, struct chnl_regs *regs,
 		mcde_wreg(MCDE_ROTACONF + chnl_id * MCDE_ROTACONF_GROUPOFFSET,
 			MCDE_ROTACONF_ROTBURSTSIZE_ENUM(HW_8W) |
 			MCDE_ROTACONF_ROTDIR(regs->rotdir) |
-			MCDE_ROTACONF_STRIP_WIDTH_ENUM(16PIX) |
+			MCDE_ROTACONF_STRIP_WIDTH(stripwidth_val) |
 			MCDE_ROTACONF_RD_MAXOUT_ENUM(4_REQ) |
 			MCDE_ROTACONF_WR_MAXOUT_ENUM(8_REQ));
 	}
-- 
cgit v1.2.3


From 831c918211d7a0cbe149b109b2c37210063b8442 Mon Sep 17 00:00:00 2001
From: Torbjorn Svensson <torbjorn.x.svensson@stericsson.com>
Date: Mon, 6 Feb 2012 12:43:48 +0100
Subject: video: mcde: remove compile time warnings

This patch removes two compile time warnings caused by previous patch.

ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: Trivial

Signed-off-by: Torbjorn Svensson <torbjorn.x.svensson@stericsson.com>
Change-Id: Idd682c41109b6afbdbac6499bc5942aeb66ba884
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/47976
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Reviewed-by: QABUILD
---
 drivers/video/mcde/mcde_hw.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index 7f86028dc49..535e719075d 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -1989,8 +1989,8 @@ static void update_vid_frame_parameters(struct mcde_port *port,
 
 static void set_vsync_method(u8 idx, struct mcde_port *port)
 {
-	u32 out_synch_src;
-	u32 src_synch;
+	u32 out_synch_src = MCDE_CHNL0SYNCHMOD_OUT_SYNCH_SRC_FORMATTER;
+	u32 src_synch = MCDE_CHNL0SYNCHMOD_SRC_SYNCH_HARDWARE;
 
 	if (port->type == MCDE_PORTTYPE_DSI) {
 		switch (port->frame_trig) {
-- 
cgit v1.2.3


From 0916240626429038bb483ea8f22ec477f2c56b3f Mon Sep 17 00:00:00 2001
From: Per-Daniel Olsson <per-daniel.olsson@stericsson.com>
Date: Thu, 16 Feb 2012 13:03:43 +0100
Subject: video: Correction for scan mode in sony_acx424akp

The coordinates are wrong with 180 degrees in the portrait case.

ST-Ericsson ID: 417518
ST-Ericsson Linux next: -
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: Iec925ad8b518fdcafe9d8c2892766215b2616750
Signed-off-by: Per-Daniel Olsson <per-daniel.olsson@stericsson.com>
Change-Id: If91d85d7d3305170d2f2dde27cfc4e8e0f954aed
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/49188
Reviewed-by: QABUILD
Reviewed-by: Torbjorn SVENSSON <torbjorn.x.svensson@stericsson.com>
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Reviewed-by: QATEST
---
 drivers/video/mcde/display-sony_acx424akp_dsi.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/video/mcde/display-sony_acx424akp_dsi.c b/drivers/video/mcde/display-sony_acx424akp_dsi.c
index a197f5cc1df..867bbb37375 100644
--- a/drivers/video/mcde/display-sony_acx424akp_dsi.c
+++ b/drivers/video/mcde/display-sony_acx424akp_dsi.c
@@ -241,8 +241,7 @@ static int sony_acx424akp_set_power_mode(struct mcde_display_device *ddev,
 		ddev->power_mode = MCDE_DISPLAY_PM_OFF;
 	}
 
-	mcde_chnl_set_power_mode(ddev->chnl_state, ddev->power_mode);
-	return sony_acx424akp_set_scan_mode(ddev, power_mode);
+	return mcde_chnl_set_power_mode(ddev->chnl_state, ddev->power_mode);
 }
 
 static int __devinit sony_acx424akp_probe(struct mcde_display_device *dev)
-- 
cgit v1.2.3


From ad9a2f95be71b544b02d2b67cc3af19160076418 Mon Sep 17 00:00:00 2001
From: Per-Daniel Olsson <per-daniel.olsson@stericsson.com>
Date: Thu, 16 Feb 2012 13:12:57 +0100
Subject: ux500: mcde: Changing sony_acx424akp orientation

The orientation for the sony_acx424akp display was incorrectly
set to 180 degrees. The orientation is now set to 0 degrees.

ST-Ericsson ID: 417518
ST-Ericsson Linux next: -
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I7896a411664ec5a3109e9a04408bca50049033d1
Signed-off-by: Per-Daniel Olsson <per-daniel.olsson@stericsson.com>
Change-Id: I49a31c85021bc49e8244d882fc66038c837361d0
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/49192
Reviewed-by: QABUILD
Reviewed-by: Torbjorn SVENSSON <torbjorn.x.svensson@stericsson.com>
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Reviewed-by: QATEST
---
 arch/arm/mach-ux500/board-mop500-mcde.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/mach-ux500/board-mop500-mcde.c b/arch/arm/mach-ux500/board-mop500-mcde.c
index d9b7fbf8a32..5400db27b7e 100644
--- a/arch/arm/mach-ux500/board-mop500-mcde.c
+++ b/arch/arm/mach-ux500/board-mop500-mcde.c
@@ -127,7 +127,7 @@ static struct mcde_display_device sony_acx424akp_display0 = {
 	.port = &sony_port0,
 	.chnl_id = MCDE_CHNL_A,
 	.fifo = MCDE_FIFO_A,
-	.orientation = MCDE_DISPLAY_ROT_180_CW,
+	.orientation = MCDE_DISPLAY_ROT_0,
 	.default_pixel_format = MCDE_OVLYPIXFMT_RGBA8888,
 	.dev = {
 		.platform_data = &sony_acx424akp_display0_pdata,
-- 
cgit v1.2.3


From 855aa2485f2dd99687363f67ad61ad981fb11cc0 Mon Sep 17 00:00:00 2001
From: Rabin Vincent <rabin.vincent@stericsson.com>
Date: Wed, 22 Feb 2012 10:46:48 +0530
Subject: dispdev: don't write to read-only memory

dispdev sprintf()s onto a string literal, which could have been
placed in read-only memory.

ST-Ericsson ID: 418951
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: If65516146dc929cc058718d10e70d19f923b98a5
Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/49881
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
Reviewed-by: QATOOLS
Reviewed-by: QABUILD
Reviewed-by: QATEST
Reviewed-by: Jonas ABERG <jonas.aberg@stericsson.com>
---
 drivers/misc/dispdev/dispdev.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/misc/dispdev/dispdev.c b/drivers/misc/dispdev/dispdev.c
index c504b69e80c..5413a252d35 100644
--- a/drivers/misc/dispdev/dispdev.c
+++ b/drivers/misc/dispdev/dispdev.c
@@ -74,6 +74,7 @@ struct dispdev {
 	 * unregister_buffer as in the rotation use case.
 	 */
 	bool first_update;
+	char name[sizeof(DISPDEV_DEFAULT_DEVICE_PREFIX) + 3];
 };
 
 static int find_buf(struct dispdev *dd, enum buffer_state state)
@@ -536,14 +537,14 @@ int dispdev_create(struct mcde_display_device *ddev, bool overlay,
 	struct mcde_overlay_info info = {0};
 
 	static int counter;
-	char *name = "dispdev0";
 
 	dd = kzalloc(sizeof(struct dispdev), GFP_KERNEL);
 	if (!dd)
 		return -ENOMEM;
 
-	sprintf(name, "%s%d", DISPDEV_DEFAULT_DEVICE_PREFIX, counter++);
-	init_dispdev(dd, ddev, name, overlay);
+	snprintf(dd->name, sizeof(dd->name), "%s%d",
+		 DISPDEV_DEFAULT_DEVICE_PREFIX, counter++);
+	init_dispdev(dd, ddev, dd->name, overlay);
 
 	if (!overlay) {
 		ret = mcde_dss_enable_display(ddev);
-- 
cgit v1.2.3


From 809e8bdcb464d4be59d04825873f41ecebf9dc28 Mon Sep 17 00:00:00 2001
From: Jorgen Nilsson <jorgen.nilsson@stericsson.com>
Date: Fri, 27 Jan 2012 15:26:45 +0100
Subject: b2r2: Improve image quality for HDMI clone

The downscale filter for scale factors from 1 to 1.4
has been modified to reduce ringing effects. Ringing
effects occur when the filter is a sinc function and the
input is the step function (high contrast, e.g. a black
line on a white surface). Destination pixels that were
close to high contrast edges could be visibly contaminated
by content from the opposite side of the edge.

ST-Ericsson ID: 410185
ST-Ericsson Linux next: NA
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I789988e6e08cddc91f5364543efcc6287165b1b2
Signed-off-by: Jorgen Nilsson <jorgen.nilsson@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/50567
Reviewed-by: Robert FEKETE <robert.fekete@stericsson.com>
---
 drivers/video/b2r2/b2r2_filters.c | 33 +++++++++++++++++----------------
 1 file changed, 17 insertions(+), 16 deletions(-)

diff --git a/drivers/video/b2r2/b2r2_filters.c b/drivers/video/b2r2/b2r2_filters.c
index a969816a9e7..a93eb60d91f 100644
--- a/drivers/video/b2r2/b2r2_filters.c
+++ b/drivers/video/b2r2/b2r2_filters.c
@@ -12,6 +12,7 @@
 
 #include "b2r2_filters.h"
 #include "b2r2_internal.h"
+#include "b2r2_debug.h"
 
 /**
  * struct b2r2_filter_spec filters[] - Filter lookup table
@@ -24,24 +25,24 @@ static struct b2r2_filter_spec filters[] = {
 		.min = 1024,
 		.max = 1433,
 		.h_coeffs =  {
-			0xfc, 0x06, 0xf9, 0x09, 0x34, 0x09, 0xf9, 0x06,
-			0xfd, 0x07, 0xf7, 0x10, 0x32, 0x02, 0xfc, 0x05,
-			0xfe, 0x07, 0xf6, 0x17, 0x2f, 0xfc, 0xff, 0x04,
-			0xff, 0x06, 0xf5, 0x20, 0x2a, 0xf9, 0x01, 0x02,
-			0x00, 0x04, 0xf6, 0x27, 0x25, 0xf6, 0x04, 0x00,
-			0x02, 0x01, 0xf9, 0x2d, 0x1d, 0xf5, 0x06, 0xff,
-			0x04, 0xff, 0xfd, 0x31, 0x15, 0xf5, 0x07, 0xfe,
-			0x05, 0xfc, 0x02, 0x35, 0x0d, 0xf7, 0x07, 0xfd
+			0x00, 0x00, 0xFA, 0x09, 0x34, 0x09, 0x00, 0x00,
+			0x00, 0x00, 0xF9, 0x10, 0x32, 0x06, 0xFF, 0x00,
+			0x00, 0x00, 0xF8, 0x17, 0x2F, 0x02, 0x00, 0x00,
+			0x00, 0x00, 0xF7, 0x20, 0x2A, 0xFF, 0x00, 0x00,
+			0x00, 0x00, 0xF8, 0x27, 0x25, 0xFC, 0x00, 0x00,
+			0x00, 0x00, 0xFA, 0x2D, 0x1D, 0xFC, 0x00, 0x00,
+			0x00, 0x00, 0xFE, 0x31, 0x15, 0xFC, 0x00, 0x00,
+			0x00, 0x00, 0x02, 0x35, 0x0D, 0xFC, 0x00, 0x00
 		},
 		.v_coeffs = {
-			0xf8, 0x0a, 0x3c, 0x0a, 0xf8,
-			0xf6, 0x12, 0x3b, 0x02, 0xfb,
-			0xf4, 0x1b, 0x35, 0xfd, 0xff,
-			0xf4, 0x23, 0x30, 0xf8, 0x01,
-			0xf6, 0x29, 0x27, 0xf6, 0x04,
-			0xf9, 0x2e, 0x1e, 0xf5, 0x06,
-			0xfd, 0x31, 0x16, 0xf6, 0x06,
-			0x02, 0x32, 0x0d, 0xf8, 0x07
+			0x00, 0x02, 0x3C, 0x02, 0x00,
+			0x00, 0x08, 0x3B, 0xFD, 0x00,
+			0x00, 0x10, 0x35, 0xFB, 0x00,
+			0x00, 0x18, 0x30, 0xF8, 0x00,
+			0x00, 0x1F, 0x27, 0xFA, 0x00,
+			0x00, 0x27, 0x1E, 0xFB, 0x00,
+			0x00, 0x2E, 0x16, 0xFC, 0x00,
+			0x00, 0x34, 0x0D, 0xFF, 0x00
 		},
 	},
 	{
-- 
cgit v1.2.3


From 57716d2b65bf5fa56f50a5f3d4ebb3a35b2483ab Mon Sep 17 00:00:00 2001
From: Jorgen Nilsson <jorgen.nilsson@stericsson.com>
Date: Mon, 6 Feb 2012 17:04:49 +0100
Subject: video: [ANDROID]: b2r2: Add kernel API to b2r2 and more

Brief:
As a preparation for the ICS hardware composer solution a
kernel API has been added to the b2r2 driver. Some minor
stability fixes are also part of this release. The full
support for dual b2r2 configuration should be in place,
but has yet to be verified with the apropriate hardware.
The change should have minor impact on the single core
solution.

Details:
A new logical device for handling the blitter requests
has been added. This is roughly the same device as the old
blitter the interfaces are therefore the same. From now there
is at least two devices - one blitter device and then for each
core one additional device (dual configuration is the current
target). As a consequence the maximum number of allowed cores
has been raised from 1 to 2.

When a dual configuration is active the b2r2 driver
seamlessly splits requests over available b2r2 cores. Each
request is assigned a core_mask defining which cores are doing
part of the job. This helps keep track when waiting for the reports.
Also, rectangles are now recalculated (based on intersection
of destination rectangle and destination image etc.) before
splitting the job in order to maximize throughput.

Clock and power source can now be configured from
devices-dbxxxx.c or equivalent.

Minor bug fixes:
- Check the return value from clk_enable
- Check if the core is valid before serving a IRQ.
- Check if the core is enabled (domain_enabled) before
  adding a new job.
- Return actual job_id used for a request (previously
  always 0)

ST-Ericsson ID: 404691
Original Change-Id: Ic3357c4c1e792a84077c1be4ba4c5acdb19da266

Signed-off-by: Jorgen Nilsson <jorgen.nilsson@stericsson.com>
---
 drivers/video/b2r2/Makefile                |    2 +-
 drivers/video/b2r2/b2r2_api.c              | 1643 ++++++++++++++++++++++++++++
 drivers/video/b2r2/b2r2_blt_main.c         |  827 +++-----------
 drivers/video/b2r2/b2r2_control.h          |   33 +
 drivers/video/b2r2/b2r2_core.c             |  699 ++++++------
 drivers/video/b2r2/b2r2_core.h             |  192 ++++
 drivers/video/b2r2/b2r2_input_validation.c |   98 +-
 drivers/video/b2r2/b2r2_input_validation.h |    2 +-
 drivers/video/b2r2/b2r2_internal.h         |   89 +-
 drivers/video/b2r2/b2r2_node_split.c       |   60 +-
 drivers/video/b2r2/b2r2_profiler_socket.c  |    5 +-
 drivers/video/b2r2/b2r2_utils.c            |  295 ++++-
 drivers/video/b2r2/b2r2_utils.h            |   19 +-
 include/video/b2r2_blt.h                   |   51 +
 14 files changed, 2779 insertions(+), 1236 deletions(-)
 create mode 100644 drivers/video/b2r2/b2r2_api.c
 create mode 100644 drivers/video/b2r2/b2r2_control.h

diff --git a/drivers/video/b2r2/Makefile b/drivers/video/b2r2/Makefile
index 9900ebf8216..f271f4e7ea1 100644
--- a/drivers/video/b2r2/Makefile
+++ b/drivers/video/b2r2/Makefile
@@ -2,7 +2,7 @@
 
 obj-$(CONFIG_FB_B2R2) += b2r2.o
 
-b2r2-objs = b2r2_blt_main.o b2r2_core.o b2r2_mem_alloc.o b2r2_generic.o b2r2_node_gen.o b2r2_node_split.o b2r2_profiler_socket.o b2r2_timing.o b2r2_filters.o b2r2_utils.o b2r2_input_validation.o b2r2_hw_convert.o
+b2r2-objs = b2r2_api.o b2r2_blt_main.o b2r2_core.o b2r2_mem_alloc.o b2r2_generic.o b2r2_node_gen.o b2r2_node_split.o b2r2_profiler_socket.o b2r2_timing.o b2r2_filters.o b2r2_utils.o b2r2_input_validation.o b2r2_hw_convert.o
 
 ifdef CONFIG_B2R2_DEBUG
 b2r2-objs += b2r2_debug.o
diff --git a/drivers/video/b2r2/b2r2_api.c b/drivers/video/b2r2/b2r2_api.c
new file mode 100644
index 00000000000..0361e85ebf3
--- /dev/null
+++ b/drivers/video/b2r2/b2r2_api.c
@@ -0,0 +1,1643 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2010/2012
+ *
+ * ST-Ericsson B2R2 Blitter module API
+ *
+ * Author: Jorgen Nilsson <jorgen.nilsson@stericsson.com>
+ * Author: Robert Fekete <robert.fekete@stericsson.com>
+ * Author: Paul Wannback
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/fs.h>
+#include <linux/file.h>
+#include <linux/poll.h>
+#include <linux/slab.h>
+#include <linux/device.h>
+#include <linux/miscdevice.h>
+#include <linux/list.h>
+#ifdef CONFIG_ANDROID_PMEM
+#include <linux/android_pmem.h>
+#endif
+#include <linux/fb.h>
+#include <linux/uaccess.h>
+#ifdef CONFIG_DEBUG_FS
+#include <linux/debugfs.h>
+#endif
+#include <asm/cacheflush.h>
+#include <linux/smp.h>
+#include <linux/dma-mapping.h>
+#include <linux/sched.h>
+#include <linux/err.h>
+#include <linux/hwmem.h>
+#include <linux/kref.h>
+
+#include "b2r2_internal.h"
+#include "b2r2_control.h"
+#include "b2r2_core.h"
+#include "b2r2_timing.h"
+#include "b2r2_utils.h"
+#include "b2r2_debug.h"
+#include "b2r2_input_validation.h"
+#include "b2r2_profiler_socket.h"
+#include "b2r2_hw.h"
+
+/*
+ * TODO:
+ * Implementation of query cap
+ * Support for user space virtual pointer to physically consecutive memory
+ * Support for user space virtual pointer to physically scattered memory
+ * Callback reads lagging behind in blt_api_stress app
+ * Store smaller items in the report list instead of the whole request
+ * Support read of many report records at once.
+ */
+
+#define DATAS_START_SIZE 10
+#define DATAS_GROW_SIZE 5
+
+/**
+ * @miscdev: The miscdev presenting b2r2 to the system
+ */
+struct b2r2_blt {
+	spinlock_t                      lock;
+	int                             next_job_id;
+	struct miscdevice               miscdev;
+	struct device                   *dev;
+	struct mutex                    datas_lock;
+	/**
+	 * datas - Stores the b2r2_blt_data mapped to the cliend handle
+	 */
+	struct b2r2_blt_data **datas;
+	/**
+	 * data_count - The current maximum of active datas
+	 */
+	int data_count;
+};
+
+struct b2r2_blt_data {
+	struct b2r2_control_instance *ctl_instace[B2R2_MAX_NBR_DEVICES];
+};
+
+/**
+ * Used to keep track of coming and going b2r2 cores and
+ * the number of active instance references
+ */
+struct b2r2_control_ref {
+	struct b2r2_control *b2r2_control;
+	spinlock_t lock;
+};
+
+/**
+ * b2r2_blt - The blitter device, /dev/b2r2_blt
+ */
+struct kref blt_refcount;
+static struct b2r2_blt *b2r2_blt;
+
+/**
+ * b2r2_control - The core controls and synchronization mechanism
+ */
+static struct b2r2_control_ref b2r2_controls[B2R2_MAX_NBR_DEVICES];
+
+/**
+ * b2r2_blt_add_control - Add the b2r2 core control
+ */
+void b2r2_blt_add_control(struct b2r2_control *cont)
+{
+	unsigned long flags;
+	BUG_ON(cont->id < 0 || cont->id >= B2R2_MAX_NBR_DEVICES);
+
+	spin_lock_irqsave(&b2r2_controls[cont->id].lock, flags);
+	if (b2r2_controls[cont->id].b2r2_control == NULL)
+		b2r2_controls[cont->id].b2r2_control = cont;
+	spin_unlock_irqrestore(&b2r2_controls[cont->id].lock, flags);
+}
+
+/**
+ * b2r2_blt_remove_control - Remove the b2r2 core control
+ */
+void b2r2_blt_remove_control(struct b2r2_control *cont)
+{
+	unsigned long flags;
+	BUG_ON(cont->id < 0 || cont->id >= B2R2_MAX_NBR_DEVICES);
+
+	spin_lock_irqsave(&b2r2_controls[cont->id].lock, flags);
+	b2r2_controls[cont->id].b2r2_control = NULL;
+	spin_unlock_irqrestore(&b2r2_controls[cont->id].lock, flags);
+}
+
+/**
+ * b2r2_blt_get_control - Lock control for writing/removal
+ */
+static struct b2r2_control *b2r2_blt_get_control(int i)
+{
+	struct b2r2_control *cont;
+	unsigned long flags;
+	BUG_ON(i < 0 || i >= B2R2_MAX_NBR_DEVICES);
+
+	spin_lock_irqsave(&b2r2_controls[i].lock, flags);
+	cont = (struct b2r2_control *) b2r2_controls[i].b2r2_control;
+	if (cont != NULL) {
+		if (!cont->enabled)
+			cont = NULL;
+		else
+			kref_get(&cont->ref);
+	}
+	spin_unlock_irqrestore(&b2r2_controls[i].lock, flags);
+
+	return cont;
+}
+
+/**
+ * b2r2_blt_release_control - Unlock control for writing/removal
+ */
+static void b2r2_blt_release_control(int i)
+{
+	struct b2r2_control *cont;
+	unsigned long flags;
+	BUG_ON(i < 0 || i >= B2R2_MAX_NBR_DEVICES);
+
+	spin_lock_irqsave(&b2r2_controls[i].lock, flags);
+	cont = (struct b2r2_control *) b2r2_controls[i].b2r2_control;
+	spin_unlock_irqrestore(&b2r2_controls[i].lock, flags);
+	if (cont != NULL)
+		kref_put(&cont->ref, b2r2_core_release);
+}
+
+/**
+ * Increase size of array containing b2r2 handles
+ */
+static int grow_datas(void)
+{
+	struct b2r2_blt_data **new_datas = NULL;
+	int new_data_count = b2r2_blt->data_count + DATAS_GROW_SIZE;
+	int ret = 0;
+
+	new_datas = kzalloc(new_data_count * sizeof(*new_datas), GFP_KERNEL);
+	if (new_datas == NULL) {
+		ret = -ENOMEM;
+		goto exit;
+	}
+
+	memcpy(new_datas, b2r2_blt->datas,
+		b2r2_blt->data_count * sizeof(*b2r2_blt->datas));
+
+	kfree(b2r2_blt->datas);
+
+	b2r2_blt->data_count = new_data_count;
+	b2r2_blt->datas = new_datas;
+exit:
+	return ret;
+}
+
+/**
+ * Allocate and/or reserve a b2r2 handle
+ */
+static int alloc_handle(struct b2r2_blt_data *blt_data)
+{
+	int handle;
+	int ret;
+
+	mutex_lock(&b2r2_blt->datas_lock);
+
+	if (b2r2_blt->datas == NULL) {
+		b2r2_blt->datas = kzalloc(
+			DATAS_START_SIZE * sizeof(*b2r2_blt->datas),
+			GFP_KERNEL);
+		if (b2r2_blt->datas == NULL) {
+			ret = -ENOMEM;
+			goto exit;
+		}
+		b2r2_blt->data_count = DATAS_START_SIZE;
+	}
+
+	for (handle = 0; handle < b2r2_blt->data_count; handle++) {
+		if (b2r2_blt->datas[handle] == NULL) {
+			b2r2_blt->datas[handle] = blt_data;
+			break;
+		}
+
+		if (handle == b2r2_blt->data_count - 1) {
+			ret = grow_datas();
+			if (ret < 0)
+				goto exit;
+		}
+	}
+	ret = handle;
+exit:
+	mutex_unlock(&b2r2_blt->datas_lock);
+
+	return ret;
+}
+
+/**
+ * Get b2r2 data from b2r2 handle
+ */
+static struct b2r2_blt_data *get_data(int handle)
+{
+	if (handle >= b2r2_blt->data_count || handle < 0)
+		return NULL;
+	else
+		return b2r2_blt->datas[handle];
+}
+
+/**
+ * Unreserve b2r2 handle
+ */
+static void free_handle(int handle)
+{
+	if (handle < b2r2_blt->data_count && handle >= 0)
+		b2r2_blt->datas[handle] = NULL;
+}
+
+/**
+ * Get the next job number. This is the one returned to the client
+ * if the blit request was successful.
+ */
+static int get_next_job_id(void)
+{
+	int job_id;
+	unsigned long flags;
+
+	spin_lock_irqsave(&b2r2_blt->lock, flags);
+	if (b2r2_blt->next_job_id < 1)
+		b2r2_blt->next_job_id = 1;
+	job_id = b2r2_blt->next_job_id++;
+	spin_unlock_irqrestore(&b2r2_blt->lock, flags);
+
+	return job_id;
+}
+
+/**
+ * Limit the number of cores used in some "easy" and impossible cases
+ */
+static int limit_blits(int n_split, struct b2r2_blt_req *user_req)
+{
+	if (n_split <= 1)
+		return n_split;
+
+	if (user_req->dst_rect.width < 24 && user_req->dst_rect.height < 24)
+		return 1;
+
+	if (user_req->src_rect.width < n_split &&
+			user_req->src_rect.height < n_split)
+		return 1;
+
+	return n_split;
+}
+
+/**
+ * Check if the format inherently requires the b2r2 scaling engine to be active
+ */
+static bool is_scaling_fmt(enum b2r2_blt_fmt fmt)
+{
+	/* Plane separated formats must be treated as scaling */
+	switch (fmt) {
+	case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YVU420_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YUV422_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YVU422_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YUV444_PACKED_PLANAR:
+	case B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YVU420_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YUV422_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YVU422_PACKED_SEMI_PLANAR:
+	case B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE:
+	case B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE:
+		return true;
+	default:
+		return false;
+	}
+}
+
+/**
+ * Check for macroblock formats
+ */
+static bool is_mb_fmt(enum b2r2_blt_fmt fmt)
+{
+	switch (fmt) {
+	case B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE:
+	case B2R2_BLT_FMT_YUV422_PACKED_SEMIPLANAR_MB_STE:
+		return true;
+	default:
+		return false;
+	}
+}
+
+/**
+ * Split a request rectangle on available cores
+ */
+static int b2r2_blt_split_request(struct b2r2_blt_data *blt_data,
+		struct b2r2_blt_req *user_req,
+		struct b2r2_blt_request **split_requests,
+		struct b2r2_control_instance **ctl,
+		int *n_split)
+{
+	int sstep_x, sstep_y, dstep_x, dstep_y;
+	int dstart_x, dstart_y;
+	int bstart_x, bstart_y;
+	int dpos_x, dpos_y;
+	int bpos_x, bpos_y;
+	int dso_x = 1;
+	int dso_y = 1;
+	int sf_x, sf_y;
+	int i;
+	int srw, srh;
+	int drw, drh;
+	bool ssplit_x = true;
+	bool dsplit_x = true;
+	enum b2r2_blt_transform transform;
+	bool is_rotation = false;
+	bool is_scaling = false;
+	bool bg_blend = false;
+	u32 core_mask = 0;
+
+	srw = user_req->src_rect.width;
+	srh = user_req->src_rect.height;
+	drw = user_req->dst_rect.width;
+	drh = user_req->dst_rect.height;
+	transform = user_req->transform;
+
+	/* Early exit in the basic cases */
+	if (*n_split == 0) {
+		return -ENOSYS;
+	} else if (*n_split == 1 ||
+			(srw < *n_split && srh < *n_split) ||
+			(drw < *n_split && drh < *n_split) ||
+			is_mb_fmt(user_req->src_img.fmt)) {
+		/* Handle macroblock formats with one
+		 * core for now since there seems to be some bug
+		 * related to macroblock access patterns
+		 */
+		memcpy(&split_requests[0]->user_req,
+				user_req,
+				sizeof(*user_req));
+		split_requests[0]->core_mask = 1;
+		*n_split = 1;
+		return 0;
+	}
+
+	/*
+	 * TODO: fix the load balancing algorithm
+	 */
+
+	is_rotation = (transform & B2R2_BLT_TRANSFORM_CCW_ROT_90) != 0;
+
+	/* Check for scaling */
+	if (is_rotation) {
+		is_scaling = (user_req->src_rect.width !=
+				user_req->dst_rect.height) ||
+			(user_req->src_rect.height !=
+				user_req->dst_rect.width);
+	} else {
+		is_scaling = (user_req->src_rect.width !=
+				user_req->dst_rect.width) ||
+			(user_req->src_rect.height !=
+				user_req->dst_rect.height);
+	}
+
+	is_scaling = is_scaling ||
+			is_scaling_fmt(user_req->src_img.fmt) ||
+			is_scaling_fmt(user_req->dst_img.fmt);
+
+	bg_blend = ((user_req->flags & B2R2_BLT_FLAG_BG_BLEND) != 0);
+
+	/*
+	 * Split the request
+	 */
+
+	b2r2_log_info(b2r2_blt->dev, "%s: In (t:0x%08X, f:0x%08X):\n"
+		"\tsrc_rect x:%d, y:%d, w:%d, h:%d src fmt:0x%x\n"
+		"\tdst_rect x:%d, y:%d, w:%d, h:%d dst fmt:0x%x\n",
+		__func__,
+		user_req->transform,
+		user_req->flags,
+		user_req->src_rect.x,
+		user_req->src_rect.y,
+		user_req->src_rect.width,
+		user_req->src_rect.height,
+		user_req->src_img.fmt,
+		user_req->dst_rect.x,
+		user_req->dst_rect.y,
+		user_req->dst_rect.width,
+		user_req->dst_rect.height,
+		user_req->dst_img.fmt);
+
+	/* TODO: We need sub pixel precision here,
+	 * or a better way to split rects */
+	dstart_x = user_req->dst_rect.x;
+	dstart_y = user_req->dst_rect.y;
+	if (bg_blend) {
+		bstart_x = user_req->bg_rect.x;
+		bstart_y = user_req->bg_rect.y;
+	}
+
+	if (srw && srh) {
+		if ((srw < srh) && !is_scaling) {
+			ssplit_x = false;
+			sstep_y = srh / *n_split;
+			/* Round up */
+			if (srh % (*n_split))
+				sstep_y++;
+
+			if (srh > 16)
+				sstep_y = ((sstep_y + 16) >> 4) << 4;
+
+			if (transform & B2R2_BLT_TRANSFORM_CCW_ROT_90) {
+				sf_y = (drw << 10) / srh;
+				dstep_x = (sf_y * sstep_y) >> 10;
+			} else {
+				dsplit_x = false;
+				sf_y = (drh << 10) / srh;
+				dstep_y = (sf_y * sstep_y) >> 10;
+			}
+		} else {
+			sstep_x = srw / *n_split;
+			/* Round up */
+			if (srw % (*n_split))
+				sstep_x++;
+
+			if (is_scaling) {
+				int scale_step_size =
+						B2R2_RESCALE_MAX_WIDTH - 1;
+				int pad = (scale_step_size -
+						(sstep_x % scale_step_size));
+				if ((sstep_x + pad) < srw)
+					sstep_x += pad;
+			} else {
+				/* Aim for even 16px multiples */
+				if ((sstep_x & 0xF) && ((sstep_x + 16) < srw))
+					sstep_x = ((sstep_x + 16) >> 4) << 4;
+			}
+
+			if (transform & B2R2_BLT_TRANSFORM_CCW_ROT_90) {
+				dsplit_x = false;
+				sf_x = (drh << 10) / srw;
+				dstep_y = (sf_x * sstep_x) >> 10;
+			} else {
+				sf_x = (drw << 10) / srw;
+				dstep_x = (sf_x * sstep_x) >> 10;
+			}
+		}
+
+	} else {
+		sstep_x = sstep_y = 0;
+
+		if (drw < drh) {
+			dsplit_x = false;
+			dstep_y = drh / *n_split;
+			/* Round up */
+			if (drh % *n_split)
+				dstep_y++;
+
+			/* Aim for even 16px multiples */
+			if ((dstep_y & 0xF) && ((dstep_y + 16) < drh))
+				dstep_y = ((dstep_y + 16) >> 4) << 4;
+		} else {
+			dstep_x = drw / *n_split;
+			/* Round up */
+			if (drw % *n_split)
+				dstep_x++;
+
+			/* Aim for even 16px multiples */
+			if ((dstep_x & 0xF) && ((dstep_x + 16) < drw))
+				dstep_x = ((dstep_x + 16) >> 4) << 4;
+		}
+	}
+
+	/* Check for flip and rotate to establish destination
+	 * step order */
+	if (transform & B2R2_BLT_TRANSFORM_FLIP_H) {
+		dstart_x +=  drw;
+		if (bg_blend)
+			bstart_x +=  drw;
+		dso_x = -1;
+	}
+	if ((transform & B2R2_BLT_TRANSFORM_FLIP_V) ||
+			(transform & B2R2_BLT_TRANSFORM_CCW_ROT_90)) {
+		dstart_y += drh;
+		if (bg_blend)
+			bstart_y += drh;
+		dso_y = -1;
+	}
+
+	/* Set scan starting position */
+	dpos_x = dstart_x;
+	dpos_y = dstart_y;
+	if (bg_blend) {
+		bpos_x = bstart_x;
+		bpos_y = bstart_y;
+	}
+
+	for (i = 0; i < *n_split; i++) {
+		struct b2r2_blt_req *sreq =
+				&split_requests[i]->user_req;
+
+		/* First mimic all */
+		memcpy(sreq, user_req, sizeof(*user_req));
+
+		/* Then change the rects */
+		if (srw && srh) {
+			if (ssplit_x) {
+				if (sstep_x > 0) {
+					sreq->src_rect.width =
+						min(sstep_x, srw);
+					sreq->src_rect.x += i*sstep_x;
+					srw -= sstep_x;
+				} else {
+					sreq->src_rect.width = srw;
+				}
+			} else {
+				if (sstep_y > 0) {
+					sreq->src_rect.y += i*sstep_y;
+					sreq->src_rect.height =
+						min(sstep_y, srh);
+					srh -= sstep_y;
+				} else {
+					sreq->src_rect.height = srh;
+				}
+			}
+		}
+
+		if (dsplit_x) {
+			int sx = min(dstep_x, drw);
+			if (dso_x < 0) {
+				dpos_x += dso_x * sx;
+				if (bg_blend)
+					bpos_x += dso_x * sx;
+			}
+			sreq->dst_rect.width = sx;
+			sreq->dst_rect.x = dpos_x;
+			if (bg_blend) {
+				sreq->bg_rect.width = sx;
+				sreq->bg_rect.x = bpos_x;
+			}
+			if (dso_x > 0) {
+				dpos_x += dso_x * sx;
+				if (bg_blend)
+					bpos_x += dso_x * sx;
+			}
+			drw -= sx;
+		} else {
+			int sy = min(dstep_y, drh);
+			if (dso_y < 0) {
+				dpos_y += dso_y * sy;
+				if (bg_blend)
+					bpos_y += dso_y * sy;
+			}
+			sreq->dst_rect.height = sy;
+			sreq->dst_rect.y = dpos_y;
+			if (bg_blend) {
+				sreq->bg_rect.height = sy;
+				sreq->bg_rect.y = bpos_y;
+			}
+			if (dso_y > 0) {
+				dpos_y += dso_y * sy;
+				if (bg_blend)
+					bpos_y += dso_y * sy;
+			}
+			drh -= sy;
+		}
+
+		b2r2_log_info(b2r2_blt->dev, "%s: Out:\n"
+				"\tsrc_rect x:%d, y:%d, w:%d, h:%d\n"
+				"\tdst_rect x:%d, y:%d, w:%d, h:%d\n"
+				"\tbg_rect  x:%d, y:%d, w:%d, h:%d\n",
+				__func__,
+				sreq->src_rect.x,
+				sreq->src_rect.y,
+				sreq->src_rect.width,
+				sreq->src_rect.height,
+				sreq->dst_rect.x,
+				sreq->dst_rect.y,
+				sreq->dst_rect.width,
+				sreq->dst_rect.height,
+				sreq->bg_rect.x,
+				sreq->bg_rect.y,
+				sreq->bg_rect.width,
+				sreq->bg_rect.height);
+
+		core_mask |= (1 << i);
+	}
+
+	for (i = 0; i < *n_split; i++)
+		split_requests[i]->core_mask = core_mask;
+
+	return 0;
+}
+
+/**
+ * Get available b2r2 control instances. It will be limited
+ * to the number of cores available at the current point in time.
+ * It will also cause the cores to stay active during the time until
+ * release_control_instances is called.
+ */
+static void get_control_instances(struct b2r2_blt_data *blt_data,
+		struct b2r2_control_instance **ctl, int max_size,
+		int *count)
+{
+	int i;
+
+	*count = 0;
+	for (i = 0; i < max_size; i++) {
+		struct b2r2_control_instance *ci = blt_data->ctl_instace[i];
+		if (ci) {
+			struct b2r2_control *cont =
+				b2r2_blt_get_control(ci->control_id);
+			if (cont) {
+				ctl[*count] = ci;
+				*count += 1;
+			}
+		}
+	}
+}
+
+/**
+ * Release b2r2 control instances. The cores allocated for the request
+ * are given back.
+ */
+static void release_control_instances(struct b2r2_control_instance **ctl,
+		int count)
+{
+	int i;
+
+	/* Release the handles to the core controls */
+	for (i = 0; i < count; i++) {
+		if (ctl[i])
+			b2r2_blt_release_control(ctl[i]->control_id);
+	}
+}
+
+/**
+ * Free b2r2 request
+ */
+static void b2r2_free_request(struct b2r2_blt_request *request)
+{
+	if (request) {
+		/* Free requests in split_requests */
+		if (request->clut)
+			dma_free_coherent(b2r2_blt->dev,
+				CLUT_SIZE,
+				request->clut,
+				request->clut_phys_addr);
+		request->clut = NULL;
+		request->clut_phys_addr = 0;
+		kfree(request);
+	}
+}
+
+/**
+ * Allocate internal b2r2 request based on user input.
+ */
+static int b2r2_alloc_request(struct b2r2_blt_req *user_req,
+		bool us_req, struct b2r2_blt_request **request_out)
+{
+	int ret = 0;
+	struct b2r2_blt_request *request =
+			kzalloc(sizeof(*request), GFP_KERNEL);
+	if (!request)
+		return -ENOMEM;
+
+	/* Initialize the structure */
+	INIT_LIST_HEAD(&request->list);
+
+	/*
+	 * If the user specified a color look-up table,
+	 * make a copy that the HW can use.
+	 */
+	if ((user_req->flags &
+		B2R2_BLT_FLAG_CLUT_COLOR_CORRECTION) != 0) {
+		request->clut = dma_alloc_coherent(
+			b2r2_blt->dev,
+			CLUT_SIZE,
+			&(request->clut_phys_addr),
+			GFP_DMA | GFP_KERNEL);
+		if (request->clut == NULL) {
+			b2r2_log_err(b2r2_blt->dev,
+				"%s CLUT allocation "
+				"failed.\n", __func__);
+			ret = -ENOMEM;
+			goto exit;
+		}
+
+		if (us_req) {
+			if (copy_from_user(request->clut,
+				user_req->clut, CLUT_SIZE)) {
+				b2r2_log_err(b2r2_blt->dev, "%s: CLUT "
+					"copy_from_user failed\n",
+					__func__);
+				ret = -EFAULT;
+				goto exit;
+			}
+		} else {
+			memcpy(request->clut, user_req->clut,
+					CLUT_SIZE);
+		}
+	}
+
+	request->profile = is_profiler_registered_approx();
+
+	*request_out = request;
+exit:
+	if (ret != 0)
+		b2r2_free_request(request);
+
+	return ret;
+}
+
+/**
+ * Do the blit job split on available cores.
+ */
+static int b2r2_blt_blit_internal(int handle,
+		struct b2r2_blt_req *user_req,
+		bool us_req)
+{
+	int request_id;
+	int i;
+	int n_instance = 0;
+	int n_blit = 0;
+	int ret = 0;
+	struct b2r2_blt_data *blt_data;
+	struct b2r2_blt_req ureq;
+
+	/* The requests and the designated workers */
+	struct b2r2_blt_request *split_requests[B2R2_MAX_NBR_DEVICES];
+	struct b2r2_control_instance *ctl[B2R2_MAX_NBR_DEVICES];
+
+	blt_data = get_data(handle);
+	if (blt_data == NULL) {
+		b2r2_log_warn(b2r2_blt->dev,
+			"%s, blitter instance not found (handle=%d)\n",
+			__func__, handle);
+		return -ENOSYS;
+	}
+
+	/* Get the b2r2 core controls for the job */
+	get_control_instances(blt_data, ctl, B2R2_MAX_NBR_DEVICES, &n_instance);
+	if (n_instance == 0) {
+		b2r2_log_err(b2r2_blt->dev, "%s: No b2r2 cores available.\n",
+			__func__);
+		return -ENOSYS;
+	}
+
+	/* Get the user data */
+	if (us_req) {
+		if (copy_from_user(&ureq, user_req, sizeof(ureq))) {
+			b2r2_log_err(b2r2_blt->dev,
+				"%s: copy_from_user failed\n",
+				__func__);
+			ret = -EFAULT;
+			goto exit;
+		}
+	} else {
+		memcpy(&ureq, user_req, sizeof(ureq));
+	}
+
+	/*
+	 * B2R2 cannot handle destination clipping on buffers
+	 * allocated close to 64MiB bank boundaries.
+	 * recalculate src_ and dst_rect to avoid clipping.
+	 *
+	 * Also this is needed to ensure the request split
+	 * operates on visible areas
+	 */
+	b2r2_recalculate_rects(b2r2_blt->dev, &ureq);
+
+	if (!b2r2_validate_user_req(b2r2_blt->dev, &ureq)) {
+		b2r2_log_warn(b2r2_blt->dev,
+			"%s: b2r2_validate_user_req failed.\n",
+			__func__);
+		ret = -EINVAL;
+		goto exit;
+	}
+
+	/* Don't split small requests */
+	n_blit = limit_blits(n_instance, &ureq);
+
+	/* The id needs to be universal on
+	 * all cores */
+	request_id = get_next_job_id();
+
+#ifdef CONFIG_B2R2_GENERIC_ONLY
+	/* Limit the generic only solution to one core (for now) */
+	n_blit = 1;
+#endif
+
+	for (i = 0; i < n_blit; i++) {
+		ret = b2r2_alloc_request(&ureq, us_req, &split_requests[i]);
+		if (ret < 0 || !split_requests[i]) {
+			b2r2_log_err(b2r2_blt->dev, "%s: Failed to alloc mem\n",
+				__func__);
+			ret = -ENOMEM;
+			break;
+		}
+		split_requests[i]->instance = ctl[i];
+		split_requests[i]->job.job_id = request_id;
+		split_requests[i]->job.data = (int) ctl[i]->control->data;
+	}
+
+	/* Split the request */
+	if (ret >= 0)
+		ret = b2r2_blt_split_request(blt_data, &ureq,
+				&split_requests[0], &ctl[0], &n_blit);
+
+	/* If anything failed, clean up allocated memory */
+	if (ret < 0) {
+		for (i = 0; i < n_blit; i++)
+			b2r2_free_request(split_requests[i]);
+		b2r2_log_err(b2r2_blt->dev,
+				"%s: b2r2_blt_split_request failed.\n",
+				__func__);
+		goto exit;
+	}
+
+#ifdef CONFIG_B2R2_GENERIC_ONLY
+	if (ureq.flags & B2R2_BLT_FLAG_BG_BLEND) {
+		/* No support for BG BLEND in generic
+		 * implementation yet */
+		b2r2_log_warn(b2r2_blt->dev, "%s: Unsupported: "
+			"Background blend in b2r2_generic_blt\n",
+			__func__);
+		ret = -ENOSYS;
+		b2r2_free_request(split_requests[0]);
+		goto exit;
+	}
+		/* Use the generic path for all operations */
+	ret = b2r2_generic_blt(split_requests[0]);
+#else
+	/* Call each blitter control */
+	for (i = 0; i < n_blit; i++) {
+		ret = b2r2_control_blt(split_requests[i]);
+		if (ret < 0) {
+			b2r2_log_warn(b2r2_blt->dev,
+				"%s: b2r2_control_blt failed.\n", __func__);
+			break;
+		}
+	}
+	if (ret != -ENOSYS) {
+		int j;
+		/* TODO: if one blitter fails then cancel the jobs added */
+
+		/* Call waitjob for successful jobs
+		 * (synchs if specified in request) */
+		if (ureq.flags & B2R2_BLT_FLAG_DRY_RUN)
+			goto exit;
+
+		for (j = 0; j < i; j++) {
+			int rtmp;
+
+			rtmp = b2r2_control_waitjob(split_requests[j]);
+			if (rtmp < 0) {
+				b2r2_log_err(b2r2_blt->dev,
+					"%s: b2r2_control_waitjob failed.\n",
+					__func__);
+			}
+
+			/* Save just the one error */
+			ret = (ret >= 0) ? rtmp : ret;
+		}
+	}
+#endif
+#ifdef CONFIG_B2R2_GENERIC_FALLBACK
+	if (ret == -ENOSYS) {
+		struct b2r2_blt_request *request_gen = NULL;
+		if (ureq.flags & B2R2_BLT_FLAG_BG_BLEND) {
+			/* No support for BG BLEND in generic
+			 * implementation yet */
+			b2r2_log_warn(b2r2_blt->dev, "%s: Unsupported: "
+				"Background blend in b2r2_generic_blt\n",
+				__func__);
+			goto exit;
+		}
+
+		b2r2_log_info(b2r2_blt->dev,
+			"b2r2_blt=%d Going generic.\n", ret);
+		ret = b2r2_alloc_request(&ureq, us_req, &request_gen);
+		if (ret < 0 || !request_gen) {
+			b2r2_log_err(b2r2_blt->dev,
+				"%s: Failed to alloc mem for "
+				"request_gen\n", __func__);
+			ret = -ENOMEM;
+			goto exit;
+		}
+
+		/* Initialize the structure */
+		request_gen->instance = ctl[0];
+		memcpy(&request_gen->user_req, &ureq,
+				sizeof(request_gen->user_req));
+		request_gen->core_mask = 1;
+		request_gen->job.job_id = request_id;
+		request_gen->job.data = (int) ctl[0]->control->data;
+
+		ret = b2r2_generic_blt(request_gen);
+		b2r2_log_info(b2r2_blt->dev, "\nb2r2_generic_blt=%d "
+			"Generic done.\n", ret);
+	}
+#endif
+exit:
+	release_control_instances(ctl, n_instance);
+
+	ret = ret >= 0 ? request_id : ret;
+
+	return ret;
+}
+
+/**
+ * Free the memory used for the b2r2_blt device
+ */
+static void b2r2_blt_release(struct kref *ref)
+{
+	BUG_ON(b2r2_blt == NULL);
+	if (b2r2_blt == NULL)
+		return;
+	kfree(b2r2_blt->datas);
+	kfree(b2r2_blt);
+	b2r2_blt = NULL;
+}
+
+int b2r2_blt_open(void)
+{
+	int ret = 0;
+	struct b2r2_blt_data *blt_data = NULL;
+	int i;
+
+	if (!atomic_inc_not_zero(&blt_refcount.refcount))
+		return -ENOSYS;
+
+	/* Allocate blitter instance data structure */
+	blt_data = (struct b2r2_blt_data *)
+			kzalloc(sizeof(*blt_data), GFP_KERNEL);
+	if (!blt_data) {
+		b2r2_log_err(b2r2_blt->dev, "%s: Failed to alloc\n", __func__);
+		ret = -ENOMEM;
+		goto err;
+	}
+
+	for (i = 0; i < B2R2_MAX_NBR_DEVICES; i++) {
+		struct b2r2_control *control = b2r2_blt_get_control(i);
+		if (control != NULL) {
+			struct b2r2_control_instance *ci;
+
+			/* Allocate and initialize the control instance */
+			ci = kzalloc(sizeof(*ci), GFP_KERNEL);
+			if (!ci) {
+				b2r2_log_err(b2r2_blt->dev,
+						"%s: Failed to alloc\n",
+						__func__);
+				ret = -ENOMEM;
+				b2r2_blt_release_control(i);
+				goto err;
+			}
+			ci->control_id = i;
+			ci->control = control;
+			ret = b2r2_control_open(ci);
+			if (ret < 0) {
+				b2r2_log_err(b2r2_blt->dev,
+					"%s: Failed to open b2r2 control %d\n",
+					__func__, i);
+				kfree(ci);
+				b2r2_blt_release_control(i);
+				goto err;
+			}
+			blt_data->ctl_instace[i] = ci;
+			b2r2_blt_release_control(i);
+		} else {
+			blt_data->ctl_instace[i] = NULL;
+		}
+	}
+
+	/* TODO: Create kernel worker kthread */
+
+	ret = alloc_handle(blt_data);
+	if (ret < 0)
+		goto err;
+
+	kref_put(&blt_refcount, b2r2_blt_release);
+
+	return ret;
+
+err:
+	/* Destroy the blitter instance data structure */
+	if (blt_data) {
+		for (i = 0; i < B2R2_MAX_NBR_DEVICES; i++)
+			kfree(blt_data->ctl_instace[i]);
+		kfree(blt_data);
+	}
+
+	kref_put(&blt_refcount, b2r2_blt_release);
+
+	return ret;
+}
+EXPORT_SYMBOL(b2r2_blt_open);
+
+int b2r2_blt_close(int handle)
+{
+	int i;
+	struct b2r2_blt_data *blt_data;
+	int ret = 0;
+
+	if (!atomic_inc_not_zero(&blt_refcount.refcount))
+		return -ENOSYS;
+
+	b2r2_log_info(b2r2_blt->dev, "%s\n", __func__);
+
+	blt_data = get_data(handle);
+	if (blt_data == NULL) {
+		b2r2_log_warn(b2r2_blt->dev,
+			"%s, blitter data not found (handle=%d)\n",
+			__func__, handle);
+		ret = -ENOSYS;
+		goto exit;
+	}
+	free_handle(handle);
+
+	for (i = 0; i < B2R2_MAX_NBR_DEVICES; i++) {
+		struct b2r2_control_instance *ci =
+				blt_data->ctl_instace[i];
+		if (ci != NULL) {
+			struct b2r2_control *cont =
+				b2r2_blt_get_control(ci->control_id);
+			if (cont) {
+				/* Release the instance */
+				b2r2_control_release(ci);
+				b2r2_blt_release_control(ci->control_id);
+			}
+			kfree(ci);
+		}
+	}
+	kfree(blt_data);
+
+exit:
+	kref_put(&blt_refcount, b2r2_blt_release);
+
+	return ret;
+}
+EXPORT_SYMBOL(b2r2_blt_close);
+
+int b2r2_blt_request(int handle,
+		struct b2r2_blt_req *user_req)
+{
+	int ret = 0;
+
+	if (!atomic_inc_not_zero(&blt_refcount.refcount))
+		return -ENOSYS;
+
+	/* Exclude some currently unsupported cases */
+	if ((user_req->flags & B2R2_BLT_FLAG_REPORT_WHEN_DONE) ||
+			(user_req->flags & B2R2_BLT_FLAG_REPORT_PERFORMANCE) ||
+			(user_req->report1 != 0)) {
+		b2r2_log_err(b2r2_blt->dev,
+				"%s No callback support in the kernel API\n",
+			__func__);
+		ret = -ENOSYS;
+		goto exit;
+	}
+
+	ret = b2r2_blt_blit_internal(handle, user_req, false);
+
+exit:
+	kref_put(&blt_refcount, b2r2_blt_release);
+
+	return ret;
+}
+EXPORT_SYMBOL(b2r2_blt_request);
+
+int b2r2_blt_synch(int handle, int request_id)
+{
+	int ret = 0;
+	int i;
+	int n_synch = 0;
+	struct b2r2_control_instance *ctl[B2R2_MAX_NBR_DEVICES];
+	struct b2r2_blt_data *blt_data;
+
+	if (!atomic_inc_not_zero(&blt_refcount.refcount))
+		return -ENOSYS;
+
+	b2r2_log_info(b2r2_blt->dev, "%s\n", __func__);
+
+	blt_data = get_data(handle);
+	if (blt_data == NULL) {
+		b2r2_log_warn(b2r2_blt->dev,
+			"%s, blitter data not found (handle=%d)\n",
+			__func__, handle);
+		ret = -ENOSYS;
+		goto exit;
+	}
+
+	/* Get the b2r2 core controls for the job */
+	get_control_instances(blt_data, ctl, B2R2_MAX_NBR_DEVICES, &n_synch);
+	if (n_synch == 0) {
+		b2r2_log_err(b2r2_blt->dev, "%s: No b2r2 cores available.\n",
+			__func__);
+		ret = -ENOSYS;
+		goto exit;
+	}
+
+	for (i = 0; i < n_synch; i++) {
+		ret = b2r2_control_synch(ctl[i], request_id);
+		if (ret != 0) {
+			b2r2_log_err(b2r2_blt->dev,
+				"%s: b2r2_control_synch failed.\n",
+				__func__);
+			break;
+		}
+	}
+
+	/* Release the handles to the core controls */
+	release_control_instances(ctl, n_synch);
+
+exit:
+	kref_put(&blt_refcount, b2r2_blt_release);
+
+	b2r2_log_info(b2r2_blt->dev,
+		"%s, request_id=%d, returns %d\n", __func__, request_id, ret);
+
+	return ret;
+}
+EXPORT_SYMBOL(b2r2_blt_synch);
+
+/**
+ * The user space API
+ */
+
+/**
+ * b2r2_blt_open_us - Implements file open on the b2r2_blt device
+ *
+ * @inode: File system inode
+ * @filp: File pointer
+ *
+ * A b2r2_blt_data handle is created and stored in the file structure.
+ */
+static int b2r2_blt_open_us(struct inode *inode, struct file *filp)
+{
+	int ret = 0;
+	int handle;
+
+	handle = b2r2_blt_open();
+	if (handle < 0) {
+		b2r2_log_err(b2r2_blt->dev, "%s: Failed to open handle\n",
+			__func__);
+		ret = handle;
+		goto exit;
+	}
+	filp->private_data = (void *) handle;
+exit:
+	return ret;
+}
+
+/**
+ * b2r2_blt_release_us - Implements last close on an instance of
+ *                    the b2r2_blt device
+ *
+ * @inode: File system inode
+ * @filp: File pointer
+ *
+ * All active jobs are finished or cancelled and allocated data
+ * is released.
+ */
+static int b2r2_blt_release_us(struct inode *inode, struct file *filp)
+{
+	int ret;
+	ret = b2r2_blt_close((int) filp->private_data);
+	return ret;
+}
+
+/**
+ * Query B2R2 capabilities
+ *
+ * @blt_data: The B2R2 BLT instance
+ * @query_cap: The structure receiving the capabilities
+ */
+static int b2r2_blt_query_cap(struct b2r2_blt_data *blt_data,
+		struct b2r2_blt_query_cap *query_cap)
+{
+	/* FIXME: Not implemented yet */
+	return -ENOSYS;
+}
+
+/**
+ * b2r2_blt_ioctl_us - This routine implements b2r2_blt ioctl interface
+ *
+ * @file: file pointer.
+ * @cmd	:ioctl command.
+ * @arg: input argument for ioctl.
+ *
+ * Returns 0 if OK else negative error code
+ */
+static long b2r2_blt_ioctl_us(struct file *file,
+		unsigned int cmd, unsigned long arg)
+{
+	int ret = 0;
+	int handle = (int) file->private_data;
+
+	/** Process actual ioctl */
+	b2r2_log_info(b2r2_blt->dev, "%s\n", __func__);
+
+	/* Get the instance from the file structure */
+	switch (cmd) {
+	case B2R2_BLT_IOC: {
+		/* arg is user pointer to struct b2r2_blt_request */
+		ret = b2r2_blt_blit_internal(handle,
+				(struct b2r2_blt_req *) arg, true);
+		break;
+	}
+
+	case B2R2_BLT_SYNCH_IOC:
+		/* arg is request_id */
+		ret = b2r2_blt_synch(handle, (int) arg);
+		break;
+
+	case B2R2_BLT_QUERY_CAP_IOC: {
+		/* Arg is struct b2r2_blt_query_cap */
+		struct b2r2_blt_query_cap query_cap;
+		struct b2r2_blt_data *blt_data = get_data(handle);
+
+		/* Get the user data */
+		if (copy_from_user(&query_cap, (void *)arg,
+				sizeof(query_cap))) {
+			b2r2_log_err(b2r2_blt->dev,
+				"%s: copy_from_user failed\n",
+				__func__);
+			ret = -EFAULT;
+			goto exit;
+		}
+
+		/* Fill in our capabilities */
+		ret = b2r2_blt_query_cap(blt_data, &query_cap);
+
+		/* Return data to user */
+		if (copy_to_user((void *)arg, &query_cap,
+				sizeof(query_cap))) {
+			b2r2_log_err(b2r2_blt->dev,
+				"%s: copy_to_user failed\n",
+				__func__);
+			ret = -EFAULT;
+			goto exit;
+		}
+		break;
+	}
+
+	default:
+		/* Unknown command */
+		b2r2_log_err(b2r2_blt->dev, "%s: Unknown cmd %d\n",
+			__func__, cmd);
+		ret = -EINVAL;
+		break;
+
+	}
+
+exit:
+	if (ret < 0)
+		b2r2_log_err(b2r2_blt->dev, "%s: Return with error %d!\n",
+				__func__, -ret);
+
+	return ret;
+}
+
+/**
+ * b2r2_blt_poll - Support for user-space poll, select & epoll.
+ *                 Used for user-space callback
+ *
+ * @filp: File to poll on
+ * @wait: Poll table to wait on
+ *
+ * This function checks if there are anything to read
+ */
+static unsigned b2r2_blt_poll_us(struct file *filp, poll_table *wait)
+{
+	struct b2r2_blt_data *blt_data =
+			(struct b2r2_blt_data *) filp->private_data;
+	struct b2r2_control_instance *ctl[B2R2_MAX_NBR_DEVICES];
+	unsigned int ret = POLLIN | POLLRDNORM;
+	int n_poll = 0;
+	int i;
+
+	b2r2_log_info(b2r2_blt->dev, "%s\n", __func__);
+
+	/* Get the b2r2 core controls for the job */
+	get_control_instances(blt_data, ctl, B2R2_MAX_NBR_DEVICES, &n_poll);
+	if (n_poll == 0) {
+		b2r2_log_err(b2r2_blt->dev, "%s: No b2r2 cores available.\n",
+			__func__);
+		ret = -ENOSYS;
+		goto exit;
+	}
+
+	/* Poll each core control instance */
+	for (i = 0; i < n_poll && ret != 0; i++) {
+		poll_wait(filp, &ctl[i]->report_list_waitq, wait);
+		mutex_lock(&ctl[i]->lock);
+		if (list_empty(&ctl[i]->report_list))
+			ret = 0; /* No reports */
+		mutex_unlock(&ctl[i]->lock);
+	}
+
+	/* Release the handles to the core controls */
+	release_control_instances(ctl, n_poll);
+
+exit:
+	b2r2_log_info(b2r2_blt->dev, "%s: returns %d, n_poll: %d\n",
+		__func__, ret, n_poll);
+
+	return ret;
+}
+
+/**
+ * b2r2_blt_read - Read report data, user for user-space callback
+ *
+ * @filp: File pointer
+ * @buf: User space buffer
+ * @count: Number of bytes to read
+ * @f_pos: File position
+ *
+ * Returns number of bytes read or negative error code
+ */
+static ssize_t b2r2_blt_read_us(struct file *filp,
+		char __user *buf, size_t count,	loff_t *f_pos)
+{
+	int ret = 0;
+	int n_read = 0;
+	int i;
+	int first_index = 0;
+	struct b2r2_blt_report report;
+	struct b2r2_blt_request *requests[B2R2_MAX_NBR_DEVICES];
+	struct b2r2_blt_data *blt_data =
+		(struct b2r2_blt_data *) filp->private_data;
+	struct b2r2_control_instance *ctl[B2R2_MAX_NBR_DEVICES];
+	struct b2r2_control_instance *first = NULL;
+	bool block = ((filp->f_flags & O_NONBLOCK) == 0);
+	u32 core_mask = 0;
+
+	b2r2_log_info(b2r2_blt->dev, "%s\n", __func__);
+
+	/*
+	 * We return only complete report records, one at a time.
+	 * Might be more efficient to support read of many.
+	 */
+	count = (count / sizeof(struct b2r2_blt_report)) *
+		sizeof(struct b2r2_blt_report);
+	if (count > sizeof(struct b2r2_blt_report))
+		count = sizeof(struct b2r2_blt_report);
+	if (count == 0)
+		return count;
+
+	memset(ctl, 0, sizeof(*ctl) * B2R2_MAX_NBR_DEVICES);
+	/* Get the b2r2 core controls for the job */
+	for (i = 0; i < B2R2_MAX_NBR_DEVICES; i++) {
+		struct b2r2_control_instance *ci = blt_data->ctl_instace[i];
+		if (ci) {
+			struct b2r2_control *cont =
+				b2r2_blt_get_control(ci->control_id);
+			if (cont) {
+				ctl[i] = ci;
+				n_read++;
+			}
+		}
+	}
+	if (n_read == 0) {
+		b2r2_log_err(b2r2_blt->dev, "%s: No b2r2 cores available.\n",
+			__func__);
+		return -ENOSYS;
+	}
+
+	/* Find which control to ask for a report first */
+	for (i = 0; i < B2R2_MAX_NBR_DEVICES; i++) {
+		if (ctl[i] != NULL) {
+			first = ctl[i];
+			first_index = i;
+			break;
+		}
+	}
+	if (!first) {
+		b2r2_log_err(b2r2_blt->dev, "%s: Internal error.\n",
+			__func__);
+		return -ENOSYS;
+	}
+
+	memset(requests, 0, sizeof(*requests) * B2R2_MAX_NBR_DEVICES);
+	/* Read report from core 0 */
+	ret = b2r2_control_read(first, &requests[first_index], block);
+	if (ret <= 0 || requests[0] == NULL) {
+		b2r2_log_err(b2r2_blt->dev, "%s: b2r2_control_read failed.\n",
+			__func__);
+		ret = -EFAULT;
+		goto exit;
+	}
+	core_mask = requests[first_index]->core_mask >> 1;
+	core_mask &= ~(1 << first_index);
+
+	/* If there are any more cores, try reading the report
+	 * with the specific ID from the other cores */
+	for (i = 0; i < B2R2_MAX_NBR_DEVICES; i++) {
+		if ((core_mask & 1) && (ctl[i] != NULL)) {
+			/* TODO: Do we need to wait here? */
+			ret = b2r2_control_read_id(ctl[i], &requests[i], block,
+					requests[first_index]->request_id);
+			if (ret <= 0 || requests[i] == NULL) {
+				b2r2_log_err(b2r2_blt->dev,
+					"%s: b2r2_control_read failed.\n",
+					__func__);
+				break;
+			}
+		}
+		core_mask = core_mask >> 1;
+	}
+
+	if (ret > 0) {
+		/* Construct a report and copy to userland */
+		report.request_id = requests[0]->request_id;
+		report.report1 = requests[0]->user_req.report1;
+		report.report2 = requests[0]->user_req.report2;
+		report.usec_elapsed = 0; /* TBD */
+
+		if (copy_to_user(buf, &report, sizeof(report))) {
+			b2r2_log_err(b2r2_blt->dev,
+				"%s: copy_to_user failed.\n",
+				__func__);
+			ret = -EFAULT;
+		}
+	}
+
+	if (ret > 0) {
+		for (i = 0; i < B2R2_MAX_NBR_DEVICES; i++)
+			/*
+			 * Release matching the addref when the job was put
+			 * into the report list
+			 */
+			if (requests[i] != NULL)
+				b2r2_core_job_release(&requests[i]->job,
+						__func__);
+	} else {
+		/* We failed at one core or copy to user failed */
+		for (i = 0; i < B2R2_MAX_NBR_DEVICES; i++)
+			if (requests[i] != NULL)
+				list_add(&requests[i]->list,
+					&ctl[i]->report_list);
+		goto exit;
+	}
+
+	ret = count;
+
+exit:
+	/* Release the handles to the core controls */
+	release_control_instances(ctl, n_read);
+
+	return ret;
+}
+
+/**
+ * b2r2_blt_fops - File operations for b2r2_blt
+ */
+static const struct file_operations b2r2_blt_fops = {
+	.owner =          THIS_MODULE,
+	.open =           b2r2_blt_open_us,
+	.release =        b2r2_blt_release_us,
+	.unlocked_ioctl = b2r2_blt_ioctl_us,
+	.poll  =          b2r2_blt_poll_us,
+	.read  =          b2r2_blt_read_us,
+};
+
+
+/**
+ * b2r2_probe() - This routine loads the B2R2 core driver
+ *
+ * @pdev: platform device.
+ */
+static int b2r2_blt_probe(struct platform_device *pdev)
+{
+	int ret = 0;
+	int i;
+
+	BUG_ON(pdev == NULL);
+
+	dev_info(&pdev->dev, "%s start.\n", __func__);
+
+	if (!b2r2_blt) {
+		b2r2_blt = kzalloc(sizeof(*b2r2_blt), GFP_KERNEL);
+		if (!b2r2_blt) {
+			dev_err(&pdev->dev, "b2r2_blt alloc failed\n");
+			ret = -EINVAL;
+			goto error_exit;
+		}
+
+		/* Init b2r2 core control reference counters */
+		for (i = 0; i < B2R2_MAX_NBR_DEVICES; i++)
+			spin_lock_init(&b2r2_controls[i].lock);
+	}
+
+	mutex_init(&b2r2_blt->datas_lock);
+	spin_lock_init(&b2r2_blt->lock);
+	b2r2_blt->dev = &pdev->dev;
+
+	/* Register b2r2 driver */
+	b2r2_blt->miscdev.parent = b2r2_blt->dev;
+	b2r2_blt->miscdev.minor = MISC_DYNAMIC_MINOR;
+	b2r2_blt->miscdev.name = "b2r2_blt";
+	b2r2_blt->miscdev.fops = &b2r2_blt_fops;
+
+	ret = misc_register(&b2r2_blt->miscdev);
+	if (ret != 0) {
+		printk(KERN_WARNING "%s: registering misc device fails\n",
+				__func__);
+		goto error_exit;
+	}
+
+	b2r2_blt->dev = b2r2_blt->miscdev.this_device;
+	b2r2_blt->dev->coherent_dma_mask = 0xFFFFFFFF;
+
+	kref_init(&blt_refcount);
+
+	dev_info(&pdev->dev, "%s done.\n", __func__);
+
+	return ret;
+
+/** Recover from any error if something fails */
+error_exit:
+
+	kfree(b2r2_blt);
+
+	dev_info(&pdev->dev, "%s done with errors (%d).\n", __func__, ret);
+
+	return ret;
+}
+
+/**
+ * b2r2_blt_remove - This routine unloads b2r2_blt driver
+ *
+ * @pdev: platform device.
+ */
+static int b2r2_blt_remove(struct platform_device *pdev)
+{
+	BUG_ON(pdev == NULL);
+	dev_info(&pdev->dev, "%s started.\n", __func__);
+	misc_deregister(&b2r2_blt->miscdev);
+	kref_put(&blt_refcount, b2r2_blt_release);
+	return 0;
+}
+
+/**
+ * b2r2_blt_suspend() - This routine puts the B2R2 blitter in to sustend state.
+ * @pdev: platform device.
+ *
+ * This routine stores the current state of the b2r2 device and puts in to
+ * suspend state.
+ *
+ */
+int b2r2_blt_suspend(struct platform_device *pdev, pm_message_t state)
+{
+	return 0;
+}
+
+/**
+ * b2r2_blt_resume() - This routine resumes the B2R2 blitter from sustend state.
+ * @pdev: platform device.
+ *
+ * This routine restore back the current state of the b2r2 device resumes.
+ *
+ */
+int b2r2_blt_resume(struct platform_device *pdev)
+{
+	return 0;
+}
+
+/**
+ * struct platform_b2r2_driver - Platform driver configuration for the
+ * B2R2 core driver
+ */
+static struct platform_driver platform_b2r2_blt_driver = {
+	.remove = b2r2_blt_remove,
+	.driver = {
+		.name	= "b2r2_blt",
+	},
+	.suspend = b2r2_blt_suspend,
+	.resume =  b2r2_blt_resume,
+};
+
+/**
+ * b2r2_init() - Module init function for the B2R2 core module
+ */
+static int __init b2r2_blt_init(void)
+{
+	printk(KERN_INFO "%s\n", __func__);
+	return platform_driver_probe(&platform_b2r2_blt_driver, b2r2_blt_probe);
+}
+module_init(b2r2_blt_init);
+
+/**
+ * b2r2_exit() - Module exit function for the B2R2 core module
+ */
+static void __exit b2r2_blt_exit(void)
+{
+	printk(KERN_INFO "%s\n", __func__);
+	platform_driver_unregister(&platform_b2r2_blt_driver);
+	return;
+}
+module_exit(b2r2_blt_exit);
+
+MODULE_AUTHOR("Robert Fekete <robert.fekete@stericsson.com>");
+MODULE_DESCRIPTION("ST-Ericsson B2R2 Blitter module");
+MODULE_LICENSE("GPL");
diff --git a/drivers/video/b2r2/b2r2_blt_main.c b/drivers/video/b2r2/b2r2_blt_main.c
index 919de1ef0ee..3727f742bf1 100644
--- a/drivers/video/b2r2/b2r2_blt_main.c
+++ b/drivers/video/b2r2/b2r2_blt_main.c
@@ -36,6 +36,7 @@
 #include <linux/hwmem.h>
 
 #include "b2r2_internal.h"
+#include "b2r2_control.h"
 #include "b2r2_node_split.h"
 #include "b2r2_generic.h"
 #include "b2r2_mem_alloc.h"
@@ -60,28 +61,11 @@
  * Support read of many report records at once.
  */
 
-/**
- * b2r2_blt_dev - Our device(s), /dev/b2r2_blt
- */
-static struct b2r2_control *b2r2_ctl[B2R2_MAX_NBR_DEVICES];
-
-/* Debug file system support */
-#ifdef CONFIG_DEBUG_FS
-static int sprintf_req(struct b2r2_blt_request *request, char *buf, int size);
-#endif
-
 /* Local functions */
 static void inc_stat(struct b2r2_control *cont, unsigned long *stat);
 static void dec_stat(struct b2r2_control *cont, unsigned long *stat);
-static int b2r2_blt_synch(struct b2r2_blt_instance *instance,
-		int request_id);
-static int b2r2_blt_query_cap(struct b2r2_blt_instance *instance,
-		struct b2r2_blt_query_cap *query_cap);
 
 #ifndef CONFIG_B2R2_GENERIC_ONLY
-static int b2r2_blt(struct b2r2_blt_instance *instance,
-		struct b2r2_blt_request *request);
-
 static void job_callback(struct b2r2_core_job *job);
 static void job_release(struct b2r2_core_job *job);
 static int job_acquire_resources(struct b2r2_core_job *job, bool atomic);
@@ -89,9 +73,6 @@ static void job_release_resources(struct b2r2_core_job *job, bool atomic);
 #endif
 
 #ifdef CONFIG_B2R2_GENERIC
-static int b2r2_generic_blt(struct b2r2_blt_instance *instance,
-		struct b2r2_blt_request *request);
-
 static void job_callback_gen(struct b2r2_core_job *job);
 static void job_release_gen(struct b2r2_core_job *job);
 static int job_acquire_resources_gen(struct b2r2_core_job *job, bool atomic);
@@ -109,8 +90,8 @@ static void unresolve_buf(struct b2r2_control *cont,
 static void sync_buf(struct b2r2_control *cont, struct b2r2_blt_img *img,
 		struct b2r2_resolved_buf *resolved, bool is_dst,
 		struct b2r2_blt_rect *rect);
-static bool is_report_list_empty(struct b2r2_blt_instance *instance);
-static bool is_synching(struct b2r2_blt_instance *instance);
+static bool is_report_list_empty(struct b2r2_control_instance *instance);
+static bool is_synching(struct b2r2_control_instance *instance);
 static void get_actual_dst_rect(struct b2r2_blt_req *req,
 		struct b2r2_blt_rect *actual_dst_rect);
 static void set_up_hwmem_region(struct b2r2_control *cont,
@@ -196,39 +177,18 @@ static void clean_l1_cache_range_all_cpus(struct sync_args *sa)
  *
  * A B2R2 BLT instance is created and stored in the file structure.
  */
-static int b2r2_blt_open(struct inode *inode, struct file *filp)
+int b2r2_control_open(struct b2r2_control_instance *instance)
 {
 	int ret = 0;
-	struct b2r2_blt_instance *instance;
-	struct b2r2_control *cont = filp->private_data;
+	struct b2r2_control *cont = instance->control;
 
 	b2r2_log_info(cont->dev, "%s\n", __func__);
-
 	inc_stat(cont, &cont->stat_n_in_open);
 
-	/* Allocate and initialize the instance */
-	instance = (struct b2r2_blt_instance *)
-		kmalloc(sizeof(*instance), GFP_KERNEL);
-	if (!instance) {
-		b2r2_log_err(cont->dev, "%s: Failed to alloc\n", __func__);
-		goto instance_alloc_failed;
-	}
-	memset(instance, 0, sizeof(*instance));
 	INIT_LIST_HEAD(&instance->report_list);
 	mutex_init(&instance->lock);
 	init_waitqueue_head(&instance->report_list_waitq);
 	init_waitqueue_head(&instance->synch_done_waitq);
-	instance->control = cont;
-
-	/*
-	 * Remember the instance so that we can retrieve it in
-	 * other functions
-	 */
-	filp->private_data = instance;
-	goto out;
-
-instance_alloc_failed:
-out:
 	dec_stat(cont, &cont->stat_n_in_open);
 
 	return ret;
@@ -244,11 +204,9 @@ out:
  * All active jobs are finished or cancelled and allocated data
  * is released.
  */
-static int b2r2_blt_release(struct inode *inode, struct file *filp)
+int b2r2_control_release(struct b2r2_control_instance *instance)
 {
 	int ret;
-	struct b2r2_blt_instance *instance =
-			(struct b2r2_blt_instance *) filp->private_data;
 	struct b2r2_control *cont = instance->control;
 
 	b2r2_log_info(cont->dev, "%s\n", __func__);
@@ -256,7 +214,7 @@ static int b2r2_blt_release(struct inode *inode, struct file *filp)
 	inc_stat(cont, &cont->stat_n_in_release);
 
 	/* Finish all outstanding requests */
-	ret = b2r2_blt_synch(instance, 0);
+	ret = b2r2_control_synch(instance, 0);
 	if (ret < 0)
 		b2r2_log_warn(cont->dev, "%s: b2r2_blt_sync failed with %d\n",
 			__func__, ret);
@@ -301,313 +259,74 @@ static int b2r2_blt_release(struct inode *inode, struct file *filp)
 	}
 	mutex_unlock(&instance->lock);
 
-	/* Release our instance */
-	kfree(instance);
-
 	dec_stat(cont, &cont->stat_n_in_release);
 
 	return 0;
 }
 
-/**
- * b2r2_blt_ioctl - This routine implements b2r2_blt ioctl interface
- *
- * @file: file pointer.
- * @cmd	:ioctl command.
- * @arg: input argument for ioctl.
- *
- * Returns 0 if OK else negative error code
- */
-static long b2r2_blt_ioctl(struct file *file,
-		unsigned int cmd, unsigned long arg)
+size_t b2r2_control_read(struct b2r2_control_instance *instance,
+		struct b2r2_blt_request **request_out, bool block)
 {
-	int ret = 0;
-	struct b2r2_blt_instance *instance =
-			(struct b2r2_blt_instance *) file->private_data;
+	struct b2r2_blt_request *request = NULL;
+#ifdef CONFIG_B2R2_DEBUG
 	struct b2r2_control *cont = instance->control;
-
-	/** Process actual ioctl */
-	b2r2_log_info(cont->dev, "%s\n", __func__);
-
-	/* Get the instance from the file structure */
-	switch (cmd) {
-	case B2R2_BLT_IOC: {
-		/* This is the "blit" command */
-
-		/* arg is user pointer to struct b2r2_blt_request */
-		struct b2r2_blt_request *request =
-			kmalloc(sizeof(*request), GFP_KERNEL);
-		if (!request) {
-			b2r2_log_err(cont->dev, "%s: Failed to alloc mem\n",
-				__func__);
-			return -ENOMEM;
-		}
-
-		/* Initialize the structure */
-		memset(request, 0, sizeof(*request));
-		INIT_LIST_HEAD(&request->list);
-		request->instance = instance;
-
-		/*
-		 * The user request is a sub structure of the
-		 * kernel request structure.
-		 */
-
-		/* Get the user data */
-		if (copy_from_user(&request->user_req, (void *)arg,
-				sizeof(request->user_req))) {
-			b2r2_log_err(cont->dev, "%s: copy_from_user failed\n",
-				__func__);
-			kfree(request);
-			return -EFAULT;
-		}
-
-		if (!b2r2_validate_user_req(cont, &request->user_req)) {
-			kfree(request);
-			return -EINVAL;
-		}
-
-		request->profile = is_profiler_registered_approx();
-
-		/*
-		 * If the user specified a color look-up table,
-		 * make a copy that the HW can use.
-		 */
-		if ((request->user_req.flags &
-				B2R2_BLT_FLAG_CLUT_COLOR_CORRECTION) != 0) {
-			request->clut = dma_alloc_coherent(cont->dev,
-				CLUT_SIZE, &(request->clut_phys_addr),
-				GFP_DMA | GFP_KERNEL);
-			if (request->clut == NULL) {
-				b2r2_log_err(cont->dev, "%s CLUT allocation "
-					"failed.\n", __func__);
-				kfree(request);
-				return -ENOMEM;
-			}
-
-			if (copy_from_user(request->clut,
-					request->user_req.clut, CLUT_SIZE)) {
-				b2r2_log_err(cont->dev, "%s: CLUT "
-					"copy_from_user failed\n",
-					__func__);
-				dma_free_coherent(cont->dev, CLUT_SIZE,
-					request->clut,
-					request->clut_phys_addr);
-				request->clut = NULL;
-				request->clut_phys_addr = 0;
-				kfree(request);
-				return -EFAULT;
-			}
-		}
-
-		/* Perform the blit */
-
-#ifdef CONFIG_B2R2_GENERIC_ONLY
-		/* Use the generic path for all operations */
-		ret = b2r2_generic_blt(instance, request);
-#else
-		/* Use the optimized path */
-		ret = b2r2_blt(instance, request);
 #endif
 
-#ifdef CONFIG_B2R2_GENERIC_FALLBACK
-		/* Fall back to generic path if operation was not supported */
-		if (ret == -ENOSYS) {
-			struct b2r2_blt_request *request_gen;
-
-			if (request->user_req.flags & B2R2_BLT_FLAG_BG_BLEND) {
-				/* No support for BG BLEND in generic
-				 * implementation yet */
-				b2r2_log_warn(cont->dev, "%s: Unsupported: "
-					"Background blend in b2r2_generic_blt\n",
-					__func__);
-				return ret;
-			}
-
-			b2r2_log_info(cont->dev,
-				"b2r2_blt=%d Going generic.\n", ret);
-			request_gen = kmalloc(sizeof(*request_gen), GFP_KERNEL);
-			if (!request_gen) {
-				b2r2_log_err(cont->dev,
-					"%s: Failed to alloc mem for "
-					"request_gen\n", __func__);
-				return -ENOMEM;
-			}
-
-			/* Initialize the structure */
-			memset(request_gen, 0, sizeof(*request_gen));
-			INIT_LIST_HEAD(&request_gen->list);
-			request_gen->instance = instance;
-
-			/*
-			 * The user request is a sub structure of the
-			 * kernel request structure.
-			 */
-
-			/* Get the user data */
-			if (copy_from_user(&request_gen->user_req, (void *)arg,
-					sizeof(request_gen->user_req))) {
-				b2r2_log_err(cont->dev, "%s: copy_from_user "
-					"failed\n", __func__);
-				kfree(request_gen);
-				return -EFAULT;
-			}
+	b2r2_log_info(cont->dev, "%s\n", __func__);
 
-			/*
-			 * If the user specified a color look-up table,
-			 * make a copy that the HW can use.
-			 */
-			if ((request_gen->user_req.flags &
-					B2R2_BLT_FLAG_CLUT_COLOR_CORRECTION)
-					!= 0) {
-				request_gen->clut = dma_alloc_coherent(
-					cont->dev, CLUT_SIZE,
-					&(request_gen->clut_phys_addr),
-					GFP_DMA | GFP_KERNEL);
-				if (request_gen->clut == NULL) {
-					b2r2_log_err(cont->dev, "%s CLUT "
-						"allocation failed.\n",
-						__func__);
-					kfree(request_gen);
-					return -ENOMEM;
-				}
-
-				if (copy_from_user(request_gen->clut,
-						request_gen->user_req.clut,
-						CLUT_SIZE)) {
-					b2r2_log_err(cont->dev, "%s: CLUT"
-						" copy_from_user failed\n",
-						__func__);
-					dma_free_coherent(cont->dev, CLUT_SIZE,
-						request_gen->clut,
-						request_gen->clut_phys_addr);
-					request_gen->clut = NULL;
-					request_gen->clut_phys_addr = 0;
-					kfree(request_gen);
-					return -EFAULT;
-				}
-			}
+	/*
+	 * Loop and wait here until we have anything to return or
+	 * until interrupted
+	 */
+	mutex_lock(&instance->lock);
+	while (list_empty(&instance->report_list)) {
+		mutex_unlock(&instance->lock);
 
-			request_gen->profile = is_profiler_registered_approx();
+		/* Return if non blocking read */
+		if (!block)
+			return -EAGAIN;
 
-			ret = b2r2_generic_blt(instance, request_gen);
-			b2r2_log_info(cont->dev, "\nb2r2_generic_blt=%d "
-				"Generic done.\n", ret);
-		}
-#endif /* CONFIG_B2R2_GENERIC_FALLBACK */
+		b2r2_log_info(cont->dev, "%s - Going to sleep\n", __func__);
+		if (wait_event_interruptible(
+				instance->report_list_waitq,
+				!is_report_list_empty(instance)))
+			/* signal: tell the fs layer to handle it */
+			return -ERESTARTSYS;
 
-		break;
+		/* Otherwise loop, but first reaquire the lock */
+		mutex_lock(&instance->lock);
 	}
 
-	case B2R2_BLT_SYNCH_IOC:
-		/* arg is request_id */
-		ret = b2r2_blt_synch(instance, (int) arg);
-		break;
-
-	case B2R2_BLT_QUERY_CAP_IOC:
-	{
-		/* Arg is struct b2r2_blt_query_cap */
-		struct b2r2_blt_query_cap query_cap;
-
-		/* Get the user data */
-		if (copy_from_user(&query_cap, (void *)arg,
-				sizeof(query_cap))) {
-			b2r2_log_err(cont->dev, "%s: copy_from_user failed\n",
-				__func__);
-			return -EFAULT;
-		}
-
-		/* Fill in our capabilities */
-		ret = b2r2_blt_query_cap(instance, &query_cap);
-
-		/* Return data to user */
-		if (copy_to_user((void *)arg, &query_cap,
-				sizeof(query_cap))) {
-			b2r2_log_err(cont->dev, "%s: copy_to_user failed\n",
-				__func__);
-			return -EFAULT;
-		}
-		break;
-	}
+	if (!list_empty(&instance->report_list))
+		request = list_first_entry(
+			&instance->report_list, struct b2r2_blt_request, list);
 
-	default:
-		/* Unknown command */
-		b2r2_log_err(cont->dev, "%s: Unknown cmd %d\n", __func__, cmd);
-		ret = -EINVAL;
-		break;
+	if (request) {
+		/* Remove from list to avoid reading twice */
+		list_del_init(&request->list);
 
+		*request_out = request;
 	}
-
-	if (ret < 0)
-		b2r2_log_err(cont->dev, "EC %d OK!\n", -ret);
-
-	return ret;
-}
-
-/**
- * b2r2_blt_poll - Support for user-space poll, select & epoll.
- *                 Used for user-space callback
- *
- * @filp: File to poll on
- * @wait: Poll table to wait on
- *
- * This function checks if there are anything to read
- */
-static unsigned b2r2_blt_poll(struct file *filp, poll_table *wait)
-{
-	struct b2r2_blt_instance *instance =
-			(struct b2r2_blt_instance *) filp->private_data;
-	unsigned int mask = 0;
-#ifdef CONFIG_B2R2_DEBUG
-	struct b2r2_control *cont = instance->control;
-#endif
-
-	b2r2_log_info(cont->dev, "%s\n", __func__);
-
-	poll_wait(filp, &instance->report_list_waitq, wait);
-	mutex_lock(&instance->lock);
-	if (!list_empty(&instance->report_list))
-		mask |= POLLIN | POLLRDNORM;
 	mutex_unlock(&instance->lock);
 
-	return mask;
+	if (request)
+		return 1;
+
+	/* No report returned */
+	return 0;
 }
 
-/**
- * b2r2_blt_read - Read report data, user for user-space callback
- *
- * @filp: File pointer
- * @buf: User space buffer
- * @count: Number of bytes to read
- * @f_pos: File position
- *
- * Returns number of bytes read or negative error code
- */
-static ssize_t b2r2_blt_read(struct file *filp, char __user *buf, size_t count,
-			loff_t *f_pos)
+size_t b2r2_control_read_id(struct b2r2_control_instance *instance,
+		struct b2r2_blt_request **request_out, bool block,
+		int request_id)
 {
-	int ret = 0;
 	struct b2r2_blt_request *request = NULL;
-	struct b2r2_blt_report report;
-	struct b2r2_blt_instance *instance =
-		(struct b2r2_blt_instance *) filp->private_data;
 #ifdef CONFIG_B2R2_DEBUG
 	struct b2r2_control *cont = instance->control;
 #endif
 
 	b2r2_log_info(cont->dev, "%s\n", __func__);
 
-	/*
-	 * We return only complete report records, one at a time.
-	 * Might be more efficient to support read of many.
-	 */
-	count = (count / sizeof(struct b2r2_blt_report)) *
-		sizeof(struct b2r2_blt_report);
-	if (count > sizeof(struct b2r2_blt_report))
-		count = sizeof(struct b2r2_blt_report);
-	if (count == 0)
-		return count;
-
 	/*
 	 * Loop and wait here until we have anything to return or
 	 * until interrupted
@@ -617,7 +336,7 @@ static ssize_t b2r2_blt_read(struct file *filp, char __user *buf, size_t count,
 		mutex_unlock(&instance->lock);
 
 		/* Return if non blocking read */
-		if (filp->f_flags & O_NONBLOCK)
+		if (!block)
 			return -EAGAIN;
 
 		b2r2_log_info(cont->dev, "%s - Going to sleep\n", __func__);
@@ -631,55 +350,28 @@ static ssize_t b2r2_blt_read(struct file *filp, char __user *buf, size_t count,
 		mutex_lock(&instance->lock);
 	}
 
-	if (!list_empty(&instance->report_list))
-		request = list_first_entry(
-			&instance->report_list, struct b2r2_blt_request, list);
+	if (!list_empty(&instance->report_list)) {
+		struct b2r2_blt_request *pos;
+		list_for_each_entry(pos, &instance->report_list, list) {
+			if (pos->request_id)
+				request = pos;
+		}
+	}
 
 	if (request) {
 		/* Remove from list to avoid reading twice */
 		list_del_init(&request->list);
-
-		report.request_id = request->request_id;
-		report.report1 = request->user_req.report1;
-		report.report2 = request->user_req.report2;
-		report.usec_elapsed = 0; /* TBD */
-
-		mutex_unlock(&instance->lock);
-		if (copy_to_user(buf, &report, sizeof(report)))
-			ret = -EFAULT;
-		mutex_lock(&instance->lock);
-
-		if (ret < 0) {
-			/* copy to user failed, re-insert into list */
-			list_add(&request->list,
-					&request->instance->report_list);
-			request = NULL;
-		}
+		*request_out = request;
 	}
 	mutex_unlock(&instance->lock);
 
 	if (request)
-		/*
-		 * Release matching the addref when the job was put into
-		 * the report list
-		 */
-		b2r2_core_job_release(&request->job, __func__);
+		return 1;
 
-	return count;
+	/* No report returned */
+	return 0;
 }
 
-/**
- * b2r2_blt_fops - File operations for b2r2_blt
- */
-static const struct file_operations b2r2_blt_fops = {
-	.owner =          THIS_MODULE,
-	.open =           b2r2_blt_open,
-	.release =        b2r2_blt_release,
-	.unlocked_ioctl = b2r2_blt_ioctl,
-	.poll  =          b2r2_blt_poll,
-	.read  =          b2r2_blt_read,
-};
-
 #ifndef CONFIG_B2R2_GENERIC_ONLY
 /**
  * b2r2_blt - Implementation of the B2R2 blit request
@@ -687,14 +379,14 @@ static const struct file_operations b2r2_blt_fops = {
  * @instance: The B2R2 BLT instance
  * @request; The request to perform
  */
-static int b2r2_blt(struct b2r2_blt_instance *instance,
-		struct b2r2_blt_request *request)
+int b2r2_control_blt(struct b2r2_blt_request *request)
 {
 	int ret = 0;
 	struct b2r2_blt_rect actual_dst_rect;
 	int request_id = 0;
 	struct b2r2_node *last_node = request->first_node;
 	int node_count;
+	struct b2r2_control_instance *instance = request->instance;
 	struct b2r2_control *cont = instance->control;
 
 	u32 thread_runtime_at_start = 0;
@@ -918,6 +610,7 @@ static int b2r2_blt(struct b2r2_blt_instance *instance,
 		last_node = last_node->next;
 
 	request->job.tag = (int) instance;
+	request->job.data = (int) cont->data;
 	request->job.prio = request->user_req.prio;
 	request->job.first_node_address =
 		request->first_node->physical_address;
@@ -1010,33 +703,6 @@ static int b2r2_blt(struct b2r2_blt_instance *instance,
 	instance->no_of_active_requests++;
 	mutex_unlock(&instance->lock);
 
-	/* Wait for the job to be done if synchronous */
-	if ((request->user_req.flags & B2R2_BLT_FLAG_ASYNCH) == 0) {
-		b2r2_log_info(cont->dev, "%s: Synchronous, waiting\n",
-			__func__);
-
-		inc_stat(cont, &cont->stat_n_in_blt_wait);
-
-		ret = b2r2_core_job_wait(&request->job);
-
-		dec_stat(cont, &cont->stat_n_in_blt_wait);
-
-		if (ret < 0 && ret != -ENOENT)
-			b2r2_log_warn(cont->dev, "%s: Failed to wait job,"
-				" ret = %d\n", __func__, ret);
-		else
-			b2r2_log_info(cont->dev, "%s: Synchronous wait done\n",
-				__func__);
-		ret = 0;
-	}
-
-	/*
-	 * Release matching the addref in b2r2_core_job_add,
-	 * the request must not be accessed after this call
-	 */
-	b2r2_core_job_release(&request->job, __func__);
-	dec_stat(cont, &cont->stat_n_in_blt);
-
 	return ret >= 0 ? request_id : ret;
 
 job_add_failed:
@@ -1057,17 +723,52 @@ resolve_bg_buf_failed:
 		&request->src_resolved);
 resolve_src_buf_failed:
 synch_interrupted:
-	job_release(&request->job);
-	dec_stat(cont, &cont->stat_n_jobs_released);
 	if ((request->user_req.flags & B2R2_BLT_FLAG_DRY_RUN) == 0 || ret)
 		b2r2_log_warn(cont->dev, "%s returns with error %d\n",
 			__func__, ret);
+	job_release(&request->job);
+	dec_stat(cont, &cont->stat_n_jobs_released);
 
 	dec_stat(cont, &cont->stat_n_in_blt);
 
 	return ret;
 }
 
+int b2r2_control_waitjob(struct b2r2_blt_request *request)
+{
+	int ret = 0;
+	struct b2r2_control_instance *instance = request->instance;
+	struct b2r2_control *cont = instance->control;
+
+	/* Wait for the job to be done if synchronous */
+	if ((request->user_req.flags & B2R2_BLT_FLAG_ASYNCH) == 0) {
+		b2r2_log_info(cont->dev, "%s: Synchronous, waiting\n",
+			__func__);
+
+		inc_stat(cont, &cont->stat_n_in_blt_wait);
+
+		ret = b2r2_core_job_wait(&request->job);
+
+		dec_stat(cont, &cont->stat_n_in_blt_wait);
+
+		if (ret < 0 && ret != -ENOENT)
+			b2r2_log_warn(cont->dev, "%s: Failed to wait job,"
+				" ret = %d\n", __func__, ret);
+		else
+			b2r2_log_info(cont->dev, "%s: Synchronous wait done\n",
+				__func__);
+	}
+
+	/*
+	 * Release matching the addref in b2r2_core_job_add,
+	 * the request must not be accessed after this call
+	 */
+	b2r2_core_job_release(&request->job, __func__);
+	dec_stat(cont, &cont->stat_n_in_blt);
+
+	return ret;
+}
+
 /**
  * Called when job is done or cancelled
  *
@@ -1075,9 +776,13 @@ synch_interrupted:
  */
 static void job_callback(struct b2r2_core_job *job)
 {
-	struct b2r2_blt_request *request =
-		container_of(job, struct b2r2_blt_request, job);
-	struct b2r2_control *cont = request->instance->control;
+	struct b2r2_blt_request *request = NULL;
+	struct b2r2_core *core = NULL;
+	struct b2r2_control *cont = NULL;
+
+	request = container_of(job, struct b2r2_blt_request, job);
+	core = (struct b2r2_core *) job->data;
+	cont = core->control;
 
 	if (cont->dev)
 		b2r2_log_info(cont->dev, "%s\n", __func__);
@@ -1098,6 +803,8 @@ static void job_callback(struct b2r2_core_job *job)
 
 	/* Move to report list if the job shall be reported */
 	/* FIXME: Use a smaller struct? */
+	/* TODO: In the case of kernel API call, feed an asynch task to the
+	 * instance worker (kthread) instead of polling for a report */
 	mutex_lock(&request->instance->lock);
 	if (request->user_req.flags & B2R2_BLT_FLAG_REPORT_WHEN_DONE) {
 		/* Move job to report list */
@@ -1163,9 +870,13 @@ static void job_callback(struct b2r2_core_job *job)
  */
 static void job_release(struct b2r2_core_job *job)
 {
-	struct b2r2_blt_request *request =
-		container_of(job, struct b2r2_blt_request, job);
-	struct b2r2_control *cont = request->instance->control;
+	struct b2r2_blt_request *request = NULL;
+	struct b2r2_core *core = NULL;
+	struct b2r2_control *cont = NULL;
+
+	request = container_of(job, struct b2r2_blt_request, job);
+	core = (struct b2r2_core *) job->data;
+	cont = core->control;
 
 	inc_stat(cont, &cont->stat_n_jobs_released);
 
@@ -1206,7 +917,8 @@ static int job_acquire_resources(struct b2r2_core_job *job, bool atomic)
 {
 	struct b2r2_blt_request *request =
 		container_of(job, struct b2r2_blt_request, job);
-	struct b2r2_control *cont = request->instance->control;
+	struct b2r2_core *core = (struct b2r2_core *) job->data;
+	struct b2r2_control *cont = core->control;
 	int ret;
 	int i;
 
@@ -1280,7 +992,8 @@ static void job_release_resources(struct b2r2_core_job *job, bool atomic)
 {
 	struct b2r2_blt_request *request =
 		container_of(job, struct b2r2_blt_request, job);
-	struct b2r2_control *cont = request->instance->control;
+	struct b2r2_core *core = (struct b2r2_core *) job->data;
+	struct b2r2_control *cont = core->control;
 	int i;
 
 	b2r2_log_info(cont->dev, "%s\n", __func__);
@@ -1323,9 +1036,9 @@ static void job_release_resources(struct b2r2_core_job *job, bool atomic)
 static void tile_job_callback_gen(struct b2r2_core_job *job)
 {
 #ifdef CONFIG_B2R2_DEBUG
-	struct b2r2_blt_instance *instance =
-			(struct b2r2_blt_instance *) job->tag;
-	struct b2r2_control *cont = instance->control;
+	struct b2r2_core *core =
+			(struct b2r2_core *) job->data;
+	struct b2r2_control *cont = core->control;
 #endif
 
 	b2r2_log_info(cont->dev, "%s\n", __func__);
@@ -1355,7 +1068,8 @@ static void job_callback_gen(struct b2r2_core_job *job)
 {
 	struct b2r2_blt_request *request =
 		container_of(job, struct b2r2_blt_request, job);
-	struct b2r2_control *cont = request->instance->control;
+	struct b2r2_core *core = (struct b2r2_core *) job->data;
+	struct b2r2_control *cont = core->control;
 
 	b2r2_log_info(cont->dev, "%s\n", __func__);
 
@@ -1372,8 +1086,9 @@ static void job_callback_gen(struct b2r2_core_job *job)
 
 	/* Move to report list if the job shall be reported */
 	/* FIXME: Use a smaller struct? */
+	/* TODO: In the case of kernel API call, feed an asynch task to the
+	 * instance worker (kthread) instead of polling for a report */
 	mutex_lock(&request->instance->lock);
-
 	if (request->user_req.flags & B2R2_BLT_FLAG_REPORT_WHEN_DONE) {
 		/* Move job to report list */
 		list_add_tail(&request->list,
@@ -1398,7 +1113,7 @@ static void job_callback_gen(struct b2r2_core_job *job)
 	BUG_ON(request->instance->no_of_active_requests == 0);
 	request->instance->no_of_active_requests--;
 	if (request->instance->synching &&
-	request->instance->no_of_active_requests == 0) {
+			request->instance->no_of_active_requests == 0) {
 		request->instance->synching = false;
 		/* Wake up all syncing */
 
@@ -1438,9 +1153,9 @@ static void job_callback_gen(struct b2r2_core_job *job)
 
 static void tile_job_release_gen(struct b2r2_core_job *job)
 {
-	struct b2r2_blt_instance *instance =
-			(struct b2r2_blt_instance *) job->tag;
-	struct b2r2_control *cont = instance->control;
+	struct b2r2_core *core =
+			(struct b2r2_core *) job->data;
+	struct b2r2_control *cont = core->control;
 
 	inc_stat(cont, &cont->stat_n_jobs_released);
 
@@ -1462,7 +1177,8 @@ static void job_release_gen(struct b2r2_core_job *job)
 {
 	struct b2r2_blt_request *request =
 		container_of(job, struct b2r2_blt_request, job);
-	struct b2r2_control *cont = request->instance->control;
+	struct b2r2_core *core = (struct b2r2_core *) job->data;
+	struct b2r2_control *cont = core->control;
 
 	inc_stat(cont, &cont->stat_n_jobs_released);
 
@@ -1503,11 +1219,9 @@ static void job_release_resources_gen(struct b2r2_core_job *job, bool atomic)
 /**
  * b2r2_generic_blt - Generic implementation of the B2R2 blit request
  *
- * @instance: The B2R2 BLT instance
  * @request; The request to perform
  */
-static int b2r2_generic_blt(struct b2r2_blt_instance *instance,
-		struct b2r2_blt_request *request)
+int b2r2_generic_blt(struct b2r2_blt_request *request)
 {
 	int ret = 0;
 	struct b2r2_blt_rect actual_dst_rect;
@@ -1527,6 +1241,7 @@ static int b2r2_generic_blt(struct b2r2_blt_instance *instance,
 	struct b2r2_work_buf work_bufs[4];
 	struct b2r2_blt_rect dst_rect_tile;
 	int i;
+	struct b2r2_control_instance *instance = request->instance;
 	struct b2r2_control *cont = instance->control;
 
 	u32 thread_runtime_at_start = 0;
@@ -1754,6 +1469,7 @@ static int b2r2_generic_blt(struct b2r2_blt_instance *instance,
 		last_node = last_node->next;
 
 	request->job.tag = (int) instance;
+	request->job.data = (int) cont->data;
 	request->job.prio = request->user_req.prio;
 	request->job.first_node_address =
 		request->first_node->physical_address;
@@ -1860,7 +1576,9 @@ static int b2r2_generic_blt(struct b2r2_blt_instance *instance,
 						"(%d, %d)\n", __func__, x, y);
 				continue;
 			}
+			tile_job->job_id = request->job.job_id;
 			tile_job->tag = request->job.tag;
+			tile_job->data = request->job.data;
 			tile_job->prio = request->job.prio;
 			tile_job->first_node_address =
 					request->job.first_node_address;
@@ -1976,7 +1694,9 @@ static int b2r2_generic_blt(struct b2r2_blt_instance *instance,
 					"(%d, %d)\n", __func__, x, y);
 				continue;
 			}
+			tile_job->job_id = request->job.job_id;
 			tile_job->tag = request->job.tag;
+			tile_job->data = request->job.data;
 			tile_job->prio = request->job.prio;
 			tile_job->first_node_address =
 				request->job.first_node_address;
@@ -2177,7 +1897,7 @@ zero_blt:
  * @request_id: If 0, wait for all requests on this instance to finish.
  *              Else wait for request with given request id to finish.
  */
-static int b2r2_blt_synch(struct b2r2_blt_instance *instance,
+int b2r2_control_synch(struct b2r2_control_instance *instance,
 			int request_id)
 {
 	int ret = 0;
@@ -2223,19 +1943,6 @@ static int b2r2_blt_synch(struct b2r2_blt_instance *instance,
 	return ret;
 }
 
-/**
- * Query B2R2 capabilities
- *
- * @instance: The B2R2 BLT instance
- * @query_cap: The structure receiving the capabilities
- */
-static int b2r2_blt_query_cap(struct b2r2_blt_instance *instance,
-		struct b2r2_blt_query_cap *query_cap)
-{
-	/* FIXME: Not implemented yet */
-	return -ENOSYS;
-}
-
 static void get_actual_dst_rect(struct b2r2_blt_req *req,
 					struct b2r2_blt_rect *actual_dst_rect)
 {
@@ -2261,12 +1968,12 @@ static void set_up_hwmem_region(struct b2r2_control *cont,
 	if (b2r2_is_zero_area_rect(rect))
 		return;
 
-	img_size = b2r2_get_img_size(cont, img);
+	img_size = b2r2_get_img_size(cont->dev, img);
 
 	if (b2r2_is_single_plane_fmt(img->fmt) &&
 			b2r2_is_independent_pixel_fmt(img->fmt)) {
-		int img_fmt_bpp = b2r2_get_fmt_bpp(cont, img->fmt);
-		u32 img_pitch = b2r2_get_img_pitch(cont, img);
+		int img_fmt_bpp = b2r2_get_fmt_bpp(cont->dev, img->fmt);
+		u32 img_pitch = b2r2_get_img_pitch(cont->dev, img);
 
 		region->offset = (u32)(img->buf.offset + (rect->y *
 				img_pitch));
@@ -2319,8 +2026,9 @@ static int resolve_hwmem(struct b2r2_control *cont,
 	required_access = (is_dst ? HWMEM_ACCESS_WRITE : HWMEM_ACCESS_READ) |
 			HWMEM_ACCESS_IMPORT;
 	if ((required_access & access) != required_access) {
-		b2r2_log_info(cont->dev, "%s: Insufficient access to hwmem "
-			"buffer.\n", __func__);
+		b2r2_log_info(cont->dev,
+			"%s: Insufficient access to hwmem (%d, requires %d)"
+			"buffer.\n", __func__, access, required_access);
 		return_value = -EACCES;
 		goto access_check_failed;
 	}
@@ -2333,11 +2041,12 @@ static int resolve_hwmem(struct b2r2_control *cont,
 	}
 
 	if (resolved_buf->file_len <
-			img->buf.offset + (__u32)b2r2_get_img_size(cont, img)) {
+			img->buf.offset +
+			(__u32)b2r2_get_img_size(cont->dev, img)) {
 		b2r2_log_info(cont->dev, "%s: Hwmem buffer too small. (%d < "
 			"%d)\n", __func__, resolved_buf->file_len,
 			img->buf.offset +
-			(__u32)b2r2_get_img_size(cont, img));
+			(__u32)b2r2_get_img_size(cont->dev, img));
 		return_value = -EINVAL;
 		goto size_check_failed;
 	}
@@ -2714,7 +2423,7 @@ static void sync_buf(struct b2r2_control *cont,
  *
  * @instance: The B2R2 BLT instance
  */
-static bool is_report_list_empty(struct b2r2_blt_instance *instance)
+static bool is_report_list_empty(struct b2r2_control_instance *instance)
 {
 	bool is_empty;
 
@@ -2730,7 +2439,7 @@ static bool is_report_list_empty(struct b2r2_blt_instance *instance)
  *
  * @instance: The B2R2 BLT instance
  */
-static bool is_synching(struct b2r2_blt_instance *instance)
+static bool is_synching(struct b2r2_control_instance *instance)
 {
 	bool is_synching;
 
@@ -2767,213 +2476,6 @@ static void dec_stat(struct b2r2_control *cont, unsigned long *stat)
 
 
 #ifdef CONFIG_DEBUG_FS
-/**
- * sprintf_req() - Builds a string representing the request, for debug
- *
- * @request:Request that should be encoded into a string
- * @buf: Receiving buffer
- * @size: Size of receiving buffer
- *
- * Returns number of characters in string, excluding null terminator
- */
-static int sprintf_req(struct b2r2_blt_request *request, char *buf, int size)
-{
-	size_t dev_size = 0;
-
-	/* generic request info */
-	dev_size += sprintf(buf + dev_size,
-		"instance      : 0x%08lX\n",
-		(unsigned long) request->instance);
-	dev_size += sprintf(buf + dev_size,
-		"size          : %d bytes\n", request->user_req.size);
-	dev_size += sprintf(buf + dev_size,
-		"flags         : 0x%08lX\n",
-		(unsigned long) request->user_req.flags);
-	dev_size += sprintf(buf + dev_size,
-		"transform     : %d\n",
-		(int) request->user_req.transform);
-	dev_size += sprintf(buf + dev_size,
-		"prio          : %d\n", request->user_req.transform);
-	dev_size += sprintf(buf + dev_size,
-		"global_alpha  : %d\n",
-		(int) request->user_req.global_alpha);
-	dev_size += sprintf(buf + dev_size,
-		"report1       : 0x%08lX\n",
-		(unsigned long) request->user_req.report1);
-	dev_size += sprintf(buf + dev_size,
-		"report2       : 0x%08lX\n",
-		(unsigned long) request->user_req.report2);
-	dev_size += sprintf(buf + dev_size,
-		"request_id    : 0x%08lX\n\n",
-		(unsigned long) request->request_id);
-
-	/* src info */
-	dev_size += sprintf(buf + dev_size,
-		"src_img.fmt   : %#010x\n",
-		request->user_req.src_img.fmt);
-	dev_size += sprintf(buf + dev_size,
-		"src_img.buf   : {type=%d, hwmem_buf_name=%d, fd=%d, "
-		"offset=%d, len=%d}\n",
-		request->user_req.src_img.buf.type,
-		request->user_req.src_img.buf.hwmem_buf_name,
-		request->user_req.src_img.buf.fd,
-		request->user_req.src_img.buf.offset,
-		request->user_req.src_img.buf.len);
-	dev_size += sprintf(buf + dev_size,
-		"src_img       : {width=%d, height=%d, pitch=%d}\n",
-		request->user_req.src_img.width,
-		request->user_req.src_img.height,
-		request->user_req.src_img.pitch);
-	dev_size += sprintf(buf + dev_size,
-		"src_mask.fmt  : %#010x\n",
-		request->user_req.src_mask.fmt);
-	dev_size += sprintf(buf + dev_size,
-		"src_mask.buf  : {type=%d, hwmem_buf_name=%d, fd=%d,"
-		" offset=%d, len=%d}\n",
-		request->user_req.src_mask.buf.type,
-		request->user_req.src_mask.buf.hwmem_buf_name,
-		request->user_req.src_mask.buf.fd,
-		request->user_req.src_mask.buf.offset,
-		request->user_req.src_mask.buf.len);
-	dev_size += sprintf(buf + dev_size,
-		"src_mask      : {width=%d, height=%d, pitch=%d}\n",
-		request->user_req.src_mask.width,
-		request->user_req.src_mask.height,
-		request->user_req.src_mask.pitch);
-	dev_size += sprintf(buf + dev_size,
-		"src_rect      : {x=%d, y=%d, width=%d, height=%d}\n",
-		request->user_req.src_rect.x,
-		request->user_req.src_rect.y,
-		request->user_req.src_rect.width,
-		request->user_req.src_rect.height);
-	dev_size += sprintf(buf + dev_size,
-		"src_color     : 0x%08lX\n\n",
-		(unsigned long) request->user_req.src_color);
-
-	/* bg info */
-	dev_size += sprintf(buf + dev_size,
-		"bg_img.fmt    : %#010x\n",
-		request->user_req.bg_img.fmt);
-	dev_size += sprintf(buf + dev_size,
-		"bg_img.buf    : {type=%d, hwmem_buf_name=%d, fd=%d,"
-		" offset=%d, len=%d}\n",
-		request->user_req.bg_img.buf.type,
-		request->user_req.bg_img.buf.hwmem_buf_name,
-		request->user_req.bg_img.buf.fd,
-		request->user_req.bg_img.buf.offset,
-		request->user_req.bg_img.buf.len);
-	dev_size += sprintf(buf + dev_size,
-		"bg_img        : {width=%d, height=%d, pitch=%d}\n",
-		request->user_req.bg_img.width,
-		request->user_req.bg_img.height,
-		request->user_req.bg_img.pitch);
-	dev_size += sprintf(buf + dev_size,
-		"bg_rect       : {x=%d, y=%d, width=%d, height=%d}\n\n",
-		request->user_req.bg_rect.x,
-		request->user_req.bg_rect.y,
-		request->user_req.bg_rect.width,
-		request->user_req.bg_rect.height);
-
-	/* dst info */
-	dev_size += sprintf(buf + dev_size,
-		"dst_img.fmt   : %#010x\n",
-		request->user_req.dst_img.fmt);
-	dev_size += sprintf(buf + dev_size,
-		"dst_img.buf   : {type=%d, hwmem_buf_name=%d, fd=%d,"
-		" offset=%d, len=%d}\n",
-		request->user_req.dst_img.buf.type,
-		request->user_req.dst_img.buf.hwmem_buf_name,
-		request->user_req.dst_img.buf.fd,
-		request->user_req.dst_img.buf.offset,
-		request->user_req.dst_img.buf.len);
-	dev_size += sprintf(buf + dev_size,
-		"dst_img       : {width=%d, height=%d, pitch=%d}\n",
-		request->user_req.dst_img.width,
-		request->user_req.dst_img.height,
-		request->user_req.dst_img.pitch);
-	dev_size += sprintf(buf + dev_size,
-		"dst_rect      : {x=%d, y=%d, width=%d, height=%d}\n",
-		request->user_req.dst_rect.x,
-		request->user_req.dst_rect.y,
-		request->user_req.dst_rect.width,
-		request->user_req.dst_rect.height);
-	dev_size += sprintf(buf + dev_size,
-		"dst_clip_rect : {x=%d, y=%d, width=%d, height=%d}\n",
-		request->user_req.dst_clip_rect.x,
-		request->user_req.dst_clip_rect.y,
-		request->user_req.dst_clip_rect.width,
-		request->user_req.dst_clip_rect.height);
-	dev_size += sprintf(buf + dev_size,
-		"dst_color     : 0x%08lX\n\n",
-		(unsigned long) request->user_req.dst_color);
-
-	dev_size += sprintf(buf + dev_size,
-		"src_resolved.physical                  : 0x%08lX\n",
-		(unsigned long) request->src_resolved.
-		physical_address);
-	dev_size += sprintf(buf + dev_size,
-		"src_resolved.virtual                   : 0x%08lX\n",
-		(unsigned long) request->src_resolved.virtual_address);
-	dev_size += sprintf(buf + dev_size,
-		"src_resolved.filep                     : 0x%08lX\n",
-		(unsigned long) request->src_resolved.filep);
-	dev_size += sprintf(buf + dev_size,
-		"src_resolved.filep_physical_start      : 0x%08lX\n",
-		(unsigned long) request->src_resolved.
-		file_physical_start);
-	dev_size += sprintf(buf + dev_size,
-		"src_resolved.filep_virtual_start       : 0x%08lX\n",
-		(unsigned long) request->src_resolved.file_virtual_start);
-	dev_size += sprintf(buf + dev_size,
-		"src_resolved.file_len                  : %d\n\n",
-		request->src_resolved.file_len);
-
-	dev_size += sprintf(buf + dev_size,
-		"src_mask_resolved.physical             : 0x%08lX\n",
-		(unsigned long) request->src_mask_resolved.
-		physical_address);
-	dev_size += sprintf(buf + dev_size,
-		"src_mask_resolved.virtual              : 0x%08lX\n",
-		(unsigned long) request->src_mask_resolved.virtual_address);
-	dev_size += sprintf(buf + dev_size,
-		"src_mask_resolved.filep                : 0x%08lX\n",
-		(unsigned long) request->src_mask_resolved.filep);
-	dev_size += sprintf(buf + dev_size,
-		"src_mask_resolved.filep_physical_start : 0x%08lX\n",
-		(unsigned long) request->src_mask_resolved.
-		file_physical_start);
-	dev_size += sprintf(buf + dev_size,
-		"src_mask_resolved.filep_virtual_start  : 0x%08lX\n",
-		(unsigned long) request->src_mask_resolved.
-		file_virtual_start);
-	dev_size += sprintf(buf + dev_size,
-		"src_mask_resolved.file_len             : %d\n\n",
-		request->src_mask_resolved.file_len);
-
-	dev_size += sprintf(buf + dev_size,
-		"dst_resolved.physical                  : 0x%08lX\n",
-		(unsigned long) request->dst_resolved.
-		physical_address);
-	dev_size += sprintf(buf + dev_size,
-		"dst_resolved.virtual                   : 0x%08lX\n",
-		(unsigned long) request->dst_resolved.virtual_address);
-	dev_size += sprintf(buf + dev_size,
-		"dst_resolved.filep                     : 0x%08lX\n",
-		(unsigned long) request->dst_resolved.filep);
-	dev_size += sprintf(buf + dev_size,
-		"dst_resolved.filep_physical_start      : 0x%08lX\n",
-		(unsigned long) request->dst_resolved.
-		file_physical_start);
-	dev_size += sprintf(buf + dev_size,
-		"dst_resolved.filep_virtual_start       : 0x%08lX\n",
-		(unsigned long) request->dst_resolved.file_virtual_start);
-	dev_size += sprintf(buf + dev_size,
-		"dst_resolved.file_len                  : %d\n\n",
-		request->dst_resolved.file_len);
-
-	return dev_size;
-}
-
 /**
  * debugfs_b2r2_blt_request_read() - Implements debugfs read for B2R2 register
  *
@@ -3246,27 +2748,12 @@ static void destroy_tmp_bufs(struct b2r2_control *cont)
  *
  * Returns 0 if OK else negative error code
  */
-int b2r2_blt_module_init(struct b2r2_control *cont)
+int b2r2_control_init(struct b2r2_control *cont)
 {
 	int ret;
 
 	mutex_init(&cont->stat_lock);
 
-	/* Register b2r2 driver */
-	cont->miscdev.minor = MISC_DYNAMIC_MINOR;
-	cont->miscdev.name = cont->name;
-	cont->miscdev.fops = &b2r2_blt_fops;
-
-	ret = misc_register(&cont->miscdev);
-	if (ret) {
-		printk(KERN_WARNING "%s: registering misc device fails\n",
-				__func__);
-		goto b2r2_misc_register_fail;
-	}
-
-	cont->dev = cont->miscdev.this_device;
-	dev_set_drvdata(cont->dev, cont);
-
 #ifdef CONFIG_B2R2_GENERIC
 	/* Initialize generic path */
 	b2r2_generic_init(cont);
@@ -3280,11 +2767,6 @@ int b2r2_blt_module_init(struct b2r2_control *cont)
 
 	b2r2_log_info(cont->dev, "%s: device registered\n", __func__);
 
-	/*
-	 * FIXME: This stuff should be done before the first requests i.e.
-	 * before misc_register, but they need the device which is not
-	 * available until after misc_register.
-	 */
 	cont->dev->coherent_dma_mask = 0xFFFFFFFF;
 	init_tmp_bufs(cont);
 	ret = b2r2_filters_init(cont);
@@ -3315,7 +2797,6 @@ int b2r2_blt_module_init(struct b2r2_control *cont)
 	}
 #endif
 
-	b2r2_ctl[cont->id] = cont;
 	b2r2_log_info(cont->dev, "%s: done\n", __func__);
 
 	return ret;
@@ -3328,15 +2809,13 @@ b2r2_node_split_init_fail:
 #ifdef CONFIG_B2R2_GENERIC
 	b2r2_generic_exit(cont);
 #endif
-	misc_deregister(&cont->miscdev);
-b2r2_misc_register_fail:
 	return ret;
 }
 
 /**
- * b2r2_module_exit() - Module exit function
+ * b2r2_control_exit() - Module exit function
  */
-void b2r2_blt_module_exit(struct b2r2_control *cont)
+void b2r2_control_exit(struct b2r2_control *cont)
 {
 	if (cont) {
 		b2r2_log_info(cont->dev, "%s\n", __func__);
@@ -3348,8 +2827,6 @@ void b2r2_blt_module_exit(struct b2r2_control *cont)
 #endif
 		b2r2_mem_exit(cont);
 		destroy_tmp_bufs(cont);
-		b2r2_ctl[cont->id] = NULL;
-		misc_deregister(&cont->miscdev);
 		b2r2_node_split_exit(cont);
 #if defined(CONFIG_B2R2_GENERIC)
 		b2r2_generic_exit(cont);
diff --git a/drivers/video/b2r2/b2r2_control.h b/drivers/video/b2r2/b2r2_control.h
new file mode 100644
index 00000000000..d13d2188618
--- /dev/null
+++ b/drivers/video/b2r2/b2r2_control.h
@@ -0,0 +1,33 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2012
+ *
+ * ST-Ericsson B2R2 internal definitions
+ *
+ * Author: Jorgen Nilsson <jorgen.nilsson@stericsson.com>
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+
+#ifndef _LINUX_DRIVERS_VIDEO_B2R2_CONTROL_H_
+#define _LINUX_DRIVERS_VIDEO_B2R2_CONTROL_H_
+
+#include "b2r2_internal.h"
+
+int b2r2_control_init(struct b2r2_control *cont);
+void b2r2_control_exit(struct b2r2_control *cont);
+int b2r2_control_open(struct b2r2_control_instance *instance);
+int b2r2_control_release(struct b2r2_control_instance *instance);
+
+int b2r2_control_blt(struct b2r2_blt_request *request);
+int b2r2_generic_blt(struct b2r2_blt_request *request);
+int b2r2_control_waitjob(struct b2r2_blt_request *request);
+int b2r2_control_synch(struct b2r2_control_instance *instance,
+			int request_id);
+size_t b2r2_control_read(struct b2r2_control_instance *instance,
+		struct b2r2_blt_request **request_out, bool block);
+size_t b2r2_control_read_id(struct b2r2_control_instance *instance,
+		struct b2r2_blt_request **request_out, bool block,
+		int request_id);
+
+#endif
diff --git a/drivers/video/b2r2/b2r2_core.c b/drivers/video/b2r2/b2r2_core.c
index ed5f52598da..02071d5f989 100644
--- a/drivers/video/b2r2/b2r2_core.c
+++ b/drivers/video/b2r2/b2r2_core.c
@@ -48,72 +48,17 @@
 #include <linux/regulator/consumer.h>
 #include <linux/slab.h>
 #include <linux/err.h>
+#include <linux/kref.h>
 
 #include "b2r2_internal.h"
 #include "b2r2_core.h"
 #include "b2r2_global.h"
 #include "b2r2_structures.h"
-#include "b2r2_internal.h"
+#include "b2r2_control.h"
 #include "b2r2_profiler_api.h"
 #include "b2r2_timing.h"
 #include "b2r2_debug.h"
 
-/**
- * B2R2_DRIVER_TIMEOUT_VALUE - Busy loop timeout after soft reset
- */
-#define B2R2_DRIVER_TIMEOUT_VALUE (1500)
-
-/**
- * B2R2_CLK_FLAG - Value to write into clock reg to turn clock on
- */
-#define B2R2_CLK_FLAG (0x125)
-
-/**
- * DEBUG_CHECK_ADDREF_RELEASE - Define this to enable addref / release debug
- */
-#define DEBUG_CHECK_ADDREF_RELEASE 1
-
-#ifdef CONFIG_DEBUG_FS
-/**
- * HANDLE_TIMEOUTED_JOBS - Define this to check jobs for timeout and cancel them
- */
-#define HANDLE_TIMEOUTED_JOBS 1
-#endif
-
-/**
- * B2R2_CLOCK_ALWAYS_ON - Define this to disable power save clock turn off
- */
-/* #define B2R2_CLOCK_ALWAYS_ON 1 */
-
-/**
- * START_SENTINEL - Watch guard to detect job overwrites
- */
-#define START_SENTINEL 0xBABEDEEA
-
-/**
- * STOP_SENTINEL - Watch guard to detect job overwrites
- */
-#define END_SENTINEL 0xDADBDCDD
-
-/**
- * B2R2_CORE_LOWEST_PRIO - Lowest prio allowed
- */
-#define B2R2_CORE_LOWEST_PRIO -19
-/**
- * B2R2_CORE_HIGHEST_PRIO - Highest prio allowed
- */
-#define B2R2_CORE_HIGHEST_PRIO 20
-
-/**
- * B2R2_DOMAIN_DISABLE -
- */
-#define B2R2_DOMAIN_DISABLE_TIMEOUT (HZ/100)
-
-/**
- * B2R2_REGULATOR_RETRY_COUNT -
- */
-#define B2R2_REGULATOR_RETRY_COUNT 10
-
 /**
  * B2R2 Hardware defines below
  */
@@ -179,134 +124,6 @@
 #define	B2R2BLT_STA1AccessType		(INITIAL_TEST)
 #define	B2R2BLT_STA1			(0xa08)
 
-
-#ifdef DEBUG_CHECK_ADDREF_RELEASE
-
-/**
- * struct addref_release - Represents one addref or release. Used
- *                         to debug addref / release problems
- *
- * @addref: true if this represents an addref else it represents
- *          a release.
- * @job: The job that was referenced
- * @caller: The caller of the addref or release
- * @ref_count: The job reference count after addref / release
- */
-struct addref_release {
-	bool addref;
-	struct b2r2_core_job *job;
-	const char *caller;
-	int ref_count;
-};
-
-#endif
-
-/**
- * struct b2r2_core - Administration data for B2R2 core
- *
- * @lock: Spin lock protecting the b2r2_core structure and the B2R2 HW
- * @hw: B2R2 registers memory mapped
- * @pmu_b2r2_clock: Control of B2R2 clock
- * @log_dev: Device used for logging via dev_... functions
- *
- * @prio_queue: Queue of jobs sorted in priority order
- * @active_jobs: Array containing pointer to zero or one job per queue
- * @n_active_jobs: Number of active jobs
- * @jiffies_last_active: jiffie value when adding last active job
- * @jiffies_last_irq: jiffie value when last irq occured
- * @timeout_work: Work structure for timeout work
- *
- * @next_job_id: Contains the job id that will be assigned to the next
- *               added job.
- *
- * @clock_request_count: When non-zero, clock is on
- * @clock_off_timer: Kernel timer to handle delayed turn off of clock
- *
- * @work_queue: Work queue to handle done jobs (callbacks) and timeouts in
- *              non-interrupt context.
- *
- * @stat_n_irq: Number of interrupts (statistics)
- * @stat_n_jobs_added: Number of jobs added (statistics)
- * @stat_n_jobs_removed: Number of jobs removed (statistics)
- * @stat_n_jobs_in_prio_list: Number of jobs in prio list (statistics)
- *
- * @debugfs_root_dir: Root directory for B2R2 debugfs
- *
- * @ar: Circular array of addref / release debug structs
- * @ar_write: Where next write will occur
- * @ar_read: First valid place to read. When ar_read == ar_write then
- *           the array is empty.
- */
-struct b2r2_core {
-	spinlock_t       lock;
-
-	struct b2r2_memory_map *hw;
-
-	u8 op_size;
-	u8 ch_size;
-	u8 pg_size;
-	u8 mg_size;
-	u16 min_req_time;
-	int irq;
-
-	char name[16];
-	struct device *dev;
-
-	struct list_head prio_queue;
-
-	struct b2r2_core_job *active_jobs[B2R2_CORE_QUEUE_NO_OF];
-	unsigned long    n_active_jobs;
-
-	unsigned long    jiffies_last_active;
-	unsigned long    jiffies_last_irq;
-#ifdef HANDLE_TIMEOUTED_JOBS
-	struct delayed_work     timeout_work;
-#endif
-	int              next_job_id;
-
-	unsigned long    clock_request_count;
-	struct timer_list clock_off_timer;
-
-	struct workqueue_struct *work_queue;
-
-	/* Statistics */
-	unsigned long    stat_n_irq;
-	unsigned long    stat_n_jobs_added;
-	unsigned long    stat_n_jobs_removed;
-
-	unsigned long    stat_n_jobs_in_prio_list;
-
-#ifdef CONFIG_DEBUG_FS
-	struct dentry *debugfs_root_dir;
-	struct dentry *debugfs_core_root_dir;
-	struct dentry *debugfs_regs_dir;
-#endif
-
-#ifdef DEBUG_CHECK_ADDREF_RELEASE
-	/* Tracking release bug...*/
-	struct addref_release ar[100];
-	int ar_write;
-	int ar_read;
-#endif
-
-	/* Power management variables */
-	struct mutex domain_lock;
-	struct delayed_work domain_disable_work;
-
-	/*
-	 * We need to keep track of both the number of domain_enable/disable()
-	 * calls and whether the power was actually turned off, since the
-	 * power off is done in a delayed job.
-	 */
-	bool domain_enabled;
-	int domain_request_count;
-
-	struct clk *b2r2_clock;
-	struct regulator *b2r2_reg;
-
-	struct b2r2_control *control;
-};
-
 /**
  * b2r2_core - Quick link to administration data for B2R2
  */
@@ -318,7 +135,6 @@ static void  clear_interrupts(struct b2r2_core *core);
 static void trigger_job(struct b2r2_core *core, struct b2r2_core_job *job);
 static void exit_job_list(struct b2r2_core *core,
 		struct list_head *job_list);
-static int get_next_job_id(struct b2r2_core *core);
 static void job_work_function(struct work_struct *ptr);
 static void init_job(struct b2r2_core_job *job);
 static void insert_into_prio_list(struct b2r2_core *core,
@@ -439,19 +255,21 @@ static void internal_job_addref(struct b2r2_core *core,
 {
 	u32 ref_count;
 
-	b2r2_log_info(core->dev, "%s (%p, %p) (from %s)\n",
-		__func__, core, job, caller);
-
 	/* Sanity checks */
+	BUG_ON(core == NULL);
 	BUG_ON(job == NULL);
 
+	b2r2_log_info(core->dev, "%s (core: %p, job: %p) (from %s)\n",
+		__func__, core, job, caller);
+
+
 	if (job->start_sentinel != START_SENTINEL ||
 			job->end_sentinel != END_SENTINEL ||
 			job->ref_count == 0 || job->ref_count > 10)	{
-		b2r2_log_info(core->dev, "%s: (%p, %p) start=%X end=%X "
-			"ref_count=%d\n", __func__, core, job,
-			job->start_sentinel, job->end_sentinel,
-			job->ref_count);
+		b2r2_log_info(core->dev, "%s: (core: %p, job: %p) "
+			"start=%X end=%X ref_count=%d\n",
+			__func__, core, job, job->start_sentinel,
+			job->end_sentinel, job->ref_count);
 
 	/* Something is wrong, print the addref / release array */
 #ifdef DEBUG_CHECK_ADDREF_RELEASE
@@ -471,8 +289,8 @@ static void internal_job_addref(struct b2r2_core *core,
 	ar_add(core, job, caller, true);
 #endif
 
-	b2r2_log_info(core->dev, "%s called from %s (%p, %p): Ref Count is "
-		"%d\n", __func__, caller, core, job, job->ref_count);
+	b2r2_log_info(core->dev, "%s called from %s (core: %p, job: %p): Ref "
+		"Count is %d\n", __func__, caller, core, job, job->ref_count);
 }
 
 /**
@@ -496,14 +314,14 @@ static bool internal_job_release(struct b2r2_core *core,
 	/* Sanity checks */
 	BUG_ON(job == NULL);
 
-	b2r2_log_info(core->dev, "%s (%p, %p) (from %s)\n",
+	b2r2_log_info(core->dev, "%s (core: %p, job: %p) (from %s)\n",
 		__func__, core, job, caller);
 
 	if (job->start_sentinel != START_SENTINEL ||
 			job->end_sentinel != END_SENTINEL ||
 			job->ref_count == 0 || job->ref_count > 10) {
-		b2r2_log_info(core->dev, "%s: (%p, %p) start=%X end=%X "
-			"ref_count=%d\n", __func__, core, job,
+		b2r2_log_info(core->dev, "%s: (core: %p, job: %p) start=%X "
+			"end=%X ref_count=%d\n", __func__, core, job,
 			job->start_sentinel, job->end_sentinel,
 			job->ref_count);
 
@@ -521,8 +339,8 @@ static bool internal_job_release(struct b2r2_core *core,
 #ifdef DEBUG_CHECK_ADDREF_RELEASE
 	ar_add(core, job, caller, false);
 #endif
-	b2r2_log_info(core->dev, "%s called from %s (%p, %p) Ref Count is "
-		"%d\n", __func__, caller, core, job, ref_count);
+	b2r2_log_info(core->dev, "%s called from %s (core: %p, job: %p) "
+		"Ref Count is %d\n", __func__, caller, core, job, ref_count);
 
 	if (!ref_count && job->release) {
 		call_release = true;
@@ -543,11 +361,10 @@ static bool internal_job_release(struct b2r2_core *core,
 void b2r2_core_job_addref(struct b2r2_core_job *job, const char *caller)
 {
 	unsigned long flags;
-	struct b2r2_blt_instance *instance;
 	struct b2r2_core *core;
 
-	instance = (struct b2r2_blt_instance *) job->tag;
-	core = instance->control->data;
+	BUG_ON(job == NULL || job->data == 0);
+	core = (struct b2r2_core *) job->data;
 
 	spin_lock_irqsave(&core->lock, flags);
 	internal_job_addref(core, job, caller);
@@ -561,11 +378,10 @@ void b2r2_core_job_release(struct b2r2_core_job *job, const char *caller)
 {
 	unsigned long flags;
 	bool call_release = false;
-	struct b2r2_blt_instance *instance;
 	struct b2r2_core *core;
 
-	instance = (struct b2r2_blt_instance *) job->tag;
-	core = instance->control->data;
+	BUG_ON(job == NULL || job->data == 0);
+	core = (struct b2r2_core *) job->data;
 
 	spin_lock_irqsave(&core->lock, flags);
 	call_release = internal_job_release(core, job, caller);
@@ -584,12 +400,19 @@ int b2r2_core_job_add(struct b2r2_control *control,
 	unsigned long flags;
 	struct b2r2_core *core = control->data;
 
-	b2r2_log_info(core->dev, "%s (%p, %p)\n", __func__, control, job);
+	b2r2_log_info(core->dev, "%s (core: %p, job: %p)\n",
+		__func__, core, job);
 
 	/* Enable B2R2 */
 	domain_enable(core);
 
 	spin_lock_irqsave(&core->lock, flags);
+	/* Check that we have not been powered down */
+	if (!core->domain_enabled) {
+		spin_unlock_irqrestore(&core->lock, flags);
+		return -ENOSYS;
+	}
+
 	core->stat_n_jobs_added++;
 
 	/* Initialise internal job data */
@@ -605,7 +428,7 @@ int b2r2_core_job_add(struct b2r2_control *control,
 	check_prio_list(core, false);
 	spin_unlock_irqrestore(&core->lock, flags);
 
-	return 0;
+	return job->job_id;
 }
 
 /**
@@ -618,7 +441,8 @@ struct b2r2_core_job *b2r2_core_job_find(struct b2r2_control *control,
 	struct b2r2_core_job *job;
 	struct b2r2_core *core = control->data;
 
-	b2r2_log_info(core->dev, "%s (%p, %d)\n", __func__, control, job_id);
+	b2r2_log_info(core->dev, "%s (core: %p, job_id: %d)\n",
+		__func__, core, job_id);
 
 	spin_lock_irqsave(&core->lock, flags);
 	/* Look through prio queue */
@@ -642,7 +466,8 @@ struct b2r2_core_job *b2r2_core_job_find_first_with_tag(
 	struct b2r2_core_job *job;
 	struct b2r2_core *core = control->data;
 
-	b2r2_log_info(core->dev, "%s (%p, %d)\n", __func__, control, tag);
+	b2r2_log_info(core->dev,
+		"%s (core: %p, tag: %d)\n", __func__, core, tag);
 
 	spin_lock_irqsave(&core->lock, flags);
 	/* Look through prio queue */
@@ -669,11 +494,7 @@ static bool is_job_done(struct b2r2_core_job *job)
 {
 	unsigned long flags;
 	bool job_is_done;
-	struct b2r2_blt_instance *instance;
-	struct b2r2_core *core;
-
-	instance = (struct b2r2_blt_instance *) job->tag;
-	core = instance->control->data;
+	struct b2r2_core *core = (struct b2r2_core *) job->data;
 
 	spin_lock_irqsave(&core->lock, flags);
 	job_is_done =
@@ -694,13 +515,12 @@ static bool is_job_done(struct b2r2_core_job *job)
 int b2r2_core_job_wait(struct b2r2_core_job *job)
 {
 	int ret = 0;
-	struct b2r2_blt_instance *instance;
-	struct b2r2_core *core;
-
-	instance = (struct b2r2_blt_instance *) job->tag;
-	core = instance->control->data;
+#ifdef CONFIG_B2R2_DEBUG
+	struct b2r2_core *core = (struct b2r2_core *) job->data;
+#endif
 
-	b2r2_log_info(core->dev, "%s (%p)\n", __func__, job);
+	b2r2_log_info(core->dev, "%s (core: %p, job: %p)\n",
+		__func__, core, job);
 	/* Check that we have the job */
 	if (job->job_state == B2R2_CORE_JOB_IDLE) {
 		/* Never or not queued */
@@ -779,14 +599,10 @@ int b2r2_core_job_cancel(struct b2r2_core_job *job)
 {
 	unsigned long flags;
 	int ret = 0;
-	struct b2r2_blt_instance *instance;
-	struct b2r2_core *core;
-
-	instance = (struct b2r2_blt_instance *) job->tag;
-	core = instance->control->data;
+	struct b2r2_core *core = (struct b2r2_core *) job->data;
 
-	b2r2_log_info(core->dev, "%s (%p) (%d)\n",
-		__func__, job, job->job_state);
+	b2r2_log_info(core->dev, "%s (core: %p, job: %p) (st: %d)\n",
+		__func__, core, job, job->job_state);
 	/* Check that we have the job */
 	if (job->job_state == B2R2_CORE_JOB_IDLE) {
 		/* Never or not queued */
@@ -819,6 +635,7 @@ static void domain_disable_work_function(struct work_struct *work)
 		return;
 
 	if (core->domain_request_count == 0) {
+		core->valid = false;
 		exit_hw(core);
 		clk_disable(core->b2r2_clock);
 		regulator_disable(core->b2r2_reg);
@@ -853,10 +670,16 @@ again:
 		else if (ret < 0)
 			goto regulator_enable_failed;
 
-		clk_enable(core->b2r2_clock);
+		ret = clk_enable(core->b2r2_clock);
+		if (ret < 0) {
+			b2r2_log_err(core->dev,
+				"%s: Could not enable clock\n", __func__);
+			goto enable_clk_failed;
+		}
 		if (init_hw(core) < 0)
 			goto init_hw_failed;
 		core->domain_enabled = true;
+		core->valid = true;
 	}
 
 	mutex_unlock(&core->domain_lock);
@@ -866,9 +689,9 @@ again:
 init_hw_failed:
 	b2r2_log_err(core->dev,
 		"%s: Could not initialize hardware!\n", __func__);
-
 	clk_disable(core->b2r2_clock);
 
+enable_clk_failed:
 	if (regulator_disable(core->b2r2_reg) < 0)
 		b2r2_log_err(core->dev, "%s: regulator_disable failed!\n",
 				__func__);
@@ -945,22 +768,6 @@ static void exit_job_list(struct b2r2_core *core,
 	}
 }
 
-/**
- * get_next_job_id() - Return a new job id.
- *
- * @core: The b2r2 core entity
- */
-static int get_next_job_id(struct b2r2_core *core)
-{
-	int job_id;
-
-	if (core->next_job_id < 1)
-		core->next_job_id = 1;
-	job_id = core->next_job_id++;
-
-	return job_id;
-}
-
 /**
  * job_work_function() - Work queue function that calls callback(s) and
  *                       checks if B2R2 can accept a new job
@@ -972,11 +779,7 @@ static void job_work_function(struct work_struct *ptr)
 	unsigned long flags;
 	struct b2r2_core_job *job =
 			container_of(ptr, struct b2r2_core_job, work);
-	struct b2r2_blt_instance *instance;
-	struct b2r2_core *core;
-
-	instance = (struct b2r2_blt_instance *) job->tag;
-	core = instance->control->data;
+	struct b2r2_core *core = (struct b2r2_core *) job->data;
 
 	/* Disable B2R2 */
 	domain_disable(core);
@@ -1025,10 +828,12 @@ static void timeout_work_function(struct work_struct *ptr)
 	if (core->n_active_jobs > 0) {
 		unsigned long diff =
 			(long) jiffies - (long) core->jiffies_last_irq;
-		if (diff > HZ/2) {
+		if (diff > JOB_TIMEOUT) {
 			/* Active jobs and more than a second since last irq! */
 			int i;
 
+			b2r2_core_print_stats(core);
+
 			/* Look for timeout:ed jobs and put them in tmp list.
 			 * It's important that the application queues are
 			 * killed in order of decreasing priority */
@@ -1077,7 +882,7 @@ static void timeout_work_function(struct work_struct *ptr)
 	if (core->n_active_jobs)
 		queue_delayed_work(
 			core->work_queue,
-			&core->timeout_work, HZ/2);
+			&core->timeout_work, JOB_TIMEOUT);
 
 	spin_unlock_irqrestore(&core->lock, flags);
 }
@@ -1194,18 +999,10 @@ static void stop_hw_timer(struct b2r2_core *core, struct b2r2_core_job *job)
  */
 static void init_job(struct b2r2_core_job *job)
 {
-	struct b2r2_blt_instance *instance;
-	struct b2r2_core *core;
-
-	instance = (struct b2r2_blt_instance *) job->tag;
-	core = instance->control->data;
 
 	job->start_sentinel = START_SENTINEL;
 	job->end_sentinel = END_SENTINEL;
 
-	/* Get a job id*/
-	job->job_id = get_next_job_id(core);
-
 	/* Job is idle, never queued */
 	job->job_state = B2R2_CORE_JOB_IDLE;
 
@@ -1361,7 +1158,7 @@ static void check_prio_list(struct b2r2_core *core, bool atomic)
 #ifdef HANDLE_TIMEOUTED_JOBS
 			/* Check in one half second if it hangs */
 			queue_delayed_work(core->work_queue,
-				&core->timeout_work, HZ/2);
+				&core->timeout_work, JOB_TIMEOUT);
 #endif
 		} else {
 			/* No resources */
@@ -1395,9 +1192,7 @@ static struct b2r2_core_job *find_job_in_list(int job_id,
 		struct b2r2_core_job *job = list_entry(
 				ptr, struct b2r2_core_job, list);
 		if (job->job_id == job_id) {
-			struct b2r2_blt_instance *instance =
-					(struct b2r2_blt_instance *) job->tag;
-			struct b2r2_core *core = instance->control->data;
+			struct b2r2_core *core = (struct b2r2_core *) job->data;
 			/* Increase reference count, should be released by
 			   the caller of b2r2_core_job_find */
 			internal_job_addref(core, job, __func__);
@@ -1503,7 +1298,7 @@ static struct b2r2_core_job *find_tag_in_active_jobs(struct b2r2_core *core,
  */
 static int hw_reset(struct b2r2_core *core)
 {
-	u32 uTimeOut = B2R2_DRIVER_TIMEOUT_VALUE;
+	u32 uTimeOut = B2R2_RESET_TIMEOUT_VALUE;
 
 	/* Tell B2R2 to reset */
 	writel(readl(&core->hw->BLT_CTL) | B2R2BLT_CTLGLOBAL_soft_reset,
@@ -1761,17 +1556,23 @@ static void process_events(struct b2r2_core *core, u32 status)
  * b2r2_irq_handler() - B2R2 interrupt handler
  *
  * @irq: Interrupt number (not used)
- * @x: ??? (Not used)
+ * @dev_id: A pointer to the b2r2 core entity
  */
-static irqreturn_t b2r2_irq_handler(int irq, void *x)
+static irqreturn_t b2r2_irq_handler(int irq, void *dev_id)
 {
 	unsigned long flags;
-	struct b2r2_core* core = (struct b2r2_core *) x;
+	struct b2r2_core* core = (struct b2r2_core *) dev_id;
 
 	/* Spin lock is need in irq handler (SMP) */
 	spin_lock_irqsave(&core->lock, flags);
 
-	/* Make sure that we have a clock */
+	/* Make a quick exit if this device was not interrupting */
+	if (!core->valid ||
+		((readl(&core->hw->BLT_ITS) & B2R2_ITS_MASK) == 0)) {
+		core->stat_n_irq_skipped++;
+		spin_unlock_irqrestore(&core->lock, flags);
+		return IRQ_NONE;
+	}
 
 	/* Remember time for last irq (for timeout mgmt) */
 	core->jiffies_last_irq = jiffies;
@@ -1783,6 +1584,8 @@ static irqreturn_t b2r2_irq_handler(int irq, void *x)
 	/* Check if we can dispatch new jobs */
 	check_prio_list(core, true);
 
+	core->stat_n_irq_exit++;
+
 	spin_unlock_irqrestore(&core->lock, flags);
 
 	return IRQ_HANDLED;
@@ -2032,9 +1835,9 @@ static int debugfs_b2r2_reg_read(struct file *filp, char __user *buf,
 	size_t dev_size;
 	int ret = 0;
 	unsigned long value;
-	char *Buf = kmalloc(sizeof(char) * 4096, GFP_KERNEL);
+	char *tmpbuf = kmalloc(sizeof(char) * 4096, GFP_KERNEL);
 
-	if (Buf == NULL) {
+	if (tmpbuf == NULL) {
 		ret = -ENOMEM;
 		goto out;
 	}
@@ -2044,7 +1847,7 @@ static int debugfs_b2r2_reg_read(struct file *filp, char __user *buf,
 		filp->f_dentry->d_inode->i_private);
 
 	/* Build the string */
-	dev_size = sprintf(Buf, "%8lX\n", value);
+	dev_size = sprintf(tmpbuf, "%8lX\n", value);
 
 	/* No more to read if offset != 0 */
 	if (*f_pos > dev_size)
@@ -2054,14 +1857,14 @@ static int debugfs_b2r2_reg_read(struct file *filp, char __user *buf,
 		count = dev_size - *f_pos;
 
 	/* Return it to user space */
-	if (copy_to_user(buf, Buf, count))
+	if (copy_to_user(buf, tmpbuf, count))
 		ret = -EINVAL;
 	*f_pos += count;
 	ret = count;
 
 out:
-	if (Buf != NULL)
-		kfree(Buf);
+	if (tmpbuf != NULL)
+		kfree(tmpbuf);
 	return ret;
 }
 
@@ -2078,19 +1881,19 @@ out:
 static int debugfs_b2r2_reg_write(struct file *filp, const char __user *buf,
 				  size_t count, loff_t *f_pos)
 {
-	char Buf[80];
+	char tmpbuf[80];
 	u32 reg_value;
 	int ret = 0;
 
 	/* Adjust count */
-	if (count >= sizeof(Buf))
-		count = sizeof(Buf) - 1;
+	if (count >= sizeof(tmpbuf))
+		count = sizeof(tmpbuf) - 1;
 	/* Get it from user space */
-	if (copy_from_user(Buf, buf, count))
+	if (copy_from_user(tmpbuf, buf, count))
 		return -EINVAL;
-	Buf[count] = 0;
+	tmpbuf[count] = 0;
 	/* Convert from hex string */
-	if (sscanf(Buf, "%8lX", (unsigned long *) &reg_value) != 1)
+	if (sscanf(tmpbuf, "%8lX", (unsigned long *) &reg_value) != 1)
 		return -EINVAL;
 
 	writel(reg_value, (u32 *)
@@ -2127,9 +1930,9 @@ static int debugfs_b2r2_regs_read(struct file *filp, char __user *buf,
 	size_t dev_size = 0;
 	int ret = 0;
 	int i;
-	char *Buf = kmalloc(sizeof(char) * 4096, GFP_KERNEL);
+	char *tmpbuf = kmalloc(sizeof(char) * 4096, GFP_KERNEL);
 
-	if (Buf == NULL) {
+	if (tmpbuf == NULL) {
 		ret = -ENOMEM;
 		goto out;
 	}
@@ -2140,7 +1943,7 @@ static int debugfs_b2r2_regs_read(struct file *filp, char __user *buf,
 			readl((u32 *) (((u8 *)
 				filp->f_dentry->d_inode->i_private) +
 				debugfs_regs[i].offset));
-		dev_size += sprintf(Buf + dev_size, "%s: %08lX\n",
+		dev_size += sprintf(tmpbuf + dev_size, "%s: %08lX\n",
 			debugfs_regs[i].name,
 			value);
 	}
@@ -2152,14 +1955,14 @@ static int debugfs_b2r2_regs_read(struct file *filp, char __user *buf,
 	if (*f_pos + count > dev_size)
 		count = dev_size - *f_pos;
 
-	if (copy_to_user(buf, Buf, count))
+	if (copy_to_user(buf, tmpbuf, count))
 		ret = -EINVAL;
 	*f_pos += count;
 	ret = count;
 
 out:
-	if (Buf != NULL)
-		kfree(Buf);
+	if (tmpbuf != NULL)
+		kfree(tmpbuf);
 	return ret;
 }
 
@@ -2187,30 +1990,30 @@ static int debugfs_b2r2_stat_read(struct file *filp, char __user *buf,
 	size_t dev_size = 0;
 	int ret = 0;
 	int i = 0;
-	char *Buf = kmalloc(sizeof(char) * 4096, GFP_KERNEL);
+	char *tmpbuf = kmalloc(sizeof(char) * 4096, GFP_KERNEL);
 	struct b2r2_core *core = filp->f_dentry->d_inode->i_private;
 
-	if (Buf == NULL) {
+	if (tmpbuf == NULL) {
 		ret = -ENOMEM;
 		goto out;
 	}
 
 	/* Build a string containing all statistics */
-	dev_size += sprintf(Buf + dev_size, "Interrupts        : %lu\n",
+	dev_size += sprintf(tmpbuf + dev_size, "Interrupts        : %lu\n",
 			core->stat_n_irq);
-	dev_size += sprintf(Buf + dev_size, "Added jobs        : %lu\n",
+	dev_size += sprintf(tmpbuf + dev_size, "Added jobs        : %lu\n",
 			core->stat_n_jobs_added);
-	dev_size += sprintf(Buf + dev_size, "Removed jobs      : %lu\n",
+	dev_size += sprintf(tmpbuf + dev_size, "Removed jobs      : %lu\n",
 			core->stat_n_jobs_removed);
-	dev_size += sprintf(Buf + dev_size, "Jobs in prio list : %lu\n",
+	dev_size += sprintf(tmpbuf + dev_size, "Jobs in prio list : %lu\n",
 			core->stat_n_jobs_in_prio_list);
-	dev_size += sprintf(Buf + dev_size, "Active jobs       : %lu\n",
+	dev_size += sprintf(tmpbuf + dev_size, "Active jobs       : %lu\n",
 			core->n_active_jobs);
 	for (i = 0; i < ARRAY_SIZE(core->active_jobs); i++)
-		dev_size += sprintf(Buf + dev_size,
+		dev_size += sprintf(tmpbuf + dev_size,
 				"   Job in queue %d : 0x%08lx\n",
 				i, (unsigned long) core->active_jobs[i]);
-	dev_size += sprintf(Buf + dev_size, "Clock requests    : %lu\n",
+	dev_size += sprintf(tmpbuf + dev_size, "Clock requests    : %lu\n",
 			core->clock_request_count);
 
 	/* No more to read if offset != 0 */
@@ -2220,14 +2023,14 @@ static int debugfs_b2r2_stat_read(struct file *filp, char __user *buf,
 	if (*f_pos + count > dev_size)
 		count = dev_size - *f_pos;
 
-	if (copy_to_user(buf, Buf, count))
+	if (copy_to_user(buf, tmpbuf, count))
 		ret = -EINVAL;
 	*f_pos += count;
 	ret = count;
 
 out:
-	if (Buf != NULL)
-		kfree(Buf);
+	if (tmpbuf != NULL)
+		kfree(tmpbuf);
 	return ret;
 }
 
@@ -2254,14 +2057,14 @@ static int debugfs_b2r2_clock_read(struct file *filp, char __user *buf,
 				   size_t count, loff_t *f_pos)
 {
 	/* 10 characters hex number + newline + string terminator; */
-	char Buf[10+2];
+	char tmpbuf[10+2];
 	size_t dev_size;
 	int ret = 0;
 	struct b2r2_core *core = filp->f_dentry->d_inode->i_private;
 
 	unsigned long value = clk_get_rate(core->b2r2_clock);
 
-	dev_size = sprintf(Buf, "%#010lx\n", value);
+	dev_size = sprintf(tmpbuf, "%#010lx\n", value);
 
 	/* No more to read if offset != 0 */
 	if (*f_pos > dev_size)
@@ -2270,7 +2073,7 @@ static int debugfs_b2r2_clock_read(struct file *filp, char __user *buf,
 	if (*f_pos + count > dev_size)
 		count = dev_size - *f_pos;
 
-	if (copy_to_user(buf, Buf, count))
+	if (copy_to_user(buf, tmpbuf, count))
 		ret = -EINVAL;
 	*f_pos += count;
 	ret = count;
@@ -2292,16 +2095,16 @@ out:
 static int debugfs_b2r2_clock_write(struct file *filp, const char __user *buf,
 				    size_t count, loff_t *f_pos)
 {
-	char Buf[80];
+	char tmpbuf[80];
 	u32 reg_value;
 	int ret = 0;
 
-	if (count >= sizeof(Buf))
-		count = sizeof(Buf) - 1;
-	if (copy_from_user(Buf, buf, count))
+	if (count >= sizeof(tmpbuf))
+		count = sizeof(tmpbuf) - 1;
+	if (copy_from_user(tmpbuf, buf, count))
 		return -EINVAL;
-	Buf[count] = 0;
-	if (sscanf(Buf, "%8lX", (unsigned long *) &reg_value) != 1)
+	tmpbuf[count] = 0;
+	if (sscanf(tmpbuf, "%8lX", (unsigned long *) &reg_value) != 1)
 		return -EINVAL;
 
 	/*not working yet*/
@@ -2322,6 +2125,88 @@ static const struct file_operations debugfs_b2r2_clock_fops = {
 	.write = debugfs_b2r2_clock_write,
 };
 
+/**
+ * debugfs_b2r2_enabled_read() - Implements debugfs read for
+ *                             B2R2 Core Enable/Disable
+ * @filp: File pointer
+ * @buf: User space buffer
+ * @count: Number of bytes to read
+ * @f_pos: File position
+ *
+ * Returns number of bytes read or negative error code
+ */
+static int debugfs_b2r2_enabled_read(struct file *filp, char __user *buf,
+				   size_t count, loff_t *f_pos)
+{
+	/* 4 characters hex number + newline + string terminator; */
+	char tmpbuf[4+2];
+	size_t dev_size;
+	int ret = 0;
+	struct b2r2_core *core = filp->f_dentry->d_inode->i_private;
+
+	dev_size = sprintf(tmpbuf, "%02X\n", core->control->enabled);
+
+	/* No more to read if offset != 0 */
+	if (*f_pos > dev_size)
+		goto out;
+
+	if (*f_pos + count > dev_size)
+		count = dev_size - *f_pos;
+
+	if (copy_to_user(buf, tmpbuf, count))
+		ret = -EINVAL;
+	*f_pos += count;
+	ret = count;
+out:
+	return ret;
+}
+
+/**
+ * debugfs_b2r2_enabled_write() - Implements debugfs write for
+ *                              B2R2 Core Enable/Disable
+ * @filp: File pointer
+ * @buf: User space buffer
+ * @count: Number of bytes to write
+ * @f_pos: File position
+ *
+ * Returns number of bytes written or negative error code
+ */
+static int debugfs_b2r2_enabled_write(struct file *filp, const char __user *buf,
+				    size_t count, loff_t *f_pos)
+{
+	char tmpbuf[80];
+	unsigned int enable;
+	int ret = 0;
+	struct b2r2_core *core = filp->f_dentry->d_inode->i_private;
+
+	if (count >= sizeof(tmpbuf))
+		count = sizeof(tmpbuf) - 1;
+	if (copy_from_user(tmpbuf, buf, count))
+		return -EINVAL;
+	tmpbuf[count] = 0;
+	if (sscanf(tmpbuf, "%02X", &enable) != 1)
+		return -EINVAL;
+
+	if (enable)
+		core->control->enabled = true;
+	else
+		core->control->enabled = false;
+
+	*f_pos += count;
+	ret = count;
+
+	return ret;
+}
+
+/**
+ * debugfs_b2r2_enabled_fops() - File operations for B2R2 Core Enable/Disable debugfs
+ */
+static const struct file_operations debugfs_b2r2_enabled_fops = {
+	.owner = THIS_MODULE,
+	.read  = debugfs_b2r2_enabled_read,
+	.write = debugfs_b2r2_enabled_write,
+};
+
 #endif
 
 /**
@@ -2348,7 +2233,7 @@ static const struct file_operations debugfs_b2r2_clock_fops = {
 static int init_hw(struct b2r2_core *core)
 {
 	int result = 0;
-	u32 uTimeOut = B2R2_DRIVER_TIMEOUT_VALUE;
+	u32 uTimeOut = B2R2_RESET_TIMEOUT_VALUE;
 
 	/* Put B2R2 into reset */
 	clear_interrupts(core);
@@ -2357,7 +2242,7 @@ static int init_hw(struct b2r2_core *core)
 		&core->hw->BLT_CTL);
 
 	/* Set up interrupt handler */
-	result = request_irq(core->irq, b2r2_irq_handler, 0,
+	result = request_irq(core->irq, b2r2_irq_handler, IRQF_SHARED,
 			     "b2r2-interrupt", core);
 	if (result) {
 		b2r2_log_err(core->dev,
@@ -2400,7 +2285,7 @@ static int init_hw(struct b2r2_core *core)
 			debugfs_create_file(debugfs_regs[i].name, 0666,
 					core->debugfs_regs_dir,
 					(void *)(((u8 *) core->hw) +
-						debugfs_regs[i].offset),
+							debugfs_regs[i].offset),
 					&debugfs_b2r2_reg_fops);
 	}
 #endif
@@ -2474,18 +2359,22 @@ static void exit_hw(struct b2r2_core *core)
 static int b2r2_probe(struct platform_device *pdev)
 {
 	int ret = 0;
-	struct resource *res;
-	struct b2r2_core *core;
-	struct b2r2_control *control;
+	struct resource *res = NULL;
+	struct b2r2_core *core = NULL;
+	struct b2r2_control *control = NULL;
+	struct b2r2_platform_data *pdata = NULL;
+	int debug_init = 0;
 
 	BUG_ON(pdev == NULL);
 	BUG_ON(pdev->id < 0 || pdev->id >= B2R2_MAX_NBR_DEVICES);
 
+	pdata = pdev->dev.platform_data;
+
 	core = kzalloc(sizeof(*core), GFP_KERNEL);
 	if (!core) {
 		dev_err(&pdev->dev, "b2r2 core alloc failed\n");
 		ret = -EINVAL;
-		goto b2r2_probe_core_alloc_fail;
+		goto error_exit;
 	}
 
 	core->dev = &pdev->dev;
@@ -2512,24 +2401,25 @@ static int b2r2_probe(struct platform_device *pdev)
 	core->work_queue = create_workqueue("B2R2");
 	if (!core->work_queue) {
 		ret = -ENOMEM;
-		goto b2r2_probe_no_work_queue;
+		goto error_exit;
 	}
 
 	/* Get the clock for B2R2 */
-	core->b2r2_clock = clk_get(core->dev, "b2r2");
+	core->b2r2_clock = clk_get(core->dev, pdata->clock_id);
 	if (IS_ERR(core->b2r2_clock)) {
 		ret = PTR_ERR(core->b2r2_clock);
-		dev_err(&pdev->dev, "clk_get b2r2 failed\n");
-		goto b2r2_probe_no_clk;
+		dev_err(&pdev->dev, "clk_get %s failed\n", pdata->clock_id);
+		goto error_exit;
 	}
 
 	/* Get the B2R2 regulator */
-	core->b2r2_reg = regulator_get(core->dev, "vsupply");
+	core->b2r2_reg = regulator_get(core->dev, pdata->regulator_id);
 	if (IS_ERR(core->b2r2_reg)) {
 		ret = PTR_ERR(core->b2r2_reg);
-		dev_err(&pdev->dev, "regulator_get vsupply failed "
-			"(dev_name=%s)\n", dev_name(core->dev));
-		goto b2r2_probe_no_reg;
+		dev_err(&pdev->dev, "regulator_get %s failed "
+			"(dev_name=%s)\n", pdata->regulator_id,
+			dev_name(core->dev));
+		goto error_exit;
 	}
 
 	/* Init power management */
@@ -2537,18 +2427,19 @@ static int b2r2_probe(struct platform_device *pdev)
 	INIT_DELAYED_WORK_DEFERRABLE(&core->domain_disable_work,
 			domain_disable_work_function);
 	core->domain_enabled = false;
+	core->valid = false;
 
 	/* Map B2R2 into kernel virtual memory space */
 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 	if (res == NULL)
-		goto b2r2_probe_no_res;
+		goto error_exit;
 
 	/* Hook up irq */
 	core->irq = platform_get_irq(pdev, 0);
 	if (core->irq <= 0) {
 		dev_err(&pdev->dev, "%s: Failed to request irq (irq=%d)\n",
 			__func__, core->irq);
-		goto b2r2_failed_irq_get;
+		goto error_exit;
 	}
 
 	core->hw = (struct b2r2_memory_map *) ioremap(res->start,
@@ -2556,7 +2447,7 @@ static int b2r2_probe(struct platform_device *pdev)
 	if (core->hw == NULL) {
 		dev_err(&pdev->dev, "%s: ioremap failed\n", __func__);
 		ret = -ENOMEM;
-		goto b2r2_probe_ioremap_failed;
+		goto error_exit;
 	}
 
 	dev_dbg(core->dev, "b2r2 structure address %p\n", core->hw);
@@ -2565,14 +2456,12 @@ static int b2r2_probe(struct platform_device *pdev)
 	if (!control) {
 		dev_err(&pdev->dev, "b2r2 control alloc failed\n");
 		ret = -EINVAL;
-		goto b2r2_probe_control_alloc_fail;
+		goto error_exit;
 	}
 
-	control->miscdev.parent = core->dev;
 	control->data = (void *)core;
 	control->id = pdev->id;
 	control->dev = &pdev->dev; /* Temporary device */
-	snprintf(control->name, sizeof(control->name), "%s_blt", core->name);
 
 	core->op_size = B2R2_PLUG_OPCODE_SIZE_DEFAULT;
 	core->ch_size = B2R2_PLUG_CHUNK_SIZE_DEFAULT;
@@ -2598,6 +2487,9 @@ static int b2r2_probe(struct platform_device *pdev)
 				core, &debugfs_b2r2_stat_fops);
 		debugfs_create_file("clock", 0666, core->debugfs_core_root_dir,
 				core, &debugfs_b2r2_clock_fops);
+		debugfs_create_file("enabled", 0666,
+				core->debugfs_core_root_dir,
+				core, &debugfs_b2r2_enabled_fops);
 		debugfs_create_u8("op_size", 0666, core->debugfs_core_root_dir,
 				&core->op_size);
 		debugfs_create_u8("ch_size", 0666, core->debugfs_core_root_dir,
@@ -2614,39 +2506,44 @@ static int b2r2_probe(struct platform_device *pdev)
 	ret = b2r2_debug_init(control);
 	if (ret < 0) {
 		dev_err(&pdev->dev, "b2r2_debug_init failed\n");
-		goto b2r2_probe_debug_init_failed;
+		goto error_exit;
 	}
+	debug_init = 1;
 
-	/* Initialize b2r2_blt module. FIXME: Module of it's own
-	   or perhaps a dedicated module init c file? */
-	ret = b2r2_blt_module_init(control);
+	/* Initialize b2r2_control */
+	ret = b2r2_control_init(control);
 	if (ret < 0) {
-		b2r2_log_err(&pdev->dev, "b2r2_blt_module_init failed\n");
-		goto b2r2_probe_blt_init_fail;
+		b2r2_log_err(&pdev->dev, "b2r2_control_init failed\n");
+		goto error_exit;
 	}
-
 	core->control = control;
+
+	/* Add the control to the blitter */
+	kref_init(&control->ref);
+	control->enabled = true;
+	b2r2_blt_add_control(control);
+
 	b2r2_core[pdev->id] = core;
-	dev_info(&pdev->dev, "init done.\n");
+	dev_info(&pdev->dev, "%s done.\n", __func__);
 
 	return ret;
 
 /** Recover from any error if something fails */
-b2r2_probe_blt_init_fail:
+error_exit:
 	kfree(control);
-b2r2_probe_control_alloc_fail:
-b2r2_probe_ioremap_failed:
-b2r2_failed_irq_get:
-b2r2_probe_no_res:
-	regulator_put(core->b2r2_reg);
-b2r2_probe_no_reg:
-	clk_put(core->b2r2_clock);
-b2r2_probe_no_clk:
-	destroy_workqueue(core->work_queue);
-	core->work_queue = NULL;
-b2r2_probe_no_work_queue:
-	b2r2_debug_exit();
-b2r2_probe_debug_init_failed:
+
+	if (!IS_ERR_OR_NULL(core->b2r2_reg))
+		regulator_put(core->b2r2_reg);
+
+	if (!IS_ERR_OR_NULL(core->b2r2_clock))
+		clk_put(core->b2r2_clock);
+
+	if (!IS_ERR_OR_NULL(core->work_queue))
+		destroy_workqueue(core->work_queue);
+
+	if (debug_init)
+		b2r2_debug_exit();
+
 #ifdef CONFIG_DEBUG_FS
 	if (!IS_ERR_OR_NULL(core->debugfs_root_dir)) {
 		debugfs_remove_recursive(core->debugfs_root_dir);
@@ -2654,44 +2551,29 @@ b2r2_probe_debug_init_failed:
 	}
 #endif
 	kfree(core);
-b2r2_probe_core_alloc_fail:
-	dev_info(&pdev->dev, "init done with errors.\n");
+
+	dev_info(&pdev->dev, "%s done with errors (%d).\n", __func__, ret);
 
 	return ret;
 }
 
-
-
-/**
- * b2r2_remove - This routine unloads b2r2 driver
- *
- * @pdev: platform device.
- */
-static int b2r2_remove(struct platform_device *pdev)
+void b2r2_core_release(struct kref *control_ref)
 {
+	struct b2r2_control *control = container_of(
+			control_ref, struct b2r2_control, ref);
+	struct b2r2_core *core = control->data;
+	int id = control->id;
 	unsigned long flags;
-	struct b2r2_core *core;
-
-	BUG_ON(pdev == NULL);
-
-	core = dev_get_drvdata(&pdev->dev);
-	BUG_ON(core == NULL);
-	b2r2_log_info(&pdev->dev, "%s: Started\n", __func__);
-
-#ifdef CONFIG_DEBUG_FS
-	if (!IS_ERR_OR_NULL(core->debugfs_root_dir)) {
-		debugfs_remove_recursive(core->debugfs_root_dir);
-		core->debugfs_root_dir = NULL;
-	}
+#ifdef CONFIG_B2R2_DEBUG
+	struct device *dev = core->dev;
 #endif
 
-	/* Flush B2R2 work queue (call all callbacks) */
-	flush_workqueue(core->work_queue);
-
-	/* Exit b2r2 blt module */
-	b2r2_blt_module_exit(core->control);
+	b2r2_log_info(dev, "%s: enter\n", __func__);
 
-	kfree(core->control);
+	/* Exit b2r2 control module */
+	b2r2_control_exit(control);
+	kfree(control);
+	b2r2_debug_exit();
 
 #ifdef HANDLE_TIMEOUTED_JOBS
 	cancel_delayed_work(&core->timeout_work);
@@ -2705,7 +2587,7 @@ static int b2r2_remove(struct platform_device *pdev)
 	cancel_delayed_work_sync(&core->domain_disable_work);
 
 	/** Unmap B2R2 registers */
-	b2r2_log_info(&pdev->dev, "unmap b2r2 registers..\n");
+	b2r2_log_info(dev, "%s: unmap b2r2 registers..\n", __func__);
 	if (core->hw) {
 		iounmap(core->hw);
 		core->hw = NULL;
@@ -2723,9 +2605,41 @@ static int b2r2_remove(struct platform_device *pdev)
 
 	core->dev = NULL;
 	kfree(core);
-	b2r2_core[pdev->id] = NULL;
+	b2r2_core[id] = NULL;
 
-	b2r2_debug_exit();
+	b2r2_log_info(dev, "%s: exit\n", __func__);
+}
+
+
+/**
+ * b2r2_remove - This routine unloads b2r2 driver
+ *
+ * @pdev: platform device.
+ */
+static int b2r2_remove(struct platform_device *pdev)
+{
+	struct b2r2_core *core;
+
+	BUG_ON(pdev == NULL);
+
+	core = dev_get_drvdata(&pdev->dev);
+	BUG_ON(core == NULL);
+	b2r2_log_info(&pdev->dev, "%s: Started\n", __func__);
+
+#ifdef CONFIG_DEBUG_FS
+	if (!IS_ERR_OR_NULL(core->debugfs_root_dir)) {
+		debugfs_remove_recursive(core->debugfs_root_dir);
+		core->debugfs_root_dir = NULL;
+	}
+#endif
+
+	/* Flush B2R2 work queue (call all callbacks) */
+	flush_workqueue(core->work_queue);
+
+	/* Remove control from blitter */
+	core->control->enabled = false;
+	b2r2_blt_remove_control(core->control);
+	kref_put(&core->control->ref, b2r2_core_release);
 
 	b2r2_log_info(&pdev->dev, "%s: Ended\n", __func__);
 
@@ -2785,6 +2699,23 @@ int b2r2_resume(struct platform_device *pdev)
 	return 0;
 }
 
+void b2r2_core_print_stats(struct b2r2_core *core)
+{
+	b2r2_log_info(core->dev,
+		"%s: n_irq %ld, n_irq_exit %ld, n_irq_skipped %ld,\n"
+		"n_jobs_added %ld, n_active_jobs %ld, "
+		"n_jobs_in_prio_list %ld,\n"
+		"n_jobs_removed %ld\n",
+		__func__,
+		core->stat_n_irq,
+		core->stat_n_irq_exit,
+		core->stat_n_irq_skipped,
+		core->stat_n_jobs_added,
+		core->n_active_jobs,
+		core->stat_n_jobs_in_prio_list,
+		core->stat_n_jobs_removed);
+}
+
 /**
  * struct platform_b2r2_driver - Platform driver configuration for the
  * B2R2 core driver
diff --git a/drivers/video/b2r2/b2r2_core.h b/drivers/video/b2r2/b2r2_core.h
index 991dd9d9d1b..5b9fdcdc2bb 100644
--- a/drivers/video/b2r2/b2r2_core.h
+++ b/drivers/video/b2r2/b2r2_core.h
@@ -18,6 +18,194 @@
 #include <linux/wait.h>
 #include <linux/workqueue.h>
 
+/**
+ * B2R2_RESET_TIMEOUT_VALUE - The number of times to read the status register
+ *                             waiting for b2r2 to go idle after soft reset.
+ */
+#define B2R2_RESET_TIMEOUT_VALUE (1500)
+
+/**
+ * B2R2_CLK_FLAG - Value to write into clock reg to turn clock on
+ */
+#define B2R2_CLK_FLAG (0x125)
+
+/**
+ * DEBUG_CHECK_ADDREF_RELEASE - Define this to enable addref / release debug
+ */
+#define DEBUG_CHECK_ADDREF_RELEASE 1
+
+#ifdef CONFIG_DEBUG_FS
+/**
+ * HANDLE_TIMEOUTED_JOBS - Define this to check jobs for timeout and cancel them
+ */
+#define HANDLE_TIMEOUTED_JOBS
+#define JOB_TIMEOUT (HZ/2)
+#endif
+
+/**
+ * B2R2_CLOCK_ALWAYS_ON - Define this to disable power save clock turn off
+ */
+/* #define B2R2_CLOCK_ALWAYS_ON 1 */
+
+/**
+ * START_SENTINEL - Watch guard to detect job overwrites
+ */
+#define START_SENTINEL 0xBABEDEEA
+
+/**
+ * STOP_SENTINEL - Watch guard to detect job overwrites
+ */
+#define END_SENTINEL 0xDADBDCDD
+
+/**
+ * B2R2_CORE_LOWEST_PRIO - Lowest prio allowed
+ */
+#define B2R2_CORE_LOWEST_PRIO -19
+/**
+ * B2R2_CORE_HIGHEST_PRIO - Highest prio allowed
+ */
+#define B2R2_CORE_HIGHEST_PRIO 20
+
+/**
+ * B2R2_DOMAIN_DISABLE -
+ */
+#define B2R2_DOMAIN_DISABLE_TIMEOUT (HZ/100)
+
+/**
+ * B2R2_REGULATOR_RETRY_COUNT -
+ */
+#define B2R2_REGULATOR_RETRY_COUNT 10
+
+
+#ifdef DEBUG_CHECK_ADDREF_RELEASE
+
+/**
+ * struct addref_release - Represents one addref or release. Used
+ *                         to debug addref / release problems
+ *
+ * @addref: true if this represents an addref else it represents
+ *          a release.
+ * @job: The job that was referenced
+ * @caller: The caller of the addref or release
+ * @ref_count: The job reference count after addref / release
+ */
+struct addref_release {
+	bool addref;
+	struct b2r2_core_job *job;
+	const char *caller;
+	int ref_count;
+};
+
+#endif
+
+/**
+ * struct b2r2_core - Administration data for B2R2 core
+ *
+ * @lock: Spin lock protecting the b2r2_core structure and the B2R2 HW
+ * @hw: B2R2 registers memory mapped
+ * @pmu_b2r2_clock: Control of B2R2 clock
+ * @log_dev: Device used for logging via dev_... functions
+ *
+ * @prio_queue: Queue of jobs sorted in priority order
+ * @active_jobs: Array containing pointer to zero or one job per queue
+ * @n_active_jobs: Number of active jobs
+ * @jiffies_last_active: jiffie value when adding last active job
+ * @jiffies_last_irq: jiffie value when last irq occured
+ * @timeout_work: Work structure for timeout work
+ *
+ * @next_job_id: Contains the job id that will be assigned to the next
+ *               added job.
+ *
+ * @clock_request_count: When non-zero, clock is on
+ * @clock_off_timer: Kernel timer to handle delayed turn off of clock
+ *
+ * @work_queue: Work queue to handle done jobs (callbacks) and timeouts in
+ *              non-interrupt context.
+ *
+ * @stat_n_irq: Number of interrupts (statistics)
+ * @stat_n_jobs_added: Number of jobs added (statistics)
+ * @stat_n_jobs_removed: Number of jobs removed (statistics)
+ * @stat_n_jobs_in_prio_list: Number of jobs in prio list (statistics)
+ *
+ * @debugfs_root_dir: Root directory for B2R2 debugfs
+ *
+ * @ar: Circular array of addref / release debug structs
+ * @ar_write: Where next write will occur
+ * @ar_read: First valid place to read. When ar_read == ar_write then
+ *           the array is empty.
+ */
+struct b2r2_core {
+	spinlock_t       lock;
+
+	struct b2r2_memory_map *hw;
+
+	u8 op_size;
+	u8 ch_size;
+	u8 pg_size;
+	u8 mg_size;
+	u16 min_req_time;
+	int irq;
+
+	char name[16];
+	struct device *dev;
+
+	struct list_head prio_queue;
+
+	struct b2r2_core_job *active_jobs[B2R2_CORE_QUEUE_NO_OF];
+	unsigned long    n_active_jobs;
+
+	unsigned long    jiffies_last_active;
+	unsigned long    jiffies_last_irq;
+#ifdef HANDLE_TIMEOUTED_JOBS
+	struct delayed_work     timeout_work;
+#endif
+	int              next_job_id;
+
+	unsigned long    clock_request_count;
+	struct timer_list clock_off_timer;
+
+	struct workqueue_struct *work_queue;
+
+	/* Statistics */
+	unsigned long    stat_n_irq_exit;
+	unsigned long    stat_n_irq_skipped;
+	unsigned long    stat_n_irq;
+	unsigned long    stat_n_jobs_added;
+	unsigned long    stat_n_jobs_removed;
+
+	unsigned long    stat_n_jobs_in_prio_list;
+
+#ifdef CONFIG_DEBUG_FS
+	struct dentry *debugfs_root_dir;
+	struct dentry *debugfs_core_root_dir;
+	struct dentry *debugfs_regs_dir;
+#endif
+
+#ifdef DEBUG_CHECK_ADDREF_RELEASE
+	/* Tracking release bug...*/
+	struct addref_release ar[100];
+	int ar_write;
+	int ar_read;
+#endif
+
+	/* Power management variables */
+	struct mutex domain_lock;
+	struct delayed_work domain_disable_work;
+
+	/*
+	 * We need to keep track of both the number of domain_enable/disable()
+	 * calls and whether the power was actually turned off, since the
+	 * power off is done in a delayed job.
+	 */
+	bool domain_enabled;
+	volatile bool valid;
+	int domain_request_count;
+
+	struct clk *b2r2_clock;
+	struct regulator *b2r2_reg;
+
+	struct b2r2_control *control;
+};
 
 /**
  * b2r2_core_job_add() - Adds a job to B2R2 job queues
@@ -105,4 +293,8 @@ void b2r2_core_job_addref(struct b2r2_core_job *job, const char *caller);
  */
 void b2r2_core_job_release(struct b2r2_core_job *job, const char *caller);
 
+void b2r2_core_print_stats(struct b2r2_core *core);
+
+void b2r2_core_release(struct kref *control_ref);
+
 #endif /* !defined(__B2R2_CORE_JOB_H__) */
diff --git a/drivers/video/b2r2/b2r2_input_validation.c b/drivers/video/b2r2/b2r2_input_validation.c
index ac8b5728847..c8eb2f7b025 100644
--- a/drivers/video/b2r2/b2r2_input_validation.c
+++ b/drivers/video/b2r2/b2r2_input_validation.c
@@ -32,7 +32,7 @@
 static bool is_valid_format(enum b2r2_blt_fmt fmt);
 static bool is_valid_bg_format(enum b2r2_blt_fmt fmt);
 
-static bool is_valid_pitch_for_fmt(struct b2r2_control *cont,
+static bool is_valid_pitch_for_fmt(struct device *dev,
 		u32 pitch, s32 width, enum b2r2_blt_fmt fmt);
 
 static bool is_aligned_width_for_fmt(s32 width, enum b2r2_blt_fmt fmt);
@@ -40,9 +40,9 @@ static s32 width_2_complete_width(s32 width, enum b2r2_blt_fmt fmt);
 static bool is_complete_width_for_fmt(s32 width, enum b2r2_blt_fmt fmt);
 static bool is_valid_height_for_fmt(s32 height, enum b2r2_blt_fmt fmt);
 
-static bool validate_img(struct b2r2_control *cont,
+static bool validate_img(struct device *dev,
 		struct b2r2_blt_img *img);
-static bool validate_rect(struct b2r2_control *cont,
+static bool validate_rect(struct device *dev,
 		struct b2r2_blt_rect *rect);
 
 
@@ -103,7 +103,7 @@ static bool is_valid_bg_format(enum b2r2_blt_fmt fmt)
 }
 
 
-static bool is_valid_pitch_for_fmt(struct b2r2_control *cont,
+static bool is_valid_pitch_for_fmt(struct device *dev,
 		u32 pitch, s32 width, enum b2r2_blt_fmt fmt)
 {
 	s32 complete_width;
@@ -111,7 +111,7 @@ static bool is_valid_pitch_for_fmt(struct b2r2_control *cont,
 
 	complete_width =  width_2_complete_width(width, fmt);
 
-	pitch_derived_from_width = b2r2_calc_pitch_from_width(cont,
+	pitch_derived_from_width = b2r2_calc_pitch_from_width(dev,
 			complete_width, fmt);
 
 	if (pitch < pitch_derived_from_width)
@@ -263,7 +263,7 @@ static bool is_valid_height_for_fmt(s32 height, enum b2r2_blt_fmt fmt)
 	return true;
 }
 
-static bool validate_img(struct b2r2_control *cont,
+static bool validate_img(struct device *dev,
 		struct b2r2_blt_img *img)
 {
 	/*
@@ -276,14 +276,14 @@ static bool validate_img(struct b2r2_control *cont,
 	s32 img_size;
 
 	if (!is_valid_format(img->fmt)) {
-		b2r2_log_info(cont->dev, "Validation Error: "
+		b2r2_log_info(dev, "Validation Error: "
 				"!is_valid_format(img->fmt)\n");
 		return false;
 	}
 
 	if (img->width < 0 || img->width > max_img_width_height ||
 		img->height < 0 || img->height > max_img_width_height) {
-		b2r2_log_info(cont->dev, "Validation Error: "
+		b2r2_log_info(dev, "Validation Error: "
 				"img->width < 0 || "
 				"img->width > max_img_width_height || "
 				"img->height < 0 || "
@@ -293,7 +293,7 @@ static bool validate_img(struct b2r2_control *cont,
 
 	if (b2r2_is_mb_fmt(img->fmt)) {
 		if (!is_complete_width_for_fmt(img->width, img->fmt)) {
-			b2r2_log_info(cont->dev, "Validation Error: "
+			b2r2_log_info(dev, "Validation Error: "
 					"!is_complete_width_for_fmt(img->width,"
 					" img->fmt)\n");
 			return false;
@@ -302,7 +302,7 @@ static bool validate_img(struct b2r2_control *cont,
 		if (0 == img->pitch &&
 			(!is_aligned_width_for_fmt(img->width, img->fmt) ||
 			!is_complete_width_for_fmt(img->width, img->fmt))) {
-			b2r2_log_info(cont->dev,
+			b2r2_log_info(dev,
 					"Validation Error: "
 					"0 == img->pitch && "
 					"(!is_aligned_width_for_fmt(img->width,"
@@ -313,24 +313,24 @@ static bool validate_img(struct b2r2_control *cont,
 		}
 
 		if (img->pitch != 0 &&
-			!is_valid_pitch_for_fmt(cont, img->pitch, img->width,
+			!is_valid_pitch_for_fmt(dev, img->pitch, img->width,
 				img->fmt)) {
-			b2r2_log_info(cont->dev,
+			b2r2_log_info(dev,
 				"Validation Error: "
 				"img->pitch != 0 && "
-				"!is_valid_pitch_for_fmt(cont, "
+				"!is_valid_pitch_for_fmt(dev, "
 				"img->pitch, img->width, img->fmt)\n");
 			return false;
 		}
 	}
 
 	if (!is_valid_height_for_fmt(img->width, img->fmt)) {
-		b2r2_log_info(cont->dev, "Validation Error: "
+		b2r2_log_info(dev, "Validation Error: "
 				"!is_valid_height_for_fmt(img->width, img->fmt)\n");
 		return false;
 	}
 
-	img_size = b2r2_get_img_size(cont, img);
+	img_size = b2r2_get_img_size(dev, img);
 
 	/*
 	 * To keep the entire image inside s32 range.
@@ -338,7 +338,7 @@ static bool validate_img(struct b2r2_control *cont,
 	if ((B2R2_BLT_PTR_HWMEM_BUF_NAME_OFFSET == img->buf.type ||
 				B2R2_BLT_PTR_FD_OFFSET == img->buf.type) &&
 			img->buf.offset > (u32)b2r2_s32_max - (u32)img_size) {
-		b2r2_log_info(cont->dev, "Validation Error: "
+		b2r2_log_info(dev, "Validation Error: "
 				"(B2R2_BLT_PTR_HWMEM_BUF_NAME_OFFSET == "
 				"img->buf.type || B2R2_BLT_PTR_FD_OFFSET == "
 				"img->buf.type) && img->buf.offset > "
@@ -349,11 +349,11 @@ static bool validate_img(struct b2r2_control *cont,
 	return true;
 }
 
-static bool validate_rect(struct b2r2_control *cont,
+static bool validate_rect(struct device *dev,
 		struct b2r2_blt_rect *rect)
 {
 	if (rect->width < 0 || rect->height < 0) {
-		b2r2_log_info(cont->dev, "Validation Error: "
+		b2r2_log_info(dev, "Validation Error: "
 				"rect->width < 0 || rect->height < 0\n");
 		return false;
 	}
@@ -361,7 +361,7 @@ static bool validate_rect(struct b2r2_control *cont,
 	return true;
 }
 
-bool b2r2_validate_user_req(struct b2r2_control *cont,
+bool b2r2_validate_user_req(struct device *dev,
 		struct b2r2_blt_req *req)
 {
 	bool is_src_img_used;
@@ -370,7 +370,7 @@ bool b2r2_validate_user_req(struct b2r2_control *cont,
 	bool is_dst_clip_rect_used;
 
 	if (req->size != sizeof(struct b2r2_blt_req)) {
-		b2r2_log_err(cont->dev, "Validation Error: "
+		b2r2_log_err(dev, "Validation Error: "
 				"req->size != sizeof(struct b2r2_blt_req)\n");
 		return false;
 	}
@@ -382,31 +382,31 @@ bool b2r2_validate_user_req(struct b2r2_control *cont,
 	is_dst_clip_rect_used = req->flags & B2R2_BLT_FLAG_DESTINATION_CLIP;
 
 	if (is_src_img_used || is_src_mask_used) {
-		if (!validate_rect(cont, &req->src_rect)) {
-			b2r2_log_info(cont->dev, "Validation Error: "
-				"!validate_rect(cont, &req->src_rect)\n");
+		if (!validate_rect(dev, &req->src_rect)) {
+			b2r2_log_info(dev, "Validation Error: "
+				"!validate_rect(dev, &req->src_rect)\n");
 			return false;
 		}
 	}
 
-	if (!validate_rect(cont, &req->dst_rect)) {
-		b2r2_log_info(cont->dev, "Validation Error: "
-			"!validate_rect(cont, &req->dst_rect)\n");
+	if (!validate_rect(dev, &req->dst_rect)) {
+		b2r2_log_info(dev, "Validation Error: "
+			"!validate_rect(dev, &req->dst_rect)\n");
 		return false;
 	}
 
 	if (is_bg_img_used)	{
-		if (!validate_rect(cont, &req->bg_rect)) {
-			b2r2_log_info(cont->dev, "Validation Error: "
-				"!validate_rect(cont, &req->bg_rect)\n");
+		if (!validate_rect(dev, &req->bg_rect)) {
+			b2r2_log_info(dev, "Validation Error: "
+				"!validate_rect(dev, &req->bg_rect)\n");
 			return false;
 		}
 	}
 
 	if (is_dst_clip_rect_used) {
-		if (!validate_rect(cont, &req->dst_clip_rect)) {
-			b2r2_log_info(cont->dev, "Validation Error: "
-				"!validate_rect(cont, &req->dst_clip_rect)\n");
+		if (!validate_rect(dev, &req->dst_clip_rect)) {
+			b2r2_log_info(dev, "Validation Error: "
+				"!validate_rect(dev, &req->dst_clip_rect)\n");
 			return false;
 		}
 	}
@@ -414,9 +414,9 @@ bool b2r2_validate_user_req(struct b2r2_control *cont,
 	if (is_src_img_used) {
 		struct b2r2_blt_rect src_img_bounding_rect;
 
-		if (!validate_img(cont, &req->src_img)) {
-			b2r2_log_info(cont->dev, "Validation Error: "
-					"!validate_img(cont, &req->src_img)\n");
+		if (!validate_img(dev, &req->src_img)) {
+			b2r2_log_info(dev, "Validation Error: "
+					"!validate_img(dev, &req->src_img)\n");
 			return false;
 		}
 
@@ -424,7 +424,7 @@ bool b2r2_validate_user_req(struct b2r2_control *cont,
 				&src_img_bounding_rect);
 		if (!b2r2_is_rect_inside_rect(&req->src_rect,
 				&src_img_bounding_rect)) {
-			b2r2_log_info(cont->dev, "Validation Error: "
+			b2r2_log_info(dev, "Validation Error: "
 				"!b2r2_is_rect_inside_rect(&req->src_rect, "
 				"&src_img_bounding_rect)\n");
 			return false;
@@ -434,14 +434,14 @@ bool b2r2_validate_user_req(struct b2r2_control *cont,
 	if (is_bg_img_used) {
 		struct b2r2_blt_rect bg_img_bounding_rect;
 
-		if (!validate_img(cont, &req->bg_img)) {
-			b2r2_log_info(cont->dev, "Validation Error: "
-				"!validate_img(cont, &req->bg_img)\n");
+		if (!validate_img(dev, &req->bg_img)) {
+			b2r2_log_info(dev, "Validation Error: "
+				"!validate_img(dev, &req->bg_img)\n");
 			return false;
 		}
 
 		if (!is_valid_bg_format(req->bg_img.fmt)) {
-			b2r2_log_info(cont->dev, "Validation Error: "
+			b2r2_log_info(dev, "Validation Error: "
 				"!is_valid_bg_format(req->bg_img->fmt)\n");
 			return false;
 		}
@@ -450,7 +450,7 @@ bool b2r2_validate_user_req(struct b2r2_control *cont,
 			&bg_img_bounding_rect);
 		if (!b2r2_is_rect_inside_rect(&req->bg_rect,
 				&bg_img_bounding_rect)) {
-			b2r2_log_info(cont->dev, "Validation Error: "
+			b2r2_log_info(dev, "Validation Error: "
 				"!b2r2_is_rect_inside_rect(&req->bg_rect, "
 				"&bg_img_bounding_rect)\n");
 			return false;
@@ -460,9 +460,9 @@ bool b2r2_validate_user_req(struct b2r2_control *cont,
 	if (is_src_mask_used) {
 		struct b2r2_blt_rect src_mask_bounding_rect;
 
-		if (!validate_img(cont, &req->src_mask)) {
-			b2r2_log_info(cont->dev, "Validation Error: "
-				"!validate_img(cont, &req->src_mask)\n");
+		if (!validate_img(dev, &req->src_mask)) {
+			b2r2_log_info(dev, "Validation Error: "
+				"!validate_img(dev, &req->src_mask)\n");
 			return false;
 		}
 
@@ -470,22 +470,22 @@ bool b2r2_validate_user_req(struct b2r2_control *cont,
 			&src_mask_bounding_rect);
 		if (!b2r2_is_rect_inside_rect(&req->src_rect,
 					&src_mask_bounding_rect)) {
-			b2r2_log_info(cont->dev, "Validation Error: "
+			b2r2_log_info(dev, "Validation Error: "
 				"!b2r2_is_rect_inside_rect(&req->src_rect, "
 				"&src_mask_bounding_rect)\n");
 			return false;
 		}
 	}
 
-	if (!validate_img(cont, &req->dst_img)) {
-		b2r2_log_info(cont->dev, "Validation Error: "
-			"!validate_img(cont, &req->dst_img)\n");
+	if (!validate_img(dev, &req->dst_img)) {
+		b2r2_log_info(dev, "Validation Error: "
+			"!validate_img(dev, &req->dst_img)\n");
 		return false;
 	}
 
 	if (is_bg_img_used)	{
 		if (!b2r2_is_rect_gte_rect(&req->bg_rect, &req->dst_rect)) {
-			b2r2_log_info(cont->dev, "Validation Error: "
+			b2r2_log_info(dev, "Validation Error: "
 				"!b2r2_is_rect_gte_rect(&req->bg_rect, "
 				"&req->dst_rect)\n");
 			return false;
diff --git a/drivers/video/b2r2/b2r2_input_validation.h b/drivers/video/b2r2/b2r2_input_validation.h
index d3c6ae1b296..25f022a45ab 100644
--- a/drivers/video/b2r2/b2r2_input_validation.h
+++ b/drivers/video/b2r2/b2r2_input_validation.h
@@ -25,7 +25,7 @@
 
 #include "b2r2_internal.h"
 
-bool b2r2_validate_user_req(struct b2r2_control *cont,
+bool b2r2_validate_user_req(struct device *dev,
 		struct b2r2_blt_req *req);
 
 #endif
diff --git a/drivers/video/b2r2/b2r2_internal.h b/drivers/video/b2r2/b2r2_internal.h
index c46e814df14..329d644e5e1 100644
--- a/drivers/video/b2r2/b2r2_internal.h
+++ b/drivers/video/b2r2/b2r2_internal.h
@@ -23,7 +23,7 @@
 /**
  * B2R2_MAX_NBR_DEVICES - The maximum number of B2R2s handled
  */
-#define B2R2_MAX_NBR_DEVICES 1
+#define B2R2_MAX_NBR_DEVICES 2
 
 /* The maximum possible number of temporary buffers needed */
 #define MAX_TMP_BUFS_NEEDED 2
@@ -31,6 +31,9 @@
 /* Size of the color look-up table */
 #define CLUT_SIZE 1024
 
+/* The defined bits of the Interrupt Status Register */
+#define B2R2_ITS_MASK 0x0FFFF0FF
+
 /**
  * b2r2_op_type - the type of B2R2 operation to configure
  */
@@ -127,9 +130,12 @@ struct tmp_buf {
 };
 
 /**
- * struct b2r2_blt_instance - Represents the B2R2 instance (one per open)
+ * struct b2r2_control_instance - Represents the B2R2 instance
+ *                                (one per open and blitter core)
  *
  * @lock: Lock to protect the instance
+ * @control_id: The b2r2 core core control identifier
+ * @control: The b2r2 core control entity
  *
  * @report_list: Ready requests that should be reported,
  * @report_list_waitq: Wait queue for report list
@@ -137,10 +143,11 @@ struct tmp_buf {
  *                         in callback.
  * @synching: true if any client is waiting for b2r2_blt_synch(0)
  * @synch_done_waitq: Wait queue to handle synching on request_id 0
- * @control: The b2r2 control entity
  */
-struct b2r2_blt_instance {
+struct b2r2_control_instance {
 	struct mutex lock;
+	int control_id;
+	struct b2r2_control *control;
 
 	/* Requests to be reported */
 	struct list_head report_list;
@@ -150,8 +157,6 @@ struct b2r2_blt_instance {
 	u32 no_of_active_requests;
 	bool synching;
 	wait_queue_head_t synch_done_waitq;
-
-	struct b2r2_control *control;
 };
 
 /**
@@ -370,6 +375,7 @@ struct b2r2_core_job {
 
 	/* Data to be filled in by client */
 	int tag;
+	int data;
 	int prio;
 	u32 first_node_address;
 	u32 last_node_address;
@@ -419,6 +425,7 @@ struct b2r2_core_job {
  * @node_split_job: The administration structure for the B2R2 node split job
  * @first_node: Pointer to the first B2R2 node
  * @request_id: Request id for this job
+ * @core_mask: Bit mask with the cores doing part of the job
  * @node_split_handle: Handle of the node split
  * @src_resolved: Calculated info about the source buffer
  * @src_mask_resolved: Calculated info about the source mask buffer
@@ -427,13 +434,14 @@ struct b2r2_core_job {
  * @profile: True if the blit shall be profiled, false otherwise
  */
 struct b2r2_blt_request {
-	struct b2r2_blt_instance   *instance;
+	struct b2r2_control_instance   *instance;
 	struct list_head           list;
 	struct b2r2_blt_req        user_req;
 	struct b2r2_core_job       job;
 	struct b2r2_node_split_job node_split_job;
 	struct b2r2_node           *first_node;
 	int                        request_id;
+	u32                        core_mask;
 
 	/* Resolved buffer addresses */
 	struct b2r2_resolved_buf src_resolved;
@@ -491,7 +499,6 @@ struct b2r2_mem_heap {
 
 /**
  *
- * @miscdev: The miscdev presenting b2r2 to the system
  * @dev: The device handle of the b2r2 instance
  * @id: The id of the b2r2 instance
  * @name: The name of the b2r2 instance
@@ -525,36 +532,36 @@ struct b2r2_mem_heap {
  * @prev_node_count: Node cound of last_job
  */
 struct b2r2_control {
-	struct miscdevice		miscdev;
-	struct device			*dev;
-	int						id;
-	char					name[16];
-	void					*data;
-	struct tmp_buf			tmp_bufs[MAX_TMP_BUFS_NEEDED];
-	int						filters_initialized;
-	struct b2r2_mem_heap	mem_heap;
+	struct device                   *dev;
+	void                            *data;
+	int                             id;
+	struct kref                     ref;
+	bool                            enabled;
+	struct tmp_buf                  tmp_bufs[MAX_TMP_BUFS_NEEDED];
+	int                             filters_initialized;
+	struct b2r2_mem_heap            mem_heap;
 #ifdef CONFIG_DEBUG_FS
-	struct b2r2_blt_request	debugfs_latest_request;
-	struct dentry			*debugfs_root_dir;
-	struct dentry			*debugfs_debug_root_dir;
+	struct b2r2_blt_request         debugfs_latest_request;
+	struct dentry                   *debugfs_root_dir;
+	struct dentry                   *debugfs_debug_root_dir;
 #endif
-	struct mutex			stat_lock;
-	unsigned long			stat_n_jobs_added;
-	unsigned long			stat_n_jobs_released;
-	unsigned long			stat_n_jobs_in_report_list;
-	unsigned long			stat_n_in_blt;
-	unsigned long			stat_n_in_blt_synch;
-	unsigned long			stat_n_in_blt_add;
-	unsigned long			stat_n_in_blt_wait;
-	unsigned long			stat_n_in_synch_0;
-	unsigned long			stat_n_in_synch_job;
-	unsigned long			stat_n_in_query_cap;
-	unsigned long			stat_n_in_open;
-	unsigned long			stat_n_in_release;
-	struct mutex			last_job_lock;
-	struct b2r2_node		*last_job;
-	char					*last_job_chars;
-	int						prev_node_count;
+	struct mutex                    stat_lock;
+	unsigned long                   stat_n_jobs_added;
+	unsigned long                   stat_n_jobs_released;
+	unsigned long                   stat_n_jobs_in_report_list;
+	unsigned long                   stat_n_in_blt;
+	unsigned long                   stat_n_in_blt_synch;
+	unsigned long                   stat_n_in_blt_add;
+	unsigned long                   stat_n_in_blt_wait;
+	unsigned long                   stat_n_in_synch_0;
+	unsigned long                   stat_n_in_synch_job;
+	unsigned long                   stat_n_in_query_cap;
+	unsigned long                   stat_n_in_open;
+	unsigned long                   stat_n_in_release;
+	struct mutex                    last_job_lock;
+	struct b2r2_node                *last_job;
+	char                            *last_job_chars;
+	int                             prev_node_count;
 };
 
 /* FIXME: The functions below should be removed when we are
@@ -590,4 +597,14 @@ int b2r2_blt_module_init(struct b2r2_control *cont);
  */
 void b2r2_blt_module_exit(struct b2r2_control *cont);
 
+/**
+ * b2r2_blt_add_control() - Add the b2r2 core control
+ */
+void b2r2_blt_add_control(struct b2r2_control *cont);
+
+/**
+ * b2r2_blt_remove_control() - Remove the b2r2 core control
+ */
+void b2r2_blt_remove_control(struct b2r2_control *cont);
+
 #endif
diff --git a/drivers/video/b2r2/b2r2_node_split.c b/drivers/video/b2r2/b2r2_node_split.c
index d773865223b..b2fb07580ca 100644
--- a/drivers/video/b2r2/b2r2_node_split.c
+++ b/drivers/video/b2r2/b2r2_node_split.c
@@ -21,9 +21,6 @@
 /*
  * Macros and constants
  */
-#define ABS(x) ((x) < 0 ? -(x) : (x))
-#define MAX(x, y) ((x) > (y) ? (x) : (y))
-#define MIN(x, y) ((x) < (y) ? (x) : (y))
 
 #define INSTANCES_DEFAULT_SIZE 10
 #define INSTANCES_GROW_SIZE 5
@@ -111,9 +108,6 @@ static int configure_rot_scale(struct b2r2_control *cont,
 		struct b2r2_node_split_job *this, struct b2r2_node *node,
 		struct b2r2_node **next);
 
-static void recalculate_rects(struct b2r2_control *cont,
-		struct b2r2_blt_req *req);
-
 static int check_rect(struct b2r2_control *cont,
 		const struct b2r2_blt_img *img,
 		const struct b2r2_blt_rect *rect,
@@ -255,13 +249,6 @@ int b2r2_node_split_analyze(const struct b2r2_blt_request *req,
 	color_fill = (this->flags & (B2R2_BLT_FLAG_SOURCE_FILL |
 		B2R2_BLT_FLAG_SOURCE_FILL_RAW)) != 0;
 
-	/*
-	 * B2R2 cannot handle destination clipping on buffers
-	 * allocated close to 64MiB bank boundaries.
-	 * recalculate src_ and dst_rect to avoid clipping.
-	 */
-	recalculate_rects(cont, (struct b2r2_blt_req *) &req->user_req);
-
 	/* Configure the source and destination buffers */
 	set_buf(cont, &this->src, req->src_resolved.physical_address,
 		&req->user_req.src_img, &req->user_req.src_rect,
@@ -579,25 +566,6 @@ void b2r2_node_split_cancel(struct b2r2_control *cont,
 	return;
 }
 
-/*
- * Private functions
- */
-
-static void recalculate_rects(struct b2r2_control *cont,
-		struct b2r2_blt_req *req)
-{
-	struct b2r2_blt_rect new_dst_rect;
-	struct b2r2_blt_rect new_src_rect;
-	struct b2r2_blt_rect new_bg_rect;
-
-	b2r2_trim_rects(cont,
-		req, &new_bg_rect, &new_dst_rect, &new_src_rect);
-
-	req->dst_rect = new_dst_rect;
-	req->src_rect = new_src_rect;
-	req->bg_rect = new_bg_rect;
-}
-
 static int check_rect(struct b2r2_control *cont,
 		const struct b2r2_blt_img *img,
 		const struct b2r2_blt_rect *rect,
@@ -619,10 +587,10 @@ static int check_rect(struct b2r2_control *cont,
 	/* If we are using clip we should only look at the intersection of the
 	   rects */
 	if (clip) {
-		l = MAX(rect->x, clip->x);
-		t = MAX(rect->y, clip->y);
-		r = MIN(rect->x + rect->width, clip->x + clip->width);
-		b = MIN(rect->y + rect->height, clip->y + clip->height);
+		l = max(rect->x, clip->x);
+		t = max(rect->y, clip->y);
+		r = min(rect->x + rect->width, clip->x + clip->width);
+		b = min(rect->y + rect->height, clip->y + clip->height);
 	} else {
 		l = rect->x;
 		t = rect->y;
@@ -1338,22 +1306,22 @@ static int analyze_scale_factors(struct b2r2_control *cont,
 	u16 vsf;
 
 	if (this->rotation) {
-		ret = calculate_scale_factor(cont, this->src.rect.width,
+		ret = calculate_scale_factor(cont->dev, this->src.rect.width,
 					this->dst.rect.height, &hsf);
 		if (ret < 0)
 			goto error;
 
-		ret = calculate_scale_factor(cont, this->src.rect.height,
+		ret = calculate_scale_factor(cont->dev, this->src.rect.height,
 					this->dst.rect.width, &vsf);
 		if (ret < 0)
 			goto error;
 	} else {
-		ret = calculate_scale_factor(cont, this->src.rect.width,
+		ret = calculate_scale_factor(cont->dev, this->src.rect.width,
 					this->dst.rect.width, &hsf);
 		if (ret < 0)
 			goto error;
 
-		ret = calculate_scale_factor(cont, this->src.rect.height,
+		ret = calculate_scale_factor(cont->dev, this->src.rect.height,
 					this->dst.rect.height, &vsf);
 		if (ret < 0)
 			goto error;
@@ -2791,9 +2759,9 @@ static int setup_tmp_buf(struct b2r2_control *cont,
 
 	if (size > max_size) {
 		/* We need to limit the size, so we choose a different width */
-		width = MIN(width, B2R2_RESCALE_MAX_WIDTH);
+		width = min(width, (u32) B2R2_RESCALE_MAX_WIDTH);
 		pitch = b2r2_fmt_byte_pitch(fmt, width);
-		height = MIN(height, max_size / pitch);
+		height = min(height, max_size / pitch);
 		size = pitch * height;
 	}
 
@@ -2918,10 +2886,10 @@ static void set_target(struct b2r2_node *node, u32 addr,
 	/* Clip to the destination buffer to prevent memory overwrites */
 	if ((l < 0) || (r > buf->width) || (t < 0) || (b > buf->height)) {
 		/* The clip rectangle is including the borders */
-		l = MAX(l, 0);
-		r = MIN(r, buf->width) - 1;
-		t = MAX(t, 0);
-		b = MIN(b, buf->height) - 1;
+		l = max(l, 0);
+		r = min(r, (s32) buf->width) - 1;
+		t = max(t, 0);
+		b = min(b, (s32) buf->height) - 1;
 
 		node->node.GROUP0.B2R2_CIC |= B2R2_CIC_CLIP_WINDOW;
 		node->node.GROUP0.B2R2_INS |= B2R2_INS_RECT_CLIP_ENABLED;
diff --git a/drivers/video/b2r2/b2r2_profiler_socket.c b/drivers/video/b2r2/b2r2_profiler_socket.c
index ffa7f2870c8..cb95af9380e 100644
--- a/drivers/video/b2r2/b2r2_profiler_socket.c
+++ b/drivers/video/b2r2/b2r2_profiler_socket.c
@@ -16,7 +16,7 @@
 
 #include "b2r2_profiler_api.h"
 #include "b2r2_internal.h"
-
+#include "b2r2_core.h"
 
 /*
  * TODO: Call the profiler in a seperate thread and have a circular buffer
@@ -81,7 +81,8 @@ void b2r2_call_profiler_blt_done(const struct b2r2_blt_request * const request)
 {
 	int return_value;
 	struct b2r2_blt_profiling_info blt_profiling_info;
-	struct b2r2_control *cont = request->instance->control;
+	struct b2r2_core *core = (struct b2r2_core *) request->job.data;
+	struct b2r2_control *cont = core->control;
 
 	return_value = down_interruptible(&b2r2_profiler_lock);
 	if (return_value != 0) {
diff --git a/drivers/video/b2r2/b2r2_utils.c b/drivers/video/b2r2/b2r2_utils.c
index d482701089e..44c738b5aab 100644
--- a/drivers/video/b2r2/b2r2_utils.c
+++ b/drivers/video/b2r2/b2r2_utils.c
@@ -24,19 +24,19 @@ const s32 b2r2_s32_max = 2147483647;
  * calculate_scale_factor() - calculates the scale factor between the given
  *                            values
  */
-int calculate_scale_factor(struct b2r2_control *cont,
+int calculate_scale_factor(struct device *dev,
 			u32 from, u32 to, u16 *sf_out)
 {
 	int ret;
 	u32 sf;
 
-	b2r2_log_info(cont->dev, "%s\n", __func__);
+	b2r2_log_info(dev, "%s\n", __func__);
 
 	if (to == from) {
 		*sf_out = 1 << 10;
 		return 0;
 	} else if (to == 0) {
-		b2r2_log_err(cont->dev, "%s: To is 0!\n", __func__);
+		b2r2_log_err(dev, "%s: To is 0!\n", __func__);
 		BUG_ON(1);
 	}
 
@@ -44,12 +44,12 @@ int calculate_scale_factor(struct b2r2_control *cont,
 
 	if ((sf & 0xffff0000) != 0) {
 		/* Overflow error */
-		b2r2_log_warn(cont->dev, "%s: "
+		b2r2_log_warn(dev, "%s: "
 			"Scale factor too large\n", __func__);
 		ret = -EINVAL;
 		goto error;
 	} else if (sf == 0) {
-		b2r2_log_warn(cont->dev, "%s: "
+		b2r2_log_warn(dev, "%s: "
 			"Scale factor too small\n", __func__);
 		ret = -EINVAL;
 		goto error;
@@ -57,12 +57,12 @@ int calculate_scale_factor(struct b2r2_control *cont,
 
 	*sf_out = (u16)sf;
 
-	b2r2_log_info(cont->dev, "%s exit\n", __func__);
+	b2r2_log_info(dev, "%s exit\n", __func__);
 
 	return 0;
 
 error:
-	b2r2_log_warn(cont->dev, "%s: Exit...\n", __func__);
+	b2r2_log_warn(dev, "%s: Exit...\n", __func__);
 	return ret;
 }
 
@@ -127,7 +127,7 @@ void b2r2_intersect_rects(struct b2r2_blt_rect *rect1,
  * the old source rectangle corresponds to
  * to the new part of old destination rectangle.
  */
-void b2r2_trim_rects(struct b2r2_control *cont,
+void b2r2_trim_rects(struct device *dev,
 			const struct b2r2_blt_req *req,
 			struct b2r2_blt_rect *new_bg_rect,
 			struct b2r2_blt_rect *new_dst_rect,
@@ -150,11 +150,11 @@ void b2r2_trim_rects(struct b2r2_control *cont,
 	s16 hsf;
 	s16 vsf;
 
-	b2r2_log_info(cont->dev,
+	b2r2_log_info(dev,
 		"%s\nold_dst_rect(x,y,w,h)=(%d, %d, %d, %d)\n", __func__,
 		old_dst_rect->x, old_dst_rect->y,
 		old_dst_rect->width, old_dst_rect->height);
-	b2r2_log_info(cont->dev,
+	b2r2_log_info(dev,
 		"%s\nold_src_rect(x,y,w,h)=(%d, %d, %d, %d)\n", __func__,
 		old_src_rect->x, old_src_rect->y,
 		old_src_rect->width, old_src_rect->height);
@@ -167,7 +167,7 @@ void b2r2_trim_rects(struct b2r2_control *cont,
 		goto keep_rects;
 
 	b2r2_intersect_rects(old_dst_rect, &dst_img_bounds, new_dst_rect);
-	b2r2_log_info(cont->dev,
+	b2r2_log_info(dev,
 		"%s\nnew_dst_rect(x,y,w,h)=(%d, %d, %d, %d)\n", __func__,
 		new_dst_rect->x, new_dst_rect->y,
 		new_dst_rect->width, new_dst_rect->height);
@@ -181,13 +181,13 @@ void b2r2_trim_rects(struct b2r2_control *cont,
 
 	if (transform & B2R2_BLT_TRANSFORM_CCW_ROT_90) {
 		int res = 0;
-		res = calculate_scale_factor(cont, old_src_rect->width,
+		res = calculate_scale_factor(dev, old_src_rect->width,
 			old_dst_rect->height, &hsf);
 		/* invalid dimensions, leave them to validation */
 		if (res < 0)
 			goto keep_rects;
 
-		res = calculate_scale_factor(cont, old_src_rect->height,
+		res = calculate_scale_factor(dev, old_src_rect->height,
 			old_dst_rect->width, &vsf);
 		if (res < 0)
 			goto keep_rects;
@@ -207,12 +207,12 @@ void b2r2_trim_rects(struct b2r2_control *cont,
 		src_h = new_dst_rect->width * vsf;
 	} else {
 		int res = 0;
-		res = calculate_scale_factor(cont, old_src_rect->width,
+		res = calculate_scale_factor(dev, old_src_rect->width,
 			old_dst_rect->width, &hsf);
 		if (res < 0)
 			goto keep_rects;
 
-		res = calculate_scale_factor(cont, old_src_rect->height,
+		res = calculate_scale_factor(dev, old_src_rect->height,
 			old_dst_rect->height, &vsf);
 		if (res < 0)
 			goto keep_rects;
@@ -270,7 +270,7 @@ void b2r2_trim_rects(struct b2r2_control *cont,
 	new_src_rect->width = src_w;
 	new_src_rect->height = src_h;
 
-	b2r2_log_info(cont->dev,
+	b2r2_log_info(dev,
 		"%s\nnew_src_rect(x,y,w,h)=(%d, %d, %d, %d)\n", __func__,
 		new_src_rect->x, new_src_rect->y,
 		new_src_rect->width, new_src_rect->height);
@@ -279,7 +279,7 @@ void b2r2_trim_rects(struct b2r2_control *cont,
 		/* Modify bg_rect in the same way as dst_rect */
 		s32 dw = new_dst_rect->width - old_dst_rect->width;
 		s32 dh = new_dst_rect->height - old_dst_rect->height;
-		b2r2_log_info(cont->dev,
+		b2r2_log_info(dev,
 			"%s\nold bg_rect(x,y,w,h)=(%d, %d, %d, %d)\n",
 			__func__, old_bg_rect->x, old_bg_rect->y,
 			old_bg_rect->width, old_bg_rect->height);
@@ -287,7 +287,7 @@ void b2r2_trim_rects(struct b2r2_control *cont,
 		new_bg_rect->y = old_bg_rect->y + dy;
 		new_bg_rect->width = old_bg_rect->width + dw;
 		new_bg_rect->height = old_bg_rect->height + dh;
-		b2r2_log_info(cont->dev,
+		b2r2_log_info(dev,
 			"%s\nnew bg_rect(x,y,w,h)=(%d, %d, %d, %d)\n",
 			__func__, new_bg_rect->x, new_bg_rect->y,
 			new_bg_rect->width, new_bg_rect->height);
@@ -301,11 +301,11 @@ keep_rects:
 	*new_src_rect = *old_src_rect;
 	*new_dst_rect = *old_dst_rect;
 	*new_bg_rect = *old_bg_rect;
-	b2r2_log_info(cont->dev, "%s original rectangles preserved.\n", __func__);
+	b2r2_log_info(dev, "%s original rectangles preserved.\n", __func__);
 	return;
 }
 
-int b2r2_get_fmt_bpp(struct b2r2_control *cont, enum b2r2_blt_fmt fmt)
+int b2r2_get_fmt_bpp(struct device *dev, enum b2r2_blt_fmt fmt)
 {
 	/*
 	 * Currently this function is not used that often but if that changes a
@@ -351,14 +351,14 @@ int b2r2_get_fmt_bpp(struct b2r2_control *cont, enum b2r2_blt_fmt fmt)
 		return 32;
 
 	default:
-		b2r2_log_err(cont->dev,
+		b2r2_log_err(dev,
 			"%s: Internal error! Format %#x not recognized.\n",
 			__func__, fmt);
 		return 32;
 	}
 }
 
-int b2r2_get_fmt_y_bpp(struct b2r2_control *cont, enum b2r2_blt_fmt fmt)
+int b2r2_get_fmt_y_bpp(struct device *dev, enum b2r2_blt_fmt fmt)
 {
 	switch (fmt) {
 	case B2R2_BLT_FMT_YUV420_PACKED_PLANAR:
@@ -381,7 +381,7 @@ int b2r2_get_fmt_y_bpp(struct b2r2_control *cont, enum b2r2_blt_fmt fmt)
 		return 8;
 
 	default:
-		b2r2_log_err(cont->dev,
+		b2r2_log_err(dev,
 			"%s: Internal error! Non YCbCr format supplied.\n",
 			__func__);
 		return 8;
@@ -542,40 +542,40 @@ bool b2r2_is_mb_fmt(enum b2r2_blt_fmt fmt)
 	}
 }
 
-u32 b2r2_calc_pitch_from_width(struct b2r2_control *cont,
+u32 b2r2_calc_pitch_from_width(struct device *dev,
 		s32 width, enum b2r2_blt_fmt fmt)
 {
 	if (b2r2_is_single_plane_fmt(fmt)) {
 		return (u32)b2r2_div_round_up(width *
-			b2r2_get_fmt_bpp(cont, fmt), 8);
+			b2r2_get_fmt_bpp(dev, fmt), 8);
 	} else if (b2r2_is_ycbcrsp_fmt(fmt) || b2r2_is_ycbcrp_fmt(fmt)) {
 		return (u32)b2r2_div_round_up(width *
-			b2r2_get_fmt_y_bpp(cont, fmt), 8);
+			b2r2_get_fmt_y_bpp(dev, fmt), 8);
 	} else {
-		b2r2_log_err(cont->dev, "%s: Internal error! "
+		b2r2_log_err(dev, "%s: Internal error! "
 			"Pitchless format supplied.\n",
 			__func__);
 		return 0;
 	}
 }
 
-u32 b2r2_get_img_pitch(struct b2r2_control *cont, struct b2r2_blt_img *img)
+u32 b2r2_get_img_pitch(struct device *dev, struct b2r2_blt_img *img)
 {
 	if (img->pitch != 0)
 		return img->pitch;
 	else
-		return b2r2_calc_pitch_from_width(cont, img->width, img->fmt);
+		return b2r2_calc_pitch_from_width(dev, img->width, img->fmt);
 }
 
-s32 b2r2_get_img_size(struct b2r2_control *cont, struct b2r2_blt_img *img)
+s32 b2r2_get_img_size(struct device *dev, struct b2r2_blt_img *img)
 {
 	if (b2r2_is_single_plane_fmt(img->fmt)) {
-		return (s32)b2r2_get_img_pitch(cont, img) * img->height;
+		return (s32)b2r2_get_img_pitch(dev, img) * img->height;
 	} else if (b2r2_is_ycbcrsp_fmt(img->fmt) ||
 			b2r2_is_ycbcrp_fmt(img->fmt)) {
 		s32 y_plane_size;
 
-		y_plane_size = (s32)b2r2_get_img_pitch(cont, img) * img->height;
+		y_plane_size = (s32)b2r2_get_img_pitch(dev, img) * img->height;
 
 		if (b2r2_is_ycbcr420_fmt(img->fmt)) {
 			return y_plane_size + y_plane_size / 2;
@@ -584,16 +584,16 @@ s32 b2r2_get_img_size(struct b2r2_control *cont, struct b2r2_blt_img *img)
 		} else if (b2r2_is_ycbcr444_fmt(img->fmt)) {
 			return y_plane_size * 3;
 		} else {
-			b2r2_log_err(cont->dev,	"%s: Internal error!"
+			b2r2_log_err(dev,	"%s: Internal error!"
 				" Format %#x not recognized.\n",
 				__func__, img->fmt);
 			return 0;
 		}
 	} else if (b2r2_is_mb_fmt(img->fmt)) {
 		return (img->width * img->height *
-			b2r2_get_fmt_bpp(cont, img->fmt)) / 8;
+			b2r2_get_fmt_bpp(dev, img->fmt)) / 8;
 	} else {
-		b2r2_log_err(cont->dev, "%s: Internal error! "
+		b2r2_log_err(dev, "%s: Internal error! "
 			"Format %#x not recognized.\n",
 			__func__, img->fmt);
 		return 0;
@@ -1097,3 +1097,228 @@ enum b2r2_fmt_type b2r2_get_fmt_type(enum b2r2_blt_fmt fmt)
 		return B2R2_FMT_TYPE_RASTER;
 	}
 }
+
+#ifdef CONFIG_DEBUG_FS
+/**
+ * sprintf_req() - Builds a string representing the request, for debug
+ *
+ * @request:Request that should be encoded into a string
+ * @buf: Receiving buffer
+ * @size: Size of receiving buffer
+ *
+ * Returns number of characters in string, excluding null terminator
+ */
+int sprintf_req(struct b2r2_blt_request *request, char *buf, int size)
+{
+	size_t dev_size = 0;
+
+	/* generic request info */
+	dev_size += sprintf(buf + dev_size,
+		"instance      : 0x%08lX\n",
+		(unsigned long) request->instance);
+	dev_size += sprintf(buf + dev_size,
+		"size          : %d bytes\n", request->user_req.size);
+	dev_size += sprintf(buf + dev_size,
+		"flags         : 0x%08lX\n",
+		(unsigned long) request->user_req.flags);
+	dev_size += sprintf(buf + dev_size,
+		"transform     : %d\n",
+		(int) request->user_req.transform);
+	dev_size += sprintf(buf + dev_size,
+		"prio          : %d\n", request->user_req.transform);
+	dev_size += sprintf(buf + dev_size,
+		"global_alpha  : %d\n",
+		(int) request->user_req.global_alpha);
+	dev_size += sprintf(buf + dev_size,
+		"report1       : 0x%08lX\n",
+		(unsigned long) request->user_req.report1);
+	dev_size += sprintf(buf + dev_size,
+		"report2       : 0x%08lX\n",
+		(unsigned long) request->user_req.report2);
+	dev_size += sprintf(buf + dev_size,
+		"request_id    : 0x%08lX\n\n",
+		(unsigned long) request->request_id);
+
+	/* src info */
+	dev_size += sprintf(buf + dev_size,
+		"src_img.fmt   : %#010x\n",
+		request->user_req.src_img.fmt);
+	dev_size += sprintf(buf + dev_size,
+		"src_img.buf   : {type=%d, hwmem_buf_name=%d, fd=%d, "
+		"offset=%d, len=%d}\n",
+		request->user_req.src_img.buf.type,
+		request->user_req.src_img.buf.hwmem_buf_name,
+		request->user_req.src_img.buf.fd,
+		request->user_req.src_img.buf.offset,
+		request->user_req.src_img.buf.len);
+	dev_size += sprintf(buf + dev_size,
+		"src_img       : {width=%d, height=%d, pitch=%d}\n",
+		request->user_req.src_img.width,
+		request->user_req.src_img.height,
+		request->user_req.src_img.pitch);
+	dev_size += sprintf(buf + dev_size,
+		"src_mask.fmt  : %#010x\n",
+		request->user_req.src_mask.fmt);
+	dev_size += sprintf(buf + dev_size,
+		"src_mask.buf  : {type=%d, hwmem_buf_name=%d, fd=%d,"
+		" offset=%d, len=%d}\n",
+		request->user_req.src_mask.buf.type,
+		request->user_req.src_mask.buf.hwmem_buf_name,
+		request->user_req.src_mask.buf.fd,
+		request->user_req.src_mask.buf.offset,
+		request->user_req.src_mask.buf.len);
+	dev_size += sprintf(buf + dev_size,
+		"src_mask      : {width=%d, height=%d, pitch=%d}\n",
+		request->user_req.src_mask.width,
+		request->user_req.src_mask.height,
+		request->user_req.src_mask.pitch);
+	dev_size += sprintf(buf + dev_size,
+		"src_rect      : {x=%d, y=%d, width=%d, height=%d}\n",
+		request->user_req.src_rect.x,
+		request->user_req.src_rect.y,
+		request->user_req.src_rect.width,
+		request->user_req.src_rect.height);
+	dev_size += sprintf(buf + dev_size,
+		"src_color     : 0x%08lX\n\n",
+		(unsigned long) request->user_req.src_color);
+
+	/* bg info */
+	dev_size += sprintf(buf + dev_size,
+		"bg_img.fmt    : %#010x\n",
+		request->user_req.bg_img.fmt);
+	dev_size += sprintf(buf + dev_size,
+		"bg_img.buf    : {type=%d, hwmem_buf_name=%d, fd=%d,"
+		" offset=%d, len=%d}\n",
+		request->user_req.bg_img.buf.type,
+		request->user_req.bg_img.buf.hwmem_buf_name,
+		request->user_req.bg_img.buf.fd,
+		request->user_req.bg_img.buf.offset,
+		request->user_req.bg_img.buf.len);
+	dev_size += sprintf(buf + dev_size,
+		"bg_img        : {width=%d, height=%d, pitch=%d}\n",
+		request->user_req.bg_img.width,
+		request->user_req.bg_img.height,
+		request->user_req.bg_img.pitch);
+	dev_size += sprintf(buf + dev_size,
+		"bg_rect       : {x=%d, y=%d, width=%d, height=%d}\n\n",
+		request->user_req.bg_rect.x,
+		request->user_req.bg_rect.y,
+		request->user_req.bg_rect.width,
+		request->user_req.bg_rect.height);
+
+	/* dst info */
+	dev_size += sprintf(buf + dev_size,
+		"dst_img.fmt   : %#010x\n",
+		request->user_req.dst_img.fmt);
+	dev_size += sprintf(buf + dev_size,
+		"dst_img.buf   : {type=%d, hwmem_buf_name=%d, fd=%d,"
+		" offset=%d, len=%d}\n",
+		request->user_req.dst_img.buf.type,
+		request->user_req.dst_img.buf.hwmem_buf_name,
+		request->user_req.dst_img.buf.fd,
+		request->user_req.dst_img.buf.offset,
+		request->user_req.dst_img.buf.len);
+	dev_size += sprintf(buf + dev_size,
+		"dst_img       : {width=%d, height=%d, pitch=%d}\n",
+		request->user_req.dst_img.width,
+		request->user_req.dst_img.height,
+		request->user_req.dst_img.pitch);
+	dev_size += sprintf(buf + dev_size,
+		"dst_rect      : {x=%d, y=%d, width=%d, height=%d}\n",
+		request->user_req.dst_rect.x,
+		request->user_req.dst_rect.y,
+		request->user_req.dst_rect.width,
+		request->user_req.dst_rect.height);
+	dev_size += sprintf(buf + dev_size,
+		"dst_clip_rect : {x=%d, y=%d, width=%d, height=%d}\n",
+		request->user_req.dst_clip_rect.x,
+		request->user_req.dst_clip_rect.y,
+		request->user_req.dst_clip_rect.width,
+		request->user_req.dst_clip_rect.height);
+	dev_size += sprintf(buf + dev_size,
+		"dst_color     : 0x%08lX\n\n",
+		(unsigned long) request->user_req.dst_color);
+
+	dev_size += sprintf(buf + dev_size,
+		"src_resolved.physical                  : 0x%08lX\n",
+		(unsigned long) request->src_resolved.
+		physical_address);
+	dev_size += sprintf(buf + dev_size,
+		"src_resolved.virtual                   : 0x%08lX\n",
+		(unsigned long) request->src_resolved.virtual_address);
+	dev_size += sprintf(buf + dev_size,
+		"src_resolved.filep                     : 0x%08lX\n",
+		(unsigned long) request->src_resolved.filep);
+	dev_size += sprintf(buf + dev_size,
+		"src_resolved.filep_physical_start      : 0x%08lX\n",
+		(unsigned long) request->src_resolved.
+		file_physical_start);
+	dev_size += sprintf(buf + dev_size,
+		"src_resolved.filep_virtual_start       : 0x%08lX\n",
+		(unsigned long) request->src_resolved.file_virtual_start);
+	dev_size += sprintf(buf + dev_size,
+		"src_resolved.file_len                  : %d\n\n",
+		request->src_resolved.file_len);
+
+	dev_size += sprintf(buf + dev_size,
+		"src_mask_resolved.physical             : 0x%08lX\n",
+		(unsigned long) request->src_mask_resolved.
+		physical_address);
+	dev_size += sprintf(buf + dev_size,
+		"src_mask_resolved.virtual              : 0x%08lX\n",
+		(unsigned long) request->src_mask_resolved.virtual_address);
+	dev_size += sprintf(buf + dev_size,
+		"src_mask_resolved.filep                : 0x%08lX\n",
+		(unsigned long) request->src_mask_resolved.filep);
+	dev_size += sprintf(buf + dev_size,
+		"src_mask_resolved.filep_physical_start : 0x%08lX\n",
+		(unsigned long) request->src_mask_resolved.
+		file_physical_start);
+	dev_size += sprintf(buf + dev_size,
+		"src_mask_resolved.filep_virtual_start  : 0x%08lX\n",
+		(unsigned long) request->src_mask_resolved.
+		file_virtual_start);
+	dev_size += sprintf(buf + dev_size,
+		"src_mask_resolved.file_len             : %d\n\n",
+		request->src_mask_resolved.file_len);
+
+	dev_size += sprintf(buf + dev_size,
+		"dst_resolved.physical                  : 0x%08lX\n",
+		(unsigned long) request->dst_resolved.
+		physical_address);
+	dev_size += sprintf(buf + dev_size,
+		"dst_resolved.virtual                   : 0x%08lX\n",
+		(unsigned long) request->dst_resolved.virtual_address);
+	dev_size += sprintf(buf + dev_size,
+		"dst_resolved.filep                     : 0x%08lX\n",
+		(unsigned long) request->dst_resolved.filep);
+	dev_size += sprintf(buf + dev_size,
+		"dst_resolved.filep_physical_start      : 0x%08lX\n",
+		(unsigned long) request->dst_resolved.
+		file_physical_start);
+	dev_size += sprintf(buf + dev_size,
+		"dst_resolved.filep_virtual_start       : 0x%08lX\n",
+		(unsigned long) request->dst_resolved.file_virtual_start);
+	dev_size += sprintf(buf + dev_size,
+		"dst_resolved.file_len                  : %d\n\n",
+		request->dst_resolved.file_len);
+
+	return dev_size;
+}
+#endif
+
+void b2r2_recalculate_rects(struct device *dev,
+		struct b2r2_blt_req *req)
+{
+	struct b2r2_blt_rect new_dst_rect;
+	struct b2r2_blt_rect new_src_rect;
+	struct b2r2_blt_rect new_bg_rect;
+
+	b2r2_trim_rects(dev,
+		req, &new_bg_rect, &new_dst_rect, &new_src_rect);
+
+	req->dst_rect = new_dst_rect;
+	req->src_rect = new_src_rect;
+	if (req->flags & B2R2_BLT_FLAG_BG_BLEND)
+		req->bg_rect = new_bg_rect;
+}
diff --git a/drivers/video/b2r2/b2r2_utils.h b/drivers/video/b2r2/b2r2_utils.h
index e639e454121..081ac1f4848 100644
--- a/drivers/video/b2r2/b2r2_utils.h
+++ b/drivers/video/b2r2/b2r2_utils.h
@@ -17,7 +17,7 @@
 
 extern const s32 b2r2_s32_max;
 
-int calculate_scale_factor(struct b2r2_control *cont,
+int calculate_scale_factor(struct device *dev,
 		u32 from, u32 to, u16 *sf_out);
 void b2r2_get_img_bounding_rect(struct b2r2_blt_img *img,
 		struct b2r2_blt_rect *bounding_rect);
@@ -30,14 +30,14 @@ bool b2r2_is_rect_gte_rect(struct b2r2_blt_rect *rect1,
 void b2r2_intersect_rects(struct b2r2_blt_rect *rect1,
 		struct b2r2_blt_rect *rect2,
 		struct b2r2_blt_rect *intersection);
-void b2r2_trim_rects(struct b2r2_control *cont,
+void b2r2_trim_rects(struct device *dev,
 			const struct b2r2_blt_req *req,
 			struct b2r2_blt_rect *new_bg_rect,
 			struct b2r2_blt_rect *new_dst_rect,
 			struct b2r2_blt_rect *new_src_rect);
 
-int b2r2_get_fmt_bpp(struct b2r2_control *cont, enum b2r2_blt_fmt fmt);
-int b2r2_get_fmt_y_bpp(struct b2r2_control *cont, enum b2r2_blt_fmt fmt);
+int b2r2_get_fmt_bpp(struct device *dev, enum b2r2_blt_fmt fmt);
+int b2r2_get_fmt_y_bpp(struct device *dev, enum b2r2_blt_fmt fmt);
 
 bool b2r2_is_single_plane_fmt(enum b2r2_blt_fmt fmt);
 bool b2r2_is_independent_pixel_fmt(enum b2r2_blt_fmt fmt);
@@ -52,11 +52,11 @@ bool b2r2_is_mb_fmt(enum b2r2_blt_fmt fmt);
 /*
  * Rounds up if an invalid width causes the pitch to be non byte aligned.
  */
-u32 b2r2_calc_pitch_from_width(struct b2r2_control *cont,
+u32 b2r2_calc_pitch_from_width(struct device *dev,
 		s32 width, enum b2r2_blt_fmt fmt);
-u32 b2r2_get_img_pitch(struct b2r2_control *cont,
+u32 b2r2_get_img_pitch(struct device *dev,
 		struct b2r2_blt_img *img);
-s32 b2r2_get_img_size(struct b2r2_control *cont,
+s32 b2r2_get_img_size(struct device *dev,
 		struct b2r2_blt_img *img);
 
 s32 b2r2_div_round_up(s32 dividend, s32 divisor);
@@ -80,5 +80,10 @@ int b2r2_fmt_byte_pitch(enum b2r2_blt_fmt fmt, u32 width);
 enum b2r2_native_fmt b2r2_to_native_fmt(enum b2r2_blt_fmt fmt);
 u32 b2r2_to_RGB888(u32 color, const enum b2r2_blt_fmt fmt);
 enum b2r2_fmt_type b2r2_get_fmt_type(enum b2r2_blt_fmt fmt);
+#ifdef CONFIG_DEBUG_FS
+int sprintf_req(struct b2r2_blt_request *request, char *buf, int size);
+#endif
+void b2r2_recalculate_rects(struct device *dev,
+		struct b2r2_blt_req *req);
 
 #endif
diff --git a/include/video/b2r2_blt.h b/include/video/b2r2_blt.h
index 0964c95af36..4fdc40ab3b9 100644
--- a/include/video/b2r2_blt.h
+++ b/include/video/b2r2_blt.h
@@ -636,4 +636,55 @@ struct b2r2_blt_report {
 #define B2R2_BLT_QUERY_CAP_IOC  _IOWR(B2R2_BLT_IOC_MAGIC, 3, \
 				  struct b2r2_blt_query_cap)
 
+/**
+ * struct b2r2_platform_data - The b2r2 core hardware configuration
+ *
+ * @regulator_id: The name of the b2r2 power source
+ * @clock_id: The name of the b2r2 clock
+ *
+ */
+struct b2r2_platform_data {
+	const char *regulator_id;
+	const char *clock_id;
+};
+
+/**
+ * b2r2_blt_open - Opening a handle for use with the blitter interface
+ *
+ * Returns a handle (0 or greater) to a B2R2 blitter intance on success
+ */
+int b2r2_blt_open(void);
+
+/**
+ * b2r2_blt_close - Free the blitter instance and its resources
+ *
+ * @handle: The B2R2 BLT instance handle
+ *
+ * All active jobs are finished or cancelled and allocated data
+ * is released.
+ *
+ * Returns 0 on success
+ */
+int b2r2_blt_close(int handle);
+
+/**
+ * b2r2_blt_request - Request a blit operation
+ *
+ * @handle: The B2R2 BLT instance handle
+ *
+ * Returns 0 on success
+ */
+int b2r2_blt_request(int handle, struct b2r2_blt_req *user_req);
+
+/**
+ * b2r2_blt_synch - Wait for all or a specified job
+ *
+ * @handle: The B2R2 BLT instance handle
+ * @request_id: If 0, wait for all requests on this instance to finish.
+ *              Else wait for the request with the given request id to finish.
+ *
+ * Returns 0 on success
+ */
+int b2r2_blt_synch(int handle, int request_id);
+
 #endif /* #ifdef _LINUX_VIDEO_B2R2_BLT_H */
-- 
cgit v1.2.3


From f61b197ad7132acff379d7a55f4fcfe48885a803 Mon Sep 17 00:00:00 2001
From: Marta Lofstedt <marta.lofstedt@stericsson.com>
Date: Wed, 22 Feb 2012 13:01:45 +0100
Subject: video: mcde: Release ESRAM regulator

MCDE only uses ESRAM during rotation. It needs to release
the ESRAM regulator when not rotating.

ST-Ericsson ID: 419095
ST-Ericsson Linux next: -
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I0850b7598c12ad7d849969955aaac033ef063d99
Signed-off-by: Marta Lofstedt <marta.lofstedt@stericsson.com>
Change-Id: I6d683aa0fc6349caa3ae6b5ef86db4a7f73a3f3e
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/50579
Reviewed-by: Per PERSSON <per.xb.persson@stericsson.com>
Reviewed-by: QABUILD
Reviewed-by: Jimmy RUBIN <jimmy.rubin@stericsson.com>
---
 drivers/video/mcde/mcde_hw.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index 535e719075d..9d3ddd48a31 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -3143,6 +3143,9 @@ int mcde_chnl_update(struct mcde_chnl_state *chnl,
 	if (chnl->regs.roten && !chnl->esram_is_enabled) {
 		WARN_ON_ONCE(regulator_enable(regulator_esram_epod));
 		chnl->esram_is_enabled = true;
+	} else if (!chnl->regs.roten && chnl->esram_is_enabled) {
+		WARN_ON_ONCE(regulator_disable(regulator_esram_epod));
+		chnl->esram_is_enabled = false;
 	}
 
 	ret = _mcde_chnl_update(chnl, update_area, tripple_buffer);
-- 
cgit v1.2.3


From fdd0c051aff401925d7e6a7118931245052d434a Mon Sep 17 00:00:00 2001
From: Per-Daniel Olsson <per-daniel.olsson@stericsson.com>
Date: Fri, 10 Feb 2012 18:30:04 +0100
Subject: misc: compdev: Updated for new kernel composition

The compdev device has been updated for the new B2R2/MCDE composition
in the kernel. All B2R2 work will now be done in the kernel. A callback
interface has been added for potential listeners. Such listeners could
for example be cloning for external devices.

ST-Ericsson Linux next: NA
ST-Ericsson ID: 404691
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I0c059fd6ef889356b1de77684c30721ce6b3ebbf
Signed-off-by: Per-Daniel Olsson <per-daniel.olsson@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/49974
Reviewed-by: QATOOLS
Reviewed-by: Robert FEKETE <robert.fekete@stericsson.com>
Reviewed-by: QABUILD
---
 arch/arm/mach-ux500/board-mop500-mcde.c |    2 +-
 drivers/misc/compdev/Makefile           |    7 +-
 drivers/misc/compdev/compdev.c          | 1126 +++++++++++++++++++++++++++----
 include/linux/compdev.h                 |   88 ++-
 4 files changed, 1058 insertions(+), 165 deletions(-)

diff --git a/arch/arm/mach-ux500/board-mop500-mcde.c b/arch/arm/mach-ux500/board-mop500-mcde.c
index 5400db27b7e..e60842c86e8 100644
--- a/arch/arm/mach-ux500/board-mop500-mcde.c
+++ b/arch/arm/mach-ux500/board-mop500-mcde.c
@@ -393,7 +393,7 @@ static int display_postregistered_callback(struct notifier_block *nb,
 #ifdef CONFIG_COMPDEV
 	mfb = to_mcde_fb(fbi);
 	/* Create a compdev overlay for this display */
-	if (compdev_create(ddev, mfb->ovlys[0]) < 0) {
+	if (compdev_create(ddev, mfb->ovlys[0], true) < 0) {
 		dev_warn(&ddev->dev,
 			"Failed to create compdev for display %s\n",
 					ddev->name);
diff --git a/drivers/misc/compdev/Makefile b/drivers/misc/compdev/Makefile
index 8d5cd14dc36..b8385848712 100644
--- a/drivers/misc/compdev/Makefile
+++ b/drivers/misc/compdev/Makefile
@@ -1 +1,6 @@
-obj-$(CONFIG_DISPDEV) += compdev.o
+obj-$(CONFIG_COMPDEV) += compdev.o
+
+ifdef CONFIG_COMPDEV_DEBUG
+EXTRA_CFLAGS += -DDEBUG
+endif
+
diff --git a/drivers/misc/compdev/compdev.c b/drivers/misc/compdev/compdev.c
index 4810e20d4cd..e0c34879f65 100644
--- a/drivers/misc/compdev/compdev.c
+++ b/drivers/misc/compdev/compdev.c
@@ -22,13 +22,22 @@
 #include <linux/list.h>
 #include <linux/mutex.h>
 #include <linux/ioctl.h>
+#include <linux/sched.h>
 
 #include <linux/compdev.h>
 #include <linux/hwmem.h>
+#include <linux/mm.h>
 #include <video/mcde_dss.h>
+#include <video/b2r2_blt.h>
+#include <linux/workqueue.h>
+#include <linux/completion.h>
+
+#define BUFFER_CACHE_DEPTH 2
+#define NUM_COMPDEV_BUFS 2
 
 static LIST_HEAD(dev_list);
 static DEFINE_MUTEX(dev_list_lock);
+static int dev_counter;
 
 struct compdev_buffer {
 	struct hwmem_alloc *alloc;
@@ -37,19 +46,76 @@ struct compdev_buffer {
 	u32 paddr; /* if pinned */
 };
 
-struct compdev {
-	bool open;
-	struct mutex lock;
-	struct miscdevice mdev;
-	struct list_head list;
+struct compdev_img_internal {
+	struct compdev_img img;
+	u32 ref_count;
+};
+
+struct compdev_blt_work {
+	struct work_struct work;
+	struct compdev_img *src_img;
+	struct compdev_img_internal *dst_img;
+	int blt_handle;
+	bool mcde_rotation;
+	struct device *dev;
+};
+
+struct compdev_post_callback_work {
+	struct work_struct work;
+	struct compdev_img *img;
+	post_buffer_callback pb_cb;
+	void *cb_data;
+	struct device *dev;
+};
+
+struct buffer_cache_context {
+	struct compdev_img_internal
+		*img[BUFFER_CACHE_DEPTH];
+	u8 index;
+	u8 unused_counter;
+	struct device *dev;
+};
+
+struct dss_context {
+	struct device *dev;
 	struct mcde_display_device *ddev;
 	struct mcde_overlay *ovly[NUM_COMPDEV_BUFS];
 	struct compdev_buffer ovly_buffer[NUM_COMPDEV_BUFS];
 	struct compdev_size phy_size;
 	enum mcde_display_rotation display_rotation;
 	enum compdev_rotation current_buffer_rotation;
+	int blt_handle;
+	u8 temp_img_count;
+	struct compdev_img_internal *temp_img[NUM_COMPDEV_BUFS];
+	struct buffer_cache_context cache_ctx;
+};
+
+struct compdev {
+	struct mutex lock;
+	struct miscdevice mdev;
+	struct device *dev;
+	struct list_head list;
+	struct dss_context dss_ctx;
+	u16 ref_count;
+	struct workqueue_struct *worker_thread;
+	int dev_index;
+	post_buffer_callback pb_cb;
+	post_scene_info_callback si_cb;
+	struct compdev_scene_info s_info;
+	u8 sync_count;
+	u8 image_count;
+	struct compdev_img *images[NUM_COMPDEV_BUFS];
+	struct completion fence;
+	void *cb_data;
+	bool mcde_rotation;
 };
 
+static struct compdev *compdevs[MAX_NBR_OF_COMPDEVS];
+
+static int compdev_post_buffers_dss(struct dss_context *dss_ctx,
+		struct compdev_img *img1, struct compdev_img *img2);
+
+
 static int compdev_open(struct inode *inode, struct file *file)
 {
 	struct compdev *cd = NULL;
@@ -63,18 +129,8 @@ static int compdev_open(struct inode *inode, struct file *file)
 		mutex_unlock(&dev_list_lock);
 		return -ENODEV;
 	}
-
-	if (cd->open) {
-		mutex_unlock(&dev_list_lock);
-		return -EBUSY;
-	}
-
-	cd->open = true;
-
 	mutex_unlock(&dev_list_lock);
-
 	file->private_data = cd;
-
 	return 0;
 }
 
@@ -106,18 +162,17 @@ static int compdev_release(struct inode *inode, struct file *file)
 		return -ENODEV;
 
 	for (i = 0; i < NUM_COMPDEV_BUFS; i++) {
-		disable_overlay(cd->ovly[i]);
-		if (cd->ovly_buffer[i].paddr &&
-				cd->ovly_buffer[i].type ==
+		disable_overlay(cd->dss_ctx.ovly[i]);
+		if (cd->dss_ctx.ovly_buffer[i].paddr &&
+				cd->dss_ctx.ovly_buffer[i].type ==
 				COMPDEV_PTR_HWMEM_BUF_NAME_OFFSET)
-			hwmem_unpin(cd->ovly_buffer[i].alloc);
+			hwmem_unpin(cd->dss_ctx.ovly_buffer[i].alloc);
 
-		cd->ovly_buffer[i].alloc = NULL;
-		cd->ovly_buffer[i].size = 0;
-		cd->ovly_buffer[i].paddr = 0;
+		cd->dss_ctx.ovly_buffer[i].alloc = NULL;
+		cd->dss_ctx.ovly_buffer[i].size = 0;
+		cd->dss_ctx.ovly_buffer[i].paddr = 0;
 	}
 
-	cd->open = false;
 	return 0;
 }
 
@@ -142,7 +197,7 @@ static int compdev_setup_ovly(struct compdev_img *img,
 		struct compdev_buffer *buffer,
 		struct mcde_overlay *ovly,
 		int z_order,
-		struct compdev *cd)
+		struct dss_context *dss_ctx)
 {
 	int ret = 0;
 	enum hwmem_mem_type memtype;
@@ -157,7 +212,7 @@ static int compdev_setup_ovly(struct compdev_img *img,
 		buffer->alloc = hwmem_resolve_by_name(img->buf.hwmem_buf_name);
 		if (IS_ERR(buffer->alloc)) {
 			ret = PTR_ERR(buffer->alloc);
-			dev_warn(cd->mdev.this_device,
+			dev_warn(dss_ctx->dev,
 				"HWMEM resolve failed, %d\n", ret);
 			goto resolve_failed;
 		}
@@ -168,13 +223,13 @@ static int compdev_setup_ovly(struct compdev_img *img,
 		if (!(access & HWMEM_ACCESS_READ) ||
 				memtype != HWMEM_MEM_CONTIGUOUS_SYS) {
 			ret = -EACCES;
-			dev_warn(cd->mdev.this_device,
+			dev_warn(dss_ctx->dev,
 				"Invalid_mem overlay, %d\n", ret);
 			goto invalid_mem;
 		}
 		ret = hwmem_pin(buffer->alloc, &mem_chunk, &mem_chunk_length);
 		if (ret) {
-			dev_warn(cd->mdev.this_device,
+			dev_warn(dss_ctx->dev,
 				"Pin failed, %d\n", ret);
 			goto pin_failed;
 		}
@@ -183,7 +238,7 @@ static int compdev_setup_ovly(struct compdev_img *img,
 		ret = hwmem_set_domain(buffer->alloc, HWMEM_ACCESS_READ,
 			HWMEM_DOMAIN_SYNC, &rgn);
 		if (ret)
-			dev_warn(cd->mdev.this_device,
+			dev_warn(dss_ctx->dev,
 				"Set domain failed, %d\n", ret);
 
 		buffer->paddr = mem_chunk.paddr;
@@ -205,9 +260,10 @@ static int compdev_setup_ovly(struct compdev_img *img,
 	info.h = img->dst_rect.height;
 	info.dirty.x = 0;
 	info.dirty.y = 0;
-	info.dirty.w = cd->phy_size.width;
-	info.dirty.h = cd->phy_size.height;
+	info.dirty.w = img->dst_rect.width;
+	info.dirty.h = img->dst_rect.height;
 	info.paddr = buffer->paddr;
+
 	mcde_dss_apply_overlay(ovly, &info);
 	return ret;
 
@@ -221,120 +277,699 @@ resolve_failed:
 	return ret;
 }
 
-static int compdev_update_rotation(struct compdev *cd, enum compdev_rotation rotation)
+static int compdev_update_rotation(struct dss_context *dss_ctx,
+		enum compdev_rotation rotation)
 {
 	/* Set video mode */
 	struct mcde_video_mode vmode;
 	int ret = 0;
 
 	memset(&vmode, 0, sizeof(struct mcde_video_mode));
-	mcde_dss_get_video_mode(cd->ddev, &vmode);
-	if ((cd->display_rotation + rotation) % 180) {
-		vmode.xres = cd->phy_size.height;
-		vmode.yres = cd->phy_size.width;
+	mcde_dss_get_video_mode(dss_ctx->ddev, &vmode);
+	if ((dss_ctx->display_rotation + rotation) % 180) {
+		vmode.xres = dss_ctx->phy_size.height;
+		vmode.yres = dss_ctx->phy_size.width;
 	} else {
-		vmode.xres = cd->phy_size.width;
-		vmode.yres = cd->phy_size.height;
+		vmode.xres = dss_ctx->phy_size.width;
+		vmode.yres = dss_ctx->phy_size.height;
 	}
 
-	ret = mcde_dss_set_video_mode(cd->ddev, &vmode);
+	/* Set rotation */
+	ret = mcde_dss_set_rotation(dss_ctx->ddev,
+			(dss_ctx->display_rotation + rotation) % 360);
 	if (ret != 0)
 		goto exit;
 
-	/* Set rotation */
-	ret = mcde_dss_set_rotation(cd->ddev, (cd->display_rotation + rotation) % 360);
+	ret = mcde_dss_set_video_mode(dss_ctx->ddev, &vmode);
 	if (ret != 0)
 		goto exit;
 
+
 	/* Apply */
-	ret = mcde_dss_apply_channel(cd->ddev);
+	ret = mcde_dss_apply_channel(dss_ctx->ddev);
 exit:
 	return ret;
 }
 
-static int release_prev_frame(struct compdev *cd)
+static int release_prev_frame(struct dss_context *dss_ctx)
 {
 	int ret = 0;
 	int i;
 
 	/* Handle unpin of previous buffers */
 	for (i = 0; i < NUM_COMPDEV_BUFS; i++) {
-		if (cd->ovly_buffer[i].type ==
+		if (dss_ctx->ovly_buffer[i].type ==
 				COMPDEV_PTR_HWMEM_BUF_NAME_OFFSET &&
-				cd->ovly_buffer[i].paddr != 0) {
-			hwmem_unpin(cd->ovly_buffer[i].alloc);
-			hwmem_release(cd->ovly_buffer[i].alloc);
+				dss_ctx->ovly_buffer[i].paddr != 0) {
+			hwmem_unpin(dss_ctx->ovly_buffer[i].alloc);
+			hwmem_release(dss_ctx->ovly_buffer[i].alloc);
 		}
-		cd->ovly_buffer[i].alloc = NULL;
-		cd->ovly_buffer[i].size = 0;
-		cd->ovly_buffer[i].paddr = 0;
+		dss_ctx->ovly_buffer[i].alloc = NULL;
+		dss_ctx->ovly_buffer[i].size = 0;
+		dss_ctx->ovly_buffer[i].paddr = 0;
 	}
 	return ret;
 
 }
 
-static void check_buffer(struct compdev *cd,
-		struct compdev_buffer *overlay_buffer,
-		struct compdev_buf *posted_buffer)
+static enum b2r2_blt_fmt compdev_to_blt_format(enum compdev_fmt fmt)
+{
+	switch (fmt) {
+	case COMPDEV_FMT_RGBA8888:
+		return B2R2_BLT_FMT_32_BIT_ABGR8888;
+	case COMPDEV_FMT_RGB888:
+		return B2R2_BLT_FMT_24_BIT_RGB888;
+	case COMPDEV_FMT_RGB565:
+		return B2R2_BLT_FMT_16_BIT_RGB565;
+	case COMPDEV_FMT_YUV422:
+		return B2R2_BLT_FMT_CB_Y_CR_Y;
+	case COMPDEV_FMT_YCBCR42XMBN:
+		return B2R2_BLT_FMT_YUV420_PACKED_SEMIPLANAR_MB_STE;
+	case COMPDEV_FMT_YUV420_SP:
+		return B2R2_BLT_FMT_YUV420_PACKED_SEMI_PLANAR;
+	case COMPDEV_FMT_YVU420_SP:
+		return B2R2_BLT_FMT_YVU420_PACKED_SEMI_PLANAR;
+	case COMPDEV_FMT_YUV420_P:
+		return B2R2_BLT_FMT_YUV420_PACKED_PLANAR;
+	default:
+		return B2R2_BLT_FMT_UNUSED;
+	}
+}
+
+static enum b2r2_blt_transform to_blt_transform
+					(enum compdev_rotation compdev_rot)
+{
+	switch (compdev_rot) {
+	case COMPDEV_ROT_0:
+		return B2R2_BLT_TRANSFORM_NONE;
+	case COMPDEV_ROT_90_CCW:
+		return B2R2_BLT_TRANSFORM_CCW_ROT_90;
+	case COMPDEV_ROT_180:
+		return B2R2_BLT_TRANSFORM_CCW_ROT_180;
+	case COMPDEV_ROT_270_CCW:
+		return B2R2_BLT_TRANSFORM_CCW_ROT_90;
+	default:
+		return B2R2_BLT_TRANSFORM_NONE;
+	}
+}
+
+static u32 get_stride(u32 width, enum compdev_fmt fmt)
+{
+	u32 stride = 0;
+	switch (fmt) {
+	case COMPDEV_FMT_RGB565:
+		stride = width * 2;
+		break;
+	case COMPDEV_FMT_RGB888:
+		stride = width * 3;
+		break;
+	case COMPDEV_FMT_RGBX8888:
+		stride = width * 4;
+		break;
+	case COMPDEV_FMT_RGBA8888:
+		stride = width * 4;
+		break;
+	case COMPDEV_FMT_YUV422:
+		stride = width * 2;
+		break;
+	case COMPDEV_FMT_YCBCR42XMBN:
+	case COMPDEV_FMT_YUV420_SP:
+	case COMPDEV_FMT_YVU420_SP:
+	case COMPDEV_FMT_YUV420_P:
+		stride = width;
+		break;
+	}
+
+	/* The display controller requires 8 byte aligned strides */
+	if (stride % 8)
+		stride += 8 - (stride % 8);
+
+	return stride;
+}
+
+static int alloc_comp_internal_img(enum compdev_fmt fmt,
+		u16 width, u16 height, struct compdev_img_internal **img_pp)
+{
+	struct hwmem_alloc *alloc;
+	int name;
+	u32 size;
+	u32 stride;
+	struct compdev_img_internal *img;
+
+	stride = get_stride(width, fmt);
+	size = stride * height;
+	size = PAGE_ALIGN(size);
+
+	img = kzalloc(sizeof(struct compdev_img_internal), GFP_KERNEL);
+
+	if (!img)
+		return -ENOMEM;
+
+	alloc = hwmem_alloc(size, HWMEM_ALLOC_HINT_WRITE_COMBINE |
+			HWMEM_ALLOC_HINT_UNCACHED,
+			(HWMEM_ACCESS_READ  | HWMEM_ACCESS_WRITE |
+			HWMEM_ACCESS_IMPORT),
+			HWMEM_MEM_CONTIGUOUS_SYS);
+
+	if (IS_ERR(alloc)) {
+		kfree(img);
+		img = NULL;
+		return PTR_ERR(alloc);
+	}
+
+	name = hwmem_get_name(alloc);
+	if (name < 0) {
+		kfree(img);
+		img = NULL;
+		hwmem_release(alloc);
+		return name;
+	}
+
+	img->img.height = height;
+	img->img.width = width;
+	img->img.fmt = fmt;
+	img->img.pitch = stride;
+	img->img.buf.hwmem_buf_name = name;
+	img->img.buf.type = COMPDEV_PTR_HWMEM_BUF_NAME_OFFSET;
+	img->img.buf.offset = 0;
+	img->img.buf.len = size;
+
+	img->ref_count = 1;
+
+	*img_pp = img;
+
+	return 0;
+}
+
+static void free_comp_img_buf(struct compdev_img_internal *img,
+		struct device *dev)
 {
-	if (overlay_buffer->type == COMPDEV_PTR_PHYSICAL &&
-			posted_buffer->type == COMPDEV_PTR_PHYSICAL &&
-			overlay_buffer->paddr == posted_buffer->offset &&
-			overlay_buffer->paddr != 0)
-		dev_warn(cd->mdev.this_device, "The same FB pointer!!\n");
+	dev_dbg(dev, "%s\n", __func__);
+
+	if (img != NULL && img->ref_count) {
+		img->ref_count--;
+		if (img->ref_count == 0) {
+			struct hwmem_alloc *alloc;
+			if (img->img.buf.hwmem_buf_name > 0) {
+				alloc = hwmem_resolve_by_name(
+						img->img.buf.hwmem_buf_name);
+				if (IS_ERR(alloc)) {
+					dev_err(dev, "%s: Error getting Alloc "
+						"from HWMEM\n", __func__);
+					return;
+				}
+				/* Double release needed */
+				hwmem_release(alloc);
+				hwmem_release(alloc);
+			}
+			kfree(img);
+		}
+	}
 }
 
-static int compdev_post_buffers(struct compdev *cd,
-		struct compdev_post_buffers_req *req)
+struct compdev_img_internal *compdev_buffer_cache_get_image(
+		struct buffer_cache_context *cache_ctx, enum compdev_fmt fmt,
+		u16 width, u16 height)
+{
+	int i;
+	struct compdev_img_internal *img = NULL;
+
+	dev_dbg(cache_ctx->dev, "%s\n", __func__);
+
+	/* First check for a cache hit */
+	if (cache_ctx->unused_counter > 0) {
+		u8 active_index = cache_ctx->index;
+		struct compdev_img_internal *temp =
+				cache_ctx->img[active_index];
+		if (temp != NULL && temp->img.fmt == fmt &&
+				temp->img.width == width &&
+				temp->img.height == height) {
+			img = temp;
+			cache_ctx->unused_counter = 0;
+		}
+	}
+	/* Check if there was a cache hit */
+	if (img == NULL) {
+		/* Create new buffers and release old */
+		for (i = 0; i < BUFFER_CACHE_DEPTH; i++) {
+			if (cache_ctx->img[i]) {
+				free_comp_img_buf(cache_ctx->img[i],
+						cache_ctx->dev);
+				cache_ctx->img[i] = NULL;
+			}
+			cache_ctx->index = 0;
+			if (alloc_comp_internal_img(fmt, width, height,
+					&cache_ctx->img[i]))
+				dev_err(cache_ctx->dev,
+						"%s: Allocation error\n",
+						__func__);
+		}
+		img = cache_ctx->img[0];
+	}
+
+	if (img != NULL) {
+		img->ref_count++;
+		cache_ctx->unused_counter = 0;
+		cache_ctx->index++;
+		if (cache_ctx->index >= BUFFER_CACHE_DEPTH)
+			cache_ctx->index = 0;
+	}
+
+	return img;
+}
+
+static void compdev_buffer_cache_mark_frame
+				(struct buffer_cache_context *cache_ctx)
+{
+	if (cache_ctx->unused_counter < 2)
+		cache_ctx->unused_counter++;
+	if (cache_ctx->unused_counter == 2) {
+		int i;
+		for (i = 0; i < BUFFER_CACHE_DEPTH; i++) {
+			if (cache_ctx->img[i]) {
+				free_comp_img_buf(cache_ctx->img[i],
+						cache_ctx->dev);
+				cache_ctx->img[i] = NULL;
+			}
+		}
+	}
+}
+
+static bool check_hw_format(enum compdev_fmt fmt)
+{
+	if (fmt == COMPDEV_FMT_RGB565 ||
+			fmt == COMPDEV_FMT_RGB888 ||
+			fmt == COMPDEV_FMT_RGBA8888 ||
+			fmt == COMPDEV_FMT_RGBX8888 ||
+			fmt == COMPDEV_FMT_YUV422)
+		return true;
+	else
+		return false;
+}
+
+static enum compdev_fmt find_compatible_fmt(enum compdev_fmt fmt, bool rotation)
+{
+	if (!rotation) {
+		switch (fmt) {
+		case COMPDEV_FMT_RGB565:
+		case COMPDEV_FMT_RGB888:
+		case COMPDEV_FMT_RGBA8888:
+		case COMPDEV_FMT_RGBX8888:
+			return fmt;
+		case COMPDEV_FMT_YUV422:
+		case COMPDEV_FMT_YCBCR42XMBN:
+		case COMPDEV_FMT_YUV420_SP:
+		case COMPDEV_FMT_YVU420_SP:
+		case COMPDEV_FMT_YUV420_P:
+			return COMPDEV_FMT_YUV422;
+		default:
+			return COMPDEV_FMT_RGBA8888;
+		}
+	} else {
+		switch (fmt) {
+		case COMPDEV_FMT_RGB565:
+		case COMPDEV_FMT_RGB888:
+		case COMPDEV_FMT_RGBA8888:
+		case COMPDEV_FMT_RGBX8888:
+			return fmt;
+		case COMPDEV_FMT_YUV422:
+		case COMPDEV_FMT_YCBCR42XMBN:
+		case COMPDEV_FMT_YUV420_SP:
+		case COMPDEV_FMT_YVU420_SP:
+		case COMPDEV_FMT_YUV420_P:
+			return COMPDEV_FMT_RGB888;
+		default:
+			return COMPDEV_FMT_RGBA8888;
+		}
+	}
+}
+
+static void compdev_callback_worker_function(struct work_struct *work)
+{
+	struct compdev_post_callback_work *cb_work =
+			(struct compdev_post_callback_work *)work;
+
+	if (cb_work->pb_cb != NULL)
+		cb_work->pb_cb(cb_work->cb_data, cb_work->img);
+}
+static void compdev_blt_worker_function(struct work_struct *work)
+{
+	struct compdev_blt_work *blt_work = (struct compdev_blt_work *)work;
+	struct compdev_img *src_img;
+	struct compdev_img *dst_img;
+	struct b2r2_blt_req req;
+	int req_id;
+
+	dev_dbg(blt_work->dev, "%s\n", __func__);
+
+	src_img = blt_work->src_img;
+	dst_img = &blt_work->dst_img->img;
+
+	memset(&req, 0, sizeof(req));
+	req.size = sizeof(req);
+
+	if (src_img->buf.type == COMPDEV_PTR_PHYSICAL) {
+		req.src_img.buf.type = B2R2_BLT_PTR_PHYSICAL;
+		req.src_img.buf.fd = src_img->buf.fd;
+	} else {
+		struct hwmem_alloc *alloc;
+
+		req.src_img.buf.type = B2R2_BLT_PTR_HWMEM_BUF_NAME_OFFSET;
+		req.src_img.buf.hwmem_buf_name = src_img->buf.hwmem_buf_name;
+
+		alloc = hwmem_resolve_by_name(src_img->buf.hwmem_buf_name);
+		if (IS_ERR(alloc)) {
+			dev_warn(blt_work->dev,
+				"HWMEM resolve failed\n");
+		}
+		hwmem_set_access(alloc,
+				HWMEM_ACCESS_READ | HWMEM_ACCESS_IMPORT,
+				task_tgid_nr(current));
+		hwmem_release(alloc);
+	}
+	req.src_img.pitch = src_img->pitch;
+	req.src_img.buf.offset = src_img->buf.offset;
+	req.src_img.buf.len = src_img->buf.len;
+	req.src_img.fmt = compdev_to_blt_format(src_img->fmt);
+	req.src_img.width = src_img->width;
+	req.src_img.height = src_img->height;
+
+	req.src_rect.x = src_img->src_rect.x;
+	req.src_rect.y = src_img->src_rect.y;
+	req.src_rect.width = src_img->src_rect.width;
+	req.src_rect.height = src_img->src_rect.height;
+
+	if (dst_img->buf.type == COMPDEV_PTR_PHYSICAL) {
+		req.dst_img.buf.type = B2R2_BLT_PTR_PHYSICAL;
+		req.dst_img.buf.fd = dst_img->buf.fd;
+	} else {
+		req.dst_img.buf.type = B2R2_BLT_PTR_HWMEM_BUF_NAME_OFFSET;
+		req.dst_img.buf.hwmem_buf_name = dst_img->buf.hwmem_buf_name;
+	}
+	req.dst_img.pitch = dst_img->pitch;
+	req.dst_img.buf.offset = dst_img->buf.offset;
+	req.dst_img.buf.len = dst_img->buf.len;
+	req.dst_img.fmt = compdev_to_blt_format(dst_img->fmt);
+	req.dst_img.width = dst_img->width;
+	req.dst_img.height = dst_img->height;
+
+	if (blt_work->mcde_rotation)
+		req.transform = B2R2_BLT_TRANSFORM_NONE;
+	else
+		req.transform = to_blt_transform(src_img->rotation);
+	req.dst_rect.x = 0;
+	req.dst_rect.y = 0;
+	req.dst_rect.width = src_img->dst_rect.width;
+	req.dst_rect.height = src_img->dst_rect.height;
+
+	req.global_alpha = 0xff;
+	req.flags = B2R2_BLT_FLAG_DITHER;
+
+	req_id = b2r2_blt_request(blt_work->blt_handle, &req);
+
+	if (b2r2_blt_synch(blt_work->blt_handle, req_id) < 0) {
+		dev_err(blt_work->dev,
+				"%s: Could not perform b2r2_blt_synch",
+				__func__);
+	}
+
+	dst_img->src_rect.x = 0;
+	dst_img->src_rect.x = 0;
+	dst_img->src_rect.width = dst_img->width;
+	dst_img->src_rect.height = dst_img->height;
+
+	dst_img->dst_rect.x = src_img->dst_rect.x;
+	dst_img->dst_rect.y = src_img->dst_rect.y;
+	dst_img->dst_rect.width = src_img->dst_rect.width;
+	dst_img->dst_rect.height = src_img->dst_rect.height;
+
+	dst_img->rotation = src_img->rotation;
+}
+
+static int compdev_post_buffer_locked(struct compdev *cd,
+		struct compdev_img *src_img)
 {
 	int ret = 0;
-	int i, j;
+	int i;
+	bool transform_needed = false;
+	struct compdev_img *resulting_img;
+	struct compdev_blt_work blt_work;
+	struct compdev_post_callback_work cb_work;
+	bool callback_work = false;
+	bool bypass_case = false;
+
+	dev_dbg(cd->dev, "%s\n", __func__);
+
+	/* Free potential temp buffers */
+	for (i = 0; i < cd->dss_ctx.temp_img_count; i++)
+		free_comp_img_buf(cd->dss_ctx.temp_img[i], cd->dev);
+	cd->dss_ctx.temp_img_count = 0;
+
+	/* Check for bypass images */
+	if (src_img->flags & COMPDEV_BYPASS_FLAG)
+		bypass_case = true;
+
+	/* Handle callback */
+	if (cd->pb_cb != NULL) {
+		callback_work = true;
+		INIT_WORK((struct work_struct *)&cb_work,
+				compdev_callback_worker_function);
+		cb_work.img = src_img;
+		cb_work.pb_cb = cd->pb_cb;
+		cb_work.cb_data = cd->cb_data;
+		cb_work.dev = cd->dev;
+		queue_work(cd->worker_thread, (struct work_struct *)&cb_work);
+	}
 
-	for (i = 0; i < NUM_COMPDEV_BUFS; i++)
-		for (j = 0; j < NUM_COMPDEV_BUFS; j++)
-			check_buffer(cd, &cd->ovly_buffer[i],
-				&req->img_buffers[j].buf);
+	if (!bypass_case) {
+		/* Determine if transform is needed */
+		/* First check scaling */
+		if ((src_img->rotation == COMPDEV_ROT_0 ||
+			src_img->rotation == COMPDEV_ROT_180) &&
+			(src_img->src_rect.width != src_img->dst_rect.width ||
+			src_img->src_rect.height != src_img->dst_rect.height))
+			transform_needed = true;
+		else if ((src_img->rotation == COMPDEV_ROT_90_CCW ||
+			src_img->rotation == COMPDEV_ROT_270_CCW) &&
+			(src_img->src_rect.width != src_img->dst_rect.height ||
+			src_img->src_rect.height != src_img->dst_rect.width))
+			transform_needed = true;
+
+		if (!transform_needed && check_hw_format(src_img->fmt) == false)
+			transform_needed = true;
+
+		if (transform_needed) {
+			u16 width = 0;
+			u16 height = 0;
+			enum compdev_fmt fmt;
+
+			INIT_WORK((struct work_struct *)&blt_work,
+					compdev_blt_worker_function);
+
+			if (cd->dss_ctx.blt_handle == 0) {
+				dev_dbg(cd->dev, "%s: B2R2 opened\n", __func__);
+				cd->dss_ctx.blt_handle = b2r2_blt_open();
+				if (cd->dss_ctx.blt_handle < 0) {
+					dev_warn(cd->dev,
+						"%s(%d): Failed to "
+						"open b2r2 device\n",
+						__func__, __LINE__);
+				}
+			}
+			blt_work.blt_handle = cd->dss_ctx.blt_handle;
+			blt_work.src_img = src_img;
+			blt_work.mcde_rotation = cd->mcde_rotation;
 
-	/* Unpin the previous frame */
-	release_prev_frame(cd);
+			width = src_img->dst_rect.width;
+			height = src_img->dst_rect.height;
+
+			fmt = find_compatible_fmt(src_img->fmt,
+					(!cd->mcde_rotation) &&
+					(src_img->rotation != COMPDEV_ROT_0));
+
+			blt_work.dst_img = compdev_buffer_cache_get_image
+					(&cd->dss_ctx.cache_ctx,
+							fmt, width, height);
+
+			blt_work.dst_img->img.flags = src_img->flags;
+			blt_work.dev = cd->dev;
+
+			queue_work(cd->worker_thread,
+					(struct work_struct *)&blt_work);
+			flush_work_sync((struct work_struct *)&blt_work);
+
+			resulting_img = &blt_work.dst_img->img;
 
-	/* Validate buffer count */
-	if (req->buffer_count > NUM_COMPDEV_BUFS || req->buffer_count == 0) {
-		dev_warn(cd->mdev.this_device,
-			"Illegal buffer count, will be clamped to %d\n",
-			NUM_COMPDEV_BUFS);
-		req->buffer_count = NUM_COMPDEV_BUFS;
+			cd->dss_ctx.temp_img[cd->dss_ctx.temp_img_count] =
+					blt_work.dst_img;
+			cd->dss_ctx.temp_img_count++;
+
+		} else {
+		    resulting_img = src_img;
+		}
+
+		if (!cd->mcde_rotation)
+			resulting_img->rotation = COMPDEV_ROT_0;
+
+		cd->images[cd->image_count] = resulting_img;
+		cd->image_count++;
+
+		/* make sure that a potential callback has returned */
+		if (callback_work)
+			flush_work_sync((struct work_struct *)&cb_work);
+
+		if (cd->sync_count > 1) {
+			cd->sync_count--;
+			mutex_unlock(&cd->lock);
+			/* Wait for fence */
+			wait_for_completion(&cd->fence);
+			mutex_lock(&cd->lock);
+		} else {
+			struct compdev_img *img1 = NULL;
+			struct compdev_img *img2 = NULL;
+
+			if (cd->sync_count)
+				cd->sync_count--;
+
+			img1 = cd->images[0];
+			if (cd->image_count)
+				img2 = cd->images[1];
+
+			/* Do the refresh */
+			compdev_post_buffers_dss(&cd->dss_ctx, img1, img2);
+			compdev_buffer_cache_mark_frame
+						(&cd->dss_ctx.cache_ctx);
+
+			if (cd->s_info.img_count > 1) {
+				/* Releasing fence */
+				complete(&cd->fence);
+			}
+
+			cd->sync_count = 0;
+			cd->image_count = 0;
+			cd->images[0] = NULL;
+			cd->images[1] = NULL;
+		}
+	} else {
+		/* make sure that a potential callback has returned */
+		if (callback_work)
+			flush_work_sync((struct work_struct *)&cb_work);
 	}
 
+	return ret;
+}
+
+static int compdev_post_buffers_dss(struct dss_context *dss_ctx,
+		struct compdev_img *img1, struct compdev_img *img2)
+{
+	int ret = 0;
+	int i = 0;
+
+	struct compdev_img *fb_img = NULL;
+	struct compdev_img *ovly_img = NULL;
+
+	/* Unpin the previous frame */
+	release_prev_frame(dss_ctx);
+
 	/* Set channel rotation */
-	if (req->buffer_count > 0 &&
-			(cd->current_buffer_rotation != req->rotation)) {
-		if (compdev_update_rotation(cd, req->rotation) != 0)
-			dev_warn(cd->mdev.this_device,
-				"Failed to update MCDE rotation (req->rotation = %d), %d\n",
-				req->rotation, ret);
+	if (img1 != NULL &&
+			(dss_ctx->current_buffer_rotation != img1->rotation)) {
+		if (compdev_update_rotation(dss_ctx, img1->rotation) != 0)
+			dev_warn(dss_ctx->dev,
+				"Failed to update MCDE rotation "
+				"(img1->rotation = %d), %d\n",
+				img1->rotation, ret);
 		else
-			cd->current_buffer_rotation = req->rotation;
+			dss_ctx->current_buffer_rotation = img1->rotation;
 	}
 
+	if ((img1 != NULL) && (img1->flags & COMPDEV_OVERLAY_FLAG))
+		ovly_img = img1;
+	else if (img1 != NULL)
+		fb_img = img1;
+
+
+	if ((img2 != NULL) && (img2->flags & COMPDEV_OVERLAY_FLAG))
+		ovly_img = img2;
+	else if (img2 != NULL)
+		fb_img = img2;
+
 	/* Handle buffers */
-	for (i = 0; i < req->buffer_count; i++) {
-		int overlay_index = req->buffer_count - i - 1;
-		ret = compdev_setup_ovly(&req->img_buffers[i],
-			&cd->ovly_buffer[i], cd->ovly[overlay_index], i, cd);
+	if (fb_img != NULL) {
+		ret = compdev_setup_ovly(fb_img,
+			&dss_ctx->ovly_buffer[i], dss_ctx->ovly[0], 1, dss_ctx);
 		if (ret)
-			dev_warn(cd->mdev.this_device,
-				"Failed to setup overlay[%d], %d\n", i, ret);
+			dev_warn(dss_ctx->dev,
+				"Failed to setup overlay[%d], %d\n", 0, ret);
+		i++;
+	} else {
+		disable_overlay(dss_ctx->ovly[0]);
 	}
 
-	for (i = NUM_COMPDEV_BUFS; i > req->buffer_count; i--)
-		disable_overlay(cd->ovly[i-1]);
+
+	if (ovly_img != NULL) {
+		ret = compdev_setup_ovly(ovly_img,
+			&dss_ctx->ovly_buffer[i], dss_ctx->ovly[1], 0, dss_ctx);
+		if (ret)
+			dev_warn(dss_ctx->dev,
+				"Failed to setup overlay[%d], %d\n", 1, ret);
+	} else {
+		disable_overlay(dss_ctx->ovly[1]);
+	}
 
 	/* Do the display update */
-	if (req->buffer_count > 0)
-		mcde_dss_update_overlay(cd->ovly[0], false);
-	else
-		dev_warn(cd->mdev.this_device, "No overlays requested\n");
+	mcde_dss_update_overlay(dss_ctx->ovly[0], true);
+
+	return ret;
+}
+
+static int compdev_post_scene_info_locked(struct compdev *cd,
+				struct compdev_scene_info *s_info)
+{
+	int ret = 0;
+
+	dev_dbg(cd->dev, "%s\n", __func__);
+
+	cd->s_info = *s_info;
+	cd->sync_count = cd->s_info.img_count;
+
+	/* always complete the fence in case someone is hanging incorrectly. */
+	complete(&cd->fence);
+	init_completion(&cd->fence);
+
+	/* Handle callback */
+	if (cd->si_cb != NULL) {
+		mutex_unlock(&cd->lock);
+		cd->si_cb(cd->cb_data, s_info);
+		mutex_lock(&cd->lock);
+	}
+	return ret;
+}
+
+
+static int compdev_get_size_locked(struct dss_context *dss_ctx,
+					struct compdev_size *size)
+{
+	int ret = 0;
+	if ((dss_ctx->display_rotation) % 180) {
+		size->height = dss_ctx->phy_size.width;
+		size->width = dss_ctx->phy_size.height;
+	} else {
+		size->height = dss_ctx->phy_size.height;
+		size->width = dss_ctx->phy_size.width;
+	}
+
+	return ret;
+}
+
+static int compdev_get_listener_state_locked(struct compdev *cd,
+				enum compdev_listener_state *state)
+{
+	int ret = 0;
+
+	*state = COMPDEV_LISTENER_OFF;
+	if (cd->pb_cb != NULL)
+		*state = COMPDEV_LISTENER_ON;
 	return ret;
 }
 
@@ -344,50 +979,59 @@ static long compdev_ioctl(struct file *file,
 {
 	int ret;
 	struct compdev *cd = (struct compdev *)file->private_data;
-	struct compdev_post_buffers_req req;
+	struct compdev_img img;
+	struct compdev_scene_info s_info;
 
 	mutex_lock(&cd->lock);
 
 	switch (cmd) {
 	case COMPDEV_GET_SIZE_IOC:
-		{
-			struct compdev_size tmp;
-			if ((cd->display_rotation) % 180) {
-				tmp.height = cd->phy_size.width;
-				tmp.width = cd->phy_size.height;
-			} else {
-				tmp.height = cd->phy_size.height;
-				tmp.width = cd->phy_size.width;
-			}
-			ret = copy_to_user((void __user *)arg, &tmp,
-								sizeof(tmp));
-			if (ret)
-				ret = -EFAULT;
+	{
+		struct compdev_size tmp;
+		compdev_get_size_locked(&cd->dss_ctx, &tmp);
+		ret = copy_to_user((void __user *)arg, &tmp,
+							sizeof(tmp));
+		if (ret)
+			ret = -EFAULT;
+	}
+	break;
+	case COMPDEV_GET_LISTENER_STATE_IOC:
+	{
+		enum compdev_listener_state state;
+		compdev_get_listener_state_locked(cd, &state);
+		ret = copy_to_user((void __user *)arg, &state,
+				sizeof(state));
+		if (ret)
+			ret = -EFAULT;
+	}
+	break;
+	case COMPDEV_POST_BUFFER_IOC:
+		memset(&img, 0, sizeof(img));
+		/* Get the user data */
+		if (copy_from_user(&img, (void *)arg, sizeof(img))) {
+			dev_warn(cd->dev,
+				"%s: copy_from_user failed\n",
+				__func__);
+			mutex_unlock(&cd->lock);
+			return -EFAULT;
 		}
-		break;
-	case COMPDEV_POST_BUFFERS_IOC:
-		/* arg is user pointer to struct compdev_post_buffers_req */
-
-		/* Initialize the structure */
-		memset(&req, 0, sizeof(req));
-
-		/*
-		 * The user request is a sub structure of the
-		 * kernel request structure.
-		 */
+		ret = compdev_post_buffer_locked(cd, &img);
 
+		break;
+	case COMPDEV_POST_SCENE_INFO_IOC:
+		memset(&s_info, 0, sizeof(s_info));
 		/* Get the user data */
-		if (copy_from_user(&req, (void *)arg, sizeof(req))) {
-			dev_warn(cd->mdev.this_device,
+		if (copy_from_user(&s_info, (void *)arg, sizeof(s_info))) {
+			dev_warn(cd->dev,
 				"%s: copy_from_user failed\n",
 				__func__);
 			mutex_unlock(&cd->lock);
 			return -EFAULT;
 		}
-
-		ret = compdev_post_buffers(cd, &req);
+		ret = compdev_post_scene_info_locked(cd, &s_info);
 
 		break;
+
 	default:
 		ret = -ENOSYS;
 	}
@@ -403,19 +1047,29 @@ static const struct file_operations compdev_fops = {
 	.unlocked_ioctl = compdev_ioctl,
 };
 
-static void init_compdev(struct compdev *cd, struct mcde_display_device *ddev,
-							const char *name)
+static void init_compdev(struct compdev *cd, const char *name)
 {
 	mutex_init(&cd->lock);
 	INIT_LIST_HEAD(&cd->list);
-	cd->ddev = ddev;
+	init_completion(&cd->fence);
+
 	cd->mdev.minor = MISC_DYNAMIC_MINOR;
 	cd->mdev.name = name;
 	cd->mdev.fops = &compdev_fops;
+	cd->dev = cd->mdev.this_device;
+}
+
+static void init_dss_context(struct dss_context *dss_ctx,
+		struct mcde_display_device *ddev, struct compdev *cd)
+{
+	dss_ctx->ddev = ddev;
+	dss_ctx->dev = cd->dev;
+	memset(&dss_ctx->cache_ctx, 0, sizeof(struct buffer_cache_context));
+	dss_ctx->cache_ctx.dev = dss_ctx->dev;
 }
 
 int compdev_create(struct mcde_display_device *ddev,
-		struct mcde_overlay *parent_ovly)
+		struct mcde_overlay *parent_ovly, bool mcde_rotation)
 {
 	int ret = 0;
 	int i;
@@ -423,39 +1077,59 @@ int compdev_create(struct mcde_display_device *ddev,
 	struct mcde_video_mode vmode;
 	struct mcde_overlay_info info;
 
-	static int counter;
 	char name[10];
 
+	if (dev_counter == 0) {
+		for (i = 0; i < MAX_NBR_OF_COMPDEVS; i++)
+			compdevs[i] = NULL;
+	}
+
+	if (dev_counter > MAX_NBR_OF_COMPDEVS)
+		return -ENOMEM;
+
 	cd = kzalloc(sizeof(struct compdev), GFP_KERNEL);
 	if (!cd)
 		return -ENOMEM;
 
+	compdevs[dev_counter] = cd;
+	cd->dev_index = dev_counter;
+
 	snprintf(name, sizeof(name), "%s%d", COMPDEV_DEFAULT_DEVICE_PREFIX,
-		counter++);
-	init_compdev(cd, ddev, name);
+			dev_counter++);
+	init_compdev(cd, name);
+
+	init_dss_context(&cd->dss_ctx, ddev, cd);
+
 	mcde_dss_get_video_mode(ddev, &vmode);
 
-	cd->ovly[0] = parent_ovly;
-	if (!cd->ovly[0]) {
+	cd->worker_thread = create_workqueue(name);
+	if (!cd->worker_thread) {
+		ret = -ENOMEM;
+		goto fail_workqueue;
+	}
+
+	cd->dss_ctx.ovly[0] = parent_ovly;
+	if (!cd->dss_ctx.ovly[0]) {
 		ret = -ENOMEM;
 		goto fail_create_ovly;
 	}
 
 	for (i = 1; i < NUM_COMPDEV_BUFS; i++) {
-		cd->ovly[i] = mcde_dss_create_overlay(ddev, &info);
-		if (!cd->ovly[i]) {
+		cd->dss_ctx.ovly[i] = mcde_dss_create_overlay(ddev, &info);
+		if (!cd->dss_ctx.ovly[i]) {
 			ret = -ENOMEM;
 			goto fail_create_ovly;
 		}
-		mcde_dss_enable_overlay(cd->ovly[i]);
-		disable_overlay(cd->ovly[i]);
+		mcde_dss_enable_overlay(cd->dss_ctx.ovly[i]);
+		disable_overlay(cd->dss_ctx.ovly[i]);
 	}
 
-	mcde_dss_get_native_resolution(ddev, &cd->phy_size.width,
-			&cd->phy_size.height);
+	mcde_dss_get_native_resolution(ddev, &cd->dss_ctx.phy_size.width,
+			&cd->dss_ctx.phy_size.height);
+	cd->dss_ctx.display_rotation = mcde_dss_get_rotation(ddev);
+	cd->dss_ctx.current_buffer_rotation = 0;
 
-	cd->display_rotation = mcde_dss_get_rotation(ddev);
-	cd->current_buffer_rotation = 0;
+	cd->mcde_rotation = mcde_rotation;
 
 	ret = misc_register(&cd->mdev);
 	if (ret)
@@ -469,14 +1143,145 @@ int compdev_create(struct mcde_display_device *ddev,
 fail_register_misc:
 fail_create_ovly:
 	for (i = 0; i < NUM_COMPDEV_BUFS; i++) {
-		if (cd->ovly[i])
-			mcde_dss_destroy_overlay(cd->ovly[i]);
+		if (cd->dss_ctx.ovly[i])
+			mcde_dss_destroy_overlay(cd->dss_ctx.ovly[i]);
 	}
+fail_workqueue:
 	kfree(cd);
 out:
 	return ret;
 }
 
+
+int compdev_get(int dev_idx, struct compdev **cd_pp)
+{
+	struct compdev *cd;
+	cd = NULL;
+
+	if (dev_idx >= MAX_NBR_OF_COMPDEVS)
+		return -ENOMEM;
+
+	cd = compdevs[dev_idx];
+	if (cd != NULL) {
+		mutex_lock(&cd->lock);
+		cd->ref_count++;
+		mutex_unlock(&cd->lock);
+		*cd_pp = cd;
+		return 0;
+	} else {
+		return -ENOMEM;
+	}
+}
+EXPORT_SYMBOL(compdev_get);
+
+int compdev_put(struct compdev *cd)
+{
+	int ret = 0;
+	if (cd == NULL)
+		return -ENOMEM;
+
+	mutex_lock(&cd->lock);
+	cd->ref_count--;
+	if (cd->ref_count < 0)
+		dev_warn(cd->dev,
+				"%s: Incorrect ref count\n", __func__);
+	mutex_unlock(&cd->lock);
+	return ret;
+}
+EXPORT_SYMBOL(compdev_put);
+
+int compdev_get_size(struct compdev *cd, struct compdev_size *size)
+{
+	int ret = 0;
+	if (cd == NULL)
+		return -ENOMEM;
+
+	mutex_lock(&cd->lock);
+
+	ret = compdev_get_size_locked(&cd->dss_ctx, size);
+
+	mutex_unlock(&cd->lock);
+	return ret;
+}
+EXPORT_SYMBOL(compdev_get_size);
+
+int compdev_get_listener_state(struct compdev *cd,
+	enum compdev_listener_state *listener_state)
+{
+	int ret = 0;
+	if (cd == NULL)
+		return -ENOMEM;
+
+	mutex_lock(&cd->lock);
+
+	ret = compdev_get_listener_state_locked(cd, listener_state);
+
+	mutex_unlock(&cd->lock);
+	return ret;
+}
+EXPORT_SYMBOL(compdev_get_listener_state);
+
+
+int compdev_post_buffer(struct compdev *cd, struct compdev_img *img)
+{
+	int ret = 0;
+	if (cd == NULL)
+		return -ENOMEM;
+
+	mutex_lock(&cd->lock);
+
+	ret = compdev_post_buffer_locked(cd, img);
+
+	mutex_unlock(&cd->lock);
+	return ret;
+}
+EXPORT_SYMBOL(compdev_post_buffer);
+
+int compdev_post_scene_info(struct compdev *cd,
+			struct compdev_scene_info *s_info)
+{
+	int ret = 0;
+	if (cd == NULL)
+		return -ENOMEM;
+
+	mutex_lock(&cd->lock);
+
+	ret = compdev_post_scene_info_locked(cd, s_info);
+
+	mutex_unlock(&cd->lock);
+	return ret;
+}
+EXPORT_SYMBOL(compdev_post_scene_info);
+
+int compdev_register_listener_callbacks(struct compdev *cd, void *data,
+		post_buffer_callback pb_cb, post_scene_info_callback si_cb)
+{
+	int ret = 0;
+	if (cd == NULL)
+		return -ENOMEM;
+	mutex_lock(&cd->lock);
+	cd->cb_data = data;
+	cd->pb_cb = pb_cb;
+	cd->si_cb = si_cb;
+	mutex_unlock(&cd->lock);
+	return ret;
+}
+EXPORT_SYMBOL(compdev_register_listener_callbacks);
+
+int compdev_deregister_callbacks(struct compdev *cd)
+{
+	int ret = 0;
+	if (cd == NULL)
+		return -ENOMEM;
+	mutex_lock(&cd->lock);
+	cd->cb_data = NULL;
+	cd->pb_cb = NULL;
+	cd->si_cb = NULL;
+	mutex_unlock(&cd->lock);
+	return ret;
+}
+EXPORT_SYMBOL(compdev_deregister_callbacks);
+
 void compdev_destroy(struct mcde_display_device *ddev)
 {
 	struct compdev *cd;
@@ -485,15 +1290,35 @@ void compdev_destroy(struct mcde_display_device *ddev)
 
 	mutex_lock(&dev_list_lock);
 	list_for_each_entry_safe(cd, tmp, &dev_list, list) {
-		if (cd->ddev == ddev) {
+		if (cd->dss_ctx.ddev == ddev) {
 			list_del(&cd->list);
 			misc_deregister(&cd->mdev);
-			for (i = 0; i < NUM_COMPDEV_BUFS; i++)
-				mcde_dss_destroy_overlay(cd->ovly[i]);
+			for (i = 1; i < NUM_COMPDEV_BUFS; i++)
+				mcde_dss_destroy_overlay(cd->dss_ctx.ovly[i]);
+			b2r2_blt_close(cd->dss_ctx.blt_handle);
+
+			release_prev_frame(&cd->dss_ctx);
+
+			/* Free potential temp buffers */
+			for (i = 0; i < cd->dss_ctx.temp_img_count; i++)
+				free_comp_img_buf(cd->dss_ctx.temp_img[i],
+						cd->dev);
+
+			for (i = 0; i < BUFFER_CACHE_DEPTH; i++) {
+				if (cd->dss_ctx.cache_ctx.img[i]) {
+					free_comp_img_buf
+						(cd->dss_ctx.cache_ctx.img[i],
+							cd->dev);
+					cd->dss_ctx.cache_ctx.img[i] = NULL;
+				}
+			}
+
+			destroy_workqueue(cd->worker_thread);
 			kfree(cd);
 			break;
 		}
 	}
+	dev_counter--;
 	mutex_unlock(&dev_list_lock);
 }
 
@@ -508,7 +1333,22 @@ static void compdev_destroy_all(void)
 		list_del(&cd->list);
 		misc_deregister(&cd->mdev);
 		for (i = 0; i < NUM_COMPDEV_BUFS; i++)
-			mcde_dss_destroy_overlay(cd->ovly[i]);
+			mcde_dss_destroy_overlay(cd->dss_ctx.ovly[i]);
+
+		release_prev_frame(&cd->dss_ctx);
+		/* Free potential temp buffers */
+		for (i = 0; i < cd->dss_ctx.temp_img_count; i++)
+			free_comp_img_buf(cd->dss_ctx.temp_img[i], cd->dev);
+
+		for (i = 0; i < BUFFER_CACHE_DEPTH; i++) {
+			if (cd->dss_ctx.cache_ctx.img[i]) {
+				free_comp_img_buf
+					(cd->dss_ctx.cache_ctx.img[i],
+						cd->dev);
+				cd->dss_ctx.cache_ctx.img[i] = NULL;
+			}
+		}
+
 		kfree(cd);
 	}
 	mutex_unlock(&dev_list_lock);
diff --git a/include/linux/compdev.h b/include/linux/compdev.h
index 9e707c7b770..83285c61b62 100644
--- a/include/linux/compdev.h
+++ b/include/linux/compdev.h
@@ -30,7 +30,7 @@
 #endif
 
 #define COMPDEV_DEFAULT_DEVICE_PREFIX "comp"
-#define NUM_COMPDEV_BUFS 2
+
 
 enum compdev_fmt {
 	COMPDEV_FMT_RGB565,
@@ -38,34 +38,52 @@ enum compdev_fmt {
 	COMPDEV_FMT_RGBX8888,
 	COMPDEV_FMT_RGBA8888,
 	COMPDEV_FMT_YUV422,
+	COMPDEV_FMT_YCBCR42XMBN,
+	COMPDEV_FMT_YUV420_SP,
+	COMPDEV_FMT_YVU420_SP,
+	COMPDEV_FMT_YUV420_P,
 };
 
 struct compdev_size {
-	uint16_t width;
-	uint16_t height;
+	__u16 width;
+	__u16 height;
 };
 
 /* Display rotation */
 enum compdev_rotation {
 	COMPDEV_ROT_0       = 0,
 	COMPDEV_ROT_90_CCW  = 90,
-	COMPDEV_ROT_180_CCW = 180,
+	COMPDEV_ROT_180     = 180,
 	COMPDEV_ROT_270_CCW = 270,
 	COMPDEV_ROT_90_CW   = COMPDEV_ROT_270_CCW,
-	COMPDEV_ROT_180_CW  = COMPDEV_ROT_180_CCW,
 	COMPDEV_ROT_270_CW  = COMPDEV_ROT_90_CCW,
 };
 
+enum compdev_flag {
+	COMPDEV_NO_FLAG            = 0x00,
+	COMPDEV_OVERLAY_FLAG       = 0x01,
+	COMPDEV_FRAMEBUFFER_FLAG   = 0x02,
+	COMPDEV_BYPASS_FLAG        = 0x04,
+	COMPDEV_EXTERNAL_DISP_FLAG = 0x08,
+	COMPDEV_PROTECTED_FLAG     = 0x0F,
+};
+
 enum compdev_ptr_type {
 	COMPDEV_PTR_PHYSICAL,
 	COMPDEV_PTR_HWMEM_BUF_NAME_OFFSET,
 };
 
+enum compdev_listener_state {
+	COMPDEV_LISTENER_OFF,
+	COMPDEV_LISTENER_ON,
+};
+
+
 struct compdev_rect {
-	__s32  x;
-	__s32  y;
-	__s32  width;
-	__s32  height;
+	__s16  x;
+	__s16  y;
+	__u16  width;
+	__u16  height;
 };
 
 struct compdev_buf {
@@ -79,27 +97,57 @@ struct compdev_buf {
 struct compdev_img {
 	enum compdev_fmt     fmt;
 	struct compdev_buf   buf;
-	__s32                width;
-	__s32                height;
-	__u32                pitch;
+	__u16                width;
+	__u16                height;
+	__u16                pitch;
+	__u8                 z_position;
 	struct compdev_rect  dst_rect;
+	struct compdev_rect  src_rect;
+	enum   compdev_rotation  rotation;
+	__u32                flags;
 };
 
-struct compdev_post_buffers_req {
-	enum   compdev_rotation  rotation;
-	struct compdev_img       img_buffers[NUM_COMPDEV_BUFS];
-	__u8                     buffer_count;
+struct compdev_scene_info {
+	enum   compdev_rotation  ovly_rotation;
+	enum   compdev_rotation  fb_rotation;
+	__u8                     img_count;
 };
 
-#define COMPDEV_GET_SIZE_IOC       _IOR('D', 1, struct compdev_size)
-#define COMPDEV_POST_BUFFERS_IOC   _IOW('D', 2, struct compdev_post_buffers_req)
 
-#ifdef __KERNEL__
+#define COMPDEV_GET_SIZE_IOC           _IOR('D', 1, struct compdev_size)
+#define COMPDEV_POST_BUFFER_IOC        _IOW('D', 2, struct compdev_img)
+#define COMPDEV_POST_SCENE_INFO_IOC    _IOW('D', 3, struct compdev_scene_info)
+#define COMPDEV_GET_LISTENER_STATE_IOC _IOR('D', 4, enum compdev_listener_state)
+
+
+#if defined(__KERNEL__) || defined(_KERNEL)
+
+#define MAX_NBR_OF_COMPDEVS 2
+
+struct compdev;
+typedef void (*post_buffer_callback)(void *data, struct compdev_img *img);
+typedef void (*post_scene_info_callback)(void *data,
+		struct compdev_scene_info *s_info);
+
 
 int compdev_create(struct mcde_display_device *ddev,
-		struct mcde_overlay *parent_ovly);
+		struct mcde_overlay *parent_ovly,
+		bool mcde_rotation);
 void compdev_destroy(struct mcde_display_device *ddev);
 
+int compdev_get(int dev_idx, struct compdev **dev);
+int compdev_put(struct compdev *dev);
+int compdev_get_size(struct compdev *dev, struct compdev_size *size);
+int compdev_post_buffer(struct compdev *dev, struct compdev_img *img);
+int compdev_post_scene_info(struct compdev *dev,
+		struct compdev_scene_info *s_info);
+int compdev_get_listener_state(struct compdev *dev,
+		enum compdev_listener_state *listener_state);
+
+int compdev_register_listener_callbacks(struct compdev *dev, void *data,
+		post_buffer_callback pb_cb, post_scene_info_callback si_cb);
+int compdev_deregister_callbacks(struct compdev *dev);
+
 #endif /* __KERNEL__ */
 
 #endif /* _COMPDEV_H_ */
-- 
cgit v1.2.3


From ec3fd76a1edd94995318f1c3118e4abe8e47aced Mon Sep 17 00:00:00 2001
From: Per-Daniel Olsson <per-daniel.olsson@stericsson.com>
Date: Fri, 10 Feb 2012 20:10:44 +0100
Subject: misc: clonedev: New device for cloning

A new device for content cloning between drifferent instances of comdev has
been added.

ST-Ericsson Linux next: NA
ST-Ericsson ID: 404691
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I8c96bede685fad46ebb51b0217c48164dcad6659
Signed-off-by: Per-Daniel Olsson <per-daniel.olsson@stericsson.com>

Conflicts:

	drivers/video/mcde/display-av8100.c

Signed-off-by: Per-Daniel Olsson <per-daniel.olsson@stericsson.com>
Change-Id: I8c96bede685fad46ebb51b0217c48164dcad6659
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/49977
Reviewed-by: Robert FEKETE <robert.fekete@stericsson.com>
---
 drivers/misc/Kconfig                |  16 ++
 drivers/misc/Makefile               |   1 +
 drivers/misc/clonedev/Makefile      |   5 +
 drivers/misc/clonedev/clonedev.c    | 312 ++++++++++++++++++++++++++++++++++++
 drivers/video/mcde/display-av8100.c |  42 ++++-
 include/linux/clonedev.h            |  50 ++++++
 6 files changed, 424 insertions(+), 2 deletions(-)
 create mode 100644 drivers/misc/clonedev/Makefile
 create mode 100644 drivers/misc/clonedev/clonedev.c
 create mode 100644 include/linux/clonedev.h

diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index c7c7114859f..0e2c6a34f19 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -479,6 +479,22 @@ config COMPDEV
 	  This driver replaces the use of the framebuffer The device allows
 	  for posting userspace buffers to be used with the overlays.
 
+config CLONEDEV
+	bool "Display cloning device"
+	depends on FB_MCDE && HWMEM && COMPDEV
+	default n
+	help
+	  This driver provides a way to clone content between two compdev
+	  devices.
+
+config CLONEDEV_DEBUG
+	bool "Display cloning device debug"
+	depends on CLONEDEV
+	default n
+	help
+	  This driver provides a way to clone content between two compdev
+	  devices.
+
 config PCH_PHUB
 	tristate "Intel EG20T PCH/LAPIS Semicon IOH(ML7213/ML7223/ML7831) PHUB"
 	depends on PCI
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 6f925aafbd5..570f57e2717 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -48,6 +48,7 @@ obj-y				+= lis3lv02d/
 obj-y				+= carma/
 obj-$(CONFIG_DISPDEV)		+= dispdev/
 obj-$(CONFIG_COMPDEV)		+= compdev/
+obj-$(CONFIG_CLONEDEV)		+= clonedev/
 obj-$(CONFIG_USB_SWITCH_FSA9480) += fsa9480.o
 obj-$(CONFIG_ALTERA_STAPL)	+=altera-stapl/
 obj-$(CONFIG_MAX8997_MUIC)	+= max8997-muic.o
diff --git a/drivers/misc/clonedev/Makefile b/drivers/misc/clonedev/Makefile
new file mode 100644
index 00000000000..f84859dd3ee
--- /dev/null
+++ b/drivers/misc/clonedev/Makefile
@@ -0,0 +1,5 @@
+obj-$(CONFIG_CLONEDEV) += clonedev.o
+
+ifdef CONFIG_CLONEDEV_DEBUG
+EXTRA_CFLAGS += -DDEBUG
+endif
diff --git a/drivers/misc/clonedev/clonedev.c b/drivers/misc/clonedev/clonedev.c
new file mode 100644
index 00000000000..d3b770fd324
--- /dev/null
+++ b/drivers/misc/clonedev/clonedev.c
@@ -0,0 +1,312 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2011
+ *
+ * Device for display cloning on external output.
+ *
+ * Author: Per-Daniel Olsson <per-daniel.olsson@stericsson.com>
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+
+#include <linux/kernel.h>
+#include <linux/fs.h>
+#include <linux/err.h>
+#include <linux/slab.h>
+#include <linux/miscdevice.h>
+#include <linux/uaccess.h>
+#include <linux/list.h>
+#include <linux/mutex.h>
+#include <linux/ioctl.h>
+
+#include <linux/clonedev.h>
+
+#include <linux/compdev.h>
+#include <linux/mm.h>
+#include <video/mcde.h>
+
+static LIST_HEAD(dev_list);
+static DEFINE_MUTEX(dev_list_lock);
+
+struct clonedev {
+	struct mutex lock;
+	struct miscdevice mdev;
+	struct list_head list;
+	bool open;
+	struct compdev *src_compdev;
+	struct compdev *dst_compdev;
+	bool overlay_case;
+	struct compdev_size dst_size;
+	struct compdev_scene_info s_info;
+};
+
+static void best_fit(struct compdev_rect *src_rect,
+		struct compdev_size *dst_size,
+		struct compdev_img *img)
+{
+	/* aspect ratio in 26.6 fixed point */
+	int aspect = 1;
+	int dst_w;
+	int dst_h;
+
+	if (img->rotation == COMPDEV_ROT_90_CCW ||
+			img->rotation == COMPDEV_ROT_270_CCW)
+		aspect = (src_rect->height << 6) / src_rect->width;
+	else
+		aspect = (src_rect->width << 6) / src_rect->height;
+
+	dst_w = aspect * dst_size->height >> 6;
+	dst_h = dst_size->height;
+	img->dst_rect.y = 0;
+
+	if (dst_w > dst_size->width) {
+		/*
+		 * Destination rectangle too wide.
+		 * Clamp to image width. Keep aspect ratio.
+		 */
+		dst_h = (dst_size->width << 6) / aspect;
+		dst_w = dst_size->width;
+	}
+
+	/* center the image */
+	if (dst_w < dst_size->width) {
+		int offset = (dst_size->width - dst_w) / 2;
+		img->dst_rect.x = offset;
+	}
+
+	if (dst_h < dst_size->height) {
+		int offset = (dst_size->height - dst_h) / 2;
+		img->dst_rect.y = offset;
+	}
+
+	img->dst_rect.width = dst_w;
+	img->dst_rect.height = dst_h;
+}
+
+static int clonedev_open(struct inode *inode, struct file *file)
+{
+	struct clonedev *cd = NULL;
+
+	mutex_lock(&dev_list_lock);
+	list_for_each_entry(cd, &dev_list, list)
+		if (cd->mdev.minor == iminor(inode))
+			break;
+
+	if (&cd->list == &dev_list) {
+		mutex_unlock(&dev_list_lock);
+		return -ENODEV;
+	}
+
+	if (cd->open) {
+		mutex_unlock(&dev_list_lock);
+		return -EBUSY;
+	}
+
+	cd->open = true;
+
+	mutex_unlock(&dev_list_lock);
+
+	file->private_data = cd;
+
+	return 0;
+}
+
+static int clonedev_release(struct inode *inode, struct file *file)
+{
+	struct clonedev *cd = NULL;
+
+	mutex_lock(&dev_list_lock);
+	list_for_each_entry(cd, &dev_list, list)
+		if (cd->mdev.minor == iminor(inode))
+			break;
+	mutex_unlock(&dev_list_lock);
+
+	if (&cd->list == &dev_list)
+		return -ENODEV;
+
+	cd->open = false;
+	return 0;
+}
+
+static long clonedev_ioctl(struct file *file,
+		unsigned int cmd,
+		unsigned long arg)
+{
+	int ret;
+	struct clonedev *cd = (struct clonedev *)file->private_data;
+
+	mutex_lock(&cd->lock);
+
+	switch (cmd) {
+	case CLONEDEV_SET_MODE_IOC:
+		/* TODO: Get the user data */
+
+		break;
+
+	default:
+		ret = -ENOSYS;
+	}
+
+	mutex_unlock(&cd->lock);
+
+	return ret;
+}
+
+static const struct file_operations clonedev_fops = {
+	.open = clonedev_open,
+	.release = clonedev_release,
+	.unlocked_ioctl = clonedev_ioctl,
+};
+
+static void init_clonedev(struct clonedev *cd, const char *name)
+{
+	mutex_init(&cd->lock);
+	INIT_LIST_HEAD(&cd->list);
+
+	cd->mdev.minor = MISC_DYNAMIC_MINOR;
+	cd->mdev.name = name;
+	cd->mdev.fops = &clonedev_fops;
+}
+
+static void clonedev_post_buffer_callback(void *data,
+		struct compdev_img *cb_img)
+{
+	struct clonedev *cd = (struct clonedev *)data;
+
+	mutex_lock(&cd->lock);
+
+	if (!cd->overlay_case || (cd->overlay_case &&
+			(cb_img->flags & COMPDEV_OVERLAY_FLAG))) {
+		struct compdev_img img;
+
+		img = *cb_img;
+
+		if (img.flags & COMPDEV_BYPASS_FLAG)
+			img.flags &= ~COMPDEV_BYPASS_FLAG;
+
+		if (cd->overlay_case)
+			img.rotation = cd->s_info.ovly_rotation;
+		else
+			img.rotation = cd->s_info.fb_rotation;
+
+		best_fit(&img.src_rect, &cd->dst_size, &img);
+
+		compdev_post_buffer(cd->dst_compdev, &img);
+	}
+	mutex_unlock(&cd->lock);
+}
+
+static void clonedev_post_scene_info_callback(void *data,
+		struct compdev_scene_info *s_info)
+{
+	struct clonedev *cd = (struct clonedev *)data;
+
+	mutex_lock(&cd->lock);
+	if (s_info->img_count > 1)
+		cd->overlay_case = true;
+	else
+		cd->overlay_case = false;
+
+	cd->s_info = *s_info;
+	cd->s_info.img_count = 1;
+	compdev_post_scene_info(cd->dst_compdev, &cd->s_info);
+	mutex_unlock(&cd->lock);
+}
+
+int clonedev_create(void)
+{
+	int ret;
+	struct clonedev *cd;
+
+	static int counter;
+	char name[10];
+
+	cd = kzalloc(sizeof(struct clonedev), GFP_KERNEL);
+	if (!cd)
+		return -ENOMEM;
+
+	snprintf(name, sizeof(name), "%s%d", CLONEDEV_DEFAULT_DEVICE_PREFIX,
+			counter++);
+	init_clonedev(cd, name);
+
+	ret = misc_register(&cd->mdev);
+	if (ret)
+		goto fail_register_misc;
+	mutex_lock(&dev_list_lock);
+	list_add_tail(&cd->list, &dev_list);
+	mutex_unlock(&dev_list_lock);
+
+	mutex_lock(&cd->lock);
+
+	compdev_get(0, &cd->src_compdev);
+	compdev_get(1, &cd->dst_compdev);
+	compdev_get_size(cd->dst_compdev, &cd->dst_size);
+
+	compdev_register_listener_callbacks(cd->src_compdev, (void *)cd,
+			&clonedev_post_buffer_callback,
+			&clonedev_post_scene_info_callback);
+
+	mutex_unlock(&cd->lock);
+	goto out;
+
+fail_register_misc:
+	kfree(cd);
+out:
+	return ret;
+}
+
+void clonedev_destroy(void)
+{
+	struct clonedev *cd;
+	struct clonedev *tmp;
+
+	mutex_lock(&dev_list_lock);
+	list_for_each_entry_safe(cd, tmp, &dev_list, list) {
+		compdev_put(cd->src_compdev);
+		compdev_put(cd->dst_compdev);
+		compdev_deregister_callbacks(cd->src_compdev);
+		list_del(&cd->list);
+		misc_deregister(&cd->mdev);
+		kfree(cd);
+		break;
+	}
+	mutex_unlock(&dev_list_lock);
+}
+
+static void clonedev_destroy_all(void)
+{
+	struct clonedev *cd;
+	struct clonedev *tmp;
+
+	mutex_lock(&dev_list_lock);
+	list_for_each_entry_safe(cd, tmp, &dev_list, list) {
+		list_del(&cd->list);
+		misc_deregister(&cd->mdev);
+		kfree(cd);
+	}
+	mutex_unlock(&dev_list_lock);
+
+	mutex_destroy(&dev_list_lock);
+}
+
+static int __init clonedev_init(void)
+{
+	pr_info("%s\n", __func__);
+
+	mutex_init(&dev_list_lock);
+
+	return 0;
+}
+module_init(clonedev_init);
+
+static void __exit clonedev_exit(void)
+{
+	clonedev_destroy_all();
+	pr_info("%s\n", __func__);
+}
+module_exit(clonedev_exit);
+
+MODULE_AUTHOR("Per-Daniel Olsson <per-daniel.olsson@stericsson.com>");
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("Device for display cloning on external output");
+
diff --git a/drivers/video/mcde/display-av8100.c b/drivers/video/mcde/display-av8100.c
index b443f7f1760..70750998824 100644
--- a/drivers/video/mcde/display-av8100.c
+++ b/drivers/video/mcde/display-av8100.c
@@ -17,6 +17,8 @@
 #include <linux/gpio.h>
 #include <linux/io.h>
 #include <linux/slab.h>
+#include <linux/compdev.h>
+#include <linux/clonedev.h>
 
 #include <video/mcde_fb.h>
 #include <video/mcde_display.h>
@@ -199,6 +201,9 @@ static ssize_t store_disponoff(struct device *dev,
 	bool enable = false;
 	u8 cea = 0;
 	u8 vesa_cea_nr = 0;
+#ifdef CONFIG_COMPDEV
+	struct mcde_fb *mfb;
+#endif
 
 	dev_dbg(dev, "%s\n", __func__);
 
@@ -211,7 +216,7 @@ static ssize_t store_disponoff(struct device *dev,
 	vesa_cea_nr = (hex_to_bin(buf[4]) << 4) + hex_to_bin(buf[5]);
 	dev_dbg(dev, "enable:%d cea:%d nr:%d\n", enable, cea, vesa_cea_nr);
 
-	if (enable && !mdev->enabled && mdev->fbi == NULL) {
+	if (enable && !mdev->fbi) {
 		struct display_driver_data *driver_data = dev_get_drvdata(dev);
 		u16 w = mdev->native_x_res;
 		u16 h = mdev->native_y_res, vh;
@@ -226,7 +231,40 @@ static ssize_t store_disponoff(struct device *dev,
 			dev_warn(dev, "fb create failed\n");
 		else
 			driver_data->fbdevname = dev_name(fbi->dev);
-	} else if (!enable && mdev->enabled) {
+
+#ifdef CONFIG_COMPDEV
+		/* TODO need another way for compdev to get actual size */
+		mdev->native_x_res = w;
+		mdev->native_y_res = h;
+
+		mfb = to_mcde_fb(fbi);
+		/* Create a compdev overlay for this display */
+		if (compdev_create(mdev, mfb->ovlys[0], false) < 0) {
+			dev_warn(&mdev->dev,
+				"Failed to create compdev for display %s\n",
+						mdev->name);
+		} else {
+			dev_dbg(&mdev->dev, "compdev created for (%s)\n",
+						mdev->name);
+		}
+#ifdef CONFIG_CLONEDEV
+		if (clonedev_create()) {
+			dev_warn(&mdev->dev,
+				"Failed to create clonedev for display %s\n",
+						mdev->name);
+		} else {
+			dev_dbg(&mdev->dev, "clonedev created for (%s)\n",
+						mdev->name);
+		}
+#endif
+#endif
+	} else if (!enable && mdev->fbi) {
+#ifdef CONFIG_CLONEDEV
+		clonedev_destroy();
+#endif
+#ifdef CONFIG_COMPDEV
+		compdev_destroy(mdev);
+#endif
 		mcde_fb_destroy(mdev);
 	}
 
diff --git a/include/linux/clonedev.h b/include/linux/clonedev.h
new file mode 100644
index 00000000000..575233f07e9
--- /dev/null
+++ b/include/linux/clonedev.h
@@ -0,0 +1,50 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2011
+ *
+ * ST-Ericsson Display overlay compositer device driver
+ *
+ * Author: Per-Daniel Olsson <per-daniel.olsson@stericsson.com>
+ * for ST-Ericsson.
+ *
+ * License terms: GNU General Public License (GPL), version 2.
+ */
+
+#ifndef _CLONEDEV_H_
+#define _CLONEDEV_H_
+
+#if !defined(__KERNEL__) && !defined(_KERNEL)
+#include <stdint.h>
+#else
+#include <linux/types.h>
+#include <video/mcde.h>
+#endif
+
+#if defined(__KERNEL__) || defined(_KERNEL)
+#include <linux/mm_types.h>
+#include <linux/bitops.h>
+#else
+#define BIT(nr)			(1UL << (nr))
+#endif
+
+#define CLONEDEV_DEFAULT_DEVICE_PREFIX "clone"
+
+/* Cloning mode */
+enum clonedev_mode {
+	CLONEDEV_CLONE_NONE,
+	CLONEDEV_CLONE_VIDEO_OR_UI,
+	CLONEDEV_CLONE_VIDEO_AND_UI,
+	CLONEDEV_CLONE_VIDEO,
+	CLONEDEV_CLONE_UI,
+};
+
+#define CLONEDEV_SET_MODE_IOC      _IOW('D', 1, __u32*)
+
+#ifdef __KERNEL__
+
+int clonedev_create(void);
+void clonedev_destroy(void);
+
+#endif /* __KERNEL__ */
+
+#endif /* _CLONEDEV_H_ */
+
-- 
cgit v1.2.3


From 48ca68e93ce9a50f9e43d3f82668b02d48080a94 Mon Sep 17 00:00:00 2001
From: Per-Daniel Olsson <per-daniel.olsson@stericsson.com>
Date: Tue, 6 Mar 2012 09:57:19 +0100
Subject: misc: compdev: Correction for overlay crash

The compdev had a flaw which did not check return values while probing
some UIBs. This has now been corrected.

ST-Ericsson Linux next: NA
ST-Ericsson ID: 419934
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I2b203e02ef8b5650d0c27247ac81cf2d0c20fbae
Signed-off-by: Per-Daniel Olsson <per-daniel.olsson@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/51532
Reviewed-by: Jonas ABERG <jonas.aberg@stericsson.com>
Reviewed-by: QATOOLS
Reviewed-by: Robert FEKETE <robert.fekete@stericsson.com>
---
 drivers/misc/compdev/compdev.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/misc/compdev/compdev.c b/drivers/misc/compdev/compdev.c
index e0c34879f65..d929a02c565 100644
--- a/drivers/misc/compdev/compdev.c
+++ b/drivers/misc/compdev/compdev.c
@@ -1120,8 +1120,10 @@ int compdev_create(struct mcde_display_device *ddev,
 			ret = -ENOMEM;
 			goto fail_create_ovly;
 		}
-		mcde_dss_enable_overlay(cd->dss_ctx.ovly[i]);
-		disable_overlay(cd->dss_ctx.ovly[i]);
+		if (mcde_dss_enable_overlay(cd->dss_ctx.ovly[i]))
+			goto fail_create_ovly;
+		if (disable_overlay(cd->dss_ctx.ovly[i]))
+			goto fail_create_ovly;
 	}
 
 	mcde_dss_get_native_resolution(ddev, &cd->dss_ctx.phy_size.width,
-- 
cgit v1.2.3


From 39f287c01ef6d7030895d9e435f25af72c011b49 Mon Sep 17 00:00:00 2001
From: Philippe Langlais <philippe.langlais@stericsson.com>
Date: Thu, 23 Feb 2012 13:48:14 +0100
Subject: mcde: hdmi: Workaround to don't use the clock framework for MCDE on
 Snowball

After Jimmy Rubin commit "video: mcde: Add dsi/dpi freq settings",
HDMI framebuffer is no more functional, hence this workaround.

Signed-off-by: Philippe Langlais <philippe.langlais@stericsson.com>
---
 drivers/video/mcde/mcde_hw.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c
index 9d3ddd48a31..92cdb1ef7a9 100644
--- a/drivers/video/mcde/mcde_hw.c
+++ b/drivers/video/mcde/mcde_hw.c
@@ -3550,7 +3550,7 @@ static int probe_hw(struct platform_device *pdev)
 		input_fifo_size = 128;
 		output_fifo_ab_size = 640;
 		output_fifo_c0c1_size = 160;
-		dsi_use_clk_framework = true;
+		dsi_use_clk_framework = false;
 		dev_info(&mcde_dev->dev, "db8500 V2 HW\n");
 		break;
 	case MCDE_VERSION_4_0_4:
-- 
cgit v1.2.3


From b7086e0a1dec82bf7e8e96e17738151f0aee82fc Mon Sep 17 00:00:00 2001
From: Philippe Langlais <philippe.langlais@linaro.org>
Date: Fri, 30 Mar 2012 14:10:49 +0200
Subject: Revert "ux500: mcde: Remove unnecessary MCDE fbdev update"

This reverts commit 9bfa8c7f5cf9aff1df84f1761841c8f3e7c84e97.
---
 arch/arm/mach-ux500/board-mop500-mcde.c | 46 +++++++++++++++++++++++++++++++++
 arch/arm/mach-ux500/board-u5500-mcde.c  | 46 +++++++++++++++++++++++++++++++++
 2 files changed, 92 insertions(+)

diff --git a/arch/arm/mach-ux500/board-mop500-mcde.c b/arch/arm/mach-ux500/board-mop500-mcde.c
index e60842c86e8..3d8c8fc4852 100644
--- a/arch/arm/mach-ux500/board-mop500-mcde.c
+++ b/arch/arm/mach-ux500/board-mop500-mcde.c
@@ -415,11 +415,57 @@ static struct notifier_block display_nb = {
 	.notifier_call = display_postregistered_callback,
 };
 
+/*
+* This function is used to refresh the display (lcd, hdmi, tvout) with black
+* when the framebuffer is registered.
+* The main display will not be updated if startup graphics is displayed
+* from u-boot.
+*/
+static int framebuffer_postregistered_callback(struct notifier_block *nb,
+	unsigned long event, void *data)
+{
+	int ret = 0;
+	struct fb_event *event_data = data;
+	struct fb_info *info;
+	struct fb_var_screeninfo var;
+	struct fb_fix_screeninfo fix;
+	struct mcde_fb *mfb;
+
+	if (event != FB_EVENT_FB_REGISTERED)
+		return 0;
+
+	if (!event_data)
+		return 0;
+
+	info = event_data->info;
+	mfb = to_mcde_fb(info);
+	if (mfb->id == 0 && display_initialized_during_boot)
+		goto out;
+
+	var = info->var;
+	fix = info->fix;
+	var.yoffset = var.yoffset ? 0 : var.yres;
+	if (info->fbops->fb_pan_display)
+		ret = info->fbops->fb_pan_display(&var, info);
+out:
+	return ret;
+}
+
+static struct notifier_block framebuffer_nb = {
+	.notifier_call = framebuffer_postregistered_callback,
+};
+
 static int __init init_display_devices(void)
 {
+	int ret;
+
 	if (!cpu_is_u8500())
 		return 0;
 
+	ret = fb_register_client(&framebuffer_nb);
+	if (ret)
+		pr_warning("Failed to register framebuffer notifier\n");
+
 	(void)mcde_dss_register_notifier(&display_nb);
 
 	/* Set powermode to STANDBY if startup graphics is executed */
diff --git a/arch/arm/mach-ux500/board-u5500-mcde.c b/arch/arm/mach-ux500/board-u5500-mcde.c
index d28ee6473df..906b5572229 100644
--- a/arch/arm/mach-ux500/board-u5500-mcde.c
+++ b/arch/arm/mach-ux500/board-u5500-mcde.c
@@ -203,11 +203,57 @@ static struct notifier_block display_nb = {
 	.notifier_call = display_postregistered_callback,
 };
 
+/*
+* This function is used to refresh the display (lcd, hdmi, tvout) with black
+* when the framebuffer is registered.
+* The main display will not be updated if startup graphics is displayed
+* from u-boot.
+*/
+static int framebuffer_postregistered_callback(struct notifier_block *nb,
+	unsigned long event, void *data)
+{
+	int ret = 0;
+	struct fb_event *event_data = data;
+	struct fb_info *info;
+	struct fb_var_screeninfo var;
+	struct fb_fix_screeninfo fix;
+	struct mcde_fb *mfb;
+
+	if (event != FB_EVENT_FB_REGISTERED)
+		return 0;
+
+	if (!event_data)
+		return 0;
+
+	info = event_data->info;
+	mfb = to_mcde_fb(info);
+	if (mfb->id == 0 && display_initialized_during_boot)
+		goto out;
+
+	var = info->var;
+	fix = info->fix;
+	var.yoffset = var.yoffset ? 0 : var.yres;
+	if (info->fbops->fb_pan_display)
+		ret = info->fbops->fb_pan_display(&var, info);
+out:
+	return ret;
+}
+
+static struct notifier_block framebuffer_nb = {
+	.notifier_call = framebuffer_postregistered_callback,
+};
+
 int __init init_u5500_display_devices(void)
 {
+	int ret;
+
 	if (!cpu_is_u5500())
 		return 0;
 
+	ret = fb_register_client(&framebuffer_nb);
+	if (ret)
+		pr_warning("Failed to register framebuffer notifier\n");
+
 	(void)mcde_dss_register_notifier(&display_nb);
 
 	if (display_initialized_during_boot)
-- 
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