blob: 0e07e0379336a5ca0ec484e8eb14fd0d3c2e0fa6 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
|
config CPU_IDLE
bool "CPU idle PM support"
default ACPI
depends on PM
help
CPU idle is a generic framework for supporting software-controlled
idle processor power management. It includes modular cross-platform
governors that can be swapped during runtime.
If you're using an ACPI-enabled platform, you should say Y here.
config CPU_IDLE_GOV_LADDER
bool
depends on CPU_IDLE
default y
config CPU_IDLE_GOV_MENU
bool
depends on CPU_IDLE && NO_HZ
default y
config UX500_CPUIDLE
tristate "CPUIdle support"
depends on CPU_IDLE && (MFD_DB5500_PRCMU || MFD_DB8500_PRCMU) && !RTC_DRV_PL031 && PM
default y
select GENERIC_CLOCKEVENTS_BROADCAST
select UX500_CONTEXT
help
Add support for CPUIdle for U8500.
config U8500_CPUIDLE_DEEPEST_STATE
int "Deepest sleep state"
default 4 if UX500_SOC_DB8500
default 1 if UX500_SOC_DB5500
depends on UX500_CPUIDLE
help
Set deepest sleep state. See the cstate struct in cpuidle.c.
Default is ApSleep.
config UX500_CPUIDLE_APDEEPIDLE
bool "CPUIdle ApDeepIdle"
depends on UX500_CPUIDLE
help
Adds the power level ApDeepIdle, where APE is powered on while
ARM is powered off. Default n.
config UX500_CPUIDLE_DEBUG
bool "CPUIdle debug"
depends on UX500_CPUIDLE && DEBUG_FS
help
Add debugging support for CPUIdle for Ux500.
|
