WLAN: Initial commit of the STM CW1200 WLAN driver.

LL IO API is defined and implemented.
TX queue is designed and implemented.
WSM API subset is defined.
mac80211 API is implemented partly.
FW downloading is working.
BH is _not_ implemented.

RX BH is implemented.

1. RX WSM API is defined and stubs are created.
2. RX BH is implemented (not verifiyed yet).

Reference WSM API implementation.

wsm_configuration / wsm_configuration_confirm.
Not veryfied yet.

BH and WSM TX, basic WSM notification.

Device startup is finished.

TODO at mac80211 layer:
 - start
 - add_interface
 - config
 - config_tx
 - config_filter
 - hw_scan
 - remove_interface
 - stop

TODO in general:
 - proper (random?) MAC address

TODO in WSM:
 - datapath

Basic mac80211 STA interface is implemented (not verified yet, but should be working).

Random MAC address is implemented.
Defined and implemented:
 - cw1200_start
 - cw1200_stop
 - cw1200_add_interface
 - cw1200_remove_interface
 - cw1200_config
 - cw1200_conf_tx
FW code is moved to fwio.[hc]
STA code is moved to sta.[hc]
AP code is moved to ap.[hc]

TODO:
 - configure_filter()
 - hw_scan()
 - datapath

Some bugfix.

Piggyback RX-ing.

Bugbix: wrong buf_id_rx calculation.

Finaly! RX datapath is implemented.

TX datapath is implemented.

HW scan is implemented.

TODO:
 - hw_scan: little refactoring. I hate gotos.
 - Join
 - Unjoin
 - SKB pool
 - BH monitor / chip restarter

Development.

+ Proper handling of scan IEs

Join. TX/RX should be working now.

Development.

+ Proper handling of scan IEs
+ Ping is working!!! (with some hacks)

Development.

 + TX rate policy cache is implemented.
 + TX rate policy table uploading is implemented.
 + TX queues stop/resume.
 + WSM STA API (except MIBs) is 100% finished.
 + Direct TX-ing of probe requests is converted to start-scan WSM cmd
   (workaround against FW "feature").
 + All work moved to an own workqueue.
 + Scan timeout is implemented (workaround against a known bug in FW).
 + set_key is implemented.

TODO:
 - Full WSM API support.
 - Join refactoring
 - Assoc status updates.

Verification and bugfixing.

 + Direct probe is verified. Some bugs fixed.
 + TX timeout is implemented... and rolled back: no way to cancel TX.
 + TX hang is fixed: FW hangs if tx->more is set but no more data available.
 + TX rate table uploading is moved into a separate workitem: can't schedule in datapath.
 + TX status reporting is enabled.
 + Removed hacks from Join: should be able to connect to any AP now.
 + TX rate cache bugfix: incorrect handling of policies like 100000000008900000000000.
 + TX rate cache optimization: upload only changed policies.
 + Unjoin is implemented for TX and RX.
 + Join is triggered for auth. frames only.
 + Join timeout is implemented.
 + wsm_set_bss_params is called from assoc notification.
 + wsm_set_association_mode is called from assoc notification.
 + set_beacon_wakeup_period is called from assoc notification.
 + HT information is now available in priv->ht_cap, priv->association_mode
 + CTS protection is set.
 + RTS threshold is set and verified.
 + Warning cleanup.
 + TODOs for compat-wireless-2010-07-16 API change.
 + Very basic RSSI subscription. However reporting is NIY.
 + Some bugfix for minestrel. F.e. policy like 10:9 11:9 0:1 0:1 -1:0 should be handled ok.
 + MaxTxCount (short/long) is implemented and verified.
 + Channel switch is protected now.
 + OverrideInternalTxRate is implemented.. and rolled back: internal rate controlselection is better.

TODO:
 - Security is not validated yet
 - Set HT parameters of TX data according to priv->ht_cap, priv->association_mode.
 - Strange: set_beacon_wakeup_period is called with DTIM 1 always. Why???
 - RSSI subscription events.
 - How to do unjoin?

Style changes.

Modifications to make the code compatible with checkpath. Not finished yet.
1. // -> /* */
2. whitespaces
3. formatting
4. warning- & error fix

No functional changes in the commit.

Verification.

 + RSSI reporting is working.
 + WEP is working. Dynamic WEP key switching is implemented to select TX WEP key on-fly
 + WPA/CCMP and WPA2/CCMP are working.
 + WPA/TKIP and WPA2/TKIP are working.
 + MIC failure event is implemented.
 + Unjoin is implemented as a reset. Why not?
 + wsm_flush_tx() added to flush TX port after wsm_lock_tx_async().
 + race condition in wsm_lock_tx()/wsm_flush_tx() is fixed.
 + RSSI subscription is under research.
 + Event reporting is implemented.
 + Beacon loss event is prepared (but not sent)
 + Link loss is implemented.

TODO:

On target..

 + Bugfix: DMA from non-DMAble memory in FW downloading.
 + RSSI subscription is finished.
 + RSSI event reporting is implemented.
 + Beacon loss event is reimplemented with respect to scan.
 + Memory leak in WSM event processing is fixed.
 + Code is verified on target. Set CW1200_U8500_PLATFORM to build for target.
 + Scan turns on powersave to prevent AP from TXing.
 + Spinning of direct_probe work is fixed.
 + Workaround is implemented for "FIXME: we can't use 'more' at all: we don't know future."

TODO:

Verification on device.

 + Correct deinitialization of async work.
 + New WSM API.
 + WMM is verified and fixed (queue prioritization).
 + Bug in TX is fixed (freezing of TCP traffic).
 + STE CQM extensions are implemented.
 + HW revision detection is implemented.
 + A crash/hangs in scan is fixed.
 + 802.11 slot time is set
 + 11n: first steps: Mixed mode is working.
 + 11n: Block ACK config.
 + Keep-alive work is implemented (but it is not doing anything yet).

TODO:
 - Copyright statements and COPYING
 - STE API for power-save
 - Need to deinit bt_thread, isn't it?

Copyright statements and bt_thread deinitialization.

 + Copyright statements
 + bt_thread deinitialization (NOT TESTED ON DEVICE AT ALL!!!)

Cumulative TODO:
 - COPYING
 - STE API for power-save
 - Set HT parameters of TX data. 11n verification.
 - SKB pool - reuse previously allocated SKBs
 - BH monitor / chip restarter
 - IBSS
 - AP mode
 - U-APSD configuration
 - Memory leak verification, coverity, checkpatch
 = It looks like that's it.

Mainline to compat-wireless-20010-12-03

 No functional changes in this commit.
 + Changes in compat-wireless API.
 + Changes in kerner API.
 + Changes in kernel header structures.

TODO:
 - New code in cw1200_bss_info_changed() needs to be verified.
 - ht_operation_mode needs to be cached in priv.

Some HT refactoring.

 + ht_operation_mode is cached in priv
 + channel_type is cached in priv
 + New header for HT-related code: ht.h
 + Greenfield mode is used for TX if possible.
 + HT flags are reported back to rate control correctly.

TODO:
 - Verify A-MPDU factor settings in cw1200_band_2ghz.

SKB cache is implemented.

Firmware loading refactoring.

 + CUT 2.0 detection is implemented.
 + Standard firmware loading API is used.
 + Firmware loading path is changed to /lib/firmware/cw1200/
 + Firmware is put to the project: ./firmware/

TODO:
 - Firmware copying at build time.

Bringup after mainlining.

+ FW downloading is working now.

TODO:
 - BH thread can't read data block from device.

Init: removing GPIO toggling. Not needed anymore.

WLAN: Fix for missing GPIO_HIGH, GPIO_LOW

The patch defines CW1200_GPIO_{HIGH|LOW} as replacement of
GPIO_{HIGH|LOW}, which might be absent on the target platform.

Also it allows build without compat wireless tree.

Added cw1200 to drivers/staging Kconfig and Makefile.

Added two CONFIG_ flags:

 + CONFIG_CW1200 - Enables the generic cw1200 module
 + CONFIG_CW1200_U8500_PLATFORM - U8500 platform integration

Removed binary firmware files, they do not belong in the kernel tree.

Added TODO file for cw1200 staging driver.

Added more help text to Kconfig

Removed checkpatch warnings. There is still one left.

Removed all checkpatch warnings for cw1200.h

Removed checkpatch warnings from cw1200_stdio.c.

There is still one left.

Removed checkpatch warnings for fwio.h

Removed checkpatch warning for hwio.c

Removed checkpatch warnings for main.c

There are still some warninges left.

Removed checkpatch warnings from queue.c

There are still some warnings left

Removed checkpatch warnings for queue.h

Removed checkpatch warnings for sbus.h

Removed checkpatch warnings for scan.c

Removed checkpatch warnings for scan.h

Removed checkpatch warnings for sta.c

Removed checkpatch warnings for txrc.c

Removed checkpatch warnings for txrx.h

Removed checkpatch warnings from wsm.c

Lots of "line over 80 char..." warnings left.

Minor checkpatch warning cleanup on wsm.c

WLAN: CW1200: Development: SoftAP mode

WLAN: CW1200: AP development.

 + Basic open AP is woking (prototyping done).

TODO:
 - Check AP scan & assoc with sniffer
 - WSM API: TxPowerLevel in scan requests.
 - WSM API: Frame in TX and RX indication.
 - WSM API: Flags in set_bss_params.
 - WSM API: IGTKGroupKey in key info.
 - WSM API: MultiTX confirm
 - WSM API: Config block ACK
 - WSM API: BA timeout indication.

CW1200: WLAN: Fix for a merge error.

This commit fixes build error introduced by WLAN: CW1200: AP development.

WLAN: CW1200: Fix for a warning in net/mac80211/rx.c

WLAN: CW1200: Add / remove key refactoring for AP mode.

Keys are cached in the driver and loaded after wsm_start() is called.

Verified (AP mode):
 + Open security:	OK
 + WEP40:		OK
 + WEP104:		FAIL (WSM_STATUS_DECRYPTFAILURE)
 + CCMP:		FAIL (MIC failure detected by STA. STA->AP decrypted OK)
 + TKIP:		FAIL (MIC failure detected by STA. STA->AP decrypted OK)

WLAN: CW1200: Proper handling of stop request in the AP mode.

WLAN: CW1200: Firmware-driven keep-alive is implemented.

CW1200: SDIO card detection is implemented.

Removed dependency to u8500_sdio_detect_card().
New moule parameter "device" is implemented to point to the SDIO interface
device is connected to.

WLAN: CW1200: Checkpatch cleanup.

 + wsm.c is cleared.
 + sta.c is cleared.
 + ap.c  is cleared.
 + bh.c  is cleared.
 + cw1200_sdio.c is cleared.
 + main.c is cleared.
 + queue.c is cleared.
 + scan.c is cleared.
 + txrx.c is cleared.
 + cw1200.h is cleared.
 + hwio.h is cleared.
 + ht.h  is cleared.
 + wsm_get_tx is (finally!) redesigned.

TODO:
 - wsm.h

WLAN: CW1200: Checkpatch cleanup.

 + wsm.h is cleared.

Code is ready for submission.

WLAN: CW1200: Module parameter for MAC address.

New module parameter for cw1200_core.ko: "macaddr".
Usage: modprobe cw1200_core macaddr=0x00,0x80,0xE1,0x30,0x40,0x50
Random MAC address by default.

WLAN: CW1200: Fix for a crash in skb_release_data().

WLAN: CW1200: Fix for a too short WSM timeout in stressed condition.

WLAN: CW1200: Bugfix after regression testing.

Datapath is verified (several gigabytes of downloaded data).

WLAN: STA mode development.

 + AP API sta_add/sta_semove is implemented.
 + wsm_suspend_resume_indication is implemented.
 + Unique link ID is allocated for STAs in AP mode as WSM requires.
 + wsm_map_link is implemented.
 + wsm_reset is modified to support multiple link IDs.
 + cw1200_suspend_resume handler is implemented in the ap.c.
 + no more hardcoded SSIDs
 + Debug logs functionality is exposed to the kernel config.
 + Suspend / resume is supported by queue.
 + TKIP multicast TX (AP mode) is fixed.

TODO:
 - AP mode with powersave is not verified.

WLAN: Support for non-power-of-two SDIO transfer.

WLAN: AP mode verification and bugfixing.

 + Fix for broken broadcasts.
 + Redesign of PS implementation in AP mode.
 + set_tim() is implemented.
 + sta_notify() is implemented.

WLAN: IV/ICV injection fixed.

Fixed: skb was modified prior to sanity check.

There is also a workaround against a bug in WSM_A21.05.0288
firmware in this commit. In AP mode FW calculates FCS incorrectly
when DA is FF:FF:FF:FF:FF:FF (was seen with TKIP and CCMP security).
Workaround checks DA and replaces FF:FF:FF:FF:FF:FF with multicast
address 01:00:5E:00:00:16. Workaround is disabled by #if 0 (can be
used only for verification, should not be enabled in production).

WLAN: Disabling debug printouts (STA/AP).

WLAN: Updating u8500_defconfig with CW1200 driver.

WLAN: AP mode fine-tuning.

 + Explicitly set broadcast bit in TIM when broadcasts are available.
 + Split handling of management frames (link ID = 0) and buffered
   multicasts (link ID = CW1200_LINK_ID_AFTER_DTIM)

Signed-off-by: Dmitry Tarnyagin <dmitry.tarnyagin@stericsson.com>

1 files changed, 560 insertions, 0 deletions

diff --git a/drivers/staging/cw1200/fwio.c b/drivers/staging/cw1200/fwio.c
new file mode 100644
index 00000000000..a85062e2e3a
--- /dev/null
+++ b/drivers/staging/cw1200/fwio.c
@@ -0,0 +1,560 @@
+/*
+ * Firmware I/O code for mac80211 ST-Ericsson CW1200 drivers
+ *
+ * Copyright (c) 2010, ST-Ericsson
+ * Author: Dmitry Tarnyagin <dmitry.tarnyagin@stericsson.com>
+ *
+ * Based on:
+ * ST-Ericsson UMAC CW1200 driver which is
+ * Copyright (c) 2010, ST-Ericsson
+ * Author: Ajitpal Singh <ajitpal.singh@stericsson.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/init.h>
+#include <linux/vmalloc.h>
+#include <linux/sched.h>
+#include <linux/firmware.h>
+
+#include "cw1200.h"
+#include "fwio.h"
+#include "hwio.h"
+#include "sbus.h"
+#include "bh.h"
+
+static int cw1200_get_hw_type(u32 config_reg_val, int *major_revision)
+{
+	int hw_type = -1;
+	u32 silicon_type = (config_reg_val >> 24) & 0x3;
+	u32 silicon_vers = (config_reg_val >> 31) & 0x1;
+
+	/* Check if we have CW1200 or STLC9000 */
+	if ((silicon_type == 0x1) || (silicon_type == 0x2)) {
+		*major_revision = silicon_type;
+		if (silicon_vers)
+			hw_type = HIF_8601_VERSATILE;
+		else
+			hw_type = HIF_8601_SILICON;
+	} else {
+		*major_revision = 1;
+		hw_type = HIF_9000_SILICON_VERSTAILE;
+	}
+
+	return hw_type;
+}
+
+static int config_reg_read_stlc9000(struct cw1200_common *priv,
+				    u16 reg, u32 *val)
+{
+	u16 val16;
+	int ret = cw1200_reg_read_16(priv, reg, &val16);
+	if (ret < 0)
+		return ret;
+	*val = val16;
+	return 0;
+}
+
+static int config_reg_write_stlc9000(struct cw1200_common *priv,
+				     u16 reg, u32 val)
+{
+	return cw1200_reg_write_16(priv, reg, (u16)val);
+}
+
+static int cw1200_load_firmware_cw1200(struct cw1200_common *priv)
+{
+	int ret, block, num_blocks;
+	unsigned i;
+	u32 val32;
+	u32 put = 0, get = 0;
+	u8 *buf = NULL;
+	const char *fw_path;
+	const struct firmware *firmware = NULL;
+
+	/* Macroses are local. */
+#define APB_WRITE(reg, val) \
+	do { \
+		ret = cw1200_apb_write_32(priv, CW12000_APB(reg), (val)); \
+		if (ret < 0) { \
+			cw1200_dbg(CW1200_DBG_ERROR, \
+				"%s: can't write %s at line %d.\n", \
+				__func__, #reg, __LINE__); \
+			goto error; \
+		} \
+	} while (0)
+#define APB_READ(reg, val) \
+	do { \
+		ret = cw1200_apb_read_32(priv, CW12000_APB(reg), &(val)); \
+		if (ret < 0) { \
+			cw1200_dbg(CW1200_DBG_ERROR, \
+				"%s: can't read %s at line %d.\n", \
+				__func__, #reg, __LINE__); \
+			goto error; \
+		} \
+	} while (0)
+#define REG_WRITE(reg, val) \
+	do { \
+		ret = cw1200_reg_write_32(priv, (reg), (val)); \
+		if (ret < 0) { \
+			cw1200_dbg(CW1200_DBG_ERROR, \
+				"%s: can't write %s at line %d.\n", \
+				__func__, #reg, __LINE__); \
+			goto error; \
+		} \
+	} while (0)
+#define REG_READ(reg, val) \
+	do { \
+		ret = cw1200_reg_read_32(priv, (reg), &(val)); \
+		if (ret < 0) { \
+			cw1200_dbg(CW1200_DBG_ERROR, \
+				"%s: can't read %s at line %d.\n", \
+				__func__, #reg, __LINE__); \
+			goto error; \
+		} \
+	} while (0)
+
+	switch (priv->hw_revision) {
+	case CW1200_HW_REV_CUT10:
+		fw_path = FIRMWARE_CUT10;
+		break;
+	case CW1200_HW_REV_CUT11:
+		fw_path = FIRMWARE_CUT11;
+		break;
+	case CW1200_HW_REV_CUT20:
+		fw_path = FIRMWARE_CUT20;
+		break;
+	default:
+		cw1200_dbg(CW1200_DBG_ERROR,
+			"%s: invalid silicon revision %d.\n",
+			__func__, priv->hw_revision);
+		return -EINVAL;
+	}
+
+	/* Initialize common registers */
+	APB_WRITE(DOWNLOAD_IMAGE_SIZE_REG, DOWNLOAD_ARE_YOU_HERE);
+	APB_WRITE(DOWNLOAD_PUT_REG, 0);
+	APB_WRITE(DOWNLOAD_GET_REG, 0);
+	APB_WRITE(DOWNLOAD_STATUS_REG, DOWNLOAD_PENDING);
+	APB_WRITE(DOWNLOAD_FLAGS_REG, 0);
+
+	/* Write the NOP Instruction */
+	REG_WRITE(ST90TDS_SRAM_BASE_ADDR_REG_ID, 0xFFF20000);
+	REG_WRITE(ST90TDS_AHB_DPORT_REG_ID, 0xEAFFFFFE);
+
+	/* Release CPU from RESET */
+	REG_READ(ST90TDS_CONFIG_REG_ID, val32);
+	val32 &= ~ST90TDS_CONFIG_CPU_RESET_BIT;
+	REG_WRITE(ST90TDS_CONFIG_REG_ID, val32);
+
+	/* Enable Clock */
+	val32 &= ~ST90TDS_CONFIG_CPU_CLK_DIS_BIT;
+	REG_WRITE(ST90TDS_CONFIG_REG_ID, val32);
+
+	/* Load a firmware file */
+	ret = request_firmware(&firmware, fw_path, priv->pdev);
+	if (ret) {
+		cw1200_dbg(CW1200_DBG_ERROR,
+			"%s: can't load firmware file %s.\n",
+			__func__, fw_path);
+		goto error;
+	}
+	BUG_ON(!firmware->data);
+
+	buf = kmalloc(DOWNLOAD_BLOCK_SIZE, GFP_KERNEL | GFP_DMA);
+	if (!buf) {
+		cw1200_dbg(CW1200_DBG_ERROR,
+			"%s: can't allocate firmware buffer.\n", __func__);
+		ret = -ENOMEM;
+		goto error;
+	}
+
+	/* Check if the bootloader is ready */
+	for (i = 0; i < 100; i += 1 + i / 2) {
+		APB_READ(DOWNLOAD_IMAGE_SIZE_REG, val32);
+		if (val32 == DOWNLOAD_I_AM_HERE)
+			break;
+		mdelay(i);
+	} /* End of for loop */
+
+	if (val32 != DOWNLOAD_I_AM_HERE) {
+		cw1200_dbg(CW1200_DBG_ERROR,
+			"%s: bootloader is not ready.\n", __func__);
+		ret = -ETIMEDOUT;
+		goto error;
+	}
+
+	/* Calculcate number of download blocks */
+	num_blocks = (firmware->size - 1) / DOWNLOAD_BLOCK_SIZE + 1;
+
+	/* Updating the length in Download Ctrl Area */
+	val32 = firmware->size; /* Explicit cast from size_t to u32 */
+	APB_WRITE(DOWNLOAD_IMAGE_SIZE_REG, val32);
+
+	/* Firmware downloading loop */
+	for (block = 0; block < num_blocks ; block++) {
+		size_t tx_size;
+		size_t block_size;
+
+		/* check the download status */
+		APB_READ(DOWNLOAD_STATUS_REG, val32);
+		if (val32 != DOWNLOAD_PENDING) {
+			cw1200_dbg(CW1200_DBG_ERROR,
+				"%s: bootloader reported error %d.\n",
+				__func__, val32);
+			ret = -EIO;
+			goto error;
+		}
+
+		/* loop until put - get <= 24K */
+		for (i = 0; i < 100; i++) {
+			APB_READ(DOWNLOAD_GET_REG, get);
+			if ((put - get) <=
+			    (DOWNLOAD_FIFO_SIZE - DOWNLOAD_BLOCK_SIZE))
+				break;
+			mdelay(i);
+		}
+
+		if ((put - get) > (DOWNLOAD_FIFO_SIZE - DOWNLOAD_BLOCK_SIZE)) {
+			cw1200_dbg(CW1200_DBG_ERROR,
+				"%s: Timeout waiting for FIFO.\n",
+				__func__);
+			return -ETIMEDOUT;
+		}
+
+		/* calculate the block size */
+		tx_size = block_size = min((size_t)(firmware->size - put),
+			(size_t)DOWNLOAD_BLOCK_SIZE);
+
+		memcpy(buf, &firmware->data[put], block_size);
+#ifdef BUG_POWER_OF_TWO_BLOCKSIZE
+		if (block_size < DOWNLOAD_BLOCK_SIZE) {
+			memset(&buf[block_size],
+				0, DOWNLOAD_BLOCK_SIZE - block_size);
+			tx_size = DOWNLOAD_BLOCK_SIZE;
+		}
+#endif /* BUG_POWER_OF_TWO_BLOCKSIZE */
+
+		/* send the block to sram */
+		ret = cw1200_apb_write(priv,
+			CW12000_APB(DOWNLOAD_FIFO_OFFSET +
+				(put & (DOWNLOAD_FIFO_SIZE - 1))),
+			buf, tx_size);
+		if (ret < 0) {
+			cw1200_dbg(CW1200_DBG_ERROR,
+				"%s: can't write block at line %d.\n",
+				__func__, __LINE__);
+			goto error;
+		}
+
+		/* update the put register */
+		put += block_size;
+		APB_WRITE(DOWNLOAD_PUT_REG, put);
+	} /* End of firmware download loop */
+
+	/* Wait for the download completion */
+	for (i = 0; i < 300; i += 1 + i / 2) {
+		APB_READ(DOWNLOAD_STATUS_REG, val32);
+		if (val32 != DOWNLOAD_PENDING)
+			break;
+		mdelay(i);
+	}
+	if (val32 != DOWNLOAD_SUCCESS) {
+		cw1200_dbg(CW1200_DBG_ERROR,
+			"%s: wait for download completion failed. " \
+			"Read: 0x%.8X\n", __func__, val32);
+		ret = -ETIMEDOUT;
+		goto error;
+	} else {
+		cw1200_dbg(CW1200_DBG_MSG,
+			"Firmware download completed.\n");
+		ret = 0;
+	}
+
+error:
+	kfree(buf);
+	if (firmware)
+		release_firmware(firmware);
+	return ret;
+
+#undef APB_WRITE
+#undef APB_READ
+#undef REG_WRITE
+#undef REG_READ
+}
+
+int cw1200_load_firmware(struct cw1200_common *priv)
+{
+	int ret;
+	int i;
+	u32 val32;
+	u16 val16;
+	u32 dpll = 0;
+	int major_revision;
+	int (*config_reg_read)(struct cw1200_common *priv, u16 reg, u32 *val);
+	int (*config_reg_write)(struct cw1200_common *priv, u16 reg, u32 val);
+
+	BUG_ON(!priv);
+
+	/* Read CONFIG Register Value - We will read 32 bits */
+	ret = cw1200_reg_read_32(priv, ST90TDS_CONFIG_REG_ID, &val32);
+	if (ret < 0) {
+		cw1200_dbg(CW1200_DBG_ERROR,
+			"%s: can't read config register.\n", __func__);
+		goto out;
+	}
+
+	priv->hw_type = cw1200_get_hw_type(val32, &major_revision);
+	if (priv->hw_type < 0) {
+		cw1200_dbg(CW1200_DBG_ERROR,
+			"%s: can't deduct hardware type.\n", __func__);
+		ret = -ENOTSUPP;
+		goto out;
+	}
+
+	switch (priv->hw_type) {
+	case HIF_8601_VERSATILE:
+	case HIF_8601_SILICON:
+		dpll = DPLL_INIT_VAL_CW1200;
+		config_reg_read = cw1200_reg_read_32;
+		config_reg_write = cw1200_reg_write_32;
+		break;
+	case HIF_9000_SILICON_VERSTAILE:
+		dpll = DPLL_INIT_VAL_9000;
+		config_reg_read = config_reg_read_stlc9000;
+		config_reg_write = config_reg_write_stlc9000;
+		break;
+	default:
+		BUG_ON(1);
+	}
+
+	ret = cw1200_reg_write_32(priv, ST90TDS_TSET_GEN_R_W_REG_ID, dpll);
+	if (ret < 0) {
+		cw1200_dbg(CW1200_DBG_ERROR,
+			"%s: can't write DPLL register.\n", __func__);
+		goto out;
+	}
+
+	msleep(20);
+
+	/* Read DPLL Reg value and compare with value written */
+	ret = cw1200_reg_read_32(priv,
+		ST90TDS_TSET_GEN_R_W_REG_ID, &val32);
+	if (ret < 0) {
+		cw1200_dbg(CW1200_DBG_ERROR,
+			"%s: can't read DPLL register.\n", __func__);
+		goto out;
+	}
+
+	if (val32 != dpll) {
+		cw1200_dbg(CW1200_DBG_ERROR,
+			"%s: unable to initialise " \
+			"DPLL register. Wrote 0x%.8X, read 0x%.8X.\n",
+			__func__, dpll, val32);
+		ret = -EIO;
+		goto out;
+	}
+
+	/* Set wakeup bit in device */
+	ret = cw1200_reg_read_16(priv, ST90TDS_CONTROL_REG_ID, &val16);
+	if (ret < 0) {
+		cw1200_dbg(CW1200_DBG_ERROR,
+			"%s: set_wakeup: can't read " \
+			"control register.\n", __func__);
+		goto out;
+	}
+
+	ret = cw1200_reg_write_16(priv, ST90TDS_CONTROL_REG_ID,
+		val16 | ST90TDS_CONT_WUP_BIT);
+	if (ret < 0) {
+		cw1200_dbg(CW1200_DBG_ERROR,
+			"%s: set_wakeup: can't write " \
+			"control register.\n", __func__);
+		goto out;
+	}
+
+	/* Wait for wakeup */
+	for (i = 0 ; i < 300 ; i += 1 + i / 2) {
+		ret = cw1200_reg_read_16(priv,
+			ST90TDS_CONTROL_REG_ID, &val16);
+		if (ret < 0) {
+			cw1200_dbg(CW1200_DBG_ERROR,
+				"%s: wait_for_wakeup: can't read " \
+				"control register.\n", __func__);
+			goto out;
+		}
+
+		if (val16 & ST90TDS_CONT_RDY_BIT) {
+			cw1200_dbg(CW1200_DBG_MSG,
+				"WLAN device is ready.\n");
+			break;
+		}
+		msleep(i);
+	}
+
+	if ((val16 & ST90TDS_CONT_RDY_BIT) == 0) {
+		cw1200_dbg(CW1200_DBG_ERROR,
+			"%s: wait_for_wakeup: device is not responding.\n",
+			__func__);
+		ret = -ETIMEDOUT;
+		goto out;
+	}
+
+	if (major_revision == 1) {
+		/* CW1200 Hardware detection logic : Check for CUT1.1 */
+		ret = cw1200_ahb_read_32(priv, CW1200_CUT_ID_ADDR, &val32);
+		if (ret) {
+			cw1200_dbg(CW1200_DBG_ERROR,
+				"%s: HW detection: can't read CUT ID.\n",
+				__func__);
+			goto out;
+		}
+
+		switch (val32) {
+		case CW1200_CUT_11_ID_STR:
+			cw1200_dbg(CW1200_DBG_MSG,
+				   "Cut 1.1 silicon is detected.\n");
+			priv->hw_revision = CW1200_HW_REV_CUT11;
+			break;
+		default:
+			cw1200_dbg(CW1200_DBG_MSG,
+				   "Cut 1.0 silicon is detected.\n");
+			priv->hw_revision = CW1200_HW_REV_CUT10;
+			break;
+		}
+	} else if (major_revision == 2) {
+		cw1200_dbg(CW1200_DBG_MSG, "Cut 2.0 silicon is detected.\n");
+		priv->hw_revision = CW1200_HW_REV_CUT20;
+	} else {
+		cw1200_dbg(CW1200_DBG_ERROR,
+			"%s: unsupported silicon major revision %d.\n",
+			__func__, major_revision);
+		ret = -ENOTSUPP;
+		goto out;
+	}
+
+	/* Checking for access mode */
+	ret = config_reg_read(priv, ST90TDS_CONFIG_REG_ID, &val32);
+	if (ret < 0) {
+		cw1200_dbg(CW1200_DBG_ERROR,
+			"%s: check_access_mode: can't read " \
+			"config register.\n", __func__);
+		goto out;
+	}
+
+	if (val32 & ST90TDS_CONFIG_ACCESS_MODE_BIT) {
+		switch (priv->hw_type)  {
+		case HIF_8601_SILICON:
+			cw1200_dbg(CW1200_DBG_MSG,
+				"%s: CW1200 detected.\n", __func__);
+			ret = cw1200_load_firmware_cw1200(priv);
+			break;
+		case HIF_8601_VERSATILE:
+			/* TODO: Not implemented yet!
+			ret = cw1200_load_firmware_cw1100(priv);
+			*/
+			ret = -ENOTSUPP;
+			goto out;
+		case HIF_9000_SILICON_VERSTAILE:
+			/* TODO: Not implemented yet!
+			ret = cw1200_load_firmware_stlc9000(priv);
+			*/
+			ret = -ENOTSUPP;
+			goto out;
+		default:
+			cw1200_dbg(CW1200_DBG_ERROR,
+				"%s: Unknown hardware: %d.\n",
+				__func__, priv->hw_type);
+		}
+		if (ret < 0) {
+			cw1200_dbg(CW1200_DBG_ERROR,
+				"%s: can't download firmware.\n", __func__);
+			goto out;
+		}
+	} else {
+		cw1200_dbg(CW1200_DBG_MSG,
+			"%s: check_access_mode: device is already " \
+			"in QUEUE mode.\n", __func__);
+		/* TODO: verify this branch. Do we need something to do? */
+	}
+
+	/* Register Interrupt Handler */
+	ret = priv->sbus_ops->irq_subscribe(priv->sbus_priv,
+		(sbus_irq_handler)cw1200_irq_handler, priv);
+	if (ret < 0) {
+		cw1200_dbg(CW1200_DBG_ERROR,
+			"%s: can't register IRQ handler.\n", __func__);
+		goto out;
+	}
+
+	if (HIF_8601_SILICON  == priv->hw_type) {
+		/* If device is CW1200 the IRQ enable/disable bits
+		 * are in CONFIG register */
+		ret = config_reg_read(priv, ST90TDS_CONFIG_REG_ID, &val32);
+		if (ret < 0) {
+			cw1200_dbg(CW1200_DBG_ERROR,
+				"%s: enable_irq: can't read " \
+				"config register.\n", __func__);
+			goto unsubscribe;
+		}
+		ret = config_reg_write(priv, ST90TDS_CONFIG_REG_ID,
+			val32 | ST90TDS_CONF_IRQ_RDY_ENABLE);
+		if (ret < 0) {
+			cw1200_dbg(CW1200_DBG_ERROR,
+				"%s: enable_irq: can't write " \
+				"config register.\n", __func__);
+			goto unsubscribe;
+		}
+	} else {
+		/* If device is STLC9000 the IRQ enable/disable bits
+		 * are in CONTROL register */
+		/* Enable device interrupts - Both DATA_RDY and WLAN_RDY */
+		ret = cw1200_reg_read_16(priv, ST90TDS_CONFIG_REG_ID, &val16);
+		if (ret < 0) {
+			cw1200_dbg(CW1200_DBG_ERROR,
+				"%s: enable_irq: can't read " \
+				"control register.\n", __func__);
+			goto unsubscribe;
+		}
+		ret = cw1200_reg_write_16(priv, ST90TDS_CONFIG_REG_ID,
+			val16 | ST90TDS_CONT_IRQ_RDY_ENABLE);
+		if (ret < 0) {
+			cw1200_dbg(CW1200_DBG_ERROR,
+				"%s: enable_irq: can't write " \
+				"control register.\n", __func__);
+			goto unsubscribe;
+		}
+
+	}
+
+	/* Configure device for MESSSAGE MODE */
+	ret = config_reg_read(priv, ST90TDS_CONFIG_REG_ID, &val32);
+	if (ret < 0) {
+		cw1200_dbg(CW1200_DBG_ERROR,
+			"%s: set_mode: can't read config register.\n",
+			__func__);
+		goto unsubscribe;
+	}
+	ret = config_reg_write(priv, ST90TDS_CONFIG_REG_ID,
+		val32 & ~ST90TDS_CONFIG_ACCESS_MODE_BIT);
+	if (ret < 0) {
+		cw1200_dbg(CW1200_DBG_ERROR,
+			"%s: set_mode: can't write config register.\n",
+			__func__);
+		goto unsubscribe;
+	}
+
+	/* Unless we read the CONFIG Register we are
+	 * not able to get an interrupt */
+	mdelay(10);
+	config_reg_read(priv, ST90TDS_CONFIG_REG_ID, &val32);
+
+out:
+	return ret;
+
+unsubscribe:
+	priv->sbus_ops->irq_unsubscribe(priv->sbus_priv);
+	return ret;
+}
+