db8500: Clean up PRCMU code in db8500 SoC code

Clean up of PRCMU code in db8500 SoC code. Move things from cpu.c
and clock.h to prcmu.c. Also remove duplicate #defines and have
prcmu.c use the #defines in prcmu.h.

ST-Ericsson ID: None
Signed-off-by: Joakim Axelsson <joakim.axelsson@stericsson.com>
Change-Id: Ieffb0094b3f43f0c88f3ed457c6cb296fa0ce378
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/9899
Reviewed-by: QATOOLS
Reviewed-by: Michael BRANDT <michael.brandt@stericsson.com>
Tested-by: Michael BRANDT <michael.brandt@stericsson.com>

4 files changed, 36 insertions, 66 deletions

diff --git a/cpu/arm_cortexa9/db8500/cpu.c b/cpu/arm_cortexa9/db8500/cpu.c
index eb25b247f..e05eaad9b 100644
--- a/cpu/arm_cortexa9/db8500/cpu.c
+++ b/cpu/arm_cortexa9/db8500/cpu.c
@@ -55,23 +55,7 @@ static void init_regs(void)
 			*((volatile unsigned int *)(addr_vall_arr[2 * i]))
 				= addr_vall_arr[(2 * i) + 1];
 	} else {
-		struct prcmu *prcmu = (struct prcmu *) U8500_PRCMU_BASE;
-
-		/* Enable timers */
-		writel(1 << 17, &prcmu->tcr);
-
-		u8500_prcmu_enable(&prcmu->per1clk_mgt);
-		u8500_prcmu_enable(&prcmu->per2clk_mgt);
-		u8500_prcmu_enable(&prcmu->per3clk_mgt);
-		u8500_prcmu_enable(&prcmu->per5clk_mgt);
-		u8500_prcmu_enable(&prcmu->per6clk_mgt);
-		u8500_prcmu_enable(&prcmu->per7clk_mgt);
-
-		u8500_prcmu_enable(&prcmu->uartclk_mgt);
-		u8500_prcmu_enable(&prcmu->i2cclk_mgt);
-
-		u8500_prcmu_enable(&prcmu->sdmmcclk_mgt);
-
+		db8500_prcmu_init();
 		db8500_clocks_init();
 	}
 }
diff --git a/cpu/arm_cortexa9/db8500/prcmu.c b/cpu/arm_cortexa9/db8500/prcmu.c
index 1cd4a7f8e..a82379f94 100644
--- a/cpu/arm_cortexa9/db8500/prcmu.c
+++ b/cpu/arm_cortexa9/db8500/prcmu.c
@@ -17,7 +17,7 @@
 #include <config.h>
 #include <asm/io.h>
 #include <asm/arch/cpu.h>
-#include <asm/arch/hardware.h>
+#include <asm/arch/prcmu.h>
 #include <asm/types.h>
 #include <asm/io.h>
 #include <asm/errno.h>
@@ -204,3 +204,28 @@ int prcmu_i2c_write(u8 reg, u16 slave, u8 reg_data)
 		return -1;
 	}
 }
+
+static void prcmu_enable(u32 *reg)
+{
+	writel(readl(reg) | (1 << 8), reg);
+}
+
+void db8500_prcmu_init(void)
+{
+	/* Enable timers */
+	writel(1 << 17, PRCM_TCR);
+
+	prcmu_enable((u32 *)PRCM_PER1CLK_MGT_REG);
+	prcmu_enable((u32 *)PRCM_PER2CLK_MGT_REG);
+	prcmu_enable((u32 *)PRCM_PER3CLK_MGT_REG);
+	/* PER4CLK does not exist */
+	prcmu_enable((u32 *)PRCM_PER5CLK_MGT_REG);
+	prcmu_enable((u32 *)PRCM_PER6CLK_MGT_REG);
+	/* Only exists in ED but is always ok to write to */
+	prcmu_enable((u32 *)PRCM_PER7CLK_MGT_REG);
+
+	prcmu_enable((u32 *)PRCM_UARTCLK_MGT_REG);
+	prcmu_enable((u32 *)PRCM_I2CCLK_MGT_REG);
+
+	prcmu_enable((u32 *)PRCM_SDMMCCLK_MGT_REG);
+}
diff --git a/include/asm-arm/arch-db8500/clock.h b/include/asm-arm/arch-db8500/clock.h
index 76d35eb86..f9deba524 100644
--- a/include/asm-arm/arch-db8500/clock.h
+++ b/include/asm-arm/arch-db8500/clock.h
@@ -23,50 +23,6 @@
 #ifndef __ASM_ARCH_CLOCK
 #define __ASM_ARCH_CLOCK
 
-struct prcmu {
-	unsigned int armclkfix_mgt;
-	unsigned int armclk_mgt;
-	unsigned int svammdspclk_mgt;
-	unsigned int siammdspclk_mgt;
-	unsigned int reserved;
-	unsigned int sgaclk_mgt;
-	unsigned int uartclk_mgt;
-	unsigned int msp02clk_mgt;
-	unsigned int i2cclk_mgt;
-	unsigned int sdmmcclk_mgt;
-	unsigned int slimclk_mgt;
-	unsigned int per1clk_mgt;
-	unsigned int per2clk_mgt;
-	unsigned int per3clk_mgt;
-	unsigned int per5clk_mgt;
-	unsigned int per6clk_mgt;
-	unsigned int per7clk_mgt;
-	unsigned int lcdclk_mgt;
-	unsigned int reserved1;
-	unsigned int bmlclk_mgt;
-	unsigned int hsitxclk_mgt;
-	unsigned int hsirxclk_mgt;
-	unsigned int hdmiclk_mgt;
-	unsigned int apeatclk_mgt;
-	unsigned int apetraceclk_mgt;
-	unsigned int mcdeclk_mgt;
-	unsigned int ipi2cclk_mgt;
-	unsigned int dsialtclk_mgt;
-	unsigned int spare2clk_mgt;
-	unsigned int dmaclk_mgt;
-	unsigned int b2r2clk_mgt;
-	unsigned int tvclk_mgt;
-	unsigned int unused[82];
-	unsigned int tcr;
-	unsigned int unused1[23];
-	unsigned int ape_softrst;
-};
-
-static inline void u8500_prcmu_enable(unsigned int *reg)
-{
-	writel(readl(reg) | (1 << 8), reg);
-}
-
 /* Enable all clocks u-boot needs in db8500 SoC platform */
 void db8500_clocks_init(void);
 
diff --git a/include/asm-arm/arch-db8500/prcmu.h b/include/asm-arm/arch-db8500/prcmu.h
index 45f800038..f7709e2d7 100644
--- a/include/asm-arm/arch-db8500/prcmu.h
+++ b/include/asm-arm/arch-db8500/prcmu.h
@@ -12,6 +12,8 @@
 #ifndef __PRCMU_H__
 #define __PRCMU_H__
 
+#include <asm/arch/hardware.h>
+
 /* Power, Reset, Clock Management Unit */
 /*
  * SVA: Smart Video Accelerator
@@ -19,8 +21,8 @@
  * SGA: Smart Graphic accelerator
  * B2R2: Graphic blitter
  */
-#define PRCMU_BASE	CFG_PRCMU_BASE  /* 0x80157000 for U8500 */
-#define PRCM_ARMCLKFIX_MGT_REG		(PRCMU_BASE + 0x000)
+#define PRCMU_BASE			U8500_PRCMU_BASE
+#define PRCM_ARMCLKFIX_MGT_REG	(PRCMU_BASE + 0x000)
 #define PRCM_ACLK_MGT_REG		(PRCMU_BASE + 0x004)
 #define PRCM_SVAMMDSPCLK_MGT_REG	(PRCMU_BASE + 0x008)
 #define PRCM_SIAMMDSPCLK_MGT_REG	(PRCMU_BASE + 0x00C)
@@ -29,7 +31,7 @@
 #define PRCM_UARTCLK_MGT_REG		(PRCMU_BASE + 0x018)
 #define PRCM_MSPCLK_MGT_REG		(PRCMU_BASE + 0x01C)
 #define PRCM_I2CCLK_MGT_REG		(PRCMU_BASE + 0x020)
-#define PRCM_SDMMCCLK_MGT_REG		(PRCMU_BASE + 0x024)
+#define PRCM_SDMMCCLK_MGT_REG	(PRCMU_BASE + 0x024)
 #define PRCM_SLIMCLK_MGT_REG		(PRCMU_BASE + 0x028)
 #define PRCM_PER1CLK_MGT_REG		(PRCMU_BASE + 0x02C)
 #define PRCM_PER2CLK_MGT_REG		(PRCMU_BASE + 0x030)
@@ -44,9 +46,12 @@
 #define PRCM_PLLSOC1_FREQ_REG		(PRCMU_BASE + 0x084)
 #define PRCM_PLLARM_FREQ_REG		(PRCMU_BASE + 0x088)
 #define PRCM_PLLDDR_FREQ_REG		(PRCMU_BASE + 0x08C)
-#define PRCM_ARM_CHGCLKREQ_REG		(PRCMU_BASE + 0x114)
+#define PRCM_ARM_CHGCLKREQ_REG	(PRCMU_BASE + 0x114)
 
 #define PRCM_TCR			(PRCMU_BASE + 0x1C8)
 
+/* Init PRCMU relatated things in db8500 SoC platform */
+void db8500_prcmu_init(void);
+
 #endif /* __PRCMU_H__ */