ppc4xx: Consolidate pci_pre_init() function

This patch removes the duplicted implementations of the pci_pre_init()
function by introducing a weak default function for it. This weak default
has a different implementation for some PPC variants. It can be
overridden by a board specific version.

Signed-off-by: Stefan Roese <sr@denx.de>

2 files changed, 1 insertions, 113 deletions

diff --git a/board/esd/du440/du440.c b/board/esd/du440/du440.c
index 866dcafcf..af50a1ef8 100644
--- a/board/esd/du440/du440.c
+++ b/board/esd/du440/du440.c
@@ -360,60 +360,6 @@ int checkboard(void)
 	return (0);
 }
 
-/*
- * pci_pre_init
- *
- * This routine is called just prior to registering the hose and gives
- * the board the opportunity to check things. Returning a value of zero
- * indicates that things are bad & PCI initialization should be aborted.
- *
- * Different boards may wish to customize the pci controller structure
- * (add regions, override default access routines, etc) or perform
- * certain pre-initialization actions.
- */
-#if defined(CONFIG_PCI)
-int pci_pre_init(struct pci_controller *hose)
-{
-	unsigned long addr;
-
-	/*
-	 * Set priority for all PLB3 devices to 0.
-	 * Set PLB3 arbiter to fair mode.
-	 */
-	mfsdr(SD0_AMP1, addr);
-	mtsdr(SD0_AMP1, (addr & 0x000000FF) | 0x0000FF00);
-	addr = mfdcr(PLB3_ACR);
-	mtdcr(PLB3_ACR, addr | 0x80000000);
-
-	/*
-	 * Set priority for all PLB4 devices to 0.
-	 */
-	mfsdr(SD0_AMP0, addr);
-	mtsdr(SD0_AMP0, (addr & 0x000000FF) | 0x0000FF00);
-	addr = mfdcr(PLB4_ACR) | 0xa0000000; /* Was 0x8---- */
-	mtdcr(PLB4_ACR, addr);
-
-	/*
-	 * Set Nebula PLB4 arbiter to fair mode.
-	 */
-	/* Segment0 */
-	addr = (mfdcr(PLB0_ACR) & ~PLB0_ACR_PPM_MASK) | PLB0_ACR_PPM_FAIR;
-	addr = (addr & ~PLB0_ACR_HBU_MASK) | PLB0_ACR_HBU_ENABLED;
-	addr = (addr & ~PLB0_ACR_RDP_MASK) | PLB0_ACR_RDP_4DEEP;
-	addr = (addr & ~PLB0_ACR_WRP_MASK) | PLB0_ACR_WRP_2DEEP;
-	mtdcr(PLB0_ACR, addr);
-
-	/* Segment1 */
-	addr = (mfdcr(PLB1_ACR) & ~PLB1_ACR_PPM_MASK) | PLB1_ACR_PPM_FAIR;
-	addr = (addr & ~PLB1_ACR_HBU_MASK) | PLB1_ACR_HBU_ENABLED;
-	addr = (addr & ~PLB1_ACR_RDP_MASK) | PLB1_ACR_RDP_4DEEP;
-	addr = (addr & ~PLB1_ACR_WRP_MASK) | PLB1_ACR_WRP_2DEEP;
-	mtdcr(PLB1_ACR, addr);
-
-	return 1;
-}
-#endif /* defined(CONFIG_PCI) */
-
 #if defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_MASTER_INIT)
 void pci_master_init(struct pci_controller *hose)
 {
diff --git a/board/esd/pmc440/pmc440.c b/board/esd/pmc440/pmc440.c
index 10901b400..c5dc486cd 100644
--- a/board/esd/pmc440/pmc440.c
+++ b/board/esd/pmc440/pmc440.c
@@ -478,7 +478,7 @@ int checkboard(void)
 /*
  * Assign interrupts to PCI devices. Some OSs rely on this.
  */
-void pmc440_pci_fixup_irq(struct pci_controller *hose, pci_dev_t dev)
+void board_pci_fixup_irq(struct pci_controller *hose, pci_dev_t dev)
 {
 	unsigned char int_line[] = {IRQ_PCIC, IRQ_PCID, IRQ_PCIA, IRQ_PCIB};
 
@@ -488,64 +488,6 @@ void pmc440_pci_fixup_irq(struct pci_controller *hose, pci_dev_t dev)
 #endif
 
 /*
- * pci_pre_init
- *
- * This routine is called just prior to registering the hose and gives
- * the board the opportunity to check things. Returning a value of zero
- * indicates that things are bad & PCI initialization should be aborted.
- *
- * Different boards may wish to customize the pci controller structure
- * (add regions, override default access routines, etc) or perform
- * certain pre-initialization actions.
- */
-#if defined(CONFIG_PCI)
-int pci_pre_init(struct pci_controller *hose)
-{
-	unsigned long addr;
-
-	/*
-	 * Set priority for all PLB3 devices to 0.
-	 * Set PLB3 arbiter to fair mode.
-	 */
-	mfsdr(SD0_AMP1, addr);
-	mtsdr(SD0_AMP1, (addr & 0x000000FF) | 0x0000FF00);
-	addr = mfdcr(PLB3_ACR);
-	mtdcr(PLB3_ACR, addr | 0x80000000);
-
-	/*
-	 * Set priority for all PLB4 devices to 0.
-	 */
-	mfsdr(SD0_AMP0, addr);
-	mtsdr(SD0_AMP0, (addr & 0x000000FF) | 0x0000FF00);
-	addr = mfdcr(PLB4_ACR) | 0xa0000000;	/* Was 0x8---- */
-	mtdcr(PLB4_ACR, addr);
-
-	/*
-	 * Set Nebula PLB4 arbiter to fair mode.
-	 */
-	/* Segment0 */
-	addr = (mfdcr(PLB0_ACR) & ~PLB0_ACR_PPM_MASK) | PLB0_ACR_PPM_FAIR;
-	addr = (addr & ~PLB0_ACR_HBU_MASK) | PLB0_ACR_HBU_ENABLED;
-	addr = (addr & ~PLB0_ACR_RDP_MASK) | PLB0_ACR_RDP_4DEEP;
-	addr = (addr & ~PLB0_ACR_WRP_MASK) | PLB0_ACR_WRP_2DEEP;
-	mtdcr(PLB0_ACR, addr);
-
-	/* Segment1 */
-	addr = (mfdcr(PLB1_ACR) & ~PLB1_ACR_PPM_MASK) | PLB1_ACR_PPM_FAIR;
-	addr = (addr & ~PLB1_ACR_HBU_MASK) | PLB1_ACR_HBU_ENABLED;
-	addr = (addr & ~PLB1_ACR_RDP_MASK) | PLB1_ACR_RDP_4DEEP;
-	addr = (addr & ~PLB1_ACR_WRP_MASK) | PLB1_ACR_WRP_2DEEP;
-	mtdcr(PLB1_ACR, addr);
-
-#ifdef CONFIG_PCI_PNP
-	hose->fixup_irq = pmc440_pci_fixup_irq;
-#endif
-
-	return 1;
-}
-#endif /* defined(CONFIG_PCI) */
-
-/*
  * pci_target_init
  *
  * The bootstrap configuration provides default settings for the pci