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authorWolfgang Denk <wd@pollux.denx.de>2005-10-06 17:08:18 +0200
committerWolfgang Denk <wd@pollux.denx.de>2005-10-06 17:08:18 +0200
commit87cb6862b94e342d6c99467e0dbb0d4f625cc7ef (patch)
tree82c6530f0de6cc1e224cdc17458ab6a503cf072f /cpu/arm720t
parentbccae9039e59ac09a776429119389a6a4e679fd7 (diff)
Update make target for ARM supported boards.
Use lowlevel_init() instead of platformsetup() [rename]. Patch by Peter Pearse, 06 Oct 2005
Diffstat (limited to 'cpu/arm720t')
-rw-r--r--cpu/arm720t/cpu.c7
-rw-r--r--cpu/arm720t/interrupts.c10
-rw-r--r--cpu/arm720t/start.S6
3 files changed, 22 insertions, 1 deletions
diff --git a/cpu/arm720t/cpu.c b/cpu/arm720t/cpu.c
index fcca36073..a5b6de760 100644
--- a/cpu/arm720t/cpu.c
+++ b/cpu/arm720t/cpu.c
@@ -76,6 +76,8 @@ int cleanup_before_linux (void)
#elif defined(CONFIG_NETARM) || defined(CONFIG_S3C4510B)
disable_interrupts ();
/* Nothing more needed */
+#elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
+ /* No cleanup before linux for IntegratorAP/CM720T as yet */
#else
#error No cleanup_before_linux() defined for this CPU type
#endif
@@ -245,6 +247,11 @@ int dcache_status (void)
return icache_status();
}
+#elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
+ /* No specific cache setup for IntegratorAP/CM720T as yet */
+ void icache_enable (void)
+ {
+ }
#else
#error No icache/dcache enable/disable functions defined for this CPU type
#endif
diff --git a/cpu/arm720t/interrupts.c b/cpu/arm720t/interrupts.c
index d0eaca5e0..575d923a3 100644
--- a/cpu/arm720t/interrupts.c
+++ b/cpu/arm720t/interrupts.c
@@ -193,6 +193,8 @@ void do_irq (struct pt_regs *pt_regs)
/* clear pending interrupt */
PUT_REG( REG_INTPEND, (1<<(pending>>2)));
}
+#elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
+ /* No do_irq() for IntegratorAP/CM720T as yet */
#else
#error do_irq() not defined for this CPU type
#endif
@@ -219,6 +221,10 @@ static void timer_isr( void *data) {
static ulong timestamp;
static ulong lastdec;
+#if defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
+ /* Use IntegratorAP routines in board/integratorap.c */
+#else
+
int interrupt_init (void)
{
@@ -296,6 +302,8 @@ int interrupt_init (void)
return (0);
}
+#endif /* ! IntegratorAP */
+
/*
* timer without interrupts
*/
@@ -398,6 +406,8 @@ void udelay (unsigned long usec)
}
+#elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
+ /* No timer routines for IntegratorAP/CM720T as yet */
#else
#error Timer routines not defined for this CPU type
#endif
diff --git a/cpu/arm720t/start.S b/cpu/arm720t/start.S
index eb26476a6..43582b328 100644
--- a/cpu/arm720t/start.S
+++ b/cpu/arm720t/start.S
@@ -301,6 +301,8 @@ cpu_init_crit:
ldr r1, =0x83ffffa0 /* cache-disabled */
str r1, [r0]
+#elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
+ /* No specific initialisation for IntegratorAP/CM720T as yet */
#else
#error No cpu_init_crit() defined for current CPU type
#endif
@@ -316,12 +318,12 @@ cpu_init_crit:
str r1, [r0]
#endif
+ mov ip, lr
/*
* before relocating, we have to setup RAM timing
* because memory timing is board-dependent, you will
* find a lowlevel_init.S in your board directory.
*/
- mov ip, lr
bl lowlevel_init
mov lr, ip
@@ -530,6 +532,8 @@ reset_cpu:
#elif defined(CONFIG_S3C4510B)
/* Nothing done here as reseting the CPU is board specific, depending
* on external peripherals such as watchdog timers, etc. */
+#elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
+ /* No specific reset actions for IntegratorAP/CM720T as yet */
#else
#error No reset_cpu() defined for current CPU type
#endif