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authorJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>2009-05-15 23:47:02 +0200
committerWolfgang Denk <wd@denx.de>2009-06-12 20:39:48 +0200
commitb54384e3ba6b5535751f317fcd3940a53eed0d3a (patch)
tree2a2027057af7b2bf1817d530b2ee33ca33e4d660 /cpu/ixp
parent5b4bebe1d20c4f2b70d48b06aed1016785efcc25 (diff)
arm: timer and interrupt init rework
actually the timer init use the interrupt_init as init callback which make the interrupt and timer implementation difficult to follow so now rename it as int timer_init(void) and use interrupt_init for interrupt btw also remane the corresponding file to the functionnality implemented as ixp arch implement two timer - one based on interrupt - so all the timer related code is moved to timer.c Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'cpu/ixp')
-rw-r--r--cpu/ixp/Makefile6
-rw-r--r--cpu/ixp/interrupts.c55
-rw-r--r--cpu/ixp/timer.c54
3 files changed, 66 insertions, 49 deletions
diff --git a/cpu/ixp/Makefile b/cpu/ixp/Makefile
index a673cb1b9..1403c4f39 100644
--- a/cpu/ixp/Makefile
+++ b/cpu/ixp/Makefile
@@ -26,12 +26,10 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(CPU).a
START = start.o
+
COBJS-y += cpu.o
-ifndef CONFIG_USE_IRQ
+COBJS-$(CONFIG_USE_IRQ) += interrupts.o
COBJS-y += timer.o
-else
-COBJS-y += interrupts.o
-endif
SRCS := $(START:.o=.S) $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
diff --git a/cpu/ixp/interrupts.c b/cpu/ixp/interrupts.c
index ee0129ead..a05e439fd 100644
--- a/cpu/ixp/interrupts.c
+++ b/cpu/ixp/interrupts.c
@@ -33,14 +33,6 @@
#include <asm/arch/ixp425.h>
#include <asm/proc-armv/ptrace.h>
-/*
- * When interrupts are enabled, use timer 2 for time/delay generation...
- */
-
-#define FREQ 66666666
-#define CLOCK_TICK_RATE (((FREQ / CONFIG_SYS_HZ & ~IXP425_OST_RELOAD_MASK) + 1) * CONFIG_SYS_HZ)
-#define LATCH ((CLOCK_TICK_RATE + CONFIG_SYS_HZ/2) / CONFIG_SYS_HZ) /* For divider */
-
struct _irq_handler {
void *m_data;
void (*m_func)( void *data);
@@ -48,8 +40,6 @@ struct _irq_handler {
static struct _irq_handler IRQ_HANDLER[N_IRQS];
-static volatile ulong timestamp;
-
static void default_isr(void *data)
{
printf("default_isr(): called for IRQ %d, Interrupt Status=%x PR=%x\n",
@@ -61,33 +51,20 @@ static int next_irq(void)
return (((*IXP425_ICIH & 0x000000fc) >> 2) - 1);
}
-static void timer_isr(void *data)
-{
- unsigned int *pTime = (unsigned int *)data;
-
- (*pTime)++;
-
- /*
- * Reset IRQ source
- */
- *IXP425_OSST = IXP425_OSST_TIMER_2_PEND;
-}
-
-ulong get_timer (ulong base)
+void do_irq (struct pt_regs *pt_regs)
{
- return timestamp - base;
-}
+ int irq = next_irq();
-void reset_timer (void)
-{
- timestamp = 0;
+ IRQ_HANDLER[irq].m_func(IRQ_HANDLER[irq].m_data);
}
-void do_irq (struct pt_regs *pt_regs)
+void irq_install_handler (int irq, interrupt_handler_t handle_irq, void *data)
{
- int irq = next_irq();
+ if (irq >= N_IRQS || !handle_irq)
+ return;
- IRQ_HANDLER[irq].m_func(IRQ_HANDLER[irq].m_data);
+ IRQ_HANDLER[irq].m_data = data;
+ IRQ_HANDLER[irq].m_func = handle_irq;
}
int interrupt_init (void)
@@ -95,23 +72,11 @@ int interrupt_init (void)
int i;
/* install default interrupt handlers */
- for (i = 0; i < N_IRQS; i++) {
- IRQ_HANDLER[i].m_data = (void *)i;
- IRQ_HANDLER[i].m_func = default_isr;
- }
-
- /* install interrupt handler for timer */
- IRQ_HANDLER[IXP425_TIMER_2_IRQ].m_data = (void *)&timestamp;
- IRQ_HANDLER[IXP425_TIMER_2_IRQ].m_func = timer_isr;
-
- /* setup the Timer counter value */
- *IXP425_OSRT2 = (LATCH & ~IXP425_OST_RELOAD_MASK) | IXP425_OST_ENABLE;
+ for (i = 0; i < N_IRQS; i++)
+ irq_install_handler(i, default_isr, (void *)i);
/* configure interrupts for IRQ mode */
*IXP425_ICLR = 0x00000000;
- /* enable timer irq */
- *IXP425_ICMR = (1 << IXP425_TIMER_2_IRQ);
-
return (0);
}
diff --git a/cpu/ixp/timer.c b/cpu/ixp/timer.c
index deb227a1a..685614966 100644
--- a/cpu/ixp/timer.c
+++ b/cpu/ixp/timer.c
@@ -32,6 +32,54 @@
#include <common.h>
#include <asm/arch/ixp425.h>
+#ifdef CONFIG_TIMER_IRQ
+
+#define FREQ 66666666
+#define CLOCK_TICK_RATE (((FREQ / CONFIG_SYS_HZ & ~IXP425_OST_RELOAD_MASK) + 1) * CONFIG_SYS_HZ)
+#define LATCH ((CLOCK_TICK_RATE + CONFIG_SYS_HZ/2) / CONFIG_SYS_HZ) /* For divider */
+
+/*
+ * When interrupts are enabled, use timer 2 for time/delay generation...
+ */
+
+static volatile ulong timestamp;
+
+static void timer_isr(void *data)
+{
+ unsigned int *pTime = (unsigned int *)data;
+
+ (*pTime)++;
+
+ /*
+ * Reset IRQ source
+ */
+ *IXP425_OSST = IXP425_OSST_TIMER_2_PEND;
+}
+
+ulong get_timer (ulong base)
+{
+ return timestamp - base;
+}
+
+void reset_timer (void)
+{
+ timestamp = 0;
+}
+
+int timer_init (void)
+{
+ /* install interrupt handler for timer */
+ irq_install_handler(IXP425_TIMER_2_IRQ, timer_isr, (void *)&timestamp);
+
+ /* setup the Timer counter value */
+ *IXP425_OSRT2 = (LATCH & ~IXP425_OST_RELOAD_MASK) | IXP425_OST_ENABLE;
+
+ /* enable timer irq */
+ *IXP425_ICMR = (1 << IXP425_TIMER_2_IRQ);
+
+ return 0;
+}
+#else
ulong get_timer (ulong base)
{
return get_timer_masked () - base;
@@ -79,3 +127,9 @@ ulong get_timer_masked (void)
}
return (reload_constant - current);
}
+
+int timer_init(void)
+{
+ return 0;
+}
+#endif