diff options
author | Joakim Axelsson <joakim.axelsson@stericsson.com> | 2010-10-22 15:38:45 +0200 |
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committer | Michael BRANDT <michael.brandt@stericsson.com> | 2010-12-07 09:51:11 +0100 |
commit | 18f5edacccb7ae2247e8cbe53c168bdd0a193f81 (patch) | |
tree | 5b4e0340f0052cc00025a2f8a78131a73e896c61 /include/asm-arm/arch-db8500/hardware.h | |
parent | 568d0172a478e4a23c8d5642466db3de0771a262 (diff) |
db8500: cpu-arch rename stw8500 to db8500
Started work with splitting the files in board/st/u8500 into
proper SoC (system on a chip), drivers, commands and board code.
ST-Ericsson ID: None
Signed-off-by: Joakim Axelsson <joakim.axelsson@stericsson.com>
Change-Id: I33300b1990f377bc049785102f1c87fbe579e86d
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/7089
Reviewed-by: Robert ROSENGREN <robert.rosengren@stericsson.com>
Reviewed-by: Markus HELGESSON <markus.helgesson@stericsson.com>
Reviewed-by: Michael BRANDT <michael.brandt@stericsson.com>
Tested-by: Michael BRANDT <michael.brandt@stericsson.com>
Reviewed-by: Mikael LARSSON1 <mikael.xt.larsson@stericsson.com>
Diffstat (limited to 'include/asm-arm/arch-db8500/hardware.h')
-rw-r--r-- | include/asm-arm/arch-db8500/hardware.h | 90 |
1 files changed, 90 insertions, 0 deletions
diff --git a/include/asm-arm/arch-db8500/hardware.h b/include/asm-arm/arch-db8500/hardware.h new file mode 100644 index 000000000..df55a841d --- /dev/null +++ b/include/asm-arm/arch-db8500/hardware.h @@ -0,0 +1,90 @@ +/* + * Copyright (C) ST-Ericsson SA 2009 + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#ifndef __ASM_ARCH_HARDWARE_H +#define __ASM_ARCH_HARDWARE_H + +/* Peripheral clusters */ + +#define U8500_PER3_BASE 0x80000000 +#define U8500_PER2_BASE 0x80110000 +#define U8500_PER1_BASE 0x80120000 +#define U8500_PER4_BASE 0x80150000 + +#define U8500_PER6_BASE 0xa03c0000 +#define U8500_PER7_BASE 0xa03d0000 +#define U8500_PER5_BASE 0xa03e0000 + +/* GPIO */ + +#define U8500_GPIO0_BASE (U8500_PER1_BASE + 0xE000) +#define U8500_GPIO1_BASE (U8500_PER1_BASE + 0xE000 + 0x80) + +#define U8500_GPIO2_BASE (U8500_PER3_BASE + 0xE000) +#define U8500_GPIO3_BASE (U8500_PER3_BASE + 0xE000 + 0x80) +#define U8500_GPIO4_BASE (U8500_PER3_BASE + 0xE000 + 0x100) +#define U8500_GPIO5_BASE (U8500_PER3_BASE + 0xE000 + 0x180) + +#define U8500_GPIO6_BASE (U8500_PER2_BASE + 0xE000) +#define U8500_GPIO7_BASE (U8500_PER2_BASE + 0xE000 + 0x80) + +#define U8500_GPIO8_BASE (U8500_PER5_BASE + 0x1E000) + +/* Per7 */ +#define U8500_MTU0_BASE_ED (U8500_PER7_BASE + 0xa000) +#define U8500_MTU1_BASE_ED (U8500_PER7_BASE + 0xb000) +#define U8500_CLKRST7_BASE (U8500_PER7_BASE + 0xf000) + +/* Per6 */ +#define U8500_MTU0_BASE_V1 (U8500_PER6_BASE + 0x6000) +#define U8500_MTU1_BASE_v1 (U8500_PER6_BASE + 0x7000) +#define U8500_CLKRST6_BASE (U8500_PER6_BASE + 0xf000) + +/* Per5 */ +#define U8500_CLKRST5_BASE (U8500_PER5_BASE + 0x1f000) + +/* Per4 */ +#define U8500_PRCMU_BASE (U8500_PER4_BASE + 0x07000) +#define U8500_PRCMU_TCDM_BASE_V1 (U8500_PER4_BASE + 0x0f000) +#define U8500_PRCMU_TCDM_BASE (U8500_PER4_BASE + 0x68000) + +/* Per3 */ +#define U8500_UART2_BASE (U8500_PER3_BASE + 0x7000) +#define U8500_CLKRST3_BASE (U8500_PER3_BASE + 0xf000) + +/* Per2 */ +#define U8500_SPI2_BASE (U8500_PER2_BASE + 0x1000) +#define U8500_SPI1_BASE (U8500_PER2_BASE + 0x2000) +#define U8500_SPI0_BASE (U8500_PER2_BASE + 0xa000) +#define U8500_CLKRST2_BASE (U8500_PER2_BASE + 0xf000) + +/* Per1 */ +#define U8500_UART0_BASE (U8500_PER1_BASE + 0x0000) +#define U8500_UART1_BASE (U8500_PER1_BASE + 0x1000) +#define U8500_SPI3_BASE (U8500_PER2_BASE + 0x9000) +#define U8500_CLKRST1_BASE (U8500_PER1_BASE + 0xf000) + +#define U8500_BOOTROM_BASE 0x90000000 +#define U8500_ASIC_ID_LOC_ED_V1 (U8500_BOOTROM_BASE + 0x1FFF4) +#define U8500_ASIC_ID_LOC_V2 (U8500_BOOTROM_BASE + 0x1DBF4) + +#endif /* __ASM_ARCH_HARDWARE_H */ |