diff options
author | Joakim Axelsson <joakim.axelsson@stericsson.com> | 2010-10-22 15:38:45 +0200 |
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committer | Michael BRANDT <michael.brandt@stericsson.com> | 2010-12-07 09:51:11 +0100 |
commit | 18f5edacccb7ae2247e8cbe53c168bdd0a193f81 (patch) | |
tree | 5b4e0340f0052cc00025a2f8a78131a73e896c61 /include/asm-arm/arch-db8500/mtu.h | |
parent | 568d0172a478e4a23c8d5642466db3de0771a262 (diff) |
db8500: cpu-arch rename stw8500 to db8500
Started work with splitting the files in board/st/u8500 into
proper SoC (system on a chip), drivers, commands and board code.
ST-Ericsson ID: None
Signed-off-by: Joakim Axelsson <joakim.axelsson@stericsson.com>
Change-Id: I33300b1990f377bc049785102f1c87fbe579e86d
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/7089
Reviewed-by: Robert ROSENGREN <robert.rosengren@stericsson.com>
Reviewed-by: Markus HELGESSON <markus.helgesson@stericsson.com>
Reviewed-by: Michael BRANDT <michael.brandt@stericsson.com>
Tested-by: Michael BRANDT <michael.brandt@stericsson.com>
Reviewed-by: Mikael LARSSON1 <mikael.xt.larsson@stericsson.com>
Diffstat (limited to 'include/asm-arm/arch-db8500/mtu.h')
-rw-r--r-- | include/asm-arm/arch-db8500/mtu.h | 66 |
1 files changed, 66 insertions, 0 deletions
diff --git a/include/asm-arm/arch-db8500/mtu.h b/include/asm-arm/arch-db8500/mtu.h new file mode 100644 index 000000000..a87be9ef4 --- /dev/null +++ b/include/asm-arm/arch-db8500/mtu.h @@ -0,0 +1,66 @@ +/* + * (C) Copyright 2009 Alessandro Rubini + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __ASM_ARCH_MTU_H +#define __ASM_ARCH_MTU_H + +/* + * The MTU device hosts four different counters, with 4 set of + * registers. These are register names. + */ + +#define MTU_IMSC 0x00 /* Interrupt mask set/clear */ +#define MTU_RIS 0x04 /* Raw interrupt status */ +#define MTU_MIS 0x08 /* Masked interrupt status */ +#define MTU_ICR 0x0C /* Interrupt clear register */ + +/* per-timer registers take 0..3 as argument */ +#define MTU_LR(x) (0x10 + 0x10 * (x) + 0x00) /* Load value */ +#define MTU_VAL(x) (0x10 + 0x10 * (x) + 0x04) /* Current value */ +#define MTU_CR(x) (0x10 + 0x10 * (x) + 0x08) /* Control reg */ +#define MTU_BGLR(x) (0x10 + 0x10 * (x) + 0x0c) /* At next overflow */ + +/* bits for the control register */ +#define MTU_CRn_ENA 0x80 +#define MTU_CRn_PERIODIC 0x40 /* if 0 = free-running */ +#define MTU_CRn_PRESCALE_MASK 0x0c +#define MTU_CRn_PRESCALE_1 0x00 +#define MTU_CRn_PRESCALE_16 0x04 +#define MTU_CRn_PRESCALE_256 0x08 +#define MTU_CRn_32BITS 0x02 +#define MTU_CRn_ONESHOT 0x01 /* if 0 = wraps reloading from BGLR*/ + +/* Other registers are usual amba/primecell registers, currently not used */ +#define MTU_ITCR 0xff0 +#define MTU_ITOP 0xff4 + +#define MTU_PERIPH_ID0 0xfe0 +#define MTU_PERIPH_ID1 0xfe4 +#define MTU_PERIPH_ID2 0xfe8 +#define MTU_PERIPH_ID3 0xfeC + +#define MTU_PCELL0 0xff0 +#define MTU_PCELL1 0xff4 +#define MTU_PCELL2 0xff8 +#define MTU_PCELL3 0xffC + +#endif /* __ASM_ARCH_MTU_H */ |