diff options
| author | Guennadi Liakhovetski <lg@denx.de> | 2008-04-15 14:14:25 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2008-04-18 00:43:23 -0700 |
| commit | 38254f45b0b412332726c90d3184ad47479fcffb (patch) | |
| tree | 927798cfb0fb9f53e461071b63af16ebdc0b5912 /include/asm-arm/arch-mx31 | |
| parent | 248b7d984cffa3107b5acb4c3f5501b7538d877a (diff) | |
New i.MX31 SPI driver
This is an SPI driver for i.MX and MXC based SoCs from Freescale. So far
only implemented and tested on i.MX31, can with a modified register layout
and definitions be used for i.MX27, I think, MXC CPUs have similar SPI
controllers too.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Diffstat (limited to 'include/asm-arm/arch-mx31')
| -rw-r--r-- | include/asm-arm/arch-mx31/mx31-regs.h | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/include/asm-arm/arch-mx31/mx31-regs.h b/include/asm-arm/arch-mx31/mx31-regs.h index 380b401a4..d04072e67 100644 --- a/include/asm-arm/arch-mx31/mx31-regs.h +++ b/include/asm-arm/arch-mx31/mx31-regs.h @@ -37,6 +37,9 @@ #define CCM_UPCTL (CCM_BASE + 0x10) #define CCM_SPCTL (CCM_BASE + 0x18) #define CCM_COSR (CCM_BASE + 0x1C) +#define CCM_CGR0 (CCM_BASE + 0x20) +#define CCM_CGR1 (CCM_BASE + 0x24) +#define CCM_CGR2 (CCM_BASE + 0x28) #define CCMR_MDS (1 << 7) #define CCMR_SBYCS (1 << 4) @@ -118,7 +121,9 @@ #define MUX_CTL_RXD1 0x82 #define MUX_CTL_TXD1 0x83 #define MUX_CTL_CSPI2_MISO 0x84 -/* 0x85 .. 0x8a */ +#define MUX_CTL_CSPI2_SS0 0x85 +#define MUX_CTL_CSPI2_SS1 0x86 +#define MUX_CTL_CSPI2_SS2 0x87 #define MUX_CTL_CSPI2_MOSI 0x8b /* The modes a specific pin can be in |