From fad15096e3b34927444ba5f6133742d40d78a425 Mon Sep 17 00:00:00 2001 From: Dipen Dudhat Date: Thu, 8 Oct 2009 13:33:29 +0530 Subject: ppc/P1_P2_RDB: On-chip BootROM support On Chip BootROM support for P1 and P2 series RDB platforms. This patch is derived from latest On Chip BootROM support on MPC8536DS Signed-off-by: Dipen Dudhat Signed-off-by: Kumar Gala --- MAKEALL | 8 ++++++++ Makefile | 10 +++++++++- board/freescale/p1_p2_rdb/config.mk | 12 ++++++++++++ include/configs/P1_P2_RDB.h | 17 ++++++++++++++++- 4 files changed, 45 insertions(+), 2 deletions(-) diff --git a/MAKEALL b/MAKEALL index cfb94725c..07d24146f 100755 --- a/MAKEALL +++ b/MAKEALL @@ -405,12 +405,20 @@ LIST_85xx=" \ P2020DS_36BIT \ P1011RDB \ P1011RDB_NAND \ + P1011RDB_SDCARD \ + P1011RDB_SPIFLASH \ P1020RDB \ P1020RDB_NAND \ + P1020RDB_SDCARD \ + P1020RDB_SPIFLASH \ P2010RDB \ P2010RDB_NAND \ + P2010RDB_SDCARD \ + P2010RDB_SPIFLASH \ P2020RDB \ P2020RDB_NAND \ + P2020RDB_SDCARD \ + P2020RDB_SPIFLASH \ PM854 \ PM856 \ sbc8540 \ diff --git a/Makefile b/Makefile index b067a4c7b..77ca51d66 100644 --- a/Makefile +++ b/Makefile @@ -2512,12 +2512,20 @@ P2020DS_config: unconfig P1011RDB_config \ P1011RDB_NAND_config \ +P1011RDB_SDCARD_config \ +P1011RDB_SPIFLASH_config \ P1020RDB_config \ P1020RDB_NAND_config \ +P1020RDB_SDCARD_config \ +P1020RDB_SPIFLASH_config \ P2010RDB_config \ P2010RDB_NAND_config \ +P2010RDB_SDCARD_config \ +P2010RDB_SPIFLASH_config \ P2020RDB_config \ -P2020RDB_NAND_config: unconfig +P2020RDB_NAND_config \ +P2020RDB_SDCARD_config \ +P2020RDB_SPIFLASH_config: unconfig @$(MKCONFIG) -t $(@:_config=) P1_P2_RDB ppc mpc85xx p1_p2_rdb freescale PM854_config: unconfig diff --git a/board/freescale/p1_p2_rdb/config.mk b/board/freescale/p1_p2_rdb/config.mk index 17abcf8f7..0f7a0487e 100644 --- a/board/freescale/p1_p2_rdb/config.mk +++ b/board/freescale/p1_p2_rdb/config.mk @@ -31,8 +31,20 @@ LDSCRIPT := $(TOPDIR)/cpu/$(CPU)/u-boot-nand.lds endif endif +ifeq ($(CONFIG_MK_SDCARD), y) +TEXT_BASE = $(CONFIG_RAMBOOT_TEXT_BASE) +RESET_VECTOR_ADDRESS = 0xf8fffffc +endif + +ifeq ($(CONFIG_MK_SPIFLASH), y) +TEXT_BASE = $(CONFIG_RAMBOOT_TEXT_BASE) +RESET_VECTOR_ADDRESS = 0xf8fffffc +endif + ifndef TEXT_BASE TEXT_BASE = 0xeff80000 endif +ifndef RESET_VECTOR_ADDRESS RESET_VECTOR_ADDRESS = 0xeffffffc +endif diff --git a/include/configs/P1_P2_RDB.h b/include/configs/P1_P2_RDB.h index aacd4ca85..310242e0b 100644 --- a/include/configs/P1_P2_RDB.h +++ b/include/configs/P1_P2_RDB.h @@ -49,6 +49,16 @@ #define CONFIG_RAMBOOT_TEXT_BASE 0xf8f82000 #endif +#ifdef CONFIG_MK_SDCARD +#define CONFIG_RAMBOOT_SDCARD 1 +#define CONFIG_RAMBOOT_TEXT_BASE 0xf8f80000 +#endif + +#ifdef CONFIG_MK_SPIFLASH +#define CONFIG_RAMBOOT_SPIFLASH 1 +#define CONFIG_RAMBOOT_TEXT_BASE 0xf8f80000 +#endif + /* High Level Configuration Options */ #define CONFIG_BOOKE 1 /* BOOKE */ #define CONFIG_E500 1 /* BOOKE e500 family */ @@ -182,7 +192,8 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ -#if defined(CONFIG_SYS_SPL) || defined(CONFIG_RAMBOOT_NAND) +#if defined(CONFIG_SYS_SPL) || defined(CONFIG_RAMBOOT_NAND) \ + || defined(CONFIG_RAMBOOT_SDCARD) || defined(CONFIG_RAMBOOT_SPIFLASH) #define CONFIG_SYS_RAMBOOT #else #undef CONFIG_SYS_RAMBOOT @@ -426,6 +437,10 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_ENV_IS_IN_NAND 1 #define CONFIG_ENV_SIZE CONFIG_SYS_NAND_BLOCK_SIZE #define CONFIG_ENV_OFFSET ((512 * 1024) + CONFIG_SYS_NAND_BLOCK_SIZE) +#elif defined(CONFIG_RAMBOOT_SDCARD) || defined(CONFIG_RAMBOOT_SPIFLASH) + #define CONFIG_ENV_IS_NOWHERE 1 /* Store ENV in memory only */ + #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - 0x1000) + #define CONFIG_ENV_SIZE 0x2000 #endif #else #define CONFIG_ENV_IS_IN_FLASH 1 -- cgit v1.2.3