From 26d37f0061ad05e5c383c910f00e6006f3c89a3a Mon Sep 17 00:00:00 2001 From: Felix Radensky Date: Mon, 22 Jun 2009 15:30:42 +0300 Subject: ppc4xx: Fix FDT EBC mappings on Canyonlands This patch fixes 2 problems with FDT EBC mappings on Canyonlands. First, NAND EBC mapping was missing, making Linux NAND driver unusable on this board. Second, NOR remapping code assumed that NOR is always on CS0, however when booting from NAND NOR is on CS3. Signed-off-by: Felix Radensky Signed-off-by: Stefan Roese --- board/amcc/canyonlands/canyonlands.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'board/amcc') diff --git a/board/amcc/canyonlands/canyonlands.c b/board/amcc/canyonlands/canyonlands.c index 2b7468923..cfc1023f4 100644 --- a/board/amcc/canyonlands/canyonlands.c +++ b/board/amcc/canyonlands/canyonlands.c @@ -575,15 +575,17 @@ int misc_init_r(void) #endif /* !defined(CONFIG_ARCHES) */ #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) +extern void __ft_board_setup(void *blob, bd_t *bd); + void ft_board_setup(void *blob, bd_t *bd) { u32 val[4]; int rc; - ft_cpu_setup(blob, bd); + __ft_board_setup(blob, bd); /* Fixup NOR mapping */ - val[0] = 0; /* chip select number */ + val[0] = CONFIG_SYS_NOR_CS; /* chip select number */ val[1] = 0; /* always 0 */ val[2] = CONFIG_SYS_FLASH_BASE_PHYS_L; /* we fixed up this address */ val[3] = gd->bd->bi_flashsize; -- cgit v1.2.3