From 8bde7f776c77b343aca29b8c7b58464d915ac245 Mon Sep 17 00:00:00 2001 From: wdenk Date: Fri, 27 Jun 2003 21:31:46 +0000 Subject: * Code cleanup: - remove trailing white space, trailing empty lines, C++ comments, etc. - split cmd_boot.c (separate cmd_bdinfo.c and cmd_load.c) * Patches by Kenneth Johansson, 25 Jun 2003: - major rework of command structure (work done mostly by Michal Cendrowski and Joakim Kristiansen) --- board/cpc45/Makefile | 2 +- board/cpc45/cpc45.c | 3 +-- board/cpc45/flash.c | 46 +++++++++++++++++++++++----------------------- board/cpc45/plx9030.c | 9 ++++----- board/cpc45/u-boot.lds | 6 +++++- 5 files changed, 34 insertions(+), 32 deletions(-) (limited to 'board/cpc45') diff --git a/board/cpc45/Makefile b/board/cpc45/Makefile index cc66e32e2..db5a83b70 100644 --- a/board/cpc45/Makefile +++ b/board/cpc45/Makefile @@ -28,7 +28,7 @@ LIB = lib$(BOARD).a OBJS = $(BOARD).o flash.o plx9030.o $(LIB): .depend $(OBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) ######################################################################### diff --git a/board/cpc45/cpc45.c b/board/cpc45/cpc45.c index 01067f53e..08bff49c2 100644 --- a/board/cpc45/cpc45.c +++ b/board/cpc45/cpc45.c @@ -26,7 +26,7 @@ #include #include -int sysControlDisplay(int digit, uchar ascii_code); +int sysControlDisplay(int digit, uchar ascii_code); extern void Plx9030Init(void); /* We have to clear the initial data area here. Couldn't have done it @@ -170,4 +170,3 @@ int sysControlDisplay return (0); } - diff --git a/board/cpc45/flash.c b/board/cpc45/flash.c index a289d0894..904923543 100644 --- a/board/cpc45/flash.c +++ b/board/cpc45/flash.c @@ -80,7 +80,7 @@ unsigned long flash_init(void) for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) { - vu_long *addr = (vu_long *)(CFG_FLASH_BASE + i * FLASH_BANK_SIZE); + vu_long *addr = (vu_long *)(CFG_FLASH_BASE + i * FLASH_BANK_SIZE); addr[0] = 0x00900090; @@ -97,7 +97,7 @@ unsigned long flash_init(void) { flash_info[i].flash_id = (FLASH_MAN_INTEL & FLASH_VENDMASK) | - (INTEL_ID_28F160F3T & FLASH_TYPEMASK); + (INTEL_ID_28F160F3T & FLASH_TYPEMASK); } else { flash_info[i].flash_id = FLASH_UNKNOWN; @@ -115,12 +115,12 @@ unsigned long flash_init(void) for (j = 0; j < flash_info[i].sector_count; j++) { if (j > 30) { flash_info[i].start[j] = CFG_FLASH_BASE + - i * FLASH_BANK_SIZE + - (MAIN_SECT_SIZE * 31) + (j - 31) * PARAM_SECT_SIZE; + i * FLASH_BANK_SIZE + + (MAIN_SECT_SIZE * 31) + (j - 31) * PARAM_SECT_SIZE; } else { flash_info[i].start[j] = CFG_FLASH_BASE + - i * FLASH_BANK_SIZE + - j * MAIN_SECT_SIZE; + i * FLASH_BANK_SIZE + + j * MAIN_SECT_SIZE; } } size += flash_info[i].size; @@ -131,28 +131,28 @@ unsigned long flash_init(void) #if CFG_MONITOR_BASE >= CFG_FLASH_BASE #if CFG_MONITOR_BASE >= CFG_FLASH_BASE + FLASH_BANK_SIZE flash_protect(FLAG_PROTECT_SET, - CFG_MONITOR_BASE, - CFG_MONITOR_BASE + monitor_flash_len - 1, - &flash_info[1]); + CFG_MONITOR_BASE, + CFG_MONITOR_BASE + monitor_flash_len - 1, + &flash_info[1]); #else flash_protect(FLAG_PROTECT_SET, - CFG_MONITOR_BASE, - CFG_MONITOR_BASE + monitor_flash_len - 1, - &flash_info[0]); + CFG_MONITOR_BASE, + CFG_MONITOR_BASE + monitor_flash_len - 1, + &flash_info[0]); #endif #endif #if (CFG_ENV_IS_IN_FLASH == 1) && defined(CFG_ENV_ADDR) #if CFG_ENV_ADDR >= CFG_FLASH_BASE + FLASH_BANK_SIZE flash_protect(FLAG_PROTECT_SET, - CFG_ENV_ADDR, - CFG_ENV_ADDR + CFG_ENV_SIZE - 1, - &flash_info[1]); + CFG_ENV_ADDR, + CFG_ENV_ADDR + CFG_ENV_SIZE - 1, + &flash_info[1]); #else flash_protect(FLAG_PROTECT_SET, - CFG_ENV_ADDR, - CFG_ENV_ADDR + CFG_ENV_SIZE - 1, - &flash_info[0]); + CFG_ENV_ADDR, + CFG_ENV_ADDR + CFG_ENV_SIZE - 1, + &flash_info[0]); #endif #endif @@ -275,7 +275,7 @@ int flash_erase (flash_info_t *info, int s_first, int s_last) while (((addr[0] & 0x00800080) != 0x00800080) || ((addr[1] & 0x00800080) != 0x00800080) ) { if ((now=get_timer(start)) > - CFG_FLASH_ERASE_TOUT) { + CFG_FLASH_ERASE_TOUT) { printf ("Timeout\n"); addr[0] = 0x00B000B0; /* suspend erase */ addr[0] = 0x00FF00FF; /* to read mode */ @@ -335,7 +335,7 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) for (i = 0, cp = wp; i < l; i++, cp++) { if (i >= 4) { *datah = (*datah << 8) | - ((*datal & 0xFF000000) >> 24); + ((*datal & 0xFF000000) >> 24); } *datal = (*datal << 8) | (*(uchar *)cp); @@ -349,7 +349,7 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) if (i >= 4) { *datah = (*datah << 8) | - ((*datal & 0xFF000000) >> 24); + ((*datal & 0xFF000000) >> 24); } *datal = (*datal << 8) | tmp; @@ -360,7 +360,7 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) for (; cnt == 0 && i < FLASH_WIDTH; ++i, ++cp) { if (i >= 4) { *datah = (*datah << 8) | - ((*datal & 0xFF000000) >> 24); + ((*datal & 0xFF000000) >> 24); } *datal = (*datah << 8) | (*(uchar *)cp); @@ -401,7 +401,7 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) for (i = 0, cp = wp; i < FLASH_WIDTH && cnt > 0; ++i, ++cp) { char tmp; - tmp = *src; + tmp = *src; src++; diff --git a/board/cpc45/plx9030.c b/board/cpc45/plx9030.c index e337bd200..99ec39af7 100644 --- a/board/cpc45/plx9030.c +++ b/board/cpc45/plx9030.c @@ -137,7 +137,7 @@ void Plx9030Init (void) sysOutLong((membaseCsr + P9030_LAS0BA), 0x00000001); /* enable space base */ sysOutLong((membaseCsr + P9030_LAS0RR), 0x0FE00000); /* 2 MByte */ sysOutLong((membaseCsr + P9030_LAS0BRD), 0x51928900); /* 4 wait states */ - sysOutLong((membaseCsr + P9030_CS0BASE), 0x00100001); /* enable 2 MByte */ + sysOutLong((membaseCsr + P9030_CS0BASE), 0x00100001); /* enable 2 MByte */ /* remap CS0 (SRAM) */ pci_write_config_dword(devno, PCI_BASE_ADDRESS_2, SRAM_BASE); @@ -145,7 +145,7 @@ void Plx9030Init (void) sysOutLong((membaseCsr + P9030_LAS1BA), 0x00400001); /* enable space base */ sysOutLong((membaseCsr + P9030_LAS1RR), 0x0FFFFF00); /* 256 byte */ sysOutLong((membaseCsr + P9030_LAS1BRD), 0x55122900); /* 4 wait states */ - sysOutLong((membaseCsr + P9030_CS1BASE), 0x00400081); /* enable 256 Byte */ + sysOutLong((membaseCsr + P9030_CS1BASE), 0x00400081); /* enable 256 Byte */ /* remap CS1 (ST16552 / CHAN A) */ /* remap CS1 (ST16552 / CHAN A) */ pci_write_config_dword(devno, PCI_BASE_ADDRESS_3, ST16552_A_BASE); @@ -154,7 +154,7 @@ void Plx9030Init (void) sysOutLong((membaseCsr + P9030_LAS2BA), 0x00800001); /* enable space base */ sysOutLong((membaseCsr + P9030_LAS2RR), 0x0FFFFF00); /* 256 byte */ sysOutLong((membaseCsr + P9030_LAS2BRD), 0x55122900); /* 4 wait states */ - sysOutLong((membaseCsr + P9030_CS2BASE), 0x00800081); /* enable 256 Byte */ + sysOutLong((membaseCsr + P9030_CS2BASE), 0x00800081); /* enable 256 Byte */ /* remap CS2 (ST16552 / CHAN B) */ pci_write_config_dword(devno, PCI_BASE_ADDRESS_4, ST16552_B_BASE); @@ -162,7 +162,7 @@ void Plx9030Init (void) sysOutLong((membaseCsr + P9030_LAS3BA), 0x00C00001); /* enable space base */ sysOutLong((membaseCsr + P9030_LAS3RR), 0x0FFFFF00); /* 256 byte */ sysOutLong((membaseCsr + P9030_LAS3BRD), 0x55357A80); /* 9 wait states */ - sysOutLong((membaseCsr + P9030_CS3BASE), 0x00C00081); /* enable 256 Byte */ + sysOutLong((membaseCsr + P9030_CS3BASE), 0x00C00081); /* enable 256 Byte */ /* remap CS3 (DISPLAY and BCSR) */ pci_write_config_dword(devno, PCI_BASE_ADDRESS_5, BCSR_BASE); } @@ -171,4 +171,3 @@ void sysOutLong(ulong address, ulong value) { *(ulong*)address = cpu_to_le32(value); } - diff --git a/board/cpc45/u-boot.lds b/board/cpc45/u-boot.lds index 59ddb4239..b1807dd08 100644 --- a/board/cpc45/u-boot.lds +++ b/board/cpc45/u-boot.lds @@ -103,6 +103,11 @@ SECTIONS _edata = .; PROVIDE (edata = .); + + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -126,4 +131,3 @@ SECTIONS _end = . ; PROVIDE (end = .); } - -- cgit v1.2.3