From a065ee95afbb9868dbb0c900d516ea45a8e0edff Mon Sep 17 00:00:00 2001
From: Rabin Vincent <rabin.vincent@stericsson.com>
Date: Fri, 20 Aug 2010 09:45:19 +0530
Subject: ux500: add DB8500v2 support

  - Add cpu_is_u8500v2() for identification:  ASICID has moved, so use
    the MIDR for primary identification.

  - Handle the changed MTU0 enable bit

  - Handle the MMC DBLOCKSIZE field move

ST-Ericsson ID: CR267426

Change-Id: Ieae6032cf4e96796a8b53cfb95b28b26d4cf9a7b
Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/3960
Reviewed-by: Martin LUNDHOLM <martin.xa.lundholm@stericsson.com>
Reviewed-by: Michael BRANDT <michael.brandt@stericsson.com>
---
 board/st/u8500/common.h   |  4 ++++
 board/st/u8500/mmc_host.c | 10 ++++++++--
 board/st/u8500/mmc_host.h |  1 +
 board/st/u8500/u8500.c    | 51 ++++++++++++++++++++++++++++++++++++++++-------
 4 files changed, 57 insertions(+), 9 deletions(-)

(limited to 'board')

diff --git a/board/st/u8500/common.h b/board/st/u8500/common.h
index a11b605f5..25dd35efe 100644
--- a/board/st/u8500/common.h
+++ b/board/st/u8500/common.h
@@ -128,6 +128,10 @@ typedef u32 t_logical_address;
 
 /*function prototypes*/
 void gpio_init(void);
+
 int u8500_is_earlydrop(void);
+int cpu_is_u8500v11(void);
+int cpu_is_u8500v1(void);
+int cpu_is_u8500v2(void);
 
 #endif  /* _COMMON_H_ */
diff --git a/board/st/u8500/mmc_host.c b/board/st/u8500/mmc_host.c
index 479e76391..9bf319504 100644
--- a/board/st/u8500/mmc_host.c
+++ b/board/st/u8500/mmc_host.c
@@ -283,8 +283,14 @@ static int do_data_transfer(struct mmc *dev,
 	debug("Request to do data xfer on %s\n", dev->name);
 	debug("do_data_transfer(%u) start\n", data->blocks);
 
-	blksz = convert_from_bytes_to_power_of_two(data->blocksize);
-	data_ctrl |= (blksz << INDEX(SDI_DCTRL_DBLOCKSIZE_MASK));
+	if (cpu_is_u8500v1() || u8500_is_earlydrop()) {
+		blksz = convert_from_bytes_to_power_of_two(data->blocksize);
+		data_ctrl |= (blksz << INDEX(SDI_DCTRL_DBLOCKSIZE_MASK));
+	} else {
+		blksz = data->blocksize;
+		data_ctrl |= (blksz << INDEX(SDI_DCTRL_DBLOCKSIZE_V2_MASK));
+	}
+
 	data_ctrl |= SDI_DCTRL_DTEN;
 
 	debug("SDI_DTIMER <= 0x%08X\n", SDI_DTIMER_DEFAULT);
diff --git a/board/st/u8500/mmc_host.h b/board/st/u8500/mmc_host.h
index 644f01b37..b33351f09 100644
--- a/board/st/u8500/mmc_host.h
+++ b/board/st/u8500/mmc_host.h
@@ -257,6 +257,7 @@ enum mmc_result {
 #define SDI_DCTRL_DBOOTMODEEN		(0x00002000)	/* (1 << 13) */
 #define SDI_DCTRL_BUSYMODE		(0x00004000)	/* (1 << 14) */
 #define SDI_DCTRL_DDR_MODE		(0x00008000)	/* (1 << 15) */
+#define SDI_DCTRL_DBLOCKSIZE_V2_MASK	(0x7fff0000)
 
 #define SDI_FIFO_BURST_SIZE		(8)
 
diff --git a/board/st/u8500/u8500.c b/board/st/u8500/u8500.c
index eb6dda5af..136b1c5b0 100644
--- a/board/st/u8500/u8500.c
+++ b/board/st/u8500/u8500.c
@@ -136,22 +136,55 @@ void show_boot_progress(int progress)
 }
 #endif
 
+#define CPUID_DB8500ED  0x410fc090
+#define CPUID_DB8500V1  0x411fc091
+#define CPUID_DB8500V2  0x412fc091
+
+#define ASICID_DB8500V11         0x008500A1
+
+static unsigned int read_cpuid(void)
+{
+	unsigned int val;
+
+	/* Main ID register (MIDR) */
+	asm("mrc        p15, 0, %0, c0, c0, 0"
+	   : "=r" (val)
+	   :
+	   : "cc");
+
+	return val;
+}
+
 static unsigned int read_asicid(void)
 {
-	unsigned int *address = (void *)U8500_BOOTROM_BASE
-				+ U8500_BOOTROM_ASIC_ID_OFFSET;
+	unsigned int *address;
+
+	if (u8500_is_earlydrop() || cpu_is_u8500v1())
+		address = (void *) U8500_ASIC_ID_LOC_ED_V1;
+	else
+		address = (void *) U8500_ASIC_ID_LOC_V2;
+
 	return readl(address);
 }
 
 int u8500_is_earlydrop(void)
 {
-	/* 0x01 for ED, 0xA0 for v1 */
-	return (read_asicid() & 0xff) == 0x01;
+	return read_cpuid() == CPUID_DB8500ED;
+}
+
+int cpu_is_u8500v1(void)
+{
+	return read_cpuid() == CPUID_DB8500V1;
 }
 
 int cpu_is_u8500v11(void)
 {
-	return read_asicid() == 0x008500A1;
+	return read_asicid() == ASICID_DB8500V11;
+}
+
+int cpu_is_u8500v2(void)
+{
+	return read_cpuid() == CPUID_DB8500V2;
 }
 
 /*
@@ -478,10 +511,14 @@ static void init_regs(void)
 		u8500_clock_enable(1, 5, 5);	/* SDI0 */
 		u8500_clock_enable(2, 4, 2);	/* SDI4 */
 
-		if (u8500_is_earlydrop()) {
+		if (u8500_is_earlydrop())
 			u8500_clock_enable(7, 2, -1);	/* MTU0 */
-		} else {
+		else if (cpu_is_u8500v1())
 			u8500_clock_enable(6, 7, -1);	/* MTU0 */
+		else  if (cpu_is_u8500v2())
+			u8500_clock_enable(6, 6, -1);	/* MTU0 */
+
+		if (!u8500_is_earlydrop()) {
 			u8500_clock_enable(3, 4, 4);	/* SDI2 */
 
 			{
-- 
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