From abc76eb6a6936a99811eda256222b3927427f8e2 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Tue, 17 Nov 2009 20:21:20 -0600 Subject: ppc/85xx: Map boot page guarded for MP boot We already map the page cache-inhibited. There is no reason we shouldn't also be marking it guarded to prevent speculative accesses. Signed-off-by: Kumar Gala --- board/freescale/mpc8572ds/tlb.c | 2 +- board/freescale/p1_p2_rdb/tlb.c | 2 +- board/freescale/p2020ds/tlb.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) (limited to 'board') diff --git a/board/freescale/mpc8572ds/tlb.c b/board/freescale/mpc8572ds/tlb.c index d832f8974..6a2a0b57f 100644 --- a/board/freescale/mpc8572ds/tlb.c +++ b/board/freescale/mpc8572ds/tlb.c @@ -44,7 +44,7 @@ struct fsl_e_tlb_entry tlb_table[] = { /* TLB 1 */ /* *I*** - Covers boot page */ SET_TLB_ENTRY(1, 0xfffff000, 0xfffff000, - MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 0, BOOKE_PAGESZ_4K, 1), /* *I*G* - CCSRBAR */ diff --git a/board/freescale/p1_p2_rdb/tlb.c b/board/freescale/p1_p2_rdb/tlb.c index 0009913ea..93d0bf7bc 100644 --- a/board/freescale/p1_p2_rdb/tlb.c +++ b/board/freescale/p1_p2_rdb/tlb.c @@ -44,7 +44,7 @@ struct fsl_e_tlb_entry tlb_table[] = { /* TLB 1 */ /* *I*** - Covers boot page */ SET_TLB_ENTRY(1, 0xfffff000, 0xfffff000, - MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 0, BOOKE_PAGESZ_4K, 1), /* *I*G* - CCSRBAR */ diff --git a/board/freescale/p2020ds/tlb.c b/board/freescale/p2020ds/tlb.c index b2e562aeb..36ad086d0 100644 --- a/board/freescale/p2020ds/tlb.c +++ b/board/freescale/p2020ds/tlb.c @@ -47,7 +47,7 @@ struct fsl_e_tlb_entry tlb_table[] = { /* TLB 1 */ /* *I*** - Covers boot page */ SET_TLB_ENTRY(1, 0xfffff000, 0xfffff000, - MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 0, BOOKE_PAGESZ_4K, 1), /* *I*G* - CCSRBAR */ -- cgit v1.2.3