From 43c509254fab375c49936498da944658117ed07c Mon Sep 17 00:00:00 2001 From: Shinya Kuribayashi Date: Thu, 17 Apr 2008 23:35:13 +0900 Subject: Use jr as register jump instruction Current assembler codes are inconsistent in the way of register jump instruction usage; some use jr, some use j. Of course GNU as allows both usages, but as can be expected from `Jump Register' the mnemonic `jr' is more intuitive than `j'. For example, Linux doesn't have `j ' usage at all. Signed-off-by: Shinya Kuribayashi --- cpu/mips/cache.S | 4 ++-- cpu/mips/incaip_wdt.S | 2 +- cpu/mips/start.S | 6 +++--- 3 files changed, 6 insertions(+), 6 deletions(-) (limited to 'cpu/mips') diff --git a/cpu/mips/cache.S b/cpu/mips/cache.S index 89ada716c..f59396832 100644 --- a/cpu/mips/cache.S +++ b/cpu/mips/cache.S @@ -282,7 +282,7 @@ LEAF(dcache_disable) and t0, t0, t1 ori t0, t0, CONF_CM_UNCACHED mtc0 t0, CP0_CONFIG - j ra + jr ra END(dcache_disable) #ifdef CFG_INIT_RAM_LOCK_MIPS @@ -308,7 +308,7 @@ mips_cache_lock: move a1, a2 icacheop(a0,a1,a2,a3,0x1d) - j ra + jr ra .end mips_cache_lock #endif /* CFG_INIT_RAM_LOCK_MIPS */ diff --git a/cpu/mips/incaip_wdt.S b/cpu/mips/incaip_wdt.S index 71adaa19d..2ebcc9113 100644 --- a/cpu/mips/incaip_wdt.S +++ b/cpu/mips/incaip_wdt.S @@ -68,5 +68,5 @@ disable_incaip_wdt: li t1, WD_WRITE_ENDINIT sw t1, WD_CON0(t0) /* end command */ - j ra + jr ra nop diff --git a/cpu/mips/start.S b/cpu/mips/start.S index baac2ceaf..6e1a78cea 100644 --- a/cpu/mips/start.S +++ b/cpu/mips/start.S @@ -286,7 +286,7 @@ reset: la sp, 0(t0) la t9, board_init_f - j t9 + jr t9 nop /* @@ -342,7 +342,7 @@ relocate_code: /* Jump to where we've relocated ourselves. */ addi t0, a2, in_ram - _start - j t0 + jr t0 nop .gpword _GLOBAL_OFFSET_TABLE_ /* _GLOBAL_OFFSET_TABLE_ - _gp */ @@ -387,7 +387,7 @@ in_ram: move a0, a1 la t9, board_init_r - j t9 + jr t9 move a1, a2 /* delay slot */ .end relocate_code -- cgit v1.2.3