From ff88229549e08fdd3f9127c1cc4db11a3576250f Mon Sep 17 00:00:00 2001 From: Dave Liu Date: Sat, 31 Oct 2009 07:59:55 +0800 Subject: ppc/85xx: Fix misc L2 cache enabling bug We need loop-check the flash clear lock and enable bit for L2 cache. Signed-off-by: Dave Liu Signed-off-by: Kumar Gala --- cpu/mpc85xx/release.S | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) (limited to 'cpu') diff --git a/cpu/mpc85xx/release.S b/cpu/mpc85xx/release.S index a1ae78a7f..433ff0254 100644 --- a/cpu/mpc85xx/release.S +++ b/cpu/mpc85xx/release.S @@ -102,18 +102,22 @@ __secondary_start_page: #ifdef CONFIG_BACKSIDE_L2_CACHE /* Enable/invalidate the L2 cache */ msync - lis r3,(L2CSR0_L2FI|L2CSR0_L2LFC)@h - ori r3,r3,(L2CSR0_L2FI|L2CSR0_L2LFC)@l - mtspr SPRN_L2CSR0,r3 + lis r2,(L2CSR0_L2FI|L2CSR0_L2LFC)@h + ori r2,r2,(L2CSR0_L2FI|L2CSR0_L2LFC)@l + mtspr SPRN_L2CSR0,r2 1: mfspr r3,SPRN_L2CSR0 - andis. r1,r3,L2CSR0_L2FI@h + and. r1,r3,r2 bne 1b lis r3,CONFIG_SYS_INIT_L2CSR0@h ori r3,r3,CONFIG_SYS_INIT_L2CSR0@l mtspr SPRN_L2CSR0,r3 isync +2: + mfspr r3,SPRN_L2CSR0 + andis. r1,r3,L2CSR0_L2E@h + beq 2b #endif #define EPAPR_MAGIC (0x45504150) -- cgit v1.2.3 From 4fe5193d464ecdac26ddc71b1351be5b86bbff29 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Tue, 3 Nov 2009 14:34:45 +0100 Subject: ppc4xx: 44x_spd_ddr2.c: Fix register macro ECCCR -> ECCES (SDRAM_ECCES) This error only appears when DEBUG is enabled in this driver. That's why it went unnoticed till now. Signed-off-by: Stefan Roese --- cpu/ppc4xx/44x_spd_ddr2.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'cpu') diff --git a/cpu/ppc4xx/44x_spd_ddr2.c b/cpu/ppc4xx/44x_spd_ddr2.c index 397530640..f8aa14aad 100644 --- a/cpu/ppc4xx/44x_spd_ddr2.c +++ b/cpu/ppc4xx/44x_spd_ddr2.c @@ -3160,7 +3160,7 @@ inline void ppc4xx_ibm_ddr2_register_dump(void) PPC4xx_IBM_DDR2_DUMP_REGISTER(SDTR3); PPC4xx_IBM_DDR2_DUMP_REGISTER(MMODE); PPC4xx_IBM_DDR2_DUMP_REGISTER(MEMODE); - PPC4xx_IBM_DDR2_DUMP_REGISTER(ECCCR); + PPC4xx_IBM_DDR2_DUMP_REGISTER(ECCES); #if (defined(CONFIG_440SP) || defined(CONFIG_440SPE) || \ defined(CONFIG_460EX) || defined(CONFIG_460GT)) PPC4xx_IBM_DDR2_DUMP_REGISTER(CID); -- cgit v1.2.3 From 3ad95deb30ac73bd57e966d321215a17d3236f9f Mon Sep 17 00:00:00 2001 From: Dave Liu Date: Thu, 12 Nov 2009 07:26:37 +0800 Subject: fsl-ddr: Fix the chip-select interleaving issue commit 1542fbdeec0d1e2a6df13189df8dcb1ce8802be3 introduced one new bug to chip-select interleaving. Single DDR controller also can do the chip-select interleaving if there is dual-rank or qual-rank DIMMs. Signed-off-by: Dave Liu Signed-off-by: Kumar Gala --- cpu/mpc8xxx/ddr/options.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) (limited to 'cpu') diff --git a/cpu/mpc8xxx/ddr/options.c b/cpu/mpc8xxx/ddr/options.c index db442918e..2e030c11a 100644 --- a/cpu/mpc8xxx/ddr/options.c +++ b/cpu/mpc8xxx/ddr/options.c @@ -22,9 +22,7 @@ unsigned int populate_memctl_options(int all_DIMMs_registered, unsigned int ctrl_num) { unsigned int i; -#if (CONFIG_NUM_DDR_CONTROLLERS > 1) const char *p; -#endif /* Chip select options. */ @@ -242,8 +240,10 @@ unsigned int populate_memctl_options(int all_DIMMs_registered, simple_strtoul(p, NULL, 0); } } +#endif - if( (p = getenv("ba_intlv_ctl")) != NULL) { + if( ((p = getenv("ba_intlv_ctl")) != NULL) && + (CONFIG_CHIP_SELECTS_PER_CTRL > 1)) { if (strcmp(p, "cs0_cs1") == 0) popts->ba_intlv_ctl = FSL_DDR_CS0_CS1; else if (strcmp(p, "cs2_cs3") == 0) @@ -283,7 +283,6 @@ unsigned int populate_memctl_options(int all_DIMMs_registered, break; } } -#endif fsl_ddr_board_options(popts, pdimm, ctrl_num); -- cgit v1.2.3 From cdbdbe65f5f006cba208accee5a126c659d4b867 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Fri, 13 Nov 2009 08:52:21 -0600 Subject: ppc/85xx: Fix how we determine the number of CAM entries We were incorrectly use the max CAM size as the number of entries in the array for setting up the addrmap. We should be using the NENTRY field which is the low 12-bits of TLB1CFG. Signed-off-by: Kumar Gala --- cpu/mpc85xx/tlb.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'cpu') diff --git a/cpu/mpc85xx/tlb.c b/cpu/mpc85xx/tlb.c index 6e94c237a..ea5deb297 100644 --- a/cpu/mpc85xx/tlb.c +++ b/cpu/mpc85xx/tlb.c @@ -132,10 +132,10 @@ int find_tlb_idx(void *addr, u8 tlbsel) void init_addr_map(void) { int i; - unsigned int max_cam = (mfspr(SPRN_TLB1CFG) >> 16) & 0xff; + unsigned int num_cam = mfspr(SPRN_TLB1CFG) & 0xfff; /* walk all the entries */ - for (i = 0; i < max_cam; i++) { + for (i = 0; i < num_cam; i++) { unsigned long epn; u32 tsize, _mas1; phys_addr_t rpn; -- cgit v1.2.3 From cada315100c88894b85972a91309a6f2413966b6 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Thu, 1 Oct 2009 23:55:17 +0200 Subject: mpc8260: move FDT memory node fixup into common CPU code. Signed-off-by: Marcel Ziswiler Tested-by: Heiko Schocher --- board/freescale/mpc8260ads/mpc8260ads.c | 13 ------------- board/ids8247/ids8247.c | 16 ---------------- board/keymile/mgcoge/mgcoge.c | 8 +------- board/muas3001/muas3001.c | 16 ---------------- cpu/mpc8260/cpu.c | 1 + 5 files changed, 2 insertions(+), 52 deletions(-) (limited to 'cpu') diff --git a/board/freescale/mpc8260ads/mpc8260ads.c b/board/freescale/mpc8260ads/mpc8260ads.c index 49a88bbdd..be5562610 100644 --- a/board/freescale/mpc8260ads/mpc8260ads.c +++ b/board/freescale/mpc8260ads/mpc8260ads.c @@ -550,24 +550,11 @@ void pci_init_board(void) #endif #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) -void ft_blob_update(void *blob, bd_t *bd) -{ - int ret; - - ret = fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize); - - if (ret < 0) { - printf("ft_blob_update(): cannot set /memory/reg " - "property err:%s\n", fdt_strerror(ret)); - } -} - void ft_board_setup(void *blob, bd_t *bd) { ft_cpu_setup(blob, bd); #ifdef CONFIG_PCI ft_pci_setup(blob, bd); #endif - ft_blob_update(blob, bd); } #endif diff --git a/board/ids8247/ids8247.c b/board/ids8247/ids8247.c index 79fe9da5b..d621833cc 100644 --- a/board/ids8247/ids8247.c +++ b/board/ids8247/ids8247.c @@ -400,24 +400,8 @@ int board_nand_init(struct nand_chip *nand) #endif /* CONFIG_CMD_NAND */ #if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT) -/* - * update "memory" property in the blob - */ -void ft_blob_update(void *blob, bd_t *bd) -{ - int ret; - - ret = fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize); - - if (ret < 0) { - printf("ft_blob_update(): cannot set /memory/reg " - "property err:%s\n", fdt_strerror(ret)); - } -} - void ft_board_setup(void *blob, bd_t *bd) { ft_cpu_setup( blob, bd); - ft_blob_update(blob, bd); } #endif /* defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT) */ diff --git a/board/keymile/mgcoge/mgcoge.c b/board/keymile/mgcoge/mgcoge.c index b16a01ccc..932a80547 100644 --- a/board/keymile/mgcoge/mgcoge.c +++ b/board/keymile/mgcoge/mgcoge.c @@ -312,11 +312,10 @@ int hush_init_var (void) #if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT) /* - * update "memory" property in the blob + * update "flash" property in the blob */ void ft_blob_update (void *blob, bd_t *bd) { - ulong memory_data[2] = {0}; ulong *flash_data = NULL; ulong flash_reg[6] = {0}; flash_info_t *info; @@ -324,11 +323,6 @@ void ft_blob_update (void *blob, bd_t *bd) int size; int i = 0; - memory_data[0] = cpu_to_be32 (bd->bi_memstart); - memory_data[1] = cpu_to_be32 (bd->bi_memsize); - fdt_set_node_and_value (blob, "/memory", "reg", memory_data, - sizeof (memory_data)); - len = fdt_get_node_and_value (blob, "/localbus", "ranges", (void *)&flash_data); diff --git a/board/muas3001/muas3001.c b/board/muas3001/muas3001.c index 36caed813..e0a7f32fd 100644 --- a/board/muas3001/muas3001.c +++ b/board/muas3001/muas3001.c @@ -308,25 +308,9 @@ int board_early_init_r (void) void ft_blob_update (void *blob, bd_t *bd) { int ret, nodeoffset = 0; - ulong memory_data[2] = {0}; ulong flash_data[4] = {0}; ulong speed = 0; - memory_data[0] = cpu_to_be32 (bd->bi_memstart); - memory_data[1] = cpu_to_be32 (bd->bi_memsize); - - nodeoffset = fdt_path_offset (blob, "/memory"); - if (nodeoffset >= 0) { - ret = fdt_setprop (blob, nodeoffset, "reg", memory_data, - sizeof(memory_data)); - if (ret < 0) - printf ("ft_blob_update): cannot set /memory/reg " - "property err:%s\n", fdt_strerror (ret)); - } else { - /* memory node is required in dts */ - printf ("ft_blob_update(): cannot find /memory node " - "err:%s\n", fdt_strerror(nodeoffset)); - } /* update Flash addr, size */ flash_data[2] = cpu_to_be32 (CONFIG_SYS_FLASH_BASE); flash_data[3] = cpu_to_be32 (CONFIG_SYS_FLASH_SIZE); diff --git a/cpu/mpc8260/cpu.c b/cpu/mpc8260/cpu.c index 17e624872..aedbf297a 100644 --- a/cpu/mpc8260/cpu.c +++ b/cpu/mpc8260/cpu.c @@ -318,6 +318,7 @@ void ft_cpu_setup (void *blob, bd_t *bd) "timebase-frequency", OF_TBCLK, 1); do_fixup_by_prop_u32(blob, "device_type", "cpu", 4, "clock-frequency", bd->bi_intfreq, 1); + fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize); } #endif /* CONFIG_OF_LIBFDT */ -- cgit v1.2.3