From 3111d32c494e8251b90917447796a7206b757e1e Mon Sep 17 00:00:00 2001 From: Becky Bruce Date: Thu, 6 Nov 2008 17:37:35 -0600 Subject: mpc8641: Support 36-bit physical addressing This patch creates a memory map with all the devices in 36-bit physical space, in addition to the 32-bit map. The CCSR relocation is moved (again, sorry) to allow for the physical address to be 36 bits - this requires translation to be enabled. With 36-bit physical addressing enabled, we are no longer running with VA=PA translations. This means we have to distinguish between the two in the config file. The existing region name is used to indicate the virtual address, and a _PHYS variety is created to represent the physical address. Large physical addressing is not enabled by default. Set CONFIG_PHYS_64BIT in the config file to turn this on. Signed-off-by: Becky Bruce --- doc/README.mpc8641hpcn | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) (limited to 'doc/README.mpc8641hpcn') diff --git a/doc/README.mpc8641hpcn b/doc/README.mpc8641hpcn index 0a6e715bc..5ac39e678 100644 --- a/doc/README.mpc8641hpcn +++ b/doc/README.mpc8641hpcn @@ -113,6 +113,9 @@ To Flash U-boot into the alternative bank (0xEF800000 - 0xEFBFFFFF): ------------- NOTE: RIO and PCI are mutually exclusive, so they share an address +For 32-bit u-boot, devices are mapped so that the virtual address == +the physical address, and the map looks liks this: + Memory Range Device Size ------------ ------ ---- 0x0000_0000 0x7fff_ffff DDR 2G @@ -127,6 +130,27 @@ NOTE: RIO and PCI are mutually exclusive, so they share an address 0xffc1_0000 0xffc1_ffff PCI2/PEX2 IO 64K 0xef80_0000 0xefff_ffff Flash 8M +For 36-bit-enabled u-boot, the virtual map is the same as for 32-bit. +However, the physical map is altered to reside in 36-bit space, as follows. +Addresses are no longer mapped with VA == PA. All accesses from +software use the VA; the PA is only used for setting up windows +and mappings. Note that the low 32 bits are the same as the VA above; +only the top 4 bits vary: + + Memory Range Device Size + ------------ ------ ---- + 0x0_0000_0000 0x0_7fff_ffff DDR 2G + 0xc_8000_0000 0xc_9fff_ffff RIO MEM 512M + 0xc_8000_0000 0xc_9fff_ffff PCI1/PEX1 MEM 512M + 0xc_a000_0000 0xc_bfff_ffff PCI2/PEX2 MEM 512M + 0xf_ffe0_0000 0xf_ffef_ffff CCSR 1M + 0xf_ffdf_0000 0xf_ffdf_7fff PIXIS 8K + 0xf_ffdf_8000 0xf_ffdf_ffff CF 8K + 0x0_f840_0000 0xf_f840_3fff Stack space 32K + 0xf_ffc0_0000 0xf_ffc0_ffff PCI1/PEX1 IO 64K + 0xf_ffc1_0000 0xf_ffc1_ffff PCI2/PEX2 IO 64K + 0xf_ef80_0000 0xf_efff_ffff Flash 8M + 5. pixis_reset command -------------------- A new command, "pixis_reset", is introduced to reset mpc8641hpcn board -- cgit v1.2.3