From 693a048d8ac191181f5b9adbff642d3f1bbd479f Mon Sep 17 00:00:00 2001 From: Mingkai Hu Date: Wed, 23 Sep 2009 15:20:39 +0800 Subject: Add README.mpc8536ds Add boot from NAND/eSDHC/eSPI description Signed-off-by: Mingkai Hu Signed-off-by: Kumar Gala --- doc/README.mpc8536ds | 127 +++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 127 insertions(+) create mode 100644 doc/README.mpc8536ds (limited to 'doc') diff --git a/doc/README.mpc8536ds b/doc/README.mpc8536ds new file mode 100644 index 000000000..4d0bee042 --- /dev/null +++ b/doc/README.mpc8536ds @@ -0,0 +1,127 @@ +Overview: +========= + +The MPC8536E integrates a PowerPC processor core with system logic +required for imaging, networking, and communications applications. + +Boot from NAND: +=============== + +The MPC8536E is capable of booting from NAND flash which uses the image +u-boot-nand.bin. This image contains two parts: a first stage image(also +call 4K NAND loader and a second stage image. The former is appended to +the latter to produce u-boot-nand.bin. + +The bootup process can be divided into two stages: the first stage will +configure the L2SRAM, then copy the second stage image to L2SRAM and jump +to it. The second stage image is to configure all the hardware and boot up +to U-Boot command line. + +The 4K NAND loader's code comes from the corresponding nand_spl directory, +along with the code twisted by CONFIG_NAND_SPL. The macro CONFIG_NAND_SPL +is mainly used to shrink the code size to the 4K size limitation. + +The macro CONFIG_SYS_RAMBOOT is used to control the code to produce the +second stage image. It's set in the board config file when boot from NAND +is selected. + +Build and boot steps +-------------------- + +1. Building image + make MPC8536DS_NAND_config + make CROSS_COMPILE=powerpc-none-linux-gnuspe- all + +2. Change dip-switch + SW2[5-8] = 1011 + SW9[1-3] = 101 + Note: 1 stands for 'on', 0 stands for 'off' + +3. Flash image + tftp 1000000 u-boot-nand.bin + nand erase 0 a0000 + nand write 1000000 0 a0000 + +Boot from On-chip ROM: +====================== + +The MPC8536E is capable of booting from the on-chip ROM - boot from eSDHC +and boot from eSPI. When power on, the porcessor excutes the ROM code to +initialize the eSPI/eSDHC controller, and loads the mian U-Boot image from +the memory device that interfaced to the controller, such as the SDCard or +SPI EEPROM, to the target memory, e.g. SDRAM or L2SRAM, then boot from it. + +The memory device should contain a specific data structure with control word +and config word at the fixed address. The config word direct the process how +to config the memory device, and the control word direct the processor where +to find the image on the memory device, or where copy the main image to. The +user can use any method to store the data structure to the memory device, only +if store it on the assigned address. + +Build and boot steps +-------------------- + +For boot from eSDHC: +1. Build image + make MPC8536DS_SDCARD_config + make CROSS_COMPILE=powerpc-none-linux-gnuspe- all + +2. Change dip-switch + SW2[5-8] = 0111 + SW3[1] = 0 + SW8[7] = 0 - The on-board SD/MMC slot is active + SW8[7] = 1 - The externel SD/MMC slot is active + +3. Put image to SDCard + Put the follwing info at the assigned address on the SDCard: + + Offset | Data | Description + -------------------------------------------------------- + | 0x40-0x43 | 0x424F4F54 | BOOT signature | + -------------------------------------------------------- + | 0x48-0x4B | 0x00080000 | u-boot.bin's size | + -------------------------------------------------------- + | 0x50-0x53 | 0x???????? | u-boot.bin's Addr on SDCard | + -------------------------------------------------------- + | 0x58-0x5B | 0xF8F80000 | Target Address | + ------------------------------------------------------- + | 0x60-0x63 | 0xF8FFF000 | Execution Starting Address | + -------------------------------------------------------- + | 0x68-0x6B | 0x6 | Number of Config Addr/Data | + -------------------------------------------------------- + | 0x80-0x83 | 0xFF720100 | Config Addr 1 | + | 0x84-0x87 | 0xF8F80000 | Config Data 1 | + -------------------------------------------------------- + | 0x88-0x8b | 0xFF720e44 | Config Addr 2 | + | 0x8c-0x8f | 0x0000000C | Config Data 2 | + -------------------------------------------------------- + | 0x90-0x93 | 0xFF720000 | Config Addr 3 | + | 0x94-0x97 | 0x80010000 | Config Data 3 | + -------------------------------------------------------- + | 0x98-0x9b | 0xFF72e40e | Config Addr 4 | + | 0x9c-0x9f | 0x00000040 | Config Data 4 | + -------------------------------------------------------- + | 0xa0-0xa3 | 0x40000001 | Config Addr 5 | + | 0xa4-0xa7 | 0x00000100 | Config Data 5 | + -------------------------------------------------------- + | 0xa8-0xab | 0x80000001 | Config Addr 6 | + | 0xac-0xaf | 0x80000001 | Config Data 6 | + -------------------------------------------------------- + | ...... | + -------------------------------------------------------- + | 0x???????? | u-boot.bin | + -------------------------------------------------------- + + then insert the SDCard to the active slot to boot up. + +For boot from eSPI: +1. Build image + make MPC8536DS_SPIFLASH_config + make CROSS_COMPILE=powerpc-none-linux-gnuspe- all + +2. Change dip-switch + SW2[5-8] = 0110 + +3. Put image to SPI flash + Put the info in the above table onto the SPI flash, then + boot up. -- cgit v1.2.3