From d48eb5131d287f52bb85b4c58c8680a2e8e3b641 Mon Sep 17 00:00:00 2001 From: Peter Tyser Date: Sat, 18 Apr 2009 22:34:02 -0500 Subject: i2c: Remove deprecated individual i2c commands The following individual I2C commands have been removed: imd, imm, inm, imw, icrc32, iprobe, iloop, isdram. The functionality of the individual commands is still available via the 'i2c' command. This change only has an impact on those boards which did not have CONFIG_I2C_CMD_TREE defined. Signed-off-by: Peter Tyser --- doc/feature-removal-schedule.txt | 12 ------------ 1 file changed, 12 deletions(-) (limited to 'doc') diff --git a/doc/feature-removal-schedule.txt b/doc/feature-removal-schedule.txt index b1f0582f7..9bbdc0a83 100644 --- a/doc/feature-removal-schedule.txt +++ b/doc/feature-removal-schedule.txt @@ -59,18 +59,6 @@ Who: Wolfgang Denk and board maintainers --------------------------- -What: Individual I2C commands -When: April 2009 -Why: Per the U-Boot README, individual I2C commands such as "imd", "imm", - "imw", etc are deprecated. The single "i2c" command which is - currently enabled via CONFIG_I2C_CMD_TREE contains the same - functionality as the individual I2C commands. The individual - I2C commands should be removed as well as any references to - CONFIG_I2C_CMD_TREE. -Who: Peter Tyser - ---------------------------- - What: Legacy NAND code When: April 2009 Why: Legacy NAND code is deprecated. Similar functionality exists in -- cgit v1.2.3 From 0f89c54be92773b23d66ac401ba6acb6144100c3 Mon Sep 17 00:00:00 2001 From: Peter Tyser Date: Sat, 18 Apr 2009 22:34:03 -0500 Subject: i2c: Update references to individual i2c commands The individual i2c commands imd, imm, inm, imw, icrc32, iprobe, iloop, and isdram are no longer available so all references to them have been updated to the new form of "i2c ". Signed-off-by: Peter Tyser --- README | 15 ++++----------- board/esd/tasreg/tasreg.c | 4 ++-- common/cmd_i2c.c | 27 +++++++++++---------------- doc/README.ebony | 20 ++++++++++---------- doc/README.m52277evb | 8 +------- doc/README.m5373evb | 8 +------- doc/README.m54455evb | 8 +------- doc/README.m5475evb | 8 +------- doc/README.ppc440 | 4 ++-- doc/README.xpedite1k | 6 +++--- drivers/i2c/tsi108_i2c.c | 2 +- include/configs/bubinga.h | 2 +- include/configs/sacsng.h | 6 +++--- include/configs/taihu.h | 2 +- 14 files changed, 42 insertions(+), 78 deletions(-) (limited to 'doc') diff --git a/README b/README index 03ad69a8b..75fc4b7b3 100644 --- a/README +++ b/README @@ -1430,9 +1430,9 @@ The following options need to be configured: CONFIG_SYS_I2C_NOPROBES This option specifies a list of I2C devices that will be skipped - when the 'i2c probe' command is issued (or 'iprobe' using the legacy - command). If CONFIG_I2C_MULTI_BUS is set, specify a list of bus-device - pairs. Otherwise, specify a 1D array of device addresses + when the 'i2c probe' command is issued. If CONFIG_I2C_MULTI_BUS + is set, specify a list of bus-device pairs. Otherwise, specify + a 1D array of device addresses e.g. #undef CONFIG_I2C_MULTI_BUS @@ -2866,14 +2866,7 @@ mw - memory write (fill) cp - memory copy cmp - memory compare crc32 - checksum calculation -imd - i2c memory display -imm - i2c memory modify (auto-incrementing) -inm - i2c memory modify (constant address) -imw - i2c memory write (fill) -icrc32 - i2c checksum calculation -iprobe - probe to discover valid I2C chip addresses -iloop - infinite loop on address range -isdram - print SDRAM configuration information +i2c - I2C sub-system sspi - SPI utility commands base - print or set address offset printenv- print environment variables diff --git a/board/esd/tasreg/tasreg.c b/board/esd/tasreg/tasreg.c index 760c71d26..9602ee59f 100644 --- a/board/esd/tasreg/tasreg.c +++ b/board/esd/tasreg/tasreg.c @@ -231,7 +231,7 @@ int do_iploop(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) addr = simple_strtol (argv[1], NULL, 16); - printf("iprobe looping on addr 0x%lx (cntrl-c aborts)...\n", addr); + printf("i2c probe looping on addr 0x%lx (cntrl-c aborts)...\n", addr); for (;;) { i2c_probe(addr); @@ -249,7 +249,7 @@ int do_iploop(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) } U_BOOT_CMD( iploop, 2, 1, do_iploop, - "iprobe loop ", + "i2c probe loop ", NULL ); diff --git a/common/cmd_i2c.c b/common/cmd_i2c.c index fd9f9a44f..903856d2d 100644 --- a/common/cmd_i2c.c +++ b/common/cmd_i2c.c @@ -27,11 +27,6 @@ * There are several parameters in many of the commands that bear further * explanations: * - * Two of the commands (imm and imw) take a byte/word/long modifier - * (e.g. imm.w specifies the word-length modifier). This was done to - * allow manipulating word-length registers. It was not done on any other - * commands because it was not deemed useful. - * * {i2c_chip} is the I2C chip address (the first byte sent on the bus). * Each I2C chip on the bus has a unique address. On the I2C data bus, * the address is the upper seven bits and the LSB is the "read/write" @@ -69,11 +64,11 @@ * {addr} field (since .1 is the default, it doesn't actually have to * be specified). Examples: given a memory chip at I2C chip address * 0x50, the following would happen... - * imd 50 0 10 display 16 bytes starting at 0x000 + * i2c md 50 0 10 display 16 bytes starting at 0x000 * On the bus: A0 00 A1 ... - * imd 50 100 10 display 16 bytes starting at 0x100 + * i2c md 50 100 10 display 16 bytes starting at 0x100 * On the bus: A2 00 A3 ... - * imd 50 210 10 display 16 bytes starting at 0x210 + * i2c md 50 210 10 display 16 bytes starting at 0x210 * On the bus: A4 10 A5 ... * This is awfully ugly. It would be nice if someone would think up * a better way of handling this. @@ -158,7 +153,7 @@ int i2c_set_bus_speed(unsigned int) /* * Syntax: - * imd {i2c_chip} {addr}{.0, .1, .2} {len} + * i2c md {i2c_chip} {addr}{.0, .1, .2} {len} */ #define DISP_LINE_LEN 16 @@ -275,7 +270,7 @@ int do_i2c_nm ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) /* Write (fill) memory * * Syntax: - * imw {i2c_chip} {addr}{.0, .1, .2} {data} [{count}] + * i2c mw {i2c_chip} {addr}{.0, .1, .2} {data} [{count}] */ int do_i2c_mw ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { @@ -359,7 +354,7 @@ int do_i2c_mw ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) /* Calculate a CRC on memory * * Syntax: - * icrc32 {i2c_chip} {addr}{.0, .1, .2} {count} + * i2c crc32 {i2c_chip} {addr}{.0, .1, .2} {count} */ int do_i2c_crc (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { @@ -428,8 +423,8 @@ int do_i2c_crc (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) /* Modify memory. * * Syntax: - * imm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2} - * inm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2} + * i2c mm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2} + * i2c nm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2} */ static int @@ -562,7 +557,7 @@ mod_i2c_mem(cmd_tbl_t *cmdtp, int incrflag, int flag, int argc, char *argv[]) /* * Syntax: - * iprobe {addr}{.0, .1, .2} + * i2c probe {addr}{.0, .1, .2} */ int do_i2c_probe (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { @@ -604,7 +599,7 @@ int do_i2c_probe (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) /* * Syntax: - * iloop {i2c_chip} {addr}{.0, .1, .2} [{length}] [{delay}] + * i2c loop {i2c_chip} {addr}{.0, .1, .2} [{length}] [{delay}] * {length} - Number of bytes to read * {delay} - A DECIMAL number and defaults to 1000 uSec */ @@ -726,7 +721,7 @@ static void decode_bits (u_char const b, char const *str[], int const do_once) /* * Syntax: - * sdram {i2c_chip} + * i2c sdram {i2c_chip} */ int do_sdram (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) { diff --git a/doc/README.ebony b/doc/README.ebony index a395a4996..a8479a479 100644 --- a/doc/README.ebony +++ b/doc/README.ebony @@ -31,17 +31,17 @@ J42: open All others are factory default. -I2C iprobe +I2C probe ===================== The i2c utilities have been tested on both Rev B. and Rev C. and look good. The CONFIG_SYS_I2C_NOPROBES macro is defined to prevent probing the CDCV850 clock controller at address 0x69 (since reading it causes the i2c implementation to misbehave. The output of -iprobe should look like this (assuming you are only using a single +'i2c probe' should look like this (assuming you are only using a single SO-DIMM: -=> iprobe +=> i2c probe Valid chip addresses: 50 53 54 Excluded chip addresses: 69 @@ -63,13 +63,13 @@ J42 - strapped This will select the default sys0 and sys1 settings (the serial eeproms are not used). Then power up the board and fix the serial -eeprom using the imm command. Here are the values I currently +eeprom using the 'i2c mm' command. Here are the values I currently use: -=> imd 50 0 10 +=> i2c md 50 0 10 0000: bf a2 04 01 ae 94 11 00 00 00 00 00 00 00 00 00 ................ -=> imd 54 0 10 +=> i2c md 54 0 10 0000: 8f b3 24 01 4d 14 11 00 00 00 00 00 00 00 00 00 ..$.M........... Once you have the eeproms set correctly change the @@ -83,8 +83,8 @@ the SPD to initialize the DDR SDRAM control registers. So if the SPD eeprom is corrupted, U-Boot will never get into ram. Here's how I got out of this situation: -0. First, _before_ playing with the i2c utilities, do an iprobe, then -use imd to capture the various device contents to a file. Some day +0. First, _before_ playing with the i2c utilities, do an 'i2c probe', then +use 'i2c md' to capture the various device contents to a file. Some day you may be glad you did this ... trust me :-). Otherwise try the following: @@ -100,12 +100,12 @@ settings without using the SPD eeprom. 3. Load the new U-Boot image and reboot ebony. -4. Repair the SPD eeprom using the imm command. Here's the eeprom +4. Repair the SPD eeprom using the 'i2c mm' command. Here's the eeprom contents that work with the default SO-DIMM that comes with the ebony board (micron 8VDDT164AG-265A1). Note: these are probably _not_ the factory settings ... but they work. -=> imd 53 0 10 80 +=> i2c md 53 0 10 80 0000: 80 08 07 0c 0a 01 40 00 04 75 75 00 80 08 00 01 ......@..uu..... 0010: 0e 04 0c 01 02 20 00 a0 75 00 00 50 3c 50 2d 20 ..... ..u..P imd 50 0 10 +=> i2c md 50 0 10 0000: 85 7d 42 06 07 80 11 00 00 00 00 00 00 00 00 00 .}B............. diff --git a/drivers/i2c/tsi108_i2c.c b/drivers/i2c/tsi108_i2c.c index 3829ef98f..defbba40f 100644 --- a/drivers/i2c/tsi108_i2c.c +++ b/drivers/i2c/tsi108_i2c.c @@ -129,7 +129,7 @@ static int i2c_read_byte ( * chip_addr: I2C chip address, range 0..127 * (to read from SPD channel EEPROM use (0xD0 ... 0xD7) * NOTE: The bit 7 in the chip_addr serves as a channel select. - * This hack is for enabling "isdram" command on Tsi108 boards + * This hack is for enabling "i2c sdram" command on Tsi108 boards * without changes to common code. Used for I2C reads only. * byte_addr: Memory or register address within the chip * alen: Number of bytes to use for addr (typically 1, 2 for larger diff --git a/include/configs/bubinga.h b/include/configs/bubinga.h index dcf5b6de0..627060a75 100644 --- a/include/configs/bubinga.h +++ b/include/configs/bubinga.h @@ -134,7 +134,7 @@ */ #define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ -#define CONFIG_SYS_I2C_NOPROBES { 0x69 } /* avoid iprobe hangup (why?) */ +#define CONFIG_SYS_I2C_NOPROBES { 0x69 } /* avoid i2c probe hangup (why?) */ #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 6 /* 24C02 requires 5ms delay */ #if defined(CONFIG_CMD_EEPROM) diff --git a/include/configs/sacsng.h b/include/configs/sacsng.h index f4e08c689..0ab6fc31e 100644 --- a/include/configs/sacsng.h +++ b/include/configs/sacsng.h @@ -408,9 +408,9 @@ "echo hostname ${hostname}\0" \ "ana=run adc ; run dac\0" \ "adc=run adc-12 ; run adc-34\0" \ -"adc-12=echo ### ADC-12 ; imd.b e 81 e\0" \ -"adc-34=echo ### ADC-34 ; imd.b f 81 e\0" \ -"dac=echo ### DAC ; imd.b 11 81 5\0" \ +"adc-12=echo ### ADC-12 ; i2c md e 81 e\0" \ +"adc-34=echo ### ADC-34 ; i2c md f 81 e\0" \ +"dac=echo ### DAC ; i2c md 11 81 5\0" \ "boot-hook=echo\0" /* What should the console's baud rate be? */ diff --git a/include/configs/taihu.h b/include/configs/taihu.h index 8c48c669d..836081d0d 100644 --- a/include/configs/taihu.h +++ b/include/configs/taihu.h @@ -139,7 +139,7 @@ */ #define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ -#define CONFIG_SYS_I2C_NOPROBES { 0x69 } /* avoid iprobe hangup (why?) */ +#define CONFIG_SYS_I2C_NOPROBES { 0x69 } /* avoid i2c probe hangup (why?) */ #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 6 /* 24C02 requires 5ms delay */ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* I2C boot EEPROM (24C02W) */ -- cgit v1.2.3 From 65fd21c80fcaca2bbfe3ab06ab6ac68207408078 Mon Sep 17 00:00:00 2001 From: Tom Rix Date: Fri, 15 May 2009 23:47:12 +0200 Subject: LED Add documentation describing the status_led and colour led API. This document describes the u-boot status LED API. This allows common u-boot commands to use a board's leds to provide status for activities like booting and downloading files. Signed-off-by: Tom Rix --- doc/README.LED | 78 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 78 insertions(+) create mode 100644 doc/README.LED (limited to 'doc') diff --git a/doc/README.LED b/doc/README.LED new file mode 100644 index 000000000..12211774e --- /dev/null +++ b/doc/README.LED @@ -0,0 +1,78 @@ +Status LED +======================================== + +This README describes the status LED API. + +The API is defined by the include file include/status_led.h + +The first step is to define CONFIG_STATUS_LED in the board config file. + +If the LED support is only for a single board, define CONFIG_BOARD_SPECIFIC_LED +in the board config file. + +At a minimum, these macros must be defined at +STATUS_LED_BIT +STATUS_LED_STATE +STATUS_LED_PERIOD + +If there are multiple status LED's define +STATUS_LED_BIT +STATUS_LED_STATE +STATUS_LED_PERIOD + +Where can a integer 1 through 3. + +STATUS_LED_BIT is passed into the __led_* functions to identify which LED is +being acted on. As such, the value choose must be unique with with respect to +the other STATUS_LED_BIT's. Mapping the value to a physical LED is the +reponsiblity of the __led_* function. + +STATUS_LED_STATE is the initial state of the LED. It should be set to one of +these values: STATUS_LED_OFF or STATUS_LED_ON. + +STATUS_LED_PERIOD is how long is the LED blink period. This usually set to +(CONFIG_SYS_HZ / ) where is the frequency of the blink. Typical values +range from 2 to 10. + +Some other LED macros + +STATUS_LED_BOOT is the LED to light when the board is booting. This must be a +valid STATUS_LED_BIT value. + +STATUS_LED_RED is the red LED. It is used signal errors. This must be a valid +STATUS_LED_BIT value. Other similar color LED's are STATUS_LED_YELLOW and +STATUS_LED_BLUE. + +These board must define these functions + +__led_init is called once to initialize the LED to STATUS_LED_STATE. One time +start up code should be placed here. + +__led_set is called to change the state of the LED. + +__led_toggle is called to toggle the current state of the LED. + +Colour LED +======================================== + +Colour LED's are at present only used by ARM. + +The functions names explain their purpose. + +coloured_LED_init +red_LED_on +red_LED_off +green_LED_on +green_LED_off +yellow_LED_on +yellow_LED_off +blue_LED_on +blue_LED_off + +These are weakly defined in lib_arm/board.c to noops. Where applicable, define +these functions in the board specific source. + +TBD : Describe older board dependent macros similar to what is done for +CONFIG_TQM8xxL. + +TBD : Describe general support via asm/status_led.h -- cgit v1.2.3 From 376aee78dd66ae0dc4ce496cbe93ecc80aaad48e Mon Sep 17 00:00:00 2001 From: Tom Rix Date: Fri, 15 May 2009 23:48:36 +0200 Subject: ZOOM2 Add initial support for Zoom2 Zoom2 is a new board from Texas Instruments and LogicPD The logicpd web site is a good source for general information on this board. Please start looking here if the below links are broken. http://www.logicpd.com This is a pdf of the product http://www.logicpd.com/sites/default/files/1012659A_Zoom_OMAP34x-II_MDP_Brief.pdf This is the product description web page http://www.logicpd.com/products/development-kits/texas-instruments-zoom%E2%84%A2-omap34x-ii-mdp This patch provides a zoom2 base target by copying zoom1 and by making some obvious changes. To configure, run make omap3_zoom2_config Signed-off-by: Tom Rix --- MAINTAINERS | 4 + MAKEALL | 1 + Makefile | 3 + board/omap3/common/Makefile | 1 + board/omap3/zoom2/Makefile | 49 +++++++++ board/omap3/zoom2/config.mk | 33 ++++++ board/omap3/zoom2/zoom2.c | 76 ++++++++++++++ board/omap3/zoom2/zoom2.h | 149 ++++++++++++++++++++++++++++ doc/README.omap3 | 15 ++- include/configs/omap3_zoom2.h | 226 ++++++++++++++++++++++++++++++++++++++++++ 10 files changed, 555 insertions(+), 2 deletions(-) create mode 100644 board/omap3/zoom2/Makefile create mode 100644 board/omap3/zoom2/config.mk create mode 100644 board/omap3/zoom2/zoom2.c create mode 100644 board/omap3/zoom2/zoom2.h create mode 100644 include/configs/omap3_zoom2.h (limited to 'doc') diff --git a/MAINTAINERS b/MAINTAINERS index 3d5066877..bf076b971 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -610,6 +610,10 @@ Stelian Pop at91sam9263ek ARM926EJS (AT91SAM9263 SoC) at91sam9rlek ARM926EJS (AT91SAM9RL SoC) +Tom Rix + + omap3_zoom2 ARM CORTEX-A8 (OMAP3xx SoC) + Stefan Roese ixdpg425 xscale diff --git a/MAKEALL b/MAKEALL index 57dd42539..9b48773bc 100755 --- a/MAKEALL +++ b/MAKEALL @@ -562,6 +562,7 @@ LIST_ARM_CORTEX_A8=" \ omap3_evm \ omap3_pandora \ omap3_zoom1 \ + omap3_zoom2 \ " ######################################################################### diff --git a/Makefile b/Makefile index 10f6b1f49..cf140a4d3 100644 --- a/Makefile +++ b/Makefile @@ -2994,6 +2994,9 @@ omap3_pandora_config : unconfig omap3_zoom1_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm_cortexa8 zoom1 omap3 omap3 +omap3_zoom2_config : unconfig + @$(MKCONFIG) $(@:_config=) arm arm_cortexa8 zoom2 omap3 omap3 + ######################################################################### ## XScale Systems ######################################################################### diff --git a/board/omap3/common/Makefile b/board/omap3/common/Makefile index 7b892fab8..b8a0b14a0 100644 --- a/board/omap3/common/Makefile +++ b/board/omap3/common/Makefile @@ -33,6 +33,7 @@ COBJS-$(CONFIG_OMAP3_BEAGLE) += power.o COBJS-$(CONFIG_OMAP3_OVERO) += power.o COBJS-$(CONFIG_OMAP3_PANDORA) += power.o COBJS-$(CONFIG_OMAP3_ZOOM1) += power.o +COBJS-$(CONFIG_OMAP3_ZOOM2) += power.o COBJS := $(COBJS-y) SRCS := $(COBJS:.o=.c) diff --git a/board/omap3/zoom2/Makefile b/board/omap3/zoom2/Makefile new file mode 100644 index 000000000..088b8cb01 --- /dev/null +++ b/board/omap3/zoom2/Makefile @@ -0,0 +1,49 @@ +# +# (C) Copyright 2000, 2001, 2002 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS := zoom2.o + +SRCS := $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) + +$(LIB): $(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +clean: + rm -f $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/omap3/zoom2/config.mk b/board/omap3/zoom2/config.mk new file mode 100644 index 000000000..33f394b85 --- /dev/null +++ b/board/omap3/zoom2/config.mk @@ -0,0 +1,33 @@ +# +# (C) Copyright 2009 +# Texas Instruments, +# +# Zoom II uses OMAP3 (ARM-CortexA8) CPU +# see http://www.ti.com/ for more information on Texas Instruments +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# +# Physical Address: +# 0x80000000 (bank0) +# 0xA0000000 (bank1) +# Linux-Kernel is expected to be at 0x80008000, entry 0x80008000 +# (mem base + reserved) + +# For use with external or internal boots. +TEXT_BASE = 0x80e80000 diff --git a/board/omap3/zoom2/zoom2.c b/board/omap3/zoom2/zoom2.c new file mode 100644 index 000000000..0700c56d7 --- /dev/null +++ b/board/omap3/zoom2/zoom2.c @@ -0,0 +1,76 @@ +/* + * Copyright (c) 2009 Wind River Systems, Inc. + * Tom Rix + * + * Derived from Zoom1 code by + * Nishanth Menon + * Sunil Kumar + * Shashi Ranjan + * Richard Woodruff + * Syed Mohammed Khasim + * + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#include +#include +#include +#include +#include +#include "zoom2.h" + +/* + * Routine: board_init + * Description: Early hardware init. + */ +int board_init (void) +{ + DECLARE_GLOBAL_DATA_PTR; + + gpmc_init (); /* in SRAM or SDRAM, finish GPMC */ + /* board id for Linux */ + gd->bd->bi_arch_number = MACH_TYPE_OMAP_ZOOM2; + /* boot param addr */ + gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); + + return 0; +} + +/* + * Routine: misc_init_r + * Description: Configure zoom board specific configurations + */ +int misc_init_r (void) +{ + power_init_r (); + dieid_num_r (); + return 0; +} + +/* + * Routine: set_muxconf_regs + * Description: Setting up the configuration Mux registers specific to the + * hardware. Many pins need to be moved from protect to primary + * mode. + */ +void set_muxconf_regs (void) +{ + /* platform specific muxes */ + MUX_ZOOM2 (); +} diff --git a/board/omap3/zoom2/zoom2.h b/board/omap3/zoom2/zoom2.h new file mode 100644 index 000000000..cae8a7a7f --- /dev/null +++ b/board/omap3/zoom2/zoom2.h @@ -0,0 +1,149 @@ +/* + * Copyright (c) 2009 Wind River Systems, Inc. + * Tom Rix + * + * Derived from: board/omap3/zoom1/zoom1.h + * Nishanth Menon + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#ifndef _BOARD_ZOOM2_H_ +#define _BOARD_ZOOM2_H_ + +const omap3_sysinfo sysinfo = { + DDR_STACKED, + "OMAP3 Zoom2 ", + "NAND", +}; + +/* + * IEN - Input Enable + * IDIS - Input Disable + * PTD - Pull type Down + * PTU - Pull type Up + * DIS - Pull type selection is inactive + * EN - Pull type selection is active + * M0 - Mode 0 + * The commented string gives the final mux configuration for that pin + */ +#define MUX_ZOOM2() \ + /* SDRC*/\ + MUX_VAL(CP(SDRC_D0), (IEN | PTD | DIS | M0)) /* SDRC_D0 */\ + MUX_VAL(CP(SDRC_D1), (IEN | PTD | DIS | M0)) /* SDRC_D1 */\ + MUX_VAL(CP(SDRC_D2), (IEN | PTD | DIS | M0)) /* SDRC_D2 */\ + MUX_VAL(CP(SDRC_D3), (IEN | PTD | DIS | M0)) /* SDRC_D3 */\ + MUX_VAL(CP(SDRC_D4), (IEN | PTD | DIS | M0)) /* SDRC_D4 */\ + MUX_VAL(CP(SDRC_D5), (IEN | PTD | DIS | M0)) /* SDRC_D5 */\ + MUX_VAL(CP(SDRC_D6), (IEN | PTD | DIS | M0)) /* SDRC_D6 */\ + MUX_VAL(CP(SDRC_D7), (IEN | PTD | DIS | M0)) /* SDRC_D7 */\ + MUX_VAL(CP(SDRC_D8), (IEN | PTD | DIS | M0)) /* SDRC_D8 */\ + MUX_VAL(CP(SDRC_D9), (IEN | PTD | DIS | M0)) /* SDRC_D9 */\ + MUX_VAL(CP(SDRC_D10), (IEN | PTD | DIS | M0)) /* SDRC_D10 */\ + MUX_VAL(CP(SDRC_D11), (IEN | PTD | DIS | M0)) /* SDRC_D11 */\ + MUX_VAL(CP(SDRC_D12), (IEN | PTD | DIS | M0)) /* SDRC_D12 */\ + MUX_VAL(CP(SDRC_D13), (IEN | PTD | DIS | M0)) /* SDRC_D13 */\ + MUX_VAL(CP(SDRC_D14), (IEN | PTD | DIS | M0)) /* SDRC_D14 */\ + MUX_VAL(CP(SDRC_D15), (IEN | PTD | DIS | M0)) /* SDRC_D15 */\ + MUX_VAL(CP(SDRC_D16), (IEN | PTD | DIS | M0)) /* SDRC_D16 */\ + MUX_VAL(CP(SDRC_D17), (IEN | PTD | DIS | M0)) /* SDRC_D17 */\ + MUX_VAL(CP(SDRC_D18), (IEN | PTD | DIS | M0)) /* SDRC_D18 */\ + MUX_VAL(CP(SDRC_D19), (IEN | PTD | DIS | M0)) /* SDRC_D19 */\ + MUX_VAL(CP(SDRC_D20), (IEN | PTD | DIS | M0)) /* SDRC_D20 */\ + MUX_VAL(CP(SDRC_D21), (IEN | PTD | DIS | M0)) /* SDRC_D21 */\ + MUX_VAL(CP(SDRC_D22), (IEN | PTD | DIS | M0)) /* SDRC_D22 */\ + MUX_VAL(CP(SDRC_D23), (IEN | PTD | DIS | M0)) /* SDRC_D23 */\ + MUX_VAL(CP(SDRC_D24), (IEN | PTD | DIS | M0)) /* SDRC_D24 */\ + MUX_VAL(CP(SDRC_D25), (IEN | PTD | DIS | M0)) /* SDRC_D25 */\ + MUX_VAL(CP(SDRC_D26), (IEN | PTD | DIS | M0)) /* SDRC_D26 */\ + MUX_VAL(CP(SDRC_D27), (IEN | PTD | DIS | M0)) /* SDRC_D27 */\ + MUX_VAL(CP(SDRC_D28), (IEN | PTD | DIS | M0)) /* SDRC_D28 */\ + MUX_VAL(CP(SDRC_D29), (IEN | PTD | DIS | M0)) /* SDRC_D29 */\ + MUX_VAL(CP(SDRC_D30), (IEN | PTD | DIS | M0)) /* SDRC_D30 */\ + MUX_VAL(CP(SDRC_D31), (IEN | PTD | DIS | M0)) /* SDRC_D31 */\ + MUX_VAL(CP(SDRC_CLK), (IEN | PTD | DIS | M0)) /* SDRC_CLK */\ + MUX_VAL(CP(SDRC_DQS0), (IEN | PTD | DIS | M0)) /* SDRC_DQS0 */\ + MUX_VAL(CP(SDRC_DQS1), (IEN | PTD | DIS | M0)) /* SDRC_DQS1 */\ + MUX_VAL(CP(SDRC_DQS2), (IEN | PTD | DIS | M0)) /* SDRC_DQS2 */\ + MUX_VAL(CP(SDRC_DQS3), (IEN | PTD | DIS | M0)) /* SDRC_DQS3 */\ +/* GPMC */\ + MUX_VAL(CP(GPMC_A1), (IDIS | PTD | DIS | M0)) /* GPMC_A1 */\ + MUX_VAL(CP(GPMC_A2), (IDIS | PTD | DIS | M0)) /* GPMC_A2 */\ + MUX_VAL(CP(GPMC_A3), (IDIS | PTD | DIS | M0)) /* GPMC_A3 */\ + MUX_VAL(CP(GPMC_A4), (IDIS | PTD | DIS | M0)) /* GPMC_A4 */\ + MUX_VAL(CP(GPMC_A5), (IDIS | PTD | DIS | M0)) /* GPMC_A5 */\ + MUX_VAL(CP(GPMC_A6), (IDIS | PTD | DIS | M0)) /* GPMC_A6 */\ + MUX_VAL(CP(GPMC_A7), (IDIS | PTD | DIS | M0)) /* GPMC_A7 */\ + MUX_VAL(CP(GPMC_A8), (IDIS | PTD | DIS | M0)) /* GPMC_A8 */\ + MUX_VAL(CP(GPMC_A9), (IDIS | PTD | DIS | M0)) /* GPMC_A9 */\ + MUX_VAL(CP(GPMC_A10), (IDIS | PTD | DIS | M0)) /* GPMC_A10 */\ + MUX_VAL(CP(GPMC_D0), (IEN | PTD | DIS | M0)) /* GPMC_D0 */\ + MUX_VAL(CP(GPMC_D1), (IEN | PTD | DIS | M0)) /* GPMC_D1 */\ + MUX_VAL(CP(GPMC_D2), (IEN | PTD | DIS | M0)) /* GPMC_D2 */\ + MUX_VAL(CP(GPMC_D3), (IEN | PTD | DIS | M0)) /* GPMC_D3 */\ + MUX_VAL(CP(GPMC_D4), (IEN | PTD | DIS | M0)) /* GPMC_D4 */\ + MUX_VAL(CP(GPMC_D5), (IEN | PTD | DIS | M0)) /* GPMC_D5 */\ + MUX_VAL(CP(GPMC_D6), (IEN | PTD | DIS | M0)) /* GPMC_D6 */\ + MUX_VAL(CP(GPMC_D7), (IEN | PTD | DIS | M0)) /* GPMC_D7 */\ + MUX_VAL(CP(GPMC_D8), (IEN | PTD | DIS | M0)) /* GPMC_D8 */\ + MUX_VAL(CP(GPMC_D9), (IEN | PTD | DIS | M0)) /* GPMC_D9 */\ + MUX_VAL(CP(GPMC_D10), (IEN | PTD | DIS | M0)) /* GPMC_D10 */\ + MUX_VAL(CP(GPMC_D11), (IEN | PTD | DIS | M0)) /* GPMC_D11 */\ + MUX_VAL(CP(GPMC_D12), (IEN | PTD | DIS | M0)) /* GPMC_D12 */\ + MUX_VAL(CP(GPMC_D13), (IEN | PTD | DIS | M0)) /* GPMC_D13 */\ + MUX_VAL(CP(GPMC_D14), (IEN | PTD | DIS | M0)) /* GPMC_D14 */\ + MUX_VAL(CP(GPMC_D15), (IEN | PTD | DIS | M0)) /* GPMC_D15 */\ + MUX_VAL(CP(GPMC_NCS0), (IDIS | PTU | EN | M0)) /* GPMC_nCS0 */\ + MUX_VAL(CP(GPMC_NCS1), (IDIS | PTU | EN | M7)) /* GPMC_nCS1 */\ + MUX_VAL(CP(GPMC_NCS2), (IDIS | PTU | EN | M7)) /* GPMC_nCS2 */\ + MUX_VAL(CP(GPMC_NCS3), (IDIS | PTU | EN | M7)) /* GPMC_nCS3 */\ + MUX_VAL(CP(GPMC_NCS4), (IDIS | PTU | EN | M7)) /* GPMC_nCS4 */\ + MUX_VAL(CP(GPMC_NCS5), (IDIS | PTD | DIS | M7)) /* GPMC_nCS5 */\ + MUX_VAL(CP(GPMC_NCS6), (IEN | PTD | DIS | M7)) /* GPMC_nCS6 */\ + MUX_VAL(CP(GPMC_NCS7), (IEN | PTU | EN | M7)) /* GPMC_nCS7 */\ + MUX_VAL(CP(GPMC_CLK), (IDIS | PTD | DIS | M0)) /* GPMC_CLK */\ + MUX_VAL(CP(GPMC_NADV_ALE), (IDIS | PTD | DIS | M0)) /* GPMC_nADV_ALE */\ + MUX_VAL(CP(GPMC_NOE), (IDIS | PTD | DIS | M0)) /* GPMC_nOE */\ + MUX_VAL(CP(GPMC_NWE), (IDIS | PTD | DIS | M0)) /* GPMC_nWE */\ + MUX_VAL(CP(GPMC_NWP), (IDIS | PTU | DIS | M0)) /* GPMC_nWP */\ + MUX_VAL(CP(GPMC_NBE0_CLE), (IDIS | PTD | DIS | M0)) /* GPMC_nBE0_CLE */\ + MUX_VAL(CP(GPMC_NBE1), (IEN | PTD | DIS | M0)) /* GPMC_nBE1 */\ + MUX_VAL(CP(GPMC_WAIT0), (IEN | PTD | EN | M0)) /* GPMC_WAIT0 */\ + MUX_VAL(CP(GPMC_WAIT1), (IEN | PTU | EN | M0)) /* GPMC_WAIT1 */\ + MUX_VAL(CP(GPMC_WAIT2), (IEN | PTU | EN | M0)) /* GPMC_WAIT2 */\ + MUX_VAL(CP(GPMC_WAIT3), (IEN | PTU | EN | M0)) /* GPMC_WAIT3 */\ +/* IDCC modem Power On */\ + MUX_VAL(CP(CAM_D11), (IEN | PTU | EN | M4)) /* GPIO_110 */\ + MUX_VAL(CP(CAM_D4), (IEN | PTU | EN | M4)) /* GPIO_103 */\ +/* GPMC CS7 has LAN9211 device */\ + MUX_VAL(CP(GPMC_NCS7), (IDIS | PTU | EN | M0)) /* GPMC_nCS7 */\ + MUX_VAL(CP(MCBSP1_DX), (IEN | PTD | DIS | M4)) /* LAN9221 */\ + MUX_VAL(CP(MCSPI1_CS2), (IEN | PTD | EN | M0)) /* MCSPI1_CS2 */\ +/* GPMC CS3 has Serial TL16CP754C device */\ + MUX_VAL(CP(GPMC_NCS3), (IDIS | PTU | EN | M0)) /* GPMC_nCS3 */\ +/* Toggle Reset pin of TL16CP754C device */\ + MUX_VAL(CP(MCBSP4_CLKX), (IEN | PTU | EN | M4)) /* GPIO_152 */\ + udelay(10);\ + MUX_VAL(CP(MCBSP4_CLKX), (IEN | PTD | EN | M4)) /* GPIO_152 */\ + MUX_VAL(CP(SDRC_CKE1), (IDIS | PTU | EN | M0)) /* SDRC_CKE1 */\ +/* LEDS */\ + MUX_VAL(CP(MCSPI1_SOMI), (IEN | PTD | EN | M4)) /* GPIO_173 red */\ + MUX_VAL(CP(MCBSP4_DX), (IEN | PTD | EN | M4)) /* GPIO_154 blue */\ + MUX_VAL(CP(GPMC_NBE1), (IEN | PTD | EN | M4)) /* GPIO_61 blue2 */ + +#endif /* _BOARD_ZOOM2_H_ */ diff --git a/doc/README.omap3 b/doc/README.omap3 index 1ba307fa0..9ab09793e 100644 --- a/doc/README.omap3 +++ b/doc/README.omap3 @@ -19,6 +19,8 @@ Currently the following boards are supported: * TI/Logic PD Zoom MDK [6] +* TI/Logic PD Zoom 2 [7] + Toolchain ========= @@ -54,6 +56,11 @@ make make omap3_zoom1_config make +* Zoom 2: + +make omap3_zoom2_config +make + Custom commands =============== @@ -80,7 +87,7 @@ help Acknowledgements ================ -OMAP3 U-Boot is based on U-Boot tar ball [7] for BeagleBoard and EVM done by +OMAP3 U-Boot is based on U-Boot tar ball [8] for BeagleBoard and EVM done by several TI employees. Links @@ -111,6 +118,10 @@ http://openpandora.org/ http://www.logicpd.com/products/devkit/ti/zoom_mobile_development_kit -[7] TI OMAP3 U-Boot: +[7] TI/Logic PD Zoom 2 + +http://www.logicpd.com/sites/default/files/1012659A_Zoom_OMAP34x-II_MDP_Brief.pdf +[8] TI OMAP3 U-Boot: http://beagleboard.googlecode.com/files/u-boot_beagle_revb.tar.gz + diff --git a/include/configs/omap3_zoom2.h b/include/configs/omap3_zoom2.h new file mode 100644 index 000000000..8aea4cbc0 --- /dev/null +++ b/include/configs/omap3_zoom2.h @@ -0,0 +1,226 @@ +/* + * (C) Copyright 2006-2009 + * Texas Instruments. + * Richard Woodruff + * Syed Mohammed Khasim + * Nishanth Menon + * Tom Rix + * + * Configuration settings for the TI OMAP3430 Zoom II board. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H +#include + +/* + * High Level Configuration Options + */ +#define CONFIG_ARMCORTEXA8 1 /* This is an ARM V7 CPU core */ +#define CONFIG_OMAP 1 /* in a TI OMAP core */ +#define CONFIG_OMAP34XX 1 /* which is a 34XX */ +#define CONFIG_OMAP3430 1 /* which is in a 3430 */ +#define CONFIG_OMAP3_ZOOM2 1 /* working with Zoom II */ + +#include /* get chip and board defs */ +#include + +/* Clock Defines */ +#define V_OSCK 26000000 /* Clock output from T2 */ +#define V_SCLK (V_OSCK >> 1) + +#undef CONFIG_USE_IRQ /* no support for IRQs */ +#define CONFIG_MISC_INIT_R + +#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ +#define CONFIG_SETUP_MEMORY_TAGS 1 +#define CONFIG_INITRD_TAG 1 +#define CONFIG_REVISION_TAG 1 + +/* + * Size of malloc() pool + */ +#define CONFIG_ENV_SIZE SZ_128K /* Total Size Environment */ + /* Sector */ +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + SZ_128K) +#define CONFIG_SYS_GBL_DATA_SIZE 128 /* bytes reserved for */ + /* initial data */ +/* + * Hardware drivers + */ + +/* + * NS16550 Configuration + */ +#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ + +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE (-4) +#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK + +/* + * select serial console configuration + */ +#define CONFIG_CONS_INDEX 3 +#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 +#define CONFIG_SERIAL3 3 /* UART3 */ + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ + 115200} +#define CONFIG_MMC 1 +#define CONFIG_OMAP3_MMC 1 +#define CONFIG_DOS_PARTITION 1 + +/* commands to include */ +#include + +#define CONFIG_CMD_FAT /* FAT support */ +#define CONFIG_CMD_I2C /* I2C serial bus support */ +#define CONFIG_CMD_MMC /* MMC support */ +#define CONFIG_CMD_NAND /* NAND support */ +#define CONFIG_CMD_NAND_LOCK_UNLOCK /* Enable lock/unlock support */ + +#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ +#undef CONFIG_CMD_FPGA /* FPGA configuration Support */ +#undef CONFIG_CMD_IMI /* iminfo */ +#undef CONFIG_CMD_IMLS /* List all found images */ +#undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ +#undef CONFIG_CMD_NFS /* NFS support */ + +#define CONFIG_SYS_NO_FLASH +#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_SYS_I2C_SLAVE 1 +#define CONFIG_SYS_I2C_BUS 0 +#define CONFIG_SYS_I2C_BUS_SELECT 1 +#define CONFIG_DRIVER_OMAP34XX_I2C 1 + +/* + * Board NAND Info. + */ +#define CONFIG_NAND_OMAP_GPMC +#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ + /* to access nand */ +#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ + /* to access nand at */ + /* CS0 */ +#define GPMC_NAND_ECC_LP_x16_LAYOUT 1 +#define CONFIG_SYS_MAX_NAND_DEVICE 1 + +/* Environment information */ +#define CONFIG_BOOTDELAY 10 + +/* + * Miscellaneous configurable options + */ + +#define CONFIG_SYS_PROMPT "OMAP3 Zoom2 # " +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_CBSIZE 256 +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 16 +#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) +/* Memtest from start of memory to 31MB */ +#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) +#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + 0x01F00000) +/* The default load address is the start of memory */ +#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) +/* everything, incl board info, in Hz */ +#undef CONFIG_SYS_CLKS_IN_HZ +/* + * 2430 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by + * 32KHz clk, or from external sig. This rate is divided by a local divisor. + */ +#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) +#define CONFIG_SYS_PTV 7 /* 2^(PTV+1) */ +#define CONFIG_SYS_HZ ((V_SCLK) / (2 << CONFIG_SYS_PTV)) + +/*----------------------------------------------------------------------- + * Stack sizes + * + * The stack sizes are set up in start.S using these settings + */ +#define CONFIG_STACKSIZE SZ_128K +#ifdef CONFIG_USE_IRQ +#define CONFIG_STACKSIZE_IRQ SZ_4K +#define CONFIG_STACKSIZE_FIQ SZ_4K +#endif + +/*----------------------------------------------------------------------- + * Physical Memory Map + */ +#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ +#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 +#define PHYS_SDRAM_1_SIZE SZ_32M /* at least 32 meg */ +#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 + +/* SDRAM Bank Allocation method */ +#define SDRC_R_B_C 1 + +/*----------------------------------------------------------------------- + * FLASH and environment organization + */ + +/* **** PISMO SUPPORT *** */ + +/* Configure the PISMO */ +#define PISMO1_NAND_SIZE GPMC_SIZE_128M +#define PISMO1_ONEN_SIZE GPMC_SIZE_128M + +#define CONFIG_SYS_MAX_FLASH_SECT 520 /* max number of sectors on */ + /* one chip */ +#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of flash banks */ +#define CONFIG_SYS_MONITOR_LEN SZ_256K /* Reserve 2 sectors */ + +#define CONFIG_SYS_FLASH_BASE boot_flash_base + +/* Monitor at start of flash */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE + +#define CONFIG_ENV_IS_IN_NAND 1 +#define SMNAND_ENV_OFFSET 0x0c0000 /* environment starts here */ + +#define CONFIG_SYS_ENV_SECT_SIZE boot_flash_sec +#define CONFIG_ENV_OFFSET boot_flash_off +#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET + +/*----------------------------------------------------------------------- + * CFI FLASH driver setup + */ +/* timeout values are in ticks */ +#define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ) +#define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ) + +#ifndef __ASSEMBLY__ +extern gpmc_csx_t *nand_cs_base; +extern gpmc_t *gpmc_cfg_base; +extern unsigned int boot_flash_base; +extern volatile unsigned int boot_flash_env_addr; +extern unsigned int boot_flash_off; +extern unsigned int boot_flash_sec; +extern unsigned int boot_flash_type; +#endif + +#endif /* __CONFIG_H */ -- cgit v1.2.3 From 0c872ecd01d6782ae9d37b6eb721404a4a48f356 Mon Sep 17 00:00:00 2001 From: Tom Rix Date: Fri, 15 May 2009 23:48:36 +0200 Subject: OMAP3 Port kernel omap gpio interface. Port version 2.6.27 of the linux kernel's omap gpio interface to u-boot. The orignal source is in linux/arch/arm/plat-omap/gpio.c See doc/README.omap3 for instructions on use. Signed-off-by: Tom Rix --- cpu/arm_cortexa8/omap3/Makefile | 1 + cpu/arm_cortexa8/omap3/gpio.c | 185 ++++++++++++++++++++++++++++++++++++++ doc/README.omap3 | 32 +++++++ include/asm-arm/arch-omap3/gpio.h | 86 ++++++++++++++++++ 4 files changed, 304 insertions(+) create mode 100644 cpu/arm_cortexa8/omap3/gpio.c create mode 100644 include/asm-arm/arch-omap3/gpio.h (limited to 'doc') diff --git a/cpu/arm_cortexa8/omap3/Makefile b/cpu/arm_cortexa8/omap3/Makefile index edf5cb29a..50176eeb3 100644 --- a/cpu/arm_cortexa8/omap3/Makefile +++ b/cpu/arm_cortexa8/omap3/Makefile @@ -29,6 +29,7 @@ SOBJS := lowlevel_init.o COBJS += board.o COBJS += clock.o +COBJS += gpio.o COBJS += mem.o COBJS += syslib.o COBJS += sys_info.o diff --git a/cpu/arm_cortexa8/omap3/gpio.c b/cpu/arm_cortexa8/omap3/gpio.c new file mode 100644 index 000000000..aeb6066d8 --- /dev/null +++ b/cpu/arm_cortexa8/omap3/gpio.c @@ -0,0 +1,185 @@ +/* + * Copyright (c) 2009 Wind River Systems, Inc. + * Tom Rix + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + * This work is derived from the linux 2.6.27 kernel source + * To fetch, use the kernel repository + * git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6.git + * Use the v2.6.27 tag. + * + * Below is the original's header including its copyright + * + * linux/arch/arm/plat-omap/gpio.c + * + * Support functions for OMAP GPIO + * + * Copyright (C) 2003-2005 Nokia Corporation + * Written by Juha Yrjölä + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include +#include +#include +#include + +static struct gpio_bank gpio_bank_34xx[6] = { + { (void *)OMAP34XX_GPIO1_BASE, METHOD_GPIO_24XX }, + { (void *)OMAP34XX_GPIO2_BASE, METHOD_GPIO_24XX }, + { (void *)OMAP34XX_GPIO3_BASE, METHOD_GPIO_24XX }, + { (void *)OMAP34XX_GPIO4_BASE, METHOD_GPIO_24XX }, + { (void *)OMAP34XX_GPIO5_BASE, METHOD_GPIO_24XX }, + { (void *)OMAP34XX_GPIO6_BASE, METHOD_GPIO_24XX }, +}; + +static struct gpio_bank *gpio_bank = &gpio_bank_34xx[0]; + +static inline struct gpio_bank *get_gpio_bank(int gpio) +{ + return &gpio_bank[gpio >> 5]; +} + +static inline int get_gpio_index(int gpio) +{ + return gpio & 0x1f; +} + +static inline int gpio_valid(int gpio) +{ + if (gpio < 0) + return -1; + if (gpio < 192) + return 0; + return -1; +} + +static int check_gpio(int gpio) +{ + if (gpio_valid(gpio) < 0) { + printf("ERROR : check_gpio: invalid GPIO %d\n", gpio); + return -1; + } + return 0; +} + +static void _set_gpio_direction(struct gpio_bank *bank, int gpio, int is_input) +{ + void *reg = bank->base; + u32 l; + + switch (bank->method) { + case METHOD_GPIO_24XX: + reg += OMAP24XX_GPIO_OE; + break; + default: + return; + } + l = __raw_readl(reg); + if (is_input) + l |= 1 << gpio; + else + l &= ~(1 << gpio); + __raw_writel(l, reg); +} + +void omap_set_gpio_direction(int gpio, int is_input) +{ + struct gpio_bank *bank; + + if (check_gpio(gpio) < 0) + return; + bank = get_gpio_bank(gpio); + _set_gpio_direction(bank, get_gpio_index(gpio), is_input); +} + +static void _set_gpio_dataout(struct gpio_bank *bank, int gpio, int enable) +{ + void *reg = bank->base; + u32 l = 0; + + switch (bank->method) { + case METHOD_GPIO_24XX: + if (enable) + reg += OMAP24XX_GPIO_SETDATAOUT; + else + reg += OMAP24XX_GPIO_CLEARDATAOUT; + l = 1 << gpio; + break; + default: + printf("omap3-gpio unknown bank method %s %d\n", + __FILE__, __LINE__); + return; + } + __raw_writel(l, reg); +} + +void omap_set_gpio_dataout(int gpio, int enable) +{ + struct gpio_bank *bank; + + if (check_gpio(gpio) < 0) + return; + bank = get_gpio_bank(gpio); + _set_gpio_dataout(bank, get_gpio_index(gpio), enable); +} + +int omap_get_gpio_datain(int gpio) +{ + struct gpio_bank *bank; + void *reg; + + if (check_gpio(gpio) < 0) + return -EINVAL; + bank = get_gpio_bank(gpio); + reg = bank->base; + switch (bank->method) { + case METHOD_GPIO_24XX: + reg += OMAP24XX_GPIO_DATAIN; + break; + default: + return -EINVAL; + } + return (__raw_readl(reg) + & (1 << get_gpio_index(gpio))) != 0; +} + +static void _reset_gpio(struct gpio_bank *bank, int gpio) +{ + _set_gpio_direction(bank, get_gpio_index(gpio), 1); +} + +int omap_request_gpio(int gpio) +{ + if (check_gpio(gpio) < 0) + return -EINVAL; + + return 0; +} + +void omap_free_gpio(int gpio) +{ + struct gpio_bank *bank; + + if (check_gpio(gpio) < 0) + return; + bank = get_gpio_bank(gpio); + + _reset_gpio(bank, gpio); +} diff --git a/doc/README.omap3 b/doc/README.omap3 index 9ab09793e..e05e816df 100644 --- a/doc/README.omap3 +++ b/doc/README.omap3 @@ -84,6 +84,38 @@ For all other commands see help +Interfaces +========== + +gpio + +To set a bit : + + if (!omap_request_gpio(N)) { + omap_set_gpio_direction(N, 0); + omap_set_gpio_dataout(N, 1); + } + +To clear a bit : + + if (!omap_request_gpio(N)) { + omap_set_gpio_direction(N, 0); + omap_set_gpio_dataout(N, 0); + } + +To read a bit : + + if (!omap_request_gpio(N)) { + omap_set_gpio_direction(NULL, 1); + val = omap_get_gpio_datain(N); + omap_free_gpio(N); + } + if (val) + printf("GPIO N is set\n"); + else + printf("GPIO N is clear\n"); + + Acknowledgements ================ diff --git a/include/asm-arm/arch-omap3/gpio.h b/include/asm-arm/arch-omap3/gpio.h new file mode 100644 index 000000000..30f633ce9 --- /dev/null +++ b/include/asm-arm/arch-omap3/gpio.h @@ -0,0 +1,86 @@ +/* + * Copyright (c) 2009 Wind River Systems, Inc. + * Tom Rix + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + * This work is derived from the linux 2.6.27 kernel source + * To fetch, use the kernel repository + * git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6.git + * Use the v2.6.27 tag. + * + * Below is the original's header including its copyright + * + * linux/arch/arm/plat-omap/gpio.c + * + * Support functions for OMAP GPIO + * + * Copyright (C) 2003-2005 Nokia Corporation + * Written by Juha Yrjölä + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#ifndef _GPIO_H +#define _GPIO_H + +#define OMAP24XX_GPIO_REVISION 0x0000 +#define OMAP24XX_GPIO_SYSCONFIG 0x0010 +#define OMAP24XX_GPIO_SYSSTATUS 0x0014 +#define OMAP24XX_GPIO_IRQSTATUS1 0x0018 +#define OMAP24XX_GPIO_IRQSTATUS2 0x0028 +#define OMAP24XX_GPIO_IRQENABLE2 0x002c +#define OMAP24XX_GPIO_IRQENABLE1 0x001c +#define OMAP24XX_GPIO_WAKE_EN 0x0020 +#define OMAP24XX_GPIO_CTRL 0x0030 +#define OMAP24XX_GPIO_OE 0x0034 +#define OMAP24XX_GPIO_DATAIN 0x0038 +#define OMAP24XX_GPIO_DATAOUT 0x003c +#define OMAP24XX_GPIO_LEVELDETECT0 0x0040 +#define OMAP24XX_GPIO_LEVELDETECT1 0x0044 +#define OMAP24XX_GPIO_RISINGDETECT 0x0048 +#define OMAP24XX_GPIO_FALLINGDETECT 0x004c +#define OMAP24XX_GPIO_DEBOUNCE_EN 0x0050 +#define OMAP24XX_GPIO_DEBOUNCE_VAL 0x0054 +#define OMAP24XX_GPIO_CLEARIRQENABLE1 0x0060 +#define OMAP24XX_GPIO_SETIRQENABLE1 0x0064 +#define OMAP24XX_GPIO_CLEARWKUENA 0x0080 +#define OMAP24XX_GPIO_SETWKUENA 0x0084 +#define OMAP24XX_GPIO_CLEARDATAOUT 0x0090 +#define OMAP24XX_GPIO_SETDATAOUT 0x0094 + +struct gpio_bank { + void *base; + int method; +}; + +#define METHOD_GPIO_24XX 4 + +/* This is the interface */ + +/* Request a gpio before using it */ +int omap_request_gpio(int gpio); +/* Reset and free a gpio after using it */ +void omap_free_gpio(int gpio); +/* Sets the gpio as input or output */ +void omap_set_gpio_direction(int gpio, int is_input); +/* Set or clear a gpio output */ +void omap_set_gpio_dataout(int gpio, int enable); +/* Get the value of a gpio input */ +int omap_get_gpio_datain(int gpio); + +#endif /* _GPIO_H_ */ -- cgit v1.2.3 From 7caa13fdd2d3dc957b4e0a228810a3a4a8ba499b Mon Sep 17 00:00:00 2001 From: Tom Rix Date: Wed, 3 Jun 2009 01:53:55 -0500 Subject: Fix a typo in the instructions on using omap3's gpio interface. Using the example for reading a gpio, shows the problem. NULL should be the gpio number. Signed-off-by: Tom Rix Acked-by: Dirk Behme --- doc/README.omap3 | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'doc') diff --git a/doc/README.omap3 b/doc/README.omap3 index e05e816df..66e781d0f 100644 --- a/doc/README.omap3 +++ b/doc/README.omap3 @@ -106,7 +106,7 @@ To clear a bit : To read a bit : if (!omap_request_gpio(N)) { - omap_set_gpio_direction(NULL, 1); + omap_set_gpio_direction(N, 1); val = omap_get_gpio_datain(N); omap_free_gpio(N); } -- cgit v1.2.3 From 0f898604945af4543c1525fc33b6bae621a3b805 Mon Sep 17 00:00:00 2001 From: Peter Tyser Date: Fri, 22 May 2009 17:23:24 -0500 Subject: 83xx: Replace CONFIG_MPC83XX with CONFIG_MPC83xx Use the standard lowercase "xx" capitalization that other Freescale architectures use for CPU defines to prevent confusion and errors Signed-off-by: Peter Tyser Signed-off-by: Kim Phillips --- api/api_platform-ppc.c | 2 +- board/freescale/mpc8349emds/mpc8349emds.c | 2 +- board/sbc8349/sbc8349.c | 2 +- common/fdt_support.c | 4 ++-- cpu/mpc83xx/config.mk | 2 +- doc/README.mpc832xemds | 2 +- doc/README.mpc8349itx | 2 +- doc/README.mpc8360emds | 2 +- doc/README.mpc837xemds | 2 +- doc/README.mpc837xerdb | 2 +- include/asm-ppc/global_data.h | 6 +++--- include/asm-ppc/processor.h | 4 ++-- include/asm-ppc/u-boot.h | 2 +- include/common.h | 8 ++++---- include/configs/MPC8313ERDB.h | 2 +- include/configs/MPC8315ERDB.h | 2 +- include/configs/MPC8323ERDB.h | 2 +- include/configs/MPC832XEMDS.h | 2 +- include/configs/MPC8349EMDS.h | 2 +- include/configs/MPC8360EMDS.h | 2 +- include/configs/MPC8360ERDK.h | 2 +- include/configs/MPC837XEMDS.h | 2 +- include/configs/MPC837XERDB.h | 2 +- include/configs/MVBLM7.h | 2 +- include/configs/SIMPC8313.h | 2 +- include/configs/TQM834x.h | 2 +- include/configs/kmeter1.h | 2 +- include/configs/sbc8349.h | 2 +- include/fdt_support.h | 2 +- include/tsec.h | 2 +- lib_ppc/board.c | 8 ++++---- 31 files changed, 41 insertions(+), 41 deletions(-) (limited to 'doc') diff --git a/api/api_platform-ppc.c b/api/api_platform-ppc.c index bfcc4175b..a3d981f9e 100644 --- a/api/api_platform-ppc.c +++ b/api/api_platform-ppc.c @@ -53,7 +53,7 @@ int platform_sys_info(struct sys_info *si) #define bi_bar bi_immr_base #elif defined(CONFIG_MPC5xxx) #define bi_bar bi_mbar_base -#elif defined(CONFIG_MPC83XX) +#elif defined(CONFIG_MPC83xx) #define bi_bar bi_immrbar #elif defined(CONFIG_MPC8220) #define bi_bar bi_mbar_base diff --git a/board/freescale/mpc8349emds/mpc8349emds.c b/board/freescale/mpc8349emds/mpc8349emds.c index 06064d970..61d124960 100644 --- a/board/freescale/mpc8349emds/mpc8349emds.c +++ b/board/freescale/mpc8349emds/mpc8349emds.c @@ -38,7 +38,7 @@ int fixed_sdram(void); void sdram_init(void); -#if defined(CONFIG_DDR_ECC) && defined(CONFIG_MPC83XX) +#if defined(CONFIG_DDR_ECC) && defined(CONFIG_MPC83xx) void ddr_enable_ecc(unsigned int dram_size); #endif diff --git a/board/sbc8349/sbc8349.c b/board/sbc8349/sbc8349.c index e01cb037f..34861d4e1 100644 --- a/board/sbc8349/sbc8349.c +++ b/board/sbc8349/sbc8349.c @@ -39,7 +39,7 @@ int fixed_sdram(void); void sdram_init(void); -#if defined(CONFIG_DDR_ECC) && defined(CONFIG_MPC83XX) +#if defined(CONFIG_DDR_ECC) && defined(CONFIG_MPC83xx) void ddr_enable_ecc(unsigned int dram_size); #endif diff --git a/common/fdt_support.c b/common/fdt_support.c index b54f8868d..fc077e829 100644 --- a/common/fdt_support.c +++ b/common/fdt_support.c @@ -495,7 +495,7 @@ void fdt_fixup_dr_usb(void *blob, bd_t *bd) } #endif /* CONFIG_HAS_FSL_DR_USB */ -#if defined(CONFIG_MPC83XX) || defined(CONFIG_MPC85xx) +#if defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx) /* * update crypto node properties to a specified revision of the SEC * called with sec_rev == 0 if not on an mpc8xxxE processor @@ -580,7 +580,7 @@ void fdt_fixup_crypto_node(void *blob, int sec_rev) printf("WARNING: could not set crypto property: %s\n", fdt_strerror(err)); } -#endif /* defined(CONFIG_MPC83XX) || defined(CONFIG_MPC85xx) */ +#endif /* defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx) */ /* Resize the fdt to its actual size + a bit of padding */ int fdt_resize(void *blob) diff --git a/cpu/mpc83xx/config.mk b/cpu/mpc83xx/config.mk index 2f0f1ce1e..d6194263b 100644 --- a/cpu/mpc83xx/config.mk +++ b/cpu/mpc83xx/config.mk @@ -22,7 +22,7 @@ PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi -PLATFORM_CPPFLAGS += -DCONFIG_MPC83XX -DCONFIG_E300 \ +PLATFORM_CPPFLAGS += -DCONFIG_MPC83xx -DCONFIG_E300 \ -ffixed-r2 -msoft-float # Use default linker script. Board port can override in board/*/config.mk diff --git a/doc/README.mpc832xemds b/doc/README.mpc832xemds index b63cc7912..9f7409cad 100644 --- a/doc/README.mpc832xemds +++ b/doc/README.mpc832xemds @@ -83,7 +83,7 @@ Freescale MPC832XEMDS Board include/configs/MPC832XEPB.h - CONFIG_MPC83XX MPC83XX family for MPC8349, MPC8360 and MPC832X + CONFIG_MPC83xx MPC83XX family for MPC8349, MPC8360 and MPC832X CONFIG_MPC832X MPC832X specific CONFIG_MPC832XEMDS MPC832XEMDS board specific diff --git a/doc/README.mpc8349itx b/doc/README.mpc8349itx index 7f24623f7..48bbd5035 100644 --- a/doc/README.mpc8349itx +++ b/doc/README.mpc8349itx @@ -88,7 +88,7 @@ Freescale MPC8349E-mITX and MPC8349E-mITX-GP Boards include/configs/MPC8349ITX.h - CONFIG_MPC83XX MPC83xx family + CONFIG_MPC83xx MPC83xx family CONFIG_MPC8349 MPC8349 specific CONFIG_MPC8349ITX MPC8349E-mITX CONFIG_MPC8349ITXGP MPC8349E-mITX-GP diff --git a/doc/README.mpc8360emds b/doc/README.mpc8360emds index 7c841cec0..d65a2a48a 100644 --- a/doc/README.mpc8360emds +++ b/doc/README.mpc8360emds @@ -81,7 +81,7 @@ Freescale MPC8360EMDS Board include/configs/MPC8360EMDS.h - CONFIG_MPC83XX MPC83xx family for both MPC8349 and MPC8360 + CONFIG_MPC83xx MPC83xx family for both MPC8349 and MPC8360 CONFIG_MPC8360 MPC8360 specific CONFIG_MPC8360EMDS MPC8360EMDS board specific diff --git a/doc/README.mpc837xemds b/doc/README.mpc837xemds index a14da0f02..d8500c2d2 100644 --- a/doc/README.mpc837xemds +++ b/doc/README.mpc837xemds @@ -60,7 +60,7 @@ Freescale MPC837xEMDS Board include/configs/MPC837XEMDS.h - CONFIG_MPC83XX MPC83xx family for both MPC837x and MPC8360 + CONFIG_MPC83xx MPC83xx family for both MPC837x and MPC8360 CONFIG_MPC837X MPC837x specific CONFIG_MPC837XEMDS MPC837XEMDS board specific diff --git a/doc/README.mpc837xerdb b/doc/README.mpc837xerdb index 510e3bb9b..25ea65b11 100644 --- a/doc/README.mpc837xerdb +++ b/doc/README.mpc837xerdb @@ -52,7 +52,7 @@ Freescale MPC837xE-RDB Board include/configs/MPC837XERDB.h - CONFIG_MPC83XX MPC83xx family for both MPC8349 and MPC8360 + CONFIG_MPC83xx MPC83xx family for both MPC8349 and MPC8360 CONFIG_MPC837X MPC837x specific CONFIG_MPC837XERDB MPC837xE-RDB board specific diff --git a/include/asm-ppc/global_data.h b/include/asm-ppc/global_data.h index e5a3b2c17..c188199ae 100644 --- a/include/asm-ppc/global_data.h +++ b/include/asm-ppc/global_data.h @@ -56,7 +56,7 @@ typedef struct global_data { #endif #endif unsigned long mem_clk; -#if defined(CONFIG_MPC83XX) +#if defined(CONFIG_MPC83xx) /* There are other clocks in the MPC83XX */ u32 csb_clk; #if defined(CONFIG_MPC834X) || defined(CONFIG_MPC831X) || defined(CONFIG_MPC837X) @@ -92,7 +92,7 @@ typedef struct global_data { #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) u32 lbc_clk; #endif /* CONFIG_MPC85xx || CONFIG_MPC86xx */ -#if defined(CONFIG_MPC83XX) || defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) +#if defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) u32 i2c1_clk; u32 i2c2_clk; #endif @@ -125,7 +125,7 @@ typedef struct global_data { phys_size_t ram_size; /* RAM size */ unsigned long reloc_off; /* Relocation Offset */ unsigned long reset_status; /* reset status register at boot */ -#if defined(CONFIG_MPC83XX) +#if defined(CONFIG_MPC83xx) unsigned long arbiter_event_attributes; unsigned long arbiter_event_address; #endif diff --git a/include/asm-ppc/processor.h b/include/asm-ppc/processor.h index 83e3581f3..8f73c69e7 100644 --- a/include/asm-ppc/processor.h +++ b/include/asm-ppc/processor.h @@ -923,7 +923,7 @@ #if defined(CONFIG_MPC85xx) #define IS_E_PROCESSOR(svr) (svr & 0x80000) #else -#if defined(CONFIG_MPC83XX) +#if defined(CONFIG_MPC83xx) #define IS_E_PROCESSOR(spridr) (!(spridr & 0x00010000)) #endif #endif @@ -1023,7 +1023,7 @@ struct cpu_type *identify_cpu(u32 ver); #define CPU_TYPE_ENTRY(n, v) \ { .name = #n, .soc_ver = SVR_##v, } #else -#if defined(CONFIG_MPC83XX) +#if defined(CONFIG_MPC83xx) #define CPU_TYPE_ENTRY(x) {#x, SPR_##x} #endif #endif diff --git a/include/asm-ppc/u-boot.h b/include/asm-ppc/u-boot.h index e6c56e91b..ea2d22df2 100644 --- a/include/asm-ppc/u-boot.h +++ b/include/asm-ppc/u-boot.h @@ -51,7 +51,7 @@ typedef struct bd_info { #if defined(CONFIG_MPC5xxx) unsigned long bi_mbar_base; /* base of internal registers */ #endif -#if defined(CONFIG_MPC83XX) +#if defined(CONFIG_MPC83xx) unsigned long bi_immrbar; #endif #if defined(CONFIG_MPC8220) diff --git a/include/common.h b/include/common.h index 4c0049168..ff4f821dd 100644 --- a/include/common.h +++ b/include/common.h @@ -89,7 +89,7 @@ typedef volatile unsigned char vu_char; #include #include #endif -#ifdef CONFIG_MPC83XX +#ifdef CONFIG_MPC83xx #include #include #endif @@ -412,7 +412,7 @@ void trap_init (ulong); defined (CONFIG_MPC8220) || \ defined (CONFIG_MPC85xx) || \ defined (CONFIG_MPC86xx) || \ - defined (CONFIG_MPC83XX) + defined (CONFIG_MPC83xx) unsigned char in8(unsigned int); void out8(unsigned int, unsigned char); unsigned short in16(unsigned int); @@ -433,7 +433,7 @@ unsigned short in16(unsigned int); void out16(unsigned int, unsigned short value); #endif -#if defined (CONFIG_MPC83XX) +#if defined (CONFIG_MPC83xx) void ppcDWload(unsigned int *addr, unsigned int *ret); void ppcDWstore(unsigned int *addr, unsigned int *value); #endif @@ -550,7 +550,7 @@ void cpu_init_f (void); int cpu_init_r (void); #if defined(CONFIG_8260) int prt_8260_rsr (void); -#elif defined(CONFIG_MPC83XX) +#elif defined(CONFIG_MPC83xx) int prt_83xx_rsr (void); #endif diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h index 52d27a1e4..f0592a807 100644 --- a/include/configs/MPC8313ERDB.h +++ b/include/configs/MPC8313ERDB.h @@ -30,7 +30,7 @@ * High Level Configuration Options */ #define CONFIG_E300 1 -#define CONFIG_MPC83XX 1 +#define CONFIG_MPC83xx 1 #define CONFIG_MPC831X 1 #define CONFIG_MPC8313 1 #define CONFIG_MPC8313ERDB 1 diff --git a/include/configs/MPC8315ERDB.h b/include/configs/MPC8315ERDB.h index 9fa91f4f6..b5f5a0bc9 100644 --- a/include/configs/MPC8315ERDB.h +++ b/include/configs/MPC8315ERDB.h @@ -29,7 +29,7 @@ * High Level Configuration Options */ #define CONFIG_E300 1 /* E300 family */ -#define CONFIG_MPC83XX 1 /* MPC83xx family */ +#define CONFIG_MPC83xx 1 /* MPC83xx family */ #define CONFIG_MPC831X 1 /* MPC831x CPU family */ #define CONFIG_MPC8315 1 /* MPC8315 CPU specific */ #define CONFIG_MPC8315ERDB 1 /* MPC8315ERDB board specific */ diff --git a/include/configs/MPC8323ERDB.h b/include/configs/MPC8323ERDB.h index 9b8b0333e..7d5bca664 100644 --- a/include/configs/MPC8323ERDB.h +++ b/include/configs/MPC8323ERDB.h @@ -14,7 +14,7 @@ */ #define CONFIG_E300 1 /* E300 family */ #define CONFIG_QE 1 /* Has QE */ -#define CONFIG_MPC83XX 1 /* MPC83xx family */ +#define CONFIG_MPC83xx 1 /* MPC83xx family */ #define CONFIG_MPC832X 1 /* MPC832x CPU specific */ #define CONFIG_PCI 1 diff --git a/include/configs/MPC832XEMDS.h b/include/configs/MPC832XEMDS.h index c82cda2dd..6b3b1989a 100644 --- a/include/configs/MPC832XEMDS.h +++ b/include/configs/MPC832XEMDS.h @@ -25,7 +25,7 @@ */ #define CONFIG_E300 1 /* E300 family */ #define CONFIG_QE 1 /* Has QE */ -#define CONFIG_MPC83XX 1 /* MPC83xx family */ +#define CONFIG_MPC83xx 1 /* MPC83xx family */ #define CONFIG_MPC832X 1 /* MPC832x CPU specific */ #define CONFIG_MPC832XEMDS 1 /* MPC832XEMDS board specific */ #undef CONFIG_PQ_MDS_PIB /* POWERQUICC MDS Platform IO Board */ diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h index 35ab88f08..b970cc960 100644 --- a/include/configs/MPC8349EMDS.h +++ b/include/configs/MPC8349EMDS.h @@ -33,7 +33,7 @@ * High Level Configuration Options */ #define CONFIG_E300 1 /* E300 Family */ -#define CONFIG_MPC83XX 1 /* MPC83XX family */ +#define CONFIG_MPC83xx 1 /* MPC83xx family */ #define CONFIG_MPC834X 1 /* MPC834X family */ #define CONFIG_MPC8349 1 /* MPC8349 specific */ #define CONFIG_MPC8349EMDS 1 /* MPC8349EMDS board specific */ diff --git a/include/configs/MPC8360EMDS.h b/include/configs/MPC8360EMDS.h index 4b09de17f..3497ba07e 100644 --- a/include/configs/MPC8360EMDS.h +++ b/include/configs/MPC8360EMDS.h @@ -27,7 +27,7 @@ */ #define CONFIG_E300 1 /* E300 family */ #define CONFIG_QE 1 /* Has QE */ -#define CONFIG_MPC83XX 1 /* MPC83XX family */ +#define CONFIG_MPC83xx 1 /* MPC83xx family */ #define CONFIG_MPC8360 1 /* MPC8360 CPU specific */ #define CONFIG_MPC8360EMDS 1 /* MPC8360EMDS board specific */ #undef CONFIG_PQ_MDS_PIB /* POWERQUICC MDS Platform IO Board */ diff --git a/include/configs/MPC8360ERDK.h b/include/configs/MPC8360ERDK.h index 138750459..f5844356d 100644 --- a/include/configs/MPC8360ERDK.h +++ b/include/configs/MPC8360ERDK.h @@ -22,7 +22,7 @@ */ #define CONFIG_E300 1 /* E300 family */ #define CONFIG_QE 1 /* Has QE */ -#define CONFIG_MPC83XX 1 /* MPC83XX family */ +#define CONFIG_MPC83xx 1 /* MPC83xx family */ #define CONFIG_MPC8360 1 /* MPC8360 CPU specific */ #define CONFIG_MPC8360ERDK 1 /* MPC8360ERDK board specific */ diff --git a/include/configs/MPC837XEMDS.h b/include/configs/MPC837XEMDS.h index a62d805a9..859647005 100644 --- a/include/configs/MPC837XEMDS.h +++ b/include/configs/MPC837XEMDS.h @@ -25,7 +25,7 @@ * High Level Configuration Options */ #define CONFIG_E300 1 /* E300 family */ -#define CONFIG_MPC83XX 1 /* MPC83XX family */ +#define CONFIG_MPC83xx 1 /* MPC83xx family */ #define CONFIG_MPC837X 1 /* MPC837X CPU specific */ #define CONFIG_MPC837XEMDS 1 /* MPC837XEMDS board specific */ diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index 8d0c93b71..5f2bd9907 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -26,7 +26,7 @@ * High Level Configuration Options */ #define CONFIG_E300 1 /* E300 family */ -#define CONFIG_MPC83XX 1 /* MPC83XX family */ +#define CONFIG_MPC83xx 1 /* MPC83XX family */ #define CONFIG_MPC837X 1 /* MPC837X CPU specific */ #define CONFIG_MPC837XERDB 1 diff --git a/include/configs/MVBLM7.h b/include/configs/MVBLM7.h index 9fd27e3d5..e6aba865b 100644 --- a/include/configs/MVBLM7.h +++ b/include/configs/MVBLM7.h @@ -33,7 +33,7 @@ * High Level Configuration Options */ #define CONFIG_E300 1 -#define CONFIG_MPC83XX 1 +#define CONFIG_MPC83xx 1 #define CONFIG_MPC834X 1 #define CONFIG_MPC8343 1 diff --git a/include/configs/SIMPC8313.h b/include/configs/SIMPC8313.h index 8d1e95b55..995f9044c 100644 --- a/include/configs/SIMPC8313.h +++ b/include/configs/SIMPC8313.h @@ -32,7 +32,7 @@ #define CONFIG_NAND_U_BOOT #define CONFIG_E300 1 -#define CONFIG_MPC83XX 1 +#define CONFIG_MPC83xx 1 #define CONFIG_MPC831X 1 #define CONFIG_MPC8313 1 diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h index 70f222ca0..14e6c0f11 100644 --- a/include/configs/TQM834x.h +++ b/include/configs/TQM834x.h @@ -32,7 +32,7 @@ * High Level Configuration Options */ #define CONFIG_E300 1 /* E300 Family */ -#define CONFIG_MPC83XX 1 /* MPC83XX family */ +#define CONFIG_MPC83xx 1 /* MPC83xx family */ #define CONFIG_MPC834X 1 /* MPC834X specific */ #define CONFIG_MPC8349 1 /* MPC8349 specific */ #define CONFIG_TQM834X 1 /* TQM834X board specific */ diff --git a/include/configs/kmeter1.h b/include/configs/kmeter1.h index 61250adfe..19da1337e 100644 --- a/include/configs/kmeter1.h +++ b/include/configs/kmeter1.h @@ -25,7 +25,7 @@ */ #define CONFIG_E300 1 /* E300 family */ #define CONFIG_QE 1 /* Has QE */ -#define CONFIG_MPC83XX 1 /* MPC83XX family */ +#define CONFIG_MPC83xx 1 /* MPC83xx family */ #define CONFIG_MPC8360 1 /* MPC8360 CPU specific */ #define CONFIG_KMETER1 1 /* KMETER1 board specific */ #define CONFIG_HOSTNAME kmeter1 diff --git a/include/configs/sbc8349.h b/include/configs/sbc8349.h index b89fe12c5..7e31de688 100644 --- a/include/configs/sbc8349.h +++ b/include/configs/sbc8349.h @@ -35,7 +35,7 @@ * High Level Configuration Options */ #define CONFIG_E300 1 /* E300 Family */ -#define CONFIG_MPC83XX 1 /* MPC83XX family */ +#define CONFIG_MPC83xx 1 /* MPC83xx family */ #define CONFIG_MPC834X 1 /* MPC834X family */ #define CONFIG_MPC8349 1 /* MPC8349 specific */ #define CONFIG_SBC8349 1 /* WRS SBC8349 board specific */ diff --git a/include/fdt_support.h b/include/fdt_support.h index 6062df976..16734c535 100644 --- a/include/fdt_support.h +++ b/include/fdt_support.h @@ -59,7 +59,7 @@ void fdt_fixup_dr_usb(void *blob, bd_t *bd); static inline void fdt_fixup_dr_usb(void *blob, bd_t *bd) {} #endif /* CONFIG_HAS_FSL_DR_USB */ -#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC83XX) +#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC83xx) void fdt_fixup_crypto_node(void *blob, int sec_rev); #else static inline void fdt_fixup_crypto_node(void *blob, int sec_rev) {} diff --git a/include/tsec.h b/include/tsec.h index 7b52e06ab..9184256b5 100644 --- a/include/tsec.h +++ b/include/tsec.h @@ -28,7 +28,7 @@ /* FIXME: Should these be pushed back to 83xx and 85xx config files? */ #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) \ - || defined(CONFIG_MPC83XX) + || defined(CONFIG_MPC83xx) #define TSEC_BASE_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_TSEC1_OFFSET) #endif diff --git a/lib_ppc/board.c b/lib_ppc/board.c index e0d9ba4ef..155171d6b 100644 --- a/lib_ppc/board.c +++ b/lib_ppc/board.c @@ -321,7 +321,7 @@ init_fnc_t *init_sequence[] = { prt_8260_rsr, prt_8260_clks, #endif /* CONFIG_8260 */ -#if defined(CONFIG_MPC83XX) +#if defined(CONFIG_MPC83xx) prt_83xx_rsr, #endif checkcpu, @@ -408,7 +408,7 @@ void board_init_f (ulong bootflag) /* compiler optimization barrier needed for GCC >= 3.4 */ __asm__ __volatile__("": : :"memory"); -#if !defined(CONFIG_CPM2) && !defined(CONFIG_MPC83XX) && \ +#if !defined(CONFIG_CPM2) && !defined(CONFIG_MPC83xx) && \ !defined(CONFIG_MPC85xx) && !defined(CONFIG_MPC86xx) /* Clear initial global data */ memset ((void *) gd, 0, sizeof (gd_t)); @@ -570,7 +570,7 @@ void board_init_f (ulong bootflag) #if defined(CONFIG_MPC5xxx) bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */ #endif -#if defined(CONFIG_MPC83XX) +#if defined(CONFIG_MPC83xx) bd->bi_immrbar = CONFIG_SYS_IMMR; #endif #if defined(CONFIG_MPC8220) @@ -750,7 +750,7 @@ void board_init_r (gd_t *id, ulong dest_addr) WATCHDOG_RESET(); -#if defined(CONFIG_SYS_DELAYED_ICACHE) || defined(CONFIG_MPC83XX) +#if defined(CONFIG_SYS_DELAYED_ICACHE) || defined(CONFIG_MPC83xx) icache_enable (); /* it's time to enable the instruction cache */ #endif -- cgit v1.2.3 From 2c7920afaf96d9779304202cd8a355b4f7576a83 Mon Sep 17 00:00:00 2001 From: Peter Tyser Date: Fri, 22 May 2009 17:23:25 -0500 Subject: 83xx: Replace CONFIG_MPC83[0-9]X with MPC83[0-9]x Use the standard lowercase "x" capitalization that other Freescale architectures use for CPU defines to prevent confusion and errors Signed-off-by: Peter Tyser Signed-off-by: Kim Phillips --- cpu/mpc83xx/cpu_init.c | 2 +- cpu/mpc83xx/speed.c | 66 +++++++++++++++++++++---------------------- doc/README.mpc832xemds | 6 ++-- doc/README.mpc837xemds | 2 +- doc/README.mpc837xerdb | 2 +- drivers/pci/pci_auto.c | 2 +- include/asm-ppc/fsl_lbc.h | 4 +-- include/asm-ppc/global_data.h | 12 ++++---- include/asm-ppc/immap_83xx.h | 6 ++-- include/asm-ppc/immap_qe.h | 2 +- include/asm-ppc/mpc8xxx_spi.h | 4 +-- include/configs/MPC8313ERDB.h | 2 +- include/configs/MPC8315ERDB.h | 2 +- include/configs/MPC8323ERDB.h | 2 +- include/configs/MPC832XEMDS.h | 2 +- include/configs/MPC8349EMDS.h | 2 +- include/configs/MPC8349ITX.h | 2 +- include/configs/MPC837XEMDS.h | 2 +- include/configs/MPC837XERDB.h | 4 +-- include/configs/MVBLM7.h | 2 +- include/configs/SIMPC8313.h | 2 +- include/configs/TQM834x.h | 2 +- include/configs/sbc8349.h | 2 +- include/mpc83xx.h | 36 +++++++++++------------ 24 files changed, 85 insertions(+), 85 deletions(-) (limited to 'doc') diff --git a/cpu/mpc83xx/cpu_init.c b/cpu/mpc83xx/cpu_init.c index 8e9c87559..d9b96b57f 100644 --- a/cpu/mpc83xx/cpu_init.c +++ b/cpu/mpc83xx/cpu_init.c @@ -185,7 +185,7 @@ void cpu_init_f (volatile immap_t * im) /* System General Purpose Register */ #ifdef CONFIG_SYS_SICRH -#if defined(CONFIG_MPC834X) || defined(CONFIG_MPC8313) +#if defined(CONFIG_MPC834x) || defined(CONFIG_MPC8313) /* regarding to MPC34x manual rev.1 bits 28..29 must be preserved */ im->sysconf.sicrh = (im->sysconf.sicrh & 0x0000000C) | CONFIG_SYS_SICRH; #else diff --git a/cpu/mpc83xx/speed.c b/cpu/mpc83xx/speed.c index 95b558f92..bde7e920a 100644 --- a/cpu/mpc83xx/speed.c +++ b/cpu/mpc83xx/speed.c @@ -100,23 +100,23 @@ int get_clocks(void) u32 lcrr; u32 csb_clk; -#if defined(CONFIG_MPC834X) || defined(CONFIG_MPC831X) || defined(CONFIG_MPC837X) +#if defined(CONFIG_MPC834x) || defined(CONFIG_MPC831x) || defined(CONFIG_MPC837x) u32 tsec1_clk; u32 tsec2_clk; u32 usbdr_clk; #endif -#ifdef CONFIG_MPC834X +#ifdef CONFIG_MPC834x u32 usbmph_clk; #endif u32 core_clk; u32 i2c1_clk; -#if !defined(CONFIG_MPC832X) +#if !defined(CONFIG_MPC832x) u32 i2c2_clk; #endif #if defined(CONFIG_MPC8315) u32 tdm_clk; #endif -#if defined(CONFIG_MPC837X) +#if defined(CONFIG_MPC837x) u32 sdhc_clk; #endif u32 enc_clk; @@ -126,17 +126,17 @@ int get_clocks(void) #if defined(CONFIG_MPC8360) u32 mem_sec_clk; #endif -#if defined(CONFIG_MPC8360) || defined(CONFIG_MPC832X) +#if defined(CONFIG_MPC8360) || defined(CONFIG_MPC832x) u32 qepmf; u32 qepdf; u32 qe_clk; u32 brg_clk; #endif -#if defined(CONFIG_MPC837X) || defined(CONFIG_MPC831X) +#if defined(CONFIG_MPC837x) || defined(CONFIG_MPC831x) u32 pciexp1_clk; u32 pciexp2_clk; #endif -#if defined(CONFIG_MPC837X) || defined(CONFIG_MPC8315) +#if defined(CONFIG_MPC837x) || defined(CONFIG_MPC8315) u32 sata_clk; #endif @@ -164,7 +164,7 @@ int get_clocks(void) sccr = im->clk.sccr; -#if defined(CONFIG_MPC834X) || defined(CONFIG_MPC831X) || defined(CONFIG_MPC837X) +#if defined(CONFIG_MPC834x) || defined(CONFIG_MPC831x) || defined(CONFIG_MPC837x) switch ((sccr & SCCR_TSEC1CM) >> SCCR_TSEC1CM_SHIFT) { case 0: tsec1_clk = 0; @@ -202,7 +202,7 @@ int get_clocks(void) } #endif -#if defined(CONFIG_MPC834X) || defined(CONFIG_MPC837X) || defined(CONFIG_MPC8315) +#if defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x) || defined(CONFIG_MPC8315) switch ((sccr & SCCR_TSEC2CM) >> SCCR_TSEC2CM_SHIFT) { case 0: tsec2_clk = 0; @@ -229,7 +229,7 @@ int get_clocks(void) tsec2_clk = 0; #endif -#if defined(CONFIG_MPC834X) +#if defined(CONFIG_MPC834x) switch ((sccr & SCCR_USBMPHCM) >> SCCR_USBMPHCM_SHIFT) { case 0: usbmph_clk = 0; @@ -274,7 +274,7 @@ int get_clocks(void) return -7; } -#if defined(CONFIG_MPC837X) +#if defined(CONFIG_MPC837x) switch ((sccr & SCCR_SDHCCM) >> SCCR_SDHCCM_SHIFT) { case 0: sdhc_clk = 0; @@ -313,22 +313,22 @@ int get_clocks(void) } #endif -#if defined(CONFIG_MPC834X) +#if defined(CONFIG_MPC834x) i2c1_clk = tsec2_clk; #elif defined(CONFIG_MPC8360) i2c1_clk = csb_clk; -#elif defined(CONFIG_MPC832X) +#elif defined(CONFIG_MPC832x) i2c1_clk = enc_clk; -#elif defined(CONFIG_MPC831X) +#elif defined(CONFIG_MPC831x) i2c1_clk = enc_clk; -#elif defined(CONFIG_MPC837X) +#elif defined(CONFIG_MPC837x) i2c1_clk = sdhc_clk; #endif -#if !defined(CONFIG_MPC832X) +#if !defined(CONFIG_MPC832x) i2c2_clk = csb_clk; /* i2c-2 clk is equal to csb clk */ #endif -#if defined(CONFIG_MPC837X) || defined(CONFIG_MPC831X) +#if defined(CONFIG_MPC837x) || defined(CONFIG_MPC831x) switch ((sccr & SCCR_PCIEXP1CM) >> SCCR_PCIEXP1CM_SHIFT) { case 0: pciexp1_clk = 0; @@ -366,7 +366,7 @@ int get_clocks(void) } #endif -#if defined(CONFIG_MPC837X) || defined(CONFIG_MPC8315) +#if defined(CONFIG_MPC837x) || defined(CONFIG_MPC8315) switch ((sccr & SCCR_SATA1CM) >> SCCR_SATA1CM_SHIFT) { case 0: sata_clk = 0; @@ -436,7 +436,7 @@ int get_clocks(void) return -13; } -#if defined(CONFIG_MPC8360) || defined(CONFIG_MPC832X) +#if defined(CONFIG_MPC8360) || defined(CONFIG_MPC832x) qepmf = (im->reset.rcwl & HRCWL_CEPMF) >> HRCWL_CEPMF_SHIFT; qepdf = (im->reset.rcwl & HRCWL_CEPDF) >> HRCWL_CEPDF_SHIFT; qe_clk = (pci_sync_in * qepmf) / (1 + qepdf); @@ -444,23 +444,23 @@ int get_clocks(void) #endif gd->csb_clk = csb_clk; -#if defined(CONFIG_MPC834X) || defined(CONFIG_MPC831X) || defined(CONFIG_MPC837X) +#if defined(CONFIG_MPC834x) || defined(CONFIG_MPC831x) || defined(CONFIG_MPC837x) gd->tsec1_clk = tsec1_clk; gd->tsec2_clk = tsec2_clk; gd->usbdr_clk = usbdr_clk; #endif -#if defined(CONFIG_MPC834X) +#if defined(CONFIG_MPC834x) gd->usbmph_clk = usbmph_clk; #endif #if defined(CONFIG_MPC8315) gd->tdm_clk = tdm_clk; #endif -#if defined(CONFIG_MPC837X) +#if defined(CONFIG_MPC837x) gd->sdhc_clk = sdhc_clk; #endif gd->core_clk = core_clk; gd->i2c1_clk = i2c1_clk; -#if !defined(CONFIG_MPC832X) +#if !defined(CONFIG_MPC832x) gd->i2c2_clk = i2c2_clk; #endif gd->enc_clk = enc_clk; @@ -470,15 +470,15 @@ int get_clocks(void) #if defined(CONFIG_MPC8360) gd->mem_sec_clk = mem_sec_clk; #endif -#if defined(CONFIG_MPC8360) || defined(CONFIG_MPC832X) +#if defined(CONFIG_MPC8360) || defined(CONFIG_MPC832x) gd->qe_clk = qe_clk; gd->brg_clk = brg_clk; #endif -#if defined(CONFIG_MPC837X) +#if defined(CONFIG_MPC837x) gd->pciexp1_clk = pciexp1_clk; gd->pciexp2_clk = pciexp2_clk; #endif -#if defined(CONFIG_MPC837X) || defined(CONFIG_MPC8315) +#if defined(CONFIG_MPC837x) || defined(CONFIG_MPC8315) gd->sata_clk = sata_clk; #endif gd->pci_clk = pci_sync_in; @@ -504,7 +504,7 @@ int do_clocks (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) printf("Clock configuration:\n"); printf(" Core: %-4s MHz\n", strmhz(buf, gd->core_clk)); printf(" Coherent System Bus: %-4s MHz\n", strmhz(buf, gd->csb_clk)); -#if defined(CONFIG_MPC8360) || defined(CONFIG_MPC832X) +#if defined(CONFIG_MPC8360) || defined(CONFIG_MPC832x) printf(" QE: %-4s MHz\n", strmhz(buf, gd->qe_clk)); printf(" BRG: %-4s MHz\n", strmhz(buf, gd->brg_clk)); #endif @@ -516,28 +516,28 @@ int do_clocks (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) #endif printf(" SEC: %-4s MHz\n", strmhz(buf, gd->enc_clk)); printf(" I2C1: %-4s MHz\n", strmhz(buf, gd->i2c1_clk)); -#if !defined(CONFIG_MPC832X) +#if !defined(CONFIG_MPC832x) printf(" I2C2: %-4s MHz\n", strmhz(buf, gd->i2c2_clk)); #endif #if defined(CONFIG_MPC8315) printf(" TDM: %-4s MHz\n", strmhz(buf, gd->tdm_clk)); #endif -#if defined(CONFIG_MPC837X) +#if defined(CONFIG_MPC837x) printf(" SDHC: %-4s MHz\n", strmhz(buf, gd->sdhc_clk)); #endif -#if defined(CONFIG_MPC834X) || defined(CONFIG_MPC831X) || defined(CONFIG_MPC837X) +#if defined(CONFIG_MPC834x) || defined(CONFIG_MPC831x) || defined(CONFIG_MPC837x) printf(" TSEC1: %-4s MHz\n", strmhz(buf, gd->tsec1_clk)); printf(" TSEC2: %-4s MHz\n", strmhz(buf, gd->tsec2_clk)); printf(" USB DR: %-4s MHz\n", strmhz(buf, gd->usbdr_clk)); #endif -#if defined(CONFIG_MPC834X) +#if defined(CONFIG_MPC834x) printf(" USB MPH: %-4s MHz\n", strmhz(buf, gd->usbmph_clk)); #endif -#if defined(CONFIG_MPC837X) +#if defined(CONFIG_MPC837x) printf(" PCIEXP1: %-4s MHz\n", strmhz(buf, gd->pciexp1_clk)); printf(" PCIEXP2: %-4s MHz\n", strmhz(buf, gd->pciexp2_clk)); #endif -#if defined(CONFIG_MPC837X) || defined(CONFIG_MPC8315) +#if defined(CONFIG_MPC837x) || defined(CONFIG_MPC8315) printf(" SATA: %-4s MHz\n", strmhz(buf, gd->sata_clk)); #endif return 0; diff --git a/doc/README.mpc832xemds b/doc/README.mpc832xemds index 9f7409cad..688bdbb20 100644 --- a/doc/README.mpc832xemds +++ b/doc/README.mpc832xemds @@ -83,8 +83,8 @@ Freescale MPC832XEMDS Board include/configs/MPC832XEPB.h - CONFIG_MPC83xx MPC83XX family for MPC8349, MPC8360 and MPC832X - CONFIG_MPC832X MPC832X specific + CONFIG_MPC83xx MPC83xx family for MPC8349, MPC8360 and MPC832x + CONFIG_MPC832x MPC832x specific CONFIG_MPC832XEMDS MPC832XEMDS board specific 4. Compilation @@ -97,7 +97,7 @@ Freescale MPC832XEMDS Board make MPC832XEMDS_config make - MPC832X support PCI 33MHz and PCI 66MHz, to make u-boot support PCI: + MPC832x support PCI 33MHz and PCI 66MHz, to make u-boot support PCI: 1)Make sure the DIP SW support PCI mode as described in Section 1.1. diff --git a/doc/README.mpc837xemds b/doc/README.mpc837xemds index d8500c2d2..aa767ae7d 100644 --- a/doc/README.mpc837xemds +++ b/doc/README.mpc837xemds @@ -61,7 +61,7 @@ Freescale MPC837xEMDS Board include/configs/MPC837XEMDS.h CONFIG_MPC83xx MPC83xx family for both MPC837x and MPC8360 - CONFIG_MPC837X MPC837x specific + CONFIG_MPC837x MPC837x specific CONFIG_MPC837XEMDS MPC837XEMDS board specific 4. Compilation diff --git a/doc/README.mpc837xerdb b/doc/README.mpc837xerdb index 25ea65b11..cfb6efa27 100644 --- a/doc/README.mpc837xerdb +++ b/doc/README.mpc837xerdb @@ -53,7 +53,7 @@ Freescale MPC837xE-RDB Board include/configs/MPC837XERDB.h CONFIG_MPC83xx MPC83xx family for both MPC8349 and MPC8360 - CONFIG_MPC837X MPC837x specific + CONFIG_MPC837x MPC837x specific CONFIG_MPC837XERDB MPC837xE-RDB board specific diff --git a/drivers/pci/pci_auto.c b/drivers/pci/pci_auto.c index c20b981b8..35c82b97f 100644 --- a/drivers/pci/pci_auto.c +++ b/drivers/pci/pci_auto.c @@ -403,7 +403,7 @@ int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev) PCI_DEV(dev)); break; #endif -#ifdef CONFIG_MPC834X +#ifdef CONFIG_MPC834x case PCI_CLASS_BRIDGE_OTHER: /* * The host/PCI bridge 1 seems broken in 8349 - it presents diff --git a/include/asm-ppc/fsl_lbc.h b/include/asm-ppc/fsl_lbc.h index bc1ebe6e3..a28082e56 100644 --- a/include/asm-ppc/fsl_lbc.h +++ b/include/asm-ppc/fsl_lbc.h @@ -54,7 +54,7 @@ #define BR_MS_UPMA 0x00000080 /* UPMA */ #define BR_MS_UPMB 0x000000A0 /* UPMB */ #define BR_MS_UPMC 0x000000C0 /* UPMC */ -#if !defined(CONFIG_MPC834X) +#if !defined(CONFIG_MPC834x) #define BR_ATOM 0x0000000C #define BR_ATOM_SHIFT 2 #endif @@ -65,7 +65,7 @@ #define UPMB 1 #define UPMC 2 -#if defined(CONFIG_MPC834X) +#if defined(CONFIG_MPC834x) #define BR_RES ~(BR_BA | BR_PS | BR_DECC | BR_WP | BR_MSEL | BR_V) #else #define BR_RES ~(BR_BA | BR_PS | BR_DECC | BR_WP | BR_MSEL | BR_ATOM | BR_V) diff --git a/include/asm-ppc/global_data.h b/include/asm-ppc/global_data.h index c188199ae..244c16158 100644 --- a/include/asm-ppc/global_data.h +++ b/include/asm-ppc/global_data.h @@ -59,14 +59,14 @@ typedef struct global_data { #if defined(CONFIG_MPC83xx) /* There are other clocks in the MPC83XX */ u32 csb_clk; -#if defined(CONFIG_MPC834X) || defined(CONFIG_MPC831X) || defined(CONFIG_MPC837X) +#if defined(CONFIG_MPC834x) || defined(CONFIG_MPC831x) || defined(CONFIG_MPC837x) u32 tsec1_clk; u32 tsec2_clk; u32 usbdr_clk; #endif -#if defined (CONFIG_MPC834X) +#if defined (CONFIG_MPC834x) u32 usbmph_clk; -#endif /* CONFIG_MPC834X */ +#endif /* CONFIG_MPC834x */ #if defined(CONFIG_MPC8315) u32 tdm_clk; #endif @@ -75,18 +75,18 @@ typedef struct global_data { u32 lbiu_clk; u32 lclk_clk; u32 pci_clk; -#if defined(CONFIG_MPC837X) || defined(CONFIG_MPC831X) +#if defined(CONFIG_MPC837x) || defined(CONFIG_MPC831x) u32 pciexp1_clk; u32 pciexp2_clk; #endif -#if defined(CONFIG_MPC837X) || defined(CONFIG_MPC8315) +#if defined(CONFIG_MPC837x) || defined(CONFIG_MPC8315) u32 sata_clk; #endif #if defined(CONFIG_MPC8360) u32 mem_sec_clk; #endif /* CONFIG_MPC8360 */ #endif -#if defined(CONFIG_MPC837X) || defined(CONFIG_MPC8536) +#if defined(CONFIG_MPC837x) || defined(CONFIG_MPC8536) u32 sdhc_clk; #endif #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) diff --git a/include/asm-ppc/immap_83xx.h b/include/asm-ppc/immap_83xx.h index 7b847f802..1e67de6c9 100644 --- a/include/asm-ppc/immap_83xx.h +++ b/include/asm-ppc/immap_83xx.h @@ -656,7 +656,7 @@ typedef struct tdmdmac83xx { u8 fixme[0x2000]; } tdmdmac83xx_t; -#if defined(CONFIG_MPC834X) +#if defined(CONFIG_MPC834x) typedef struct immap { sysconf83xx_t sysconf; /* System configuration */ wdt83xx_t wdt; /* Watch Dog Timer (WDT) Registers */ @@ -773,7 +773,7 @@ typedef struct immap { u8 res12[0x1CF00]; } immap_t; -#elif defined(CONFIG_MPC837X) +#elif defined(CONFIG_MPC837x) typedef struct immap { sysconf83xx_t sysconf; /* System configuration */ wdt83xx_t wdt; /* Watch Dog Timer (WDT) Registers */ @@ -857,7 +857,7 @@ typedef struct immap { u8 qe[0x100000]; /* QE block */ } immap_t; -#elif defined(CONFIG_MPC832X) +#elif defined(CONFIG_MPC832x) typedef struct immap { sysconf83xx_t sysconf; /* System configuration */ wdt83xx_t wdt; /* Watch Dog Timer (WDT) Registers */ diff --git a/include/asm-ppc/immap_qe.h b/include/asm-ppc/immap_qe.h index 55667ca8d..44c0c0aa1 100644 --- a/include/asm-ppc/immap_qe.h +++ b/include/asm-ppc/immap_qe.h @@ -603,7 +603,7 @@ extern qe_map_t *qe_immr; #define QE_MURAM_SIZE 0x20000UL #elif defined(CONFIG_MPC8360) #define QE_MURAM_SIZE 0xc000UL -#elif defined(CONFIG_MPC832X) +#elif defined(CONFIG_MPC832x) #define QE_MURAM_SIZE 0x4000UL #endif diff --git a/include/asm-ppc/mpc8xxx_spi.h b/include/asm-ppc/mpc8xxx_spi.h index 48b15e4f3..41737d3c6 100644 --- a/include/asm-ppc/mpc8xxx_spi.h +++ b/include/asm-ppc/mpc8xxx_spi.h @@ -27,10 +27,10 @@ #include -#if defined(CONFIG_MPC834X) || \ +#if defined(CONFIG_MPC834x) || \ defined(CONFIG_MPC8313) || \ defined(CONFIG_MPC8315) || \ - defined(CONFIG_MPC837X) + defined(CONFIG_MPC837x) typedef struct spi8xxx { u8 res0[0x20]; /* 0x0-0x01f reserved */ diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h index f0592a807..230856869 100644 --- a/include/configs/MPC8313ERDB.h +++ b/include/configs/MPC8313ERDB.h @@ -31,7 +31,7 @@ */ #define CONFIG_E300 1 #define CONFIG_MPC83xx 1 -#define CONFIG_MPC831X 1 +#define CONFIG_MPC831x 1 #define CONFIG_MPC8313 1 #define CONFIG_MPC8313ERDB 1 diff --git a/include/configs/MPC8315ERDB.h b/include/configs/MPC8315ERDB.h index b5f5a0bc9..d9888f58c 100644 --- a/include/configs/MPC8315ERDB.h +++ b/include/configs/MPC8315ERDB.h @@ -30,7 +30,7 @@ */ #define CONFIG_E300 1 /* E300 family */ #define CONFIG_MPC83xx 1 /* MPC83xx family */ -#define CONFIG_MPC831X 1 /* MPC831x CPU family */ +#define CONFIG_MPC831x 1 /* MPC831x CPU family */ #define CONFIG_MPC8315 1 /* MPC8315 CPU specific */ #define CONFIG_MPC8315ERDB 1 /* MPC8315ERDB board specific */ diff --git a/include/configs/MPC8323ERDB.h b/include/configs/MPC8323ERDB.h index 7d5bca664..24f37e7cb 100644 --- a/include/configs/MPC8323ERDB.h +++ b/include/configs/MPC8323ERDB.h @@ -15,7 +15,7 @@ #define CONFIG_E300 1 /* E300 family */ #define CONFIG_QE 1 /* Has QE */ #define CONFIG_MPC83xx 1 /* MPC83xx family */ -#define CONFIG_MPC832X 1 /* MPC832x CPU specific */ +#define CONFIG_MPC832x 1 /* MPC832x CPU specific */ #define CONFIG_PCI 1 #define CONFIG_83XX_GENERIC_PCI 1 diff --git a/include/configs/MPC832XEMDS.h b/include/configs/MPC832XEMDS.h index 6b3b1989a..669577ef1 100644 --- a/include/configs/MPC832XEMDS.h +++ b/include/configs/MPC832XEMDS.h @@ -26,7 +26,7 @@ #define CONFIG_E300 1 /* E300 family */ #define CONFIG_QE 1 /* Has QE */ #define CONFIG_MPC83xx 1 /* MPC83xx family */ -#define CONFIG_MPC832X 1 /* MPC832x CPU specific */ +#define CONFIG_MPC832x 1 /* MPC832x CPU specific */ #define CONFIG_MPC832XEMDS 1 /* MPC832XEMDS board specific */ #undef CONFIG_PQ_MDS_PIB /* POWERQUICC MDS Platform IO Board */ #undef CONFIG_PQ_MDS_PIB_ATM /* QOC3 ATM card */ diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h index b970cc960..ea5fbff30 100644 --- a/include/configs/MPC8349EMDS.h +++ b/include/configs/MPC8349EMDS.h @@ -34,7 +34,7 @@ */ #define CONFIG_E300 1 /* E300 Family */ #define CONFIG_MPC83xx 1 /* MPC83xx family */ -#define CONFIG_MPC834X 1 /* MPC834X family */ +#define CONFIG_MPC834x 1 /* MPC834x family */ #define CONFIG_MPC8349 1 /* MPC8349 specific */ #define CONFIG_MPC8349EMDS 1 /* MPC8349EMDS board specific */ diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h index ef0a09fbd..f2e574b73 100644 --- a/include/configs/MPC8349ITX.h +++ b/include/configs/MPC8349ITX.h @@ -63,7 +63,7 @@ /* * High Level Configuration Options */ -#define CONFIG_MPC834X /* MPC834x family (8343, 8347, 8349) */ +#define CONFIG_MPC834x /* MPC834x family (8343, 8347, 8349) */ #define CONFIG_MPC8349 /* MPC8349 specific */ #define CONFIG_SYS_IMMR 0xE0000000 /* The IMMR is relocated to here */ diff --git a/include/configs/MPC837XEMDS.h b/include/configs/MPC837XEMDS.h index 859647005..4befcab41 100644 --- a/include/configs/MPC837XEMDS.h +++ b/include/configs/MPC837XEMDS.h @@ -26,7 +26,7 @@ */ #define CONFIG_E300 1 /* E300 family */ #define CONFIG_MPC83xx 1 /* MPC83xx family */ -#define CONFIG_MPC837X 1 /* MPC837X CPU specific */ +#define CONFIG_MPC837x 1 /* MPC837x CPU specific */ #define CONFIG_MPC837XEMDS 1 /* MPC837XEMDS board specific */ /* diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index 5f2bd9907..2b7d62954 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -26,8 +26,8 @@ * High Level Configuration Options */ #define CONFIG_E300 1 /* E300 family */ -#define CONFIG_MPC83xx 1 /* MPC83XX family */ -#define CONFIG_MPC837X 1 /* MPC837X CPU specific */ +#define CONFIG_MPC83xx 1 /* MPC83xx family */ +#define CONFIG_MPC837x 1 /* MPC837x CPU specific */ #define CONFIG_MPC837XERDB 1 #define CONFIG_PCI 1 diff --git a/include/configs/MVBLM7.h b/include/configs/MVBLM7.h index e6aba865b..967520587 100644 --- a/include/configs/MVBLM7.h +++ b/include/configs/MVBLM7.h @@ -34,7 +34,7 @@ */ #define CONFIG_E300 1 #define CONFIG_MPC83xx 1 -#define CONFIG_MPC834X 1 +#define CONFIG_MPC834x 1 #define CONFIG_MPC8343 1 #define CONFIG_SYS_IMMR 0xE0000000 diff --git a/include/configs/SIMPC8313.h b/include/configs/SIMPC8313.h index 995f9044c..72fe11588 100644 --- a/include/configs/SIMPC8313.h +++ b/include/configs/SIMPC8313.h @@ -33,7 +33,7 @@ #define CONFIG_E300 1 #define CONFIG_MPC83xx 1 -#define CONFIG_MPC831X 1 +#define CONFIG_MPC831x 1 #define CONFIG_MPC8313 1 #define CONFIG_PCI diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h index 14e6c0f11..efade69ca 100644 --- a/include/configs/TQM834x.h +++ b/include/configs/TQM834x.h @@ -33,7 +33,7 @@ */ #define CONFIG_E300 1 /* E300 Family */ #define CONFIG_MPC83xx 1 /* MPC83xx family */ -#define CONFIG_MPC834X 1 /* MPC834X specific */ +#define CONFIG_MPC834x 1 /* MPC834x specific */ #define CONFIG_MPC8349 1 /* MPC8349 specific */ #define CONFIG_TQM834X 1 /* TQM834X board specific */ diff --git a/include/configs/sbc8349.h b/include/configs/sbc8349.h index 7e31de688..84a251a06 100644 --- a/include/configs/sbc8349.h +++ b/include/configs/sbc8349.h @@ -36,7 +36,7 @@ */ #define CONFIG_E300 1 /* E300 Family */ #define CONFIG_MPC83xx 1 /* MPC83xx family */ -#define CONFIG_MPC834X 1 /* MPC834X family */ +#define CONFIG_MPC834x 1 /* MPC834x family */ #define CONFIG_MPC8349 1 /* MPC8349 specific */ #define CONFIG_SBC8349 1 /* WRS SBC8349 board specific */ diff --git a/include/mpc83xx.h b/include/mpc83xx.h index fab37516c..c5bd6cb16 100644 --- a/include/mpc83xx.h +++ b/include/mpc83xx.h @@ -54,7 +54,7 @@ #define SPRIDR_PARTID 0xFFFF0000 /* Part Id */ #define SPRIDR_REVID 0x0000FFFF /* Revision Id */ -#if defined(CONFIG_MPC834X) +#if defined(CONFIG_MPC834x) #define REVID_MAJOR(spridr) ((spridr & 0x0000FF00) >> 8) #define REVID_MINOR(spridr) (spridr & 0x000000FF) #else @@ -100,7 +100,7 @@ #define SPCR_COREPR 0x00300000 /* E300 PowerPC Core system bus request priority */ #define SPCR_COREPR_SHIFT (31-11) -#if defined(CONFIG_MPC834X) +#if defined(CONFIG_MPC834x) /* SPCR bits - MPC8349 specific */ #define SPCR_TSEC1DP 0x00003000 /* TSEC1 data priority */ #define SPCR_TSEC1DP_SHIFT (31-19) @@ -115,7 +115,7 @@ #define SPCR_TSEC2EP 0x00000003 /* TSEC2 emergency priority */ #define SPCR_TSEC2EP_SHIFT (31-31) -#elif defined(CONFIG_MPC831X) || defined(CONFIG_MPC837X) +#elif defined(CONFIG_MPC831x) || defined(CONFIG_MPC837x) /* SPCR bits - MPC831x and MPC837x specific */ #define SPCR_TSECDP 0x00003000 /* TSEC data priority */ #define SPCR_TSECDP_SHIFT (31-19) @@ -127,7 +127,7 @@ /* SICRL/H - System I/O Configuration Register Low/High */ -#if defined(CONFIG_MPC834X) +#if defined(CONFIG_MPC834x) /* SICRL bits - MPC8349 specific */ #define SICRL_LDP_A 0x80000000 #define SICRL_USB1 0x40000000 @@ -190,8 +190,8 @@ #define SICRH_UC2E1OBI 0x00000002 #define SICRH_UC2E2OBI 0x00000001 -#elif defined(CONFIG_MPC832X) -/* SICRL bits - MPC832X specific */ +#elif defined(CONFIG_MPC832x) +/* SICRL bits - MPC832x specific */ #define SICRL_LDP_LCS_A 0x80000000 #define SICRL_IRQ_CKS 0x20000000 #define SICRL_PCI_MSRC 0x10000000 @@ -262,7 +262,7 @@ #define SICRH_TSOBI1 0x00000002 #define SICRH_TSOBI2 0x00000001 -#elif defined(CONFIG_MPC837X) +#elif defined(CONFIG_MPC837x) /* SICRL bits - MPC837x specific */ #define SICRL_USB_A 0xC0000000 #define SICRL_USB_B 0x30000000 @@ -424,7 +424,7 @@ #define HRCWL_CORE_TO_CSB_2_5X1 0x00050000 #define HRCWL_CORE_TO_CSB_3X1 0x00060000 -#if defined(CONFIG_MPC8360) || defined(CONFIG_MPC832X) +#if defined(CONFIG_MPC8360) || defined(CONFIG_MPC832x) #define HRCWL_CEVCOD 0x000000C0 #define HRCWL_CEVCOD_SHIFT 6 #define HRCWL_CE_PLL_VCO_DIV_4 0x00000000 @@ -478,7 +478,7 @@ #define HRCWL_SVCOD_DIV_8 0x20000000 #define HRCWL_SVCOD_DIV_1 0x30000000 -#elif defined(CONFIG_MPC837X) +#elif defined(CONFIG_MPC837x) #define HRCWL_SVCOD 0x30000000 #define HRCWL_SVCOD_SHIFT 28 #define HRCWL_SVCOD_DIV_4 0x00000000 @@ -493,7 +493,7 @@ #define HRCWH_PCI_HOST_SHIFT 31 #define HRCWH_PCI_AGENT 0x00000000 -#if defined(CONFIG_MPC834X) +#if defined(CONFIG_MPC834x) #define HRCWH_32_BIT_PCI 0x00000000 #define HRCWH_64_BIT_PCI 0x40000000 #endif @@ -504,7 +504,7 @@ #define HRCWH_PCI_ARBITER_DISABLE 0x00000000 #define HRCWH_PCI_ARBITER_ENABLE 0x20000000 -#if defined(CONFIG_MPC834X) +#if defined(CONFIG_MPC834x) #define HRCWH_PCI2_ARBITER_DISABLE 0x00000000 #define HRCWH_PCI2_ARBITER_ENABLE 0x10000000 @@ -528,17 +528,17 @@ #define HRCWH_ROM_LOC_DDR_SDRAM 0x00000000 #define HRCWH_ROM_LOC_PCI1 0x00100000 -#if defined(CONFIG_MPC834X) +#if defined(CONFIG_MPC834x) #define HRCWH_ROM_LOC_PCI2 0x00200000 #endif -#if defined(CONFIG_MPC837X) +#if defined(CONFIG_MPC837x) #define HRCWH_ROM_LOC_ON_CHIP_ROM 0x00300000 #endif #define HRCWH_ROM_LOC_LOCAL_8BIT 0x00500000 #define HRCWH_ROM_LOC_LOCAL_16BIT 0x00600000 #define HRCWH_ROM_LOC_LOCAL_32BIT 0x00700000 -#if defined(CONFIG_MPC831X) || defined(CONFIG_MPC837X) +#if defined(CONFIG_MPC831x) || defined(CONFIG_MPC837x) #define HRCWH_ROM_LOC_NAND_SP_8BIT 0x00100000 #define HRCWH_ROM_LOC_NAND_SP_16BIT 0x00200000 #define HRCWH_ROM_LOC_NAND_LP_8BIT 0x00500000 @@ -562,7 +562,7 @@ #define HRCWH_TSEC2M_IN_SGMII 0x00001800 #endif -#if defined(CONFIG_MPC834X) +#if defined(CONFIG_MPC834x) #define HRCWH_TSEC1M_IN_RGMII 0x00000000 #define HRCWH_TSEC1M_IN_RTBI 0x00004000 #define HRCWH_TSEC1M_IN_GMII 0x00008000 @@ -589,7 +589,7 @@ /* RSR - Reset Status Register */ -#if defined(CONFIG_MPC831X) || defined(CONFIG_MPC837X) +#if defined(CONFIG_MPC831x) || defined(CONFIG_MPC837x) #define RSR_RSTSRC 0xF0000000 /* Reset source */ #define RSR_RSTSRC_SHIFT 28 #else @@ -682,7 +682,7 @@ #define SCCR_PCICM 0x00010000 #define SCCR_PCICM_SHIFT 16 -#if defined(CONFIG_MPC834X) +#if defined(CONFIG_MPC834x) /* SCCR bits - MPC834x specific */ #define SCCR_TSEC1CM 0xc0000000 #define SCCR_TSEC1CM_SHIFT 30 @@ -770,7 +770,7 @@ #define SCCR_TDMCM_2 0x00000020 #define SCCR_TDMCM_3 0x00000030 -#elif defined(CONFIG_MPC837X) +#elif defined(CONFIG_MPC837x) /* SCCR bits - MPC837x specific */ #define SCCR_TSEC1CM 0xc0000000 #define SCCR_TSEC1CM_SHIFT 30 -- cgit v1.2.3