From 484919cf3351212ebf748b9b13ece1ddaf7e7d1c Mon Sep 17 00:00:00 2001 From: Peter Tyser Date: Tue, 30 Jun 2009 17:15:44 -0500 Subject: fsl_dma: Fix Channel Start bug in dma_check() The Channel Start (CS) bit in the Mode Register (MR) should actually be cleared as the comment in the code suggests. Previously, CS was being set, not cleared. Assuming normal operation of the DMA engine, this change shouldn't have any real affect. Signed-off-by: Peter Tyser Signed-off-by: Kumar Gala --- drivers/dma/fsl_dma.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/dma') diff --git a/drivers/dma/fsl_dma.c b/drivers/dma/fsl_dma.c index f3575af6d..f05880230 100644 --- a/drivers/dma/fsl_dma.c +++ b/drivers/dma/fsl_dma.c @@ -60,7 +60,7 @@ static uint dma_check(void) { } while (status & FSL_DMA_SR_CB); /* clear MR[CS] channel start bit */ - out_be32(&dma->mr, in_be32(&dma->mr) & FSL_DMA_MR_CS); + out_be32(&dma->mr, in_be32(&dma->mr) & ~FSL_DMA_MR_CS); dma_sync(); if (status != 0) -- cgit v1.2.3