From 6d0f6bcf337c5261c08fabe12982178c2c489d76 Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Thu, 16 Oct 2008 15:01:15 +0200 Subject: rename CFG_ macros to CONFIG_SYS Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD --- drivers/i2c/fsl_i2c.c | 22 +++++++++++----------- drivers/i2c/mxc_i2c.c | 8 ++++---- drivers/i2c/omap1510_i2c.c | 4 ++-- drivers/i2c/omap24xx_i2c.c | 4 ++-- drivers/i2c/soft_i2c.c | 18 +++++++++--------- drivers/i2c/tsi108_i2c.c | 20 ++++++++++---------- 6 files changed, 38 insertions(+), 38 deletions(-) (limited to 'drivers/i2c') diff --git a/drivers/i2c/fsl_i2c.c b/drivers/i2c/fsl_i2c.c index 264553dfa..281a88b97 100644 --- a/drivers/i2c/fsl_i2c.c +++ b/drivers/i2c/fsl_i2c.c @@ -26,7 +26,7 @@ #include #include /* HW definitions */ -#define I2C_TIMEOUT (CFG_HZ / 4) +#define I2C_TIMEOUT (CONFIG_SYS_HZ / 4) #define I2C_READ_BIT 1 #define I2C_WRITE_BIT 0 @@ -38,18 +38,18 @@ DECLARE_GLOBAL_DATA_PTR; * runs from ROM, and we can't switch buses because we can't modify * the global variables. */ -#ifdef CFG_SPD_BUS_NUM -static unsigned int i2c_bus_num __attribute__ ((section ("data"))) = CFG_SPD_BUS_NUM; +#ifdef CONFIG_SYS_SPD_BUS_NUM +static unsigned int i2c_bus_num __attribute__ ((section ("data"))) = CONFIG_SYS_SPD_BUS_NUM; #else static unsigned int i2c_bus_num __attribute__ ((section ("data"))) = 0; #endif -static unsigned int i2c_bus_speed[2] = {CFG_I2C_SPEED, CFG_I2C_SPEED}; +static unsigned int i2c_bus_speed[2] = {CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SPEED}; static const struct fsl_i2c *i2c_dev[2] = { - (struct fsl_i2c *) (CFG_IMMR + CFG_I2C_OFFSET), -#ifdef CFG_I2C2_OFFSET - (struct fsl_i2c *) (CFG_IMMR + CFG_I2C2_OFFSET) + (struct fsl_i2c *) (CONFIG_SYS_IMMR + CONFIG_SYS_I2C_OFFSET), +#ifdef CONFIG_SYS_I2C2_OFFSET + (struct fsl_i2c *) (CONFIG_SYS_IMMR + CONFIG_SYS_I2C2_OFFSET) #endif }; @@ -176,7 +176,7 @@ i2c_init(int speed, int slaveadd) struct fsl_i2c *dev; unsigned int temp; - dev = (struct fsl_i2c *) (CFG_IMMR + CFG_I2C_OFFSET); + dev = (struct fsl_i2c *) (CONFIG_SYS_IMMR + CONFIG_SYS_I2C_OFFSET); writeb(0, &dev->cr); /* stop I2C controller */ udelay(5); /* let it shutdown in peace */ @@ -187,8 +187,8 @@ i2c_init(int speed, int slaveadd) writeb(0x0, &dev->sr); /* clear status register */ writeb(I2C_CR_MEN, &dev->cr); /* start I2C controller */ -#ifdef CFG_I2C2_OFFSET - dev = (struct fsl_i2c *) (CFG_IMMR + CFG_I2C2_OFFSET); +#ifdef CONFIG_SYS_I2C2_OFFSET + dev = (struct fsl_i2c *) (CONFIG_SYS_IMMR + CONFIG_SYS_I2C2_OFFSET); writeb(0, &dev->cr); /* stop I2C controller */ udelay(5); /* let it shutdown in peace */ @@ -386,7 +386,7 @@ i2c_reg_write(uchar i2c_addr, uchar reg, uchar val) int i2c_set_bus_num(unsigned int bus) { -#ifdef CFG_I2C2_OFFSET +#ifdef CONFIG_SYS_I2C2_OFFSET if (bus > 1) { #else if (bus > 0) { diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c index 1f6ba1f39..eedad065f 100644 --- a/drivers/i2c/mxc_i2c.c +++ b/drivers/i2c/mxc_i2c.c @@ -47,14 +47,14 @@ #define I2SR_IIF (1 << 1) #define I2SR_RX_NO_AK (1 << 0) -#ifdef CFG_I2C_MX31_PORT1 +#ifdef CONFIG_SYS_I2C_MX31_PORT1 #define I2C_BASE 0x43f80000 -#elif defined (CFG_I2C_MX31_PORT2) +#elif defined (CONFIG_SYS_I2C_MX31_PORT2) #define I2C_BASE 0x43f98000 -#elif defined (CFG_I2C_MX31_PORT3) +#elif defined (CONFIG_SYS_I2C_MX31_PORT3) #define I2C_BASE 0x43f84000 #else -#error "define CFG_I2C_MX31_PORTx to use the mx31 I2C driver" +#error "define CONFIG_SYS_I2C_MX31_PORTx to use the mx31 I2C driver" #endif #ifdef DEBUG diff --git a/drivers/i2c/omap1510_i2c.c b/drivers/i2c/omap1510_i2c.c index 388951db1..a4e6227c5 100644 --- a/drivers/i2c/omap1510_i2c.c +++ b/drivers/i2c/omap1510_i2c.c @@ -205,7 +205,7 @@ int i2c_read (uchar chip, uint addr, int alen, uchar * buffer, int len) for (i = 0; i < len; i++) { if (i2c_read_byte (chip, addr + i, &buffer[i])) { printf ("I2C read: I/O error\n"); - i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE); + i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); return 1; } } @@ -230,7 +230,7 @@ int i2c_write (uchar chip, uint addr, int alen, uchar * buffer, int len) for (i = 0; i < len; i++) { if (i2c_write_byte (chip, addr + i, buffer[i])) { printf ("I2C read: I/O error\n"); - i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE); + i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); return 1; } } diff --git a/drivers/i2c/omap24xx_i2c.c b/drivers/i2c/omap24xx_i2c.c index d16cfb123..134dccb61 100644 --- a/drivers/i2c/omap24xx_i2c.c +++ b/drivers/i2c/omap24xx_i2c.c @@ -252,7 +252,7 @@ int i2c_read (uchar chip, uint addr, int alen, uchar * buffer, int len) for (i = 0; i < len; i++) { if (i2c_read_byte (chip, addr + i, &buffer[i])) { printf ("I2C read: I/O error\n"); - i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE); + i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); return 1; } } @@ -277,7 +277,7 @@ int i2c_write (uchar chip, uint addr, int alen, uchar * buffer, int len) for (i = 0; i < len; i++) { if (i2c_write_byte (chip, addr + i, buffer[i])) { printf ("I2C read: I/O error\n"); - i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE); + i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); return 1; } } diff --git a/drivers/i2c/soft_i2c.c b/drivers/i2c/soft_i2c.c index 0a9feb67c..508d3d7d7 100644 --- a/drivers/i2c/soft_i2c.c +++ b/drivers/i2c/soft_i2c.c @@ -75,7 +75,7 @@ static unsigned int i2c_bus_num __attribute__ ((section ("data"))) = 0; /*----------------------------------------------------------------------- * Local functions */ -#if !defined(CFG_I2C_INIT_BOARD) +#if !defined(CONFIG_SYS_I2C_INIT_BOARD) static void send_reset (void); #endif static void send_start (void); @@ -84,7 +84,7 @@ static void send_ack (int); static int write_byte (uchar byte); static uchar read_byte (int); -#if !defined(CFG_I2C_INIT_BOARD) +#if !defined(CONFIG_SYS_I2C_INIT_BOARD) /*----------------------------------------------------------------------- * Send a reset sequence consisting of 9 clocks with the data signal high * to clock any confused device back into an idle state. Also send a @@ -224,7 +224,7 @@ unsigned int i2c_get_bus_num(void) int i2c_set_bus_num(unsigned int bus) { #if defined(CONFIG_I2C_MUX) - if (bus < CFG_MAX_I2C_BUS) { + if (bus < CONFIG_SYS_MAX_I2C_BUS) { i2c_bus_num = bus; } else { int ret; @@ -236,7 +236,7 @@ int i2c_set_bus_num(unsigned int bus) return ret; } #else - if (bus >= CFG_MAX_I2C_BUS) + if (bus >= CONFIG_SYS_MAX_I2C_BUS) return -1; i2c_bus_num = bus; #endif @@ -246,12 +246,12 @@ int i2c_set_bus_num(unsigned int bus) /* TODO: add 100/400k switching */ unsigned int i2c_get_bus_speed(void) { - return CFG_I2C_SPEED; + return CONFIG_SYS_I2C_SPEED; } int i2c_set_bus_speed(unsigned int speed) { - if (speed != CFG_I2C_SPEED) + if (speed != CONFIG_SYS_I2C_SPEED) return -1; return 0; @@ -297,7 +297,7 @@ static uchar read_byte(int ack) */ void i2c_init (int speed, int slaveaddr) { -#if defined(CFG_I2C_INIT_BOARD) +#if defined(CONFIG_SYS_I2C_INIT_BOARD) /* call board specific i2c bus reset routine before accessing the */ /* environment, which might be in a chip on that bus. For details */ /* about this problem see doc/I2C_Edge_Conditions. */ @@ -342,7 +342,7 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len) PRINTD("i2c_read: chip %02X addr %02X alen %d buffer %p len %d\n", chip, addr, alen, buffer, len); -#ifdef CFG_I2C_EEPROM_ADDR_OVERFLOW +#ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW /* * EEPROM chips that implement "address overflow" are ones * like Catalyst 24WC04/08/16 which has 9/10/11 bits of @@ -354,7 +354,7 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len) * still be one byte because the extra address bits are * hidden in the chip address. */ - chip |= ((addr >> (alen * 8)) & CFG_I2C_EEPROM_ADDR_OVERFLOW); + chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW); PRINTD("i2c_read: fix addr_overflow: chip %02X addr %02X\n", chip, addr); diff --git a/drivers/i2c/tsi108_i2c.c b/drivers/i2c/tsi108_i2c.c index 695e39341..fda822c52 100644 --- a/drivers/i2c/tsi108_i2c.c +++ b/drivers/i2c/tsi108_i2c.c @@ -60,14 +60,14 @@ static int i2c_read_byte ( chan_offset = TSI108_I2C_SDRAM_OFFSET; /* Check if I2C operation is in progress */ - temp = *(u32 *) (CFG_TSI108_CSR_BASE + chan_offset + I2C_CNTRL2); + temp = *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + chan_offset + I2C_CNTRL2); if (0 == (temp & (I2C_CNTRL2_RD_STATUS | I2C_CNTRL2_WR_STATUS | I2C_CNTRL2_START))) { /* Set device address and operation (read = 0) */ temp = (byte_addr << 16) | ((chip_addr & 0x07) << 8) | ((chip_addr >> 3) & 0x0F); - *(u32 *) (CFG_TSI108_CSR_BASE + chan_offset + I2C_CNTRL1) = + *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + chan_offset + I2C_CNTRL1) = temp; /* Issue the read command @@ -75,13 +75,13 @@ static int i2c_read_byte ( * (size = 1 byte, lane = 0) */ - *(u32 *) (CFG_TSI108_CSR_BASE + chan_offset + I2C_CNTRL2) = + *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + chan_offset + I2C_CNTRL2) = (I2C_CNTRL2_START); /* Wait until operation completed */ do { /* Read I2C operation status */ - temp = *(u32 *) (CFG_TSI108_CSR_BASE + chan_offset + I2C_CNTRL2); + temp = *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + chan_offset + I2C_CNTRL2); if (0 == (temp & (I2C_CNTRL2_RD_STATUS | I2C_CNTRL2_START))) { if (0 == (temp & @@ -90,7 +90,7 @@ static int i2c_read_byte ( ) { op_status = TSI108_I2C_SUCCESS; - temp = *(u32 *) (CFG_TSI108_CSR_BASE + + temp = *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + chan_offset + I2C_RD_DATA); @@ -172,25 +172,25 @@ static int i2c_write_byte (uchar chip_addr,/* I2C device address on the bus */ u32 op_status = TSI108_I2C_TIMEOUT_ERR; /* Check if I2C operation is in progress */ - temp = *(u32 *) (CFG_TSI108_CSR_BASE + TSI108_I2C_OFFSET + I2C_CNTRL2); + temp = *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + TSI108_I2C_OFFSET + I2C_CNTRL2); if (0 == (temp & (I2C_CNTRL2_RD_STATUS | I2C_CNTRL2_WR_STATUS | I2C_CNTRL2_START))) { /* Place data into the I2C Tx Register */ - *(u32 *) (CFG_TSI108_CSR_BASE + TSI108_I2C_OFFSET + + *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + TSI108_I2C_OFFSET + I2C_TX_DATA) = (u32) * buffer; /* Set device address and operation */ temp = I2C_CNTRL1_I2CWRITE | (byte_addr << 16) | ((chip_addr & 0x07) << 8) | ((chip_addr >> 3) & 0x0F); - *(u32 *) (CFG_TSI108_CSR_BASE + TSI108_I2C_OFFSET + + *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + TSI108_I2C_OFFSET + I2C_CNTRL1) = temp; /* Issue the write command (at this moment all other parameters * are 0 (size = 1 byte, lane = 0) */ - *(u32 *) (CFG_TSI108_CSR_BASE + TSI108_I2C_OFFSET + + *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + TSI108_I2C_OFFSET + I2C_CNTRL2) = (I2C_CNTRL2_START); op_status = TSI108_I2C_TIMEOUT_ERR; @@ -198,7 +198,7 @@ static int i2c_write_byte (uchar chip_addr,/* I2C device address on the bus */ /* Wait until operation completed */ do { /* Read I2C operation status */ - temp = *(u32 *) (CFG_TSI108_CSR_BASE + TSI108_I2C_OFFSET + I2C_CNTRL2); + temp = *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + TSI108_I2C_OFFSET + I2C_CNTRL2); if (0 == (temp & (I2C_CNTRL2_WR_STATUS | I2C_CNTRL2_START))) { if (0 == (temp & -- cgit v1.2.3