From 3a7b2c21fb08b022e3e624cd071002b4aaed1606 Mon Sep 17 00:00:00 2001 From: Niklaus Giger Date: Wed, 22 Jul 2009 17:13:24 +0200 Subject: Support up to 7 banks for ids as specified in JEDEC JEP106Z see http://www.jedec.org/download/search/jep106Z.pdf Add some second source legacy flash chips 256x8. Signed-off-by: Niklaus Giger Signed-off-by: Stefan Roese --- drivers/mtd/cfi_flash.c | 15 +++++++++-- drivers/mtd/jedec_flash.c | 67 +++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 80 insertions(+), 2 deletions(-) (limited to 'drivers/mtd') diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c index 3ca73e3ca..6eea49a11 100644 --- a/drivers/mtd/cfi_flash.c +++ b/drivers/mtd/cfi_flash.c @@ -106,6 +106,8 @@ #define ATM_CMD_SOFTLOCK_START 0x80 #define ATM_CMD_LOCK_SECT 0x40 +#define FLASH_CONTINUATION_CODE 0x7F + #define FLASH_OFFSET_MANUFACTURER_ID 0x00 #define FLASH_OFFSET_DEVICE_ID 0x01 #define FLASH_OFFSET_DEVICE_ID2 0x0E @@ -1541,13 +1543,22 @@ static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry) static void cmdset_amd_read_jedec_ids(flash_info_t *info) { + ushort bankId = 0; + uchar manuId; + flash_write_cmd(info, 0, 0, AMD_CMD_RESET); flash_unlock_seq(info, 0); flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID); udelay(1000); /* some flash are slow to respond */ - info->manufacturer_id = flash_read_uchar (info, - FLASH_OFFSET_MANUFACTURER_ID); + manuId = flash_read_uchar (info, FLASH_OFFSET_MANUFACTURER_ID); + /* JEDEC JEP106Z specifies ID codes up to bank 7 */ + while (manuId == FLASH_CONTINUATION_CODE && bankId < 0x800) { + bankId += 0x100; + manuId = flash_read_uchar (info, + bankId | FLASH_OFFSET_MANUFACTURER_ID); + } + info->manufacturer_id = manuId; switch (info->chipwidth){ case FLASH_CFI_8BIT: diff --git a/drivers/mtd/jedec_flash.c b/drivers/mtd/jedec_flash.c index e48acecea..223fb7114 100644 --- a/drivers/mtd/jedec_flash.c +++ b/drivers/mtd/jedec_flash.c @@ -68,6 +68,17 @@ #define SST39SF010A 0x00B5 #define SST39SF020A 0x00B6 +/* MXIC */ +#define MX29LV040 0x004F + +/* WINBOND */ +#define W39L040A 0x00D6 + +/* AMIC */ +#define A29L040 0x0092 + +/* EON */ +#define EN29LV040A 0x004F /* * Unlock address sets for AMD command sets. @@ -225,6 +236,62 @@ static const struct amd_flash_info jedec_table[] = { ERASEINFO(0x10000,8), } }, + { + .mfr_id = (u16)MX_MANUFACT, + .dev_id = MX29LV040, + .name = "MXIC MX29LV040", + .uaddr = { + [0] = MTD_UADDR_0x0555_0x02AA /* x8 */ + }, + .DevSize = SIZE_512KiB, + .CmdSet = P_ID_AMD_STD, + .NumEraseRegions= 1, + .regions = { + ERASEINFO(0x10000, 8), + } + }, + { + .mfr_id = (u16)WINB_MANUFACT, + .dev_id = W39L040A, + .name = "WINBOND W39L040A", + .uaddr = { + [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */ + }, + .DevSize = SIZE_512KiB, + .CmdSet = P_ID_AMD_STD, + .NumEraseRegions= 1, + .regions = { + ERASEINFO(0x10000, 8), + } + }, + { + .mfr_id = (u16)AMIC_MANUFACT, + .dev_id = A29L040, + .name = "AMIC A29L040", + .uaddr = { + [0] = MTD_UADDR_0x0555_0x02AA /* x8 */ + }, + .DevSize = SIZE_512KiB, + .CmdSet = P_ID_AMD_STD, + .NumEraseRegions= 1, + .regions = { + ERASEINFO(0x10000, 8), + } + }, + { + .mfr_id = (u16)EON_MANUFACT, + .dev_id = EN29LV040A, + .name = "EON EN29LV040A", + .uaddr = { + [0] = MTD_UADDR_0x0555_0x02AA /* x8 */ + }, + .DevSize = SIZE_512KiB, + .CmdSet = P_ID_AMD_STD, + .NumEraseRegions= 1, + .regions = { + ERASEINFO(0x10000, 8), + } + }, #endif #ifdef CONFIG_SYS_FLASH_LEGACY_512Kx16 { -- cgit v1.2.3