From 7a1ac419fa0d2d23ddd08bd61d16896a9f33c933 Mon Sep 17 00:00:00 2001 From: Haiying Wang Date: Thu, 23 Aug 2007 15:20:54 -0400 Subject: Enable L2 cache for MPC8568MDS board The L2 cache size is 512KB for 8568, print out the correct informaiton. Signed-off-by: Haiying Wang --- include/configs/MPC8568MDS.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'include/configs/MPC8568MDS.h') diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h index d5a14fc39..ba744e99f 100644 --- a/include/configs/MPC8568MDS.h +++ b/include/configs/MPC8568MDS.h @@ -63,9 +63,9 @@ extern unsigned long get_clock_freq(void); /* * These can be toggled for performance analysis, otherwise use default. */ -/*#define CONFIG_L2_CACHE*/ /* toggle L2 cache */ -#define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ +#define CONFIG_L2_CACHE /* toggle L2 cache */ +#define CONFIG_BTB /* toggle branch predition */ +#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ /* * Only possible on E500 Version 2 or newer cores. -- cgit v1.2.3