From 8ff0208d31223e36f7c038982589b448d7fdd217 Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Sun, 12 Mar 2006 01:55:43 +0100 Subject: Switch MPC86xADS and MPC885ADS boards to use cpuclk environment variable to set clock Patch by Yuli Barcohen, 05 Jun 2005 --- include/configs/MPC885ADS.h | 28 +++++++++------------------- 1 file changed, 9 insertions(+), 19 deletions(-) (limited to 'include/configs/MPC885ADS.h') diff --git a/include/configs/MPC885ADS.h b/include/configs/MPC885ADS.h index 74318e554..1867c5bf0 100644 --- a/include/configs/MPC885ADS.h +++ b/include/configs/MPC885ADS.h @@ -1,44 +1,34 @@ /* * A collection of structures, addresses, and values associated with - * the Motorola DUET ADS board. Values common to all FADS family boards + * the Motorola MPC885ADS board. Values common to all FADS family boards * are in board/fads/fads.h * - * Copyright (C) 2003 Arabella Software Ltd. + * Copyright (C) 2003-2004 Arabella Software Ltd. * Yuli Barcohen */ #ifndef __CONFIG_H #define __CONFIG_H -/* Board type */ -#define CONFIG_MPC885ADS 1 /* Duet (MPC87x/88x) ADS */ +#define CONFIG_MPC885ADS 1 /* MPC885ADS board */ #define CONFIG_FADS 1 /* We are FADS compatible (more or less) */ -#define CONFIG_MPC885 1 /* MPC885 CPU (Duet family) */ +#define CONFIG_MPC885 1 /* MPC885 CPU (Duet family) */ -#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ +#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #undef CONFIG_8xx_CONS_SMC2 #undef CONFIG_8xx_CONS_NONE #define CONFIG_BAUDRATE 38400 -#define CONFIG_8xx_OSCLK 10000000 /* 10 MHz oscillator on EXTCLK */ - -#define CFG_PLPRCR ((1 << PLPRCR_MFD_SHIFT) | (12 << PLPRCR_MFI_SHIFT) | PLPRCR_TEXPS) +#define CONFIG_8xx_OSCLK 10000000 /* 10 MHz oscillator on EXTCLK */ +#define CONFIG_8xx_CPUCLK_DEFAULT 50000000 +#define CFG_8xx_CPUCLK_MIN 40000000 +#define CFG_8xx_CPUCLK_MAX 133000000 #define CONFIG_SDRAM_50MHZ 1 -#define CONFIG_COMMANDS (CONFIG_CMD_DFL \ - | CFG_CMD_DHCP \ - | CFG_CMD_IMMAP \ - | CFG_CMD_MII \ - | CFG_CMD_PING \ - ) - #include "fads.h" -#undef CFG_SCCR -#define CFG_SCCR (SCCR_TBS|SCCR_EBDF11) - #define CFG_OR5_PRELIM 0xFFFF8110 /* 64Kbyte address space */ #define CFG_BR5_PRELIM (CFG_PHYDEV_ADDR | BR_PS_8 | BR_V) -- cgit v1.2.3