From 66ca92a5ba882807ba8ed8f772c0fc22b25976cc Mon Sep 17 00:00:00 2001 From: wdenk Date: Tue, 28 Sep 2004 17:59:53 +0000 Subject: * Patch by Yuli Barcohen, 13 Jul 2004: Allow clock setting on MPC866/MPC885 series chips according to environment variable `cpuclk' * Patch by Yuli Barcohen, 20 Apr 2004: Remove unnecessary redefine of CPM_DATAONLY_SIZE for MPC826x --- include/configs/NC650.h | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'include/configs/NC650.h') diff --git a/include/configs/NC650.h b/include/configs/NC650.h index 1aaca1467..30d3d212e 100644 --- a/include/configs/NC650.h +++ b/include/configs/NC650.h @@ -44,25 +44,25 @@ /* * 10 MHz - PLL input clock */ -#define CFG_866_OSCCLK 10000000 +#define CFG_8xx_OSCCLK 10000000 /* * 50 MHz - default CPU clock */ -#define CFG_866_CPUCLK_DEFAULT 50000000 +#define CONFIG_8xx_CPUCLK_DEFAULT 50000000 /* * 15 MHz - CPU minimum clock */ -#define CFG_866_CPUCLK_MIN 15000000 +#define CFG_8xx_CPUCLK_MIN 15000000 /* * 133 MHz - CPU maximum clock */ -#define CFG_866_CPUCLK_MAX 133000000 +#define CFG_8xx_CPUCLK_MAX 133000000 #define CFG_MEASURE_CPUCLK -#define CFG_8XX_XIN CFG_866_OSCCLK +#define CFG_8XX_XIN CFG_8xx_OSCCLK #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ @@ -307,7 +307,7 @@ * 4 Number of refresh cycles per period * 64 Refresh cycle in ms per number of rows */ -#define CFG_866_PTA_PER_CLK ((4096 * 64 * 1000) / (4 * 64)) +#define CFG_PTA_PER_CLK ((4096 * 64 * 1000) / (4 * 64)) /* * Memory Periodic Timer Prescaler -- cgit v1.2.3