From cce625e557416d06aeddaab0967b3119748cd21e Mon Sep 17 00:00:00 2001 From: wdenk Date: Tue, 28 Sep 2004 19:00:19 +0000 Subject: * Patch by Stephen Williams, 15 July 2004 Set the PCI class code for JSE board as part of PCI interface setup * Patch by Michael Bendzick, 15 Jul 2004: Fix problem with writes with odd sizes in drivers/cfi_flash.c when CFG_FLASH_USE_BUFFER_WRITE is set --- include/configs/NC650.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include/configs/NC650.h') diff --git a/include/configs/NC650.h b/include/configs/NC650.h index 30d3d212e..48bea694d 100644 --- a/include/configs/NC650.h +++ b/include/configs/NC650.h @@ -44,7 +44,7 @@ /* * 10 MHz - PLL input clock */ -#define CFG_8xx_OSCCLK 10000000 +#define CONFIG_8xx_OSCLK 10000000 /* * 50 MHz - default CPU clock @@ -62,7 +62,7 @@ #define CFG_8xx_CPUCLK_MAX 133000000 #define CFG_MEASURE_CPUCLK -#define CFG_8XX_XIN CFG_8xx_OSCCLK +#define CFG_8XX_XIN CONFIG_8xx_OSCLK #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ -- cgit v1.2.3