From f12e568ca45f6c56b5a6d52a43524987e141abe7 Mon Sep 17 00:00:00 2001
From: wdenk <wdenk>
Date: Mon, 7 Jul 2003 20:07:54 +0000
Subject: * Add support for NSCU board

* Add support for TQM823M, TQM850M, TQM855M and TQM860M modules

* Add support for Am29LV160ML, Am29LV320ML, and Am29LV640ML
  mirror bit flash on TQM8xxM modules
---
 include/configs/TQM855L.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

(limited to 'include/configs/TQM855L.h')

diff --git a/include/configs/TQM855L.h b/include/configs/TQM855L.h
index 7f1f153c8..e9e1e0822 100644
--- a/include/configs/TQM855L.h
+++ b/include/configs/TQM855L.h
@@ -1,5 +1,5 @@
 /*
- * (C) Copyright 2000, 2001, 2002
+ * (C) Copyright 2000-2003
  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  *
  * See file CREDITS for list of people who contributed to this
@@ -253,7 +253,7 @@
 #ifdef	CONFIG_80MHz	/* for 80 MHz, we use a 16 MHz clock * 5 */
 #define CFG_PLPRCR							\
 		( (5-1)<<PLPRCR_MF_SHIFT | PLPRCR_TEXPS | PLPRCR_TMIST )
-#else			/* up to 50 MHz we use a 1:1 clock */
+#else			/* up to 66 MHz we use a 1:1 clock */
 #define CFG_PLPRCR	(PLPRCR_SPLSS | PLPRCR_TEXPS | PLPRCR_TMIST)
 #endif	/* CONFIG_80MHz */
 
@@ -269,7 +269,7 @@
 			 SCCR_COM00   | SCCR_DFSYNC00 | SCCR_DFBRG00  | \
 			 SCCR_DFNL000 | SCCR_DFNH000  | SCCR_DFLCD000 | \
 			 SCCR_DFALCD00)
-#else			/* up to 50 MHz we use a 1:1 clock */
+#else			/* up to 66 MHz we use a 1:1 clock */
 #define CFG_SCCR	(SCCR_TBS     | \
 			 SCCR_COM00   | SCCR_DFSYNC00 | SCCR_DFBRG00  | \
 			 SCCR_DFNL000 | SCCR_DFNH000  | SCCR_DFLCD000 | \
-- 
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