From 7ee38c044ca5041d3378d6507580ea4ec344af96 Mon Sep 17 00:00:00 2001 From: David Brownell Date: Sun, 12 Apr 2009 15:38:06 -0700 Subject: fix DaVinci NS16550_REG_SIZE regression Update the DaVinci DM6446 boards to use the new convention for CONFIG_SYS_NS16550_REG_SIZE ... the size hasn't changed from the original 4 bytes, but these chips are little-endian. (Resolves a regression added recently by the include/ns16550.h patch to "Unify structure declaration for registers". The code previously worked just fine because the registers were accessed as host-endian words, not as bytes.) Signed-off-by: David Brownell --- include/configs/davinci_sonata.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include/configs/davinci_sonata.h') diff --git a/include/configs/davinci_sonata.h b/include/configs/davinci_sonata.h index 0865d0d33..70d2c7d0c 100644 --- a/include/configs/davinci_sonata.h +++ b/include/configs/davinci_sonata.h @@ -85,7 +85,7 @@ /*====================*/ #define CONFIG_SYS_NS16550 #define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE 4 /* NS16550 register size */ +#define CONFIG_SYS_NS16550_REG_SIZE -4 /* NS16550 register size, byteorder */ #define CONFIG_SYS_NS16550_COM1 0x01c20000 /* Base address of UART0 */ #define CONFIG_SYS_NS16550_CLK 27000000 /* Input clock to NS16550 */ #define CONFIG_CONS_INDEX 1 /* use UART0 for console */ -- cgit v1.2.3