From 6d0f6bcf337c5261c08fabe12982178c2c489d76 Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Thu, 16 Oct 2008 15:01:15 +0200 Subject: rename CFG_ macros to CONFIG_SYS Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD --- include/configs/omap5912osk.h | 66 +++++++++++++++++++++---------------------- 1 file changed, 33 insertions(+), 33 deletions(-) (limited to 'include/configs/omap5912osk.h') diff --git a/include/configs/omap5912osk.h b/include/configs/omap5912osk.h index dd3f7de4f..63cd9c6b7 100644 --- a/include/configs/omap5912osk.h +++ b/include/configs/omap5912osk.h @@ -53,8 +53,8 @@ /* * Size of malloc() pool */ -#define CFG_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) -#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) +#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ /* * Hardware drivers @@ -68,11 +68,11 @@ /* * NS16550 Configuration */ -#define CFG_NS16550 -#define CFG_NS16550_SERIAL -#define CFG_NS16550_REG_SIZE (-4) -#define CFG_NS16550_CLK (48000000) /* can be 12M/32Khz or 48Mhz */ -#define CFG_NS16550_COM1 0xfffb0000 /* uart1, bluetooth uart +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE (-4) +#define CONFIG_SYS_NS16550_CLK (48000000) /* can be 12M/32Khz or 48Mhz */ +#define CONFIG_SYS_NS16550_COM1 0xfffb0000 /* uart1, bluetooth uart on helen */ /* @@ -84,7 +84,7 @@ #define CONFIG_ENV_OVERWRITE #define CONFIG_CONS_INDEX 1 #define CONFIG_BAUDRATE 115200 -#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } /* @@ -123,27 +123,27 @@ /* * Miscellaneous configurable options */ -#define CFG_LONGHELP /* undef to save memory */ -#define CFG_PROMPT "OMAP5912 OSK # " /* Monitor Command Prompt */ -#define CFG_CBSIZE 256 /* Console I/O Buffer Size */ +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_PROMPT "OMAP5912 OSK # " /* Monitor Command Prompt */ +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ /* Print Buffer Size */ -#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) -#define CFG_MAXARGS 16 /* max number of command args */ -#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ -#define CFG_MEMTEST_START 0x10000000 /* memtest works on */ -#define CFG_MEMTEST_END 0x12000000 /* 32 MB in DRAM */ +#define CONFIG_SYS_MEMTEST_START 0x10000000 /* memtest works on */ +#define CONFIG_SYS_MEMTEST_END 0x12000000 /* 32 MB in DRAM */ -#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */ +#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ -#define CFG_LOAD_ADDR 0x10000000 /* default load address */ +#define CONFIG_SYS_LOAD_ADDR 0x10000000 /* default load address */ /* The 1610 has 6 timers, they can be driven by the RefClk (12Mhz) or by * DPLL1. This time is further subdivided by a local divisor. */ -#define CFG_TIMERBASE 0xFFFEC500 /* use timer 1 */ -#define CFG_PVT 7 /* 2^(pvt+1), divide by 256 */ -#define CFG_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CFG_PVT)) +#define CONFIG_SYS_TIMERBASE 0xFFFEC500 /* use timer 1 */ +#define CONFIG_SYS_PVT 7 /* 2^(pvt+1), divide by 256 */ +#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PVT)) /*----------------------------------------------------------------------- * Stack sizes @@ -166,37 +166,37 @@ #define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */ #define PHYS_FLASH_2 0x01000000 /* Flash Bank #2 */ -#define CFG_FLASH_BASE PHYS_FLASH_1 +#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 -#define CFG_MONITOR_BASE CFG_FLASH_BASE /* Monitor at beginning of flash */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE /* Monitor at beginning of flash */ /*----------------------------------------------------------------------- * FLASH driver setup */ -#define CFG_FLASH_CFI 1 /* Flash memory is CFI compliant */ +#define CONFIG_SYS_FLASH_CFI 1 /* Flash memory is CFI compliant */ #define CONFIG_FLASH_CFI_DRIVER 1 /* Use drivers/mtd/cfi_flash.c */ -#define CFG_FLASH_BANKS_LIST { PHYS_FLASH_1, PHYS_FLASH_2 } +#define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, PHYS_FLASH_2 } -#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */ +#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */ #define PHYS_FLASH_SIZE 0x02000000 /* 32MB */ -#define CFG_MAX_FLASH_SECT (259) /* max number of sectors on one chip */ +#define CONFIG_SYS_MAX_FLASH_SECT (259) /* max number of sectors on one chip */ -#define CFG_FLASH_USE_BUFFER_WRITE 1 /* Use buffered writes (~10x faster) */ -#define CFG_FLASH_PROTECTION 1 /* Use hardware sector protection */ +#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* Use buffered writes (~10x faster) */ +#define CONFIG_SYS_FLASH_PROTECTION 1 /* Use hardware sector protection */ -#define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ +#define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ /* timeout values are in ticks */ -#define CFG_FLASH_ERASE_TOUT (20*CFG_HZ) /* Timeout for Flash Erase */ -#define CFG_FLASH_WRITE_TOUT (20*CFG_HZ) /* Timeout for Flash Write */ +#define CONFIG_SYS_FLASH_ERASE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Erase */ +#define CONFIG_SYS_FLASH_WRITE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Write */ /*----------------------------------------------------------------------- * FLASH and environment organization */ #define CONFIG_ENV_IS_IN_FLASH 1 /* addr of environment */ -#define CONFIG_ENV_ADDR (CFG_FLASH_BASE + 0x020000) +#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x020000) #define CONFIG_ENV_SIZE 0x20000 /* Total Size of Environment Sector */ #define CONFIG_ENV_OFFSET 0x20000 /* environment starts here */ -- cgit v1.2.3