From 9bd4e5911b750837515466bc7449087698b88e0e Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Tue, 26 Aug 2008 15:01:37 -0500 Subject: FSL DDR: Convert SBC8641D to new DDR code. Signed-off-by: Kumar Gala --- include/configs/sbc8641d.h | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'include/configs/sbc8641d.h') diff --git a/include/configs/sbc8641d.h b/include/configs/sbc8641d.h index efc787e99..ddca527c4 100644 --- a/include/configs/sbc8641d.h +++ b/include/configs/sbc8641d.h @@ -61,8 +61,6 @@ #define CONFIG_HIGH_BATS 1 /* High BATs supported and enabled */ #undef CONFIG_SPD_EEPROM /* Do not use SPD EEPROM for DDR setup*/ -#undef CONFIG_DDR_DLL /* possible DLL fix needed */ -#define CONFIG_DDR_2T_TIMING /* Sets the 2T timing bit */ #undef CONFIG_DDR_ECC /* only for ECC DDR module */ #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER /* DDR controller or DMA? */ #define CONFIG_MEM_INIT_VALUE 0xDeadBeef @@ -114,6 +112,10 @@ #define MPC86xx_DDR_SDRAM_CLK_CNTL +#define CONFIG_NUM_DDR_CONTROLLERS 2 +#define CONFIG_DIMM_SLOTS_PER_CTLR 2 +#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) + #if defined(CONFIG_SPD_EEPROM) /* * Determine DDR configuration from I2C interface. -- cgit v1.2.3