From 8bde7f776c77b343aca29b8c7b58464d915ac245 Mon Sep 17 00:00:00 2001 From: wdenk Date: Fri, 27 Jun 2003 21:31:46 +0000 Subject: * Code cleanup: - remove trailing white space, trailing empty lines, C++ comments, etc. - split cmd_boot.c (separate cmd_bdinfo.c and cmd_load.c) * Patches by Kenneth Johansson, 25 Jun 2003: - major rework of command structure (work done mostly by Michal Cendrowski and Joakim Kristiansen) --- include/galileo/core.h | 54 +++++++++++++++++++++++----------------------- include/galileo/gt64260R.h | 3 --- include/galileo/memory.h | 35 +++++++++++++++--------------- include/galileo/pci.h | 38 ++++++++++++++++---------------- 4 files changed, 63 insertions(+), 67 deletions(-) (limited to 'include/galileo') diff --git a/include/galileo/core.h b/include/galileo/core.h index 56db09782..0735d075b 100644 --- a/include/galileo/core.h +++ b/include/galileo/core.h @@ -123,18 +123,18 @@ typedef enum _bool{false,true} bool; #define SHORT_SWAP(X) ((X <<8 ) | (X >> 8)) #define WORD_SWAP(X) (((X)&0xff)<<24)+ \ - (((X)&0xff00)<<8)+ \ - (((X)&0xff0000)>>8)+ \ - (((X)&0xff000000)>>24) + (((X)&0xff00)<<8)+ \ + (((X)&0xff0000)>>8)+ \ + (((X)&0xff000000)>>24) #define LONG_SWAP(X) ( (l64) (((X)&0xffULL)<<56)+ \ - (((X)&0xff00ULL)<<40)+ \ - (((X)&0xff0000ULL)<<24)+ \ - (((X)&0xff000000ULL)<<8)+ \ - (((X)&0xff00000000ULL)>>8)+ \ - (((X)&0xff0000000000ULL)>>24)+ \ - (((X)&0xff000000000000ULL)>>40)+ \ - (((X)&0xff00000000000000ULL)>>56)) + (((X)&0xff00ULL)<<40)+ \ + (((X)&0xff0000ULL)<<24)+ \ + (((X)&0xff000000ULL)<<8)+ \ + (((X)&0xff00000000ULL)>>8)+ \ + (((X)&0xff0000000000ULL)>>24)+ \ + (((X)&0xff000000000000ULL)>>40)+ \ + (((X)&0xff00000000000000ULL)>>56)) #endif @@ -154,44 +154,44 @@ typedef enum _bool{false,true} bool; /* Read/Write to/from GT`s internal registers */ #define GT_REG_READ(offset, pData) \ *pData = ( *((volatile unsigned int *)(NONE_CACHEABLE | \ - INTERNAL_REG_BASE_ADDR | (offset))) ) ; \ + INTERNAL_REG_BASE_ADDR | (offset))) ) ; \ *pData = WORD_SWAP(*pData) #define GTREGREAD(offset) \ - (WORD_SWAP( *((volatile unsigned int *)(NONE_CACHEABLE | \ - INTERNAL_REG_BASE_ADDR | (offset))) )) + (WORD_SWAP( *((volatile unsigned int *)(NONE_CACHEABLE | \ + INTERNAL_REG_BASE_ADDR | (offset))) )) #define GT_REG_WRITE(offset, data) \ *((unsigned int *)( INTERNAL_REG_BASE_ADDR | (offset))) = \ - WORD_SWAP(data) + WORD_SWAP(data) /* Write 32/16/8 bit */ #define WRITE_CHAR(address, data) \ - *((unsigned char *)(address)) = data + *((unsigned char *)(address)) = data #define WRITE_SHORT(address, data) \ - *((unsigned short *)(address)) = data + *((unsigned short *)(address)) = data #define WRITE_WORD(address, data) \ - *((unsigned int *)(address)) = data + *((unsigned int *)(address)) = data /* Read 32/16/8 bits - returns data in variable. */ #define READ_CHAR(address, pData) \ - *pData = *((volatile unsigned char *)(address)) + *pData = *((volatile unsigned char *)(address)) #define READ_SHORT(address, pData) \ - *pData = *((volatile unsigned short *)(address)) + *pData = *((volatile unsigned short *)(address)) #define READ_WORD(address, pData) \ - *pData = *((volatile unsigned int *)(address)) + *pData = *((volatile unsigned int *)(address)) /* Read 32/16/8 bit - returns data direct. */ #define READCHAR(address) \ - *((volatile unsigned char *)((address) | NONE_CACHEABLE)) + *((volatile unsigned char *)((address) | NONE_CACHEABLE)) #define READSHORT(address) \ - *((volatile unsigned short *)((address) | NONE_CACHEABLE)) + *((volatile unsigned short *)((address) | NONE_CACHEABLE)) #define READWORD(address) \ - *((volatile unsigned int *)((address) | NONE_CACHEABLE)) + *((volatile unsigned int *)((address) | NONE_CACHEABLE)) /* Those two Macros were defined to be compatible with MIPS */ #define VIRTUAL_TO_PHY(x) (((unsigned int)x) & 0xffffffff) @@ -203,8 +203,8 @@ typedef enum _bool{false,true} bool; SET_REG_BITS(0x840,BIT3 | BIT24 | BIT30) - set bits: 3,24 and 30 to logic '1' in register 0x840 while the other bits stays as is. */ #define SET_REG_BITS(regOffset,bits) \ - *(unsigned int*)(NONE_CACHEABLE | INTERNAL_REG_BASE_ADDR | \ - regOffset) |= (unsigned int)WORD_SWAP(bits) + *(unsigned int*)(NONE_CACHEABLE | INTERNAL_REG_BASE_ADDR | \ + regOffset) |= (unsigned int)WORD_SWAP(bits) /* RESET_REG_BITS(regOffset,bits) - gets register offset and bits: a 32bit value. It set to logic '0' in the @@ -212,7 +212,7 @@ typedef enum _bool{false,true} bool; RESET_REG_BITS(0x840,BIT3 | BIT24 | BIT30) - set bits: 3,24 and 30 to logic '0' in register 0x840 while the other bits stays as is. */ #define RESET_REG_BITS(regOffset,bits) \ - *(unsigned int*)(NONE_CACHEABLE | INTERNAL_REG_BASE_ADDR \ - | regOffset) &= ~( (unsigned int)WORD_SWAP(bits) ) + *(unsigned int*)(NONE_CACHEABLE | INTERNAL_REG_BASE_ADDR \ + | regOffset) &= ~( (unsigned int)WORD_SWAP(bits) ) #endif /* __INCcoreh */ diff --git a/include/galileo/gt64260R.h b/include/galileo/gt64260R.h index 1e6f58bb2..ebf087afc 100644 --- a/include/galileo/gt64260R.h +++ b/include/galileo/gt64260R.h @@ -89,8 +89,6 @@ #define PCI_1MEMORY3_HIGH_ADDRESS_REMAP 0x358 - - /****************************************/ /* CPU Sync Barrier */ /****************************************/ @@ -231,7 +229,6 @@ #define X1_SNOOP_COMMAND 0x54c - /****************************************/ /* Device Parameters */ /****************************************/ diff --git a/include/galileo/memory.h b/include/galileo/memory.h index 99bd79ba6..0c46c24d0 100644 --- a/include/galileo/memory.h +++ b/include/galileo/memory.h @@ -36,20 +36,20 @@ typedef enum __memBank{BANK0,BANK1,BANK2,BANK3} MEMORY_BANK; typedef enum __memDevice{DEVICE0,DEVICE1,DEVICE2,DEVICE3,BOOT_DEVICE} DEVICE; typedef enum __memoryProtectRegion{MEM_REGION0,MEM_REGION1,MEM_REGION2, \ - MEM_REGION3,MEM_REGION4,MEM_REGION5, \ - MEM_REGION6,MEM_REGION7} \ - MEMORY_PROTECT_REGION; + MEM_REGION3,MEM_REGION4,MEM_REGION5, \ + MEM_REGION6,MEM_REGION7} \ + MEMORY_PROTECT_REGION; typedef enum __memoryAccess{MEM_ACCESS_ALLOWED,MEM_ACCESS_FORBIDEN} \ - MEMORY_ACCESS; + MEMORY_ACCESS; typedef enum __memoryWrite{MEM_WRITE_ALLOWED,MEM_WRITE_FORBIDEN} \ - MEMORY_ACCESS_WRITE; + MEMORY_ACCESS_WRITE; typedef enum __memoryCacheProtect{MEM_CACHE_ALLOWED,MEM_CACHE_FORBIDEN} \ - MEMORY_CACHE_PROTECT; + MEMORY_CACHE_PROTECT; typedef enum __memorySnoopType{MEM_NO_SNOOP,MEM_SNOOP_WT,MEM_SNOOP_WB} \ - MEMORY_SNOOP_TYPE; + MEMORY_SNOOP_TYPE; typedef enum __memorySnoopRegion{MEM_SNOOP_REGION0,MEM_SNOOP_REGION1, \ - MEM_SNOOP_REGION2,MEM_SNOOP_REGION3} \ - MEMORY_SNOOP_REGION; + MEM_SNOOP_REGION2,MEM_SNOOP_REGION3} \ + MEMORY_SNOOP_REGION; /* functions */ unsigned int memoryGetBankBaseAddress(MEMORY_BANK bank); @@ -68,19 +68,18 @@ bool memoryMapInternalRegistersSpace(unsigned int internalRegBase); unsigned int memoryGetInternalRegistersSpace(void); /* Configurate the protection feature to a given space. */ bool memorySetProtectRegion(MEMORY_PROTECT_REGION region, - MEMORY_ACCESS memoryAccess, - MEMORY_ACCESS_WRITE memoryWrite, - MEMORY_CACHE_PROTECT cacheProtection, - unsigned int baseAddress, - unsigned int regionLength); + MEMORY_ACCESS memoryAccess, + MEMORY_ACCESS_WRITE memoryWrite, + MEMORY_CACHE_PROTECT cacheProtection, + unsigned int baseAddress, + unsigned int regionLength); /* Configurate the snoop feature to a given space. */ bool memorySetRegionSnoopMode(MEMORY_SNOOP_REGION region, - MEMORY_SNOOP_TYPE snoopType, - unsigned int baseAddress, - unsigned int regionLength); + MEMORY_SNOOP_TYPE snoopType, + unsigned int baseAddress, + unsigned int regionLength); bool memoryRemapAddress(unsigned int remapReg, unsigned int remapValue); bool memoryGetDeviceParam(DEVICE_PARAM *deviceParam, DEVICE deviceNum); bool memorySetDeviceParam(DEVICE_PARAM *deviceParam, DEVICE deviceNum); #endif /* __INCmemoryh */ - diff --git a/include/galileo/pci.h b/include/galileo/pci.h index f45dd3617..6ed8b95df 100644 --- a/include/galileo/pci.h +++ b/include/galileo/pci.h @@ -41,20 +41,20 @@ /* typedefs */ typedef enum __pciAccessRegions{REGION0,REGION1,REGION2,REGION3,REGION4,REGION5, - REGION6,REGION7} PCI_ACCESS_REGIONS; + REGION6,REGION7} PCI_ACCESS_REGIONS; typedef enum __pciAgentPrio{LOW_AGENT_PRIO,HI_AGENT_PRIO} PCI_AGENT_PRIO; typedef enum __pciAgentPark{PARK_ON_AGENT,DONT_PARK_ON_AGENT} PCI_AGENT_PARK; typedef enum __pciSnoopType{PCI_NO_SNOOP,PCI_SNOOP_WT,PCI_SNOOP_WB} - PCI_SNOOP_TYPE; + PCI_SNOOP_TYPE; typedef enum __pciSnoopRegion{PCI_SNOOP_REGION0,PCI_SNOOP_REGION1, - PCI_SNOOP_REGION2,PCI_SNOOP_REGION3} - PCI_SNOOP_REGION; + PCI_SNOOP_REGION2,PCI_SNOOP_REGION3} + PCI_SNOOP_REGION; typedef enum __memPciHost{PCI_HOST0,PCI_HOST1} PCI_HOST; typedef enum __memPciRegion{PCI_REGION0,PCI_REGION1, - PCI_REGION2,PCI_REGION3, + PCI_REGION2,PCI_REGION3, PCI_IO} PCI_REGION; @@ -62,23 +62,23 @@ typedef enum __memPciRegion{PCI_REGION0,PCI_REGION1, void pciWriteConfigReg(PCI_HOST host, unsigned int regOffset, unsigned int pciDevNum, unsigned int data); unsigned int pciReadConfigReg (PCI_HOST host, unsigned int regOffset, - unsigned int pciDevNum); + unsigned int pciDevNum); /* read/write configuration registers on another PCI bus. */ void pciOverBridgeWriteConfigReg(PCI_HOST host, unsigned int regOffset, - unsigned int pciDevNum, - unsigned int busNum,unsigned int data); + unsigned int pciDevNum, + unsigned int busNum,unsigned int data); unsigned int pciOverBridgeReadConfigReg(PCI_HOST host, unsigned int regOffset, - unsigned int pciDevNum, - unsigned int busNum); + unsigned int pciDevNum, + unsigned int busNum); /* Master`s memory space */ bool pciMapSpace(PCI_HOST host, PCI_REGION region, unsigned int remapBase, unsigned int deviceBase, - unsigned int deviceLength); + unsigned int deviceLength); unsigned int pciGetSpaceBase(PCI_HOST host, PCI_REGION region); unsigned int pciGetSpaceSize(PCI_HOST host, PCI_REGION region); @@ -99,15 +99,15 @@ void pciDisableAccessRegion(PCI_HOST host, PCI_ACCESS_REGIONS region); bool pciArbiterEnable(PCI_HOST host); bool pciArbiterDisable(PCI_HOST host); bool pciParkingDisable(PCI_HOST host, PCI_AGENT_PARK internalAgent, - PCI_AGENT_PARK externalAgent0, - PCI_AGENT_PARK externalAgent1, - PCI_AGENT_PARK externalAgent2, - PCI_AGENT_PARK externalAgent3, - PCI_AGENT_PARK externalAgent4, - PCI_AGENT_PARK externalAgent5); + PCI_AGENT_PARK externalAgent0, + PCI_AGENT_PARK externalAgent1, + PCI_AGENT_PARK externalAgent2, + PCI_AGENT_PARK externalAgent3, + PCI_AGENT_PARK externalAgent4, + PCI_AGENT_PARK externalAgent5); bool pciSetRegionSnoopMode(PCI_HOST host, PCI_SNOOP_REGION region, PCI_SNOOP_TYPE snoopType, - unsigned int baseAddress, - unsigned int regionLength); + unsigned int baseAddress, + unsigned int regionLength); #endif /* __INCpcih */ -- cgit v1.2.3