From b66a9383421805c705654ce9456ec28c202819fb Mon Sep 17 00:00:00 2001
From: Rafal Jaworowski <raj@pollux.denx.de>
Date: Wed, 29 Mar 2006 13:17:09 +0200
Subject: Set SDelay register in the DDR controller for the MPC5200B chip.

---
 include/mpc5xxx.h | 1 +
 1 file changed, 1 insertion(+)

(limited to 'include/mpc5xxx.h')

diff --git a/include/mpc5xxx.h b/include/mpc5xxx.h
index f33d85855..50a6ac1e9 100644
--- a/include/mpc5xxx.h
+++ b/include/mpc5xxx.h
@@ -131,6 +131,7 @@
 #if defined(CONFIG_MGT5100)
 #define MPC5XXX_SDRAM_XLBSEL	(MPC5XXX_SDRAM + 0x0010)
 #endif
+#define MPC5XXX_SDRAM_SDELAY	(MPC5XXX_SDRAM + 0x0090)
 
 /* Clock Distribution Module */
 #define MPC5XXX_CDM_JTAGID	(MPC5XXX_CDM + 0x0000)
-- 
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