From ad006f9896b3cc1d8d2b855f27bbd1ad4482abe1 Mon Sep 17 00:00:00 2001 From: Joakim Axelsson Date: Mon, 25 Oct 2010 15:45:31 +0200 Subject: db8500: Split arch_cpu code from board First patch to split cpu_arch SoC-code away from board code. Added usage of arch_cpu_init() which is the corresponding to board_init(). Moved db8500 code from board/st/u8500/u8500.c to cpu/arm_cortexa9/db8500/cpu.c. Also created include/asm/arch-db8500/cpu.h and include/asm/arch-db8500/prcmu.h. ST-Ericsson ID: None Signed-off-by: Joakim Axelsson Change-Id: I403d7d4f6c655c0d383afb3cb3be7e7df96683a3 Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/7150 Reviewed-by: Joakim AXELSSON Tested-by: Joakim AXELSSON Reviewed-by: QATOOLS Reviewed-by: Michael BRANDT Tested-by: Michael BRANDT --- include/asm-arm/arch-db8500/prcmu.h | 52 +++++++++++++++++++++++++++++++++++++ include/configs/u8500.h | 3 +++ 2 files changed, 55 insertions(+) create mode 100644 include/asm-arm/arch-db8500/prcmu.h (limited to 'include') diff --git a/include/asm-arm/arch-db8500/prcmu.h b/include/asm-arm/arch-db8500/prcmu.h new file mode 100644 index 000000000..45f800038 --- /dev/null +++ b/include/asm-arm/arch-db8500/prcmu.h @@ -0,0 +1,52 @@ +/* + * Copyright (C) ST-Ericsson SA 2010 + * + * Author: Joakim Axelsson + * for ST-Ericsson + * + * Origin: Code split from board/st/u8500/u8500.c + * + * License terms: GNU General Public License (GPL), version 2. + */ + +#ifndef __PRCMU_H__ +#define __PRCMU_H__ + +/* Power, Reset, Clock Management Unit */ +/* + * SVA: Smart Video Accelerator + * SIA: Smart Imaging Accelerator + * SGA: Smart Graphic accelerator + * B2R2: Graphic blitter + */ +#define PRCMU_BASE CFG_PRCMU_BASE /* 0x80157000 for U8500 */ +#define PRCM_ARMCLKFIX_MGT_REG (PRCMU_BASE + 0x000) +#define PRCM_ACLK_MGT_REG (PRCMU_BASE + 0x004) +#define PRCM_SVAMMDSPCLK_MGT_REG (PRCMU_BASE + 0x008) +#define PRCM_SIAMMDSPCLK_MGT_REG (PRCMU_BASE + 0x00C) +#define PRCM_SAAMMDSPCLK_MGT_REG (PRCMU_BASE + 0x010) +#define PRCM_SGACLK_MGT_REG (PRCMU_BASE + 0x014) +#define PRCM_UARTCLK_MGT_REG (PRCMU_BASE + 0x018) +#define PRCM_MSPCLK_MGT_REG (PRCMU_BASE + 0x01C) +#define PRCM_I2CCLK_MGT_REG (PRCMU_BASE + 0x020) +#define PRCM_SDMMCCLK_MGT_REG (PRCMU_BASE + 0x024) +#define PRCM_SLIMCLK_MGT_REG (PRCMU_BASE + 0x028) +#define PRCM_PER1CLK_MGT_REG (PRCMU_BASE + 0x02C) +#define PRCM_PER2CLK_MGT_REG (PRCMU_BASE + 0x030) +#define PRCM_PER3CLK_MGT_REG (PRCMU_BASE + 0x034) +#define PRCM_PER5CLK_MGT_REG (PRCMU_BASE + 0x038) +#define PRCM_PER6CLK_MGT_REG (PRCMU_BASE + 0x03C) +#define PRCM_PER7CLK_MGT_REG (PRCMU_BASE + 0x040) +#define PRCM_DMACLK_MGT_REG (PRCMU_BASE + 0x074) +#define PRCM_B2R2CLK_MGT_REG (PRCMU_BASE + 0x078) + +#define PRCM_PLLSOC0_FREQ_REG (PRCMU_BASE + 0x080) +#define PRCM_PLLSOC1_FREQ_REG (PRCMU_BASE + 0x084) +#define PRCM_PLLARM_FREQ_REG (PRCMU_BASE + 0x088) +#define PRCM_PLLDDR_FREQ_REG (PRCMU_BASE + 0x08C) +#define PRCM_ARM_CHGCLKREQ_REG (PRCMU_BASE + 0x114) + +#define PRCM_TCR (PRCMU_BASE + 0x1C8) + +#endif /* __PRCMU_H__ */ + diff --git a/include/configs/u8500.h b/include/configs/u8500.h index f23d70f1f..797e1e555 100644 --- a/include/configs/u8500.h +++ b/include/configs/u8500.h @@ -36,6 +36,9 @@ #define CONFIG_BOOTTIME +/* run arch_cpu_init() of arm_cortexa9/db8500/cpu.c before board_init() */ +#define CONFIG_ARCH_CPU_INIT 1 + #define BOARD_LATE_INIT 1 /*----------------------------------------------------------------------- -- cgit v1.2.3