From f4f7f7d70bc982d6689f09bf97e62caec223629f Mon Sep 17 00:00:00 2001 From: Michael Brandt Date: Fri, 19 Feb 2010 10:15:10 +0100 Subject: HREF V1 updates This patch is part of WP254081 which depends on WP252006. * Fixed I2C, use real timeouts instead of counter * Undefined CONFIG_BOOTTIME, since it as to be changed to new timer.c * Merged V1 patches from Bangalore The patches were merged manually, because of the differences of the U-Boot baseline (Bangalore U-Boot 1.3.1, Lund 2009.11). The original patches were created by Rabin Vincent . and were applied originally to Branches: blr_lsp, remotes/origin/blr_lsp Follows: qpppaaa_20100210_094651 0001-u8500-gpio-add-I2C0-altfun.patch 0002-u8500-use-correct-v1-macros.patch 0003-emmc-clean-up-paritioning.patch 0004-u8500-remove-incorrect-ram-settings.patch 0005-u8500-gpio-remove-unnecessary-ifdefs.patch 0006-u8500-add-ED-v1-detection-and-handle-eMMC-diff.patch 0008-u8500-mmc-don-t-disable-altfuns.patch 0009-u8500-gpio-remove-unused-defined.patch 0010-u8500-mmc-add-barrier-for-while-loop.patch 0011-u8500-mmc-handle-non-block-addressed-cards.patch 0012-u8500-mmc-remove-unused-gpio-settings-on-v1.patch 0013-u8500-emmc-build-fix.patch 0014-u8500-handle-v1-gpios-and-clocks.patch 0015-mmc-build-fix-for-block-addressing.patch 0016-u8500-add-clocks-and-hardware-files.patch 0017-u8500-enable-PRCUM-timers-reg-for-ED.patch 0018-u8500-handle-MTU-for-v1-ED.patch 0019-u8500-emmc-remove-unnecessary-GPIO-settings.patch 0020-u8500-remove-dead-code.patch 0021-u8500-add-working-MTU-timer.patch 0022-pl011-empty-rx-fifo-if-necessary.patch 0023-u8500-gpio-fix-cont-handling-in-altfunc.patch 0024-u8500-reduce-bootdelay-to-1-and-enable-zero-check.patch 0025-u8500-disable-forcing-of-verify-but-set-n-by-default.patch 0029-u8500-fix-some-gpio-settings.patch 0030-emmc-make-v1-paritioning-differences-explicit.patch Signed-off-by: Michael Brandt Change-Id: I1106702e393c34f630e71f071e06c3952b0d3a1a Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/182 Reviewed-by: Michael BRANDT Tested-by: Jonas ABERG Reviewed-by: Jonas ABERG --- include/asm-arm/arch-stw8500/clock.h | 73 ++++++++++++++++++++++++++++ include/asm-arm/arch-stw8500/hardware.h | 85 +++++++++++++++++++++++++++++++++ include/configs/u8500.h | 20 +++----- 3 files changed, 164 insertions(+), 14 deletions(-) create mode 100644 include/asm-arm/arch-stw8500/clock.h create mode 100644 include/asm-arm/arch-stw8500/hardware.h (limited to 'include') diff --git a/include/asm-arm/arch-stw8500/clock.h b/include/asm-arm/arch-stw8500/clock.h new file mode 100644 index 000000000..5317aaf8d --- /dev/null +++ b/include/asm-arm/arch-stw8500/clock.h @@ -0,0 +1,73 @@ +/* + * (C) Copyright 2009 + * ST-Ericsson, + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __ASM_ARCH_CLOCK +#define __ASM_ARCH_CLOCK + +struct prcmu { + unsigned int armclkfix_mgt; + unsigned int armclk_mgt; + unsigned int svammdspclk_mgt; + unsigned int siammdspclk_mgt; + unsigned int reserved; + unsigned int sgaclk_mgt; + unsigned int uartclk_mgt; + unsigned int msp02clk_mgt; + unsigned int i2cclk_mgt; + unsigned int sdmmcclk_mgt; + unsigned int slimclk_mgt; + unsigned int per1clk_mgt; + unsigned int per2clk_mgt; + unsigned int per3clk_mgt; + unsigned int per5clk_mgt; + unsigned int per6clk_mgt; + unsigned int per7clk_mgt; + unsigned int lcdclk_mgt; + unsigned int reserved1; + unsigned int bmlclk_mgt; + unsigned int hsitxclk_mgt; + unsigned int hsirxclk_mgt; + unsigned int hdmiclk_mgt; + unsigned int apeatclk_mgt; + unsigned int apetraceclk_mgt; + unsigned int mcdeclk_mgt; + unsigned int ipi2cclk_mgt; + unsigned int dsialtclk_mgt; + unsigned int spare2clk_mgt; + unsigned int dmaclk_mgt; + unsigned int b2r2clk_mgt; + unsigned int tvclk_mgt; + unsigned int unused[82]; + unsigned int tcr; + unsigned int unused1[23]; + unsigned int ape_softrst; +}; + +extern void u8500_clock_enable(int periph, int kern, int cluster); + +static inline void u8500_prcmu_enable(unsigned int *reg) +{ + writel(readl(reg) | (1 << 8), reg); +} + +#endif /* __ASM_ARCH_CLOCK */ diff --git a/include/asm-arm/arch-stw8500/hardware.h b/include/asm-arm/arch-stw8500/hardware.h new file mode 100644 index 000000000..650851cc9 --- /dev/null +++ b/include/asm-arm/arch-stw8500/hardware.h @@ -0,0 +1,85 @@ +/* + * (C) Copyright 2009 + * ST-Ericsson + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#ifndef __ASM_ARCH_HARDWARE_H +#define __ASM_ARCH_HARDWARE_H + +/* Peripheral clusters */ + +#define U8500_PER3_BASE 0x80000000 +#define U8500_PER2_BASE 0x80110000 +#define U8500_PER1_BASE 0x80120000 +#define U8500_PER4_BASE 0x80150000 + +#define U8500_PER6_BASE 0xa03c0000 +#define U8500_PER7_BASE 0xa03d0000 +#define U8500_PER5_BASE 0xa03e0000 + +/* GPIO */ + +#define U8500_GPIO0_BASE (U8500_PER1_BASE + 0xE000) +#define U8500_GPIO1_BASE (U8500_PER1_BASE + 0xE000 + 0x80) + +#define U8500_GPIO2_BASE (U8500_PER3_BASE + 0xE000) +#define U8500_GPIO3_BASE (U8500_PER3_BASE + 0xE000 + 0x80) +#define U8500_GPIO4_BASE (U8500_PER3_BASE + 0xE000 + 0x100) +#define U8500_GPIO5_BASE (U8500_PER3_BASE + 0xE000 + 0x180) + +#define U8500_GPIO6_BASE (U8500_PER2_BASE + 0xE000) +#define U8500_GPIO7_BASE (U8500_PER2_BASE + 0xE000 + 0x80) + +#define U8500_GPIO8_BASE (U8500_PER5_BASE + 0x1E000) + +/* Per7 */ +#define U8500_MTU0_BASE_ED (U8500_PER7_BASE + 0xa000) +#define U8500_MTU1_BASE_ED (U8500_PER7_BASE + 0xb000) +#define U8500_CLKRST7_BASE (U8500_PER7_BASE + 0xf000) + +/* Per6 */ +#define U8500_MTU0_BASE_V1 (U8500_PER6_BASE + 0x6000) +#define U8500_MTU1_BASE_v1 (U8500_PER6_BASE + 0x7000) +#define U8500_CLKRST6_BASE (U8500_PER6_BASE + 0xf000) + +/* Per5 */ +#define U8500_CLKRST5_BASE (U8500_PER5_BASE + 0x1f000) + +/* Per4 */ +#define U8500_PRCMU_BASE (U8500_PER4_BASE + 0x07000) + +/* Per3 */ +#define U8500_UART2_BASE (U8500_PER3_BASE + 0x7000) +#define U8500_CLKRST3_BASE (U8500_PER3_BASE + 0xf000) + +/* Per2 */ +#define U8500_CLKRST2_BASE (U8500_PER2_BASE + 0xf000) + +/* Per1 */ +#define U8500_UART0_BASE (U8500_PER1_BASE + 0x0000) +#define U8500_UART1_BASE (U8500_PER1_BASE + 0x1000) +#define U8500_CLKRST1_BASE (U8500_PER1_BASE + 0xf000) + +/* Last page of Boot ROM */ +#define U8500_BOOTROM_BASE 0x9001f000 +#define U8500_BOOTROM_ASIC_ID_OFFSET 0x0ff4 + +#endif /* __ASM_ARCH_HARDWARE_H */ diff --git a/include/configs/u8500.h b/include/configs/u8500.h index da97cbe73..831ca1b90 100644 --- a/include/configs/u8500.h +++ b/include/configs/u8500.h @@ -32,7 +32,7 @@ #define CONFIG_U8500_ED 1 #define CONFIG_L2_OFF 1 -#define CONFIG_BOOTTIME /* enable boot time stamps */ +#undef CONFIG_BOOTTIME /* enable boot time stamps */ #define CONFIG_SYS_MEMTEST_START 0x00000000 #define CONFIG_SYS_MEMTEST_END 0x1FFFFFFF @@ -44,8 +44,6 @@ #define CONFIG_SYS_TIMERBASE 0xA03C6000 /* MTU0 timer */ #endif -#define CONFIG_MISC_INIT_R 1 /* call misc_init_r during start up */ - #define BOARD_LATE_INIT 1 /*----------------------------------------------------------------------- @@ -120,6 +118,7 @@ #define CONFIG_BOOTCOMMAND "run emmcboot" #define CONFIG_EXTRA_ENV_SETTINGS \ + "verify=n\0" \ "loadaddr=0x00100000\0" \ "console=ttyAMA2,115200n8\0" \ "commonargs=setenv bootargs cachepolicy=writealloc noinitrd " \ @@ -198,11 +197,9 @@ /*----------------------------------------------------------------------- * Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 2 /* we have dual bank of DRAM */ +#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM_1 0x00000000 /* DDR-SDRAM Bank #1 */ #define PHYS_SDRAM_SIZE_1 0x10000000 /* 256 MB */ -#define PHYS_SDRAM_2 0x20000000 /* DDR-SDRAM Bank #2 */ -#define PHYS_SDRAM_SIZE_2 0x10000000 /* 256 MB */ /*----------------------------------------------------------------------- * MMC related configs @@ -213,7 +210,9 @@ /*----------------------------------------------------------------------- * EMMC related configs */ -#define CFG_EMMC_BASE 0x80114000 /* EMMC base of size 2GB for 8500 */ +#define CFG_EMMC_BASE_V1 0x80005000 /*POP EMMC base of size 256MB for 8500 cut1.0 */ +#define CFG_EMMC_BASE_ED 0x80114000 /* EMMC base of size 2GB for 8500 */ + #define CONFIG_CMD_ENV #define CONFIG_CMD_SAVEENV /* CMD_ENV is obsolete but used in env_emmc.c */ #define CONFIG_ENV_IS_IN_EMMC 1 @@ -237,17 +236,10 @@ /*----------------------------------------------------------------------- * FLASH and environment organization */ -#ifndef CONFIG_U8500_V1 #define CONFIG_SYS_MAX_FLASH_SECT 512 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ -#else - -#define CFG_POP_EMMC_BASE 0x80005000 /*POP EMMC base of size 256MB for 8500 cut1.0 */ - -#endif - /*------------------------------------------------------------------------------ * base register values for U8500 */ -- cgit v1.2.3