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/*
 * (C) Copyright 2002
 * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 *
 */

#include <common.h>
#include <asm/processor.h>
#include <asm/mmu.h>

int write_bat (ppc_bat_t bat, unsigned long upper, unsigned long lower)
{
	switch (bat) {
	case DBAT0:
		mtspr (DBAT0L, lower);
		mtspr (DBAT0U, upper);
		break;
	case IBAT0:
		mtspr (IBAT0L, lower);
		mtspr (IBAT0U, upper);
		break;
	case DBAT1:
		mtspr (DBAT1L, lower);
		mtspr (DBAT1U, upper);
		break;
	case IBAT1:
		mtspr (IBAT1L, lower);
		mtspr (IBAT1U, upper);
		break;
	case DBAT2:
		mtspr (DBAT2L, lower);
		mtspr (DBAT2U, upper);
		break;
	case IBAT2:
		mtspr (IBAT2L, lower);
		mtspr (IBAT2U, upper);
		break;
	case DBAT3:
		mtspr (DBAT3L, lower);
		mtspr (DBAT3U, upper);
		break;
	case IBAT3:
		mtspr (IBAT3L, lower);
		mtspr (IBAT3U, upper);
		break;
#ifdef CONFIG_HIGH_BATS
	case DBAT4:
		mtspr (DBAT4L, lower);
		mtspr (DBAT4U, upper);
		break;
	case IBAT4:
		mtspr (IBAT4L, lower);
		mtspr (IBAT4U, upper);
		break;
	case DBAT5:
		mtspr (DBAT5L, lower);
		mtspr (DBAT5U, upper);
		break;
	case IBAT5:
		mtspr (IBAT5L, lower);
		mtspr (IBAT5U, upper);
		break;
	case DBAT6:
		mtspr (DBAT6L, lower);
		mtspr (DBAT6U, upper);
		break;
	case IBAT6:
		mtspr (IBAT6L, lower);
		mtspr (IBAT6U, upper);
		break;
	case DBAT7:
		mtspr (DBAT7L, lower);
		mtspr (DBAT7U, upper);
		break;
	case IBAT7:
		mtspr (IBAT7L, lower);
		mtspr (IBAT7U, upper);
		break;
#endif
	default:
		return (-1);
	}

	return (0);
}

int read_bat (ppc_bat_t bat, unsigned long *upper, unsigned long *lower)
{
	unsigned long register u;
	unsigned long register l;

	switch (bat) {
	case DBAT0:
		l = mfspr (DBAT0L);
		u = mfspr (DBAT0U);
		break;
	case IBAT0:
		l = mfspr (IBAT0L);
		u = mfspr (IBAT0U);
		break;
	case DBAT1:
		l = mfspr (DBAT1L);
		u = mfspr (DBAT1U);
		break;
	case IBAT1:
		l = mfspr (IBAT1L);
		u = mfspr (IBAT1U);
		break;
	case DBAT2:
		l = mfspr (DBAT2L);
		u = mfspr (DBAT2U);
		break;
	case IBAT2:
		l = mfspr (IBAT2L);
		u = mfspr (IBAT2U);
		break;
	case DBAT3:
		l = mfspr (DBAT3L);
		u = mfspr (DBAT3U);
		break;
	case IBAT3:
		l = mfspr (IBAT3L);
		u = mfspr (IBAT3U);
		break;
#ifdef CONFIG_HIGH_BATS
	case DBAT4:
		l = mfspr (DBAT4L);
		u = mfspr (DBAT4U);
		break;
	case IBAT4:
		l = mfspr (IBAT4L);
		u = mfspr (IBAT4U);
		break;
	case DBAT5:
		l = mfspr (DBAT5L);
		u = mfspr (DBAT5U);
		break;
	case IBAT5:
		l = mfspr (IBAT5L);
		u = mfspr (IBAT5U);
		break;
	case DBAT6:
		l = mfspr (DBAT6L);
		u = mfspr (DBAT6U);
		break;
	case IBAT6:
		l = mfspr (IBAT6L);
		u = mfspr (IBAT6U);
		break;
	case DBAT7:
		l = mfspr (DBAT7L);
		u = mfspr (DBAT7U);
		break;
	case IBAT7:
		l = mfspr (IBAT7L);
		u = mfspr (IBAT7U);
		break;
#endif
	default:
		return (-1);
	}

	*upper = u;
	*lower = l;

	return (0);
}