diff options
| author | Pankaj Bharadiya <pankaj.laxminarayan.bharadiya@intel.com> | 2022-03-04 10:02:01 +0100 |
|---|---|---|
| committer | Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> | 2022-03-07 10:22:45 +0100 |
| commit | 5c1c2580a86e2da91cfd7e14d16c5e4b6c338e31 (patch) | |
| tree | 6616323d85edb6bce33fae5f12fa5f0241b7c792 /lib/i915 | |
| parent | 7f21cd5dca0b575d7cfd1b7303aac65bbfa3f7b9 (diff) | |
lib/rendercopy/dg2: Add rendercopy support for dg2
The present gen12 rendercopy is not compatible with gen21p71(dg2).
Add rendercopy support for dg2 and introduce gen12p71_render_copyfunc
function to use it.
Signed-off-by: Pankaj Bharadiya <pankaj.laxminarayan.bharadiya@intel.com>
Signed-off-by: Juha-Pekka Heikkilä <juha-pekka.heikkila@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Diffstat (limited to 'lib/i915')
| -rw-r--r-- | lib/i915/shaders/ps/gen12p71_render_copy.asm | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/lib/i915/shaders/ps/gen12p71_render_copy.asm b/lib/i915/shaders/ps/gen12p71_render_copy.asm new file mode 100644 index 00000000..e407a425 --- /dev/null +++ b/lib/i915/shaders/ps/gen12p71_render_copy.asm @@ -0,0 +1,16 @@ +L0: +(W) mad (8|M0) acc0.0<1>:f r6.3<0;0>:f r2.0<8;1>:f r6.0<0>:f +(W) mad (8|M0) r113.0<1>:f acc0.0<8;1>:f r3.0<8;1>:f r6.1<0>:f +(W) mad (8|M0) acc0.0<1>:f r6.3<0;0>:f r4.0<8;1>:f r6.0<0>:f +(W) mad (8|M0) r114.0<1>:f acc0.0<8;1>:f r5.0<8;1>:f r6.1<0>:f +(W) mad (8|M0) acc0.0<1>:f r6.7<0;0>:f r2.0<8;1>:f r6.4<0>:f +(W) mad (8|M0) r115.0<1>:f acc0.0<8;1>:f r3.0<8;1>:f r6.5<0>:f +(W) mad (8|M0) acc0.0<1>:f r6.7<0;0>:f r4.0<8;1>:f r6.4<0>:f +(W) mad (8|M0) r116.0<1>:f acc0.0<8;1>:f r5.0<8;1>:f r6.5<0>:f +(W) send.smpl (16|M0) r12 r113 null 0x0 0x8840001 // wr:4+0, rd:8, fc: 0x40001 + mov (16|M0) r113.0<1>:f r12.0<8;8,1>:f {$0.dst} + mov (16|M0) r115.0<1>:f r14.0<8;8,1>:f + mov (16|M0) r117.0<1>:f r16.0<8;8,1>:f + mov (16|M0) r119.0<1>:f r18.0<8;8,1>:f +(W) send.rc (16|M0) null r113 null 0x0 0x10031000 {EOT, @1} // wr:8+0, rd:0, Render Target Write msc:16, to #0 +L224: |