diff options
| author | Kalamarz, Lukasz <lukasz.kalamarz@intel.com> | 2018-10-10 12:48:37 +0200 |
|---|---|---|
| committer | Arkadiusz Hiler <arkadiusz.hiler@intel.com> | 2018-10-15 15:23:53 +0300 |
| commit | 68ff28a022dbaa26a20c8a3c0212011a006614b0 (patch) | |
| tree | bbd6344b39c06597de4b47a2f8243a3b4154e450 /lib/i915 | |
| parent | 7e7e0c4ce267c40024012079c18168d47ae78eef (diff) | |
libs: Add rendercopy support for GEN11
This patch introduces a render copy shader for GEN11.
The plumbing is same as with GEN9, so we can reuse it, extracting the
common parts, and wrapping it in GEN-specific helpers.
v2: Added gen11 shader source path next to its binary form
Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
Cc: Michał Winiarski <michal.winiarski@intel.com>
Cc: Antonio Argenziano <antonio.argenziano@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Katarzyna Dec <katarzyna.dec@intel.com>
Reviewed-by: Katarzyna Dec <katarzyna.dec@intel.com>
Diffstat (limited to 'lib/i915')
| -rw-r--r-- | lib/i915/shaders/ps/blit.g11a | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/lib/i915/shaders/ps/blit.g11a b/lib/i915/shaders/ps/blit.g11a new file mode 100644 index 00000000..15fe78af --- /dev/null +++ b/lib/i915/shaders/ps/blit.g11a @@ -0,0 +1,22 @@ +/* This is the same shader as for previous gens. On Gen 11 instruction pln was deleted and needs to be replaced by mad. +This shader was generated using IGA tool (not assembler integrated into IGT) +*/ + +(W) mad(8|M0) acc0.0<1>:nf r6.7<0;0>:f r2.0<8;1>:f r6.0<0>:f +(W) mad(8|M0) r10.0<1>:f acc0.0<8;1>:nf r3.0<8;1>:f r6.1<0>:f + +(W) mad(8|M0) acc0.0<1>:nf r6.0<0;0>:f r4.0<8;1>:f r6.0<0>:f +(W) mad(8|M0) r11.0<1>:f acc0.0<8;1>:nf r5.0<8;1>:f r6.1<0>:f + +(W) mad(8|M0) acc0.0<1>:nf r6.4<0;0>:f r2.0<8;1>:f r6.4<0>:f +(W) mad(8|M0) r12.0<1>:f acc0.0<8;1>:nf r3.0<8;1>:f r6.5<0>:f + +(W) mad(8|M0) acc0.0<1>:nf r6.0<0;0>:f r4.0<8;1>:f r6.4<0>:f +(W) mad(8|M0) r13.0<1>:f acc0.0<8;1>:nf r5.0<8;1>:f r6.5<0>:f + +(W) send(16|M0) r112:f r10:ub 0x10000002 0x08840001 // SAMPLER wr:4, rd:8, fc: 0x40001 + mov (16|M0) r113.0<1>:f r12.0<8;8,1>:f + mov (16|M0) r115.0<1>:f r14.0<8;8,1>:f + mov (16|M0) r117.0<1>:f r16.0<8;8,1>:f + mov (16|M0) r119.0<1>:f r18.0<8;8,1>:f +(W) send(16|M0) null:f r112:ub 0x10000025 0x10031000 {EOT} // DP_RC wr:8, rd:0, Render Target Write msc:16, to #0 |