diff options
| author | Eryk Brol <eryk.brol@amd.com> | 2021-09-16 21:27:16 +0800 |
|---|---|---|
| committer | Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> | 2021-09-28 10:59:11 -0400 |
| commit | 18278534c085c35adcf62f158a8d5356e5496f8d (patch) | |
| tree | 77c08dfccd95a589316743ab56be3bef3bbf12e4 /lib/igt_amd.h | |
| parent | cc27789ea0a79b8d052c6728509ec8dd401da347 (diff) | |
tests/amdgpu: Add amd_link_settings test
[Why]
Having a test that iterates through different link
settings and performs link training with them is useful
and currently missing from IGT.
[How]
Add a link settings test and its required helper functions.
Signed-off-by: Stylon Wang <stylon.wang@amd.com>
Signed-off-by: Eryk Brol <eryk.brol@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Tested-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Diffstat (limited to 'lib/igt_amd.h')
| -rw-r--r-- | lib/igt_amd.h | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/lib/igt_amd.h b/lib/igt_amd.h index d333ad9c..e5bdbf33 100644 --- a/lib/igt_amd.h +++ b/lib/igt_amd.h @@ -27,8 +27,44 @@ #include "igt.h" #include "igt_fb.h" +#define DEBUGFS_DP_LINK_SETTINGS "link_settings" #define DEBUGFS_HPD_TRIGGER "trigger_hotplug" +enum dc_lane_count { + LANE_COUNT_UNKNOWN = 0, + LANE_COUNT_ONE = 1, + LANE_COUNT_TWO = 2, + LANE_COUNT_FOUR = 4, + LANE_COUNT_EIGHT = 8, + LANE_COUNT_DP_MAX = LANE_COUNT_FOUR +}; + +/* This is actually a reference clock (27MHz) multiplier + * 162MBps bandwidth for 1.62GHz like rate, + * 270MBps for 2.70GHz, + * 324MBps for 3.24Ghz, + * 540MBps for 5.40GHz + * 810MBps for 8.10GHz + */ +enum dc_link_rate { + LINK_RATE_UNKNOWN = 0, + LINK_RATE_LOW = 0x06, // Rate_1 (RBR) - 1.62 Gbps/Lane + LINK_RATE_RATE_2 = 0x08, // Rate_2 - 2.16 Gbps/Lane + LINK_RATE_RATE_3 = 0x09, // Rate_3 - 2.43 Gbps/Lane + LINK_RATE_HIGH = 0x0A, // Rate_4 (HBR) - 2.70 Gbps/Lane + LINK_RATE_RBR2 = 0x0C, // Rate_5 (RBR2)- 3.24 Gbps/Lane + LINK_RATE_RATE_6 = 0x10, // Rate_6 - 4.32 Gbps/Lane + LINK_RATE_HIGH2 = 0x14, // Rate_7 (HBR2)- 5.40 Gbps/Lane + LINK_RATE_HIGH3 = 0x1E // Rate_8 (HBR3)- 8.10 Gbps/Lane +}; + +enum dc_link_training_type { + LINK_TRAINING_DEFAULT = 0, + LINK_TRAINING_SLOW = 0, + LINK_TRAINING_FAST, + LINK_TRAINING_NO_PATTERN +}; + uint32_t igt_amd_create_bo(int fd, uint64_t size); void *igt_amd_mmap_bo(int fd, uint32_t handle, uint64_t size, int prot); unsigned int igt_amd_compute_offset(unsigned int* swizzle_pattern, @@ -48,4 +84,12 @@ bool igt_amd_is_tiled(uint64_t modifier); void igt_amd_require_hpd(igt_display_t *display, int drm_fd); int igt_amd_trigger_hotplug(int drm_fd, char *connector_name); +/* IGT link helper functions */ +void igt_amd_read_link_settings( + int drm_fd, char *connector_name, int *lane_count, int *link_rate, int *link_spread); +void igt_amd_write_link_settings( + int drm_fd, char *connector_name, enum dc_lane_count lane_count, + enum dc_link_rate link_rate, enum dc_link_training_type training_type); +bool igt_amd_output_has_link_settings(int drm_fd, char *connector_name); + #endif /* IGT_AMD_H */ |