diff options
author | Vanshidhar Konda <vanshidhar.r.konda@intel.com> | 2019-12-18 11:39:10 -0800 |
---|---|---|
committer | Imre Deak <imre.deak@intel.com> | 2020-02-13 10:20:45 +0200 |
commit | ca614f87196204fbd19b69e691360d8049eccfe0 (patch) | |
tree | 051767c3df20903a55ba44c2039ef2c6d1ee61fd /lib/igt_draw.c | |
parent | 0e249d67f661e07d6d23dfcca9120a2d5b93bdbe (diff) |
lib/igt_draw: Refactor get_tiling calls
Simplify the number of places from which gem_get_tiling method is called
and call it only if the device has support in hardware for tiling.
For consistency also fix up the gem_mmap__cpu() prot argument in
draw_rect_mmap_cpu(). Atm, gem_mmap__cpu() ignores this, however the
implementation of it may change, so make sure we pass the correct
protection flags.
v2:
- Use gem_available_fences() to check for HW detiling.
v3: (Matt)
- Fix docbook for draw_rect_render()
- Remove unused swizzle params from the blt/render draw funcs.
- Describe the gem_mmap__cpu() prot argument fix in the commit log.
Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Vanshidhar Konda <vanshidhar.r.konda@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Diffstat (limited to 'lib/igt_draw.c')
-rw-r--r-- | lib/igt_draw.c | 57 |
1 files changed, 28 insertions, 29 deletions
diff --git a/lib/igt_draw.c b/lib/igt_draw.c index 6950bc49..fa8ab562 100644 --- a/lib/igt_draw.c +++ b/lib/igt_draw.c @@ -333,20 +333,19 @@ static void draw_rect_ptr_tiled(void *ptr, uint32_t stride, uint32_t tiling, } static void draw_rect_mmap_cpu(int fd, struct buf_data *buf, struct rect *rect, - uint32_t color) + uint32_t tiling, uint32_t swizzle, uint32_t color) { uint32_t *ptr; - uint32_t tiling, swizzle; gem_set_domain(fd, buf->handle, I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU); - igt_require(gem_get_tiling(fd, buf->handle, &tiling, &swizzle)); /* We didn't implement suport for the older tiling methods yet. */ if (tiling != I915_TILING_NONE) igt_require(intel_gen(intel_get_drm_devid(fd)) >= 5); - ptr = gem_mmap__cpu(fd, buf->handle, 0, PAGE_ALIGN(buf->size), 0); + ptr = gem_mmap__cpu(fd, buf->handle, 0, PAGE_ALIGN(buf->size), + PROT_READ | PROT_WRITE); switch (tiling) { case I915_TILING_NONE: @@ -384,14 +383,12 @@ static void draw_rect_mmap_gtt(int fd, struct buf_data *buf, struct rect *rect, } static void draw_rect_mmap_wc(int fd, struct buf_data *buf, struct rect *rect, - uint32_t color) + uint32_t tiling, uint32_t swizzle, uint32_t color) { uint32_t *ptr; - uint32_t tiling, swizzle; gem_set_domain(fd, buf->handle, I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT); - igt_require(gem_get_tiling(fd, buf->handle, &tiling, &swizzle)); /* We didn't implement suport for the older tiling methods yet. */ if (tiling != I915_TILING_NONE) @@ -495,12 +492,9 @@ static void draw_rect_pwrite_tiled(int fd, struct buf_data *buf, } static void draw_rect_pwrite(int fd, struct buf_data *buf, - struct rect *rect, uint32_t color) + struct rect *rect, uint32_t tiling, + uint32_t swizzle, uint32_t color) { - uint32_t tiling, swizzle; - - igt_require(gem_get_tiling(fd, buf->handle, &tiling, &swizzle)); - switch (tiling) { case I915_TILING_NONE: draw_rect_pwrite_untiled(fd, buf, rect, color); @@ -517,18 +511,15 @@ static void draw_rect_pwrite(int fd, struct buf_data *buf, static void draw_rect_blt(int fd, struct cmd_data *cmd_data, struct buf_data *buf, struct rect *rect, - uint32_t color) + uint32_t tiling, uint32_t color) { drm_intel_bo *dst; struct intel_batchbuffer *batch; int blt_cmd_len, blt_cmd_tiling, blt_cmd_depth; uint32_t devid = intel_get_drm_devid(fd); int gen = intel_gen(devid); - uint32_t tiling, swizzle; int pitch; - igt_require(gem_get_tiling(fd, buf->handle, &tiling, &swizzle)); - dst = gem_handle_to_libdrm_bo(cmd_data->bufmgr, fd, "", buf->handle); igt_assert(dst); @@ -574,28 +565,25 @@ static void draw_rect_blt(int fd, struct cmd_data *cmd_data, static void draw_rect_render(int fd, struct cmd_data *cmd_data, struct buf_data *buf, struct rect *rect, - uint32_t color) + uint32_t tiling, uint32_t color) { drm_intel_bo *src, *dst; uint32_t devid = intel_get_drm_devid(fd); igt_render_copyfunc_t rendercopy = igt_get_render_copyfunc(devid); struct igt_buf src_buf = {}, dst_buf = {}; struct intel_batchbuffer *batch; - uint32_t tiling, swizzle; struct buf_data tmp; int pixel_size = buf->bpp / 8; igt_skip_on(!rendercopy); - igt_require(gem_get_tiling(fd, buf->handle, &tiling, &swizzle)); - /* We create a temporary buffer and copy from it using rendercopy. */ tmp.size = rect->w * rect->h * pixel_size; tmp.handle = gem_create(fd, tmp.size); tmp.stride = rect->w * pixel_size; tmp.bpp = buf->bpp; draw_rect_mmap_cpu(fd, &tmp, &(struct rect){0, 0, rect->w, rect->h}, - color); + I915_TILING_NONE, I915_BIT_6_SWIZZLE_NONE, color); src = gem_handle_to_libdrm_bo(cmd_data->bufmgr, fd, "", tmp.handle); igt_assert(src); @@ -634,6 +622,7 @@ static void draw_rect_render(int fd, struct cmd_data *cmd_data, * @buf_handle: the handle of the buffer where you're going to draw to * @buf_size: the size of the buffer * @buf_stride: the stride of the buffer + * @tiling: the tiling of the buffer * @method: method you're going to use to write to the buffer * @rect_x: horizontal position on the buffer where your rectangle starts * @rect_y: vertical position on the buffer where your rectangle starts @@ -647,9 +636,12 @@ static void draw_rect_render(int fd, struct cmd_data *cmd_data, */ void igt_draw_rect(int fd, drm_intel_bufmgr *bufmgr, drm_intel_context *context, uint32_t buf_handle, uint32_t buf_size, uint32_t buf_stride, - enum igt_draw_method method, int rect_x, int rect_y, - int rect_w, int rect_h, uint32_t color, int bpp) + uint32_t tiling, enum igt_draw_method method, + int rect_x, int rect_y, int rect_w, int rect_h, + uint32_t color, int bpp) { + uint32_t buf_tiling, swizzle; + struct cmd_data cmd_data = { .bufmgr = bufmgr, .context = context, @@ -667,24 +659,30 @@ void igt_draw_rect(int fd, drm_intel_bufmgr *bufmgr, drm_intel_context *context, .h = rect_h, }; + swizzle = I915_BIT_6_SWIZZLE_NONE; + if (tiling != I915_TILING_NONE && gem_available_fences(fd)) { + gem_get_tiling(fd, buf_handle, &buf_tiling, &swizzle); + igt_assert(tiling == buf_tiling); + } + switch (method) { case IGT_DRAW_MMAP_CPU: - draw_rect_mmap_cpu(fd, &buf, &rect, color); + draw_rect_mmap_cpu(fd, &buf, &rect, tiling, swizzle, color); break; case IGT_DRAW_MMAP_GTT: draw_rect_mmap_gtt(fd, &buf, &rect, color); break; case IGT_DRAW_MMAP_WC: - draw_rect_mmap_wc(fd, &buf, &rect, color); + draw_rect_mmap_wc(fd, &buf, &rect, tiling, swizzle, color); break; case IGT_DRAW_PWRITE: - draw_rect_pwrite(fd, &buf, &rect, color); + draw_rect_pwrite(fd, &buf, &rect, tiling, swizzle, color); break; case IGT_DRAW_BLT: - draw_rect_blt(fd, &cmd_data, &buf, &rect, color); + draw_rect_blt(fd, &cmd_data, &buf, &rect, tiling, color); break; case IGT_DRAW_RENDER: - draw_rect_render(fd, &cmd_data, &buf, &rect, color); + draw_rect_render(fd, &cmd_data, &buf, &rect, tiling, color); break; default: igt_assert(false); @@ -715,7 +713,8 @@ void igt_draw_rect_fb(int fd, drm_intel_bufmgr *bufmgr, int rect_w, int rect_h, uint32_t color) { igt_draw_rect(fd, bufmgr, context, fb->gem_handle, fb->size, fb->strides[0], - method, rect_x, rect_y, rect_w, rect_h, color, + igt_fb_mod_to_tiling(fb->modifier), method, + rect_x, rect_y, rect_w, rect_h, color, igt_drm_format_to_bpp(fb->drm_format)); } |