diff options
author | Tvrtko Ursulin <tvrtko.ursulin@intel.com> | 2017-09-18 09:06:19 +0100 |
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committer | Tvrtko Ursulin <tvrtko.ursulin@intel.com> | 2017-11-22 11:19:18 +0000 |
commit | 20d89b417e0bceb79cd80456838b1e91662d445e (patch) | |
tree | d0bd26e0a81949b0d0ffc0215412bad400833a76 /lib/igt_gt.h | |
parent | 273e66baef8bf930959c503041b68411bb42ff80 (diff) |
tests/perf_pmu: Tests for i915 PMU API
A bunch of tests for the new i915 PMU feature.
Parts of the code were initialy sketched by Dmitry Rogozhkin.
v2: (Most suggestions by Chris Wilson)
* Add new class/instance based engine list.
* Add gem_has_engine/gem_require_engine to work with class/instance.
* Use the above two throughout the test.
* Shorten tests to 100ms busy batches, seems enough.
* Add queued counter sanity checks.
* Use igt_nsec_elapsed.
* Skip on perf -ENODEV in some tests instead of embedding knowledge locally.
* Fix multi ordering for busy accounting.
* Use new guranteed_usleep when sleep time is asserted on.
* Check for no queued when idle/busy.
* Add queued counter init test.
* Add queued tests.
* Consolidate and increase multiple busy engines tests to most-busy and
all-busy tests.
* Guarantte interrupts by using fences.
* Test RC6 via forcewake.
v3:
* Tweak assert in interrupts subtest.
* Sprinkle of comments.
* Fix multi-client test which got broken in v2.
v4:
* Measured instead of guaranteed sleep.
* Missing sync in no_sema.
* Log busyness before asserts for debug.
* access(2) instead of open(2) to determine if cpu0 is hotpluggable.
* Test frequency reporting via min/max setting instead assuming.
^^ All above suggested by Chris Wilson. ^^
* Drop queued subtests to match i915.
* Use long batches with fences to ensure interrupts.
* Test render node as well.
v5:
* Add to meson build. (Petri Latvala)
* Use 1eN constants. (Chris Wilson)
* Add tests for semaphore and event waiting.
v6:
* Fix interrupts subtest by polling the fence from the "outside".
(Chris Wilson)
v7:
* Assert number of initialized engines matches the expectation.
(Chris Wilson)
* Warn instead of skipping if we couldn't restore the initial
frequency. (Chris Wilson)
* Move all asserts to after the test cleanup (just a tidy).
* More 1eN notation for timeouts.
* Bump the tolerance to 5% since I saw a few noisy runs with
sampling counters.
* Always start the PMU before submitting batches to lower
reliance on i915 doing the delayed engine busy stats disable.
v8:
* Update for upstream engine class enum.
v9:
* Add meson build support.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Dmitry Rogozhkin <dmitry.v.rogozhkin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'lib/igt_gt.h')
-rw-r--r-- | lib/igt_gt.h | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/lib/igt_gt.h b/lib/igt_gt.h index 2579cbd3..48ed48af 100644 --- a/lib/igt_gt.h +++ b/lib/igt_gt.h @@ -25,6 +25,7 @@ #define IGT_GT_H #include "igt_debugfs.h" +#include "igt_core.h" void igt_require_hang_ring(int fd, int ring); @@ -80,4 +81,41 @@ extern const struct intel_execution_engine { bool gem_can_store_dword(int fd, unsigned int engine); +extern const struct intel_execution_engine2 { + const char *name; + int class; + int instance; +} intel_execution_engines2[]; + +#define for_each_engine_class_instance(fd__, e__) \ + for ((e__) = intel_execution_engines2;\ + (e__)->name; \ + (e__)++) + +enum drm_i915_gem_engine_class { + I915_ENGINE_CLASS_RENDER = 0, + I915_ENGINE_CLASS_COPY = 1, + I915_ENGINE_CLASS_VIDEO = 2, + I915_ENGINE_CLASS_VIDEO_ENHANCE = 3, + + I915_ENGINE_CLASS_INVALID = -1 +}; + +unsigned int +gem_class_instance_to_eb_flags(int gem_fd, + enum drm_i915_gem_engine_class class, + unsigned int instance); + +bool gem_has_engine(int gem_fd, + enum drm_i915_gem_engine_class class, + unsigned int instance); + +static inline +void gem_require_engine(int gem_fd, + enum drm_i915_gem_engine_class class, + unsigned int instance) +{ + igt_require(gem_has_engine(gem_fd, class, instance)); +} + #endif /* IGT_GT_H */ |