diff options
author | Eric Anholt <eric@anholt.net> | 2010-03-24 11:40:07 -0700 |
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committer | Eric Anholt <eric@anholt.net> | 2010-03-24 12:01:38 -0700 |
commit | b0ddd0688cccd41a4661a00bfd897a63f9a11279 (patch) | |
tree | 8781200bf3f92b0afc0f290f8aac0343db4faaca /lib/instdone.c | |
parent | 7c9d69de5722fe492c3e06ec94d1c26013df2861 (diff) |
Add Ironlake INSTDONE bits.
Diffstat (limited to 'lib/instdone.c')
-rw-r--r-- | lib/instdone.c | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/lib/instdone.c b/lib/instdone.c index bbb72b32..05429b4b 100644 --- a/lib/instdone.c +++ b/lib/instdone.c @@ -141,6 +141,38 @@ init_instdone_definitions(void) gen6_instdone2_bit(GEN6_GS_DONE, "GS"); gen6_instdone2_bit(GEN6_VS0_DONE, "VS0"); gen6_instdone2_bit(GEN6_VF_DONE, "VF"); + } else if (IS_IRONLAKE(devid)) { + gen4_instdone_bit(ILK_ROW_0_EU_0_DONE, "Row 0, EU 0"); + gen4_instdone_bit(ILK_ROW_0_EU_1_DONE, "Row 0, EU 1"); + gen4_instdone_bit(ILK_ROW_0_EU_2_DONE, "Row 0, EU 2"); + gen4_instdone_bit(ILK_ROW_0_EU_3_DONE, "Row 0, EU 3"); + gen4_instdone_bit(ILK_ROW_1_EU_0_DONE, "Row 1, EU 0"); + gen4_instdone_bit(ILK_ROW_1_EU_1_DONE, "Row 1, EU 1"); + gen4_instdone_bit(ILK_ROW_1_EU_2_DONE, "Row 1, EU 2"); + gen4_instdone_bit(ILK_ROW_1_EU_3_DONE, "Row 1, EU 3"); + gen4_instdone_bit(ILK_ROW_2_EU_0_DONE, "Row 2, EU 0"); + gen4_instdone_bit(ILK_ROW_2_EU_1_DONE, "Row 2, EU 1"); + gen4_instdone_bit(ILK_ROW_2_EU_2_DONE, "Row 2, EU 2"); + gen4_instdone_bit(ILK_ROW_2_EU_3_DONE, "Row 2, EU 3"); + gen4_instdone_bit(ILK_VCP_DONE, "VCP"); + gen4_instdone_bit(ILK_ROW_0_MATH_DONE, "Row 0 math"); + gen4_instdone_bit(ILK_ROW_1_MATH_DONE, "Row 1 math"); + gen4_instdone_bit(ILK_ROW_2_MATH_DONE, "Row 2 math"); + gen4_instdone_bit(ILK_VC1_DONE, "VC1"); + gen4_instdone_bit(ILK_ROW_0_MA_DONE, "Row 0 MA"); + gen4_instdone_bit(ILK_ROW_1_MA_DONE, "Row 1 MA"); + gen4_instdone_bit(ILK_ROW_2_MA_DONE, "Row 2 MA"); + gen4_instdone_bit(ILK_ROW_0_ISC_DONE, "Row 0 ISC"); + gen4_instdone_bit(ILK_ROW_1_ISC_DONE, "Row 1 ISC"); + gen4_instdone_bit(ILK_ROW_2_ISC_DONE, "Row 2 ISC"); + gen4_instdone_bit(ILK_VFE_DONE, "VFE"); + gen4_instdone_bit(ILK_TD_DONE, "TD"); + gen4_instdone_bit(ILK_SVTS_DONE, "SVTS"); + gen4_instdone_bit(ILK_TS_DONE, "TS"); + gen4_instdone_bit(ILK_GW_DONE, "GW"); + gen4_instdone_bit(ILK_AI_DONE, "AI"); + gen4_instdone_bit(ILK_AC_DONE, "AC"); + gen4_instdone_bit(ILK_AM_DONE, "AM"); } else if (IS_965(devid)) { gen4_instdone_bit(I965_ROW_0_EU_0_DONE, "Row 0, EU 0"); gen4_instdone_bit(I965_ROW_0_EU_1_DONE, "Row 0, EU 1"); |