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author | Lionel Landwerlin <lionel.g.landwerlin@intel.com> | 2020-08-25 14:45:52 +0300 |
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committer | Lionel Landwerlin <lionel.g.landwerlin@intel.com> | 2020-09-03 19:07:55 +0300 |
commit | 0385b5258fddc324435b123283b46e528fbbf33b (patch) | |
tree | a30abe2d5dbe98b7d86434f5f8590d8c065ed66d /lib/meson.build | |
parent | 5b6c8235240514a33cdfa3ccd0f1a05a72a3f4a8 (diff) |
pciids/i915: break TGL into GT1/2
Align with kernel commit:
d452bd091e168f ("drm/i915: break TGL pci-ids in GT 1 & 2")
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Diffstat (limited to 'lib/meson.build')
0 files changed, 0 insertions, 0 deletions