diff options
author | Imre Deak <imre.deak@intel.com> | 2019-12-29 20:25:43 +0200 |
---|---|---|
committer | Imre Deak <imre.deak@intel.com> | 2019-12-31 14:44:07 +0200 |
commit | 7ff35cc1d0b3896b72ac6b1b223d84383549f7b9 (patch) | |
tree | d1d9d290ce7f32eb228a71cbcead4f07434d3f9c /lib/rendercopy_gen6.c | |
parent | 86d7c631bcc7b0f4e4683cb753ad2eafc170a7da (diff) |
lib/igt_buf: Extend igt_buf to include two color surfaces
UV FBs have two color surfaces so extend the igt_buf struct accordingly
to support blitting such FBs.
The patch is produced with the coccinelle patch below.
No functional changes.
@@
@@
struct igt_buf {
...
- uint32_t stride;
...
- uint32_t size;
+ struct {
+ uint32_t stride;
+ uint32_t size;
+ } surface[2];
...
};
@@
struct igt_buf b;
@@
<...
(
- b.stride
+ b.surface[0].stride
|
- b.size
+ b.surface[0].size
)
...>
@@
struct igt_buf *b;
@@
<...
(
- b->size
+ b->surface[0].size
|
- b->stride
+ b->surface[0].stride
)
...>
@@
identifier I;
expression E1;
expression E2;
@@
(
struct igt_buf I = {
- .size = E1,
- .stride = E2,
+ .surface[0] = {
+ .size = E1,
+ .stride = E2,
+ },
};
|
struct igt_buf I = {
- .size = E1,
+ .surface[0] = {
+ .size = E1,
+ },
};
|
struct igt_buf I = {
- .stride = E1,
+ .surface[0] = {
+ .stride = E1,
+ },
};
)
v2:
- Rebase on latest upstream. (Mika)
Cc: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Diffstat (limited to 'lib/rendercopy_gen6.c')
-rw-r--r-- | lib/rendercopy_gen6.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/rendercopy_gen6.c b/lib/rendercopy_gen6.c index 83c7d694..87034774 100644 --- a/lib/rendercopy_gen6.c +++ b/lib/rendercopy_gen6.c @@ -79,7 +79,7 @@ gen6_bind_buf(struct intel_batchbuffer *batch, const struct igt_buf *buf, uint32_t write_domain, read_domain; int ret; - igt_assert_lte(buf->stride, 128*1024); + igt_assert_lte(buf->surface[0].stride, 128*1024); igt_assert_lte(igt_buf_width(buf), 8192); igt_assert_lte(igt_buf_height(buf), 8192); @@ -113,7 +113,7 @@ gen6_bind_buf(struct intel_batchbuffer *batch, const struct igt_buf *buf, ss->ss2.height = igt_buf_height(buf) - 1; ss->ss2.width = igt_buf_width(buf) - 1; - ss->ss3.pitch = buf->stride - 1; + ss->ss3.pitch = buf->surface[0].stride - 1; ss->ss3.tiled_surface = buf->tiling != I915_TILING_NONE; ss->ss3.tile_walk = buf->tiling == I915_TILING_Y; |