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authorImre Deak <imre.deak@intel.com>2019-12-29 20:25:43 +0200
committerImre Deak <imre.deak@intel.com>2019-12-31 14:44:07 +0200
commit7ff35cc1d0b3896b72ac6b1b223d84383549f7b9 (patch)
treed1d9d290ce7f32eb228a71cbcead4f07434d3f9c /lib/rendercopy_i830.c
parent86d7c631bcc7b0f4e4683cb753ad2eafc170a7da (diff)
lib/igt_buf: Extend igt_buf to include two color surfaces
UV FBs have two color surfaces so extend the igt_buf struct accordingly to support blitting such FBs. The patch is produced with the coccinelle patch below. No functional changes. @@ @@ struct igt_buf { ... - uint32_t stride; ... - uint32_t size; + struct { + uint32_t stride; + uint32_t size; + } surface[2]; ... }; @@ struct igt_buf b; @@ <... ( - b.stride + b.surface[0].stride | - b.size + b.surface[0].size ) ...> @@ struct igt_buf *b; @@ <... ( - b->size + b->surface[0].size | - b->stride + b->surface[0].stride ) ...> @@ identifier I; expression E1; expression E2; @@ ( struct igt_buf I = { - .size = E1, - .stride = E2, + .surface[0] = { + .size = E1, + .stride = E2, + }, }; | struct igt_buf I = { - .size = E1, + .surface[0] = { + .size = E1, + }, }; | struct igt_buf I = { - .stride = E1, + .surface[0] = { + .stride = E1, + }, }; ) v2: - Rebase on latest upstream. (Mika) Cc: Mika Kahola <mika.kahola@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Diffstat (limited to 'lib/rendercopy_i830.c')
-rw-r--r--lib/rendercopy_i830.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/lib/rendercopy_i830.c b/lib/rendercopy_i830.c
index e8c04718..ca815122 100644
--- a/lib/rendercopy_i830.c
+++ b/lib/rendercopy_i830.c
@@ -138,7 +138,7 @@ static void gen2_emit_target(struct intel_batchbuffer *batch,
uint32_t tiling;
uint32_t format;
- igt_assert_lte(dst->stride, 8192);
+ igt_assert_lte(dst->surface[0].stride, 8192);
igt_assert_lte(igt_buf_width(dst), 2048);
igt_assert_lte(igt_buf_height(dst), 2048);
@@ -156,7 +156,7 @@ static void gen2_emit_target(struct intel_batchbuffer *batch,
tiling |= BUF_3D_TILE_WALK_Y;
OUT_BATCH(_3DSTATE_BUF_INFO_CMD);
- OUT_BATCH(BUF_3D_ID_COLOR_BACK | tiling | BUF_3D_PITCH(dst->stride));
+ OUT_BATCH(BUF_3D_ID_COLOR_BACK | tiling | BUF_3D_PITCH(dst->surface[0].stride));
OUT_RELOC(dst->bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
OUT_BATCH(_3DSTATE_DST_BUF_VARS_CMD);
@@ -179,7 +179,7 @@ static void gen2_emit_texture(struct intel_batchbuffer *batch,
uint32_t tiling;
uint32_t format;
- igt_assert_lte(src->stride, 8192);
+ igt_assert_lte(src->surface[0].stride, 8192);
igt_assert_lte(igt_buf_width(src), 2048);
igt_assert_lte(igt_buf_height(src), 2048);
@@ -201,7 +201,7 @@ static void gen2_emit_texture(struct intel_batchbuffer *batch,
OUT_BATCH((igt_buf_height(src) - 1) << TM0S1_HEIGHT_SHIFT |
(igt_buf_width(src) - 1) << TM0S1_WIDTH_SHIFT |
format | tiling);
- OUT_BATCH((src->stride / 4 - 1) << TM0S2_PITCH_SHIFT | TM0S2_MAP_2D);
+ OUT_BATCH((src->surface[0].stride / 4 - 1) << TM0S2_PITCH_SHIFT | TM0S2_MAP_2D);
OUT_BATCH(FILTER_NEAREST << TM0S3_MAG_FILTER_SHIFT |
FILTER_NEAREST << TM0S3_MIN_FILTER_SHIFT |
MIPFILTER_NONE << TM0S3_MIP_FILTER_SHIFT);