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author | Chris Wilson <chris.p.wilson@intel.com> | 2022-07-06 14:01:43 +0200 |
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committer | Matthew Auld <matthew.auld@intel.com> | 2022-07-07 09:19:40 +0100 |
commit | 7b14364f973e376bda2197af41b2be082bdb7bc5 (patch) | |
tree | 2cd87386e4eeaa1ef824c517c5745d7df7129ee9 /meson.sh | |
parent | 671332047e6e9d110c53f3e4511d1c243fe849bf (diff) |
i915/gem_exec_fence: Support dg2+ batch predication
On dg2+, MI_BATCH_BUFFER_START | MI_USE_PREDICATE switches to using the
MI_SET_PREDICATE_RESULT register and requires bit 0 to be set to skip
the looping MI_BATCH_BUFFER_START.
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/5463
Reviewed-by: Zbigniew KempczyĆski <zbigniew.kempczynski@intel.com>
Signed-off-by: Chris Wilson <chris.p.wilson@intel.com>
Signed-off-by: Nirmoy Das <nirmoy.das@intel.com>
Diffstat (limited to 'meson.sh')
0 files changed, 0 insertions, 0 deletions