diff options
author | Chris Wilson <chris@chris-wilson.co.uk> | 2016-08-22 19:18:37 +0100 |
---|---|---|
committer | Chris Wilson <chris@chris-wilson.co.uk> | 2016-08-22 20:56:01 +0100 |
commit | f749a2d6881d44f5580349cfb6821b3a68aae135 (patch) | |
tree | 08007f68f5c48d3c67c58425e95487415ad9cd59 /tests/gem_busy.c | |
parent | cb42b0d0789f86a214b821bc171979e082952649 (diff) |
igt/gem_busy: Test flipping on a still active buffer
Flips should wait until all rendering is complete to a framebuffer
before applying.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'tests/gem_busy.c')
-rw-r--r-- | tests/gem_busy.c | 239 |
1 files changed, 239 insertions, 0 deletions
diff --git a/tests/gem_busy.c b/tests/gem_busy.c index 22d38793..1a6a5405 100644 --- a/tests/gem_busy.c +++ b/tests/gem_busy.c @@ -24,6 +24,10 @@ #include "igt.h" #include "igt_rand.h" +#include <sys/poll.h> +#include <signal.h> +#include <time.h> + #define LOCAL_EXEC_NO_RELOC (1<<11) /* Exercise the busy-ioctl, ensuring the ABI is never broken */ @@ -460,6 +464,207 @@ static bool has_semaphores(int fd) return val > 0; } +static igt_output_t * +set_fb_on_crtc(igt_display_t *dpy, int pipe, struct igt_fb *fb) +{ + igt_output_t *output; + + for_each_valid_output_on_pipe(dpy, pipe, output) { + drmModeModeInfoPtr mode; + igt_plane_t *primary; + + if (output->pending_crtc_idx_mask) + continue; + + igt_output_set_pipe(output, pipe); + mode = igt_output_get_mode(output); + + igt_create_pattern_fb(dpy->drm_fd, + mode->hdisplay, mode->vdisplay, + DRM_FORMAT_XRGB8888, + LOCAL_I915_FORMAT_MOD_X_TILED, + fb); + + primary = igt_output_get_plane(output, IGT_PLANE_PRIMARY); + igt_plane_set_fb(primary, fb); + + return output; + } + + return NULL; +} + +static void do_cleanup_display(igt_display_t *dpy) +{ + enum pipe pipe; + igt_output_t *output; + igt_plane_t *plane; + + for_each_pipe(dpy, pipe) + for_each_plane_on_pipe(dpy, pipe, plane) + igt_plane_set_fb(plane, NULL); + + for_each_connected_output(dpy, output) + igt_output_set_pipe(output, PIPE_NONE); + + igt_display_commit2(dpy, dpy->is_atomic ? COMMIT_ATOMIC : COMMIT_LEGACY); +} + +static uint32_t * +make_fb_busy(igt_display_t *dpy, unsigned ring, const struct igt_fb *fb) +{ + const int gen = intel_gen(intel_get_drm_devid(dpy->drm_fd)); + struct drm_i915_gem_exec_object2 obj[2]; +#define SCRATCH 0 +#define BATCH 1 + struct drm_i915_gem_relocation_entry reloc[2]; + struct drm_i915_gem_execbuffer2 execbuf; + uint32_t *batch; + int i; + + memset(&execbuf, 0, sizeof(execbuf)); + execbuf.buffers_ptr = (uintptr_t)obj; + execbuf.buffer_count = 2; + execbuf.flags = ring; + + memset(obj, 0, sizeof(obj)); + obj[SCRATCH].handle = fb->gem_handle; + + obj[BATCH].handle = gem_create(dpy->drm_fd, 4096); + obj[BATCH].relocs_ptr = (uintptr_t)reloc; + obj[BATCH].relocation_count = 2; + memset(reloc, 0, sizeof(reloc)); + reloc[0].target_handle = obj[BATCH].handle; /* recurse */ + reloc[0].presumed_offset = 0; + reloc[0].offset = sizeof(uint32_t); + reloc[0].delta = 0; + reloc[0].read_domains = I915_GEM_DOMAIN_COMMAND; + reloc[0].write_domain = 0; + + batch = gem_mmap__wc(dpy->drm_fd, + obj[BATCH].handle, 0, 4096, PROT_WRITE); + gem_set_domain(dpy->drm_fd, obj[BATCH].handle, + I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT); + + batch[i = 0] = MI_BATCH_BUFFER_START; + if (gen >= 8) { + batch[i] |= 1 << 8 | 1; + batch[++i] = 0; + batch[++i] = 0; + } else if (gen >= 6) { + batch[i] |= 1 << 8; + batch[++i] = 0; + } else { + batch[i] |= 2 << 6; + batch[++i] = 0; + if (gen < 4) { + batch[i] |= 1; + reloc[0].delta = 1; + } + } + + /* dummy write to fb */ + reloc[1].target_handle = obj[SCRATCH].handle; + reloc[1].presumed_offset = 0; + reloc[1].offset = 1024; + reloc[1].delta = 0; + reloc[1].read_domains = I915_GEM_DOMAIN_RENDER; + reloc[1].write_domain = I915_GEM_DOMAIN_RENDER; + + gem_execbuf(dpy->drm_fd, &execbuf); + gem_close(dpy->drm_fd, obj[BATCH].handle); + + return batch; +} + +static void finish_fb_busy(uint32_t *batch, int msecs) +{ + struct timespec tv = { 0, msecs * 1000 * 1000 }; + nanosleep(&tv, NULL); + batch[0] = MI_BATCH_BUFFER_END; + __sync_synchronize(); + munmap(batch, 4096); +} + +static void sighandler(int sig) +{ +} + +static void test_flip(igt_display_t *dpy, unsigned ring, int pipe) +{ + struct igt_fb fb[2]; + struct pollfd pfd = { .fd = dpy->drm_fd, .events = POLLIN }; + struct timespec tv = { 1, 0 }; + int warmup[] = { 0, 1, 0, -1 }; + struct drm_event_vblank ev; + uint32_t *batch; + + signal(SIGALRM, sighandler); + + igt_require(set_fb_on_crtc(dpy, pipe, &fb[0])); + igt_display_commit2(dpy, COMMIT_LEGACY); + + igt_create_pattern_fb(dpy->drm_fd, + fb[0].width, fb[0].height, + DRM_FORMAT_XRGB8888, + LOCAL_I915_FORMAT_MOD_X_TILED, + &fb[1]); + + /* Bind both fb to the display (such that they are ready for future + * flips without stalling for the bind) leaving fb[0] as bound. + */ + for (int i = 0; warmup[i] != -1; i++) { + do_or_die(drmModePageFlip(dpy->drm_fd, + dpy->pipes[pipe].crtc_id, + fb[warmup[i]].fb_id, + DRM_MODE_PAGE_FLIP_EVENT, + &fb[warmup[i]])); + igt_assert(read(dpy->drm_fd, &ev, sizeof(ev)) == sizeof(ev)); + } + + /* Make the frontbuffer busy and try to flip to itself */ + batch = make_fb_busy(dpy, ring, &fb[0]); + igt_fork(child, 1) { + igt_assert(gem_bo_busy(dpy->drm_fd, fb[0].gem_handle)); + do_or_die(drmModePageFlip(dpy->drm_fd, + dpy->pipes[pipe].crtc_id, fb[0].fb_id, + DRM_MODE_PAGE_FLIP_EVENT, &fb[0])); + kill(getppid(), SIGALRM); + igt_assert_f(poll(&pfd, 1, 100) == 0, + "flip completed whilst fb[0] was busy\n"); + } + igt_assert_f(nanosleep(&tv, NULL) == -1, + "flip to fb[0] blocked waiting for busy fb"); + finish_fb_busy(batch, 200); + igt_waitchildren(); + igt_assert(read(dpy->drm_fd, &ev, sizeof(ev)) == sizeof(ev)); + igt_assert(poll(&pfd, 1, 0) == 0); + + /* Repeat for flip to second buffer */ + batch = make_fb_busy(dpy, ring, &fb[1]); + igt_fork(child, 1) { + igt_assert(gem_bo_busy(dpy->drm_fd, fb[1].gem_handle)); + do_or_die(drmModePageFlip(dpy->drm_fd, + dpy->pipes[pipe].crtc_id, fb[1].fb_id, + DRM_MODE_PAGE_FLIP_EVENT, &fb[1])); + kill(getppid(), SIGALRM); + igt_assert_f(poll(&pfd, 1, 100) == 0, + "flip completed whilst fb[1] was busy\n"); + } + igt_assert_f(nanosleep(&tv, NULL) == -1, + "flip to fb[1] blocked waiting for busy fb"); + finish_fb_busy(batch, 200); + igt_waitchildren(); + igt_assert(read(dpy->drm_fd, &ev, sizeof(ev)) == sizeof(ev)); + igt_assert(poll(&pfd, 1, 0) == 0); + + do_cleanup_display(dpy); + igt_remove_fb(dpy->drm_fd, &fb[1]); + igt_remove_fb(dpy->drm_fd, &fb[0]); + + signal(SIGALRM, SIG_DFL); +} + igt_main { const struct intel_execution_engine *e; @@ -565,6 +770,40 @@ igt_main } } + igt_subtest_group { + igt_display_t display = { .drm_fd = -1 }; + + igt_fixture { + gem_require_mmap_wc(fd); + + kmstest_set_vt_graphics_mode(); + igt_display_init(&display, fd); + igt_require(display.n_pipes > 0); + } + + for (int n = 0; n < I915_MAX_PIPES; n++) { + errno = 0; + + igt_fixture { + igt_skip_on(n >= display.n_pipes); + } + + for (e = intel_execution_engines; e->name; e++) { + if (!gem_has_ring(fd, e->exec_id | e->flags)) + continue; + + igt_subtest_f("%sflip-%s-%s", + e->exec_id == 0 ? "basic-" : "", + e->name, kmstest_pipe_name(n)) + test_flip(&display, e->exec_id | e->flags, n); + } + } + + igt_fixture { + igt_display_fini(&display); + } + } + igt_fixture { close(fd); } |