summaryrefslogtreecommitdiff
path: root/tests/i915/gem_exec_reloc.c
diff options
context:
space:
mode:
authorChris Wilson <chris@chris-wilson.co.uk>2019-11-13 22:47:40 +0000
committerChris Wilson <chris@chris-wilson.co.uk>2019-11-14 23:15:19 +0000
commit5343ca6ad8fac39fe4d468f771af72c968404bea (patch)
treec78aa5dd70df8779581195fa0cc39c82203b1412 /tests/i915/gem_exec_reloc.c
parentd5d49cb92efc0e81512424f588990805745dfbd5 (diff)
i915/gem_exec_reloc: Check that relocations do not block
With GPU relocations we avoid blocking inside execbuf and prevent priority inversions where a low priority client can cause a denial of service to higher priority clients. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> Acked-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Diffstat (limited to 'tests/i915/gem_exec_reloc.c')
-rw-r--r--tests/i915/gem_exec_reloc.c49
1 files changed, 47 insertions, 2 deletions
diff --git a/tests/i915/gem_exec_reloc.c b/tests/i915/gem_exec_reloc.c
index 5f59fe99..7664d03d 100644
--- a/tests/i915/gem_exec_reloc.c
+++ b/tests/i915/gem_exec_reloc.c
@@ -324,6 +324,49 @@ static void active(int fd, unsigned engine)
gem_close(fd, obj[0].handle);
}
+static unsigned int offset_in_page(void *addr)
+{
+ return (uintptr_t)addr & 4095;
+}
+
+static void active_spin(int fd, unsigned engine)
+{
+ const uint32_t bbe = MI_BATCH_BUFFER_END;
+ struct drm_i915_gem_relocation_entry reloc;
+ struct drm_i915_gem_exec_object2 obj[2];
+ struct drm_i915_gem_execbuffer2 execbuf;
+ igt_spin_t *spin;
+
+ spin = igt_spin_new(fd, .engine = engine);
+
+ memset(obj, 0, sizeof(obj));
+ obj[0] = spin->obj[IGT_SPIN_BATCH];
+ obj[0].relocs_ptr = to_user_pointer(&reloc);
+ obj[0].relocation_count = 1;
+ obj[1].handle = gem_create(fd, 4096);
+ gem_write(fd, obj[1].handle, 0, &bbe, sizeof(bbe));
+
+ memset(&reloc, 0, sizeof(reloc));
+ reloc.presumed_offset = -1;
+ reloc.offset = offset_in_page(spin->condition);
+ reloc.target_handle = obj[0].handle;
+
+ memset(&execbuf, 0, sizeof(execbuf));
+ execbuf.buffers_ptr = to_user_pointer(obj);
+ execbuf.buffer_count = 2;
+ execbuf.flags = engine;
+
+ gem_execbuf(fd, &execbuf);
+ gem_close(fd, obj[1].handle);
+ igt_assert_eq(*spin->condition, spin->cmd_precondition);
+
+ igt_spin_end(spin);
+ gem_sync(fd, spin->handle);
+
+ igt_assert_eq(*spin->condition, obj[0].offset);
+ igt_spin_free(fd, spin);
+}
+
static bool has_64b_reloc(int fd)
{
return intel_gen(intel_get_drm_devid(fd)) >= 8;
@@ -749,12 +792,14 @@ igt_main
igt_subtest("gpu")
from_gpu(fd);
- igt_subtest("active")
+ igt_subtest("basic-active")
active(fd, ALL_ENGINES);
for (const struct intel_execution_engine *e = intel_execution_engines;
e->name; e++) {
- igt_subtest_f("active-%s", e->name)
+ igt_subtest_f("basic-active-%s", e->name)
active(fd, eb_ring(e));
+ igt_subtest_f("basic-spin-%s", e->name)
+ active_spin(fd, eb_ring(e));
}
igt_fixture
close(fd);