diff options
author | Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> | 2020-09-11 10:07:42 +0200 |
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committer | Chris Wilson <chris@chris-wilson.co.uk> | 2020-09-16 14:51:23 +0100 |
commit | 1ad6c01258da94e948bdf02e963dd091fefeb8cc (patch) | |
tree | e7f95e1fef6286c002c4fd6c5408a76ebaf4aaab /tests/i915/gem_read_read_speed.c | |
parent | 2c67f3e603e688fa03ec182a48b8956d6d35c393 (diff) |
tests/gem_read_read_speed: remove libdrm dependency
Use intel_bb / intel_buf to remove libdrm dependency.
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Dominik Grzegorzek <dominik.grzegorzek@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'tests/i915/gem_read_read_speed.c')
-rw-r--r-- | tests/i915/gem_read_read_speed.c | 161 |
1 files changed, 82 insertions, 79 deletions
diff --git a/tests/i915/gem_read_read_speed.c b/tests/i915/gem_read_read_speed.c index 06b66935..40494566 100644 --- a/tests/i915/gem_read_read_speed.c +++ b/tests/i915/gem_read_read_speed.c @@ -42,70 +42,63 @@ #include "i915/gem.h" #include "igt.h" #include "igt_sysfs.h" -#include "intel_bufmgr.h" IGT_TEST_DESCRIPTION("Test speed of concurrent reads between engines."); +#define BBSIZE 4096 igt_render_copyfunc_t rendercopy; -struct intel_batchbuffer *batch; int width, height; -static drm_intel_bo *rcs_copy_bo(drm_intel_bo *dst, drm_intel_bo *src) +static void set_to_gtt_domain(struct intel_buf *buf, int writing) { - struct igt_buf d = { - .bo = dst, - .num_tiles = width * height * 4, - .surface[0] = { - .size = width * height * 4, .stride = width * 4, - }, - .bpp = 32, - }, s = { - .bo = src, - .num_tiles = width * height * 4, - .surface[0] = { - .size = width * height * 4, .stride = width * 4, - }, - .bpp = 32, - }; - uint32_t swizzle; - drm_intel_bo *bo = batch->bo; - drm_intel_bo_reference(bo); - - drm_intel_bo_get_tiling(dst, &d.tiling, &swizzle); - drm_intel_bo_get_tiling(src, &s.tiling, &swizzle); - - rendercopy(batch, NULL, - &s, 0, 0, + int i915 = buf_ops_get_fd(buf->bops); + + gem_set_domain(i915, buf->handle, I915_GEM_DOMAIN_GTT, + writing ? I915_GEM_DOMAIN_GTT : 0); +} + +static struct intel_bb *rcs_copy_bo(struct intel_buf *dst, + struct intel_buf *src) +{ + int i915 = buf_ops_get_fd(dst->bops); + struct intel_bb *ibb = intel_bb_create(i915, BBSIZE); + + /* enforce batch won't be recreated after execution */ + intel_bb_ref(ibb); + + rendercopy(ibb, 0, + src, 0, 0, width, height, - &d, 0, 0); + dst, 0, 0); - return bo; + return ibb; } -static drm_intel_bo *bcs_copy_bo(drm_intel_bo *dst, drm_intel_bo *src) +static struct intel_bb *bcs_copy_bo(struct intel_buf *dst, + struct intel_buf *src) { - drm_intel_bo *bo = batch->bo; - drm_intel_bo_reference(bo); + int i915 = buf_ops_get_fd(dst->bops); + struct intel_bb *ibb = intel_bb_create(i915, BBSIZE); - intel_blt_copy(batch, - src, 0, 0, 4*width, - dst, 0, 0, 4*width, - width, height, 32); + intel_bb_ref(ibb); - return bo; + intel_bb_blt_copy(ibb, + src, 0, 0, 4*width, + dst, 0, 0, 4*width, + width, height, 32); + + return ibb; } -static void -set_bo(drm_intel_bo *bo, uint32_t val) +static void set_bo(struct intel_buf *buf, uint32_t val) { int size = width * height; uint32_t *vaddr; - do_or_die(drm_intel_bo_map(bo, 1)); - vaddr = bo->virtual; + vaddr = intel_buf_device_map(buf, true); while (size--) *vaddr++ = val; - drm_intel_bo_unmap(bo); + intel_buf_unmap(buf); } static double elapsed(const struct timespec *start, @@ -115,54 +108,59 @@ static double elapsed(const struct timespec *start, return (1e6*(end->tv_sec - start->tv_sec) + (end->tv_nsec - start->tv_nsec)/1000)/loop; } -static drm_intel_bo *create_bo(drm_intel_bufmgr *bufmgr, - const char *name) +static struct intel_buf *create_bo(struct buf_ops *bops, const char *name) { uint32_t tiling_mode = I915_TILING_X; - unsigned long pitch; - return drm_intel_bo_alloc_tiled(bufmgr, name, - width, height, 4, - &tiling_mode, &pitch, 0); + struct intel_buf *buf; + + buf = intel_buf_create(bops, width, height, 32, 0, tiling_mode, + I915_COMPRESSION_NONE); + intel_buf_set_name(buf, name); + + return buf; } -static void run(drm_intel_bufmgr *bufmgr, int _width, int _height, +static void run(struct buf_ops *bops, int _width, int _height, bool write_bcs, bool write_rcs) { - drm_intel_bo *src = NULL, *bcs = NULL, *rcs = NULL; - drm_intel_bo *bcs_batch, *rcs_batch; + struct intel_buf *src = NULL, *bcs = NULL, *rcs = NULL; + struct intel_bb *bcs_ibb = NULL, *rcs_ibb = NULL; struct timespec start, end; - int loops = 1000; + int loops = 1; width = _width; height = _height; - src = create_bo(bufmgr, "src"); - bcs = create_bo(bufmgr, "bcs"); - rcs = create_bo(bufmgr, "rcs"); + igt_info("width: %d, height: %d\n", width, height); + + src = create_bo(bops, "src"); + bcs = create_bo(bops, "bcs"); + rcs = create_bo(bops, "rcs"); set_bo(src, 0xdeadbeef); if (write_bcs) { - bcs_batch = bcs_copy_bo(src, bcs); + bcs_ibb = bcs_copy_bo(src, bcs); } else { - bcs_batch = bcs_copy_bo(bcs, src); + bcs_ibb = bcs_copy_bo(bcs, src); } if (write_rcs) { - rcs_batch = rcs_copy_bo(src, rcs); + rcs_ibb = rcs_copy_bo(src, rcs); } else { - rcs_batch = rcs_copy_bo(rcs, src); + rcs_ibb = rcs_copy_bo(rcs, src); } - drm_intel_bo_unreference(rcs); - drm_intel_bo_unreference(bcs); + set_to_gtt_domain(src, true); - drm_intel_gem_bo_start_gtt_access(src, true); clock_gettime(CLOCK_MONOTONIC, &start); for (int i = 0; i < loops; i++) { - drm_intel_gem_bo_context_exec(rcs_batch, NULL, 4096, I915_EXEC_RENDER); - drm_intel_gem_bo_context_exec(bcs_batch, NULL, 4096, I915_EXEC_BLT); + intel_bb_exec(rcs_ibb, intel_bb_offset(rcs_ibb), + I915_EXEC_RENDER, false); + intel_bb_exec(bcs_ibb, intel_bb_offset(bcs_ibb), + I915_EXEC_BLT, false); } - drm_intel_gem_bo_start_gtt_access(src, true); + + set_to_gtt_domain(src, true); clock_gettime(CLOCK_MONOTONIC, &end); igt_info("Time to %s-%s %dx%d [%dk]: %7.3fµs\n", @@ -171,16 +169,19 @@ static void run(drm_intel_bufmgr *bufmgr, int _width, int _height, width, height, 4*width*height/1024, elapsed(&start, &end, loops)); - drm_intel_bo_unreference(rcs_batch); - drm_intel_bo_unreference(bcs_batch); - - drm_intel_bo_unreference(src); + intel_bb_unref(rcs_ibb); + intel_bb_destroy(rcs_ibb); + intel_bb_unref(bcs_ibb); + intel_bb_destroy(bcs_ibb); + intel_buf_destroy(src); + intel_buf_destroy(rcs); + intel_buf_destroy(bcs); } igt_main { - const int sizes[] = {1, 128, 256, 512, 1024, 2048, 4096, 8192, 0}; - drm_intel_bufmgr *bufmgr = NULL; + const int sizes[] = {128, 256, 512, 1024, 2048, 4096, 8192, 0}; + struct buf_ops *bops = NULL; int fd, i; igt_fixture { @@ -195,22 +196,24 @@ igt_main rendercopy = igt_get_render_copyfunc(devid); igt_require(rendercopy); - bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); - igt_assert(bufmgr); - - batch = intel_batchbuffer_alloc(bufmgr, devid); + bops = buf_ops_create(fd); gem_submission_print_method(fd); } for (i = 0; sizes[i] != 0; i++) { igt_subtest_f("read-read-%dx%d", sizes[i], sizes[i]) - run(bufmgr, sizes[i], sizes[i], false, false); + run(bops, sizes[i], sizes[i], false, false); igt_subtest_f("read-write-%dx%d", sizes[i], sizes[i]) - run(bufmgr, sizes[i], sizes[i], false, true); + run(bops, sizes[i], sizes[i], false, true); igt_subtest_f("write-read-%dx%d", sizes[i], sizes[i]) - run(bufmgr, sizes[i], sizes[i], true, false); + run(bops, sizes[i], sizes[i], true, false); igt_subtest_f("write-write-%dx%d", sizes[i], sizes[i]) - run(bufmgr, sizes[i], sizes[i], true, true); + run(bops, sizes[i], sizes[i], true, true); + } + + igt_fixture { + buf_ops_destroy(bops); + close(fd); } } |