tests/kms_chamelium: add a test checking modes

The idea is to check that the mode is correctly applied. We use the Chamelium's
GetVideoParams method to get and check mode parameters.

We need to start a capture of zero frames to trigger the FSM. Without it,
Chamelium's receiver doesn't get stable video input.

Signed-off-by: Simon Ser <simon.ser@intel.com>
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>

1 files changed, 110 insertions, 0 deletions

diff --git a/tests/kms_chamelium.c b/tests/kms_chamelium.c
index 321fb16b..aaf539b7 100644
--- a/tests/kms_chamelium.c
+++ b/tests/kms_chamelium.c
@@ -754,6 +754,110 @@ test_display_frame_dump(data_t *data, struct chamelium_port *port)
 	drmModeFreeConnector(connector);
 }
 
+#define MODE_CLOCK_ACCURACY 0.05 /* 5% */
+
+static void check_mode(struct chamelium *chamelium, struct chamelium_port *port,
+		       drmModeModeInfo *mode)
+{
+	struct chamelium_video_params video_params = {0};
+	double mode_clock;
+	int mode_hsync_offset, mode_vsync_offset;
+	int mode_hsync_width, mode_vsync_width;
+	int mode_hsync_polarity, mode_vsync_polarity;
+
+	chamelium_port_get_video_params(chamelium, port, &video_params);
+
+	mode_clock = (double) mode->clock / 1000;
+	mode_hsync_offset = mode->hsync_start - mode->hdisplay;
+	mode_vsync_offset = mode->vsync_start - mode->vdisplay;
+	mode_hsync_width = mode->hsync_end - mode->hsync_start;
+	mode_vsync_width = mode->vsync_end - mode->vsync_start;
+	mode_hsync_polarity = !!(mode->flags & DRM_MODE_FLAG_PHSYNC);
+	mode_vsync_polarity = !!(mode->flags & DRM_MODE_FLAG_PVSYNC);
+
+	igt_debug("Checking video mode:\n");
+	igt_debug("clock: got %f, expected %f ± %f%%\n",
+		  video_params.clock, mode_clock, MODE_CLOCK_ACCURACY * 100);
+	igt_debug("hactive: got %d, expected %d\n",
+		  video_params.hactive, mode->hdisplay);
+	igt_debug("vactive: got %d, expected %d\n",
+		  video_params.vactive, mode->vdisplay);
+	igt_debug("hsync_offset: got %d, expected %d\n",
+		  video_params.hsync_offset, mode_hsync_offset);
+	igt_debug("vsync_offset: got %d, expected %d\n",
+		  video_params.vsync_offset, mode_vsync_offset);
+	igt_debug("htotal: got %d, expected %d\n",
+		  video_params.htotal, mode->htotal);
+	igt_debug("vtotal: got %d, expected %d\n",
+		  video_params.vtotal, mode->vtotal);
+	igt_debug("hsync_width: got %d, expected %d\n",
+		  video_params.hsync_width, mode_hsync_width);
+	igt_debug("vsync_width: got %d, expected %d\n",
+		  video_params.vsync_width, mode_vsync_width);
+	igt_debug("hsync_polarity: got %d, expected %d\n",
+		  video_params.hsync_polarity, mode_hsync_polarity);
+	igt_debug("vsync_polarity: got %d, expected %d\n",
+		  video_params.vsync_polarity, mode_vsync_polarity);
+
+	if (!isnan(video_params.clock)) {
+		igt_assert(video_params.clock >
+			   mode_clock * (1 - MODE_CLOCK_ACCURACY));
+		igt_assert(video_params.clock <
+			   mode_clock * (1 + MODE_CLOCK_ACCURACY));
+	}
+	igt_assert(video_params.hactive == mode->hdisplay);
+	igt_assert(video_params.vactive == mode->vdisplay);
+	igt_assert(video_params.hsync_offset == mode_hsync_offset);
+	igt_assert(video_params.vsync_offset == mode_vsync_offset);
+	igt_assert(video_params.htotal == mode->htotal);
+	igt_assert(video_params.vtotal == mode->vtotal);
+	igt_assert(video_params.hsync_width == mode_hsync_width);
+	igt_assert(video_params.vsync_width == mode_vsync_width);
+	igt_assert(video_params.hsync_polarity == mode_hsync_polarity);
+	igt_assert(video_params.vsync_polarity == mode_vsync_polarity);
+}
+
+static void test_mode_timings(data_t *data, struct chamelium_port *port)
+{
+	igt_output_t *output;
+	igt_plane_t *primary;
+	drmModeConnector *connector;
+	int fb_id, i;
+	struct igt_fb fb;
+
+	igt_require(chamelium_supports_get_video_params(data->chamelium));
+
+	reset_state(data, port);
+
+	output = prepare_output(data, port, TEST_EDID_BASE);
+	connector = chamelium_port_get_connector(data->chamelium, port, false);
+	primary = igt_output_get_plane_type(output, DRM_PLANE_TYPE_PRIMARY);
+	igt_assert(primary);
+
+	igt_assert(connector->count_modes > 0);
+	for (i = 0; i < connector->count_modes; i++) {
+		drmModeModeInfo *mode = &connector->modes[i];
+
+		fb_id = igt_create_color_pattern_fb(data->drm_fd,
+						    mode->hdisplay, mode->vdisplay,
+						    DRM_FORMAT_XRGB8888,
+						    LOCAL_DRM_FORMAT_MOD_NONE,
+						    0, 0, 0, &fb);
+		igt_assert(fb_id > 0);
+
+		enable_output(data, port, output, mode, &fb);
+
+		/* Trigger the FSM */
+		chamelium_capture(data->chamelium, port, 0, 0, 0, 0, 0);
+
+		check_mode(data->chamelium, port, mode);
+
+		igt_remove_fb(data->drm_fd, &fb);
+	}
+
+	drmModeFreeConnector(connector);
+}
+
 
 /* Playback parameters control the audio signal we synthesize and send */
 #define PLAYBACK_CHANNELS 2
@@ -2156,6 +2260,9 @@ igt_main
 		connector_subtest("dp-frame-dump", DisplayPort)
 			test_display_frame_dump(&data, port);
 
+		connector_subtest("dp-mode-timings", DisplayPort)
+			test_mode_timings(&data, port);
+
 		connector_subtest("dp-audio", DisplayPort)
 			test_display_audio(&data, port, "HDMI",
 					   TEST_EDID_DP_AUDIO);
@@ -2311,6 +2418,9 @@ igt_main
 		connector_subtest("hdmi-frame-dump", HDMIA)
 			test_display_frame_dump(&data, port);
 
+		connector_subtest("hdmi-mode-timings", HDMIA)
+			test_mode_timings(&data, port);
+
 		connector_subtest("hdmi-audio", HDMIA)
 			test_display_audio(&data, port, "HDMI",
 					   TEST_EDID_HDMI_AUDIO);